* [git pull] Please pull powerpc.git master branch
From: Paul Mackerras @ 2008-04-25 0:19 UTC (permalink / raw)
To: torvalds; +Cc: linuxppc-dev, akpm, linux-kernel
Linus,
Please do:
git pull \
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git master
to get another powerpc update. There are fixes for various problems
that have arisen plus a few patchsets that were not quite ready to go
when I sent the last pull request but now are.
Note that there are some generic changes to include/linux/sched.h and
init/main.c. They are from a set of 3 patches from Ben H that Andrew
Morton acked and asked us to push through the powerpc tree.
Thanks,
Paul.
Documentation/powerpc/booting-without-of.txt | 11
MAINTAINERS | 25 +
arch/powerpc/Kconfig | 83 ++
arch/powerpc/boot/.gitignore | 1
arch/powerpc/boot/Makefile | 2
arch/powerpc/boot/dts/canyonlands.dts | 37 +
arch/powerpc/boot/dts/glacier.dts | 37 +
arch/powerpc/boot/ns16550.c | 5
arch/powerpc/kernel/Makefile | 9
arch/powerpc/kernel/asm-offsets.c | 11
arch/powerpc/kernel/cpu_setup_44x.S | 1
arch/powerpc/kernel/cpu_setup_6xx.S | 8
arch/powerpc/kernel/cputable.c | 4
arch/powerpc/kernel/head_fsl_booke.S | 11
arch/powerpc/kernel/misc_32.S | 6
arch/powerpc/kernel/misc_64.S | 20 -
arch/powerpc/kernel/of_platform.c | 2
arch/powerpc/kernel/paca.c | 87 +-
arch/powerpc/kernel/ppc32.h | 2
arch/powerpc/kernel/process.c | 31 +
arch/powerpc/kernel/prom.c | 4
arch/powerpc/kernel/prom_init_check.sh | 58 +
arch/powerpc/kernel/ptrace32.c | 27 -
arch/powerpc/kernel/setup_64.c | 5
arch/powerpc/kernel/stacktrace.c | 1
arch/powerpc/kernel/udbg.c | 4
arch/powerpc/mm/fsl_booke_mmu.c | 2
arch/powerpc/mm/hash_low_32.S | 4
arch/powerpc/mm/init_32.c | 13
arch/powerpc/mm/init_64.c | 3
arch/powerpc/mm/mem.c | 37 +
arch/powerpc/mm/numa.c | 1
arch/powerpc/mm/pgtable_32.c | 23 +
arch/powerpc/platforms/Kconfig | 1
arch/powerpc/platforms/Kconfig.cputype | 4
arch/powerpc/platforms/Makefile | 1
arch/powerpc/platforms/cell/Kconfig | 13
arch/powerpc/platforms/cell/Makefile | 20 -
arch/powerpc/platforms/cell/axon_msi.c | 6
arch/powerpc/platforms/cell/beat.c | 2
arch/powerpc/platforms/cell/beat.h | 0
arch/powerpc/platforms/cell/beat_htab.c | 0
arch/powerpc/platforms/cell/beat_hvCall.S | 0
arch/powerpc/platforms/cell/beat_interrupt.c | 2
arch/powerpc/platforms/cell/beat_interrupt.h | 0
arch/powerpc/platforms/cell/beat_iommu.c | 0
arch/powerpc/platforms/cell/beat_smp.c | 2
arch/powerpc/platforms/cell/beat_spu_priv1.c | 0
arch/powerpc/platforms/cell/beat_syscall.h | 0
arch/powerpc/platforms/cell/beat_udbg.c | 0
arch/powerpc/platforms/cell/beat_wrapper.h | 0
arch/powerpc/platforms/cell/celleb_pci.c | 50 +
arch/powerpc/platforms/cell/celleb_pci.h | 19
arch/powerpc/platforms/cell/celleb_scc.h | 87 ++
arch/powerpc/platforms/cell/celleb_scc_epci.c | 77 --
arch/powerpc/platforms/cell/celleb_scc_pciex.c | 547 ++++++++++++++
arch/powerpc/platforms/cell/celleb_scc_sio.c | 0
arch/powerpc/platforms/cell/celleb_scc_uhc.c | 2
arch/powerpc/platforms/cell/celleb_setup.c | 12
arch/powerpc/platforms/cell/io-workarounds.c | 358 +++------
arch/powerpc/platforms/cell/io-workarounds.h | 49 +
arch/powerpc/platforms/cell/setup.c | 43 +
arch/powerpc/platforms/cell/spider-pci.c | 184 +++++
arch/powerpc/platforms/celleb/Kconfig | 12
arch/powerpc/platforms/celleb/Makefile | 9
arch/powerpc/platforms/celleb/io-workarounds.c | 280 -------
arch/powerpc/platforms/iseries/exception.S | 27 +
arch/powerpc/platforms/ps3/os-area.c | 1
arch/powerpc/platforms/pseries/Kconfig | 5
arch/powerpc/platforms/pseries/Makefile | 4
arch/powerpc/platforms/pseries/eeh.c | 1
arch/powerpc/platforms/pseries/eeh_cache.c | 1
arch/powerpc/platforms/pseries/firmware.c | 10
arch/powerpc/platforms/pseries/iommu.c | 39 -
arch/powerpc/platforms/pseries/lpar.c | 36 -
arch/powerpc/platforms/pseries/ras.c | 4
arch/powerpc/platforms/pseries/rtasd.c | 14
arch/powerpc/platforms/pseries/scanlog.c | 23 -
arch/powerpc/platforms/pseries/setup.c | 17
arch/powerpc/platforms/pseries/smp.c | 11
arch/powerpc/platforms/pseries/xics.c | 1
arch/powerpc/sysdev/mv64x60_dev.c | 52 +
arch/powerpc/sysdev/mv64x60_udbg.c | 2
arch/ppc/8260_io/fcc_enet.c | 19
arch/ppc/8xx_io/enet.c | 23 -
arch/ppc/Kconfig | 82 --
arch/ppc/configs/ads8272_defconfig | 930 ------------------------
arch/ppc/configs/mpc86x_ads_defconfig | 633 ----------------
arch/ppc/configs/mpc885ads_defconfig | 622 ----------------
arch/ppc/kernel/ppc_ksyms.c | 1
arch/ppc/lib/string.S | 14
arch/ppc/platforms/Makefile | 4
arch/ppc/platforms/fads.h | 25 -
arch/ppc/platforms/mpc8272ads_setup.c | 367 ---------
arch/ppc/platforms/mpc885ads.h | 93 --
arch/ppc/platforms/mpc885ads_setup.c | 476 ------------
arch/ppc/platforms/pq2ads.c | 53 -
arch/ppc/platforms/pq2ads.h | 94 --
arch/ppc/platforms/pq2ads_pd.h | 32 -
arch/ppc/syslib/m8260_setup.c | 6
arch/ppc/syslib/m82xx_pci.c | 38 -
arch/ppc/syslib/m8xx_setup.c | 10
drivers/char/xilinx_hwicap/xilinx_hwicap.c | 2
drivers/macintosh/windfarm_pm112.c | 3
drivers/macintosh/windfarm_pm81.c | 4
drivers/macintosh/windfarm_pm91.c | 3
drivers/net/Kconfig | 1
drivers/of/of_i2c.c | 3
drivers/serial/of_serial.c | 14
include/asm-powerpc/fixmap.h | 106 +++
include/asm-powerpc/highmem.h | 41 +
include/asm-powerpc/io-defs.h | 101 +--
include/asm-powerpc/io.h | 8
include/asm-powerpc/kdump.h | 5
include/asm-powerpc/paca.h | 1
include/asm-powerpc/page.h | 45 +
include/asm-powerpc/page_32.h | 6
include/asm-powerpc/thread_info.h | 8
include/asm-ppc/mmu.h | 2
include/asm-ppc/mpc8260.h | 4
include/asm-ppc/mpc8xx.h | 4
include/linux/sched.h | 2
init/main.c | 7
123 files changed, 1923 insertions(+), 4572 deletions(-)
create mode 100644 arch/powerpc/kernel/prom_init_check.sh
rename arch/powerpc/platforms/{celleb/beat.c => cell/beat.c} (99%)
rename arch/powerpc/platforms/{celleb/beat.h => cell/beat.h} (100%)
rename arch/powerpc/platforms/{celleb/htab.c => cell/beat_htab.c} (100%)
rename arch/powerpc/platforms/{celleb/hvCall.S => cell/beat_hvCall.S} (100%)
rename arch/powerpc/platforms/{celleb/interrupt.c => cell/beat_interrupt.c} (99%)
rename arch/powerpc/platforms/{celleb/interrupt.h => cell/beat_interrupt.h} (100%)
rename arch/powerpc/platforms/{celleb/iommu.c => cell/beat_iommu.c} (100%)
rename arch/powerpc/platforms/{celleb/smp.c => cell/beat_smp.c} (99%)
rename arch/powerpc/platforms/{celleb/spu_priv1.c => cell/beat_spu_priv1.c} (100%)
rename arch/powerpc/platforms/{celleb/beat_syscall.h => cell/beat_syscall.h} (100%)
rename arch/powerpc/platforms/{celleb/udbg_beat.c => cell/beat_udbg.c} (100%)
rename arch/powerpc/platforms/{celleb/beat_wrapper.h => cell/beat_wrapper.h} (100%)
rename arch/powerpc/platforms/{celleb/pci.c => cell/celleb_pci.c} (93%)
rename arch/powerpc/platforms/{celleb/pci.h => cell/celleb_pci.h} (73%)
rename arch/powerpc/platforms/{celleb/scc.h => cell/celleb_scc.h} (68%)
rename arch/powerpc/platforms/{celleb/scc_epci.c => cell/celleb_scc_epci.c} (86%)
create mode 100644 arch/powerpc/platforms/cell/celleb_scc_pciex.c
rename arch/powerpc/platforms/{celleb/scc_sio.c => cell/celleb_scc_sio.c} (100%)
rename arch/powerpc/platforms/{celleb/scc_uhc.c => cell/celleb_scc_uhc.c} (99%)
rename arch/powerpc/platforms/{celleb/setup.c => cell/celleb_setup.c} (97%)
create mode 100644 arch/powerpc/platforms/cell/io-workarounds.h
create mode 100644 arch/powerpc/platforms/cell/spider-pci.c
delete mode 100644 arch/powerpc/platforms/celleb/Kconfig
delete mode 100644 arch/powerpc/platforms/celleb/Makefile
delete mode 100644 arch/powerpc/platforms/celleb/io-workarounds.c
delete mode 100644 arch/ppc/configs/ads8272_defconfig
delete mode 100644 arch/ppc/configs/mpc86x_ads_defconfig
delete mode 100644 arch/ppc/configs/mpc885ads_defconfig
delete mode 100644 arch/ppc/platforms/mpc8272ads_setup.c
delete mode 100644 arch/ppc/platforms/mpc885ads.h
delete mode 100644 arch/ppc/platforms/mpc885ads_setup.c
delete mode 100644 arch/ppc/platforms/pq2ads.c
delete mode 100644 arch/ppc/platforms/pq2ads.h
delete mode 100644 arch/ppc/platforms/pq2ads_pd.h
create mode 100644 include/asm-powerpc/fixmap.h
Adrian Bunk (2):
[POWERPC] drivers/of/of_i2c.c: Add MODULE_LICENSE
[POWERPC] char/xilinx_hwicap/ section fix
Benjamin Herrenschmidt (3):
[POWERPC] Add thread_info_cache_init() weak hook
[POWERPC] Fix kernel stack allocation alignment
[POWERPC] Use __weak macro for smp_setup_processor_id
Christoph Hellwig (1):
[POWERPC] Fix new warnings arising from stacktrace patch
Geoff Levand (1):
[POWERPC] PS3: Fix gelic net module dependency
Grant Likely (1):
[POWERPC] bootwrapper: fix build error on virtex405-head.S
Ishizaki Kou (9):
[POWERPC] cell: Generalize io-workarounds code
[POWERPC] celleb: Consolidate io-workarounds code
[POWERPC] celleb: Move the files for celleb base support
[POWERPC] celleb: Move the SCC related code for celleb
[POWERPC] celleb: Move files for Beat hvcall interfaces
[POWERPC] celleb: Move files for Beat mmu and iommu
[POWERPC] celleb: Move a file for SPU on Beat
[POWERPC] celleb: Move miscellaneous files for Beat
[POWERPC] celleb: Add support for PCI Express
John Linn (2):
[POWERPC] Xilinx: boot support for Xilinx uart 16550.
[POWERPC] Xilinx: of_serial support for Xilinx uart 16550.
Josh Boyer (2):
[POWERPC] 4xx: Fix duplicate phys_addr_t definition
[POWERPC] Add strncmp to arch/ppc
Kay Sievers (1):
[POWERPC] macintosh/windfarm: Fix platform driver hotplug/coldplug
Kumar Gala (9):
[PPC] Remove mpc8272 ads board from arch/ppc
[PPC] Remove mpc885ads and mpc86x ads boards from arch/ppc
[POWERPC] ppc32: Fix errata for 603 CPUs
[POWERPC] 85xx: Add support for relocatable kernel (and booting at non-zero)
[POWERPC] Port fixmap from x86 and use for kmap_atomic
[POWERPC] Clean up access to thread_info in assembly
[POWERPC] Cleanup asm-offsets.c
[POWERPC] Clean up misc_64.S
[POWERPC] Add zImage.iseries to arch/powerpc/boot/.gitignore
Michael Ellerman (9):
[POWERPC] Add include of linux/of.h to numa.c
[POWERPC] Add include of linux/of.h to os-area.c
[POWERPC] Discourage people from fiddling with kernel data from prom_init
[POWERPC] Use of_get_next_parent() in platforms/cell/axon_msi.c
[POWERPC] Set udbg_console index to 0
[POWERPC] Mark udbg console as CON_ANYTIME, ie. callable early in boot
[POWERPC] Register udbg console early on pseries LPAR
[POWERPC] Convert from DBG() to pr_debug() in platforms/pseries/
[POWERPC] Add CONFIG_PPC_PSERIES_DEBUG to enable debugging for platforms/pseries
Paul Mackerras (1):
Revert "[POWERPC] Add compat handler for PTRACE_GETSIGINFO"
Remi Machet (3):
[POWERPC] Use default values if necessary in mv64x60 I2C initialization
[POWERPC] Initialize all mv64x60 devices even if one fails
[POWERPC] Fix mv64x60 early console code to use cell-index property
Stefan Roese (2):
[POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dts
[POWERPC] 4xx: Fix 460GT support to not enable FPU
Timur Tabi (1):
[POWERPC] Add Timur Tabi to the MAINTAINERS file
Tony Breeds (2):
[POWERPC] Make iSeries spin on __secondary_hold_spinloop, like pSeries
[POWERPC] Raise the upper limit of NR_CPUS and move the pacas into the BSS
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Kumar Gala @ 2008-04-25 0:47 UTC (permalink / raw)
To: Jeremy Kerr; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200804250826.12128.jk@ozlabs.org>
On Apr 24, 2008, at 5:26 PM, Jeremy Kerr wrote:
> Kumar,
>
>> --- /dev/null
>> +++ b/arch/powerpc/platforms/cell/spufs/.gitignore
>> @@ -0,0 +1,2 @@
>> +spu_save_dump.h
>> +spu_restore_dump.h
>
> nak - these still need to be tracked (and distributed with the
> tree), as
> we want to be able to build the kernel without spu-gcc.
So they should be added to the tree?
- k
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Jeremy Kerr @ 2008-04-25 0:55 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <EB183C40-A46E-4899-9BFF-A6D79C641AE4@kernel.crashing.org>
Kumar,
Ah, I was mistaking them for the .h_shipped files. Nevermind me, your
patch is fine. Applied to my spufs tree.
Cheers,
Jeremy
^ permalink raw reply
* Re: mpc5200b custom board upstreamable?
From: Benjamin Herrenschmidt @ 2008-04-25 0:58 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <20080424162813.GL6692@pengutronix.de>
On Thu, 2008-04-24 at 18:28 +0200, Sascha Hauer wrote:
>
> At the moment my compatible entry looks like this:
>
> compatible = "phytec,pcm030","generic-mpc52xx";
>
> What I think would be nice is that "phytec,pcm030" support is used
> when available and "generic-mpc52xx" as a fallback. We do not have any
> platform specific hacks at the moment, but we may have later. Having
> "phytec,pcm030" in the simple machine would prevent us from doing so.
No, please avoid that 'generic' stuff for now, for all the good reasons
Grant gave. It might be nice but we aren't there yet. It's trivial to
add phytec,pcm030 to the list we support and use that for now.
If you do a rev tomorrow that is still compatible and in fact is very
close to the pcm030 programmatically and call it pcm035, then you could
do something like
compatible = "phytec,pcm035", "phytec,pcm030".
But don't toy with "generic" things, they sound like good ideas but they
ultimately come back and bite us.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Kumar Gala @ 2008-04-25 2:32 UTC (permalink / raw)
To: Jeremy Kerr; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200804251055.27909.jk@ozlabs.org>
On Apr 24, 2008, at 7:55 PM, Jeremy Kerr wrote:
> Kumar,
>
> Ah, I was mistaking them for the .h_shipped files. Nevermind me, your
> patch is fine. Applied to my spufs tree.
ok. thanks.
- k
^ permalink raw reply
* Re: ppc-linux still not booting on my virtexII board
From: yanlong wang @ 2008-04-25 3:18 UTC (permalink / raw)
To: linuxppc-embedded@ozlabs.org
[-- Attachment #1: Type: text/plain, Size: 510 bytes --]
Hi , guys , i meet the same problem as yours . when it into the
early_init(), the system was hang up . I see your solution , but i don't
known it clearly . Can you tell me detailly ??? Why it happened and the
solution .
Waiting for your reply , thank you :)
Hi,
>* (...)arch/ppc/boot/simple/embed_config.c
*
Oops, I skipped that code because my bootloader executes the uncompressed
kernel image (loaded at 0x00000000) without doing that stuff in the first
place. All right ;)
Thanks again,
Patrick
[-- Attachment #2: Type: text/html, Size: 639 bytes --]
^ permalink raw reply
* sysfs cpu entry
From: Kevin Diggs @ 2008-04-25 4:08 UTC (permalink / raw)
To: linuxppc-dev
Hi,
Can someone suggest where to add the code for a cpu
(/sys/devices/system/cpu/cpu0) entry in sysfs?
The 2.6.24 release has a sysfs.c file but it only seems to be used for
64-bit? Anyone know why? What kind of planetary disasters will I create
if I allow it to be used in 32-bit as well?
kevin
P.S.: On an unrelated note, anyone know where to start looking for
problems in pmac_zilog. My 8600 modem which worked fine in 2.4 is now
essentially useless. Some problem with handshaking, I think.
^ permalink raw reply
* Re: sysfs cpu entry
From: Kumar Gala @ 2008-04-25 3:36 UTC (permalink / raw)
To: Kevin Diggs; +Cc: linuxppc-dev
In-Reply-To: <4811593B.8080508@hypersurf.com>
On Apr 24, 2008, at 11:08 PM, Kevin Diggs wrote:
> Hi,
>
> Can someone suggest where to add the code for a cpu
> (/sys/devices/system/cpu/cpu0) entry in sysfs?
>
> The 2.6.24 release has a sysfs.c file but it only seems to be used
> for 64-bit? Anyone know why? What kind of planetary disasters will I
> create if I allow it to be used in 32-bit as well?
>
> kevin
There's no huge harm just make sure that you fixup things to only
expose registers that exist on a 32-bit part.
What 32-bit chip are you looking to enable this for?
- k
^ permalink raw reply
* [PATCH] Change the default link address for pSeries zImage kernels.
From: Tony Breeds @ 2008-04-25 5:39 UTC (permalink / raw)
To: Paul Mackerras, LinuxPPC-dev
Currently we set the start of the .text section to be 4Mb for pSeries.
In situations where the zImage is > 8Mb we'll fail to boot (due to
overlapping with OF). Move .text in a pSeries zImage from 4MB to 64MB
(well past OF).
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
---
- Compile tested for *_defconfig with only pSeries chaning it's link
address.
- Boot tested on POWER6
arch/powerpc/boot/wrapper | 14 ++++++++++++--
arch/powerpc/boot/zImage.coff.lds.S | 1 -
arch/powerpc/boot/zImage.lds.S | 1 -
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index d6c96d9..b5dfc1f 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -138,14 +138,20 @@ objflags=-S
tmp=$tmpdir/zImage.$$.o
ksection=.kernel:vmlinux.strip
isection=.kernel:initrd
+link_address='0x400000'
case "$platform" in
-pmac|pseries|chrp)
+pseries)
+ platformo=$object/of.o
+ link_address='0x4000000'
+ ;;
+pmac|chrp)
platformo=$object/of.o
;;
coff)
platformo=$object/of.o
lds=$object/zImage.coff.lds
+ link_address='0x500000'
;;
miboot|uboot)
# miboot and U-boot want just the bare bits, not an ELF binary
@@ -190,6 +196,7 @@ ps3)
objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data"
ksection=.kernel:vmlinux.bin
isection=.kernel:initrd
+ link_address=''
;;
ep88xc|ep405|ep8248e)
platformo="$object/fixed-head.o $object/$platform.o"
@@ -268,7 +275,10 @@ if [ -n "$dtb" ]; then
fi
if [ "$platform" != "miboot" ]; then
- ${CROSS}ld -m elf32ppc -T $lds -o "$ofile" \
+ if [ -n "$link_address" ] ; then
+ text_start="-Ttext $link_address"
+ fi
+ ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \
$platformo $tmp $object/wrapper.a
rm $tmp
fi
diff --git a/arch/powerpc/boot/zImage.coff.lds.S b/arch/powerpc/boot/zImage.coff.lds.S
index fe87a90..856dc78 100644
--- a/arch/powerpc/boot/zImage.coff.lds.S
+++ b/arch/powerpc/boot/zImage.coff.lds.S
@@ -3,7 +3,6 @@ ENTRY(_zimage_start_opd)
EXTERN(_zimage_start_opd)
SECTIONS
{
- . = (5*1024*1024);
_start = .;
.text :
{
diff --git a/arch/powerpc/boot/zImage.lds.S b/arch/powerpc/boot/zImage.lds.S
index f6e380f..0962d62 100644
--- a/arch/powerpc/boot/zImage.lds.S
+++ b/arch/powerpc/boot/zImage.lds.S
@@ -3,7 +3,6 @@ ENTRY(_zimage_start)
EXTERN(_zimage_start)
SECTIONS
{
- . = (4*1024*1024);
_start = .;
.text :
{
--
1.5.5.1
Yours Tony
linux.conf.au http://www.marchsouth.org/
Jan 19 - 24 2009 The Australian Linux Technical Conference!
^ permalink raw reply related
* bringing up latest kernel on EP8248E problems....
From: gforgcc @ 2008-04-25 5:49 UTC (permalink / raw)
To: linuxppc-embedded
Hi geeks,
i am trying to bring up the latest kernel on EP8248 target,
i am using U-boot-1.3.2 and linux-2.6.25-rc8,
I had some problems when i tried to build the u-boot source ( first i did
""make ep8248_config"" and then ""make"") it was giving undefined reference
related to ft_board_setup() function so i altered the U-boot-1.3.2 source
code... i added the below code to the following file board/ep8248/ep8248.c
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
and also added the below lines to the file include/configs/ep8248.h by
looking into the corresponding .dts file in the kernel source....
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,8248@0"
#define OF_SOC "soc@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc@f0000000/serial@11a80"
Now afte doing the above 2 alterations i was able to build the u-boot-1.3.2
source for ep8248e....
then i created the uImage with the latest kernel source linux-2.6.25-rc8 and
put that uImage to the target...also i created the ep8248e.dtb from the dtc
(DEVICE TREE COMPILER) and put that to the target and passed this as an
argument to the bootm
I also cross checked in the U-boot environment for the fdt command ... it
was present
Finally when it hanged I started debugging using BDI2000.which helped me to
know atleast what is going wrong, i have added some printk's in the kernel
source but still i am not able to find where and what exactly is going
wrong, The first statement it is printing in the log buffer is
""Using Embedded Planet EP8248E machine description"" and thats it the next
message is
Unable to handle kernel paging request for data at address 0xbfff0000
Faulting instruction address:0xc0012070 (This nearest address to this
address in System.map file is cacheable_memzero)
and tracing like this i came to know that in the file
arch/powerpc/mm/ppc_mmu_32.c , here in the function __init MMU_init_hw() and
in the line n_hpteg = total_memory / (PAGE_SIZE * 8); probably it is getting
problem because when i tried to print the variable total_memory it is
printing zero !!! :( :( so probably i am thinking it is not able to find
some memory for Hash table :(
Please share your knowledge and skills to solve this problem..
thanks... :)
--
View this message in context: http://www.nabble.com/bringing-up-latest-kernel-on-EP8248E-problems....-tp16890712p16890712.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH 1/6] ibm_newemac: Fix problem with jumbo frame support and EMAC V4.patch
From: Jeff Garzik @ 2008-04-25 6:01 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: netdev, linuxppc-dev
In-Reply-To: <20080422004758.1A823DE19B@ozlabs.org>
Benjamin Herrenschmidt wrote:
> From: Stefan Roese <sr@denx.de>
>
> This fixes the jumbo frame support on EMAC V4 systems. Now the correct
> bit is set depending on the EMAC version configured.
>
> Tested on Kilauea (405EX) and Canyonlands (460EX).
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> ---
> drivers/net/ibm_newemac/core.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
> index 0789802..486901f 100644
> --- a/drivers/net/ibm_newemac/core.c
> +++ b/drivers/net/ibm_newemac/core.c
> @@ -524,7 +524,10 @@ static int emac_configure(struct emac_instance *dev)
> rx_size = dev->rx_fifo_size_gige;
>
> if (dev->ndev->mtu > ETH_DATA_LEN) {
> - mr1 |= EMAC_MR1_JPSM;
> + if (emac_has_feature(dev, EMAC_FTR_EMAC4))
> + mr1 |= EMAC4_MR1_JPSM;
> + else
> + mr1 |= EMAC_MR1_JPSM;
> dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO;
> } else
> dev->stop_timeout = STOP_TIMEOUT_1000;
applied 1-6
^ permalink raw reply
* Re: [PATCH] ibm_newemac: Increase MDIO timeouts
From: Jeff Garzik @ 2008-04-25 6:04 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: super.firetwister, netdev, linuxppc-dev
In-Reply-To: <20080423051832.63BF7DDF65@ozlabs.org>
Benjamin Herrenschmidt wrote:
> This patch doubles the MDIO timeouts in EMAC as there are field
> cases where they are two short to communicate with some PHYs.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
applied
^ permalink raw reply
* Re: [PATCH] Change the default link address for pSeries zImage kernels.
From: Benjamin Herrenschmidt @ 2008-04-25 6:12 UTC (permalink / raw)
To: Tony Breeds; +Cc: LinuxPPC-dev, Paul Mackerras
In-Reply-To: <20080425053941.GT20457@bakeyournoodle.com>
On Fri, 2008-04-25 at 15:39 +1000, Tony Breeds wrote:
> Currently we set the start of the .text section to be 4Mb for pSeries.
> In situations where the zImage is > 8Mb we'll fail to boot (due to
> overlapping with OF). Move .text in a pSeries zImage from 4MB to 64MB
> (well past OF).
>
> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
> ---
> - Compile tested for *_defconfig with only pSeries chaning it's link
> address.
> - Boot tested on POWER6
Considering how bad OF can be on some machines, I'd like this to be
boot-tested on a wider range of machines. Also, it might depend on the
OF real-base setting as well...
At least, we should be able to test at ozlabs on cell blades, POWER4
bare metal (ie "SMP mode"), POWER5 and POWER5+.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH v2] [POWERPC] 4xx: Add endpoint support to 4xx PCIe driver
From: Benjamin Herrenschmidt @ 2008-04-25 6:24 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1208789670-28909-1-git-send-email-sr@denx.de>
On Mon, 2008-04-21 at 16:54 +0200, Stefan Roese wrote:
> This patch adds basic endpoint support to the 4xx PCIe driver.
>
> This is done by checking the device_type property of the PCIe
> device node ("pci" for root-complex and "pci-endpoint" for endpoint
> configuration).
>
> Note: Currently we map a fixed 64MByte window to PLB address 0 (SDRAM).
> This should probably be configurable via a dts property.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Paul, I forgot to send that ack a while ago, this is .26 material, been
around for some time.
Cheers,
Ben.
^ permalink raw reply
* Re: missing current-speed property prevents autoconsole on pegasos
From: Olaf Hering @ 2008-04-25 7:18 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev
In-Reply-To: <4810AA6B.9010102@genesi-usa.com>
On Thu, Apr 24, Matt Sealey wrote:
> Why not just have users who wish to use console serial port autodetection
> add 3 lines to their nvramrc?
The point of autodetection is that no userinteraction is required.
I guess the serial driver does not probe the configured hardware port
speed anymore (if it ever did that).
^ permalink raw reply
* Re: [PATCH] powerpc copy_siginfo_from_user32
From: Christoph Hellwig @ 2008-04-25 7:22 UTC (permalink / raw)
To: Roland McGrath; +Cc: linuxppc-dev, Paul Mackerras, Anton Blanchard
In-Reply-To: <20080419221924.424EF27037C@magilla.localdomain>
On Sat, Apr 19, 2008 at 03:19:24PM -0700, Roland McGrath wrote:
> Hi. I posted this before, but I don't see it in any of your powerpc.git
> trees. Can you push this upstream ASAP? It would make life easier for me
> trying to merge some more generic changes (that would break powerpc builds
> without this going in first).
Any chance you could re-submit the patch to switch powerpc to the
generic PTRACE_GETSIGINFO using this aswell?
^ permalink raw reply
* Re: [RFC][WIP][PATCH] Add IRQSTACKS to ppc32
From: Christoph Hellwig @ 2008-04-25 7:23 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.64.0804240034160.23185@blarg.am.freescale.net>
On Thu, Apr 24, 2008 at 12:37:50AM -0500, Kumar Gala wrote:
> config IRQSTACKS
> bool "Use separate kernel stacks when processing interrupts"
> - depends on PPC64
Why do we have this as a user-selectable option? It should be on by
default on 32 or 64bit.
^ permalink raw reply
* Re: ML405 failed reboot
From: Guillaume Dargaud @ 2008-04-25 8:16 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <07c101c8a5e6$13670980$ad289e86@LPSC0173W>
I'm posting a little more info 'cause no-one took the bait:
# tail -f /tmp/messages &
# reboot
The system is going down NOW!
Sending SIGTERM to all processes
Requesting system reboot
[ 2021.926957] Restarting system.
[ 2021.9[ 2021.931063] Kernel stack overflow in process c7c52c10,
r1=c01fc25b
[ 2021.935935] NIP: c7503dc8 LR: 00000001 CTR: 00000000
[ 2021.940871] REGS: c7503d40 TRAP: c000b3b8 Not tainted
(2.6.24-rc8-xlnx)
[ 2021.947679] MSR: fee1dead <EE,PR,ME,IR> CR: c01d0000 XER: 00000000
[ 2021.953996] TASK = c7c52c10[261] 'init' THREAD: c7502000
[ 2021.959084] GPR00: 00001001 c01fc25b 00000012 c7503d72 c7503db0 c0017020
00000000 000007e5
[ 2021.967376] GPR08: 3c343e5b 20323032 312e3932 38373530 5d2000d0 c0017020
00000000 000007e5
[ 2021.975669] GPR16: 3c303e5b 20323032 312e3932 36393537 5d2000b0 00000000
00000000 0000004d
[ 2021.983963] GPR24: 00000000 fee1dead 28121969 00000000 c7503df0 c00170a8
02002222 c7503df8
[ 2021.992430] NIP [c7503dc8] 0xc7503dc8
[ 2021.996059] LR [00000001] 0x1
[ 2021.998997] Call Trace:
[ 2022.001423] Kernel panic - not syncing: kernel stack overflow
[ 2022.007142] Rebooting in 180 seconds..
[ 2201.477426] Code: 30001
[ 2201.477437] Addr: c01e5f28
[ 2201.484367] Oops: Exception in kernel mode, sig: 4 [#1]
[ 2201.489548] NIP: c01e5f28 LR: 000001d6 CTR: 00000000
[ 2201.494480] REGS: c01e5ea0 TRAP: c000b3b8 Not tainted
(2.6.24-rc8-xlnx)
[ 2201.501293] MSR: 20323032 <FP,ME,IR,DR> CR: 000001d6 XER: d07870f8
[ 2201.507609] TASK = c7c52c10[261] 'init' THREAD: c7502000
[ 2201.512698] GPR00: c01e5eb0 c01fc25b c01b1634 c01e5f18 c01e5f10 c0017020
00000012 000019e7
[ 2201.520990] GPR08: c01e5ee0 c0016820 00000030 00021030 c01e5ee0 c01fc271
00000012 c01e5f02
[ 2201.529284] GPR16: c01e5f40 c0017020 00000000 000007e6 3c303e5b 20323032
322e3030 0000004d
[ 2201.537578] GPR24: 0002bf20 00000001 28121969 00000000 c01e5f50 c00170a8
02000000 c01e5f58
[ 2201.546044] NIP [c01e5f28] 0xc01e5f28
[ 2201.549673] LR [000001d6] 0x1d6
[ 2201.552783] Call Trace:
[ 2201.555202] Instruction dump:
[ 2201.558142] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX
[ 2201.565826] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX
And now it's truly well hung.
Problem with init ? The wait reboot is compiled ? The reset vector ?
--
Guillaume Dargaud
http://www.gdargaud.net/
^ permalink raw reply
* Re: [PATCH] add gpiolib support for mpc5200
From: Stephen Rothwell @ 2008-04-25 8:22 UTC (permalink / raw)
To: Sascha Hauer; +Cc: linuxppc-dev
In-Reply-To: <20080424153659.GJ6692@pengutronix.de>
[-- Attachment #1: Type: text/plain, Size: 674 bytes --]
Hi Sascha,
One small comment.
On Thu, 24 Apr 2008 17:36:59 +0200 Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
> +#include <asm/of_platform.h>
Never include <asm/of_platform.h>, use <linux/of_platform.h>
> +static struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
const, please.
OK, I lied about only one comment :-)
> +static struct of_device_id mpc52xx_simple_gpiochip_match[] = {
const, again.
> +static struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
Another one.
Also, I don't think you need to include <asm/prom.h>
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* [PATCH, RESEND] RTC class driver for ppc_md RTC functions
From: David Woodhouse @ 2008-04-25 9:29 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
This hooks up the platform-specific [gs]et_rtc_time functions so that
kernels using CONFIG_RTC_CLASS have RTC support on most PowerPC
platforms.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 1e6715e..3e788b7 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -461,4 +461,12 @@ config RTC_DRV_RS5C313
help
If you say yes here you get support for the Ricoh RS5C313 RTC chips.
+config RTC_DRV_PPC
+ tristate "PowerPC machine dependent RTC support"
+ depends on PPC_MERGE
+ help
+ The PowerPC kernel has machine-specific functions for accessing
+ the RTC. This exposes that functionality through the generic RTC
+ class.
+
endif # RTC_CLASS
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 465db4d..e822e56 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -49,3 +49,4 @@ obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o
obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o
obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o
+obj-$(CONFIG_RTC_DRV_PPC) += rtc-ppc.o
--- /dev/null 2007-12-03 03:08:41.854157978 +0000
+++ b/drivers/rtc/rtc-ppc.c 2007-12-03 16:56:15.000000000 +0000
@@ -0,0 +1,69 @@
+/*
+ * RTC driver for ppc_md RTC functions
+ *
+ * © 2007 Red Hat, Inc.
+ *
+ * Author: David Woodhouse <dwmw2@infradead.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/rtc.h>
+#include <linux/platform_device.h>
+#include <asm/machdep.h>
+
+static int ppc_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ ppc_md.get_rtc_time(tm);
+ return 0;
+}
+
+static int ppc_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+ return ppc_md.set_rtc_time(tm);
+}
+
+static const struct rtc_class_ops ppc_rtc_ops = {
+ .set_time = ppc_rtc_set_time,
+ .read_time = ppc_rtc_read_time,
+};
+
+static struct rtc_device *rtc;
+static struct platform_device *ppc_rtc_pdev;
+
+static int __init ppc_rtc_init(void)
+{
+ if (!ppc_md.get_rtc_time || !ppc_md.set_rtc_time)
+ return -ENODEV;
+
+ ppc_rtc_pdev = platform_device_register_simple("ppc-rtc", 0, NULL, 0);
+ if (IS_ERR(ppc_rtc_pdev))
+ return PTR_ERR(ppc_rtc_pdev);
+
+ rtc = rtc_device_register("ppc_md", &ppc_rtc_pdev->dev,
+ &ppc_rtc_ops, THIS_MODULE);
+ if (IS_ERR(rtc)) {
+ platform_device_unregister(ppc_rtc_pdev);
+ return PTR_ERR(rtc);
+ }
+
+ return 0;
+}
+
+static void __exit ppc_rtc_exit(void)
+{
+ rtc_device_unregister(rtc);
+ platform_device_unregister(ppc_rtc_pdev);
+}
+
+module_init(ppc_rtc_init);
+module_exit(ppc_rtc_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
+MODULE_DESCRIPTION("Generic RTC class driver for PowerPC");
--
dwmw2
^ permalink raw reply related
* Re: [PATCH] mpc i2c driver, compare to NO_IRQ instead of zero
From: Jean Delvare @ 2008-04-25 9:43 UTC (permalink / raw)
To: Jon Smirl; +Cc: linuxppc-dev, i2c
In-Reply-To: <20080219174221.5b18cba8@hyperion.delvare>
Hi Jon,
On Tue, 19 Feb 2008 17:42:21 +0100, Jean Delvare wrote:
> On Mon, 21 Jan 2008 15:07:40 -0500, Jon Smirl wrote:
> > Alter the mpc i2c driver to use the NO_IRQ symbol instead of
> > the constant zero when checking for valid interrupts. NO_IRQ=-1
> > on ppc and NO_IRQ=0 on powerpc so the checks against zero are
> > not correct.
>
> Using NO_IRQ sounds good, just one question:
>
> >
> > Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
> > ---
> >
> > drivers/i2c/busses/i2c-mpc.c | 10 +++++-----
> > 1 files changed, 5 insertions(+), 5 deletions(-)
> >
> >
> > diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
> > index bbe787b..d20959d 100644
> > --- a/drivers/i2c/busses/i2c-mpc.c
> > +++ b/drivers/i2c/busses/i2c-mpc.c
> > @@ -99,7 +99,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
> > u32 x;
> > int result = 0;
> >
> > - if (i2c->irq == 0)
> > + if (i2c->irq == NO_IRQ)
> > {
> > while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
> > schedule();
> > @@ -329,7 +329,7 @@ static int fsl_i2c_probe(struct platform_device *pdev)
> > return -ENOMEM;
> >
> > i2c->irq = platform_get_irq(pdev, 0);
> > - if (i2c->irq < 0) {
> > + if (i2c->irq < NO_IRQ) {
>
> I am skeptical about this one. Can platform_get_irq() really return
> NO_IRQ? I thought that the IRQ resource would be plain missing if the
> device has no IRQ, so I would expect:
>
> i2c->irq = platform_get_irq(pdev, 0);
> if (i2c->irq < 0)
> i2c->irq = NO_IRQ; /* Use polling */
>
> Testing against NO_IRQ suggests that devices with no IRQ would still
> have an IRQ resource defined and explicitly set to NO_IRQ. Sounds weird
> to me. Can you please clarify this point?
>
> For what it's worth, no other kernel driver checks for irq < NO_IRQ.
> They all check for irq < 0 after calling platform_get_irq().
>
> > result = -ENXIO;
> > goto fail_get_irq;
> > }
> > @@ -344,7 +344,7 @@ static int fsl_i2c_probe(struct platform_device *pdev)
> > goto fail_map;
> > }
> >
> > - if (i2c->irq != 0)
> > + if (i2c->irq != NO_IRQ)
> > if ((result = request_irq(i2c->irq, mpc_i2c_isr,
> > IRQF_SHARED, "i2c-mpc", i2c)) < 0) {
> > printk(KERN_ERR
> > @@ -367,7 +367,7 @@ static int fsl_i2c_probe(struct platform_device *pdev)
> > return result;
> >
> > fail_add:
> > - if (i2c->irq != 0)
> > + if (i2c->irq != NO_IRQ)
> > free_irq(i2c->irq, i2c);
> > fail_irq:
> > iounmap(i2c->base);
> > @@ -384,7 +384,7 @@ static int fsl_i2c_remove(struct platform_device *pdev)
> > i2c_del_adapter(&i2c->adap);
> > platform_set_drvdata(pdev, NULL);
> >
> > - if (i2c->irq != 0)
> > + if (i2c->irq != NO_IRQ)
> > free_irq(i2c->irq, i2c);
> >
> > iounmap(i2c->base);
>
> The rest looks good.
Any news about this patch? I had a question above which is left
unanswered. If you want this patch merged in 2.6.26 you'll have to be
quick.
--
Jean Delvare
^ permalink raw reply
* Re: [PATCH v2] [POWERPC] 4xx: Add endpoint support to 4xx PCIe driver
From: Josh Boyer @ 2008-04-25 10:37 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Stefan Roese, Paul Mackerras
In-Reply-To: <1209104641.9060.228.camel@pasglop>
On Fri, 25 Apr 2008 16:24:01 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> On Mon, 2008-04-21 at 16:54 +0200, Stefan Roese wrote:
> > This patch adds basic endpoint support to the 4xx PCIe driver.
> >
> > This is done by checking the device_type property of the PCIe
> > device node ("pci" for root-complex and "pci-endpoint" for endpoint
> > configuration).
> >
> > Note: Currently we map a fixed 64MByte window to PLB address 0 (SDRAM).
> > This should probably be configurable via a dts property.
> >
> > Signed-off-by: Stefan Roese <sr@denx.de>
>
> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
>
> Paul, I forgot to send that ack a while ago, this is .26 material, been
> around for some time.
I'll add it to my tree. And this version of the patch was only sent
out on Monday.
josh
^ permalink raw reply
* Re: [PATCH] Change the default link address for pSeries zImage kernels.
From: Josh Boyer @ 2008-04-25 10:42 UTC (permalink / raw)
To: benh; +Cc: LinuxPPC-dev, Paul Mackerras
In-Reply-To: <1209103970.9060.226.camel@pasglop>
On Fri, 25 Apr 2008 16:12:50 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> On Fri, 2008-04-25 at 15:39 +1000, Tony Breeds wrote:
> > Currently we set the start of the .text section to be 4Mb for pSeries.
> > In situations where the zImage is > 8Mb we'll fail to boot (due to
> > overlapping with OF). Move .text in a pSeries zImage from 4MB to 64MB
> > (well past OF).
> >
> > Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
> > ---
> > - Compile tested for *_defconfig with only pSeries chaning it's link
> > address.
> > - Boot tested on POWER6
>
> Considering how bad OF can be on some machines, I'd like this to be
> boot-tested on a wider range of machines. Also, it might depend on the
> OF real-base setting as well...
>
> At least, we should be able to test at ozlabs on cell blades, POWER4
> bare metal (ie "SMP mode"), POWER5 and POWER5+.
And given that all the embedded boards use zImage.lds.S, we should
probably test it there. I'll try to test on 4xx for both treeImage and
U-Boot today.
josh
^ permalink raw reply
* Re: [PATCH] add gpiolib support for mpc5200
From: Sascha Hauer @ 2008-04-25 10:53 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40804241145x39165ffp78108c53d0d5a911@mail.gmail.com>
On Thu, Apr 24, 2008 at 12:45:49PM -0600, Grant Likely wrote:
> On Thu, Apr 24, 2008 at 9:36 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > Hi all,
> >
> > Feel free to comment on this.
> >
> > Sascha
> >
> >
> > This patch adds gpiolib support for mpc5200 SOCs. I'm not sure
> > whether it's a good idea to make this optional via kconfig.
> > The gpt devices only support a single gpio. In the current of_gpio
> > implementation each chip consumes 32 GPIOs which leads to huge
> > gaps.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
>
> Looks pretty good. You've saved me the need to go write a driver
> myself. Comments below, but I'll pull it into my tree and give it a
> spin.
>
> I don't see any mechanism for setting the open drain state of the pin.
> That will either need to be done by platform code or encoded into the
> device tree. Does the OF gpio infrastructure provide any callback to
> the driver when something requests the pin? That would seem to be the
> ideal place to set the open drain state.
No, unfortunately not. The generic gpio stuff does not provide this
callback, so of gpio has no chance to do so.
This would also be a good place to catch the registration of reserved
pins, so maybe it's worth discussing this with the gpiolib maintainers.
>
> You'll also need to document the format of the gpio pin specifier for
> these devices (ie. first cell is GPIO number, second cell is ????).
I've taken the two-cell approach from booting-without-of.txt. There the
second cell is for flags. We could encode the open drain state into
this.
>
> As for the wide spans caused by gpt gpios, it is probably okay for
> now, but we can rework it to do something clever (like have a single
> registration for all gpt gpios) at a later date.
I would rather teach the of gpio infrastructure not to reserve 32 gpios
for each chip. This will bite us once we want to support gpio chips with
more than 32 gpios anyway.
> > + *
> > + */
> > +static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> > +{
> > + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> > + struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
> > + unsigned int ret;
> > +
> > + ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1;
> > +
> > + pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
>
> dev_dbg maybe?
We would have to carry the device from the probe function to this
function just for the debugging output. I'm not sure if it's worth it.
>
> > +
> > + return ret;
> > +}
> > +
> > +static void mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> > +{
> > + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> > + struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
> > + unsigned int tmp;
> > + unsigned long flags;
> > +
> > + spin_lock_irqsave(&gpio_lock, flags);
> > +
> > + tmp = in_8(®s->wkup_dvo);
> > + if (val)
> > + tmp |= 1 << (7 - gpio);
> > + else
> > + tmp &= ~(1 << (7 - gpio));
> > + out_8(®s->wkup_dvo, tmp);
>
> Rather than read/modify/write of the device register; the function
> would probably be faster (one fewer barrier) if you used a shadow
> register of the pin state and the critical region would be
> shorter/simpler. Also, while this device doesn't have the side
> effects associated with shared input/output register, it might still
> be good form to use a shadow register just for the sake of clarity.
OK
>
> > +
> > + spin_unlock_irqrestore(&gpio_lock, flags);
> > +
> > + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> > +}
> > +
> > +static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> > +{
> > + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> > + struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
> > + unsigned int tmp;
> > + unsigned long flags;
> > +
> > + spin_lock_irqsave(&gpio_lock, flags);
> > +
> > + tmp = in_8(®s->wkup_ddr);
> > + tmp &= ~(1 << (7 - gpio));
> > + out_8(®s->wkup_ddr, tmp);
> > +
> > + spin_unlock_irqrestore(&gpio_lock, flags);
> > +
> > + return 0;
> > +}
> > +
> > +static int mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> > +{
> > + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> > + struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
> > + unsigned int tmp;
> > + unsigned long flags;
> > +
> > + /* First set initial value */
> > + mpc52xx_wkup_gpio_set(gc, gpio, val);
> > +
> > + spin_lock_irqsave(&gpio_lock, flags);
> > +
> > + /* Then set direction */
> > + tmp = in_8(®s->wkup_ddr);
> > + tmp |= 1 << (7 - gpio);
> > + out_8(®s->wkup_ddr, tmp);
> > +
> > + /* Finally enable the pin */
> > + tmp = in_8(®s->wkup_gpioe);
> > + tmp |= 1 << (7 - gpio);
> > + out_8(®s->wkup_gpioe, tmp);
>
> Do you want/need the cost of enabling the pin every time dir_out is
> called? Can it be done when the pin is requested instead? Or by the
> board firmware/platform code? Some drivers (for example the i2c
> bitbang driver for the clock signal; see i2c-gpio.c) change the state
> by changing the direction of the pin.
I changed this to use shadow registers aswell, so we have two fewer register
accesses. I don't have a good feeling about enabling the pins in the
platform code because at the moment we can change the gpio routing without
recompiling the kernel.
Just to know what we are talking about I made some measurements. As a
first improvement I added a lockless inline version of gpio_set so that
we do not have to aqcuire the spinlock twice. With this I get a maximum
toggle frequency using gpio_direction_output() of 760 KHz. Without pin
enabling this frequency increases to 870 KHz. Using gpio_set_value() we
have 3.3 MHz.
See my other mail for an updated patch
Sascha
--
Pengutronix e.K. - Linux Solutions for Science and Industry
-----------------------------------------------------------
Kontakt-Informationen finden Sie im Header dieser Mail oder
auf der Webseite -> http://www.pengutronix.de/impressum/ <-
^ permalink raw reply
* [PATCH] add gpiolib support for mpc5200
From: Sascha Hauer @ 2008-04-25 10:56 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20080424153659.GJ6692@pengutronix.de>
This patch adds gpiolib support for mpc5200 SOCs.
Changes since last submit:
- fixed checkpatch warnings
- use shadow variables for register accesses
- make match tables const
- Add documentation
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
Documentation/powerpc/mpc52xx-device-tree-bindings.txt | 12
arch/powerpc/platforms/52xx/Kconfig | 6
arch/powerpc/platforms/52xx/Makefile | 2
arch/powerpc/platforms/52xx/mpc52xx_gpio.c | 465 +++++++++++++++++
4 files changed, 485 insertions(+)
Index: linux-2.6-powerpc/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
===================================================================
--- /dev/null
+++ linux-2.6-powerpc/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
@@ -0,0 +1,465 @@
+/*
+ * MPC52xx gpio driver
+ *
+ * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/of.h>
+#include <linux/kernel.h>
+#include <linux/of_gpio.h>
+#include <linux/io.h>
+#include <linux/of_platform.h>
+
+#include <asm/gpio.h>
+#include <asm/mpc52xx.h>
+#include <sysdev/fsl_soc.h>
+
+static DEFINE_SPINLOCK(gpio_lock);
+
+struct mpc52xx_gpiochip {
+ struct of_mm_gpio_chip mmchip;
+ unsigned int shadow_dvo;
+ unsigned int shadow_gpioe;
+ unsigned int shadow_ddr;
+};
+
+/*
+ * GPIO LIB API implementation for wakeup GPIOs.
+ *
+ * There's a maximum of 8 wakeup GPIOs. Which of these are available
+ * for use depends on your board setup.
+ *
+ * 0 -> GPIO_WKUP_7
+ * 1 -> GPIO_WKUP_6
+ * 2 -> PSC6_1
+ * 3 -> PSC6_0
+ * 4 -> ETH_17
+ * 5 -> PSC3_9
+ * 6 -> PSC2_4
+ * 7 -> PSC1_4
+ *
+ */
+static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
+ unsigned int ret;
+
+ ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1;
+
+ pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
+
+ return ret;
+}
+
+static inline void
+__mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpiochip *chip = container_of(mm_gc,
+ struct mpc52xx_gpiochip, mmchip);
+ struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
+
+ if (val)
+ chip->shadow_dvo |= 1 << (7 - gpio);
+ else
+ chip->shadow_dvo &= ~(1 << (7 - gpio));
+
+ out_8(®s->wkup_dvo, chip->shadow_dvo);
+}
+
+static void
+mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ __mpc52xx_wkup_gpio_set(gc, gpio, val);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
+}
+
+static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpiochip *chip = container_of(mm_gc,
+ struct mpc52xx_gpiochip, mmchip);
+ struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ /* set the direction */
+ chip->shadow_ddr &= ~(1 << (7 - gpio));
+ out_8(®s->wkup_ddr, chip->shadow_ddr);
+
+ /* and enable the pin */
+ chip->shadow_gpioe |= 1 << (7 - gpio);
+ out_8(®s->wkup_gpioe, chip->shadow_gpioe);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ return 0;
+}
+
+static int
+mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
+ struct mpc52xx_gpiochip *chip = container_of(mm_gc,
+ struct mpc52xx_gpiochip, mmchip);
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ __mpc52xx_wkup_gpio_set(gc, gpio, val);
+
+ /* Then set direction */
+ chip->shadow_ddr |= 1 << (7 - gpio);
+ out_8(®s->wkup_ddr, chip->shadow_ddr);
+
+ /* Finally enable the pin */
+ chip->shadow_gpioe |= 1 << (7 - gpio);
+ out_8(®s->wkup_gpioe, chip->shadow_gpioe);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
+
+ return 0;
+}
+
+static int __devinit mpc52xx_wkup_gpiochip_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct mpc52xx_gpiochip *chip;
+ struct mpc52xx_gpio_wkup *regs;
+ struct of_gpio_chip *ofchip;
+ int ret;
+
+ chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ ofchip = &chip->mmchip.of_gc;
+
+ ofchip->gpio_cells = 2;
+ ofchip->gc.ngpio = 8;
+ ofchip->gc.direction_input = mpc52xx_wkup_gpio_dir_in;
+ ofchip->gc.direction_output = mpc52xx_wkup_gpio_dir_out;
+ ofchip->gc.get = mpc52xx_wkup_gpio_get;
+ ofchip->gc.set = mpc52xx_wkup_gpio_set;
+
+ ret = of_mm_gpiochip_add(ofdev->node, &chip->mmchip);
+ if (ret)
+ return ret;
+
+ regs = chip->mmchip.regs;
+ chip->shadow_gpioe = in_8(®s->wkup_gpioe);
+ chip->shadow_ddr = in_8(®s->wkup_ddr);
+ chip->shadow_dvo = in_8(®s->wkup_dvo);
+
+ return 0;
+}
+
+static int mpc52xx_gpiochip_remove(struct of_device *ofdev)
+{
+ return -EBUSY;
+}
+
+static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
+ {
+ .compatible = "fsl,mpc5200-gpio-wkup",
+ },
+ {}
+};
+
+static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = {
+ .name = "gpio_wkup",
+ .match_table = mpc52xx_wkup_gpiochip_match,
+ .probe = mpc52xx_wkup_gpiochip_probe,
+ .remove = mpc52xx_gpiochip_remove,
+};
+
+/*
+ * GPIO LIB API implementation for simple GPIOs
+ *
+ * There's a maximum of 32 simple GPIOs. Which of these are available
+ * for use depends on your board setup.
+ * The numbering reflects the bit numbering in the port registers:
+ *
+ * 0..1 > reserved
+ * 2..3 > IRDA
+ * 4..7 > ETHR
+ * 8..11 > reserved
+ * 12..15 > USB
+ * 16..17 > reserved
+ * 18..23 > PSC3
+ * 24..27 > PSC2
+ * 28..31 > PSC1
+ */
+static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
+ unsigned int ret;
+
+ ret = (in_be32(®s->simple_ival) >> (31 - gpio)) & 1;
+
+ return ret;
+}
+
+static inline void
+__mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpiochip *chip = container_of(mm_gc,
+ struct mpc52xx_gpiochip, mmchip);
+ struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
+
+ if (val)
+ chip->shadow_dvo |= 1 << (31 - gpio);
+ else
+ chip->shadow_dvo &= ~(1 << (31 - gpio));
+ out_be32(®s->simple_dvo, chip->shadow_dvo);
+}
+
+static void
+mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ __mpc52xx_simple_gpio_set(gc, gpio, val);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
+}
+
+static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpiochip *chip = container_of(mm_gc,
+ struct mpc52xx_gpiochip, mmchip);
+ struct mpc52xx_gpio *regs = mm_gc->regs;
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ /* set the direction */
+ chip->shadow_ddr &= ~(1 << (31 - gpio));
+ out_be32(®s->simple_ddr, chip->shadow_ddr);
+
+ /* and enable the pin */
+ chip->shadow_gpioe |= 1 << (31 - gpio);
+ out_be32(®s->simple_gpioe, chip->shadow_gpioe);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ return 0;
+}
+
+static int
+mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpiochip *chip = container_of(mm_gc,
+ struct mpc52xx_gpiochip, mmchip);
+ struct mpc52xx_gpio *regs = mm_gc->regs;
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ /* First set initial value */
+ __mpc52xx_simple_gpio_set(gc, gpio, val);
+
+ /* Then set direction */
+ chip->shadow_ddr |= 1 << (31 - gpio);
+ out_be32(®s->simple_ddr, chip->shadow_ddr);
+
+ /* Finally enable the pin */
+ chip->shadow_gpioe |= 1 << (31 - gpio);
+ out_be32(®s->simple_gpioe, chip->shadow_gpioe);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
+
+ return 0;
+}
+
+static int __devinit mpc52xx_simple_gpiochip_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct mpc52xx_gpiochip *chip;
+ struct of_gpio_chip *ofchip;
+ struct mpc52xx_gpio *regs;
+ int ret;
+
+ chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ ofchip = &chip->mmchip.of_gc;
+
+ ofchip->gpio_cells = 2;
+ ofchip->gc.ngpio = 32;
+ ofchip->gc.direction_input = mpc52xx_simple_gpio_dir_in;
+ ofchip->gc.direction_output = mpc52xx_simple_gpio_dir_out;
+ ofchip->gc.get = mpc52xx_simple_gpio_get;
+ ofchip->gc.set = mpc52xx_simple_gpio_set;
+
+ ret = of_mm_gpiochip_add(ofdev->node, &chip->mmchip);
+ if (ret)
+ return ret;
+
+ regs = chip->mmchip.regs;
+ chip->shadow_gpioe = in_be32(®s->simple_gpioe);
+ chip->shadow_ddr = in_be32(®s->simple_ddr);
+ chip->shadow_dvo = in_be32(®s->simple_dvo);
+
+ return 0;
+}
+
+static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
+ {
+ .compatible = "fsl,mpc5200-gpio",
+ },
+ {}
+};
+
+static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
+ .name = "gpio",
+ .match_table = mpc52xx_simple_gpiochip_match,
+ .probe = mpc52xx_simple_gpiochip_probe,
+ .remove = mpc52xx_gpiochip_remove,
+};
+
+/*
+ * GPIO LIB API implementation for gpt GPIOs.
+ *
+ * Each gpt only has a single GPIO.
+ */
+static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
+ unsigned int ret;
+
+ return (in_be32(®s->status) & (1 << (31 - 23))) ? 1 : 0;
+
+ return ret;
+}
+
+static void
+mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
+
+ if (val)
+ out_be32(®s->mode, 0x34);
+ else
+ out_be32(®s->mode, 0x24);
+
+ pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
+}
+
+static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct mpc52xx_gpt *regs = mm_gc->regs;
+
+ out_be32(®s->mode, 0x04);
+
+ return 0;
+}
+
+static int
+mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ mpc52xx_gpt_gpio_set(gc, gpio, val);
+ pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
+
+ return 0;
+}
+
+static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct of_mm_gpio_chip *mmchip;
+ struct of_gpio_chip *chip;
+
+ mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
+ if (!mmchip)
+ return -ENOMEM;
+
+ chip = &mmchip->of_gc;
+
+ chip->gpio_cells = 2;
+ chip->gc.ngpio = 1;
+ chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
+ chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
+ chip->gc.get = mpc52xx_gpt_gpio_get;
+ chip->gc.set = mpc52xx_gpt_gpio_set;
+
+ return of_mm_gpiochip_add(ofdev->node, mmchip);
+}
+
+static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
+ {
+ .compatible = "fsl,mpc5200-gpt-gpio",
+ },
+ {}
+};
+
+static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
+ .name = "gpio_gpt",
+ .match_table = mpc52xx_gpt_gpiochip_match,
+ .probe = mpc52xx_gpt_gpiochip_probe,
+ .remove = mpc52xx_gpiochip_remove,
+};
+
+static int __init mpc52xx_gpio_init(void)
+{
+ if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
+ printk(KERN_ERR "Unable to register wakeup GPIO driver\n");
+
+ if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
+ printk(KERN_ERR "Unable to register simple GPIO driver\n");
+
+ if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
+ printk(KERN_ERR "Unable to register gpt GPIO driver\n");
+
+ return 0;
+}
+
+
+/* Make sure we get initialised before anyone else tries to use us */
+subsys_initcall(mpc52xx_gpio_init);
+
+/* No exit call at the moment as we cannot unregister of gpio chips */
+
+MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
+MODULE_LICENSE("GPL v2");
+
Index: linux-2.6-powerpc/arch/powerpc/platforms/52xx/Kconfig
===================================================================
--- linux-2.6-powerpc.orig/arch/powerpc/platforms/52xx/Kconfig
+++ linux-2.6-powerpc/arch/powerpc/platforms/52xx/Kconfig
@@ -44,3 +44,9 @@ config PPC_MPC5200_BUGFIX
It is safe to say 'Y' here
+config PPC_MPC5200_GPIO
+ bool "MPC5200 GPIO support"
+ depends on PPC_MPC52xx
+ select HAVE_GPIO_LIB
+ help
+ Enable gpiolib support for mpc5200 based boards
Index: linux-2.6-powerpc/arch/powerpc/platforms/52xx/Makefile
===================================================================
--- linux-2.6-powerpc.orig/arch/powerpc/platforms/52xx/Makefile
+++ linux-2.6-powerpc/arch/powerpc/platforms/52xx/Makefile
@@ -14,3 +14,5 @@ obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc
ifeq ($(CONFIG_PPC_LITE5200),y)
obj-$(CONFIG_PM) += lite5200_sleep.o lite5200_pm.o
endif
+
+obj-$(CONFIG_PPC_MPC5200_GPIO) += mpc52xx_gpio.o
\ No newline at end of file
Index: linux-2.6-powerpc/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
===================================================================
--- linux-2.6-powerpc.orig/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
+++ linux-2.6-powerpc/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
@@ -186,6 +186,12 @@ Recommended soc5200 child nodes; populat
name device_type compatible Description
---- ----------- ---------- -----------
gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers
+gpt@<addr> gpt fsl,mpc5200-gpt-gpio General purpose
+ timers in GPIO mode
+gpio@<addr> fsl,mpc5200-gpio MPC5200 simple gpio
+ controller
+gpio@<addr> fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio
+ controller
rtc@<addr> rtc mpc5200-rtc Real time clock
mscan@<addr> mscan mpc5200-mscan CAN bus controller
pci@<addr> pci mpc5200-pci PCI bridge
@@ -225,6 +231,12 @@ PSC in i2s mode: The mpc5200 and mpc520
i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
compatible field.
+7) GPIO controller nodes
+Each GPIO controller node should have the empty property gpio-controller and
+#gpio-cells set to 2. First cell is the GPIO number which is interpreted
+according to the bit numbers in the GPIO control registers. The second cell
+is for flags which is currently unsused.
+
IV - Extra Notes
================
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