* Kernel marking NAND blocks bad
From: Ron Madrid @ 2008-07-02 19:35 UTC (permalink / raw)
To: Scott Wood, linuxppc-dev
Scott,
I know I asked about this in the past, but I can't remember where it was left. Did this get
resolved in some other repository that isn't the main linux-2.6 repository? If it didn't I think
I might have a solution. BTW I'm using 2.6.26-rc8
Ron
^ permalink raw reply
* Re: Updating glibc on SELF image
From: Dave Cogley @ 2008-07-02 19:18 UTC (permalink / raw)
To: Detlev Zundel; +Cc: linuxppc-embedded
In-Reply-To: <m2hcb82ld1.fsf@ohwell.denx.de>
Thank you for the reply. I did not build the initial SELF image it was
provided to me from the board vendor. I used it as a starting point to
get something up and running on SELF. Can you point me to the
documentation on how to use the SELF RPM system?
Thanks,
Dave
On Wed, 2008-07-02 at 20:26 +0200, Detlev Zundel wrote:
> Hi Dave,
>
> > Can someone provide a comprehensive guide for building SELF images from
> > scratch? More specifically how to install dependency libraries?
>
> There is a mailing list specifically for ELDK and related questions[1].
>
> Apart from that, if you want to change SELF contents, you can either do
> it manually (as you started) or adjust the SELF spec file and rebuild
> the target RPM as documented in the DULG.
>
> Apart from that I believe you somehow work with mismatching SELF and
> ELDK NFS installations. The SELF rpm is built from the ELDK NFS
> installation, so it is simply not possible to have different versions of
> libraries between those two.
>
> Cheers
> Detlev
>
> [1] http://lists.denx.de/mailman/listinfo/eldk
>
^ permalink raw reply
* Re: Updating glibc on SELF image
From: Detlev Zundel @ 2008-07-02 18:26 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1213901149.4450.22.camel@localhost.localdomain>
Hi Dave,
> Can someone provide a comprehensive guide for building SELF images from
> scratch? More specifically how to install dependency libraries?
There is a mailing list specifically for ELDK and related questions[1].
Apart from that, if you want to change SELF contents, you can either do
it manually (as you started) or adjust the SELF spec file and rebuild
the target RPM as documented in the DULG.
Apart from that I believe you somehow work with mismatching SELF and
ELDK NFS installations. The SELF rpm is built from the ELDK NFS
installation, so it is simply not possible to have different versions of
libraries between those two.
Cheers
Detlev
[1] http://lists.denx.de/mailman/listinfo/eldk
--
Ftpd never switches uid and euid, it uses setfsuid(2) instead. The
main reason is that uid switching has been exploited in several
breakins, but the sheer ugliness of uid switching counts too.
-- pure-ftpd(8)
^ permalink raw reply
* Re: [Bugme-new] [Bug 11027] New: random forward time jumps
From: Andrew Morton @ 2008-07-02 18:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <bug-11027-10286@http.bugzilla.kernel.org/>
On Wed, 2 Jul 2008 10:49:59 -0700 (PDT) bugme-daemon@bugzilla.kernel.org wrote:
> http://bugzilla.kernel.org/show_bug.cgi?id=11027
Hopefully someone in ppc land has set a watch on
platform_ppc-32@kernel-bugs.osdl.org?
If not, please go to http://bugzilla.kernel.org/userprefs.cgi?tab=email
and enter platform_ppc-32@kernel-bugs.osdl.org into the "Users to watch:"
box.
You can get these directed to a mailing list by creating an account
for linuxppc-dev@ozlabs.org then getting that "person" to watch
platform_ppc-32@kernel-bugs.osdl.org.
^ permalink raw reply
* Re: [PATCH 1/3] mpc83xx: Power Management support
From: Scott Wood @ 2008-07-02 17:46 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <61D15FC6-64DC-4342-B16D-4FBFF86099A9@kernel.crashing.org>
Kumar Gala wrote:
>
> On Jul 2, 2008, at 12:12 PM, Scott Wood wrote:
>
>> Kumar Gala wrote:
>>>> +#define SS_MEMSAVE 0x00
>>> What is this? add a comment?
>>
>> There's a comment where MEMSAVE is used:
>>
>> /* The first 2 words of memory are used to communicate with the
>
> I read this as the memory address 0, 0x4. do you mean the first two
> words of the save area?
Both. Memory addresses 0 and 4 are saved in the first two words of the
save area, so that we can overwrite the former with the magic number and
resume address.
>>
>> * bootloader, to tell it how to resume.
>> *
>> * The first word is the magic number 0xf5153ae5, and the second
>> * is the pointer to mpc83xx_deep_resume.
>> *
>> * The original content of these two words is saved in the state
>> * save area.
>> */
>>
>> We could stick a /* First 8 bytes of RAM */ after the #define if you
>> want.
>
> ahh, might be useful to add SS_MEMSAVE into the comment.
OK.
-Scott
^ permalink raw reply
* Re: [PATCH v2] 85xx: publish of device for cds platforms
From: Kumar Gala @ 2008-07-02 17:41 UTC (permalink / raw)
To: Dave Jiang; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <20080616223617.GA23646@blade.az.mvista.com>
On Jun 16, 2008, at 5:36 PM, Dave Jiang wrote:
> Publish the devices listed in dts under SOC as of_device for 85xx_cds
> platform. The devices are needed by the 85xx EDAC driver.
>
> Signed-off-by: Dave Jiang <djiang@mvista.com>
>
> ---
>
> Added "simple bus" per Scott Wood
>
> mrch/powerpc/platforms/85xx/pc85xx_cds.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
applied.
- k
^ permalink raw reply
* [PATCH] powerpc/86xx: Refactor pic init
From: Kumar Gala @ 2008-07-02 17:42 UTC (permalink / raw)
To: linuxppc-dev
Moved the pic initialization into its own common file and out of the board
code. Also fixed the OF reference counting on the mpic node.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
in my powerpc-next tree.
- k
arch/powerpc/platforms/86xx/Makefile | 1 +
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 26 +--------
arch/powerpc/platforms/86xx/mpc86xx.h | 3 +-
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 64 +----------------------
arch/powerpc/platforms/86xx/pic.c | 78 ++++++++++++++++++++++++++++
arch/powerpc/platforms/86xx/sbc8641d.c | 25 +---------
6 files changed, 86 insertions(+), 111 deletions(-)
create mode 100644 arch/powerpc/platforms/86xx/pic.c
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 1b9b4a9..8fee37d 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -2,6 +2,7 @@
# Makefile for the PowerPC 86xx linux kernel.
#
+obj-y := pic.o
obj-$(CONFIG_SMP) += mpc86xx_smp.o
obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
obj-$(CONFIG_SBC8641D) += sbc8641d.o
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index eb16208..3072530 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -39,6 +39,8 @@
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+#include "mpc86xx.h"
+
static unsigned char *pixis_bdcfg0, *pixis_arch;
static struct of_device_id __initdata mpc8610_ids[] = {
@@ -56,28 +58,6 @@ static int __init mpc8610_declare_of_platform_devices(void)
}
machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
-static void __init mpc86xx_hpcd_init_irq(void)
-{
- struct mpic *mpic1;
- struct device_node *np;
- struct resource res;
-
- /* Determine PIC address. */
- np = of_find_node_by_type(NULL, "open-pic");
- if (np == NULL)
- return;
- of_address_to_resource(np, 0, &res);
-
- /* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(np, res.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET |
- MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
- 0, 256, " MPIC ");
- BUG_ON(mpic1 == NULL);
-
- mpic_init(mpic1);
-}
-
#ifdef CONFIG_PCI
static void __devinit quirk_uli1575(struct pci_dev *dev)
{
@@ -405,7 +385,7 @@ define_machine(mpc86xx_hpcd) {
.name = "MPC86xx HPCD",
.probe = mpc86xx_hpcd_probe,
.setup_arch = mpc86xx_hpcd_setup_arch,
- .init_IRQ = mpc86xx_hpcd_init_irq,
+ .init_IRQ = mpc86xx_init_irq,
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
.time_init = mpc86xx_time_init,
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h
index 525ffa1..08efb57 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx.h
+++ b/arch/powerpc/platforms/86xx/mpc86xx.h
@@ -15,6 +15,7 @@
* mpc86xx_* files. Mostly for use by mpc86xx_setup().
*/
-extern void __init mpc86xx_smp_init(void);
+extern void mpc86xx_smp_init(void);
+extern void mpc86xx_init_irq(void);
#endif /* __MPC86XX_H__ */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index f13704a..7916599 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -28,7 +28,6 @@
#include <asm/prom.h>
#include <mm/mmu_decl.h>
#include <asm/udbg.h>
-#include <asm/i8259.h>
#include <asm/mpic.h>
@@ -46,67 +45,6 @@
#endif
#ifdef CONFIG_PCI
-static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
-{
- unsigned int cascade_irq = i8259_irq();
- if (cascade_irq != NO_IRQ)
- generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
-}
-#endif /* CONFIG_PCI */
-
-static void __init
-mpc86xx_hpcn_init_irq(void)
-{
- struct mpic *mpic1;
- struct device_node *np;
- struct resource res;
-#ifdef CONFIG_PCI
- struct device_node *cascade_node = NULL;
- int cascade_irq;
-#endif
-
- /* Determine PIC address. */
- np = of_find_node_by_type(NULL, "open-pic");
- if (np == NULL)
- return;
- of_address_to_resource(np, 0, &res);
-
- /* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(np, res.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 0, 256, " MPIC ");
- BUG_ON(mpic1 == NULL);
-
- mpic_init(mpic1);
-
-#ifdef CONFIG_PCI
- /* Initialize i8259 controller */
- for_each_node_by_type(np, "interrupt-controller")
- if (of_device_is_compatible(np, "chrp,iic")) {
- cascade_node = np;
- break;
- }
- if (cascade_node == NULL) {
- printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
- return;
- }
-
- cascade_irq = irq_of_parse_and_map(cascade_node, 0);
- if (cascade_irq == NO_IRQ) {
- printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
- return;
- }
- DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
-
- i8259_init(cascade_node, 0);
- of_node_put(cascade_node);
-
- set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
-#endif
-}
-
-#ifdef CONFIG_PCI
extern int uses_fsl_uli_m1575;
extern int uli_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn);
@@ -237,7 +175,7 @@ define_machine(mpc86xx_hpcn) {
.name = "MPC86xx HPCN",
.probe = mpc86xx_hpcn_probe,
.setup_arch = mpc86xx_hpcn_setup_arch,
- .init_IRQ = mpc86xx_hpcn_init_irq,
+ .init_IRQ = mpc86xx_init_irq,
.show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
new file mode 100644
index 0000000..8881c5d
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/mpic.h>
+#include <asm/i8259.h>
+
+#ifdef CONFIG_PPC_I8259
+static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ unsigned int cascade_irq = i8259_irq();
+ if (cascade_irq != NO_IRQ)
+ generic_handle_irq(cascade_irq);
+ desc->chip->eoi(irq);
+}
+#endif /* CONFIG_PPC_I8259 */
+
+void __init mpc86xx_init_irq(void)
+{
+ struct mpic *mpic;
+ struct device_node *np;
+ struct resource res;
+#ifdef CONFIG_PPC_I8259
+ struct device_node *cascade_node = NULL;
+ int cascade_irq;
+#endif
+
+ /* Determine PIC address. */
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (np == NULL)
+ return;
+ of_address_to_resource(np, 0, &res);
+
+ mpic = mpic_alloc(np, res.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET |
+ MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+ 0, 256, " MPIC ");
+ of_node_put(np);
+ BUG_ON(mpic == NULL);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_PPC_I8259
+ /* Initialize i8259 controller */
+ for_each_node_by_type(np, "interrupt-controller")
+ if (of_device_is_compatible(np, "chrp,iic")) {
+ cascade_node = np;
+ break;
+ }
+
+ if (cascade_node == NULL) {
+ printk(KERN_DEBUG "Could not find i8259 PIC\n");
+ return;
+ }
+
+ cascade_irq = irq_of_parse_and_map(cascade_node, 0);
+ if (cascade_irq == NO_IRQ) {
+ printk(KERN_ERR "Failed to map cascade interrupt\n");
+ return;
+ }
+
+ i8259_init(cascade_node, 0);
+ of_node_put(cascade_node);
+
+ set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
+#endif
+}
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index 510a06e..00e6fad 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -38,29 +38,6 @@
#include "mpc86xx.h"
static void __init
-sbc8641_init_irq(void)
-{
- struct mpic *mpic1;
- struct device_node *np;
- struct resource res;
-
- /* Determine PIC address. */
- np = of_find_node_by_type(NULL, "open-pic");
- if (np == NULL)
- return;
- of_address_to_resource(np, 0, &res);
-
- /* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(np, res.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 0, 256, " MPIC ");
- of_node_put(np);
- BUG_ON(mpic1 == NULL);
-
- mpic_init(mpic1);
-}
-
-static void __init
sbc8641_setup_arch(void)
{
#ifdef CONFIG_PCI
@@ -151,7 +128,7 @@ define_machine(sbc8641) {
.name = "SBC8641D",
.probe = sbc8641_probe,
.setup_arch = sbc8641_setup_arch,
- .init_IRQ = sbc8641_init_irq,
+ .init_IRQ = mpc86xx_init_irq,
.show_cpuinfo = sbc8641_show_cpuinfo,
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
--
1.5.5.1
^ permalink raw reply related
* Re: [PATCH 1/3] mpc83xx: Power Management support
From: Kumar Gala @ 2008-07-02 17:37 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <486BB6E3.1060602@freescale.com>
On Jul 2, 2008, at 12:12 PM, Scott Wood wrote:
> Kumar Gala wrote:
>>> +#define SS_MEMSAVE 0x00
>> What is this? add a comment?
>
> There's a comment where MEMSAVE is used:
>
> /* The first 2 words of memory are used to communicate with the
I read this as the memory address 0, 0x4. do you mean the first two
words of the save area?
>
> * bootloader, to tell it how to resume.
> *
> * The first word is the magic number 0xf5153ae5, and the
> second
> * is the pointer to mpc83xx_deep_resume.
> *
> * The original content of these two words is saved in the
> state
> * save area.
> */
>
> We could stick a /* First 8 bytes of RAM */ after the #define if you
> want.
ahh, might be useful to add SS_MEMSAVE into the comment.
- k
^ permalink raw reply
* Re: [PATCH]: [MPC5200] (v2) Add ATA DMA support
From: Grant Likely @ 2008-07-02 17:30 UTC (permalink / raw)
To: Tim Yamin; +Cc: linuxppc-dev
In-Reply-To: <792f5f410807020548m107cd6a5xf0360e07053e104c@mail.gmail.com>
On Wed, Jul 02, 2008 at 01:48:39PM +0100, Tim Yamin wrote:
> Hi Grant,
>
> Thanks for the feedback. New version is attached.
Your welcome. The patch is looking pretty good. Some more comments
below.
> > > -#define BCOM_IPR_ATA_RX 4
> > > -#define BCOM_IPR_ATA_TX 3
> > > +#define BCOM_IPR_ATA_RX 7
> > > +#define BCOM_IPR_ATA_TX 7
> >
> > Is this a bug fix? If so, please put it into a separate patch.
>
> I suppose so, yes. If Ethernet has higher priority than ATA, you can
> get a deadlock if you try and download a large file over a LAN to
> disk, for example. But given that nothing other than this patch uses
> BestComm for ATA do you have any specific reason to split it out into
> another patch?
I know that only ATA uses this; but it is nice to have fixes to things
that are obviously wrong in existing code to be split into their own
patches. That way, even if the ATA patch gets backed out, the bug fix
will remain.
> >> priv->ipb_period = 1000000000 / (ipb_freq / 1000);
> >> priv->ata_regs = ata_regs;
> >> + priv->ata_regs_pa = (struct mpc52xx_ata __iomem *) res_mem.start;
> >
> > I'm not fond of this. First off, it is *not* __iomem. It is physical
> > address. It would be better to use the offset_of macro to add an offset
> > to the physical base address. Doing it this way forces you to cast and
> > sidestep the compile time checks for incorrect dereferences.
>
> I'm afraid I'm not quite sure what you have in mind here, could you
> please provide a pointer?
See below comments
>
> Thanks,
>
> Tim
> This patch adds MDMA/UDMA support (using BestComm for DMA) on the MPC5200
> platform.
>
> Based heavily on previous work by Freescale (Bernard Kuhn, John Rigby)
> and Domen Puncer.
>
> Using a SanDisk Extreme IV CF card I get read speeds of approximately
> 26.70 MB/sec.
>
> The BestComm ATA task priority was changed to maximum in bestcomm_priv.h;
> this fixes a deadlock issue I was experiencing when heavy DMA was
> occuring on both the ATA and Ethernet BestComm tasks, e.g. when
> downloading a large file over a LAN to disk.
>
> There's also what I believe to be a hardware bug if you have high levels
> of BestComm ATA DMA activity along with heavy LocalPlus Bus activity;
> the address bus seems to sometimes get corrupted with ATA commands while
> the LocalPlus Bus operation is still active (i.e. Chip Select is asserted).
>
> I've asked Freescale about this but have not received a reply yet -- if
> anybody from Freescale has any ideas please contact me; I can supply some
> analyzer traces if needed. Therefore, for now, do not enable DMA if you
> need reliable LocalPlus Bus unless you do a fixup in your driver as
> follows:
>
> Locking example:
>
> while (test_and_set_bit(0, &pata_mpc52xx_ata_dma_lock) != 0)
> {
> struct bcom_task_2 *tsk = pata_mpc52xx_ata_dma_task;
>
> if(bcom_buffer_done_2(tsk))
> return 1;
> }
>
> return 0;
>
> (Save the return value to `flags`)
>
> Unlocking example:
>
> if(flags == 0)
> clear_bit(0, &pata_mpc52xx_ata_dma_lock);
>
> Comments and testing would of course be very welcome.
>
> Thanks,
>
> Signed-off-by: Tim Yamin <plasm@roo.me.uk>
>
> diff -urp linux-2.6.26-rc6/arch/powerpc/sysdev/bestcomm/ata.h linux-2.6.26-rc6-ata/arch/powerpc/sysdev/bestcomm/ata.h
> --- linux-2.6.26-rc6/arch/powerpc/sysdev/bestcomm/ata.h 2008-04-17 03:49:44.000000000 +0100
> +++ linux-2.6.26-rc6-ata/arch/powerpc/sysdev/bestcomm/ata.h 2008-07-02 12:48:14.000000000 +0100
> @@ -16,8 +16,8 @@
>
> struct bcom_ata_bd {
> u32 status;
> - u32 dst_pa;
> u32 src_pa;
> + u32 dst_pa;
> };
This also looks like an obvious bug fix. A separate patch would be nice
here.
>
> extern struct bcom_task *
> diff -urp linux-2.6.26-rc6/arch/powerpc/sysdev/bestcomm/bestcomm.c linux-2.6.26-rc6-ata/arch/powerpc/sysdev/bestcomm/bestcomm.c
> --- linux-2.6.26-rc6/arch/powerpc/sysdev/bestcomm/bestcomm.c 2008-04-17 03:49:44.000000000 +0100
> +++ linux-2.6.26-rc6-ata/arch/powerpc/sysdev/bestcomm/bestcomm.c 2008-07-02 12:48:14.000000000 +0100
> @@ -330,11 +330,16 @@ bcom_engine_init(void)
> /* Init 'always' initiator */
> out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
>
> + /* If ATA DMA is enabled, always turn prefetch off (it breaks things) */
> +#ifndef CONFIG_PATA_MPC52xx_DMA
> /* Disable COMM Bus Prefetch on the original 5200; it's broken */
> if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) {
> +#endif
> regval = in_be16(&bcom_eng->regs->PtdCntrl);
> out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
> +#ifndef CONFIG_PATA_MPC52xx_DMA
> }
> +#endif
>
> /* Init lock */
> spin_lock_init(&bcom_eng->lock);
> diff -urp linux-2.6.26-rc6/arch/powerpc/sysdev/bestcomm/bestcomm.h linux-2.6.26-rc6-ata/arch/powerpc/sysdev/bestcomm/bestcomm.h
> --- linux-2.6.26-rc6/arch/powerpc/sysdev/bestcomm/bestcomm.h 2008-04-17 03:49:44.000000000 +0100
> +++ linux-2.6.26-rc6-ata/arch/powerpc/sysdev/bestcomm/bestcomm.h 2008-07-02 12:48:14.000000000 +0100
> @@ -140,15 +140,29 @@ bcom_queue_full(struct bcom_task *tsk)
> }
>
> /**
> + * bcom_get_bd - Get a BD from the queue
> + * @tsk: The BestComm task structure
> + * index: Index of the BD to fetch
> + */
> +static inline struct bcom_bd
> +*bcom_get_bd(struct bcom_task *tsk, unsigned int index)
> +{
> + return ((void *) tsk->bd) + (index * tsk->bd_size);
Since the size of a bd is not a given, change the type of bcom_task.bd
from 'struct bcom_bd *' to simply 'void *'. That will eliminate the
need for this cast.
> +}
> +
> +/**
> * bcom_buffer_done - Checks if a BestComm
> * @tsk: The BestComm task structure
> */
> static inline int
> bcom_buffer_done(struct bcom_task *tsk)
> {
> + struct bcom_bd *bd;
> if (bcom_queue_empty(tsk))
> return 0;
> - return !(tsk->bd[tsk->outdex].status & BCOM_BD_READY);
> +
> + bd = bcom_get_bd(tsk, tsk->outdex);
> + return !(bd->status & BCOM_BD_READY);
> }
>
> /**
> @@ -160,16 +174,21 @@ bcom_buffer_done(struct bcom_task *tsk)
> static inline struct bcom_bd *
> bcom_prepare_next_buffer(struct bcom_task *tsk)
> {
> - tsk->bd[tsk->index].status = 0; /* cleanup last status */
> - return &tsk->bd[tsk->index];
> + struct bcom_bd *bd;
> +
> + bd = bcom_get_bd(tsk, tsk->index);
> + bd->status = 0; /* cleanup last status */
> + return bd;
> }
>
> static inline void
> bcom_submit_next_buffer(struct bcom_task *tsk, void *cookie)
> {
> + struct bcom_bd *bd = bcom_get_bd(tsk, tsk->index);
> +
> tsk->cookie[tsk->index] = cookie;
> mb(); /* ensure the bd is really up-to-date */
> - tsk->bd[tsk->index].status |= BCOM_BD_READY;
> + bd->status |= BCOM_BD_READY;
> tsk->index = _bcom_next_index(tsk);
> if (tsk->flags & BCOM_FLAGS_ENABLE_TASK)
> bcom_enable(tsk);
> @@ -179,10 +198,12 @@ static inline void *
> bcom_retrieve_buffer(struct bcom_task *tsk, u32 *p_status, struct bcom_bd **p_bd)
> {
> void *cookie = tsk->cookie[tsk->outdex];
> + struct bcom_bd *bd = bcom_get_bd(tsk, tsk->outdex);
> +
> if (p_status)
> - *p_status = tsk->bd[tsk->outdex].status;
> + *p_status = bd->status;
> if (p_bd)
> - *p_bd = &tsk->bd[tsk->outdex];
> + *p_bd = bd;
> tsk->outdex = _bcom_next_outdex(tsk);
> return cookie;
> }
The bestcomm changes are much better. Can you please split them
into a separate patch? The common bestcomm stuff is logically separate
from the ATA driver changes.
> diff -urp linux-2.6.26-rc6/drivers/ata/pata_mpc52xx.c linux-2.6.26-rc6-ata/drivers/ata/pata_mpc52xx.c
> --- linux-2.6.26-rc6/drivers/ata/pata_mpc52xx.c 2008-07-02 12:51:27.000000000 +0100
> +++ linux-2.6.26-rc6-ata/drivers/ata/pata_mpc52xx.c 2008-07-02 12:47:14.000000000 +0100
> @@ -6,6 +6,9 @@
> * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
> * Copyright (C) 2003 Mipsys - Benjamin Herrenschmidt
> *
> + * UDMA support based on patches by Freescale (Bernard Kuhn, John Rigby),
> + * Domen Puncer and Tim Yamin.
> + *
> * This file is licensed under the terms of the GNU General Public License
> * version 2. This program is licensed "as is" without any warranty of any
> * kind, whether express or implied.
> @@ -17,28 +20,47 @@
> #include <linux/delay.h>
> #include <linux/libata.h>
>
> +#include <asm/cacheflush.h>
> #include <asm/types.h>
> #include <asm/prom.h>
> #include <asm/of_platform.h>
> #include <asm/mpc52xx.h>
>
> +#include <sysdev/bestcomm/bestcomm.h>
> +#include <sysdev/bestcomm/bestcomm_priv.h>
> +#include <sysdev/bestcomm/ata.h>
>
> #define DRV_NAME "mpc52xx_ata"
> #define DRV_VERSION "0.1.2"
>
> -
> /* Private structures used by the driver */
> struct mpc52xx_ata_timings {
> u32 pio1;
> u32 pio2;
> + u32 mdma1;
> + u32 mdma2;
> + u32 udma1;
> + u32 udma2;
> + u32 udma3;
> + u32 udma4;
> + u32 udma5;
> + int using_udma;
> };
>
> struct mpc52xx_ata_priv {
> unsigned int ipb_period;
> struct mpc52xx_ata __iomem * ata_regs;
> + struct mpc52xx_ata *ata_regs_pa;
Change this to: 'phys_addr_t ata_regs_pa;'
> int ata_irq;
> struct mpc52xx_ata_timings timings[2];
> int csel;
> +
> + /* DMA */
> + struct bcom_task *dmatsk;
> + const struct udmaspec *udmaspec;
> + const struct mdmaspec *mdmaspec;
> + int mpc52xx_ata_dma_last_write;
> + int waiting_for_dma;
> };
>
>
> @@ -53,6 +75,95 @@ static const int ataspec_ta[5] = { 35
>
> #define CALC_CLKCYC(c,v) ((((v)+(c)-1)/(c)))
>
> +/* ======================================================================== */
> +
> +/* ATAPI-4 MDMA specs (in clocks) */
> +struct mdmaspec {
> + u32 t0M;
> + u32 td;
> + u32 th;
> + u32 tj;
> + u32 tkw;
> + u32 tm;
> + u32 tn;
> +};
> +
> +static const struct mdmaspec mdmaspec66[3] = {
> + { .t0M = 32, .td = 15, .th = 2, .tj = 2, .tkw = 15, .tm = 4, .tn = 1 },
> + { .t0M = 10, .td = 6, .th = 1, .tj = 1, .tkw = 4, .tm = 2, .tn = 1 },
> + { .t0M = 8, .td = 5, .th = 1, .tj = 1, .tkw = 2, .tm = 2, .tn = 1 },
> +};
> +
> +static const struct mdmaspec mdmaspec132[3] = {
> + { .t0M = 64, .td = 29, .th = 3, .tj = 3, .tkw = 29, .tm = 7, .tn = 2 },
> + { .t0M = 20, .td = 11, .th = 2, .tj = 1, .tkw = 7, .tm = 4, .tn = 1 },
> + { .t0M = 16, .td = 10, .th = 2, .tj = 1, .tkw = 4, .tm = 4, .tn = 1 },
> +};
> +
> +/* ATAPI-4 UDMA specs (in clocks) */
> +struct udmaspec {
> + u32 tcyc;
> + u32 t2cyc;
> + u32 tds;
> + u32 tdh;
> + u32 tdvs;
> + u32 tdvh;
> + u32 tfs;
> + u32 tli;
> + u32 tmli;
> + u32 taz;
> + u32 tzah;
> + u32 tenv;
> + u32 tsr;
> + u32 trfs;
> + u32 trp;
> + u32 tack;
> + u32 tss;
> +};
> +
> +static const struct udmaspec udmaspec66[6] = {
> + { .tcyc = 8, .t2cyc = 16, .tds = 1, .tdh = 1, .tdvs = 5, .tdvh = 1,
> + .tfs = 16, .tli = 10, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 3, .trfs = 5, .trp = 11, .tack = 2, .tss = 4 },
> + { .tcyc = 5, .t2cyc = 11, .tds = 1, .tdh = 1, .tdvs = 4, .tdvh = 1,
> + .tfs = 14, .tli = 10, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 2, .trfs = 5, .trp = 9, .tack = 2, .tss = 4 },
> + { .tcyc = 4, .t2cyc = 8, .tds = 1, .tdh = 1, .tdvs = 3, .tdvh = 1,
> + .tfs = 12, .tli = 10, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 2, .trfs = 4, .trp = 7, .tack = 2, .tss = 4 },
> + { .tcyc = 3, .t2cyc = 6, .tds = 1, .tdh = 1, .tdvs = 2, .tdvh = 1,
> + .tfs = 9, .tli = 7, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 2, .trfs = 4, .trp = 7, .tack = 2, .tss = 4 },
> + { .tcyc = 2, .t2cyc = 4, .tds = 1, .tdh = 1, .tdvs = 1, .tdvh = 1,
> + .tfs = 8, .tli = 8, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 2, .trfs = 4, .trp = 7, .tack = 2, .tss = 4 },
> + { .tcyc = 2, .t2cyc = 2, .tds = 1, .tdh = 1, .tdvs = 1, .tdvh = 1,
> + .tfs = 6, .tli = 5, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 2, .trfs = 4, .trp = 6, .tack = 2, .tss = 4 },
> +};
Yes, I think this is more robust. One (very minor) nit. Can you line up
the elements and put the closing brackets on the same line? Makes it a
look less like noise. for example:
+ { .tcyc = 8, .t2cyc = 16, .tds = 1, .tdh = 1, .tdvs = 5, .tdvh = 1,
+ .tfs = 16, .tli = 10, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
+ .tsr = 3, .trfs = 5, .trp = 11, .tack = 2, .tss = 4,
+ },
+ { .tcyc = 5, .t2cyc = 11, .tds = 1, .tdh = 1, .tdvs = 4, .tdvh = 1,
+ .tfs = 14, .tli = 10, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
+ .tsr = 2, .trfs = 5, .trp = 9, .tack = 2, .tss = 4,
+ },
> +
> +static const struct udmaspec udmaspec132[6] = {
> + { .tcyc = 15, .t2cyc = 31, .tds = 2, .tdh = 1, .tdvs = 10, .tdvh = 1,
> + .tfs = 30, .tli = 20, .tmli = 3, .taz = 2, .tzah = 3, .tenv = 3,
> + .tsr = 7, .trfs = 10, .trp = 22, .tack = 3, .tss = 7 },
> + { .tcyc = 10, .t2cyc = 21, .tds = 2, .tdh = 1, .tdvs = 7, .tdvh = 1,
> + .tfs = 27, .tli = 20, .tmli = 3, .taz = 2, .tzah = 3, .tenv = 3,
> + .tsr = 4, .trfs = 10, .trp = 17, .tack = 3, .tss = 7 },
> + { .tcyc = 6, .t2cyc = 12, .tds = 1, .tdh = 1, .tdvs = 5, .tdvh = 1,
> + .tfs = 23, .tli = 20, .tmli = 3, .taz = 2, .tzah = 3, .tenv = 3,
> + .tsr = 3, .trfs = 8, .trp = 14, .tack = 3, .tss = 7 },
> + { .tcyc = 7, .t2cyc = 12, .tds = 1, .tdh = 1, .tdvs = 3, .tdvh = 1,
> + .tfs = 15, .tli = 13, .tmli = 3, .taz = 2, .tzah = 3, .tenv = 3,
> + .tsr = 3, .trfs = 8, .trp = 14, .tack = 3, .tss = 7 },
> + { .tcyc = 2, .t2cyc = 5, .tds = 0, .tdh = 0, .tdvs = 1, .tdvh = 1,
> + .tfs = 16, .tli = 14, .tmli = 2, .taz = 1, .tzah = 2, .tenv = 2,
> + .tsr = 2, .trfs = 7, .trp = 13, .tack = 2, .tss = 6 },
> + { .tcyc = 3, .t2cyc = 6, .tds = 1, .tdh = 1, .tdvs = 1, .tdvh = 1,
> + .tfs = 12, .tli = 10, .tmli = 3, .taz = 2, .tzah = 3, .tenv = 3,
> + .tsr = 3, .trfs = 7, .trp = 12, .tack = 3, .tss = 7 },
> +};
> +
> +static int
> +mpc52xx_ata_compute_udma_timings(struct mpc52xx_ata_priv *priv, int dev, int speed)
> +{
> + struct mpc52xx_ata_timings *timing = &priv->timings[dev];
> + const struct udmaspec *s = &priv->udmaspec[speed];
> +
> + if (speed < 0 || speed > 2)
> + return -EINVAL;
> +
> + timing->udma1 = (s->t2cyc << 24) | (s->tcyc << 16) | (s->tds << 8) | (s->tdh);
> + timing->udma2 = (s->tdvs << 24) | (s->tdvh << 16) | (s->tfs << 8) | (s->tli);
> + timing->udma3 = (s->tmli << 24) | (s->taz << 16) | (s->tenv << 8) | (s->tsr);
> + timing->udma4 = (s->tss << 24) | (s->trfs << 16) | (s->trp << 8) | (s->tack);
> + timing->udma5 = (s->tzah << 24);
Nit; lines over 80 characters, but it's not a big deal. Do whatever you
think looks the nicest.
> + timing->using_udma = 1;
> +
> + return 0;
> +}
> +
> static void
> mpc52xx_ata_apply_timings(struct mpc52xx_ata_priv *priv, int device)
> {
> @@ -173,14 +313,13 @@ mpc52xx_ata_apply_timings(struct mpc52xx
>
> out_be32(®s->pio1, timing->pio1);
> out_be32(®s->pio2, timing->pio2);
> - out_be32(®s->mdma1, 0);
> - out_be32(®s->mdma2, 0);
> - out_be32(®s->udma1, 0);
> - out_be32(®s->udma2, 0);
> - out_be32(®s->udma3, 0);
> - out_be32(®s->udma4, 0);
> - out_be32(®s->udma5, 0);
> -
> + out_be32(®s->mdma1, timing->mdma1);
> + out_be32(®s->mdma2, timing->mdma2);
> + out_be32(®s->udma1, timing->udma1);
> + out_be32(®s->udma2, timing->udma2);
> + out_be32(®s->udma3, timing->udma3);
> + out_be32(®s->udma4, timing->udma4);
> + out_be32(®s->udma5, timing->udma5);
> priv->csel = device;
> }
>
> @@ -245,6 +384,29 @@ mpc52xx_ata_set_piomode(struct ata_port
> mpc52xx_ata_apply_timings(priv, adev->devno);
> }
> static void
> +mpc52xx_ata_set_dmamode(struct ata_port *ap, struct ata_device *adev)
> +{
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + int rv;
> +
> + if (adev->dma_mode >= XFER_UDMA_0) {
> + int dma = adev->dma_mode - XFER_UDMA_0;
> + rv = mpc52xx_ata_compute_udma_timings(priv, adev->devno, dma);
> + } else {
> + int dma = adev->dma_mode - XFER_MW_DMA_0;
> + rv = mpc52xx_ata_compute_mdma_timings(priv, adev->devno, dma);
> + }
> +
> + if (rv) {
> + printk(KERN_ERR DRV_NAME
> + ": Trying to select invalid DMA mode %d\n",
> + adev->dma_mode);
> + return;
> + }
> +
> + mpc52xx_ata_apply_timings(priv, adev->devno);
> +}
> +static void
> mpc52xx_ata_dev_select(struct ata_port *ap, unsigned int device)
> {
> struct mpc52xx_ata_priv *priv = ap->host->private_data;
> @@ -255,16 +416,190 @@ mpc52xx_ata_dev_select(struct ata_port *
> ata_sff_dev_select(ap,device);
> }
>
> +static int
> +mpc52xx_ata_build_dmatable(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + struct mpc52xx_ata *regs_pa = priv->ata_regs_pa;
> + unsigned int read = !(qc->tf.flags & ATA_TFLAG_WRITE), si;
> + struct scatterlist *sg;
> + int count = 0;
> +
> + if (read)
> + bcom_ata_rx_prepare(priv->dmatsk);
> + else
> + bcom_ata_tx_prepare(priv->dmatsk);
> +
> + for_each_sg(qc->sg, sg, qc->n_elem, si) {
> + dma_addr_t cur_addr = sg_dma_address(sg);
> + u32 cur_len = sg_dma_len(sg);
> +
> + while (cur_len) {
> + unsigned int tc = min(cur_len, MAX_DMA_BUFFER_SIZE);
> + struct bcom_ata_bd *bd = (struct bcom_ata_bd *) bcom_prepare_next_buffer(priv->dmatsk);
> +
> + if (read) {
> + bd->status = tc;
> + bd->src_pa = (__force u32) ®s_pa->fifo_data;
> + bd->dst_pa = (__force u32) cur_addr;
> + } else {
> + bd->status = tc;
> + bd->src_pa = (__force u32) cur_addr;
> + bd->dst_pa = (__force u32) ®s_pa->fifo_data;
These are the ugly casts of physical addresses stored in __iomem
pointers and then cast back into u32. ata_regs_pa should be phys_addr_t
and ®s_pa->fifo_data should be changed to:
ata_regs_pa + offsetof(struct mpc52xx_ata, fifo_data);
Truth be told; I'm not at all fond of using a structure to define
register offsets, but that is not a comment on this patch. All the
5200 code is already written that way, so it is better to be consistent.
> + }
> +
> + bcom_submit_next_buffer(priv->dmatsk, NULL);
> +
> + cur_addr += tc;
> + cur_len -= tc;
> + count++;
> +
> + if (count > MAX_DMA_BUFFERS) {
> + printk(KERN_ALERT "%s: %i dma table"
> + "too small\n", __func__, __LINE__);
> + goto use_pio_instead;
> + }
> + }
> + }
> + return 1;
> +
> +use_pio_instead:
It is good practise to indent goto labels with 1 space (not tab). Doing
so means that diff will do the right thing on displaying the c function
name when a line changes after the label.
> + bcom_ata_reset_bd(priv->dmatsk);
> + return 0;
> +}
> +
> +static void
> +mpc52xx_bmdma_setup(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + struct mpc52xx_ata __iomem *regs = priv->ata_regs;
> +
> + unsigned int read = !(qc->tf.flags & ATA_TFLAG_WRITE);
> + u8 dma_mode;
> +
> + if (!mpc52xx_ata_build_dmatable(qc))
> + printk(KERN_ALERT "%s: %i, return 1?\n", __func__, __LINE__);
You should use the dev_alert() macros instead of printk(). Ditto through
the rest of the file. Look in include/linux/device.h for the full list.
> +
> + /* Check FIFO is OK... */
> + if(in_8(&priv->ata_regs->fifo_status) & MPC52xx_ATA_FIFOSTAT_ERROR)
> + printk(KERN_ALERT "%s: FIFO error detected: 0x%02x!\n",
> + __func__, in_8(&priv->ata_regs->fifo_status));
> +
> + if (read) {
> + dma_mode = MPC52xx_ATA_DMAMODE_IE | MPC52xx_ATA_DMAMODE_READ |
> + MPC52xx_ATA_DMAMODE_FE;
> +
> + /* Setup FIFO if direction changed */
> + if (priv->mpc52xx_ata_dma_last_write != 0) {
> + priv->mpc52xx_ata_dma_last_write = 0;
> +
> + /* Configure FIFO with granularity to 7 */
> + out_8(®s->fifo_control, 7);
> + out_be16(®s->fifo_alarm, 128);
> +
> + /* Set FIFO Reset bit (FR) */
> + out_8(®s->dma_mode, MPC52xx_ATA_DMAMODE_FR);
> + }
> + } else {
> + dma_mode = MPC52xx_ATA_DMAMODE_IE | MPC52xx_ATA_DMAMODE_WRITE;
> +
> + /* Setup FIFO if direction changed */
> + if (priv->mpc52xx_ata_dma_last_write != 1) {
> + priv->mpc52xx_ata_dma_last_write = 1;
> +
> + /* Configure FIFO with granularity to 4 */
> + out_8(®s->fifo_control, 4);
> + out_be16(®s->fifo_alarm, 128);
> + }
> + }
> +
> + if (priv->timings[qc->dev->devno].using_udma)
> + dma_mode |= MPC52xx_ATA_DMAMODE_UDMA;
> +
> + out_8(®s->dma_mode, dma_mode);
> + priv->waiting_for_dma = ATA_DMA_ACTIVE;
> +
> + ata_wait_idle(ap);
> + ap->ops->sff_exec_command(ap, &qc->tf);
> +}
> +
> +static void
> +mpc52xx_bmdma_start(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> +
> + /* LocalBus lock */
> + while (test_and_set_bit(0, &pata_mpc52xx_ata_dma_lock) != 0)
> + ;
Need to be able to bail on timeout.
> +
> + bcom_set_task_auto_start(priv->dmatsk->tasknum, priv->dmatsk->tasknum);
> + bcom_enable(priv->dmatsk);
> +}
> +
> +static void
> +mpc52xx_bmdma_stop(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> +
> + bcom_disable(priv->dmatsk);
> + bcom_ata_reset_bd(priv->dmatsk);
> +
> + /* LocalBus unlock*/
> + clear_bit(0, &pata_mpc52xx_ata_dma_lock);
> +
> + priv->waiting_for_dma = 0;
> +
> + /* Check FIFO is OK... */
> + if(in_8(&priv->ata_regs->fifo_status) & MPC52xx_ATA_FIFOSTAT_ERROR)
> + printk(KERN_ALERT "%s: FIFO error detected: 0x%02x!\n",
> + __func__, in_8(&priv->ata_regs->fifo_status));
> +}
> +
> +static u8
> +mpc52xx_bmdma_status(struct ata_port *ap)
> +{
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> +
> + /* Check FIFO is OK... */
> + if(in_8(&priv->ata_regs->fifo_status) & MPC52xx_ATA_FIFOSTAT_ERROR) {
> + printk(KERN_ALERT "%s: FIFO error detected: 0x%02x!\n",
> + __func__, in_8(&priv->ata_regs->fifo_status));
> + return priv->waiting_for_dma | ATA_DMA_ERR;
> + }
> +
> + return priv->waiting_for_dma;
> +}
> +
> +static irqreturn_t
> +mpc52xx_ata_task_irq(int irq, void *vpriv)
> +{
> + struct mpc52xx_ata_priv *priv = vpriv;
> + priv->waiting_for_dma |= ATA_DMA_INTR;
> +
> + return IRQ_HANDLED;
> +}
> +
> static struct scsi_host_template mpc52xx_ata_sht = {
> ATA_PIO_SHT(DRV_NAME),
> };
>
> static struct ata_port_operations mpc52xx_ata_port_ops = {
> .inherits = &ata_sff_port_ops,
> - .sff_dev_select = mpc52xx_ata_dev_select,
> - .cable_detect = ata_cable_40wire,
> +
> .set_piomode = mpc52xx_ata_set_piomode,
> - .post_internal_cmd = ATA_OP_NULL,
> + .set_dmamode = mpc52xx_ata_set_dmamode,
> + .sff_dev_select = mpc52xx_ata_dev_select,
> +
> + .bmdma_setup = mpc52xx_bmdma_setup,
> + .bmdma_start = mpc52xx_bmdma_start,
> + .bmdma_stop = mpc52xx_bmdma_stop,
> + .bmdma_status = mpc52xx_bmdma_status,
> +
> + .qc_prep = ata_noop_qc_prep,
> };
>
> static int __devinit
> @@ -281,9 +615,14 @@ mpc52xx_ata_init_one(struct device *dev,
>
> ap = host->ports[0];
> ap->flags |= ATA_FLAG_SLAVE_POSS;
> - ap->pio_mask = 0x1f; /* Up to PIO4 */
> - ap->mwdma_mask = 0x00; /* No MWDMA */
> - ap->udma_mask = 0x00; /* No UDMA */
> + ap->pio_mask = ATA_PIO4; /* Up to PIO4 */
> +#ifdef CONFIG_PATA_MPC52xx_DMA
> + ap->mwdma_mask = ATA_MWDMA2; /* Up to MWDMA2 */
> + ap->udma_mask = ATA_UDMA2; /* Up to UDMA2 */
> +#else
> + ap->mwdma_mask = 0x00; /* No MWDMA */
> + ap->udma_mask = 0x00; /* No UDMA */
> +#endif
ap->* values are already zeroed. You can drop the whole of the #else
side of this clause. (the old code didn't need to set them to zero).
> ap->ops = &mpc52xx_ata_port_ops;
> host->private_data = priv;
>
> @@ -333,7 +672,7 @@ mpc52xx_ata_probe(struct of_device *op,
> int ata_irq;
> struct mpc52xx_ata __iomem *ata_regs;
> struct mpc52xx_ata_priv *priv;
> - int rv;
> + int rv, ret, task_irq;
>
> /* Get ipb frequency */
> ipb_freq = mpc52xx_find_ipb_freq(op->node);
> @@ -389,8 +728,34 @@ mpc52xx_ata_probe(struct of_device *op,
>
> priv->ipb_period = 1000000000 / (ipb_freq / 1000);
> priv->ata_regs = ata_regs;
> + priv->ata_regs_pa = (struct mpc52xx_ata *) res_mem.start;
And this should simply be: priv->ata_regs_pa = res_mem.start;
> priv->ata_irq = ata_irq;
> priv->csel = -1;
> + priv->mpc52xx_ata_dma_last_write = -1;
> +
> + if (ipb_freq/1000000 == 66) {
> + priv->mdmaspec = mdmaspec66;
> + priv->udmaspec = udmaspec66;
> + } else {
> + priv->mdmaspec = mdmaspec132;
> + priv->udmaspec = udmaspec132;
> + }
> +
> + pata_mpc52xx_ata_dma_lock = 0;
> + priv->dmatsk = bcom_ata_init(MAX_DMA_BUFFERS, MAX_DMA_BUFFER_SIZE);
> + pata_mpc52xx_ata_dma_task = priv->dmatsk;
> + if (!priv->dmatsk) {
> + printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> + rv = -ENOMEM;
> + goto err;
> + }
> +
> + task_irq = bcom_get_task_irq(priv->dmatsk);
> + ret = request_irq(task_irq, &mpc52xx_ata_task_irq, IRQF_DISABLED,
> + "ATA task", priv);
> + if (ret)
> + printk(KERN_ALERT "%s: request_irq failed with: "
> + "%i\n", __func__, ret);
>
> /* Init the hw */
> rv = mpc52xx_ata_hw_init(priv);
^ permalink raw reply
* Re: patches for 2.6.27...
From: Dave Jiang @ 2008-07-02 17:25 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org list
In-Reply-To: <068935A1-11BE-4AEB-9C0E-E1AB53F1618E@kernel.crashing.org>
Kumar Gala wrote:
> Please point out any patches that have been posted but havent made it
> into a git tree related to Freescale chips.
>
> I know there are probably a slew of CPM patches that need to get into
> the tree.
>
> - k
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
Kumar can you put this one in please? Thanks!
http://patchwork.ozlabs.org/linuxppc/patch?q=Dave%20Jiang&id=19008
--
------------------------------------------------------
Dave Jiang
Software Engineer
MontaVista Software, Inc.
http://www.mvista.com
------------------------------------------------------
^ permalink raw reply
* Re: [PATCH 1/3] mpc83xx: Power Management support
From: Scott Wood @ 2008-07-02 17:12 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <7B906E0F-3149-43F0-815A-8314BF5BA039@kernel.crashing.org>
Kumar Gala wrote:
>> +#define SS_MEMSAVE 0x00
>
> What is this? add a comment?
There's a comment where MEMSAVE is used:
/* The first 2 words of memory are used to communicate with the
* bootloader, to tell it how to resume.
*
* The first word is the magic number 0xf5153ae5, and the second
* is the pointer to mpc83xx_deep_resume.
*
* The original content of these two words is saved in the state
* save area.
*/
We could stick a /* First 8 bytes of RAM */ after the #define if you want.
>> +#define SS_HID 0x08 /* 3 HIDs */
>> +#define SS_IABR 0x14 /* 2 IABRs */
>> +#define SS_IBCR 0x1c
>> +#define SS_DABR 0x20 /* 2 DABRs */
>> +#define SS_DBCR 0x28
>> +#define SS_SP 0x2c
>> +#define SS_SR 0x30 /* 16 segment registers */
>> +#define SS_CURRENT 0x70
>
> How about SS_R2 to match the pmac sleep.S code. It will make
> refactoring all this easier in the future.
OK.
-Scott
^ permalink raw reply
* Re: [PATCH 1/3] mpc83xx: Power Management support
From: Kumar Gala @ 2008-07-02 17:06 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080625215051.GA11784@loki.buserror.net>
> diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/
> powerpc/platforms/83xx/suspend-asm.S
> new file mode 100644
> index 0000000..03e29a2
> --- /dev/null
> +++ b/arch/powerpc/platforms/83xx/suspend-asm.S
> @@ -0,0 +1,539 @@
> +/*
> + * Enter and leave sleep state on MPC83xx
> + *
> + * Author: Scott Wood <scottwood@freescale.com>
> + *
> + * Copyright (c) 2006 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License version 2 as
> published
> + * by the Free Software Foundation.
> + */
> +
> +#include <asm/page.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/reg.h>
> +#include <asm/asm-offsets.h>
> +
> +#define SS_MEMSAVE 0x00
What is this? add a comment?
> +#define SS_HID 0x08 /* 3 HIDs */
> +#define SS_IABR 0x14 /* 2 IABRs */
> +#define SS_IBCR 0x1c
> +#define SS_DABR 0x20 /* 2 DABRs */
> +#define SS_DBCR 0x28
> +#define SS_SP 0x2c
> +#define SS_SR 0x30 /* 16 segment registers */
> +#define SS_CURRENT 0x70
How about SS_R2 to match the pmac sleep.S code. It will make
refactoring all this easier in the future.
> +#define SS_MSR 0x74
> +#define SS_SDR1 0x78
> +#define SS_LR 0x7c
> +#define SS_SPRG 0x80 /* 4 SPRGs */
> +#define SS_DBAT 0x90 /* 8 DBATs */
> +#define SS_IBAT 0xd0 /* 8 IBATs */
> +#define SS_TB 0x110
> +#define SS_CR 0x118
> +#define SS_GPREG 0x11c /* r12-r31 */
> +#define STATE_SAVE_SIZE 0x16c
- k
^ permalink raw reply
* Re: [PATCH 1/3] mpc83xx: Power Management support
From: Scott Wood @ 2008-07-02 16:38 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <AEE09588-1480-450B-BEDF-237E2D59D3D0@kernel.crashing.org>
Kumar Gala wrote:
> If we are going to allocate space for save area like this, can't we do
> this in C code. Its less error prone and easier to extend over time. I
> know the powermac code does something similar but it places the save
> area on the stack.
Then we'd have to split it between things that can be saved from C
versus things that can't (gpregs, cr, lr, etc), or mess around with
exposing struct offsets to asm code. I think it's just easier to do it
this way.
-Scott
^ permalink raw reply
* [PATCH] powerpc: implement GPIO LIB API on CPM1 Freescale SoC.
From: Jochen Friedrich @ 2008-07-02 16:18 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev list, Scott Wood
This patch implement GPIO LIB support for the CPM1 GPIOs.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
---
This patch depends on the GPIO LIB support for the CPM2 GPIOs patch
from Laurent Pinchart.
Changes since last submission:
- of_gc->gpio_cells = 2 to allow passing port options in the future.
- remove the artificial fsl,cpm1-pario-bank16 and fsl,cpm1-pario-bank32
compatible names as all ports havs slightly different register layouts.
arch/powerpc/platforms/8xx/Kconfig | 10 ++
arch/powerpc/sysdev/cpm1.c | 267 +++++++++++++++++++++++++++++++++++-
2 files changed, 272 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index 6fc849e..3488bb7 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -105,6 +105,16 @@ config 8xx_COPYBACK
If in doubt, say Y here.
+config 8xx_GPIO
+ bool "GPIO API Support"
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
+ help
+ Saying Y here will cause the ports on an MPC8xx processor to be used
+ with the GPIO API. If you say N here, the kernel needs less memory.
+
+ If in doubt, say Y here.
+
config 8xx_CPU6
bool "CPU6 Silicon Errata (860 Pre Rev. C)"
help
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 58292a0..8c37690 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -30,6 +30,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
+#include <linux/spinlock.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
@@ -42,6 +43,10 @@
#include <asm/fs_pd.h>
+#ifdef CONFIG_8xx_GPIO
+#include <linux/of_gpio.h>
+#endif
+
#define CPM_MAP_SIZE (0x4000)
cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */
@@ -290,20 +295,24 @@ struct cpm_ioport16 {
__be16 res[3];
};
-struct cpm_ioport32 {
- __be32 dir, par, sor;
+struct cpm_ioport32b {
+ __be32 dir, par, odr, dat;
+};
+
+struct cpm_ioport32e {
+ __be32 dir, par, sor, odr, dat;
};
static void cpm1_set_pin32(int port, int pin, int flags)
{
- struct cpm_ioport32 __iomem *iop;
+ struct cpm_ioport32e __iomem *iop;
pin = 1 << (31 - pin);
if (port == CPM_PORTB)
- iop = (struct cpm_ioport32 __iomem *)
+ iop = (struct cpm_ioport32e __iomem *)
&mpc8xx_immr->im_cpm.cp_pbdir;
else
- iop = (struct cpm_ioport32 __iomem *)
+ iop = (struct cpm_ioport32e __iomem *)
&mpc8xx_immr->im_cpm.cp_pedir;
if (flags & CPM_PIN_OUTPUT)
@@ -498,3 +507,251 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
return 0;
}
+
+/*
+ * GPIO LIB API implementation
+ */
+#ifdef CONFIG_8xx_GPIO
+
+struct cpm1_gpio16_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to clear/set bits safely */
+ u16 cpdata;
+};
+
+static inline struct cpm1_gpio16_chip *
+to_cpm1_gpio16_chip(struct of_mm_gpio_chip *mm_gc)
+{
+ return container_of(mm_gc, struct cpm1_gpio16_chip, mm_gc);
+}
+
+static void cpm1_gpio16_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+ struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+
+ cpm1_gc->cpdata = in_be16(&iop->dat);
+}
+
+static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ u16 pin_mask;
+
+ pin_mask = 1 << (15 - gpio);
+
+ return !!(in_be16(&iop->dat) & pin_mask);
+}
+
+static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ unsigned long flags;
+ u16 pin_mask = 1 << (15 - gpio);
+
+ spin_lock_irqsave(&cpm1_gc->lock, flags);
+
+ if (value)
+ cpm1_gc->cpdata |= pin_mask;
+ else
+ cpm1_gc->cpdata &= ~pin_mask;
+
+ out_be16(&iop->dat, cpm1_gc->cpdata);
+
+ spin_unlock_irqrestore(&cpm1_gc->lock, flags);
+}
+
+static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ u16 pin_mask;
+
+ pin_mask = 1 << (15 - gpio);
+
+ setbits16(&iop->dir, pin_mask);
+
+ cpm1_gpio16_set(gc, gpio, val);
+
+ return 0;
+}
+
+static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ u16 pin_mask;
+
+ pin_mask = 1 << (15 - gpio);
+
+ clrbits16(&iop->dir, pin_mask);
+
+ return 0;
+}
+
+int cpm1_gpiochip_add16(struct device_node *np)
+{
+ struct cpm1_gpio16_chip *cpm1_gc;
+ struct of_mm_gpio_chip *mm_gc;
+ struct of_gpio_chip *of_gc;
+ struct gpio_chip *gc;
+
+ cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
+ if (!cpm1_gc)
+ return -ENOMEM;
+
+ spin_lock_init(&cpm1_gc->lock);
+
+ mm_gc = &cpm1_gc->mm_gc;
+ of_gc = &mm_gc->of_gc;
+ gc = &of_gc->gc;
+
+ mm_gc->save_regs = cpm1_gpio16_save_regs;
+ of_gc->gpio_cells = 2;
+ gc->ngpio = 16;
+ gc->direction_input = cpm1_gpio16_dir_in;
+ gc->direction_output = cpm1_gpio16_dir_out;
+ gc->get = cpm1_gpio16_get;
+ gc->set = cpm1_gpio16_set;
+
+ return of_mm_gpiochip_add(np, mm_gc);
+}
+
+struct cpm1_gpio32_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to clear/set bits safely */
+ u32 cpdata;
+};
+
+static inline struct cpm1_gpio32_chip *
+to_cpm1_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+ return container_of(mm_gc, struct cpm1_gpio32_chip, mm_gc);
+}
+
+static void cpm1_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+ struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
+ struct cpm_ioport32b __iomem *iop = mm_gc->regs;
+
+ cpm1_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport32b __iomem *iop = mm_gc->regs;
+ u32 pin_mask;
+
+ pin_mask = 1 << (31 - gpio);
+
+ return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
+ struct cpm_ioport32b __iomem *iop = mm_gc->regs;
+ unsigned long flags;
+ u32 pin_mask = 1 << (31 - gpio);
+
+ spin_lock_irqsave(&cpm1_gc->lock, flags);
+
+ if (value)
+ cpm1_gc->cpdata |= pin_mask;
+ else
+ cpm1_gc->cpdata &= ~pin_mask;
+
+ out_be32(&iop->dat, cpm1_gc->cpdata);
+
+ spin_unlock_irqrestore(&cpm1_gc->lock, flags);
+}
+
+static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport32b __iomem *iop = mm_gc->regs;
+ u32 pin_mask;
+
+ pin_mask = 1 << (31 - gpio);
+
+ setbits32(&iop->dir, pin_mask);
+
+ cpm1_gpio32_set(gc, gpio, val);
+
+ return 0;
+}
+
+static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport32b __iomem *iop = mm_gc->regs;
+ u32 pin_mask;
+
+ pin_mask = 1 << (31 - gpio);
+
+ clrbits32(&iop->dir, pin_mask);
+
+ return 0;
+}
+
+int cpm1_gpiochip_add32(struct device_node *np)
+{
+ struct cpm1_gpio32_chip *cpm1_gc;
+ struct of_mm_gpio_chip *mm_gc;
+ struct of_gpio_chip *of_gc;
+ struct gpio_chip *gc;
+
+ cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
+ if (!cpm1_gc)
+ return -ENOMEM;
+
+ spin_lock_init(&cpm1_gc->lock);
+
+ mm_gc = &cpm1_gc->mm_gc;
+ of_gc = &mm_gc->of_gc;
+ gc = &of_gc->gc;
+
+ mm_gc->save_regs = cpm1_gpio32_save_regs;
+ of_gc->gpio_cells = 2;
+ gc->ngpio = 32;
+ gc->direction_input = cpm1_gpio32_dir_in;
+ gc->direction_output = cpm1_gpio32_dir_out;
+ gc->get = cpm1_gpio32_get;
+ gc->set = cpm1_gpio32_set;
+
+ return of_mm_gpiochip_add(np, mm_gc);
+}
+
+static int cpm_init_par_io(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-a")
+ cpm1_gpiochip_add16(np);
+
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-b")
+ cpm1_gpiochip_add32(np);
+
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-c")
+ cpm1_gpiochip_add16(np);
+
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-d")
+ cpm1_gpiochip_add16(np);
+
+ /* Port E uses CPM2 layout */
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank-e")
+ cpm2_gpiochip_add32(np);
+ return 0;
+}
+arch_initcall(cpm_init_par_io);
+
+#endif /* CONFIG_8xx_GPIO */
--
1.5.6
^ permalink raw reply related
* Re: [PATCH] powerpc: Add i2c pins to dts and board setup
From: Kumar Gala @ 2008-07-02 16:14 UTC (permalink / raw)
To: Jochen Friedrich; +Cc: Scott Wood, linuxppc-dev list, Paul Mackerras
In-Reply-To: <486BA775.8080703@scram.de>
On Jul 2, 2008, at 11:06 AM, Jochen Friedrich wrote:
> Initialize I2C pins on boards with CPM1/CPM2 controllers
> and document the i2c bus in booting-without-of.
>
> The boards don't have any I2C chips connected to the I2C
> bus, so unless some external chips are connected to the
> boards, this code is just an example of setting everything
> else up.
>
> Signed-off-by: Jochen Friedrich <jochen@scram.de>
> ---
> Documentation/powerpc/booting-without-of.txt | 42 +++++++++++++++++
> +++++++++
> arch/powerpc/boot/dts/mpc8272ads.dts | 11 +++++++
> arch/powerpc/boot/dts/mpc866ads.dts | 11 +++++++
> arch/powerpc/boot/dts/mpc885ads.dts | 11 +++++++
> arch/powerpc/platforms/82xx/mpc8272_ads.c | 4 ++
> arch/powerpc/platforms/8xx/mpc86xads_setup.c | 4 ++
> arch/powerpc/platforms/8xx/mpc885ads_setup.c | 3 ++
> 7 files changed, 86 insertions(+), 0 deletions(-)
applied.
- k
^ permalink raw reply
* Re: [PATCHv2] cpm_uart: Support uart_wait_until_sent()
From: Kumar Gala @ 2008-07-02 16:13 UTC (permalink / raw)
To: Laurent Pinchart; +Cc: linuxppc-dev, linux-serial
In-Reply-To: <200807021058.45619.laurentp@cse-semaphore.com>
On Jul 2, 2008, at 3:58 AM, Laurent Pinchart wrote:
> Set port->fifosize to the software FIFO size, and update the port
> timeout
> when the baud rate is modified. SCC ports have an optional 32 byte
> hardware
> FIFO which is currently not taken into account, as there is no
> documented way
> to check when the FIFO becomes empty.
>
> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> ---
> drivers/serial/cpm_uart/cpm_uart_core.c | 6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
applied.
- k
^ permalink raw reply
* [PATCH] powerpc: Add documentation for CPM GPIO banks to booting-without-of
From: Jochen Friedrich @ 2008-07-02 16:08 UTC (permalink / raw)
To: Kumar Gala; +Cc: Scott Wood, Paul Mackerras, linuxppc-dev list
Signed-off-by: Jochen Friedrich <jochen@scram.de>
---
Documentation/powerpc/booting-without-of.txt | 39 ++++++++++++++++++++++++++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 26d323f..5fe68ee 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2174,6 +2174,45 @@ platforms are moved over to use the flattened-device-tree model.
};
};
+ xi) GPIO
+
+ Every GPIO controller node must have #gpio-cells property defined,
+ this information will be used to translate gpio-specifiers.
+ On CPM1 devices, all ports are using slightly different register layouts.
+ Ports A, C and D are 16bit ports and Ports B and E are 32bit ports.
+ On CPM2 devices, all ports are 32bit ports and use a common register layout.
+
+ Properties:
+ - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
+ "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
+ "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
+ - #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional paramters (currently unused).
+ - gpio-controller : Marks the port as GPIO controller.
+
+ Example of three SOC GPIO banks defined as gpio-controller nodes:
+
+ CPM1_PIO_A: gpio-controller@950 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-a";
+ reg = <0x950 0x10>;
+ gpio-controller;
+ };
+
+ CPM1_PIO_B: gpio-controller@ab8 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-b";
+ reg = <0xab8 0x10>;
+ gpio-controller;
+ };
+
+ CPM1_PIO_E: gpio-controller@ac8 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-e";
+ reg = <0xac8 0x18>;
+ gpio-controller;
+ };
+
m) Chipselect/Local Bus
Properties:
--
1.5.6
^ permalink raw reply related
* Re: [alsa-devel] [PATCH 3/3] ALSA SoC: Add Texas Instruments TLV320AIC26 codec driver
From: Liam Girdwood @ 2008-07-02 16:08 UTC (permalink / raw)
To: Jon Smirl; +Cc: linuxppc-dev, alsa-devel, broonie, timur
In-Reply-To: <9e4733910807020652j59c9c742h965b4782667837f9@mail.gmail.com>
On Wed, 2008-07-02 at 09:52 -0400, Jon Smirl wrote:
>
> I've been using asoc-v2 so it may not be possible to make this arch
> independent in asoc-v1. Maybe try porting this to asoc-v2 and see if
> a bunch of the registration complexity disappears. Most of soc-of.c
> should be unnecessary.
>
> Liam, when is asoc-v2 going into mainline?
Hopefully over the next 2 merge windows. I'm about to start queueing
patches....
This also assumes Mark and I remain at our current work load levels.
Liam
^ permalink raw reply
* [PATCH] powerpc: Add i2c pins to dts and board setup
From: Jochen Friedrich @ 2008-07-02 16:06 UTC (permalink / raw)
To: Kumar Gala; +Cc: Scott Wood, linuxppc-dev list, Paul Mackerras
Initialize I2C pins on boards with CPM1/CPM2 controllers
and document the i2c bus in booting-without-of.
The boards don't have any I2C chips connected to the I2C
bus, so unless some external chips are connected to the
boards, this code is just an example of setting everything
else up.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
---
Documentation/powerpc/booting-without-of.txt | 42 ++++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8272ads.dts | 11 +++++++
arch/powerpc/boot/dts/mpc866ads.dts | 11 +++++++
arch/powerpc/boot/dts/mpc885ads.dts | 11 +++++++
arch/powerpc/platforms/82xx/mpc8272_ads.c | 4 ++
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 4 ++
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 3 ++
7 files changed, 86 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index d9dc996..26d323f 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2132,6 +2132,48 @@ platforms are moved over to use the flattened-device-tree model.
};
};
+ x) I2C
+
+ The I2C controller is expressed as a bus under the CPM node.
+
+ Properties:
+ - compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
+ - reg : On CPM2 devices, the second resource doesn't specify the I2C
+ Parameter RAM itself, but the I2C_BASE field of the CPM2 Parameter RAM
+ (typically 0x8afc 0x2).
+ - #address-cells : Should be one. The cell is the i2c device address with
+ the r/w bit set to zero.
+ - #size-cells : Should be zero.
+ - clock-frequency : Can be used to set the i2c clock frequency. If
+ unspecified, a default frequency of 60kHz is being used.
+ The following two properties are deprecated. They are only used by legacy
+ i2c drivers to find the bus to probe:
+ - linux,i2c-index : Can be used to hard code an i2c bus number. By default,
+ the bus number is dynamically assigned by the i2c core.
+ - linux,i2c-class : Can be used to override the i2c class. The class is used
+ by legacy i2c device drivers to find a bus in a specific context like
+ system management, video or sound. By default, I2C_CLASS_HWMON (1) is
+ being used. The definition of the classes can be found in
+ include/i2c/i2c.h
+
+ Example, based on mpc823:
+
+ i2c@860 {
+ compatible = "fsl,mpc823-i2c",
+ "fsl,cpm1-i2c";
+ reg = <0x860 0x20 0x3c80 0x30>;
+ interrupts = <16>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@68 {
+ compatible = "dallas,ds1307";
+ reg = <0x68>;
+ };
+ };
+
m) Chipselect/Local Bus
Properties:
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 46e2da3..d27f8a7 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -217,6 +217,17 @@
linux,network-index = <1>;
fsl,cpm-command = <0x16200300>;
};
+
+ i2c@11860 {
+ compatible = "fsl,mpc8272-i2c",
+ "fsl,cpm2-i2c";
+ reg = <0x11860 0x20 0x8afc 0x2>;
+ interrupts = <1 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-command = <0x29600000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
PIC: interrupt-controller@10c00 {
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 765e43c..bd70065 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -171,6 +171,17 @@
fsl,cpm-command = <0000>;
linux,network-index = <1>;
};
+
+ i2c@860 {
+ compatible = "fsl,mpc866-i2c",
+ "fsl,cpm1-i2c";
+ reg = <0x860 0x20 0x3c80 0x30>;
+ interrupts = <16>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 9895043..b123e9f 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -215,6 +215,17 @@
fsl,cpm-command = <0x80>;
linux,network-index = <2>;
};
+
+ i2c@860 {
+ compatible = "fsl,mpc885-i2c",
+ "fsl,cpm1-i2c";
+ reg = <0x860 0x20 0x3c80 0x30>;
+ interrupts = <16>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index 7d30187..8054c68 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -96,6 +96,10 @@ static struct cpm_pin mpc8272_ads_pins[] = {
{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* I2C */
+ {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
+ {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
};
static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index c028a5b..caaec29 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -65,6 +65,10 @@ static struct cpm_pin mpc866ads_pins[] = {
{CPM_PORTD, 13, CPM_PIN_OUTPUT},
{CPM_PORTD, 14, CPM_PIN_OUTPUT},
{CPM_PORTD, 15, CPM_PIN_OUTPUT},
+
+ /* I2C */
+ {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
+ {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
};
static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 6e7ded0..45ed6cd 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -158,6 +158,9 @@ static struct cpm_pin mpc885ads_pins[] = {
{CPM_PORTE, 28, CPM_PIN_OUTPUT},
{CPM_PORTE, 29, CPM_PIN_OUTPUT},
#endif
+ /* I2C */
+ {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
+ {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
};
static void __init init_ioports(void)
--
1.5.6
^ permalink raw reply related
* Re: [alsa-devel] [PATCH 1/3] ALSA SoC: Add OpenFirmware helper for matching bus and codec drivers
From: Liam Girdwood @ 2008-07-02 15:57 UTC (permalink / raw)
To: Grant Likely; +Cc: Takashi Iwai, linuxppc-dev, alsa-devel, broonie, timur
In-Reply-To: <20080702154804.GA23011@secretlab.ca>
On Wed, 2008-07-02 at 09:48 -0600, Grant Likely wrote:
> On Wed, Jul 02, 2008 at 11:50:43AM +0200, Takashi Iwai wrote:
> >
> > This is a helper module and not necessarily manually selectable.
> > Better to make the other driver selecting this.
>
> Yes, you're right. I hadn't put too much thought into the Kconfig stuff
> for this patch because, at the moment, I'm viewing this as a temporary
> solution until ASoCv2 is merged.
>
> Which raises another question: Liam and Mark, what is your opinion on
> merging this driver? Is it something that you would merge with the v1
> API and then rework it when v2 is merged? Or would you rather it be
> kept out until v2 is ready? I haven't even looked at the v2 API yet, so
> I don't know how much rework is involved.
>
I'm happy with this atm for v1. We can then rework for V2.
Liam
^ permalink raw reply
* Re: [PATCH 1/3] mpc83xx: Power Management support
From: Kumar Gala @ 2008-07-02 16:03 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080625215051.GA11784@loki.buserror.net>
> diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/
> powerpc/platforms/83xx/suspend-asm.S
> new file mode 100644
> index 0000000..03e29a2
> --- /dev/null
> +++ b/arch/powerpc/platforms/83xx/suspend-asm.S
> @@ -0,0 +1,539 @@
> +/*
> + * Enter and leave sleep state on MPC83xx
> + *
> + * Author: Scott Wood <scottwood@freescale.com>
> + *
> + * Copyright (c) 2006 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License version 2 as
> published
> + * by the Free Software Foundation.
> + */
> +
> +#include <asm/page.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/reg.h>
> +#include <asm/asm-offsets.h>
> +
> +#define SS_MEMSAVE 0x00
> +#define SS_HID 0x08 /* 3 HIDs */
> +#define SS_IABR 0x14 /* 2 IABRs */
> +#define SS_IBCR 0x1c
> +#define SS_DABR 0x20 /* 2 DABRs */
> +#define SS_DBCR 0x28
> +#define SS_SP 0x2c
> +#define SS_SR 0x30 /* 16 segment registers */
> +#define SS_CURRENT 0x70
> +#define SS_MSR 0x74
> +#define SS_SDR1 0x78
> +#define SS_LR 0x7c
> +#define SS_SPRG 0x80 /* 4 SPRGs */
> +#define SS_DBAT 0x90 /* 8 DBATs */
> +#define SS_IBAT 0xd0 /* 8 IBATs */
> +#define SS_TB 0x110
> +#define SS_CR 0x118
> +#define SS_GPREG 0x11c /* r12-r31 */
> +#define STATE_SAVE_SIZE 0x16c
> +
> + .section .data
> + .align 5
> +
> +mpc83xx_sleep_save_area:
> + .space STATE_SAVE_SIZE
> +immrbase:
> + .long 0
If we are going to allocate space for save area like this, can't we do
this in C code. Its less error prone and easier to extend over time.
I know the powermac code does something similar but it places the save
area on the stack.
It also seems like the core register save/restore should be shared
between 83xx and 5{1,2}xx but that would be a longer term goal.
- k
^ permalink raw reply
* [PATCH] powerpc: fix section numbering of CPM chapter in booting-without-of.
From: Jochen Friedrich @ 2008-07-02 16:02 UTC (permalink / raw)
To: Kumar Gala; +Cc: Scott Wood, linuxppc-dev list, Paul Mackerras
Within the Freescale Communications Processor Module chapter, both
Serial and Network have the same section number iii). Renumber the
sections to make them unique again.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
---
Documentation/powerpc/booting-without-of.txt | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 1d2a772..d9dc996 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1992,7 +1992,7 @@ platforms are moved over to use the flattened-device-tree model.
fsl,cpm-command = <00800000>;
};
- iii) Network
+ iv) Network
Currently defined compatibles:
- fsl,cpm1-scc-enet
@@ -2015,7 +2015,7 @@ platforms are moved over to use the flattened-device-tree model.
fsl,cpm-command = <12000300>;
};
- iv) MDIO
+ v) MDIO
Currently defined compatibles:
fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
@@ -2039,7 +2039,7 @@ platforms are moved over to use the flattened-device-tree model.
fsl,mdc-pin = <13>;
};
- v) Baud Rate Generators
+ vi) Baud Rate Generators
Currently defined compatibles:
fsl,cpm-brg
@@ -2062,7 +2062,7 @@ platforms are moved over to use the flattened-device-tree model.
clock-frequency = <d#25000000>;
};
- vi) Interrupt Controllers
+ vii) Interrupt Controllers
Currently defined compatibles:
- fsl,cpm1-pic
@@ -2082,7 +2082,7 @@ platforms are moved over to use the flattened-device-tree model.
compatible = "mpc8272-pic", "fsl,cpm2-pic";
};
- vii) USB (Universal Serial Bus Controller)
+ viii) USB (Universal Serial Bus Controller)
Properties:
- compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
@@ -2098,7 +2098,7 @@ platforms are moved over to use the flattened-device-tree model.
fsl,cpm-command = <2e600000>;
};
- viii) Multi-User RAM (MURAM)
+ ix) Multi-User RAM (MURAM)
The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
--
1.5.6
^ permalink raw reply related
* Re: patches for 2.6.27...
From: Kim Phillips @ 2008-07-02 15:59 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org list
In-Reply-To: <068935A1-11BE-4AEB-9C0E-E1AB53F1618E@kernel.crashing.org>
On Wed, 2 Jul 2008 02:56:16 -0500
Kumar Gala <galak@kernel.crashing.org> wrote:
> Please point out any patches that have been posted but havent made it
> into a git tree related to Freescale chips.
I haven't heard back from Segher, so:
http://patchwork.ozlabs.org/linuxppc/patch?id=19313
Kim
^ permalink raw reply
* Re: [PATCH] powerpc: fixup lwsync at runtime
From: Kumar Gala @ 2008-07-02 15:57 UTC (permalink / raw)
To: michael; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1214991248.7436.5.camel@localhost>
On Jul 2, 2008, at 4:34 AM, Michael Ellerman wrote:
> On Tue, 2008-07-01 at 09:48 -0500, Kumar Gala wrote:
>> On Jul 1, 2008, at 1:29 AM, Michael Ellerman wrote:
>
>>>> diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/
>>>> setup_32.c
>>>> index 9e83add..0109e7f 100644
>>>> --- a/arch/powerpc/kernel/setup_32.c
>>>> +++ b/arch/powerpc/kernel/setup_32.c
>>>> @@ -101,6 +101,10 @@ unsigned long __init early_init(unsigned long
>>>> dt_ptr)
>>>> PTRRELOC(&__start___ftr_fixup),
>>>> PTRRELOC(&__stop___ftr_fixup));
>>>>
>>>> + do_lwsync_fixups(spec->cpu_features,
>>>> + PTRRELOC(&__start___lwsync_fixup),
>>>> + PTRRELOC(&__stop___lwsync_fixup));
>>>> +
>>>
>>> This could be changed to use cur_cpu_spec->cpu_features, and then
>>> all
>>> the call sites would be passing that, which would mean
>>> do_lwsync_fixups() could just check cur_cpu_spec->cpu_features
>>> directly.
>>
>> cur_cpu_spec and spec at this point arent the same thing.
>
> Aren't they? I must be missing something:
There is an issue with how ppc32 classic gets here and relocation. If
I change the call to:
do_lwsync_fixups(cur_cpu_spec->cpu_features,
PTRRELOC(&__start___lwsync_fixup),
PTRRELOC(&__stop___lwsync_fixup));
I can't boot on a 6xx based machine anymore.
- k
^ permalink raw reply
* Re: [alsa-devel] [PATCH 1/3] ALSA SoC: Add OpenFirmware helper for matching bus and codec drivers
From: Grant Likely @ 2008-07-02 15:48 UTC (permalink / raw)
To: Takashi Iwai; +Cc: liam.girdwood, alsa-devel, broonie, timur, linuxppc-dev
In-Reply-To: <s5hiqvod37w.wl%tiwai@suse.de>
On Wed, Jul 02, 2008 at 11:50:43AM +0200, Takashi Iwai wrote:
> At Tue, 01 Jul 2008 17:53:30 -0600,
> Grant Likely wrote:
> > diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
> > index 18f28ac..c5736e5 100644
> > --- a/sound/soc/Kconfig
> > +++ b/sound/soc/Kconfig
> > @@ -23,6 +23,12 @@ config SND_SOC
> > This ASoC audio support can also be built as a module. If so, the module
> > will be called snd-soc-core.
> >
> > +config SND_SOC_OF
> > + tristate "OF helpers for SoC audio support"
> > + depends on SND_SOC
> > + ---help---
> > + Add support for OpenFirmware device tree descriptions of sound device
> > +
>
> This is a helper module and not necessarily manually selectable.
> Better to make the other driver selecting this.
Yes, you're right. I hadn't put too much thought into the Kconfig stuff
for this patch because, at the moment, I'm viewing this as a temporary
solution until ASoCv2 is merged.
Which raises another question: Liam and Mark, what is your opinion on
merging this driver? Is it something that you would merge with the v1
API and then rework it when v2 is merged? Or would you rather it be
kept out until v2 is ready? I haven't even looked at the v2 API yet, so
I don't know how much rework is involved.
Cheers,
g.
^ permalink raw reply
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