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* Re: Linux on ML403 serial console problem
From: John Bonesio @ 2008-07-03 21:43 UTC (permalink / raw)
  To: Anand Kumar S; +Cc: linuxppc-embedded
In-Reply-To: <66E8AEE9980BB44CA5FCAD39EBA56AC604A5F1DF@CHN-HCLT-EVS02.HCLT.CORP.HCL.IN>

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Hi,

I don't have a clear idea about this, but it seems to me that there's
probably something in your root filesystem that is causing output to be
directed to a different console that the serial console. Maybe it's
using the wrong getty program.

- John

On Thu, 2008-07-03 at 15:42 +0530, Anand Kumar S wrote:
> Hi,
> 
>  
> 
> I am using MVL 4.0.1 to boot on ML403 board. I have created the
> xparameters.h file using EDK 10.1 and I was able to boot the kernel
> with 32 MB of memory and UART set as std 16550 uart.
> 
> Since this board came without sysace flash card I am using ramdisk
> technique to boot linux. I created a small ramdisk with my test
> program which sleeps for 10 seconds and prints a hello
> 
> world using printf. I modified kernel init/main.c to execute /bin/test
> (my test program) from the RAMDISK. I created the ramdisk and appended
> with zImage using make zImage.initrd command
> 
>  
> 
> I used dow method from xmd to download the zImage.initrd.elf on the
> board and I was able to boot the board till the point of executing
> my /bin/test. However I see that the print statements
> 
> from my test program are not coming on the serial port. I see that the
> printf calls tty_io write and it goes to uart_write routine in
> serial_core.c, however I am not able to see my prints on
> 
> the hyperterminal. I can see all the kernel printks except for this
> printf statement from my user program. Also all the kernel printks
> seem to call serial_8250_console write routine but the
>
> user application seems to call the uart_write routine. Does someone
> have any idea about what might be going wrong here? Is it something to
> do with serial console settings ?
> 
>  
> 
> Any help is greatly appreciated as I am really struggling with this
> problem for the past 3 days. Given below is the output from serial
> port. I do not have FB support or VT or VT console
> 
> Support enabled. Only SERIAL console support is enabled i.e
> SERIAL_CORE_CONSOLE/SERIAL_8250_CONSOLE support is enabled
> 
>  
> 
> …..
> 
> …..
> 
> Serial: 8250/16550 driver $Revision: 1.90 $ 5 ports, IRQ sharing
> disabled
> 
> Registering platform device 'serial8250'. Parent at platform
> 
> ttyS0 at MMIO 0x0 (irq = 9) is a 16550A
> 
> io scheduler noop registered
> 
> io scheduler anticipatory registered
> 
> io scheduler deadline registered
> 
> io scheduler cfq registered
> 
> RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
> 
> loop: loaded (max 8 devices)
> 
> PPP generic driver version 2.4.2
> 
> PPP Deflate Compression module registered
> 
> NET: Registered protocol family 24
> 
> xemac 0: using fifo mode.
> 
> eth0: Xilinx EMAC #0 at 81000000 mapped to 0xC30C0000, irq=0
> 
> i2c /dev entries driver
> 
> xilinx_iic.0 #0 at 0x81600000 mapped to 0xC30E0000, irq=6
> 
> mice: PS/2 mouse device common for all mice
> 
> NET: Registered protocol family 2
> 
> IP: routing cache hash table of 512 buckets, 4Kbytes
> 
> TCP: Hash tables configured (established 2048 bind 4096)
> 
> NET: Registered protocol family 1
> 
> NET: Registered protocol family 17
> 
> interrupts enabled 
> 
> TX interrupts enabled. register baseaddr c30c0000 offset 7fc is 8 
> 
> TX interrupts enabled. register baseaddr c30c0000 offset ffc is 0 
> 
> RX interrupts enabled. register baseaddr c30c0000 offset 17fc is 9 
> 
> RX interrupts enabled. register baseaddr c30c0000 offset 1ffc is 0 
> 
> GIER interrupts enabled. register baseaddr c30c0000 offset 7f8 is
> 80000000 
> 
> Sending DHCP requests .,... OK
> 
> IP-Config: Got DHCP answer from 0.0.0.0, my address is 10.100.12.132
> 
> IP-Config: Complete:
> 
>       device=eth0, addr=10.100.12.132, mask=255.255.255.0,
> gw=10.100.12.1,
> 
>      host=10.100.12.132, domain=hclt.corp.hcl.in, nis-domain=(none),
> 
>      bootserver=0.0.0.0, rootserver=0.0.0.0, rootpath=
> 
> RAMDISK: Compressed image found at block 0
> 
> VFS: Mounted root (ext2 filesystem).
> 
> Freeing unused kernel memory: 124k init
> 
> done freeing memory. creating console 
> 
> console created 
> 
> running process /bin/test 
> 
> in tty_write
> 
> before calling write. buf contents h e l
> 
> core write
> 
> core write
> 
> core write
> 
> Kernel panic - not syncing: Attempted to kill init!
> 
>  <0>Rebooting in 180 seconds..<NULL>
> 
>  
> 
> 
> 
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________________________________________________________________________

John Bonesio
Commercial Linux Solutions
john.bonesio@xilinx.com
(408) 879-5569


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* Re: Full Linux distributions
From: Brian Silverman @ 2008-07-03 20:12 UTC (permalink / raw)
  To: Leon Woestenberg; +Cc: linuxppc-embedded
In-Reply-To: <c384c5ea0807031303i1ddf7663na80928fd77d40be5@mail.gmail.com>

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Thanks for your response...

Leon Woestenberg wrote:
>
>>   - is binary compatible with the PPC405. 440, and Freescale 85xx cores.
>>
>>     
> binary compatible? You mean it can build binaries for those cores?
>   
What I meant (but said poorly) was that it has pre-compiled binaries.  
But its fine if I can build it under cygwin.  And I am thinking that I 
may drop the cygwin requirement, because its painful to do linux builds 
under it.
>   
> My preference is to use OpenEmbedded and do so under a Linux host
> system (any will do).
> As I don't want to be tied to a certain host OS, Emdebian or
> Gentoo-Embedded are no-go for me.
>
> I have used tools and rootfs systems like crosstool, buildroot, LFS before.
>
> There is also LTIB by Freescale, tried that?
>   
I need to look closer at LITB - but I was guessing it didn't have PPC4xx 
support.

Thanks!

-- 
Brian Silverman
Concept X, LLC


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* Re: Full Linux distributions
From: Leon Woestenberg @ 2008-07-03 20:03 UTC (permalink / raw)
  To: Brian Silverman; +Cc: linuxppc-embedded
In-Reply-To: <486D27B9.8090308@conceptxdesign.com>

Hello Brian,

On Thu, Jul 3, 2008 at 9:25 PM, Brian Silverman
<bsilverman@conceptxdesign.com> wrote:
> I'm looking for advice into what Linux distributions (rootfs) people are
> using for the PowerPC.
>
> Specifically, I'm currently using busybox for my core rootfs, but I'm
>
buildroot I guess, not busybox (alone).

> looking for an alternative that will allow me to:
>   - easily add new packages

>   - is binary compatible with the PPC405. 440, and Freescale 85xx cores.
>
binary compatible? You mean it can build binaries for those cores?

>   - can be large (compared to the usual embedded devices), say in the 100MB
> to 1GB range.  It will sit on an SD card.
>   - Can be built/maintained under cygwin, and can generate a ext2 image
> (e.g. with gen2extfs)
>
>   3) OpenEmbedded (doesn't seem to currently support cygwin)
>
My preference is to use OpenEmbedded and do so under a Linux host
system (any will do).
As I don't want to be tied to a certain host OS, Emdebian or
Gentoo-Embedded are no-go for me.

I have used tools and rootfs systems like crosstool, buildroot, LFS before.

There is also LTIB by Freescale, tried that?

Regards,
-- 
Leon

^ permalink raw reply

* Re: Support for low power mode for powerpc processors
From: prodyut hazarika @ 2008-07-03 19:52 UTC (permalink / raw)
  To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20080703151646.511ce9b6@zod.rchland.ibm.com>

But a lot of SoC like 440GT/EX support two modes of power save -
- Cut off power to other cores like PCIExpress/USB/MAC/UART etc
- Lower the CPU frequency

Is it possible to scale down CPU freq or cut off power to unused cores
while the CPU is idle? The ideal way would be that the SoC registers a
set of handlers to the Kernel that can power off/up the SoC components
or reduce/restore CPU frequency. Does any such framework exist for
PowerPC processors, because most PowerPC based SoC (FreeScale/AMCC
etc) support the above two modes of power save.

On 7/3/08, Josh Boyer <jwboyer@linux.vnet.ibm.com> wrote:
> On Thu, 3 Jul 2008 11:54:33 -0700
> "prodyut hazarika" <prodyuth@gmail.com> wrote:
>
> > Hi all,
> > I would like to know whether Linux on PowerPC puts the processor on
> > low power mode during idle state. Most PowerPC processors support a
> > low power mode. I am looking to add support for low-power mode in
> > Linux for AMCC 4xx processors.
> >
> > My questions are the following:
> > 1) Is tickless kernel integrated into the PowerPC tree?
> > 2) Does Linux kernel puts the processor in low power mode if cpu is
> > idle, and takes it out of that state on wakeup (triggered by
> > interrupt/WOL etc)?
> >
> > Any suggestions/comments would be welcome.
>
> The 4xx cores themselves are designed to have power savings without
> explicit software management.  The only sort of "NAP/DOZE" possible
> from software on them is to use the Wait Enable state in the idle loop
> to stall the CPU pipelines and wait for an exception.  This is already
> done in more recent kernels, and it doesn't particularly save a lot of
> power as the clocks and other logic are still all active.
>
> Some chips may have an external clock and power management ASIC that
> can be leverage but it will be SoC specific.  You could start there for
> a particular board.
>
> josh
>

^ permalink raw reply

* Full Linux distributions
From: Brian Silverman @ 2008-07-03 19:25 UTC (permalink / raw)
  To: linuxppc-embedded

I'm looking for advice into what Linux distributions (rootfs) people are 
using for the PowerPC.

Specifically, I'm currently using busybox for my core rootfs, but I'm 
looking for an alternative that will allow me to:
    - easily add new packages
    - is binary compatible with the PPC405. 440, and Freescale 85xx cores.
    - can be large (compared to the usual embedded devices), say in the 
100MB to 1GB range.  It will sit on an SD card.
    - Can be built/maintained under cygwin, and can generate a ext2 
image (e.g. with gen2extfs)

I've been looking at:
    1) rolling my own
    2) Mainstream distributions (e.g. Debian/Ubuntu have lingering 
support from PowerBook days; Gentoo seems like a possibility)
    3) OpenEmbedded (doesn't seem to currently support cygwin)

Anybody have any preferences based on what they've used?

-- 
Brian Silverman
Concept X, LLC

^ permalink raw reply

* Resend: [patch 4/5] powerpc: Add Strong Access Ordering
From: Dave Kleikamp @ 2008-07-03 19:37 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <18540.32962.631137.738278@cargo.ozlabs.ibm.com>

On Thu, 2008-07-03 at 17:33 +1000, Paul Mackerras wrote:
> Dave Kleikamp writes:
> 
> > This patch defines:
> > 
> > - PROT_SAO, which is passed into mmap() and mprotect() in the prot field
> > - VM_SAO in vma->vm_flags, and
> > - _PAGE_SAO, the combination of WIMG bits in the pte that enables strong
> > access ordering for the page.
> > 
> > NOTE: There doesn't seem to be a precedent for architecture-dependent vm_flags.
> > It may be better to define VM_SAO somewhere in include/asm-powerpc/.  Since
> > vm_flags is a long, defining it in the high-order word would help prevent a
> > collision with any newly added values in architecture-independent code.
> 
> This puts _PAGE_SAO in pgtable-ppc64.h, which is fine, but then your
> patch 4/5 breaks the build for 32-bit machines with an error like
> this:
> 
> In file included from /home/paulus/kernel/powerpc/include/linux/mman.h:4,
>                  from /home/paulus/kernel/powerpc/arch/powerpc/kernel/asm-offsets.c:22:
> include2/asm/mman.h: In function ?arch_vm_get_page_prot?:
> include2/asm/mman.h:43: error: ?_PAGE_SAO? undeclared (first use in this function)
> include2/asm/mman.h:43: error: (Each undeclared identifier is reported only once
> include2/asm/mman.h:43: error: for each function it appears in.)
> make[2]: *** [arch/powerpc/kernel/asm-offsets.s] Error 1
> 
> because of course we don't have a definition of _PAGE_SAO for 32-bit
> machines...
> 
> Could you fix it and re-send please?

Sorry.  Here's a replacement for patch 4/5.  It adds an #ifdef
CONFIG_PPC64 around the new code.

The alternative would be to introduce mman_ppc64.h which I think would
be overkill.

powerpc: Add Strong Access Ordering

Allow an application to enable Strong Access Ordering on specific pages of
memory on Power 7 hardware. Currently, power has a weaker memory model than
x86. Implementing a stronger memory model allows an emulator to more
efficiently translate x86 code into power code, resulting in faster code
execution.

On Power 7 hardware, storing 0b1110 in the WIMG bits of the hpte enables
strong access ordering mode for the memory page.  This patchset allows a
user to specify which pages are thus enabled by passing a new protection
bit through mmap() and mprotect().  I have tentatively defined this bit,
PROT_SAO, as 0x10.

Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---

 arch/powerpc/kernel/syscalls.c |    3 +++
 include/asm-powerpc/mman.h     |   30 ++++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

Index: b/arch/powerpc/kernel/syscalls.c
===================================================================
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -143,6 +143,9 @@
 	struct file * file = NULL;
 	unsigned long ret = -EINVAL;
 
+	if (!arch_validate_prot(prot))
+		goto out;
+
 	if (shift) {
 		if (off & ((1 << shift) - 1))
 			goto out;
Index: b/include/asm-powerpc/mman.h
===================================================================
--- a/include/asm-powerpc/mman.h
+++ b/include/asm-powerpc/mman.h
@@ -1,7 +1,9 @@
 #ifndef _ASM_POWERPC_MMAN_H
 #define _ASM_POWERPC_MMAN_H
 
+#include <asm/cputable.h>
 #include <asm-generic/mman.h>
+#include <linux/mm.h>
 
 /*
  * This program is free software; you can redistribute it and/or
@@ -26,4 +28,32 @@
 #define MAP_POPULATE	0x8000		/* populate (prefault) pagetables */
 #define MAP_NONBLOCK	0x10000		/* do not block on IO */
 
+#ifdef CONFIG_PPC64
+/*
+ * This file is included by linux/mman.h, so we can't use cacl_vm_prot_bits()
+ * here.  How important is the optimization?
+ */
+static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot)
+{
+	return (prot & PROT_SAO) ? VM_SAO : 0;
+}
+#define arch_calc_vm_prot_bits(prot) arch_calc_vm_prot_bits(prot)
+
+static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
+{
+	return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : 0;
+}
+#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
+
+static inline int arch_validate_prot(unsigned long prot)
+{
+	if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO))
+		return 0;
+	if ((prot & PROT_SAO) && !cpu_has_feature(CPU_FTR_SAO))
+		return 0;
+	return 1;
+}
+#define arch_validate_prot(prot) arch_validate_prot(prot)
+
+#endif /* CONFIG_PPC64 */
 #endif	/* _ASM_POWERPC_MMAN_H */

-- 
David Kleikamp
IBM Linux Technology Center

^ permalink raw reply

* RE: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: John Linn @ 2008-07-03 19:31 UTC (permalink / raw)
  To: Grant Likely; +Cc: Sadanand Mutyala, dmitry.torokhov, linuxppc-dev, linux-input
In-Reply-To: <20080703173721.GK2284@secretlab.ca>

Hi Grant,

Good comments.

With regard to the port-number, I don't see the value of using it unless
I'm just missing something.  The address of the device seems just as
useful.

We'll spin the patch again taking these into account and Dmitry's
comment also.

Thanks,
John


> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant
Likely
> Sent: Thursday, July 03, 2008 11:37 AM
> To: John Linn
> Cc: linuxppc-dev@ozlabs.org; linux-input@vger.kernel.org;
jwboyer@linux.vnet.ibm.com;
> dmitry.torokhov@gmail.com; jacmet@sunsite.dk; Sadanand Mutyala
> Subject: Re: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2
driver
> =

> On Thu, Jul 03, 2008 at 09:42:31AM -0700, John Linn wrote:
> > Added a new driver for Xilinx XPS PS2 IP. This driver is
> > a flat driver to better match the Linux driver pattern.
> >
> > Signed-off-by: Sadanand <sadanan@xilinx.com>
> > Signed-off-by: John Linn <john.linn@xilinx.com>
> > ---
> > V2
> > 	Updated the driver based on feedback from Dmitry, Peter, and
Grant.
> > 	We believe Montavista copyright is still valid.
> >
> >  drivers/input/serio/Kconfig      |    5 +
> >  drivers/input/serio/Makefile     |    1 +
> >  drivers/input/serio/xilinx_ps2.c |  448
++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 454 insertions(+), 0 deletions(-)
> >  create mode 100644 drivers/input/serio/xilinx_ps2.c
> >
> > diff --git a/drivers/input/serio/Kconfig
b/drivers/input/serio/Kconfig
> > index ec4b661..0e62b39 100644
> > --- a/drivers/input/serio/Kconfig
> > +++ b/drivers/input/serio/Kconfig
> > @@ -190,4 +190,9 @@ config SERIO_RAW
> >  	  To compile this driver as a module, choose M here: the
> >  	  module will be called serio_raw.
> >
> > +config SERIO_XILINX_XPS_PS2
> > +	tristate "Xilinx XPS PS/2 Controller Support"
> > +	help
> > +	  This driver supports XPS PS/2 IP from Xilinx EDK.
> > +
> >  endif
> > diff --git a/drivers/input/serio/Makefile
b/drivers/input/serio/Makefile
> > index 38b8868..9b6c813 100644
> > --- a/drivers/input/serio/Makefile
> > +++ b/drivers/input/serio/Makefile
> > @@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2)	+=3D pcips2.o
> >  obj-$(CONFIG_SERIO_MACEPS2)	+=3D maceps2.o
> >  obj-$(CONFIG_SERIO_LIBPS2)	+=3D libps2.o
> >  obj-$(CONFIG_SERIO_RAW)		+=3D serio_raw.o
> > +obj-$(CONFIG_SERIO_XILINX_XPS_PS2)	+=3D xilinx_ps2.o
> > diff --git a/drivers/input/serio/xilinx_ps2.c
b/drivers/input/serio/xilinx_ps2.c
> > new file mode 100644
> > index 0000000..152bf2c
> > --- /dev/null
> > +++ b/drivers/input/serio/xilinx_ps2.c
> > @@ -0,0 +1,448 @@
> > +/*
> > + * Xilinx XPS PS/2 device driver
> > + *
> > + * (c) 2005 MontaVista Software, Inc.
> > + * (c) 2008 Xilinx, Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or
modify it
> > + * under the terms of the GNU General Public License as published
by the
> > + * Free Software Foundation; either version 2 of the License, or
(at your
> > + * option) any later version.
> > + *
> > + * You should have received a copy of the GNU General Public
License along
> > + * with this program; if not, write to the Free Software
Foundation, Inc.,
> > + * 675 Mass Ave, Cambridge, MA 02139, USA.
> > + */
> > +
> > +
> > +#include <linux/module.h>
> > +#include <linux/serio.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/errno.h>
> > +#include <linux/init.h>
> > +#include <linux/list.h>
> > +#include <linux/io.h>
> > +
> > +#include <linux/of_device.h>
> > +#include <linux/of_platform.h>
> > +
> > +#define DRIVER_NAME		"xilinx_ps2"
> > +
> > +/* Register offsets for the xps2 device */
> > +#define XPS2_SRST_OFFSET	0x00000000 /* Software Reset register */
> > +#define XPS2_STATUS_OFFSET	0x00000004 /* Status register */
> > +#define XPS2_RX_DATA_OFFSET	0x00000008 /* Receive Data
register */
> > +#define XPS2_TX_DATA_OFFSET	0x0000000C /* Transmit Data
register */
> > +#define XPS2_GIER_OFFSET	0x0000002C /* Global Interrupt Enable
reg */
> > +#define XPS2_IPISR_OFFSET	0x00000030 /* Interrupt Status register
*/
> > +#define XPS2_IPIER_OFFSET	0x00000038 /* Interrupt Enable register
*/
> > +
> > +/* Reset Register Bit Definitions */
> > +#define XPS2_SRST_RESET		0x0000000A /* Software Reset  */
> > +
> > +/* Status Register Bit Positions */
> > +#define XPS2_STATUS_RX_FULL	0x00000001 /* Receive Full  */
> > +#define XPS2_STATUS_TX_FULL	0x00000002 /* Transmit Full  */
> > +
> > +/* Bit definitions for ISR/IER registers. Both the registers have
the same bit
> > + * definitions and are only defined once. */
> > +#define XPS2_IPIXR_WDT_TOUT	0x00000001 /* Watchdog Timeout
Interrupt */
> > +#define XPS2_IPIXR_TX_NOACK	0x00000002 /* Transmit No ACK
Interrupt */
> > +#define XPS2_IPIXR_TX_ACK	0x00000004 /* Transmit ACK (Data)
Interrupt */
> > +#define XPS2_IPIXR_RX_OVF	0x00000008 /* Receive Overflow Interrupt
*/
> > +#define XPS2_IPIXR_RX_ERR	0x00000010 /* Receive Error Interrupt */
> > +#define XPS2_IPIXR_RX_FULL	0x00000020 /* Receive Data Interrupt */
> > +
> > +/* Mask for all the Transmit Interrupts */
> > +#define XPS2_IPIXR_TX_ALL	(XPS2_IPIXR_TX_NOACK |
XPS2_IPIXR_TX_ACK)
> > +
> > +/* Mask for all the Receive Interrupts */
> > +#define XPS2_IPIXR_RX_ALL	(XPS2_IPIXR_RX_OVF | XPS2_IPIXR_RX_ERR |
\
> > +					XPS2_IPIXR_RX_FULL)
> > +
> > +/* Mask for all the Interrupts */
> > +#define XPS2_IPIXR_ALL		(XPS2_IPIXR_TX_ALL |
XPS2_IPIXR_RX_ALL |  \
> > +					XPS2_IPIXR_WDT_TOUT)
> > +
> > +/* Global Interrupt Enable mask */
> > +#define XPS2_GIER_GIE_MASK	0x80000000
> > +
> > +struct xps2data {
> > +	int irq;
> > +	u32 phys_addr;
> > +	u32 remap_size;
> > +	spinlock_t lock;
> > +	u8 rxb;				/* Rx buffer */
> > +	void __iomem *base_address;	/* virt. address of control
registers */
> > +	unsigned int dfl;
> > +	struct serio serio;		/* serio */
> > +	struct mutex cfg_mutex;
> > +};
> > +
> > +/************************************/
> > +/* XPS PS/2 data transmission calls */
> > +/************************************/
> > +
> > +/*
> > + * xps2_send() sends the specified byte of data to the PS/2 port.
> > + */
> > +static int xps2_send(struct xps2data *drvdata, u8 *byte)
> > +{
> > +	u32 sr;
> > +	u32 ier;
> > +	int retval =3D -1;
> > +
> > +	/* Enter a critical region by disabling the PS/2 transmit
interrupts to
> > +	 * allow this call to stop a previous operation that may be
interrupt
> > +	 * driven. Only stop the transmit interrupt since this critical
region
> > +	 * is not really exited in the normal manner */
> > +	ier =3D in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
> > +	ier &=3D (~(XPS2_IPIXR_TX_ALL & XPS2_IPIXR_ALL));
> > +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
> > +
> > +	/* If the PS/2 transmitter is empty send a byte of data */
> > +	sr =3D in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
> > +	if ((sr & XPS2_STATUS_TX_FULL) =3D=3D 0) {
> > +		out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET,
*byte);
> > +		retval =3D 0;
> > +	}
> > +
> > +	/* Enable the TX interrupts to track the status of the
transmission */
> > +	ier =3D in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
> > +	ier |=3D (XPS2_IPIXR_TX_ALL | XPS2_IPIXR_WDT_TOUT);
> > +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
> =

> If this is a critical region, Wouldn't it be more appropriate to use a
> spinlock with spin_lock_irqsave()/spin_unlock_irqrestore()  here?
> =

> ...
> =

> Actually, looking deeper into the file; xps2_send() is already
protected
> with a spin lock w/ irqsave.  Why do interrupts need to be disabled
> at all?  It looks like this whole routine could be collapsed into a
> about three lines of code in the sxps2_write() function.
> =

> > +
> > +	return retval;
> > +}
> > +
> > +/*
> > + * xps2_recv() will attempt to receive a byte of data from the PS/2
port.
> > + */
> > +static int xps2_recv(struct xps2data *drvdata, u8 *byte)
> > +{
> > +	u32 sr;
> > +	int retval =3D -1;
> > +
> > +	/* If there is data available in the PS/2 receiver, read it */
> > +	sr =3D in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
> > +	if (sr & XPS2_STATUS_RX_FULL) {
> > +		*byte =3D in_be32(drvdata->base_address +
XPS2_RX_DATA_OFFSET);
> > +		retval =3D 0;
> > +	}
> > +
> > +	return retval;
> > +}
> > +
> > +/*********************/
> > +/* Interrupt handler */
> > +/*********************/
> > +static irqreturn_t xps2_interrupt(int irq, void *dev_id)
> > +{
> > +	struct xps2data *drvdata =3D (struct xps2data *)dev_id;
> > +	u32 intr_sr;
> > +	u32 ier;
> > +	u8 c;
> > +	u8 retval;
> > +
> > +	/* Get the PS/2 interrupts and clear them */
> > +	intr_sr =3D in_be32(drvdata->base_address + XPS2_IPISR_OFFSET);
> > +	out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr);
> > +
> > +	/* Check which interrupt is active */
> > +	if (intr_sr & XPS2_IPIXR_RX_OVF) {
> > +		printk(KERN_ERR "%s: receive overrun error\n",
> > +			drvdata->serio.name);
> > +	}
> > +
> > +	if (intr_sr & XPS2_IPIXR_RX_ERR)
> > +		drvdata->dfl |=3D SERIO_PARITY;
> > +
> > +	if (intr_sr & (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_WDT_TOUT))
> > +		drvdata->dfl |=3D SERIO_TIMEOUT;
> > +
> > +	if (intr_sr & XPS2_IPIXR_RX_FULL) {
> > +		retval =3D xps2_recv(drvdata, &drvdata->rxb);
> > +
> > +		/* Error, if a byte is not received */
> > +		if (retval) {
> > +			printk(KERN_ERR
> > +				"%s: wrong rcvd byte count (%d)\n",
> > +				drvdata->serio.name, retval);
> > +		} else {
> > +			c =3D drvdata->rxb;
> > +			serio_interrupt(&drvdata->serio, c,
drvdata->dfl);
> > +			drvdata->dfl =3D 0;
> > +		}
> > +	}
> > +
> > +	if (intr_sr & XPS2_IPIXR_TX_ACK) {
> > +
> > +		/* Disable the TX interrupts after the transmission is
> > +		 * complete */
> > +		ier =3D in_be32(drvdata->base_address +
XPS2_IPIER_OFFSET);
> > +		ier &=3D (~(XPS2_IPIXR_TX_ACK & XPS2_IPIXR_ALL));
> > +		out_be32(drvdata->base_address + XPS2_IPIER_OFFSET,
ier);
> > +		drvdata->dfl =3D 0;
> > +	}
> > +
> > +	return IRQ_HANDLED;
> > +}
> > +
> > +/*******************/
> > +/* serio callbacks */
> > +/*******************/
> > +
> > +/*
> > + *	sxps2_write() - sends a byte out through the PS/2 interface.
> > + */
> > +static int sxps2_write(struct serio *pserio, unsigned char c)
> > +{
> > +	struct xps2data *drvdata =3D pserio->port_data;
> > +	unsigned long flags;
> > +	int retval;
> > +
> > +	spin_lock_irqsave(&drvdata->lock, flags);
> > +	retval =3D xps2_send(drvdata, &c);
> > +	spin_unlock_irqrestore(&drvdata->lock, flags);
> > +
> > +	return retval;
> > +}
> > +
> > +/*
> > + * sxps2_open() is called when a port is open by the higher layer.
> > + */
> > +static int sxps2_open(struct serio *pserio)
> > +{
> > +	struct xps2data *drvdata =3D pserio->port_data;
> > +	int retval;
> > +
> > +	retval =3D request_irq(drvdata->irq, &xps2_interrupt, 0,
> > +				DRIVER_NAME, drvdata);
> > +	if (retval) {
> > +		printk(KERN_ERR
> > +			"%s: Couldn't allocate interrupt %d\n",
> > +			drvdata->serio.name, drvdata->irq);
> > +		return retval;
> > +	}
> > +
> > +	/* start reception by enabling the interrupts */
> > +	out_be32(drvdata->base_address + XPS2_GIER_OFFSET,
XPS2_GIER_GIE_MASK);
> > +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET,
XPS2_IPIXR_RX_ALL);
> > +	(void)xps2_recv(drvdata, &drvdata->rxb);
> > +
> > +	return 0;		/* success */
> > +}
> > +
> > +/*
> > + * sxps2_close() frees the interrupt.
> > + */
> > +static void sxps2_close(struct serio *pserio)
> > +{
> > +	struct xps2data *drvdata =3D pserio->port_data;
> > +
> > +	/* Disable the PS2 interrupts */
> > +	out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00);
> > +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00);
> > +	free_irq(drvdata->irq, drvdata);
> > +}
> > +
> > +/******************************/
> > +/* Device initialization code */
> > +/******************************/
> > +
> > +/*
> > + * xps2_initialize() initializes the Xilinx PS/2 device.
> > + */
> > +static int xps2_initialize(struct xps2data *drvdata)
> > +{
> > +	/* Disable all the interrupts, just in case */
> > +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0);
> > +
> > +	/* Reset the PS2 device and abort any current transaction, to
make sure
> > +	 * we have the PS2 in a good state */
> > +	out_be32(drvdata->base_address + XPS2_SRST_OFFSET,
XPS2_SRST_RESET);
> > +
> > +	return 0;
> > +}
> =

> This function is only called by xps2_setup() and should probably be
> collapsed into it.
> =

> > +
> > +/*
> > + * XPS PS2 device setup code.
> > + */
> > +static int xps2_setup(struct device *dev, int id, struct resource
*regs_res,
> > +			struct resource *irq_res)
> > +{
> > +	struct xps2data *drvdata;
> > +	struct serio *serio;
> > +	unsigned long remap_size;
> > +	int retval;
> > +
> > +	if (!dev)
> > +		return -EINVAL;
> > +
> > +	drvdata =3D kzalloc(sizeof(struct xps2data), GFP_KERNEL);
> > +	if (!drvdata) {
> > +		dev_err(dev, "Couldn't allocate device private
record\n");
> > +		return -ENOMEM;
> > +	}
> > +	spin_lock_init(&drvdata->lock);
> > +	mutex_init(&drvdata->cfg_mutex);
> > +	dev_set_drvdata(dev, drvdata);
> > +
> > +	if (!regs_res || !irq_res) {
> > +		dev_err(dev, "IO resource(s) not found\n");
> > +		retval =3D -EFAULT;
> > +		goto failed1;
> > +	}
> > +
> > +	drvdata->irq =3D irq_res->start;
> > +	remap_size =3D regs_res->end - regs_res->start + 1;
> > +	if (!request_mem_region(regs_res->start, remap_size,
DRIVER_NAME)) {
> > +
> > +		dev_err(dev, "Couldn't lock memory region at 0x%08X\n",
> > +			(unsigned int)regs_res->start);
> > +		retval =3D -EBUSY;
> > +		goto failed1;
> > +	}
> > +
> > +	/* Fill in configuration data and add them to the list */
> > +	drvdata->phys_addr =3D regs_res->start;
> > +	drvdata->remap_size =3D remap_size;
> > +	drvdata->base_address =3D ioremap(regs_res->start, remap_size);
> > +	if (drvdata->base_address =3D=3D NULL) {
> > +
> > +		dev_err(dev, "Couldn't ioremap memory at 0x%08X\n",
> > +			(unsigned int)regs_res->start);
> > +		retval =3D -EFAULT;
> > +		goto failed2;
> > +	}
> > +
> > +	/* Initialize the PS/2 interface */
> > +	mutex_lock(&drvdata->cfg_mutex);
> > +	if (xps2_initialize(drvdata)) {
> > +		mutex_unlock(&drvdata->cfg_mutex);
> > +		dev_err(dev, "Could not initialize device\n");
> > +		retval =3D -ENODEV;
> > +		goto failed3;
> > +	}
> > +	mutex_unlock(&drvdata->cfg_mutex);
> =

> This is the only user of cfg_mutex.  The IRQ isn't registered yet, and
> the driver isn't registered with the serio layer either so you can
just
> drop the mutex entirely.
> =

> > +
> > +	dev_info(dev, "Xilinx PS2 at 0x%08X mapped to 0x%08X, irq=3D%d\n",
> > +		drvdata->phys_addr, (u32)drvdata->base_address,
drvdata->irq);
> > +
> > +	serio =3D &drvdata->serio;
> > +	serio->id.type =3D SERIO_8042;
> > +	serio->write =3D sxps2_write;
> > +	serio->open =3D sxps2_open;
> > +	serio->close =3D sxps2_close;
> > +	serio->port_data =3D drvdata;
> > +	serio->dev.parent =3D dev;
> > +	snprintf(drvdata->serio.name, sizeof(serio->name),
> > +		 "Xilinx XPS PS/2 Port #%d", id);
> > +	snprintf(drvdata->serio.phys, sizeof(serio->phys),
> > +		 "xilinxps2/serio%d", id);
> > +	serio_register_port(serio);
> > +
> > +	return 0;		/* success */
> > +
> > +failed3:
> > +	iounmap(drvdata->base_address);
> > +
> > +failed2:
> > +	release_mem_region(regs_res->start, remap_size);
> > +
> > +failed1:
> > +	kfree(drvdata);
> > +	dev_set_drvdata(dev, NULL);
> > +
> > +	return retval;
> > +}
> > +
> > +/***************************/
> > +/* OF Platform Bus Support */
> > +/***************************/
> > +
> > +static int __devinit xps2_of_probe(struct of_device *ofdev, const
struct
> > +				   of_device_id * match)
> > +{
> > +	struct resource r_irq_struct;
> > +	struct resource r_mem_struct;
> > +	struct resource *r_irq =3D &r_irq_struct;	/* Interrupt resources
*/
> > +	struct resource *r_mem =3D &r_mem_struct;	/* IO mem resources */
> =

> This is very vebose; do this instead:
> =

> +	struct resource r_irq;
> +	struct resource r_mem;
> [...]
> +	rc =3D of_address_to_resource(ofdev->node, 0, &r_mem);
> [...]
> +	rc =3D of_irq_to_resource(ofdev->node, 0, &r_irq);
> [...]
> +	return xps2_setup(&ofdev->dev, id ? *id : -1, &r_mem, &r_irq);
> =

> > +	int rc =3D 0;
> > +	const unsigned int *id;
> > +
> > +	printk(KERN_INFO "Device Tree Probing \'%s\'\n",
> > +			ofdev->node->name);
> > +
> > +	/* Get iospace for the device */
> > +	rc =3D of_address_to_resource(ofdev->node, 0, r_mem);
> > +	if (rc) {
> > +		dev_warn(&ofdev->dev, "invalid address\n");
> =

> Probably should be dev_err(...);
> =

> > +		return rc;
> > +	}
> > +
> > +	/* Get IRQ for the device */
> > +	rc =3D of_irq_to_resource(ofdev->node, 0, r_irq);
> > +	if (rc =3D=3D NO_IRQ) {
> > +		dev_warn(&ofdev->dev, "no IRQ found\n");
> =

> ditto
> =

> > +		return rc;
> > +	}
> > +
> > +	id =3D of_get_property(ofdev->node, "port-number", NULL);
> =

> Drop this line.  port-number is a poor way to specify a global value.
> If really needed, you should search the aliases node for a matching
> property to get the id.  Otherwise, you should probably fall back to
> using the physical address of the device instead of -1.  At least it
> guarantees that the value is unique.
> =

> > +	return xps2_setup(&ofdev->dev, id ? *id : -1, r_mem, r_irq);
> > +}
> > +
> > +static int __devexit xps2_of_remove(struct of_device *of_dev)
> > +{
> > +	struct xps2data *drvdata;
> > +	struct device *dev;
> > +
> > +	dev =3D &of_dev->dev;
> > +	if (!dev)
> > +		return -EINVAL;
> > +
> > +	drvdata =3D (struct xps2data *)dev_get_drvdata(dev);
> > +
> > +	serio_unregister_port(&drvdata->serio);
> > +
> > +	iounmap(drvdata->base_address);
> > +
> > +	release_mem_region(drvdata->phys_addr, drvdata->remap_size);
> > +
> > +	kfree(drvdata);
> > +	dev_set_drvdata(dev, NULL);
> > +
> > +	return 0;		/* success */
> > +}
> > +
> > +/* Match table for of_platform binding */
> > +static struct of_device_id __devinitdata xps2_of_match[] =3D {
> =

> __devinitdata in the wrong place; should be:
> =

> +static struct of_device_id xps2_of_match[] __devinitdata =3D {
> =

> > +	{ .compatible =3D "xlnx,xps-ps2-1.00.a", },
> > +	{ /* end of list */ },
> > +};
> > +MODULE_DEVICE_TABLE(of, xps2_of_match);
> > +
> > +static struct of_platform_driver xps2_of_driver =3D {
> > +	.name		=3D DRIVER_NAME,
> > +	.match_table	=3D xps2_of_match,
> > +	.probe		=3D xps2_of_probe,
> > +	.remove		=3D __devexit_p(xps2_of_remove),
> > +};
> > +
> > +static int __init xps2_init(void)
> > +{
> > +	return of_register_platform_driver(&xps2_of_driver);
> > +}
> > +
> > +static void __exit xps2_cleanup(void)
> > +{
> > +	of_unregister_platform_driver(&xps2_of_driver);
> > +}
> > +
> > +module_init(xps2_init);
> > +module_exit(xps2_cleanup);
> > +
> > +MODULE_AUTHOR("Xilinx, Inc.");
> > +MODULE_DESCRIPTION("Xilinx XPS PS/2 driver");
> > +MODULE_LICENSE("GPL");
> > +
> > --
> > 1.5.2.1
> >
> >
> >
> > This email and any attachments are intended for the sole use of the
named recipient(s) and
> contain(s) confidential information that may be proprietary,
privileged or copyrighted under
> applicable law. If you are not the intended recipient, do not read,
copy, or forward this email
> message or any attachments. Delete this email message and any
attachments immediately.
> >
> >


This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.

^ permalink raw reply

* Re: Support for low power mode for powerpc processors
From: Josh Boyer @ 2008-07-03 19:16 UTC (permalink / raw)
  To: prodyut hazarika; +Cc: linuxppc-dev
In-Reply-To: <49c0ff980807031154qa5541c7k7065bdc1054d686a@mail.gmail.com>

On Thu, 3 Jul 2008 11:54:33 -0700
"prodyut hazarika" <prodyuth@gmail.com> wrote:

> Hi all,
> I would like to know whether Linux on PowerPC puts the processor on
> low power mode during idle state. Most PowerPC processors support a
> low power mode. I am looking to add support for low-power mode in
> Linux for AMCC 4xx processors.
> 
> My questions are the following:
> 1) Is tickless kernel integrated into the PowerPC tree?
> 2) Does Linux kernel puts the processor in low power mode if cpu is
> idle, and takes it out of that state on wakeup (triggered by
> interrupt/WOL etc)?
> 
> Any suggestions/comments would be welcome.

The 4xx cores themselves are designed to have power savings without
explicit software management.  The only sort of "NAP/DOZE" possible
from software on them is to use the Wait Enable state in the idle loop
to stall the CPU pipelines and wait for an exception.  This is already
done in more recent kernels, and it doesn't particularly save a lot of
power as the clocks and other logic are still all active.

Some chips may have an external clock and power management ASIC that
can be leverage but it will be SoC specific.  You could start there for
a particular board.

josh

^ permalink raw reply

* [PATCH v3] powerpc: update crypto node definition and device tree instances
From: Kim Phillips @ 2008-07-03 19:18 UTC (permalink / raw)
  To: linuxppc-dev

delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
---
changes from v2: SEC bindings moved to new file, added crypto node to
mpc8536 dts

 Documentation/powerpc/booting-without-of.txt  |   71 -------------------------
 Documentation/powerpc/device-tree/fsl/sec.txt |   69 ++++++++++++++++++++++++
 arch/powerpc/boot/dts/mpc8272ads.dts          |   21 +++-----
 arch/powerpc/boot/dts/mpc8313erdb.dts         |   15 ++---
 arch/powerpc/boot/dts/mpc8315erdb.dts         |   15 +++---
 arch/powerpc/boot/dts/mpc832x_mds.dts         |   15 ++---
 arch/powerpc/boot/dts/mpc832x_rdb.dts         |   16 +++---
 arch/powerpc/boot/dts/mpc8349emitx.dts        |   12 ++---
 arch/powerpc/boot/dts/mpc8349emitxgp.dts      |   12 ++---
 arch/powerpc/boot/dts/mpc834x_mds.dts         |   15 ++----
 arch/powerpc/boot/dts/mpc836x_mds.dts         |   13 ++---
 arch/powerpc/boot/dts/mpc8377_mds.dts         |   13 ++---
 arch/powerpc/boot/dts/mpc8377_rdb.dts         |   14 ++---
 arch/powerpc/boot/dts/mpc8378_mds.dts         |   13 ++---
 arch/powerpc/boot/dts/mpc8378_rdb.dts         |   14 ++---
 arch/powerpc/boot/dts/mpc8379_mds.dts         |   13 ++---
 arch/powerpc/boot/dts/mpc8379_rdb.dts         |   14 ++---
 arch/powerpc/boot/dts/mpc8536ds.dts           |   12 ++++
 arch/powerpc/boot/dts/mpc8541cds.dts          |   11 ++++
 arch/powerpc/boot/dts/mpc8544ds.dts           |   11 ++++
 arch/powerpc/boot/dts/mpc8548cds.dts          |   11 ++++
 arch/powerpc/boot/dts/mpc8555cds.dts          |   11 ++++
 arch/powerpc/boot/dts/mpc8568mds.dts          |   14 ++---
 arch/powerpc/boot/dts/mpc8572ds.dts           |   12 ++++
 arch/powerpc/boot/dts/sbc8349.dts             |   14 ++---
 arch/powerpc/boot/dts/sbc8548.dts             |   11 ++++
 arch/powerpc/boot/dts/tqm8541.dts             |   11 ++++
 arch/powerpc/boot/dts/tqm8555.dts             |   11 ++++
 28 files changed, 270 insertions(+), 214 deletions(-)
 create mode 100644 Documentation/powerpc/device-tree/fsl/sec.txt

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index f6394b5..899b4ea 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1468,77 +1468,6 @@ platforms are moved over to use the flattened-device-tree model.
 	};
 
 
-   g) Freescale SOC SEC Security Engines
-
-   Required properties:
-
-    - device_type : Should be "crypto"
-    - model : Model of the device.  Should be "SEC1" or "SEC2"
-    - compatible : Should be "talitos"
-    - reg : Offset and length of the register set for the device
-    - interrupts : <a b> where a is the interrupt number and b is a
-      field that represents an encoding of the sense and level
-      information for the interrupt.  This should be encoded based on
-      the information in section 2) depending on the type of interrupt
-      controller you have.
-    - interrupt-parent : the phandle for the interrupt controller that
-      services interrupts for this device.
-    - num-channels : An integer representing the number of channels
-      available.
-    - channel-fifo-len : An integer representing the number of
-      descriptor pointers each channel fetch fifo can hold.
-    - exec-units-mask : The bitmask representing what execution units
-      (EUs) are available. It's a single 32-bit cell. EU information
-      should be encoded following the SEC's Descriptor Header Dword
-      EU_SEL0 field documentation, i.e. as follows:
-
-        bit 0 = reserved - should be 0
-        bit 1 = set if SEC has the ARC4 EU (AFEU)
-        bit 2 = set if SEC has the DES/3DES EU (DEU)
-        bit 3 = set if SEC has the message digest EU (MDEU)
-        bit 4 = set if SEC has the random number generator EU (RNG)
-        bit 5 = set if SEC has the public key EU (PKEU)
-        bit 6 = set if SEC has the AES EU (AESU)
-        bit 7 = set if SEC has the Kasumi EU (KEU)
-
-      bits 8 through 31 are reserved for future SEC EUs.
-
-    - descriptor-types-mask : The bitmask representing what descriptors
-      are available. It's a single 32-bit cell. Descriptor type
-      information should be encoded following the SEC's Descriptor
-      Header Dword DESC_TYPE field documentation, i.e. as follows:
-
-        bit 0  = set if SEC supports the aesu_ctr_nonsnoop desc. type
-        bit 1  = set if SEC supports the ipsec_esp descriptor type
-        bit 2  = set if SEC supports the common_nonsnoop desc. type
-        bit 3  = set if SEC supports the 802.11i AES ccmp desc. type
-        bit 4  = set if SEC supports the hmac_snoop_no_afeu desc. type
-        bit 5  = set if SEC supports the srtp descriptor type
-        bit 6  = set if SEC supports the non_hmac_snoop_no_afeu desc.type
-        bit 7  = set if SEC supports the pkeu_assemble descriptor type
-        bit 8  = set if SEC supports the aesu_key_expand_output desc.type
-        bit 9  = set if SEC supports the pkeu_ptmul descriptor type
-        bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
-        bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
-
-      ..and so on and so forth.
-
-   Example:
-
-       /* MPC8548E */
-       crypto@30000 {
-               device_type = "crypto";
-               model = "SEC2";
-               compatible = "talitos";
-               reg = <30000 10000>;
-               interrupts = <1d 3>;
-               interrupt-parent = <40000>;
-               num-channels = <4>;
-               channel-fifo-len = <18>;
-               exec-units-mask = <000000fe>;
-               descriptor-types-mask = <012b0ebf>;
-       };
-
    h) Board Control and Status (BCSR)
 
    Required properties:
diff --git a/Documentation/powerpc/device-tree/fsl/sec.txt b/Documentation/powerpc/device-tree/fsl/sec.txt
new file mode 100644
index 0000000..cfaa555
--- /dev/null
+++ b/Documentation/powerpc/device-tree/fsl/sec.txt
@@ -0,0 +1,69 @@
+Freescale SoC SEC Security Engines
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+  SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"
+- reg : Offset and length of the register set for the device
+- interrupts : <a b> where a is the interrupt number and b is a
+  field that represents an encoding of the sense and level
+  information for the interrupt.  This should be encoded based on
+  the information in section 2) depending on the type of interrupt
+  controller you have.
+- interrupt-parent : the phandle for the interrupt controller that
+  services interrupts for this device.
+- fsl,num-channels : An integer representing the number of channels
+  available.
+- fsl,channel-fifo-len : An integer representing the number of
+  descriptor pointers each channel fetch fifo can hold.
+- fsl,exec-units-mask : The bitmask representing what execution units
+  (EUs) are available. It's a single 32-bit cell. EU information
+  should be encoded following the SEC's Descriptor Header Dword
+  EU_SEL0 field documentation, i.e. as follows:
+
+	bit 0  = reserved - should be 0
+	bit 1  = set if SEC has the ARC4 EU (AFEU)
+	bit 2  = set if SEC has the DES/3DES EU (DEU)
+	bit 3  = set if SEC has the message digest EU (MDEU/MDEU-A)
+	bit 4  = set if SEC has the random number generator EU (RNG)
+	bit 5  = set if SEC has the public key EU (PKEU)
+	bit 6  = set if SEC has the AES EU (AESU)
+	bit 7  = set if SEC has the Kasumi EU (KEU)
+	bit 8  = set if SEC has the CRC EU (CRCU)
+	bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
+
+remaining bits are reserved for future SEC EUs.
+
+- fsl,descriptor-types-mask : The bitmask representing what descriptors
+  are available. It's a single 32-bit cell. Descriptor type information
+  should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
+  field documentation, i.e. as follows:
+
+	bit 0  = set if SEC supports the aesu_ctr_nonsnoop desc. type
+	bit 1  = set if SEC supports the ipsec_esp descriptor type
+	bit 2  = set if SEC supports the common_nonsnoop desc. type
+	bit 3  = set if SEC supports the 802.11i AES ccmp desc. type
+	bit 4  = set if SEC supports the hmac_snoop_no_afeu desc. type
+	bit 5  = set if SEC supports the srtp descriptor type
+	bit 6  = set if SEC supports the non_hmac_snoop_no_afeu desc.type
+	bit 7  = set if SEC supports the pkeu_assemble descriptor type
+	bit 8  = set if SEC supports the aesu_key_expand_output desc.type
+	bit 9  = set if SEC supports the pkeu_ptmul descriptor type
+	bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
+	bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
+
+..and so on and so forth.
+
+Example:
+
+	/* MPC8548E */
+	crypto@30000 {
+		compatible = "fsl,sec2.1", "fsl,sec2.0";
+		reg = <0x30000 0x10000>;
+		interrupts = <29 2>;
+		interrupt-parent = <&mpic>;
+		fsl,num-channels = <4>;
+		fsl,channel-fifo-len = <24>;
+		fsl,exec-units-mask = <0xfe>;
+		fsl,descriptor-types-mask = <0x12b0ebf>;
+	};
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index d27f8a7..2a1929a 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -237,22 +237,15 @@
 			compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
 		};
 
-/* May need to remove if on a part without crypto engine */
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "fsl,mpc8272-talitos-sec2",
-			             "fsl,talitos-sec2",
-			             "fsl,talitos",
-			             "talitos";
-			reg = <0x30000 0x10000>;
-			interrupts = <11 8>;
+			compatible = "fsl,sec1.0";
+			reg = <0x40000 0x13000>;
+			interrupts = <47 0x8>;
 			interrupt-parent = <&PIC>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x7e>;
-/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
-			descriptor-types-mask = <0x1010ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x1010415>;
 		};
 	};
 
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index b206843..3664fb5 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -254,17 +254,14 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
-			reg = <0x30000 0x7000>;
+			compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 2.2 */
-			num-channels = <1>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000004c>;
-			descriptor-types-mask = <0x0122003f>;
+			fsl,num-channels = <1>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x4c>;
+			fsl,descriptor-types-mask = <0x0122003f>;
 		};
 
 		/* IPIC
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index a40e806..f704513 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -241,17 +241,16 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			device_type = "crypto";
-			compatible = "talitos";
+			compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
+				     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
+				     "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x97c>;
+			fsl,descriptor-types-mask = <0x3ab0abf>;
 		};
 
 		sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index b5968b6..7345743 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -150,17 +150,14 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
-			reg = <0x30000 0x7000>;
+			compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 2.2 */
-			num-channels = <1>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000004c>;
-			descriptor-types-mask = <0x0122003f>;
+			fsl,num-channels = <1>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x4c>;
+			fsl,descriptor-types-mask = <0x0122003f>;
 		};
 
 		ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index a798d86..0ebc20f 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -128,17 +128,15 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
-			reg = <0x30000 0x7000>;
+			compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 2.2 */
-			num-channels = <1>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000004c>;
-			descriptor-types-mask = <0x0122003f>;
+			interrupt-parent = <&pic>;
+			fsl,num-channels = <1>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x4c>;
+			fsl,descriptor-types-mask = <0x0122003f>;
 		};
 
 		ipic:pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index fc0f4c9..8dfab56 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -213,16 +213,14 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
+			compatible = "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000007e>;
-			descriptor-types-mask = <0x01010ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
 		};
 
 		ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index e6afb1d..49ca349 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -186,16 +186,14 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
+			compatible = "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000007e>;
-			descriptor-types-mask = <0x01010ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
 		};
 
 		ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 9c75c7c..ba586cb 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -228,20 +228,15 @@
 			interrupt-parent = <&ipic>;
 		};
 
-		/* May need to remove if on a part without crypto engine */
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
+			compatible = "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000007e>;
-			/* desc mask is for rev2.0,
-			 * we need runtime fixup for >2.0 */
-			descriptor-types-mask = <0x01010ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
 		};
 
 		/* IPIC
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 8e33b15..3701dae 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -154,17 +154,14 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
+			compatible = "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000007e>;
-			/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
-			descriptor-types-mask = <0x01010ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
 		};
 
 		ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 49a38cb..0a700cb 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -269,16 +269,15 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			compatible = "talitos";
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
 		sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 1f45387..ed137aa 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -248,17 +248,15 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			device_type = "crypto";
-			compatible = "talitos";
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
 		sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 99ad49d..29c8c76 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -269,16 +269,15 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			compatible = "talitos";
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
 		sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 44e34d3..34a7f2f 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -248,17 +248,15 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			device_type = "crypto";
-			compatible = "talitos";
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
 		/* IPIC
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 980be81..d641a89 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -269,16 +269,15 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			compatible = "talitos";
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
 		sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index eeedf58..e4d7030 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -248,17 +248,15 @@
 		};
 
 		crypto@30000 {
-			model = "SEC3";
-			device_type = "crypto";
-			compatible = "talitos";
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			/* Rev. 3.0 geometry */
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x000001fe>;
-			descriptor-types-mask = <0x03ab0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
 		};
 
 		sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 98ad27a..bf778fd 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -231,6 +231,18 @@
 			interrupt-parent = <&mpic>;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <11 0x8>;
+			interrupt-parent = <&ipic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
+		};
+
 		sata@18000 {
 			compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 21ad71b..c4469f1 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -189,6 +189,17 @@
 			interrupt-parent = <&mpic>;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 6cf533f..7d3829d 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -210,6 +210,17 @@
 			fsl,has-rstcr;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0xfe>;
+			fsl,descriptor-types-mask = <0x12b0ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index d1fa6bb..d84466b 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -249,6 +249,17 @@
 			fsl,has-rstcr;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0xfe>;
+			fsl,descriptor-types-mask = <0x12b0ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 6fc8059..e03a780 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -189,6 +189,17 @@
 			interrupt-parent = <&mpic>;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index be9a289..9c30a34 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -231,16 +231,14 @@
 		};
 
 		crypto@30000 {
-			device_type = "crypto";
-			model = "SEC2";
-			compatible = "talitos";
-			reg = <0x30000 0xf000>;
+			compatible = "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
 			interrupts = <45 2>;
 			interrupt-parent = <&mpic>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0xfe>;
-			descriptor-types-mask = <0x12b0ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0xfe>;
+			fsl,descriptor-types-mask = <0x12b0ebf>;
 		};
 
 		mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index cb06325..08c61e3 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -321,6 +321,18 @@
 			interrupt-parent = <&mpic>;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+				     "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2 58 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x9fe>;
+			fsl,descriptor-types-mask = <0x3ab0ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 5b76bb2..45f789b 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -221,19 +221,15 @@
 			interrupt-parent = <&ipic>;
 		};
 
-		/* May need to remove if on a part without crypto engine */
 		crypto@30000 {
-			model = "SEC2";
-			compatible = "talitos";
+			compatible = "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
 			interrupts = <11 0x8>;
 			interrupt-parent = <&ipic>;
-			num-channels = <4>;
-			channel-fifo-len = <24>;
-			exec-units-mask = <0x0000007e>;
-			/* desc mask is for rev2.0,
-			 * we need runtime fixup for >2.0 */
-			descriptor-types-mask = <0x01010ebf>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
 		};
 
 		/* IPIC
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 21cbacb..333552b 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -304,6 +304,17 @@
 			fsl,has-rstcr;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.1", "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0xfe>;
+			fsl,descriptor-types-mask = <0x12b0ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index d083a64..d76441e 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -200,6 +200,17 @@
 			interrupt-parent = <&mpic>;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 96b0b94..6f7ea59 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -200,6 +200,17 @@
 			interrupt-parent = <&mpic>;
 		};
 
+		crypto@30000 {
+			compatible = "fsl,sec2.0";
+			reg = <0x30000 0x10000>;
+			interrupts = <45 2>;
+			interrupt-parent = <&mpic>;
+			fsl,num-channels = <4>;
+			fsl,channel-fifo-len = <24>;
+			fsl,exec-units-mask = <0x7e>;
+			fsl,descriptor-types-mask = <0x01010ebf>;
+		};
+
 		mpic: pic@40000 {
 			interrupt-controller;
 			#address-cells = <0>;
-- 
1.5.6

^ permalink raw reply related

* Re: Need stable 2.6 kernel for TQM823L
From: Grant Likely @ 2008-07-03 19:04 UTC (permalink / raw)
  To: Thomas Maenner; +Cc: linuxppc-embedded
In-Reply-To: <200807031159.30434.tmaenner@aehr.com>

On Thu, Jul 03, 2008 at 11:59:29AM -0700, Thomas Maenner wrote:
> > $ ls arch/powerpc/boot/dts/tqm*
> > arch/powerpc/boot/dts/tqm5200.dts  arch/powerpc/boot/dts/tqm8555.dts
> > arch/powerpc/boot/dts/tqm8540.dts  arch/powerpc/boot/dts/tqm8560.dts
> > arch/powerpc/boot/dts/tqm8541.dts
> >
> however, I found config files in the ppc tree:
> ls arch/ppc/configs/TQM8*
> arch/ppc/configs/TQM823L_defconfig  
> arch/ppc/configs/TQM850L_defconfig
> arch/ppc/configs/TQM8260_defconfig 
> arch/ppc/configs/TQM860L_defconfig
> 
> Is this stuff still working?
> Do I still need to create a device tree?

arch/ppc is depreciated and will disappear in 2.6.27.  I don't know if
anyone is actively keeping 8xx support working in arch/ppc so you may
experience significant breakage.

g.

^ permalink raw reply

* Re: Need stable 2.6 kernel for TQM823L
From: Thomas Maenner @ 2008-07-03 18:59 UTC (permalink / raw)
  To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <20080703055819.GB643@secretlab.ca>

Thanks much Grant,

On Wednesday 02 July 2008 22:58:19 Grant Likely wrote:
> On Wed, Jul 02, 2008 at 02:18:13PM -0700, Thomas Maenner wrote:
> > Hi Guys,
> >
> > I have used the 2.4 kernel successfully on the TQM823L and 855s, and
> > wanted to try out a 2.6 version. So I downloaded the latest from Wolfgang
> > @ git.denx.de but I'm getting all sorts of compile errors....
> >
> > Before I continue to dive in, I wanted to ask the group some questions:
> > - Is 2.6 ported to the TQM8xx modules?
>
> $ ls arch/powerpc/boot/dts/tqm*
> arch/powerpc/boot/dts/tqm5200.dts  arch/powerpc/boot/dts/tqm8555.dts
> arch/powerpc/boot/dts/tqm8540.dts  arch/powerpc/boot/dts/tqm8560.dts
> arch/powerpc/boot/dts/tqm8541.dts
>
however, I found config files in the ppc tree:
ls arch/ppc/configs/TQM8*
arch/ppc/configs/TQM823L_defconfig  
arch/ppc/configs/TQM850L_defconfig
arch/ppc/configs/TQM8260_defconfig 
arch/ppc/configs/TQM860L_defconfig

Is this stuff still working?
Do I still need to create a device tree?

Thanks again

Tom

> Unfortunately, it doesn't look like any of the tqm8xx boards have been
> added to the device tree directory, so the answer is probably, 'no'.
>
> > - If so, is it stable?
>
> I believe 8xx support is stable in arch/powerpc, but you'll need to
> write a device tree file for the board.  Look for a similar board in
> arch/powerpc/boot/dts/ to use as a starting point.
>
> You'll probably also need to add a platform file to
> arch/powerpc/platforms/8xx that matches against your new device tree file.
>
> g.


-- 
Linux hackers are funny people: They count the time in patchlevels
--
Thomas Maenner
E-Mail: mailto:tmaenner@aehr.com

^ permalink raw reply

* Support for low power mode for powerpc processors
From: prodyut hazarika @ 2008-07-03 18:54 UTC (permalink / raw)
  To: linuxppc-dev

Hi all,
I would like to know whether Linux on PowerPC puts the processor on
low power mode during idle state. Most PowerPC processors support a
low power mode. I am looking to add support for low-power mode in
Linux for AMCC 4xx processors.

My questions are the following:
1) Is tickless kernel integrated into the PowerPC tree?
2) Does Linux kernel puts the processor in low power mode if cpu is
idle, and takes it out of that state on wakeup (triggered by
interrupt/WOL etc)?

Any suggestions/comments would be welcome.

Thanks,
Prodyut

^ permalink raw reply

* Re: New fsl device bindings file
From: Anton Vorontsov @ 2008-07-03 18:53 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev list
In-Reply-To: <40B88BFD-1FEB-4E36-9917-54C7380FF801@kernel.crashing.org>

On Thu, Jul 03, 2008 at 01:20:18PM -0500, Kumar Gala wrote:
> Guys,
>
> I'm sure you'll hate for doing this, but I've asked Kim to create a new 
> Documentation/powerpc/fsl-device-tree-bindings.txt as part of his SEC 
> patch.

Just curious... why we're maintaining documentation in the .txt file?
We could just create Documentation/powerpc/fsl-device-tree-bindings.dts
file, that will be:

1. True device tree source file;
2. With a lots of comments for documentation purposes;
3. Could be compiled (via imaginable dts-doxygen) into .txt or nice .pdf
   file and printed :-), exactly as we do with kerneldoc.

For example, this

- - - -
   e) I2C

   Required properties :

    - device_type : Should be "i2c"
    - reg : Offset and length of the register set for the device

   Recommended properties :

    - compatible : Should be "fsl-i2c" for parts compatible with
      Freescale I2C specifications.
    - interrupts : <a b> where a is the interrupt number and b is a
      field that represents an encoding of the sense and level
      information for the interrupt.  This should be encoded based on
      the information in section 2) depending on the type of interrupt
      controller you have.
    - interrupt-parent : the phandle for the interrupt controller that
      services interrupts for this device.
    - dfsrr : boolean; if defined, indicates that this I2C device has
      a digital filter sampling rate register
    - fsl5200-clocking : boolean; if defined, indicated that this device
      uses the FSL 5200 clocking mechanism.

   Example :

	i2c@3000 {
		interrupt-parent = <40000>;
		interrupts = <1b 3>;
		reg = <3000 18>;
		device_type = "i2c";
		compatible  = "fsl-i2c";
		dfsrr;
	};
- - - -

Turns into

- - - -
/* Freescale I2C controller */
i2c@3000 {
	/* the phandle for the interrupt controller that services interrupts
	 * for this device. */
	interrupt-parent = <40000>;

	/* interrupts: <a b> where a is the interrupt number and b is a
	 * field that represents an encoding of the sense and level
	 * information for the interrupt.  This should be encoded based on
	 * the information in section 2) depending on the type of interrupt
	 * controller you have. */
	interrupts = <1b 3>;

	/* offset and length of the register set for the device */
	reg = <3000 18>;

	/* deprecated; */
	device_type = "i2c";

	/* should be "fsl-i2c" for parts compatible with Freescale I2C
	 * specifications. */
	compatible  = "fsl-i2c";

	/* optional; boolean; if defined, indicates that this I2C device has
 	 * a digital filter sampling rate register */
	dfsrr;

	/* optional; boolean; if defined, indicated that this device
	 * uses the FSL 5200 clocking mechanism. */
	fsl5200-clocking;
};
- - - -

Or is this too wild? :-)

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

^ permalink raw reply

* RE: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: John Linn @ 2008-07-03 17:59 UTC (permalink / raw)
  To: Grant Likely, Dmitry Torokhov; +Cc: linuxppc-dev, Sadanand Mutyala, linux-input
In-Reply-To: <20080703174229.GL2284@secretlab.ca>

In reviewing the data sheet for the device, I don't see any shared
information between the 2 channels of the device.

The mutex looks like it's not needed to me also.  =


I'll review with some others here to make sure I'm not overlooking
something. =


-- John

> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant
Likely
> Sent: Thursday, July 03, 2008 11:42 AM
> To: Dmitry Torokhov
> Cc: John Linn; linuxppc-dev@ozlabs.org; linux-input@vger.kernel.org;
jwboyer@linux.vnet.ibm.com;
> jacmet@sunsite.dk; Sadanand Mutyala
> Subject: Re: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2
driver
> =

> On Thu, Jul 03, 2008 at 01:27:00PM -0400, Dmitry Torokhov wrote:
> > Hi John,
> >
> > On Thu, Jul 03, 2008 at 09:42:31AM -0700, John Linn wrote:
> > > +
> > > +	/* Initialize the PS/2 interface */
> > > +	mutex_lock(&drvdata->cfg_mutex);
> > > +	if (xps2_initialize(drvdata)) {
> > > +		mutex_unlock(&drvdata->cfg_mutex);
> > > +		dev_err(dev, "Could not initialize device\n");
> > > +		retval =3D -ENODEV;
> > > +		goto failed3;
> > > +	}
> > > +	mutex_unlock(&drvdata->cfg_mutex);
> >
> > The drvdata is allocated per-port and so both (there are 2 PS/2
ports,
> > right?) ports get their own copy of cfg_mutex. Since you are trying
to
> > serialze access to resource shared by both ports it will not work.
> > The original driver-global mutex was appropriate (the only thing I
> > objected there was use of a counting semaphore instead of a mutex).
> =

> John, correct me if I'm wrong, but I don't think there are any shared
> resources being accessed here and I believe the mutex is entirely
> unnecessary.
> =

> Cheers,
> g.


This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
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hments. Delete this email message and any attachments immediately.

^ permalink raw reply

* Re: [PATCH] powerpc: add FHCI USB, FSL MCU, FSL UPM and GPIO LEDs bindings
From: Kumar Gala @ 2008-07-03 18:39 UTC (permalink / raw)
  To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080703182440.GA2576@polina.dev.rtsoft.ru>


On Jul 3, 2008, at 1:24 PM, Anton Vorontsov wrote:

> On Thu, Jul 03, 2008 at 12:50:01PM -0500, Kumar Gala wrote:
>>
>> On Jul 3, 2008, at 12:48 PM, Anton Vorontsov wrote:
>>
>>> This patch adds few bindings for the new drivers to be submitted
>>> through
>>> the appropriate maintainers.
>>>
>>> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
>>> ---
>>>
>>> Segher, thanks for the comments on the previous version. Do you see
>>> any
>>> issues with this one or anything I could improve further?
>>>
>>> And if there are no issues... Kumar, could you apply this for
>>> powerpc-next?
>>>
>>> Thanks.
>>>
>>> Documentation/powerpc/booting-without-of.txt |  111 +++++++++++++++ 
>>> ++
>>> +++++++++
>>> 1 files changed, 111 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/Documentation/powerpc/booting-without-of.txt b/
>>> Documentation/powerpc/booting-without-of.txt
>>> index b68684d..a7ea549 100644
>>> --- a/Documentation/powerpc/booting-without-of.txt
>>> +++ b/Documentation/powerpc/booting-without-of.txt
>>> @@ -62,6 +62,10 @@ Table of Contents
>>>      s) Freescale on board FPGA
>>>      t) Freescael MSI interrupt controller
>>>      u) Freescale General-purpose Timers Module
>>> +      v) Freescale QUICC Engine USB Controller
>>> +      w) Freescale MCU with MPC8349E-mITX compatible firmware
>>
>> MCU doesn't mean much to me.  Its good to expand out the acronym at
>> least once.
>
> MCU stands for MicroController Unit, and even expanded this doesn't
> mean much to anybody. :-) Freescale documentation names it as boards'
> "MCU Subsystem", that is, the chip provides fan control, GPIOs,
> software halt, etc. Basically, it is boards' power management  
> companion
> chip. I don't know how to name it more correctly, so I adhered to
> documentation's naming (they simply call it MCU).
>
> ^^ I'll add some of these words to the node description though.

I agree, but MicroController lets me a know a bit more than the random  
letters M-C-U.  Just one reference in the heading is sufficient.

- k

^ permalink raw reply

* Re: New fsl device bindings file
From: Kumar Gala @ 2008-07-03 18:38 UTC (permalink / raw)
  To: Grant Likely; +Cc: Scott Wood, linuxppc-dev list
In-Reply-To: <fa686aa40807031134s4ddd0cabj1b31d3ee2d9d2258@mail.gmail.com>


On Jul 3, 2008, at 1:34 PM, Grant Likely wrote:

> On Thu, Jul 3, 2008 at 12:28 PM, Scott Wood  
> <scottwood@freescale.com> wrote:
>> Kumar Gala wrote:
>>>
>>> I'm sure you'll hate for doing this, but I've asked Kim to create  
>>> a new
>>> Documentation/powerpc/fsl-device-tree-bindings.txt as part of his  
>>> SEC patch.
>>>
>>> I'm going to move all the Freescale SoC related bindings into this  
>>> new
>>> file.  One of the aspects of the new file is we will NOT having an  
>>> ordinal
>>> heading index.
>
> Not at all.  This is much needed.  The current file is far to unwieldy
>
>>
>> How about splitting up like this:
>>
>> Documentation/powerpc/device-tree/fsl/cpm.txt
>> Documentation/powerpc/device-tree/fsl/cpm/uart.txt
>> Documentation/powerpc/device-tree/fsl/tsec.txt
>> Documentation/powerpc/device-tree/interrupts.txt
>> Documentation/powerpc/device-tree/dtb.txt
>
> May I suggest moving it to Documentation/of-bindings/ instead?  Some
> of these bindings (granted, not the fsl ones) will be used by
> non-powerpc platforms (sparc, microblaze).

I think the powerpc bindings should still be under Docs/powerpc/of- 
bindings/

It makes it cleaner in that each arch/sub-arch maintainer can maintain  
Docs/<arch>/of-bindings and we can all vet changes to Docs/of-bindings

- k

^ permalink raw reply

* Re: New fsl device bindings file
From: Kumar Gala @ 2008-07-03 18:36 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev list
In-Reply-To: <486D1A58.8010403@freescale.com>


On Jul 3, 2008, at 1:28 PM, Scott Wood wrote:

> Kumar Gala wrote:
>> I'm sure you'll hate for doing this, but I've asked Kim to create a  
>> new Documentation/powerpc/fsl-device-tree-bindings.txt as part of  
>> his SEC patch.
>> I'm going to move all the Freescale SoC related bindings into this  
>> new file.  One of the aspects of the new file is we will NOT having  
>> an ordinal heading index.
>
> How about splitting up like this:
>
> Documentation/powerpc/device-tree/fsl/cpm.txt
> Documentation/powerpc/device-tree/fsl/cpm/uart.txt
> Documentation/powerpc/device-tree/fsl/tsec.txt
> Documentation/powerpc/device-tree/interrupts.txt
> Documentation/powerpc/device-tree/dtb.txt
>
> etc?

I like this, we can start with just the fsl/ dirs for now and see if  
others feelings on the other higher level bits.

- k

^ permalink raw reply

* Re: New fsl device bindings file
From: Grant Likely @ 2008-07-03 18:34 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev list
In-Reply-To: <486D1A58.8010403@freescale.com>

On Thu, Jul 3, 2008 at 12:28 PM, Scott Wood <scottwood@freescale.com> wrote:
> Kumar Gala wrote:
>>
>> I'm sure you'll hate for doing this, but I've asked Kim to create a new
>> Documentation/powerpc/fsl-device-tree-bindings.txt as part of his SEC patch.
>>
>> I'm going to move all the Freescale SoC related bindings into this new
>> file.  One of the aspects of the new file is we will NOT having an ordinal
>> heading index.

Not at all.  This is much needed.  The current file is far to unwieldy

>
> How about splitting up like this:
>
> Documentation/powerpc/device-tree/fsl/cpm.txt
> Documentation/powerpc/device-tree/fsl/cpm/uart.txt
> Documentation/powerpc/device-tree/fsl/tsec.txt
> Documentation/powerpc/device-tree/interrupts.txt
> Documentation/powerpc/device-tree/dtb.txt

May I suggest moving it to Documentation/of-bindings/ instead?  Some
of these bindings (granted, not the fsl ones) will be used by
non-powerpc platforms (sparc, microblaze).

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

^ permalink raw reply

* Re: New fsl device bindings file
From: Scott Wood @ 2008-07-03 18:28 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev list
In-Reply-To: <40B88BFD-1FEB-4E36-9917-54C7380FF801@kernel.crashing.org>

Kumar Gala wrote:
> I'm sure you'll hate for doing this, but I've asked Kim to create a new 
> Documentation/powerpc/fsl-device-tree-bindings.txt as part of his SEC 
> patch.
> 
> I'm going to move all the Freescale SoC related bindings into this new 
> file.  One of the aspects of the new file is we will NOT having an 
> ordinal heading index.

How about splitting up like this:

Documentation/powerpc/device-tree/fsl/cpm.txt
Documentation/powerpc/device-tree/fsl/cpm/uart.txt
Documentation/powerpc/device-tree/fsl/tsec.txt
Documentation/powerpc/device-tree/interrupts.txt
Documentation/powerpc/device-tree/dtb.txt

etc?

-Scott

^ permalink raw reply

* Re: [PATCH] powerpc: add FHCI USB, FSL MCU, FSL UPM and GPIO LEDs bindings
From: Anton Vorontsov @ 2008-07-03 18:24 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <EC062FA3-9CF8-4A94-95C7-2AAF22754A9C@kernel.crashing.org>

On Thu, Jul 03, 2008 at 12:50:01PM -0500, Kumar Gala wrote:
>
> On Jul 3, 2008, at 12:48 PM, Anton Vorontsov wrote:
>
>> This patch adds few bindings for the new drivers to be submitted  
>> through
>> the appropriate maintainers.
>>
>> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
>> ---
>>
>> Segher, thanks for the comments on the previous version. Do you see  
>> any
>> issues with this one or anything I could improve further?
>>
>> And if there are no issues... Kumar, could you apply this for  
>> powerpc-next?
>>
>> Thanks.
>>
>> Documentation/powerpc/booting-without-of.txt |  111 +++++++++++++++++ 
>> +++++++++
>> 1 files changed, 111 insertions(+), 0 deletions(-)
>>
>> diff --git a/Documentation/powerpc/booting-without-of.txt b/ 
>> Documentation/powerpc/booting-without-of.txt
>> index b68684d..a7ea549 100644
>> --- a/Documentation/powerpc/booting-without-of.txt
>> +++ b/Documentation/powerpc/booting-without-of.txt
>> @@ -62,6 +62,10 @@ Table of Contents
>>       s) Freescale on board FPGA
>>       t) Freescael MSI interrupt controller
>>       u) Freescale General-purpose Timers Module
>> +      v) Freescale QUICC Engine USB Controller
>> +      w) Freescale MCU with MPC8349E-mITX compatible firmware
>
> MCU doesn't mean much to me.  Its good to expand out the acronym at  
> least once.

MCU stands for MicroController Unit, and even expanded this doesn't
mean much to anybody. :-) Freescale documentation names it as boards'
"MCU Subsystem", that is, the chip provides fan control, GPIOs,
software halt, etc. Basically, it is boards' power management companion
chip. I don't know how to name it more correctly, so I adhered to
documentation's naming (they simply call it MCU).

^^ I'll add some of these words to the node description though.

Thanks,

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

^ permalink raw reply

* New fsl device bindings file
From: Kumar Gala @ 2008-07-03 18:20 UTC (permalink / raw)
  To: Anton Vorontsov, Laurent Pinchart, Jochen Friedrich; +Cc: linuxppc-dev list

Guys,

I'm sure you'll hate for doing this, but I've asked Kim to create a  
new Documentation/powerpc/fsl-device-tree-bindings.txt as part of his  
SEC patch.

I'm going to move all the Freescale SoC related bindings into this new  
file.  One of the aspects of the new file is we will NOT having an  
ordinal heading index.

Once I accept his new patch that add bindings to the new file.

thanks

- k

^ permalink raw reply

* Re: [PATCH] powerpc: add FHCI USB, FSL MCU, FSL UPM and GPIO LEDs bindings
From: Kumar Gala @ 2008-07-03 17:50 UTC (permalink / raw)
  To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080703174844.GA27966@polina.dev.rtsoft.ru>


On Jul 3, 2008, at 12:48 PM, Anton Vorontsov wrote:

> This patch adds few bindings for the new drivers to be submitted  
> through
> the appropriate maintainers.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
>
> Segher, thanks for the comments on the previous version. Do you see  
> any
> issues with this one or anything I could improve further?
>
> And if there are no issues... Kumar, could you apply this for  
> powerpc-next?
>
> Thanks.
>
> Documentation/powerpc/booting-without-of.txt |  111 +++++++++++++++++ 
> +++++++++
> 1 files changed, 111 insertions(+), 0 deletions(-)
>
> diff --git a/Documentation/powerpc/booting-without-of.txt b/ 
> Documentation/powerpc/booting-without-of.txt
> index b68684d..a7ea549 100644
> --- a/Documentation/powerpc/booting-without-of.txt
> +++ b/Documentation/powerpc/booting-without-of.txt
> @@ -62,6 +62,10 @@ Table of Contents
>       s) Freescale on board FPGA
>       t) Freescael MSI interrupt controller
>       u) Freescale General-purpose Timers Module
> +      v) Freescale QUICC Engine USB Controller
> +      w) Freescale MCU with MPC8349E-mITX compatible firmware

MCU doesn't mean much to me.  Its good to expand out the acronym at  
least once.

- k

^ permalink raw reply

* [PATCH] powerpc: add FHCI USB, FSL MCU, FSL UPM and GPIO LEDs bindings
From: Anton Vorontsov @ 2008-07-03 17:48 UTC (permalink / raw)
  To: linuxppc-dev

This patch adds few bindings for the new drivers to be submitted through
the appropriate maintainers.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---

Segher, thanks for the comments on the previous version. Do you see any
issues with this one or anything I could improve further?

And if there are no issues... Kumar, could you apply this for powerpc-next?

Thanks.

 Documentation/powerpc/booting-without-of.txt |  111 ++++++++++++++++++++++++++
 1 files changed, 111 insertions(+), 0 deletions(-)

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index b68684d..a7ea549 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -62,6 +62,10 @@ Table of Contents
       s) Freescale on board FPGA
       t) Freescael MSI interrupt controller
       u) Freescale General-purpose Timers Module
+      v) Freescale QUICC Engine USB Controller
+      w) Freescale MCU with MPC8349E-mITX compatible firmware
+      x) Freescale Localbus UPM programmed to work with NAND flash
+      y) LEDs on GPIOs
 
   VII - Marvell Discovery mv64[345]6x System Controller chips
     1) The /system-controller node
@@ -2967,6 +2971,113 @@ platforms are moved over to use the flattened-device-tree model.
 	clock-frequency = <0>;
     };
 
+    v) Freescale QUICC Engine USB Controller
+
+    Required properties:
+      - compatible : should be "fsl,<chip>-qe-usb", "fsl,mpc8323-qe-usb";
+      - reg : the first two cells should contain usb registers location and
+        length, the next two two cells should contain PRAM location and
+        length.
+      - interrupts : should contain USB interrupt.
+      - interrupt-parent : interrupt source phandle.
+      - fsl,fullspeed-clock : specifies the full speed USB clock source:
+        "none": clock source is disabled
+        "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+        "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+      - fsl,lowspeed-clock : specifies the low speed USB clock source:
+        "none": clock source is disabled
+        "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+        "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+      - hub-power-budget : optional, USB power budget for the root hub, in mA.
+      - gpios : should specify GPIOs in this order: USBOE, USBTP, USBTN, USBRP,
+        USBRN, SPEED (optional), and POWER (optional).
+
+    Example:
+
+	usb@6c0 {
+		compatible = "fsl,mpc8360-qe-usb", "fsl,mpc8323-qe-usb";
+		reg = <0x6c0 0x40 0x8b00 0x100>;
+		interrupts = <11>;
+		interrupt-parent = <&qeic>;
+		fsl,fullspeed-clock = "clk21";
+		gpios = <&qe_pio_b  2 0 /* USBOE */
+			 &qe_pio_b  3 0 /* USBTP */
+			 &qe_pio_b  8 0 /* USBTN */
+			 &qe_pio_b  9 0 /* USBRP */
+			 &qe_pio_b 11 0 /* USBRN */
+			 &qe_pio_e 20 0 /* SPEED */
+			 &qe_pio_e 21 0 /* POWER */>;
+	};
+
+    w) Freescale MCU with MPC8349E-mITX compatible firmware
+
+    Required properties:
+      - compatible : "fsl,<mcu-chip>-<board>", "fsl,mcu-mpc8349emitx";
+      - reg : should specify I2C address (0x0a).
+      - #gpio-cells : should be 2.
+      - gpio-controller : should be present;
+
+    Example:
+
+	mcu_pio: mcu@0a {
+		#gpio-cells = <2>;
+		compatible = "fsl,mc9s08qg8-mpc8349emitx",
+			     "fsl,mcu-mpc8349emitx";
+		reg = <0x0a>;
+		gpio-controller;
+	};
+
+    x) Freescale Localbus UPM programmed to work with NAND flash
+
+      Required properties:
+      - compatible : "fsl,upm-nand".
+      - reg : should specify localbus chip select and size used for the chip.
+      - fsl,upm-addr-offset : UPM pattern offset for the address latch.
+      - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
+      - gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
+
+      Example:
+
+	upm@1,0 {
+		compatible = "fsl,upm-nand";
+		reg = <1 0 1>;
+		fsl,upm-addr-offset = <16>;
+		fsl,upm-cmd-offset = <8>;
+		gpios = <&qe_pio_e 18 0>;
+
+		flash {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "...";
+
+			partition@0 {
+				...
+			};
+		};
+	};
+
+    y) LEDs on GPIOs
+
+    Required properties:
+      - compatible : should be "gpio-led".
+      - label : (optional) the label for this LED. If omitted, the label is
+        taken from the node name (excluding the unit address).
+      - gpios : should specify LED GPIO.
+
+    Example:
+
+	led@0 {
+		compatible = "gpio-led";
+		label = "hdd";
+		gpios = <&mcu_pio 0 1>;
+	};
+
+	led@1 {
+		compatible = "gpio-led";
+		label = "pwr";
+		gpios = <&mcu_pio 1 0>;
+	};
+
 VII - Marvell Discovery mv64[345]6x System Controller chips
 ===========================================================
 
-- 
1.5.5.4

^ permalink raw reply related

* Re: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: Grant Likely @ 2008-07-03 17:42 UTC (permalink / raw)
  To: Dmitry Torokhov; +Cc: Sadanand, linuxppc-dev, linux-input, John Linn
In-Reply-To: <20080703132305.ZZRA012@mailhub.coreip.homeip.net>

On Thu, Jul 03, 2008 at 01:27:00PM -0400, Dmitry Torokhov wrote:
> Hi John,
> 
> On Thu, Jul 03, 2008 at 09:42:31AM -0700, John Linn wrote:
> > +
> > +	/* Initialize the PS/2 interface */
> > +	mutex_lock(&drvdata->cfg_mutex);
> > +	if (xps2_initialize(drvdata)) {
> > +		mutex_unlock(&drvdata->cfg_mutex);
> > +		dev_err(dev, "Could not initialize device\n");
> > +		retval = -ENODEV;
> > +		goto failed3;
> > +	}
> > +	mutex_unlock(&drvdata->cfg_mutex);
> 
> The drvdata is allocated per-port and so both (there are 2 PS/2 ports,
> right?) ports get their own copy of cfg_mutex. Since you are trying to
> serialze access to resource shared by both ports it will not work.
> The original driver-global mutex was appropriate (the only thing I
> objected there was use of a counting semaphore instead of a mutex).

John, correct me if I'm wrong, but I don't think there are any shared
resources being accessed here and I believe the mutex is entirely
unnecessary.

Cheers,
g.

^ permalink raw reply

* Re: [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: Grant Likely @ 2008-07-03 17:37 UTC (permalink / raw)
  To: John Linn; +Cc: Sadanand, dmitry.torokhov, linuxppc-dev, linux-input
In-Reply-To: <20080703164235.37739A006B@mail196-wa4.bigfish.com>

On Thu, Jul 03, 2008 at 09:42:31AM -0700, John Linn wrote:
> Added a new driver for Xilinx XPS PS2 IP. This driver is
> a flat driver to better match the Linux driver pattern.
> 
> Signed-off-by: Sadanand <sadanan@xilinx.com>
> Signed-off-by: John Linn <john.linn@xilinx.com>
> ---
> V2
> 	Updated the driver based on feedback from Dmitry, Peter, and Grant.
> 	We believe Montavista copyright is still valid.
> 
>  drivers/input/serio/Kconfig      |    5 +
>  drivers/input/serio/Makefile     |    1 +
>  drivers/input/serio/xilinx_ps2.c |  448 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 454 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/input/serio/xilinx_ps2.c
> 
> diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
> index ec4b661..0e62b39 100644
> --- a/drivers/input/serio/Kconfig
> +++ b/drivers/input/serio/Kconfig
> @@ -190,4 +190,9 @@ config SERIO_RAW
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called serio_raw.
>  
> +config SERIO_XILINX_XPS_PS2
> +	tristate "Xilinx XPS PS/2 Controller Support"
> +	help
> +	  This driver supports XPS PS/2 IP from Xilinx EDK.
> +
>  endif
> diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
> index 38b8868..9b6c813 100644
> --- a/drivers/input/serio/Makefile
> +++ b/drivers/input/serio/Makefile
> @@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2)	+= pcips2.o
>  obj-$(CONFIG_SERIO_MACEPS2)	+= maceps2.o
>  obj-$(CONFIG_SERIO_LIBPS2)	+= libps2.o
>  obj-$(CONFIG_SERIO_RAW)		+= serio_raw.o
> +obj-$(CONFIG_SERIO_XILINX_XPS_PS2)	+= xilinx_ps2.o
> diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
> new file mode 100644
> index 0000000..152bf2c
> --- /dev/null
> +++ b/drivers/input/serio/xilinx_ps2.c
> @@ -0,0 +1,448 @@
> +/*
> + * Xilinx XPS PS/2 device driver
> + *
> + * (c) 2005 MontaVista Software, Inc.
> + * (c) 2008 Xilinx, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, write to the Free Software Foundation, Inc.,
> + * 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +
> +#include <linux/module.h>
> +#include <linux/serio.h>
> +#include <linux/interrupt.h>
> +#include <linux/errno.h>
> +#include <linux/init.h>
> +#include <linux/list.h>
> +#include <linux/io.h>
> +
> +#include <linux/of_device.h>
> +#include <linux/of_platform.h>
> +
> +#define DRIVER_NAME		"xilinx_ps2"
> +
> +/* Register offsets for the xps2 device */
> +#define XPS2_SRST_OFFSET	0x00000000 /* Software Reset register */
> +#define XPS2_STATUS_OFFSET	0x00000004 /* Status register */
> +#define XPS2_RX_DATA_OFFSET	0x00000008 /* Receive Data register */
> +#define XPS2_TX_DATA_OFFSET	0x0000000C /* Transmit Data register */
> +#define XPS2_GIER_OFFSET	0x0000002C /* Global Interrupt Enable reg */
> +#define XPS2_IPISR_OFFSET	0x00000030 /* Interrupt Status register */
> +#define XPS2_IPIER_OFFSET	0x00000038 /* Interrupt Enable register */
> +
> +/* Reset Register Bit Definitions */
> +#define XPS2_SRST_RESET		0x0000000A /* Software Reset  */
> +
> +/* Status Register Bit Positions */
> +#define XPS2_STATUS_RX_FULL	0x00000001 /* Receive Full  */
> +#define XPS2_STATUS_TX_FULL	0x00000002 /* Transmit Full  */
> +
> +/* Bit definitions for ISR/IER registers. Both the registers have the same bit
> + * definitions and are only defined once. */
> +#define XPS2_IPIXR_WDT_TOUT	0x00000001 /* Watchdog Timeout Interrupt */
> +#define XPS2_IPIXR_TX_NOACK	0x00000002 /* Transmit No ACK Interrupt */
> +#define XPS2_IPIXR_TX_ACK	0x00000004 /* Transmit ACK (Data) Interrupt */
> +#define XPS2_IPIXR_RX_OVF	0x00000008 /* Receive Overflow Interrupt */
> +#define XPS2_IPIXR_RX_ERR	0x00000010 /* Receive Error Interrupt */
> +#define XPS2_IPIXR_RX_FULL	0x00000020 /* Receive Data Interrupt */
> +
> +/* Mask for all the Transmit Interrupts */
> +#define XPS2_IPIXR_TX_ALL	(XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_TX_ACK)
> +
> +/* Mask for all the Receive Interrupts */
> +#define XPS2_IPIXR_RX_ALL	(XPS2_IPIXR_RX_OVF | XPS2_IPIXR_RX_ERR |  \
> +					XPS2_IPIXR_RX_FULL)
> +
> +/* Mask for all the Interrupts */
> +#define XPS2_IPIXR_ALL		(XPS2_IPIXR_TX_ALL | XPS2_IPIXR_RX_ALL |  \
> +					XPS2_IPIXR_WDT_TOUT)
> +
> +/* Global Interrupt Enable mask */
> +#define XPS2_GIER_GIE_MASK	0x80000000
> +
> +struct xps2data {
> +	int irq;
> +	u32 phys_addr;
> +	u32 remap_size;
> +	spinlock_t lock;
> +	u8 rxb;				/* Rx buffer */
> +	void __iomem *base_address;	/* virt. address of control registers */
> +	unsigned int dfl;
> +	struct serio serio;		/* serio */
> +	struct mutex cfg_mutex;
> +};
> +
> +/************************************/
> +/* XPS PS/2 data transmission calls */
> +/************************************/
> +
> +/*
> + * xps2_send() sends the specified byte of data to the PS/2 port.
> + */
> +static int xps2_send(struct xps2data *drvdata, u8 *byte)
> +{
> +	u32 sr;
> +	u32 ier;
> +	int retval = -1;
> +
> +	/* Enter a critical region by disabling the PS/2 transmit interrupts to
> +	 * allow this call to stop a previous operation that may be interrupt
> +	 * driven. Only stop the transmit interrupt since this critical region
> +	 * is not really exited in the normal manner */
> +	ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
> +	ier &= (~(XPS2_IPIXR_TX_ALL & XPS2_IPIXR_ALL));
> +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
> +
> +	/* If the PS/2 transmitter is empty send a byte of data */
> +	sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
> +	if ((sr & XPS2_STATUS_TX_FULL) == 0) {
> +		out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, *byte);
> +		retval = 0;
> +	}
> +
> +	/* Enable the TX interrupts to track the status of the transmission */
> +	ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
> +	ier |= (XPS2_IPIXR_TX_ALL | XPS2_IPIXR_WDT_TOUT);
> +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);

If this is a critical region, Wouldn't it be more appropriate to use a
spinlock with spin_lock_irqsave()/spin_unlock_irqrestore()  here?

...

Actually, looking deeper into the file; xps2_send() is already protected
with a spin lock w/ irqsave.  Why do interrupts need to be disabled
at all?  It looks like this whole routine could be collapsed into a
about three lines of code in the sxps2_write() function.

> +
> +	return retval;
> +}
> +
> +/*
> + * xps2_recv() will attempt to receive a byte of data from the PS/2 port.
> + */
> +static int xps2_recv(struct xps2data *drvdata, u8 *byte)
> +{
> +	u32 sr;
> +	int retval = -1;
> +
> +	/* If there is data available in the PS/2 receiver, read it */
> +	sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
> +	if (sr & XPS2_STATUS_RX_FULL) {
> +		*byte = in_be32(drvdata->base_address + XPS2_RX_DATA_OFFSET);
> +		retval = 0;
> +	}
> +
> +	return retval;
> +}
> +
> +/*********************/
> +/* Interrupt handler */
> +/*********************/
> +static irqreturn_t xps2_interrupt(int irq, void *dev_id)
> +{
> +	struct xps2data *drvdata = (struct xps2data *)dev_id;
> +	u32 intr_sr;
> +	u32 ier;
> +	u8 c;
> +	u8 retval;
> +
> +	/* Get the PS/2 interrupts and clear them */
> +	intr_sr = in_be32(drvdata->base_address + XPS2_IPISR_OFFSET);
> +	out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr);
> +
> +	/* Check which interrupt is active */
> +	if (intr_sr & XPS2_IPIXR_RX_OVF) {
> +		printk(KERN_ERR "%s: receive overrun error\n",
> +			drvdata->serio.name);
> +	}
> +
> +	if (intr_sr & XPS2_IPIXR_RX_ERR)
> +		drvdata->dfl |= SERIO_PARITY;
> +
> +	if (intr_sr & (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_WDT_TOUT))
> +		drvdata->dfl |= SERIO_TIMEOUT;
> +
> +	if (intr_sr & XPS2_IPIXR_RX_FULL) {
> +		retval = xps2_recv(drvdata, &drvdata->rxb);
> +
> +		/* Error, if a byte is not received */
> +		if (retval) {
> +			printk(KERN_ERR
> +				"%s: wrong rcvd byte count (%d)\n",
> +				drvdata->serio.name, retval);
> +		} else {
> +			c = drvdata->rxb;
> +			serio_interrupt(&drvdata->serio, c, drvdata->dfl);
> +			drvdata->dfl = 0;
> +		}
> +	}
> +
> +	if (intr_sr & XPS2_IPIXR_TX_ACK) {
> +
> +		/* Disable the TX interrupts after the transmission is
> +		 * complete */
> +		ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
> +		ier &= (~(XPS2_IPIXR_TX_ACK & XPS2_IPIXR_ALL));
> +		out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
> +		drvdata->dfl = 0;
> +	}
> +
> +	return IRQ_HANDLED;
> +}
> +
> +/*******************/
> +/* serio callbacks */
> +/*******************/
> +
> +/*
> + *	sxps2_write() - sends a byte out through the PS/2 interface.
> + */
> +static int sxps2_write(struct serio *pserio, unsigned char c)
> +{
> +	struct xps2data *drvdata = pserio->port_data;
> +	unsigned long flags;
> +	int retval;
> +
> +	spin_lock_irqsave(&drvdata->lock, flags);
> +	retval = xps2_send(drvdata, &c);
> +	spin_unlock_irqrestore(&drvdata->lock, flags);
> +
> +	return retval;
> +}
> +
> +/*
> + * sxps2_open() is called when a port is open by the higher layer.
> + */
> +static int sxps2_open(struct serio *pserio)
> +{
> +	struct xps2data *drvdata = pserio->port_data;
> +	int retval;
> +
> +	retval = request_irq(drvdata->irq, &xps2_interrupt, 0,
> +				DRIVER_NAME, drvdata);
> +	if (retval) {
> +		printk(KERN_ERR
> +			"%s: Couldn't allocate interrupt %d\n",
> +			drvdata->serio.name, drvdata->irq);
> +		return retval;
> +	}
> +
> +	/* start reception by enabling the interrupts */
> +	out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK);
> +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL);
> +	(void)xps2_recv(drvdata, &drvdata->rxb);
> +
> +	return 0;		/* success */
> +}
> +
> +/*
> + * sxps2_close() frees the interrupt.
> + */
> +static void sxps2_close(struct serio *pserio)
> +{
> +	struct xps2data *drvdata = pserio->port_data;
> +
> +	/* Disable the PS2 interrupts */
> +	out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00);
> +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00);
> +	free_irq(drvdata->irq, drvdata);
> +}
> +
> +/******************************/
> +/* Device initialization code */
> +/******************************/
> +
> +/*
> + * xps2_initialize() initializes the Xilinx PS/2 device.
> + */
> +static int xps2_initialize(struct xps2data *drvdata)
> +{
> +	/* Disable all the interrupts, just in case */
> +	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0);
> +
> +	/* Reset the PS2 device and abort any current transaction, to make sure
> +	 * we have the PS2 in a good state */
> +	out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET);
> +
> +	return 0;
> +}

This function is only called by xps2_setup() and should probably be
collapsed into it.

> +
> +/*
> + * XPS PS2 device setup code.
> + */
> +static int xps2_setup(struct device *dev, int id, struct resource *regs_res,
> +			struct resource *irq_res)
> +{
> +	struct xps2data *drvdata;
> +	struct serio *serio;
> +	unsigned long remap_size;
> +	int retval;
> +
> +	if (!dev)
> +		return -EINVAL;
> +
> +	drvdata = kzalloc(sizeof(struct xps2data), GFP_KERNEL);
> +	if (!drvdata) {
> +		dev_err(dev, "Couldn't allocate device private record\n");
> +		return -ENOMEM;
> +	}
> +	spin_lock_init(&drvdata->lock);
> +	mutex_init(&drvdata->cfg_mutex);
> +	dev_set_drvdata(dev, drvdata);
> +
> +	if (!regs_res || !irq_res) {
> +		dev_err(dev, "IO resource(s) not found\n");
> +		retval = -EFAULT;
> +		goto failed1;
> +	}
> +
> +	drvdata->irq = irq_res->start;
> +	remap_size = regs_res->end - regs_res->start + 1;
> +	if (!request_mem_region(regs_res->start, remap_size, DRIVER_NAME)) {
> +
> +		dev_err(dev, "Couldn't lock memory region at 0x%08X\n",
> +			(unsigned int)regs_res->start);
> +		retval = -EBUSY;
> +		goto failed1;
> +	}
> +
> +	/* Fill in configuration data and add them to the list */
> +	drvdata->phys_addr = regs_res->start;
> +	drvdata->remap_size = remap_size;
> +	drvdata->base_address = ioremap(regs_res->start, remap_size);
> +	if (drvdata->base_address == NULL) {
> +
> +		dev_err(dev, "Couldn't ioremap memory at 0x%08X\n",
> +			(unsigned int)regs_res->start);
> +		retval = -EFAULT;
> +		goto failed2;
> +	}
> +
> +	/* Initialize the PS/2 interface */
> +	mutex_lock(&drvdata->cfg_mutex);
> +	if (xps2_initialize(drvdata)) {
> +		mutex_unlock(&drvdata->cfg_mutex);
> +		dev_err(dev, "Could not initialize device\n");
> +		retval = -ENODEV;
> +		goto failed3;
> +	}
> +	mutex_unlock(&drvdata->cfg_mutex);

This is the only user of cfg_mutex.  The IRQ isn't registered yet, and
the driver isn't registered with the serio layer either so you can just
drop the mutex entirely.

> +
> +	dev_info(dev, "Xilinx PS2 at 0x%08X mapped to 0x%08X, irq=%d\n",
> +		drvdata->phys_addr, (u32)drvdata->base_address, drvdata->irq);
> +
> +	serio = &drvdata->serio;
> +	serio->id.type = SERIO_8042;
> +	serio->write = sxps2_write;
> +	serio->open = sxps2_open;
> +	serio->close = sxps2_close;
> +	serio->port_data = drvdata;
> +	serio->dev.parent = dev;
> +	snprintf(drvdata->serio.name, sizeof(serio->name),
> +		 "Xilinx XPS PS/2 Port #%d", id);
> +	snprintf(drvdata->serio.phys, sizeof(serio->phys),
> +		 "xilinxps2/serio%d", id);
> +	serio_register_port(serio);
> +
> +	return 0;		/* success */
> +
> +failed3:
> +	iounmap(drvdata->base_address);
> +
> +failed2:
> +	release_mem_region(regs_res->start, remap_size);
> +
> +failed1:
> +	kfree(drvdata);
> +	dev_set_drvdata(dev, NULL);
> +
> +	return retval;
> +}
> +
> +/***************************/
> +/* OF Platform Bus Support */
> +/***************************/
> +
> +static int __devinit xps2_of_probe(struct of_device *ofdev, const struct
> +				   of_device_id * match)
> +{
> +	struct resource r_irq_struct;
> +	struct resource r_mem_struct;
> +	struct resource *r_irq = &r_irq_struct;	/* Interrupt resources */
> +	struct resource *r_mem = &r_mem_struct;	/* IO mem resources */

This is very vebose; do this instead:

+	struct resource r_irq;
+	struct resource r_mem;
[...]
+	rc = of_address_to_resource(ofdev->node, 0, &r_mem);
[...]
+	rc = of_irq_to_resource(ofdev->node, 0, &r_irq);
[...]
+	return xps2_setup(&ofdev->dev, id ? *id : -1, &r_mem, &r_irq);

> +	int rc = 0;
> +	const unsigned int *id;
> +
> +	printk(KERN_INFO "Device Tree Probing \'%s\'\n",
> +			ofdev->node->name);
> +
> +	/* Get iospace for the device */
> +	rc = of_address_to_resource(ofdev->node, 0, r_mem);
> +	if (rc) {
> +		dev_warn(&ofdev->dev, "invalid address\n");

Probably should be dev_err(...);

> +		return rc;
> +	}
> +
> +	/* Get IRQ for the device */
> +	rc = of_irq_to_resource(ofdev->node, 0, r_irq);
> +	if (rc == NO_IRQ) {
> +		dev_warn(&ofdev->dev, "no IRQ found\n");

ditto

> +		return rc;
> +	}
> +
> +	id = of_get_property(ofdev->node, "port-number", NULL);

Drop this line.  port-number is a poor way to specify a global value.
If really needed, you should search the aliases node for a matching 
property to get the id.  Otherwise, you should probably fall back to
using the physical address of the device instead of -1.  At least it
guarantees that the value is unique.

> +	return xps2_setup(&ofdev->dev, id ? *id : -1, r_mem, r_irq);
> +}
> +
> +static int __devexit xps2_of_remove(struct of_device *of_dev)
> +{
> +	struct xps2data *drvdata;
> +	struct device *dev;
> +
> +	dev = &of_dev->dev;
> +	if (!dev)
> +		return -EINVAL;
> +
> +	drvdata = (struct xps2data *)dev_get_drvdata(dev);
> +
> +	serio_unregister_port(&drvdata->serio);
> +
> +	iounmap(drvdata->base_address);
> +
> +	release_mem_region(drvdata->phys_addr, drvdata->remap_size);
> +
> +	kfree(drvdata);
> +	dev_set_drvdata(dev, NULL);
> +
> +	return 0;		/* success */
> +}
> +
> +/* Match table for of_platform binding */
> +static struct of_device_id __devinitdata xps2_of_match[] = {

__devinitdata in the wrong place; should be:

+static struct of_device_id xps2_of_match[] __devinitdata = {

> +	{ .compatible = "xlnx,xps-ps2-1.00.a", },
> +	{ /* end of list */ },
> +};
> +MODULE_DEVICE_TABLE(of, xps2_of_match);
> +
> +static struct of_platform_driver xps2_of_driver = {
> +	.name		= DRIVER_NAME,
> +	.match_table	= xps2_of_match,
> +	.probe		= xps2_of_probe,
> +	.remove		= __devexit_p(xps2_of_remove),
> +};
> +
> +static int __init xps2_init(void)
> +{
> +	return of_register_platform_driver(&xps2_of_driver);
> +}
> +
> +static void __exit xps2_cleanup(void)
> +{
> +	of_unregister_platform_driver(&xps2_of_driver);
> +}
> +
> +module_init(xps2_init);
> +module_exit(xps2_cleanup);
> +
> +MODULE_AUTHOR("Xilinx, Inc.");
> +MODULE_DESCRIPTION("Xilinx XPS PS/2 driver");
> +MODULE_LICENSE("GPL");
> +
> -- 
> 1.5.2.1
> 
> 
> 
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