* Re: [PATCH] libfdt: Improve documentation in libfdt.h
From: David Gibson @ 2008-07-10 1:38 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linuxppc-dev
In-Reply-To: <20080709092243.10615.84477.stgit@leda.ptxnet.pengutronix.de>
On Wed, Jul 09, 2008 at 11:22:44AM +0200, Wolfram Sang wrote:
> Fix a few typos and mistakes.
Oops, some of those are rather embarrassing.
> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH v3] Add MPC5200B base board mvBC-P
From: David Gibson @ 2008-07-10 1:37 UTC (permalink / raw)
To: Andre Schwarz; +Cc: linux-ppc list
In-Reply-To: <4874821D.4010006@matrix-vision.de>
On Wed, Jul 09, 2008 at 11:17:17AM +0200, Andre Schwarz wrote:
> The mvBlueCOUGAR-P is a MPC5200B based camera system with Intel Gigabit ethernet
> controller (using e1000). It's just another MPC5200_simple board.
>
> Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
> ---
>
> Grant,
>
> I've fixed the dts issues from David (cell-index on gpt).
Sorry, found a couple more tiny ones.
[snip]
> +/dts-v1/;
> +
> +/ {
> + model = "matrix-vision,mvbc-p";
> + compatible = "matrix-vision,mvbc-p";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + PowerPC,5200@0 {
> + device_type = "cpu";
> + reg = <0>;
> + d-cache-line-size = <32>;
> + i-cache-line-size = <32>;
> + d-cache-size = <0x4000>;
> + i-cache-size = <0x4000>;
> + timebase-frequency = <0>;
> + bus-frequency = <0>;
> + clock-frequency = <0>;
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x00000000>;
> + };
> +
> + soc5200@f0000000 {
The new convention is to use simply soc@XXX here. However, I think at
least some u-boot versions break without the old name. Except that, I
would have thought the fact you don't need the device_type="soc" field
- also a hack for dealing with older u-boot - meant you had a new
enough u-boot version to cope with soc@.
[snip]
> + nor_total@0x0 {
Err.. the unit addresses in the name should be bare hex, without '0x'
> + reg = <0x0 0x800000>;
> + };
> + u-boot@0x0 {
> + reg = <0x0 0x40000>;
> + };
> + u-boot_autoscript@0x40000 {
> + reg = <0x40000 0x10000>;
> + };
> + u-boot_autoscript_red@0x50000 {
> + reg = <0x50000 0x10000>;
> + };
> + fpga@0x60000 {
> + reg = <0x60000 0x40000>;
> + };
> + user@0xa0000 {
> + reg = <0xa0000 0x60000>;
> + };
> + rfs@0x100000 {
> + reg = <0x100000 0x300000>;
> + };
> + kernel@0x400000 {
> + reg = <0x400000 0x3c0000>;
> + };
> + dtb@0x7c0000 {
> + reg = <0x7c0000 0x10000>;
> + };
> + dtb@0x7d0000 {
> + reg = <0x7d0000 0x10000>;
> + };
> + ppcboot_env@0x7e0000 {
> + reg = <0x7e0000 0x10000>;
> + };
> + ppcboot_env@0x7f0000 {
> + reg = <0x7f0000 0x10000>;
> + };
> + };
> + };
> +
> + pci: pci@0xf0000d00 {
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + device_type = "pci";
> + compatible = "fsl,mpc5200-pci";
> + reg = <0xf0000d00 0x100>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <0x5800 0 0 1 &mpc5200_pic 1 2 3
> + 0x5000 0 0 1 &mpc5200_pic 1 3 3>;
> + clock-frequency = <0>;
> + interrupts = <2 8 0 2 9 0 2 10 0>;
> + interrupt-parent = <&mpc5200_pic>;
> + bus-range = <0 0>;
> + ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
> + 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
> + 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
> + };
> +};
> diff --git a/arch/powerpc/configs/52xx/mvbc_p_defconfig b/arch/powerpc/configs/52xx/mvbc_p_defconfig
> new file mode 100644
> index 0000000..1dd1460
> --- /dev/null
> +++ b/arch/powerpc/configs/52xx/mvbc_p_defconfig
> @@ -0,0 +1,1158 @@
> +#
> +# Automatically generated make config: don't edit
> +# Linux kernel version: 2.6.26-rc6
> +# Fri Jul 4 18:00:23 2008
> +#
> +# CONFIG_PPC64 is not set
> +
> +#
> +# Processor support
> +#
> +CONFIG_6xx=y
> +# CONFIG_PPC_85xx is not set
> +# CONFIG_PPC_8xx is not set
> +# CONFIG_40x is not set
> +# CONFIG_44x is not set
> +# CONFIG_E200 is not set
> +CONFIG_PPC_FPU=y
> +# CONFIG_ALTIVEC is not set
> +CONFIG_PPC_STD_MMU=y
> +CONFIG_PPC_STD_MMU_32=y
> +# CONFIG_PPC_MM_SLICES is not set
> +# CONFIG_SMP is not set
> +CONFIG_PPC32=y
> +CONFIG_WORD_SIZE=32
> +CONFIG_PPC_MERGE=y
> +CONFIG_MMU=y
> +CONFIG_GENERIC_CMOS_UPDATE=y
> +CONFIG_GENERIC_TIME=y
> +CONFIG_GENERIC_TIME_VSYSCALL=y
> +CONFIG_GENERIC_CLOCKEVENTS=y
> +CONFIG_GENERIC_HARDIRQS=y
> +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
> +CONFIG_IRQ_PER_CPU=y
> +CONFIG_STACKTRACE_SUPPORT=y
> +CONFIG_LOCKDEP_SUPPORT=y
> +CONFIG_RWSEM_XCHGADD_ALGORITHM=y
> +CONFIG_ARCH_HAS_ILOG2_U32=y
> +CONFIG_GENERIC_HWEIGHT=y
> +CONFIG_GENERIC_CALIBRATE_DELAY=y
> +CONFIG_GENERIC_FIND_NEXT_BIT=y
> +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
> +CONFIG_PPC=y
> +CONFIG_EARLY_PRINTK=y
> +CONFIG_GENERIC_NVRAM=y
> +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
> +CONFIG_ARCH_MAY_HAVE_PC_FDC=y
> +CONFIG_PPC_OF=y
> +CONFIG_OF=y
> +# CONFIG_PPC_UDBG_16550 is not set
> +# CONFIG_GENERIC_TBSYNC is not set
> +CONFIG_AUDIT_ARCH=y
> +CONFIG_GENERIC_BUG=y
> +CONFIG_DEFAULT_UIMAGE=y
> +# CONFIG_PPC_DCR_NATIVE is not set
> +# CONFIG_PPC_DCR_MMIO is not set
> +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
> +
> +#
> +# General setup
> +#
> +CONFIG_EXPERIMENTAL=y
> +CONFIG_BROKEN_ON_SMP=y
> +CONFIG_LOCK_KERNEL=y
> +CONFIG_INIT_ENV_ARG_LIMIT=32
> +CONFIG_LOCALVERSION=""
> +# CONFIG_LOCALVERSION_AUTO is not set
> +# CONFIG_SWAP is not set
> +CONFIG_SYSVIPC=y
> +CONFIG_SYSVIPC_SYSCTL=y
> +CONFIG_POSIX_MQUEUE=y
> +# CONFIG_BSD_PROCESS_ACCT is not set
> +# CONFIG_TASKSTATS is not set
> +# CONFIG_AUDIT is not set
> +CONFIG_IKCONFIG=y
> +CONFIG_IKCONFIG_PROC=y
> +CONFIG_LOG_BUF_SHIFT=18
> +# CONFIG_CGROUPS is not set
> +CONFIG_GROUP_SCHED=y
> +CONFIG_FAIR_GROUP_SCHED=y
> +CONFIG_RT_GROUP_SCHED=y
> +CONFIG_USER_SCHED=y
> +# CONFIG_CGROUP_SCHED is not set
> +# CONFIG_SYSFS_DEPRECATED_V2 is not set
> +# CONFIG_RELAY is not set
> +# CONFIG_NAMESPACES is not set
> +CONFIG_BLK_DEV_INITRD=y
> +CONFIG_INITRAMFS_SOURCE=""
> +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
> +CONFIG_SYSCTL=y
> +CONFIG_EMBEDDED=y
> +# CONFIG_SYSCTL_SYSCALL is not set
> +CONFIG_KALLSYMS=y
> +CONFIG_KALLSYMS_ALL=y
> +CONFIG_KALLSYMS_EXTRA_PASS=y
> +CONFIG_HOTPLUG=y
> +CONFIG_PRINTK=y
> +# CONFIG_LOGBUFFER is not set
> +CONFIG_BUG=y
> +# CONFIG_ELF_CORE is not set
> +CONFIG_COMPAT_BRK=y
> +CONFIG_BASE_FULL=y
> +CONFIG_FUTEX=y
> +CONFIG_ANON_INODES=y
> +CONFIG_EPOLL=y
> +CONFIG_SIGNALFD=y
> +CONFIG_TIMERFD=y
> +CONFIG_EVENTFD=y
> +# CONFIG_SHMEM is not set
> +# CONFIG_VM_EVENT_COUNTERS is not set
> +# CONFIG_SLUB_DEBUG is not set
> +# CONFIG_SLAB is not set
> +CONFIG_SLUB=y
> +# CONFIG_SLOB is not set
> +# CONFIG_PROFILING is not set
> +# CONFIG_MARKERS is not set
> +CONFIG_HAVE_OPROFILE=y
> +# CONFIG_KPROBES is not set
> +CONFIG_HAVE_KPROBES=y
> +CONFIG_HAVE_KRETPROBES=y
> +# CONFIG_HAVE_DMA_ATTRS is not set
> +# CONFIG_PROC_PAGE_MONITOR is not set
> +CONFIG_RT_MUTEXES=y
> +CONFIG_TINY_SHMEM=y
> +CONFIG_BASE_SMALL=0
> +CONFIG_MODULES=y
> +# CONFIG_MODULE_FORCE_LOAD is not set
> +CONFIG_MODULE_UNLOAD=y
> +# CONFIG_MODULE_FORCE_UNLOAD is not set
> +# CONFIG_MODVERSIONS is not set
> +# CONFIG_MODULE_SRCVERSION_ALL is not set
> +# CONFIG_KMOD is not set
> +CONFIG_BLOCK=y
> +# CONFIG_LBD is not set
> +# CONFIG_BLK_DEV_IO_TRACE is not set
> +# CONFIG_LSF is not set
> +# CONFIG_BLK_DEV_BSG is not set
> +
> +#
> +# IO Schedulers
> +#
> +CONFIG_IOSCHED_NOOP=y
> +# CONFIG_IOSCHED_AS is not set
> +CONFIG_IOSCHED_DEADLINE=y
> +# CONFIG_IOSCHED_CFQ is not set
> +# CONFIG_DEFAULT_AS is not set
> +CONFIG_DEFAULT_DEADLINE=y
> +# CONFIG_DEFAULT_CFQ is not set
> +# CONFIG_DEFAULT_NOOP is not set
> +CONFIG_DEFAULT_IOSCHED="deadline"
> +CONFIG_CLASSIC_RCU=y
> +
> +#
> +# Platform support
> +#
> +CONFIG_PPC_MULTIPLATFORM=y
> +# CONFIG_PPC_82xx is not set
> +# CONFIG_PPC_83xx is not set
> +# CONFIG_PPC_86xx is not set
> +CONFIG_CLASSIC32=y
> +# CONFIG_PPC_CHRP is not set
> +# CONFIG_PPC_MPC512x is not set
> +# CONFIG_PPC_MPC5121 is not set
> +# CONFIG_MPC5121_ADS is not set
> +CONFIG_PPC_MPC52xx=y
> +CONFIG_PPC_MPC5200_SIMPLE=y
> +# CONFIG_PPC_EFIKA is not set
> +# CONFIG_PPC_LITE5200 is not set
> +# CONFIG_PPC_MPC5200_BUGFIX is not set
> +CONFIG_PPC_MPC5200_GPIO=y
> +# CONFIG_PPC_PMAC is not set
> +# CONFIG_PPC_CELL is not set
> +# CONFIG_PPC_CELL_NATIVE is not set
> +# CONFIG_PQ2ADS is not set
> +# CONFIG_EMBEDDED6xx is not set
> +# CONFIG_IPIC is not set
> +# CONFIG_MPIC is not set
> +# CONFIG_MPIC_WEIRD is not set
> +# CONFIG_PPC_I8259 is not set
> +# CONFIG_PPC_RTAS is not set
> +# CONFIG_MMIO_NVRAM is not set
> +# CONFIG_PPC_MPC106 is not set
> +# CONFIG_PPC_970_NAP is not set
> +# CONFIG_PPC_INDIRECT_IO is not set
> +# CONFIG_GENERIC_IOMAP is not set
> +# CONFIG_CPU_FREQ is not set
> +# CONFIG_TAU is not set
> +# CONFIG_FSL_ULI1575 is not set
> +CONFIG_PPC_BESTCOMM=y
> +# CONFIG_PPC_BESTCOMM_ATA is not set
> +# CONFIG_PPC_BESTCOMM_FEC is not set
> +CONFIG_PPC_BESTCOMM_GEN_BD=y
> +
> +#
> +# Kernel options
> +#
> +# CONFIG_HIGHMEM is not set
> +CONFIG_TICK_ONESHOT=y
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
> +# CONFIG_HZ_100 is not set
> +CONFIG_HZ_250=y
> +# CONFIG_HZ_300 is not set
> +# CONFIG_HZ_1000 is not set
> +CONFIG_HZ=250
> +# CONFIG_SCHED_HRTICK is not set
> +# CONFIG_PREEMPT_NONE is not set
> +# CONFIG_PREEMPT_VOLUNTARY is not set
> +CONFIG_PREEMPT=y
> +# CONFIG_PREEMPT_RCU is not set
> +CONFIG_BINFMT_ELF=y
> +# CONFIG_BINFMT_MISC is not set
> +# CONFIG_IOMMU_HELPER is not set
> +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
> +CONFIG_ARCH_HAS_WALK_MEMORY=y
> +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
> +# CONFIG_KEXEC is not set
> +CONFIG_ARCH_FLATMEM_ENABLE=y
> +CONFIG_ARCH_POPULATES_NODE_MAP=y
> +CONFIG_SELECT_MEMORY_MODEL=y
> +CONFIG_FLATMEM_MANUAL=y
> +# CONFIG_DISCONTIGMEM_MANUAL is not set
> +# CONFIG_SPARSEMEM_MANUAL is not set
> +CONFIG_FLATMEM=y
> +CONFIG_FLAT_NODE_MEM_MAP=y
> +# CONFIG_SPARSEMEM_STATIC is not set
> +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
> +CONFIG_PAGEFLAGS_EXTENDED=y
> +CONFIG_SPLIT_PTLOCK_CPUS=4
> +# CONFIG_RESOURCES_64BIT is not set
> +CONFIG_ZONE_DMA_FLAG=1
> +CONFIG_BOUNCE=y
> +CONFIG_VIRT_TO_BUS=y
> +CONFIG_FORCE_MAX_ZONEORDER=11
> +# CONFIG_PROC_DEVICETREE is not set
> +# CONFIG_CMDLINE_BOOL is not set
> +# CONFIG_PM is not set
> +# CONFIG_SECCOMP is not set
> +CONFIG_ISA_DMA_API=y
> +
> +#
> +# Bus options
> +#
> +CONFIG_ZONE_DMA=y
> +CONFIG_GENERIC_ISA_DMA=y
> +# CONFIG_PPC_INDIRECT_PCI is not set
> +CONFIG_FSL_SOC=y
> +CONFIG_PCI=y
> +CONFIG_PCI_DOMAINS=y
> +CONFIG_PCI_SYSCALL=y
> +# CONFIG_PCIEPORTBUS is not set
> +CONFIG_ARCH_SUPPORTS_MSI=y
> +# CONFIG_PCI_MSI is not set
> +# CONFIG_PCI_LEGACY is not set
> +# CONFIG_PCI_DEBUG is not set
> +# CONFIG_PCCARD is not set
> +# CONFIG_HOTPLUG_PCI is not set
> +# CONFIG_HAS_RAPIDIO is not set
> +
> +#
> +# Advanced setup
> +#
> +# CONFIG_ADVANCED_OPTIONS is not set
> +
> +#
> +# Default settings for advanced configuration options are used
> +#
> +CONFIG_LOWMEM_SIZE=0x30000000
> +CONFIG_PAGE_OFFSET=0xc0000000
> +CONFIG_KERNEL_START=0xc0000000
> +CONFIG_PHYSICAL_START=0x00000000
> +CONFIG_TASK_SIZE=0xc0000000
> +
> +#
> +# Networking
> +#
> +CONFIG_NET=y
> +
> +#
> +# Networking options
> +#
> +CONFIG_PACKET=y
> +CONFIG_PACKET_MMAP=y
> +CONFIG_UNIX=y
> +CONFIG_XFRM=y
> +# CONFIG_XFRM_USER is not set
> +# CONFIG_XFRM_SUB_POLICY is not set
> +# CONFIG_XFRM_MIGRATE is not set
> +# CONFIG_XFRM_STATISTICS is not set
> +CONFIG_NET_KEY=y
> +# CONFIG_NET_KEY_MIGRATE is not set
> +CONFIG_INET=y
> +# CONFIG_IP_MULTICAST is not set
> +# CONFIG_IP_ADVANCED_ROUTER is not set
> +CONFIG_IP_FIB_HASH=y
> +CONFIG_IP_PNP=y
> +CONFIG_IP_PNP_DHCP=y
> +# CONFIG_IP_PNP_BOOTP is not set
> +# CONFIG_IP_PNP_RARP is not set
> +# CONFIG_NET_IPIP is not set
> +# CONFIG_NET_IPGRE is not set
> +# CONFIG_ARPD is not set
> +# CONFIG_SYN_COOKIES is not set
> +# CONFIG_INET_AH is not set
> +# CONFIG_INET_ESP is not set
> +# CONFIG_INET_IPCOMP is not set
> +# CONFIG_INET_XFRM_TUNNEL is not set
> +# CONFIG_INET_TUNNEL is not set
> +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
> +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
> +# CONFIG_INET_XFRM_MODE_BEET is not set
> +# CONFIG_INET_LRO is not set
> +# CONFIG_INET_DIAG is not set
> +# CONFIG_TCP_CONG_ADVANCED is not set
> +CONFIG_TCP_CONG_CUBIC=y
> +CONFIG_DEFAULT_TCP_CONG="cubic"
> +# CONFIG_TCP_MD5SIG is not set
> +# CONFIG_IPV6 is not set
> +# CONFIG_NETWORK_SECMARK is not set
> +# CONFIG_NETFILTER is not set
> +# CONFIG_IP_DCCP is not set
> +# CONFIG_IP_SCTP is not set
> +# CONFIG_TIPC is not set
> +# CONFIG_ATM is not set
> +# CONFIG_BRIDGE is not set
> +# CONFIG_VLAN_8021Q is not set
> +# CONFIG_DECNET is not set
> +# CONFIG_LLC2 is not set
> +# CONFIG_IPX is not set
> +# CONFIG_ATALK is not set
> +# CONFIG_X25 is not set
> +# CONFIG_LAPB is not set
> +# CONFIG_ECONET is not set
> +# CONFIG_WAN_ROUTER is not set
> +# CONFIG_NET_SCHED is not set
> +
> +#
> +# Network testing
> +#
> +# CONFIG_NET_PKTGEN is not set
> +# CONFIG_HAMRADIO is not set
> +# CONFIG_CAN is not set
> +# CONFIG_IRDA is not set
> +# CONFIG_BT is not set
> +# CONFIG_AF_RXRPC is not set
> +
> +#
> +# Wireless
> +#
> +# CONFIG_CFG80211 is not set
> +# CONFIG_WIRELESS_EXT is not set
> +# CONFIG_MAC80211 is not set
> +# CONFIG_IEEE80211 is not set
> +# CONFIG_RFKILL is not set
> +# CONFIG_NET_9P is not set
> +
> +#
> +# Device Drivers
> +#
> +
> +#
> +# Generic Driver Options
> +#
> +CONFIG_UEVENT_HELPER_PATH="/bin/mdev"
> +CONFIG_STANDALONE=y
> +CONFIG_PREVENT_FIRMWARE_BUILD=y
> +# CONFIG_FW_LOADER is not set
> +# CONFIG_DEBUG_DRIVER is not set
> +# CONFIG_DEBUG_DEVRES is not set
> +# CONFIG_SYS_HYPERVISOR is not set
> +# CONFIG_CONNECTOR is not set
> +CONFIG_MTD=y
> +# CONFIG_MTD_DEBUG is not set
> +# CONFIG_MTD_CONCAT is not set
> +CONFIG_MTD_PARTITIONS=y
> +# CONFIG_MTD_REDBOOT_PARTS is not set
> +# CONFIG_MTD_CMDLINE_PARTS is not set
> +CONFIG_MTD_OF_PARTS=y
> +# CONFIG_MTD_AR7_PARTS is not set
> +
> +#
> +# User Modules And Translation Layers
> +#
> +CONFIG_MTD_CHAR=y
> +CONFIG_MTD_BLKDEVS=y
> +# CONFIG_MTD_BLOCK is not set
> +# CONFIG_MTD_BLOCK_RO is not set
> +# CONFIG_FTL is not set
> +# CONFIG_NFTL is not set
> +# CONFIG_INFTL is not set
> +# CONFIG_RFD_FTL is not set
> +# CONFIG_SSFDC is not set
> +# CONFIG_MTD_OOPS is not set
> +CONFIG_MTD_PPCBOOT_ENV=y
> +
> +#
> +# RAM/ROM/Flash chip drivers
> +#
> +CONFIG_MTD_CFI=y
> +# CONFIG_MTD_JEDECPROBE is not set
> +CONFIG_MTD_GEN_PROBE=y
> +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
> +CONFIG_MTD_MAP_BANK_WIDTH_1=y
> +CONFIG_MTD_MAP_BANK_WIDTH_2=y
> +CONFIG_MTD_MAP_BANK_WIDTH_4=y
> +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
> +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
> +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
> +CONFIG_MTD_CFI_I1=y
> +CONFIG_MTD_CFI_I2=y
> +# CONFIG_MTD_CFI_I4 is not set
> +# CONFIG_MTD_CFI_I8 is not set
> +# CONFIG_MTD_CFI_INTELEXT is not set
> +CONFIG_MTD_CFI_AMDSTD=y
> +# CONFIG_MTD_CFI_STAA is not set
> +CONFIG_MTD_CFI_UTIL=y
> +# CONFIG_MTD_RAM is not set
> +# CONFIG_MTD_ROM is not set
> +# CONFIG_MTD_ABSENT is not set
> +
> +#
> +# Mapping drivers for chip access
> +#
> +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
> +# CONFIG_MTD_PHYSMAP is not set
> +CONFIG_MTD_PHYSMAP_OF=y
> +# CONFIG_MTD_INTEL_VR_NOR is not set
> +# CONFIG_MTD_PLATRAM is not set
> +
> +#
> +# Self-contained MTD device drivers
> +#
> +# CONFIG_MTD_PMC551 is not set
> +# CONFIG_MTD_SLRAM is not set
> +# CONFIG_MTD_PHRAM is not set
> +# CONFIG_MTD_MTDRAM is not set
> +# CONFIG_MTD_BLOCK2MTD is not set
> +
> +#
> +# Disk-On-Chip Device Drivers
> +#
> +# CONFIG_MTD_DOC2000 is not set
> +# CONFIG_MTD_DOC2001 is not set
> +# CONFIG_MTD_DOC2001PLUS is not set
> +CONFIG_MTD_NAND=y
> +# CONFIG_MTD_NAND_VERIFY_WRITE is not set
> +# CONFIG_MTD_NAND_ECC_SMC is not set
> +# CONFIG_MTD_NAND_MUSEUM_IDS is not set
> +# CONFIG_MTD_NAND_RB500 is not set
> +CONFIG_MTD_NAND_IDS=y
> +# CONFIG_MTD_NAND_DISKONCHIP is not set
> +# CONFIG_MTD_NAND_CAFE is not set
> +# CONFIG_MTD_NAND_NANDSIM is not set
> +# CONFIG_MTD_NAND_PLATFORM is not set
> +# CONFIG_MTD_NAND_FSL_ELBC is not set
> +# CONFIG_MTD_ONENAND is not set
> +
> +#
> +# UBI - Unsorted block images
> +#
> +# CONFIG_MTD_UBI is not set
> +CONFIG_OF_DEVICE=y
> +CONFIG_OF_GPIO=y
> +CONFIG_OF_I2C=y
> +# CONFIG_PARPORT is not set
> +CONFIG_BLK_DEV=y
> +# CONFIG_BLK_DEV_FD is not set
> +# CONFIG_BLK_CPQ_DA is not set
> +# CONFIG_BLK_CPQ_CISS_DA is not set
> +# CONFIG_BLK_DEV_DAC960 is not set
> +# CONFIG_BLK_DEV_UMEM is not set
> +# CONFIG_BLK_DEV_COW_COMMON is not set
> +CONFIG_BLK_DEV_LOOP=y
> +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
> +# CONFIG_BLK_DEV_NBD is not set
> +# CONFIG_BLK_DEV_SX8 is not set
> +CONFIG_BLK_DEV_RAM=y
> +CONFIG_BLK_DEV_RAM_COUNT=16
> +CONFIG_BLK_DEV_RAM_SIZE=16384
> +# CONFIG_BLK_DEV_XIP is not set
> +# CONFIG_CDROM_PKTCDVD is not set
> +# CONFIG_ATA_OVER_ETH is not set
> +# CONFIG_MISC_DEVICES is not set
> +CONFIG_HAVE_IDE=y
> +# CONFIG_IDE is not set
> +
> +#
> +# SCSI device support
> +#
> +# CONFIG_RAID_ATTRS is not set
> +# CONFIG_SCSI is not set
> +# CONFIG_SCSI_DMA is not set
> +# CONFIG_SCSI_NETLINK is not set
> +# CONFIG_ATA is not set
> +# CONFIG_MD is not set
> +# CONFIG_FUSION is not set
> +
> +#
> +# IEEE 1394 (FireWire) support
> +#
> +# CONFIG_FIREWIRE is not set
> +# CONFIG_IEEE1394 is not set
> +# CONFIG_I2O is not set
> +# CONFIG_MACINTOSH_DRIVERS is not set
> +CONFIG_NETDEVICES=y
> +# CONFIG_NETDEVICES_MULTIQUEUE is not set
> +# CONFIG_DUMMY is not set
> +# CONFIG_BONDING is not set
> +# CONFIG_MACVLAN is not set
> +# CONFIG_EQUALIZER is not set
> +# CONFIG_TUN is not set
> +# CONFIG_VETH is not set
> +# CONFIG_ARCNET is not set
> +# CONFIG_NET_ETHERNET is not set
> +CONFIG_NETDEV_1000=y
> +# CONFIG_ACENIC is not set
> +# CONFIG_DL2K is not set
> +CONFIG_E1000=y
> +# CONFIG_E1000_NAPI is not set
> +# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
> +# CONFIG_E1000E is not set
> +# CONFIG_E1000E_ENABLED is not set
> +# CONFIG_IP1000 is not set
> +# CONFIG_IGB is not set
> +# CONFIG_NS83820 is not set
> +# CONFIG_HAMACHI is not set
> +# CONFIG_YELLOWFIN is not set
> +# CONFIG_R8169 is not set
> +# CONFIG_SIS190 is not set
> +# CONFIG_SKGE is not set
> +# CONFIG_SKY2 is not set
> +# CONFIG_VIA_VELOCITY is not set
> +# CONFIG_TIGON3 is not set
> +# CONFIG_BNX2 is not set
> +# CONFIG_GIANFAR is not set
> +# CONFIG_MV643XX_ETH is not set
> +# CONFIG_QLA3XXX is not set
> +# CONFIG_ATL1 is not set
> +# CONFIG_NETDEV_10000 is not set
> +# CONFIG_TR is not set
> +
> +#
> +# Wireless LAN
> +#
> +# CONFIG_WLAN_PRE80211 is not set
> +# CONFIG_WLAN_80211 is not set
> +# CONFIG_IWLWIFI_LEDS is not set
> +# CONFIG_WAN is not set
> +# CONFIG_FDDI is not set
> +# CONFIG_HIPPI is not set
> +# CONFIG_PPP is not set
> +# CONFIG_SLIP is not set
> +# CONFIG_NETCONSOLE is not set
> +# CONFIG_NETPOLL is not set
> +# CONFIG_NET_POLL_CONTROLLER is not set
> +# CONFIG_ISDN is not set
> +# CONFIG_PHONE is not set
> +
> +#
> +# Input device support
> +#
> +CONFIG_INPUT=y
> +# CONFIG_INPUT_FF_MEMLESS is not set
> +# CONFIG_INPUT_POLLDEV is not set
> +
> +#
> +# Userland interfaces
> +#
> +CONFIG_INPUT_MOUSEDEV=y
> +CONFIG_INPUT_MOUSEDEV_PSAUX=y
> +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
> +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
> +# CONFIG_INPUT_JOYDEV is not set
> +# CONFIG_INPUT_EVDEV is not set
> +# CONFIG_INPUT_EVBUG is not set
> +
> +#
> +# Input Device Drivers
> +#
> +CONFIG_INPUT_KEYBOARD=y
> +CONFIG_KEYBOARD_ATKBD=y
> +# CONFIG_KEYBOARD_SUNKBD is not set
> +# CONFIG_KEYBOARD_LKKBD is not set
> +# CONFIG_KEYBOARD_XTKBD is not set
> +# CONFIG_KEYBOARD_NEWTON is not set
> +# CONFIG_KEYBOARD_STOWAWAY is not set
> +CONFIG_INPUT_MOUSE=y
> +CONFIG_MOUSE_PS2=y
> +CONFIG_MOUSE_PS2_ALPS=y
> +CONFIG_MOUSE_PS2_LOGIPS2PP=y
> +CONFIG_MOUSE_PS2_SYNAPTICS=y
> +CONFIG_MOUSE_PS2_LIFEBOOK=y
> +CONFIG_MOUSE_PS2_TRACKPOINT=y
> +# CONFIG_MOUSE_PS2_TOUCHKIT is not set
> +# CONFIG_MOUSE_SERIAL is not set
> +# CONFIG_MOUSE_VSXXXAA is not set
> +# CONFIG_INPUT_JOYSTICK is not set
> +# CONFIG_INPUT_TABLET is not set
> +# CONFIG_INPUT_TOUCHSCREEN is not set
> +# CONFIG_INPUT_MISC is not set
> +
> +#
> +# Hardware I/O ports
> +#
> +CONFIG_SERIO=y
> +CONFIG_SERIO_I8042=y
> +CONFIG_SERIO_SERPORT=y
> +# CONFIG_SERIO_PCIPS2 is not set
> +CONFIG_SERIO_LIBPS2=y
> +# CONFIG_SERIO_RAW is not set
> +# CONFIG_GAMEPORT is not set
> +
> +#
> +# Character devices
> +#
> +# CONFIG_VT is not set
> +# CONFIG_DEVKMEM is not set
> +# CONFIG_SERIAL_NONSTANDARD is not set
> +# CONFIG_NOZOMI is not set
> +
> +#
> +# Serial drivers
> +#
> +CONFIG_SERIAL_8250=y
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_8250_PCI=y
> +CONFIG_SERIAL_8250_NR_UARTS=2
> +CONFIG_SERIAL_8250_RUNTIME_UARTS=2
> +# CONFIG_SERIAL_8250_EXTENDED is not set
> +
> +#
> +# Non-8250 serial port support
> +#
> +# CONFIG_SERIAL_UARTLITE is not set
> +CONFIG_SERIAL_CORE=y
> +CONFIG_SERIAL_CORE_CONSOLE=y
> +CONFIG_SERIAL_MPC52xx=y
> +CONFIG_SERIAL_MPC52xx_CONSOLE=y
> +CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
> +# CONFIG_SERIAL_JSM is not set
> +# CONFIG_SERIAL_OF_PLATFORM is not set
> +CONFIG_UNIX98_PTYS=y
> +CONFIG_LEGACY_PTYS=y
> +CONFIG_LEGACY_PTY_COUNT=32
> +# CONFIG_IPMI_HANDLER is not set
> +# CONFIG_HW_RANDOM is not set
> +# CONFIG_NVRAM is not set
> +# CONFIG_GEN_RTC is not set
> +# CONFIG_R3964 is not set
> +# CONFIG_APPLICOM is not set
> +# CONFIG_RAW_DRIVER is not set
> +# CONFIG_TCG_TPM is not set
> +CONFIG_DEVPORT=y
> +CONFIG_I2C=y
> +CONFIG_I2C_BOARDINFO=y
> +CONFIG_I2C_CHARDEV=y
> +
> +#
> +# I2C Hardware Bus support
> +#
> +# CONFIG_I2C_ALI1535 is not set
> +# CONFIG_I2C_ALI1563 is not set
> +# CONFIG_I2C_ALI15X3 is not set
> +# CONFIG_I2C_AMD756 is not set
> +# CONFIG_I2C_AMD8111 is not set
> +# CONFIG_I2C_I801 is not set
> +# CONFIG_I2C_I810 is not set
> +# CONFIG_I2C_PIIX4 is not set
> +CONFIG_I2C_MPC=y
> +# CONFIG_I2C_MPC8260 is not set
> +# CONFIG_I2C_NFORCE2 is not set
> +# CONFIG_I2C_OCORES is not set
> +# CONFIG_I2C_PARPORT_LIGHT is not set
> +# CONFIG_I2C_PROSAVAGE is not set
> +# CONFIG_I2C_SAVAGE4 is not set
> +# CONFIG_I2C_SIMTEC is not set
> +# CONFIG_I2C_SIS5595 is not set
> +# CONFIG_I2C_SIS630 is not set
> +# CONFIG_I2C_SIS96X is not set
> +# CONFIG_I2C_TAOS_EVM is not set
> +# CONFIG_I2C_STUB is not set
> +# CONFIG_I2C_VIA is not set
> +# CONFIG_I2C_VIAPRO is not set
> +# CONFIG_I2C_VOODOO3 is not set
> +# CONFIG_I2C_PCA_PLATFORM is not set
> +
> +#
> +# Miscellaneous I2C Chip support
> +#
> +# CONFIG_SENSORS_24C01A is not set
> +# CONFIG_SENSORS_AD7416 is not set
> +# CONFIG_DS1682 is not set
> +# CONFIG_SENSORS_EEPROM is not set
> +# CONFIG_SENSORS_MAX6900 is not set
> +# CONFIG_SENSORS_PCF8574 is not set
> +# CONFIG_PCF8575 is not set
> +# CONFIG_SENSORS_PCF8591 is not set
> +# CONFIG_TPS65010 is not set
> +# CONFIG_SENSORS_MAX6875 is not set
> +# CONFIG_SENSORS_TSL2550 is not set
> +# CONFIG_I2C_DEBUG_CORE is not set
> +# CONFIG_I2C_DEBUG_ALGO is not set
> +# CONFIG_I2C_DEBUG_BUS is not set
> +# CONFIG_I2C_DEBUG_CHIP is not set
> +# CONFIG_SPI is not set
> +CONFIG_HAVE_GPIO_LIB=y
> +
> +#
> +# GPIO Support
> +#
> +# CONFIG_DEBUG_GPIO is not set
> +
> +#
> +# I2C GPIO expanders:
> +#
> +# CONFIG_GPIO_PCA953X is not set
> +# CONFIG_GPIO_PCF857X is not set
> +
> +#
> +# SPI GPIO expanders:
> +#
> +# CONFIG_W1 is not set
> +# CONFIG_POWER_SUPPLY is not set
> +CONFIG_HWMON=y
> +# CONFIG_HWMON_VID is not set
> +# CONFIG_SENSORS_AD7414 is not set
> +# CONFIG_SENSORS_AD7418 is not set
> +# CONFIG_SENSORS_ADM1021 is not set
> +# CONFIG_SENSORS_ADM1025 is not set
> +# CONFIG_SENSORS_ADM1026 is not set
> +# CONFIG_SENSORS_ADM1029 is not set
> +# CONFIG_SENSORS_ADM1031 is not set
> +# CONFIG_SENSORS_ADM9240 is not set
> +# CONFIG_SENSORS_ADT7470 is not set
> +# CONFIG_SENSORS_ADT7473 is not set
> +# CONFIG_SENSORS_ATXP1 is not set
> +# CONFIG_SENSORS_DS1621 is not set
> +# CONFIG_SENSORS_I5K_AMB is not set
> +# CONFIG_SENSORS_F71805F is not set
> +# CONFIG_SENSORS_FM75 is not set
> +# CONFIG_SENSORS_F71882FG is not set
> +# CONFIG_SENSORS_F75375S is not set
> +# CONFIG_SENSORS_GL518SM is not set
> +# CONFIG_SENSORS_GL520SM is not set
> +# CONFIG_SENSORS_IT87 is not set
> +# CONFIG_SENSORS_LM63 is not set
> +CONFIG_SENSORS_LM75=y
> +# CONFIG_SENSORS_LM77 is not set
> +# CONFIG_SENSORS_LM78 is not set
> +# CONFIG_SENSORS_LM80 is not set
> +# CONFIG_SENSORS_LM83 is not set
> +# CONFIG_SENSORS_LM85 is not set
> +# CONFIG_SENSORS_LM87 is not set
> +# CONFIG_SENSORS_LM90 is not set
> +# CONFIG_SENSORS_LM92 is not set
> +# CONFIG_SENSORS_LM93 is not set
> +# CONFIG_SENSORS_MAX1619 is not set
> +# CONFIG_SENSORS_MAX6650 is not set
> +# CONFIG_SENSORS_PC87360 is not set
> +# CONFIG_SENSORS_PC87427 is not set
> +# CONFIG_SENSORS_SIS5595 is not set
> +# CONFIG_SENSORS_DME1737 is not set
> +# CONFIG_SENSORS_SMSC47M1 is not set
> +# CONFIG_SENSORS_SMSC47M192 is not set
> +# CONFIG_SENSORS_SMSC47B397 is not set
> +# CONFIG_SENSORS_ADS7828 is not set
> +# CONFIG_SENSORS_THMC50 is not set
> +# CONFIG_SENSORS_VIA686A is not set
> +# CONFIG_SENSORS_VT1115 is not set
> +# CONFIG_SENSORS_VT1211 is not set
> +# CONFIG_SENSORS_VT8231 is not set
> +# CONFIG_SENSORS_W83781D is not set
> +# CONFIG_SENSORS_W83791D is not set
> +# CONFIG_SENSORS_W83792D is not set
> +# CONFIG_SENSORS_W83793 is not set
> +# CONFIG_SENSORS_W83L785TS is not set
> +# CONFIG_SENSORS_W83L786NG is not set
> +# CONFIG_SENSORS_W83627HF is not set
> +# CONFIG_SENSORS_W83627EHF is not set
> +# CONFIG_HWMON_DEBUG_CHIP is not set
> +# CONFIG_THERMAL is not set
> +CONFIG_WATCHDOG=y
> +# CONFIG_WATCHDOG_NOWAYOUT is not set
> +
> +#
> +# Watchdog Device Drivers
> +#
> +# CONFIG_WD is not set
> +# CONFIG_SOFT_WATCHDOG is not set
> +CONFIG_MPC5200_WDT=y
> +
> +#
> +# PCI-based Watchdog Cards
> +#
> +# CONFIG_PCIPCWATCHDOG is not set
> +# CONFIG_WDTPCI is not set
> +
> +#
> +# Sonics Silicon Backplane
> +#
> +CONFIG_SSB_POSSIBLE=y
> +# CONFIG_SSB is not set
> +
> +#
> +# Multifunction device drivers
> +#
> +# CONFIG_MFD_SM501 is not set
> +# CONFIG_HTC_PASIC3 is not set
> +
> +#
> +# Multimedia devices
> +#
> +
> +#
> +# Multimedia core support
> +#
> +# CONFIG_VIDEO_DEV is not set
> +# CONFIG_DVB_CORE is not set
> +# CONFIG_VIDEO_MEDIA is not set
> +
> +#
> +# Multimedia drivers
> +#
> +# CONFIG_DAB is not set
> +
> +#
> +# Graphics support
> +#
> +# CONFIG_AGP is not set
> +# CONFIG_DRM is not set
> +# CONFIG_VGASTATE is not set
> +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
> +# CONFIG_FB is not set
> +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
> +
> +#
> +# Display device support
> +#
> +# CONFIG_DISPLAY_SUPPORT is not set
> +
> +#
> +# Sound
> +#
> +# CONFIG_SOUND is not set
> +# CONFIG_HID_SUPPORT is not set
> +# CONFIG_USB_SUPPORT is not set
> +# CONFIG_MMC is not set
> +# CONFIG_MEMSTICK is not set
> +# CONFIG_NEW_LEDS is not set
> +# CONFIG_ACCESSIBILITY is not set
> +# CONFIG_INFINIBAND is not set
> +# CONFIG_EDAC is not set
> +# CONFIG_RTC_CLASS is not set
> +# CONFIG_DMADEVICES is not set
> +# CONFIG_UIO is not set
> +
> +#
> +# File systems
> +#
> +# CONFIG_EXT2_FS is not set
> +# CONFIG_EXT3_FS is not set
> +# CONFIG_EXT4DEV_FS is not set
> +# CONFIG_REISERFS_FS is not set
> +# CONFIG_JFS_FS is not set
> +# CONFIG_FS_POSIX_ACL is not set
> +# CONFIG_XFS_FS is not set
> +# CONFIG_OCFS2_FS is not set
> +# CONFIG_DNOTIFY is not set
> +# CONFIG_INOTIFY is not set
> +# CONFIG_QUOTA is not set
> +# CONFIG_AUTOFS_FS is not set
> +# CONFIG_AUTOFS4_FS is not set
> +# CONFIG_FUSE_FS is not set
> +
> +#
> +# CD-ROM/DVD Filesystems
> +#
> +# CONFIG_ISO9660_FS is not set
> +# CONFIG_UDF_FS is not set
> +
> +#
> +# DOS/FAT/NT Filesystems
> +#
> +CONFIG_FAT_FS=y
> +CONFIG_MSDOS_FS=y
> +CONFIG_VFAT_FS=y
> +CONFIG_FAT_DEFAULT_CODEPAGE=437
> +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
> +# CONFIG_NTFS_FS is not set
> +
> +#
> +# Pseudo filesystems
> +#
> +CONFIG_PROC_FS=y
> +CONFIG_PROC_KCORE=y
> +CONFIG_PROC_SYSCTL=y
> +CONFIG_SYSFS=y
> +CONFIG_TMPFS=y
> +# CONFIG_TMPFS_POSIX_ACL is not set
> +# CONFIG_HUGETLB_PAGE is not set
> +# CONFIG_CONFIGFS_FS is not set
> +
> +#
> +# Miscellaneous filesystems
> +#
> +# CONFIG_ADFS_FS is not set
> +# CONFIG_AFFS_FS is not set
> +# CONFIG_HFS_FS is not set
> +# CONFIG_HFSPLUS_FS is not set
> +# CONFIG_BEFS_FS is not set
> +# CONFIG_BFS_FS is not set
> +# CONFIG_EFS_FS is not set
> +# CONFIG_YAFFS_FS is not set
> +CONFIG_JFFS2_FS=y
> +CONFIG_JFFS2_FS_DEBUG=0
> +CONFIG_JFFS2_FS_WRITEBUFFER=y
> +CONFIG_JFFS2_FS_WBUF_VERIFY=y
> +# CONFIG_JFFS2_SUMMARY is not set
> +# CONFIG_JFFS2_FS_XATTR is not set
> +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
> +CONFIG_JFFS2_ZLIB=y
> +# CONFIG_JFFS2_LZO is not set
> +CONFIG_JFFS2_RTIME=y
> +# CONFIG_JFFS2_RUBIN is not set
> +# CONFIG_CRAMFS is not set
> +# CONFIG_VXFS_FS is not set
> +# CONFIG_MINIX_FS is not set
> +# CONFIG_HPFS_FS is not set
> +# CONFIG_QNX4FS_FS is not set
> +# CONFIG_ROMFS_FS is not set
> +# CONFIG_SYSV_FS is not set
> +# CONFIG_UFS_FS is not set
> +CONFIG_NETWORK_FILESYSTEMS=y
> +CONFIG_NFS_FS=y
> +CONFIG_NFS_V3=y
> +# CONFIG_NFS_V3_ACL is not set
> +# CONFIG_NFS_V4 is not set
> +# CONFIG_NFSD is not set
> +# CONFIG_ROOT_NFS is not set
> +CONFIG_LOCKD=y
> +CONFIG_LOCKD_V4=y
> +CONFIG_NFS_COMMON=y
> +CONFIG_SUNRPC=y
> +# CONFIG_SUNRPC_BIND34 is not set
> +# CONFIG_RPCSEC_GSS_KRB5 is not set
> +# CONFIG_RPCSEC_GSS_SPKM3 is not set
> +# CONFIG_SMB_FS is not set
> +CONFIG_CIFS=y
> +# CONFIG_CIFS_STATS is not set
> +# CONFIG_CIFS_WEAK_PW_HASH is not set
> +CONFIG_CIFS_XATTR=y
> +CONFIG_CIFS_POSIX=y
> +# CONFIG_CIFS_DEBUG2 is not set
> +# CONFIG_CIFS_EXPERIMENTAL is not set
> +# CONFIG_NCP_FS is not set
> +# CONFIG_CODA_FS is not set
> +# CONFIG_AFS_FS is not set
> +
> +#
> +# Partition Types
> +#
> +# CONFIG_PARTITION_ADVANCED is not set
> +CONFIG_MSDOS_PARTITION=y
> +CONFIG_NLS=y
> +CONFIG_NLS_DEFAULT="iso8859-1"
> +CONFIG_NLS_CODEPAGE_437=y
> +# CONFIG_NLS_CODEPAGE_737 is not set
> +# CONFIG_NLS_CODEPAGE_775 is not set
> +# CONFIG_NLS_CODEPAGE_850 is not set
> +# CONFIG_NLS_CODEPAGE_852 is not set
> +# CONFIG_NLS_CODEPAGE_855 is not set
> +# CONFIG_NLS_CODEPAGE_857 is not set
> +# CONFIG_NLS_CODEPAGE_860 is not set
> +# CONFIG_NLS_CODEPAGE_861 is not set
> +# CONFIG_NLS_CODEPAGE_862 is not set
> +# CONFIG_NLS_CODEPAGE_863 is not set
> +# CONFIG_NLS_CODEPAGE_864 is not set
> +# CONFIG_NLS_CODEPAGE_865 is not set
> +# CONFIG_NLS_CODEPAGE_866 is not set
> +# CONFIG_NLS_CODEPAGE_869 is not set
> +# CONFIG_NLS_CODEPAGE_936 is not set
> +# CONFIG_NLS_CODEPAGE_950 is not set
> +# CONFIG_NLS_CODEPAGE_932 is not set
> +# CONFIG_NLS_CODEPAGE_949 is not set
> +# CONFIG_NLS_CODEPAGE_874 is not set
> +# CONFIG_NLS_ISO8859_8 is not set
> +# CONFIG_NLS_CODEPAGE_1250 is not set
> +# CONFIG_NLS_CODEPAGE_1251 is not set
> +# CONFIG_NLS_ASCII is not set
> +CONFIG_NLS_ISO8859_1=y
> +# CONFIG_NLS_ISO8859_2 is not set
> +# CONFIG_NLS_ISO8859_3 is not set
> +# CONFIG_NLS_ISO8859_4 is not set
> +# CONFIG_NLS_ISO8859_5 is not set
> +# CONFIG_NLS_ISO8859_6 is not set
> +# CONFIG_NLS_ISO8859_7 is not set
> +# CONFIG_NLS_ISO8859_9 is not set
> +# CONFIG_NLS_ISO8859_13 is not set
> +# CONFIG_NLS_ISO8859_14 is not set
> +# CONFIG_NLS_ISO8859_15 is not set
> +# CONFIG_NLS_KOI8_R is not set
> +# CONFIG_NLS_KOI8_U is not set
> +# CONFIG_NLS_UTF8 is not set
> +# CONFIG_DLM is not set
> +
> +#
> +# Library routines
> +#
> +CONFIG_BITREVERSE=y
> +# CONFIG_GENERIC_FIND_FIRST_BIT is not set
> +CONFIG_CRC_CCITT=y
> +# CONFIG_CRC16 is not set
> +CONFIG_CRC_ITU_T=y
> +CONFIG_CRC32=y
> +CONFIG_CRC7=y
> +# CONFIG_LIBCRC32C is not set
> +CONFIG_ZLIB_INFLATE=y
> +CONFIG_ZLIB_DEFLATE=y
> +CONFIG_PLIST=y
> +CONFIG_HAS_IOMEM=y
> +CONFIG_HAS_IOPORT=y
> +CONFIG_HAS_DMA=y
> +CONFIG_HAVE_LMB=y
> +
> +#
> +# Kernel hacking
> +#
> +# CONFIG_PRINTK_TIME is not set
> +# CONFIG_ENABLE_WARN_DEPRECATED is not set
> +# CONFIG_ENABLE_MUST_CHECK is not set
> +CONFIG_FRAME_WARN=1024
> +# CONFIG_MAGIC_SYSRQ is not set
> +# CONFIG_UNUSED_SYMBOLS is not set
> +CONFIG_DEBUG_FS=y
> +# CONFIG_HEADERS_CHECK is not set
> +CONFIG_DEBUG_KERNEL=y
> +# CONFIG_DEBUG_SHIRQ is not set
> +# CONFIG_DETECT_SOFTLOCKUP is not set
> +# CONFIG_SCHED_DEBUG is not set
> +# CONFIG_SCHEDSTATS is not set
> +# CONFIG_TIMER_STATS is not set
> +# CONFIG_DEBUG_OBJECTS is not set
> +# CONFIG_DEBUG_RT_MUTEXES is not set
> +# CONFIG_RT_MUTEX_TESTER is not set
> +# CONFIG_DEBUG_SPINLOCK is not set
> +# CONFIG_DEBUG_MUTEXES is not set
> +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
> +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
> +# CONFIG_DEBUG_KOBJECT is not set
> +CONFIG_DEBUG_BUGVERBOSE=y
> +# CONFIG_DEBUG_INFO is not set
> +# CONFIG_DEBUG_VM is not set
> +# CONFIG_DEBUG_WRITECOUNT is not set
> +# CONFIG_DEBUG_LIST is not set
> +# CONFIG_DEBUG_SG is not set
> +# CONFIG_BOOT_PRINTK_DELAY is not set
> +# CONFIG_RCU_TORTURE_TEST is not set
> +# CONFIG_BACKTRACE_SELF_TEST is not set
> +# CONFIG_FAULT_INJECTION is not set
> +# CONFIG_SAMPLES is not set
> +# CONFIG_DEBUG_STACKOVERFLOW is not set
> +# CONFIG_DEBUG_STACK_USAGE is not set
> +# CONFIG_DEBUG_PAGEALLOC is not set
> +# CONFIG_DEBUGGER is not set
> +# CONFIG_IRQSTACKS is not set
> +# CONFIG_VIRQ_DEBUG is not set
> +# CONFIG_BDI_SWITCH is not set
> +# CONFIG_BOOTX_TEXT is not set
> +# CONFIG_PPC_EARLY_DEBUG is not set
> +
> +#
> +# Security options
> +#
> +# CONFIG_KEYS is not set
> +# CONFIG_SECURITY is not set
> +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
> +CONFIG_CRYPTO=y
> +
> +#
> +# Crypto core or helper
> +#
> +CONFIG_CRYPTO_ALGAPI=y
> +CONFIG_CRYPTO_AEAD=y
> +CONFIG_CRYPTO_BLKCIPHER=y
> +CONFIG_CRYPTO_HASH=y
> +CONFIG_CRYPTO_MANAGER=y
> +# CONFIG_CRYPTO_GF128MUL is not set
> +# CONFIG_CRYPTO_NULL is not set
> +# CONFIG_CRYPTO_CRYPTD is not set
> +CONFIG_CRYPTO_AUTHENC=y
> +# CONFIG_CRYPTO_TEST is not set
> +
> +#
> +# Authenticated Encryption with Associated Data
> +#
> +# CONFIG_CRYPTO_CCM is not set
> +# CONFIG_CRYPTO_GCM is not set
> +# CONFIG_CRYPTO_SEQIV is not set
> +
> +#
> +# Block modes
> +#
> +CONFIG_CRYPTO_CBC=y
> +# CONFIG_CRYPTO_CTR is not set
> +# CONFIG_CRYPTO_CTS is not set
> +CONFIG_CRYPTO_ECB=y
> +# CONFIG_CRYPTO_LRW is not set
> +# CONFIG_CRYPTO_PCBC is not set
> +# CONFIG_CRYPTO_XTS is not set
> +
> +#
> +# Hash modes
> +#
> +CONFIG_CRYPTO_HMAC=y
> +# CONFIG_CRYPTO_XCBC is not set
> +
> +#
> +# Digest
> +#
> +# CONFIG_CRYPTO_CRC32C is not set
> +# CONFIG_CRYPTO_MD4 is not set
> +CONFIG_CRYPTO_MD5=y
> +# CONFIG_CRYPTO_MICHAEL_MIC is not set
> +CONFIG_CRYPTO_SHA1=y
> +# CONFIG_CRYPTO_SHA256 is not set
> +# CONFIG_CRYPTO_SHA512 is not set
> +# CONFIG_CRYPTO_TGR192 is not set
> +# CONFIG_CRYPTO_WP512 is not set
> +
> +#
> +# Ciphers
> +#
> +CONFIG_CRYPTO_AES=y
> +# CONFIG_CRYPTO_ANUBIS is not set
> +CONFIG_CRYPTO_ARC4=y
> +# CONFIG_CRYPTO_BLOWFISH is not set
> +# CONFIG_CRYPTO_CAMELLIA is not set
> +# CONFIG_CRYPTO_CAST5 is not set
> +# CONFIG_CRYPTO_CAST6 is not set
> +CONFIG_CRYPTO_DES=y
> +# CONFIG_CRYPTO_FCRYPT is not set
> +# CONFIG_CRYPTO_KHAZAD is not set
> +# CONFIG_CRYPTO_SALSA20 is not set
> +# CONFIG_CRYPTO_SEED is not set
> +# CONFIG_CRYPTO_SERPENT is not set
> +# CONFIG_CRYPTO_TEA is not set
> +# CONFIG_CRYPTO_TWOFISH is not set
> +
> +#
> +# Compression
> +#
> +CONFIG_CRYPTO_DEFLATE=y
> +# CONFIG_CRYPTO_LZO is not set
> +CONFIG_CRYPTO_HW=y
> +# CONFIG_CRYPTO_DEV_HIFN_795X is not set
> +CONFIG_PPC_CLOCK=y
> +CONFIG_PPC_LIB_RHEAP=y
> +# CONFIG_VIRTUALIZATION is not set
> diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
> index acd2fc8..d2960a9 100644
> --- a/arch/powerpc/platforms/52xx/Kconfig
> +++ b/arch/powerpc/platforms/52xx/Kconfig
> @@ -21,7 +21,8 @@ config PPC_MPC5200_SIMPLE
> and if there is a PCI bus node defined in the device tree.
>
> Boards that are compatible with this generic platform support
> - are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200'.
> + are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200' and
> + 'matrix-vision,mvbc-p'.
>
> config PPC_EFIKA
> bool "bPlan Efika 5k2. MPC5200B based computer"
> diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
> index a3bda0b..6423675 100644
> --- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
> +++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
> @@ -54,6 +54,7 @@ static char *board[] __initdata = {
> "phytec,pcm030",
> "schindler,cm5200",
> "tqc,tqm5200",
> + "matrix-vision,mvbc-p",
> NULL
> };
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH] [V2] powerpc: Xilinx: add dts file for ML507 board
From: David Gibson @ 2008-07-10 1:32 UTC (permalink / raw)
To: John Linn; +Cc: linuxppc-dev
In-Reply-To: <20080708144112.6C49B1CC8073@mail66-wa4.bigfish.com>
On Tue, Jul 08, 2008 at 08:41:11AM -0600, John Linn wrote:
> Thanks for the comments David.
[snip]
> > > + chosen {
> > > + bootargs = "console=ttyS0 ip=on root=/dev/ram";
> >
> > Bootargs like this should not typically go in the dts file.
> >
>
> My understanding is the bootloader would also fill these in.
> With the FGPA, a bootloader is not used many times so that's the
> reason we have put it into the dts file.
Hrm. There are several places you can encode a default command line
into a zImage, and I don't think the dts is the most sensible. I'd
suggest in the config instead, it's easier for users to change if
necessary that way.
> > > + linux,stdout-path = "/plb@0/serial@83e00000";
> > > + } ;
> > > + cpus {
> > > + #address-cells = <1>;
> > > + #cpus = <1>;
> > > + #size-cells = <0>;
> > > + ppc440_0: cpu@0 {
> > > + clock-frequency = "";
> >
> > Presumably this is supposed to be filled in by the bootloader. But in
> > any case it shouldn't be a string.
> >
>
> I think this was my screw-up as it should have the same value as the
> timebase.
> Interesting, it's not being used for anything that stops the system from
> working.
Ok.
> > [snip]
> > > + DMA0: sdma@80 {
> > > + compatible = "xlnx,ll-dma-1.00.a";
> > > + dcr-reg = < 0x80 0x11 >;
> > > + interrupt-parent = <&xps_intc_0>;
> > > + interrupts = < 9 2 0xa 2 >;
> > > + } ;
> >
> > Putting devices under the cpu node is certainly... atypical. It's not
> > obviously wrong, for a dcr device like this, but we probably want a
> > little more discussion before establishing a convention like this.
>
> We had this discussion somewhat in a earlier message, 6/23 adding
> virtex5
> Powerpc 440 support, and Stephen answered with the following which still
> seems
> applicable.
>
> >From Stephenn:
>
> In Virtex 5 FX, the processor block (as represented in all the processor
> design tools) is actually a processor block, plus a crossbar switch,
> plus dma blocks. I think there's a tradeoff between modeling this
> independently, or modeling it as an FPGA user sees it. From the
> perspective of the FPGA user, this is the way the system looks (although
> I agree that it's odd). What would be even better, is if the processor
> block was modeled as a DTS I could write by hand, and to include it into
> the generated DTS. (Another good use for grafting of device trees...)
Hmm. Not really convinced either way.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: booting an ML405
From: Lorenzo T. Flores @ 2008-07-10 1:11 UTC (permalink / raw)
To: David Baird; +Cc: linuxppc-embedded
In-Reply-To: <440abda90807081012g576f66e4p5fac6ae03470e7c8@mail.gmail.com>
Hey all (David, John, & Grant)
Thanks for the responses! Using the TCL commands to dump memory values
and a little python script I was able to get a readout of what my kernel
is doing when it hangs:
<5>[ 0.000000] Linux version 2.6.25-rc9
(ltflores@buildmachinelinux.ag.com) (gcc version 4.1.2) #9 Thu Jul 3
15:55:15 EDT 2008
<6>[ 0.000000] Xilinx Generic PowerPC board support package (Xilinx
ML405) (Virtex-4 FX)
<7>[ 0.000000] Entering add_active_range(0, 0, 196608) 0 entries of 256 used
<4>[ 0.000000] Zone PFN ranges:
<4>[ 0.000000] DMA 0 -> 196608
<4>[ 0.000000] Normal 196608 -> 196608
<4>[ 0.000000] Movable zone start PFN for each node
<4>[ 0.000000] early_node_map[1] active PFN ranges
<4>[ 0.000000] 0: 0 -> 196608
<7>[ 0.000000] On node 0 totalpages: 196608
<7>[ 0.000000] DMA zone: 1536 pages used for memmap
<7>[ 0.000000] DMA zone: 0 pages reserved
<7>[ 0.000000] DMA zone: 195072 pages, LIFO batch:31
<7>[ 0.000000] Normal zone: 0 pages used for memmap
<7>[ 0.000000] Movable zone: 0 pages used for memmap
<4>[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on.
Total pages: 195072
<5>[ 0.000000] Kernel command line: console=ttyS0,9600 ip=on
root=/dev/ram rw
<6>[ 0.000000] Xilinx INTC #0 at 0x81800000 mapped to 0xFDFFE000
<4>[ 0.000000] PID hash table entries: 4096 (order: 12, 16384 bytes)
<4>[ 0.000231] Console: colour dummy device 80x25
<6>[ 0.009326] Dentry cache hash table entries: 131072 (order: 7, 524288
bytes)
<6>[ 0.023201] Inode-cache hash table entries: 65536 (order: 6, 262144
bytes)
<4>[ 0.243554] Memory: 776192k available (1768k kernel code, 596k data,
108k init, 0k highmem)
<4>[ 0.243750] Data machine check in kernel mode.
<4>[ 0.243798] Oops: machine check, sig: 7 [#1]
<4>[ 0.243826] NIP: c00593b0 LR: c005926c CTR: 00000000
<4>[ 0.243864] REGS: c0257f50 TRAP: 0202 Not tainted (2.6.25-rc9)
<4>[ 0.243890] MSR: 00029030 <EE,ME,IR,DR> CR: 24000082 XER: 00000050
<4>[ 0.243945] TASK = c0222518[0] 'swapper' THREAD: c0238000
<6>[ 0.243969] GPR00: 00000000 c0239f00 c0222518 c0ba5000 00000000
00000000 ffffffff c0225e70
<6>[ 0.244000] GPR08: ffffffff efc000c0 00000001 00000002 c0ba53c0
ffffffff ffffffff ffffffff
<6>[ 0.244000] GPR16: ffffffff ffffffff ffffffff ffffffff ffffffff
ffffffff 00000000 00000010
<6>[ 0.244000] GPR24: 00000020 000080d0 c025263c 000000d0 c022693c
efc00000 000000c0 efc00000
<4>[ 0.244000] NIP [c00593b0] cache_alloc_refill+0x428/0x594
<4>[ 0.244000] LR [c005926c] cache_alloc_refill+0x2e4/0x594
<4>[ 0.244000] Call Trace:
<4>[ 0.244000] [c0239f00] [c005926c] cache_alloc_refill+0x2e4/0x594
(unreliable)
<4>[ 0.244000] [c0239f30] [c0058f40] kmem_cache_alloc+0x58/0xa0
<4>[ 0.244000] [c0239f50] [c005a2e0] kmem_cache_create+0x1b4/0x418
<4>[ 0.244000] [c0239f90] [c0246b58] kmem_cache_init+0x1a0/0x3c4
<4>[ 0.244000] [c0239fc0] [c023b958] start_kernel+0x244/0x2b4
<4>[ 0.244000] [c0239ff0] [c000225c] start_here+0x44/0xb0
<4>[ 0.244000] Instruction dump:
<4>[ 0.244000] 4bfffb69 2c030000 41820118 7c7f1b78 48000010 801c0034
7ffdf214 7fde0214
<4>[ 0.244000] 38000000 7d3df214 913f000c 901f0014 <901f0010> 93df0008
b01f0018 3d20c025
<4>[ 0.244000] Data machine check in kernel mode.
<4>[ 0.244000] Oops: machine check, sig: 7 [#2]
<4>[ 0.244000] NIP: c0003f6c LR: c0002dbc CTR: 00000001
<4>[ 0.244000] REGS: c0257f50 TRAP: 0202 Tainted: G D (2.6.25-rc9)
<4>[ 0.244000] MSR: 00021030 <ME,IR,DR> CR: 48000022 XER: 00000050
<4>[ 0.244000] TASK = c0222518[0] 'swapper' THREAD: c0238000
<6>[ 0.244000] GPR00: 08000000 c0257e70 c0222518 c0257e80 00000001
00000001 00000000 c0220000
<6>[ 0.244000] GPR08: 00004000 c0002dbc 00021032 c0003f6c 00222728
ffffffff ffffffff ffffffff
<6>[ 0.244000] GPR16: ffffffff ffffffff ffffffff ffffffff ffffffff
ffffffff 00000000 00000010
<6>[ 0.244000] GPR24: 00000020 000080d0 c025263c 000000d0 c022693c
efc00000 c0257f50 00000007
<4>[ 0.244000] NIP [c0003f6c] timer_interrupt+0x0/0x19c
<4>[ 0.244000] LR [c0002dbc] ret_from_except+0x0/0x18
<4>[ 0.244000] Call Trace:
<4>[ 0.244000] Instruction dump:
<4>[ 0.244000] 900960bc 4802dd71 813b62d0 39290001 913b62d0 7f200124
38600000 80010034
<4>[ 0.244000] bb210014 7c0803a6 38210030 4e800020 <9421ffe0> 7c0802a6
bf61000c 90010024
<0>[ 0.244000] Kernel panic - not syncing: Attempted to kill the idle task!
<0>[ 0.244000] Rebooting in 180 seconds..
Things just don't look good here...
John mentioned inconsistencies with my available ram, heres what I found
in my xparameters_ml405.h file -
From my xparameters_ml405.h file:
/* Definitions for driver MPMC */
#define XPAR_XMPMC_NUM_INSTANCES 1
/* Definitions for peripheral DDR_SDRAM */
#define XPAR_DDR_SDRAM_DEVICE_ID 0
#define XPAR_DDR_SDRAM_MPMC_CTRL_BASEADDR 0xFFFFFFFF
#define XPAR_DDR_SDRAM_INCLUDE_ECC_SUPPORT 0
/******************************************************************/
/* Definitions for peripheral DDR_SDRAM */
#define XPAR_DDR_SDRAM_MPMC_BASEADDR 0x00000000
#define XPAR_DDR_SDRAM_MPMC_HIGHADDR 0x07FFFFFF
#define XPAR_DDR_SDRAM_SDMA_CTRL_BASEADDR 0x84600000
#define XPAR_DDR_SDRAM_SDMA_CTRL_HIGHADDR 0x8460FFFF
Unfortunately I'll have to wait till tomorrow to really dig into my
memory stuff, I figured I'd include it in case anyone has good info to
help me avoid walking down the wrong direction here.
I'm very grateful for your responses as they were tremendously helpful.
Thank you. And as before, any info or tips you guys have is always
appreciated.
thanks,
Lorenzo
David Baird wrote:
> On Mon, Jul 7, 2008 at 7:37 PM, Lorenzo T. Flores <lorenzo@alphagolf.com> wrote:
>
>> If I stop the processor after it hangs:
>>
>> XMD% mrd 0xc0259fa4 10
>> C0259FA4: 3C353E5B
>> C0259FA8: 20202020
>> C0259FAC: 302E3030
>> C0259FB0: 30303030
>> C0259FB4: 5D204C69
>> C0259FB8: 6E757820
>> C0259FBC: 76657273
>> C0259FC0: 696F6E20
>> C0259FC4: 322E362E
>> C0259FC8: 32352D72
>>
>
> Since XMD is also a Tcl shell, you can easily download __log_buf like this:
>
> set fd [open xmd.log w]
> puts $fd [mrd 0xc0259fa4 10]
>
> Then, with a little tweaking, you could use xxd or some other tool to
> convert it to ASCII.
>
>
>> If I cut off the 0xc0000000:
>>
>> XMD% mrd 0x259fa4 10
>> 259FA4: FFFFFFFF
>> 259FA8: FFFFFFFF
>> 259FAC: FFFFFFFF
>> 259FB0: FFFFFFFF
>> 259FB4: FFFFFFFF
>> 259FB8: FFFFFFFF
>> 259FBC: FFFFFFFF
>> 259FC0: FFFFFFFF
>> 259FC4: FFFFFFFF
>> 259FC8: FFFFFFFF
>>
>
> My guess is that if you issue a rst (reset) command, I think this will
> take the processor out of virtual mode and then you can strip of the
> 0xc0000000. But looks like you got what you need anyways, so no need
> for this :-)
>
> -David
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
^ permalink raw reply
* Re: linux-next: kbuild tree build failure
From: Michael Ellerman @ 2008-07-10 0:51 UTC (permalink / raw)
To: Roman Zippel
Cc: Stephen Rothwell, linux-next, Paul Mackerras, Sam Ravnborg,
linuxppc-dev
In-Reply-To: <Pine.LNX.4.64.0807080437550.6791@localhost.localdomain>
[-- Attachment #1: Type: text/plain, Size: 1721 bytes --]
On Tue, 2008-07-08 at 04:55 +0200, Roman Zippel wrote:
> Hi,
>
> On Tue, 8 Jul 2008, Michael Ellerman wrote:
>
> > I don't really see why it "doesn't make sense" for users to input 64-bit
> > values, they're configuring addresses for a 64-bit kernel, so some of
> > the values are going to be 64 bit.
>
> Do you really expect users to insert random 64bit addresses without making
> a mistake?
Well yes :) But I think that's because you're thinking of
"end-users" and I'm thinking of "users" like myself - ie. _I_ use
Kconfig and I do expect myself to be able to type a 64-bit address.
> > --- .config.orig 2008-07-08 09:30:00.000000000 +1000
> > +++ .config 2008-07-08 09:30:43.000000000 +1000
> > @@ -370,9 +370,8 @@
> > CONFIG_HOTPLUG_PCI_RPA=m
> > CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
> > # CONFIG_HAS_RAPIDIO is not set
> > -CONFIG_PAGE_OFFSET=0xc000000000000000
> > -CONFIG_KERNEL_START=0xc000000002000000
> > -CONFIG_PHYSICAL_START=0x02000000
> > +CONFIG_PAGE_OFFSET=0xc0000000
> > +CONFIG_PHYSICAL_START=0x2000000
>
> Why is this worse? These are constants, you're not supposed to change them
> anyway.
> The remaining values are generated in page.h and should be the same as
> before. If that isn't the case and this patch produces a nonworking
> kernel, I'd like to hear about it.
You're right the built kernel is fine. So it's not a bug, but I think it
is nicer to have the real values in the .config.
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
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^ permalink raw reply
* Re: [PATCH] powerpc: Fix problems with 32bit PPC's running with more than 2GB of RAM
From: Josh Boyer @ 2008-07-10 0:44 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Stefan Roese
In-Reply-To: <1215635979.8970.385.camel@pasglop>
On Thu, 10 Jul 2008 06:39:39 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> On Wed, 2008-07-09 at 16:22 -0400, Josh Boyer wrote:
> > On Thu, 10 Jul 2008 06:02:38 +1000
> > Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> >
> > > On Wed, 2008-07-09 at 15:44 +0200, Stefan Roese wrote:
> > > > This patch enables 32bit PPC's (with 36bit physical address space, e.g.
> > > > IBM/AMCC PPC44x) to run with more than 2GB of RAM. Mostly its just
> > > > replacing types (unsigned long -> phys_addr_t).
> > > >
> > > > Tested on an AMCC Katmai with 4GB of DDR2.
> > > >
> > > > Signed-off-by: Stefan Roese <sr@denx.de>
> > >
> > > But DMAs will break no ?
> >
> > How?
>
> Hrm... forget it. It's fine up to 4G of RAM... (ie. as long as DMA is
> below 32 bits).
Right. We haven't really dealt with anything larger than 4 GiB, and we
certainly aren't dealing with discontiguous DRAM due to I/O ranges.
josh
^ permalink raw reply
* latencytop support for powerpc?
From: Chris Friesen @ 2008-07-10 0:05 UTC (permalink / raw)
To: linuxppc-dev
Just wondering if anyone has looked at what it would take to support
latency top on powerpc?
I've got a dual G5 and I'd like to be able to track causes of latency.
Based on the s390 implementation it doesn't look all that complicated
for someone who understands what's going on...
Chris
^ permalink raw reply
* Re: Two pci patches that are prereq's for MPC5121 pci
From: John Rigby @ 2008-07-09 23:57 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
In-Reply-To: <1215640375.4392.0.camel@pasglop>
On Wed, Jul 9, 2008 at 3:52 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Wed, 2008-07-09 at 15:07 -0600, John Rigby wrote:
>> Ben,
>>
>> Could you pick up these two powerpc pci patches. Grant Likely ack'd
>> them both. No one nak'd them.
>>
>> powerpc: pci config cleanup [rev2]
>> http://patchwork.ozlabs.org/linuxppc/patchcontent?id=19299
>
> Hrm.. I'm not necessarily fan of the above but I'll give a second look.
>
I have no particular attachment to this. In my first attempt I just
added 5121 to the existing mess, Kumar asked if it could be cleaned
up. Looks like I can please about one person at a time, but no more
than one:).
>> powerpc: Move mpc83xx_add_bridge to fsl_pci.c [rev2]
>> http://patchwork.ozlabs.org/linuxppc/patchcontent?id=19300
>
> FSL stuff though go via Kumar.
Ok. Kumar can you pick this up? PCI for 5121 needs it.
>
> Cheers,
> Ben.
>
>
>
^ permalink raw reply
* initrd problem with device tree
From: John Linn @ 2008-07-09 22:10 UTC (permalink / raw)
To: linuxppc-dev; +Cc: David Gibson
[-- Attachment #1: Type: text/plain, Size: 1216 bytes --]
I realize I'm asking below about u-boot, but I'm really trying to better
understand how initrd should work with device trees. I have also posted
a question to the u-boot user group.
When I build the device tree blob into the kernel image and load the
kernel image with my probe, it finds the initrd fine just using
root=/dev/ram and with the kernel configured properly.
With the same kernel configuration, when I run with u-boot, the only way
for the kernel to find the initrd is to put linux,initrd-start and
initrd-end in my device tree. I found these items in an old patch from
David Gibson and I'm not sure if or when they should be used.
I also notice in booting-without-of.txt, off_mem_rsvmap, but it's not
clear if and how I should be using it to help the problem.
Thanks,
John
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
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^ permalink raw reply
* Re: Two pci patches that are prereq's for MPC5121 pci
From: Benjamin Herrenschmidt @ 2008-07-09 21:52 UTC (permalink / raw)
To: jcrigby; +Cc: linuxppc-dev
In-Reply-To: <4b73d43f0807091407w31280a43tbd07ec8a1aca1a93@mail.gmail.com>
On Wed, 2008-07-09 at 15:07 -0600, John Rigby wrote:
> Ben,
>
> Could you pick up these two powerpc pci patches. Grant Likely ack'd
> them both. No one nak'd them.
>
> powerpc: pci config cleanup [rev2]
> http://patchwork.ozlabs.org/linuxppc/patchcontent?id=19299
Hrm.. I'm not necessarily fan of the above but I'll give a second look.
> powerpc: Move mpc83xx_add_bridge to fsl_pci.c [rev2]
> http://patchwork.ozlabs.org/linuxppc/patchcontent?id=19300
FSL stuff though go via Kumar.
Cheers,
Ben.
^ permalink raw reply
* Two pci patches that are prereq's for MPC5121 pci
From: John Rigby @ 2008-07-09 21:07 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
Ben,
Could you pick up these two powerpc pci patches. Grant Likely ack'd
them both. No one nak'd them.
powerpc: pci config cleanup [rev2]
http://patchwork.ozlabs.org/linuxppc/patchcontent?id=19299
powerpc: Move mpc83xx_add_bridge to fsl_pci.c [rev2]
http://patchwork.ozlabs.org/linuxppc/patchcontent?id=19300
Thanks
John
^ permalink raw reply
* [PATCH 2/4][Version 3] MPC5121 clock driver
From: John Rigby @ 2008-07-09 20:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
In-Reply-To: <1215636844-32040-2-git-send-email-jrigby@freescale.com>
Plugs into the generic powerpc clock driver in
arch/powerpc/kernel/clock.c
The following subset of clk_interface is implemented:
clk_get, clk_put: get clock via name, release clock
clk_enable, clk_disable: enable or disable clock
clk_get_rate: get clock rate in Hz
clk_set_rate: stubbed
clk_round_rate: stubbed
clk_set_parent: NULL
clk_get_parent: NULL
Signed-off-by: John Rigby <jrigby@freescale.com>
---
Makefile | 1 +
arch/powerpc/platforms/512x/Kconfig | 1 +
arch/powerpc/platforms/512x/Makefile | 1 +
arch/powerpc/platforms/512x/clock.c | 729 ++++++++++++++++++++++++++++++++++
4 files changed, 732 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/clock.c
diff --git a/Makefile b/Makefile
index 6aff5f4..fc3ae9f 100644
--- a/Makefile
+++ b/Makefile
@@ -1,3 +1,4 @@
+FRED=42
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 26
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 4c0da0c..162af06 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -2,6 +2,7 @@ config PPC_MPC512x
bool
select FSL_SOC
select IPIC
+ select PPC_CLOCK
default n
config PPC_MPC5121
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
index 232c89f..90910c1 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,4 +1,5 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
+obj-y += clock.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
new file mode 100644
index 0000000..f416014
--- /dev/null
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -0,0 +1,729 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby <jrigby@freescale.com>
+ *
+ * Implements the clk api defined in include/linux/clk.h
+ *
+ * Original based on linux/arch/arm/mach-integrator/clock.c
+ *
+ * Copyright (C) 2004 ARM Limited.
+ * Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/clk.h>
+#include <linux/mutex.h>
+#include <linux/io.h>
+
+#include <linux/of_platform.h>
+#include <asm/mpc512x.h>
+#include <asm/clk_interface.h>
+
+#undef CLK_DEBUG
+
+static int clocks_initialized;
+
+#define CLK_HAS_RATE 0x1 /* has rate in MHz */
+#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
+
+struct clk {
+ struct list_head node;
+ char name[32];
+ int flags;
+ struct device *dev;
+ unsigned long rate;
+ struct module *owner;
+ void (*calc) (struct clk *);
+ struct clk *parent;
+ int reg, bit; /* CLK_HAS_CTRL */
+ int div_shift; /* only used by generic_div_clk_calc */
+};
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
+{
+ struct clk *p, *clk = ERR_PTR(-ENOENT);
+ int dev_match = 0;
+ int id_match = 0;
+
+ if (dev == NULL && id == NULL)
+ return NULL;
+
+ mutex_lock(&clocks_mutex);
+ list_for_each_entry(p, &clocks, node) {
+ if (dev && dev == p->dev)
+ dev_match++;
+ if (strcmp(id, p->name) == 0)
+ id_match++;
+ if ((dev_match || id_match) && try_module_get(p->owner)) {
+ clk = p;
+ break;
+ }
+ }
+ mutex_unlock(&clocks_mutex);
+
+ return clk;
+}
+
+#ifdef CLK_DEBUG
+static void dump_clocks(void)
+{
+ struct clk *p;
+
+ mutex_lock(&clocks_mutex);
+ printk(KERN_INFO "CLOCKS:\n");
+ list_for_each_entry(p, &clocks, node) {
+ printk(KERN_INFO " %s %ld", p->name, p->rate);
+ if (p->parent)
+ printk(KERN_INFO " %s %ld", p->parent->name,
+ p->parent->rate);
+ if (p->flags & CLK_HAS_CTRL)
+ printk(KERN_INFO " reg/bit %d/%d", p->reg, p->bit);
+ printk("\n");
+ }
+ mutex_unlock(&clocks_mutex);
+}
+#define DEBUG_CLK_DUMP() dump_clocks()
+#else
+#define DEBUG_CLK_DUMP()
+#endif
+
+
+static void mpc5121_clk_put(struct clk *clk)
+{
+ module_put(clk->owner);
+}
+
+#define NRPSC 12
+
+struct mpc512x_clockctl {
+ u32 spmr; /* System PLL Mode Reg */
+ u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */
+ u32 scfr1; /* System Clk Freq Reg 1 */
+ u32 scfr2; /* System Clk Freq Reg 2 */
+ u32 reserved;
+ u32 bcr; /* Bread Crumb Reg */
+ u32 pccr[NRPSC]; /* PSC Clk Ctrl Reg 0-11 */
+ u32 spccr; /* SPDIF Clk Ctrl Reg */
+ u32 cccr; /* CFM Clk Ctrl Reg */
+ u32 dccr; /* DIU Clk Cnfg Reg */
+};
+
+struct mpc512x_clockctl __iomem *clockctl;
+
+static int mpc5121_clk_enable(struct clk *clk)
+{
+ unsigned int mask;
+
+ if (clk->flags & CLK_HAS_CTRL) {
+ mask = in_be32(&clockctl->sccr[clk->reg]);
+ mask |= 1 << clk->bit;
+ out_be32(&clockctl->sccr[clk->reg], mask);
+ }
+ return 0;
+}
+
+static void mpc5121_clk_disable(struct clk *clk)
+{
+ unsigned int mask;
+
+ if (clk->flags & CLK_HAS_CTRL) {
+ mask = in_be32(&clockctl->sccr[clk->reg]);
+ mask &= ~(1 << clk->bit);
+ out_be32(&clockctl->sccr[clk->reg], mask);
+ }
+}
+
+static unsigned long mpc5121_clk_get_rate(struct clk *clk)
+{
+ if (clk->flags & CLK_HAS_RATE)
+ return clk->rate;
+ else
+ return 0;
+}
+
+static long mpc5121_clk_round_rate(struct clk *clk, unsigned long rate)
+{
+ return rate;
+}
+
+static int mpc5121_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+ return 0;
+}
+
+static int clk_register(struct clk *clk)
+{
+ mutex_lock(&clocks_mutex);
+ list_add(&clk->node, &clocks);
+ mutex_unlock(&clocks_mutex);
+ return 0;
+}
+
+static unsigned long spmf_mult(void)
+{
+ /*
+ * Convert spmf to multiplier
+ */
+ static int spmf_to_mult[] = {
+ 68, 1, 12, 16,
+ 20, 24, 28, 32,
+ 36, 40, 44, 48,
+ 52, 56, 60, 64
+ };
+ int spmf = (clockctl->spmr >> 24) & 0xf;
+ return spmf_to_mult[spmf];
+}
+
+static unsigned long sysdiv_div_x_2(void)
+{
+ /*
+ * Convert sysdiv to divisor x 2
+ * Some divisors have fractional parts so
+ * multiply by 2 then divide by this value
+ */
+ static int sysdiv_to_div_x_2[] = {
+ 4, 5, 6, 7,
+ 8, 9, 10, 14,
+ 12, 16, 18, 22,
+ 20, 24, 26, 30,
+ 28, 32, 34, 38,
+ 36, 40, 42, 46,
+ 44, 48, 50, 54,
+ 52, 56, 58, 62,
+ 60, 64, 66,
+ };
+ int sysdiv = (clockctl->scfr2 >> 26) & 0x3f;
+ return sysdiv_to_div_x_2[sysdiv];
+}
+
+static unsigned long ref_to_sys(unsigned long rate)
+{
+ rate *= spmf_mult();
+ rate *= 2;
+ rate /= sysdiv_div_x_2();
+
+ return rate;
+}
+
+static unsigned long sys_to_ref(unsigned long rate)
+{
+ rate *= sysdiv_div_x_2();
+ rate /= 2;
+ rate /= spmf_mult();
+
+ return rate;
+}
+
+static long ips_to_ref(unsigned long rate)
+{
+ int ips_div = (clockctl->scfr1 >> 23) & 0x7;
+
+ rate *= ips_div; /* csb_clk = ips_clk * ips_div */
+ rate *= 2; /* sys_clk = csb_clk * 2 */
+ return sys_to_ref(rate);
+}
+
+static unsigned long devtree_getfreq(char *clockname)
+{
+ struct device_node *np;
+ const unsigned int *prop;
+ unsigned int val = 0;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-immr");
+ if (np) {
+ prop = of_get_property(np, clockname, NULL);
+ if (prop)
+ val = *prop;
+ of_node_put(np);
+ }
+ return val;
+}
+
+static void ref_clk_calc(struct clk *clk)
+{
+ unsigned long rate;
+
+ rate = devtree_getfreq("bus-frequency");
+ if (rate == 0) {
+ printk(KERN_ERR "No bus-frequency in dev tree\n");
+ clk->rate = 0;
+ return;
+ }
+ clk->rate = ips_to_ref(rate);
+}
+
+static struct clk ref_clk = {
+ .name = "ref_clk",
+ .calc = ref_clk_calc,
+};
+
+
+static void sys_clk_calc(struct clk *clk)
+{
+ clk->rate = ref_to_sys(ref_clk.rate);
+}
+
+static struct clk sys_clk = {
+ .name = "sys_clk",
+ .calc = sys_clk_calc,
+};
+
+static void diu_clk_calc(struct clk *clk)
+{
+ int diudiv_x_2 = clockctl->scfr1 & 0xff;
+ unsigned long rate;
+
+ rate = sys_clk.rate;
+
+ rate *= 2;
+ rate /= diudiv_x_2;
+
+ clk->rate = rate;
+}
+
+static void half_clk_calc(struct clk *clk)
+{
+ clk->rate = clk->parent->rate / 2;
+}
+
+static void generic_div_clk_calc(struct clk *clk)
+{
+ int div = (clockctl->scfr1 >> clk->div_shift) & 0x7;
+
+ clk->rate = clk->parent->rate / div;
+}
+
+static void unity_clk_calc(struct clk *clk)
+{
+ clk->rate = clk->parent->rate;
+}
+
+static struct clk csb_clk = {
+ .name = "csb_clk",
+ .calc = half_clk_calc,
+ .parent = &sys_clk,
+};
+
+static void e300_clk_calc(struct clk *clk)
+{
+ int spmf = (clockctl->spmr >> 16) & 0xf;
+ int ratex2 = clk->parent->rate * spmf;
+
+ clk->rate = ratex2 / 2;
+}
+
+static struct clk e300_clk = {
+ .name = "e300_clk",
+ .calc = e300_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk ips_clk = {
+ .name = "ips_clk",
+ .calc = generic_div_clk_calc,
+ .parent = &csb_clk,
+ .div_shift = 23,
+};
+
+/*
+ * Clocks controlled by SCCR1 (.reg = 0)
+ */
+static struct clk lpc_clk = {
+ .name = "lpc_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 30,
+ .calc = generic_div_clk_calc,
+ .parent = &ips_clk,
+ .div_shift = 11,
+};
+
+static struct clk nfc_clk = {
+ .name = "nfc_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 29,
+ .calc = generic_div_clk_calc,
+ .parent = &ips_clk,
+ .div_shift = 8,
+};
+
+static struct clk pata_clk = {
+ .name = "pata_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 28,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+/*
+ * PSC clocks (bits 27 - 16)
+ * are setup elsewhere
+ */
+
+static struct clk sata_clk = {
+ .name = "sata_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 14,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk fec_clk = {
+ .name = "fec_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 13,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk pci_clk = {
+ .name = "pci_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 11,
+ .calc = generic_div_clk_calc,
+ .parent = &csb_clk,
+ .div_shift = 20,
+};
+
+/*
+ * Clocks controlled by SCCR2 (.reg = 1)
+ */
+static struct clk diu_clk = {
+ .name = "diu_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 31,
+ .calc = diu_clk_calc,
+};
+
+static struct clk axe_clk = {
+ .name = "axe_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 30,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk usb1_clk = {
+ .name = "usb1_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 28,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk usb2_clk = {
+ .name = "usb2_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 27,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk i2c_clk = {
+ .name = "i2c_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 26,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk mscan_clk = {
+ .name = "mscan_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 25,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk sdhc_clk = {
+ .name = "sdhc_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 24,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk mbx_bus_clk = {
+ .name = "mbx_bus_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 22,
+ .calc = half_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk mbx_clk = {
+ .name = "mbx_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 21,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk mbx_3d_clk = {
+ .name = "mbx_3d_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 20,
+ .calc = generic_div_clk_calc,
+ .parent = &mbx_bus_clk,
+ .div_shift = 14,
+};
+
+static void psc_mclk_in_calc(struct clk *clk)
+{
+ clk->rate = devtree_getfreq("psc_mclk_in");
+ if (!clk->rate)
+ clk->rate = 25000000;
+}
+
+static struct clk psc_mclk_in = {
+ .name = "psc_mclk_in",
+ .calc = psc_mclk_in_calc,
+};
+
+static struct clk spdif_txclk = {
+ .name = "spdif_txclk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 23,
+};
+
+static struct clk spdif_rxclk = {
+ .name = "spdif_rxclk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 23,
+};
+
+static void ac97_clk_calc(struct clk *clk)
+{
+ /* ac97 bit clock is always 24.567 MHz */
+ clk->rate = 24567000;
+}
+
+static struct clk ac97_clk = {
+ .name = "ac97_clk_in",
+ .calc = ac97_clk_calc,
+};
+
+struct clk *rate_clks[] = {
+ &ref_clk,
+ &sys_clk,
+ &diu_clk,
+ &csb_clk,
+ &e300_clk,
+ &ips_clk,
+ &fec_clk,
+ &sata_clk,
+ &pata_clk,
+ &nfc_clk,
+ &lpc_clk,
+ &mbx_bus_clk,
+ &mbx_clk,
+ &mbx_3d_clk,
+ &axe_clk,
+ &usb1_clk,
+ &usb2_clk,
+ &i2c_clk,
+ &mscan_clk,
+ &sdhc_clk,
+ &pci_clk,
+ &psc_mclk_in,
+ &spdif_txclk,
+ &spdif_rxclk,
+ &ac97_clk,
+ NULL
+};
+
+static void rate_clk_init(struct clk *clk)
+{
+ if (clk->calc) {
+ clk->calc(clk);
+ clk->flags |= CLK_HAS_RATE;
+ clk_register(clk);
+ } else {
+ printk(KERN_WARNING
+ "Could not initialize clk %s without a calc routine\n",
+ clk->name);
+ }
+}
+
+static void rate_clks_init(void)
+{
+ struct clk **cpp, *clk;
+
+ cpp = rate_clks;
+ while ((clk = *cpp++))
+ rate_clk_init(clk);
+}
+
+/*
+ * There are two clk enable registers with 32 enable bits each
+ * psc clocks and device clocks are all stored in dev_clks
+ */
+struct clk dev_clks[2][32];
+
+/*
+ * Given a psc number return the dev_clk
+ * associated with it
+ */
+static struct clk *psc_dev_clk(int pscnum)
+{
+ int reg, bit;
+ struct clk *clk;
+
+ reg = 0;
+ bit = 27 - pscnum;
+
+ clk = &dev_clks[reg][bit];
+ clk->reg = 0;
+ clk->bit = bit;
+ return clk;
+}
+
+/*
+ * PSC clock rate calculation
+ */
+static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
+{
+ unsigned long mclk_src = sys_clk.rate;
+ unsigned long mclk_div;
+
+ /*
+ * Can only change value of mclk divider
+ * when the divider is disabled.
+ *
+ * Zero is not a valid divider so minimum
+ * divider is 1
+ *
+ * disable/set divider/enable
+ */
+ out_be32(&clockctl->pccr[pscnum], 0);
+ out_be32(&clockctl->pccr[pscnum], 0x00020000);
+ out_be32(&clockctl->pccr[pscnum], 0x00030000);
+
+ if (clockctl->pccr[pscnum] & 0x80) {
+ clk->rate = spdif_rxclk.rate;
+ return;
+ }
+
+ switch ((clockctl->pccr[pscnum] >> 14) & 0x3) {
+ case 0:
+ mclk_src = sys_clk.rate;
+ break;
+ case 1:
+ mclk_src = ref_clk.rate;
+ break;
+ case 2:
+ mclk_src = psc_mclk_in.rate;
+ break;
+ case 3:
+ mclk_src = spdif_txclk.rate;
+ break;
+ }
+
+ mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1;
+ clk->rate = mclk_src / mclk_div;
+}
+
+/*
+ * Find all psc nodes in device tree and assign a clock
+ * with name "psc%d_mclk" and dev pointing at the device
+ * returned from of_find_device_by_node
+ */
+static void psc_clks_init(void)
+{
+ struct device_node *np;
+ const u32 *cell_index;
+ struct of_device *ofdev;
+
+ for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
+ cell_index = of_get_property(np, "cell-index", NULL);
+ if (cell_index) {
+ int pscnum = *cell_index;
+ struct clk *clk = psc_dev_clk(pscnum);
+
+ clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL;
+ ofdev = of_find_device_by_node(np);
+ clk->dev = &ofdev->dev;
+ /*
+ * AC97 is special rate clock does
+ * not go through normal path
+ */
+ if (strcmp("ac97", np->name) == 0)
+ clk->rate = ac97_clk.rate;
+ else
+ psc_calc_rate(clk, pscnum, np);
+ sprintf(clk->name, "psc%d_mclk", pscnum);
+ clk_register(clk);
+ clk_enable(clk);
+ }
+ }
+}
+
+static struct clk_interface mpc5121_clk_functions = {
+ .clk_get = mpc5121_clk_get,
+ .clk_enable = mpc5121_clk_enable,
+ .clk_disable = mpc5121_clk_disable,
+ .clk_get_rate = mpc5121_clk_get_rate,
+ .clk_put = mpc5121_clk_put,
+ .clk_round_rate = mpc5121_clk_round_rate,
+ .clk_set_rate = mpc5121_clk_set_rate,
+ .clk_set_parent = NULL,
+ .clk_get_parent = NULL,
+};
+
+static int
+mpc5121_clk_init(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
+ if (np) {
+ clockctl = of_iomap(np, 0);
+ of_node_put(np);
+ }
+
+ if (!clockctl) {
+ printk(KERN_ERR "Could not map clock control registers\n");
+ return 0;
+ }
+
+ rate_clks_init();
+ psc_clks_init();
+
+ /* leave clockctl mapped forever */
+ /*iounmap(clockctl); */
+ DEBUG_CLK_DUMP();
+ clocks_initialized++;
+ clk_functions = mpc5121_clk_functions;
+ return 0;
+}
+
+
+arch_initcall(mpc5121_clk_init);
--
^ permalink raw reply related
* [PATCH 4/4][Version 3] MPC5121 Add MPC5121ADS cpld support
From: John Rigby @ 2008-07-09 20:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
In-Reply-To: <1215636844-32040-4-git-send-email-jrigby@freescale.com>
Add a interrupt host for the interrupt
controller in the mpc5121ads cpld.
PCI interrupts are 0-7 the rest are 8-15
Touchscreen pendown irq is hardwired to irq1
All other irqs are chained to irq0
Signed-off-by: John Rigby <jrigby@freescale.com>
---
arch/powerpc/platforms/512x/Kconfig | 1 +
arch/powerpc/platforms/512x/Makefile | 2 +-
arch/powerpc/platforms/512x/mpc5121_ads.c | 11 ++
arch/powerpc/platforms/512x/mpc5121_ads.h | 16 ++
arch/powerpc/platforms/512x/mpc5121_ads_cpld.c | 204 ++++++++++++++++++++++++
5 files changed, 233 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/mpc5121_ads.h
create mode 100644 arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 5d72dc3..c62f893 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -13,6 +13,7 @@ config MPC5121_ADS
depends on PPC_MULTIPLATFORM && PPC32
select DEFAULT_UIMAGE
select PPC_MPC5121
+ select MPC5121_ADS_CPLD
help
This option enables support for the MPC5121E ADS board.
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
index 8090e22..90be2f5 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -2,5 +2,5 @@
# Makefile for the Freescale PowerPC 512x linux kernel.
#
obj-y += clock.o mpc512x_shared.o
-obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
+obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 3ec9ca3..5ebf693 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -23,10 +23,21 @@
#include <asm/time.h>
#include "mpc512x.h"
+#include "mpc5121_ads.h"
+
+static void __init mpc5121_ads_setup_arch(void)
+{
+ printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n");
+ /*
+ * cpld regs are needed early
+ */
+ mpc5121_ads_cpld_map();
+}
static void __init mpc5121_ads_init_IRQ(void)
{
mpc512x_init_IRQ();
+ mpc5121_ads_cpld_pic_init();
}
/*
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.h b/arch/powerpc/platforms/512x/mpc5121_ads.h
new file mode 100644
index 0000000..662076c
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Prototypes for ADS5121 specific code
+ */
+
+#ifndef __MPC512ADS_H__
+#define __MPC512ADS_H__
+extern void __init mpc5121_ads_cpld_map(void);
+extern void __init mpc5121_ads_cpld_pic_init(void);
+#endif /* __MPC512ADS_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
new file mode 100644
index 0000000..a6ce805
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -0,0 +1,204 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>
+ *
+ * Description:
+ * MPC5121ADS CPLD irq handling
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/prom.h>
+
+static struct device_node *cpld_pic_node;
+static struct irq_host *cpld_pic_host;
+
+/*
+ * Bits to ignore in the misc_status register
+ * 0x10 touch screen pendown is hard routed to irq1
+ * 0x02 pci status is read from pci status register
+ */
+#define MISC_IGNORE 0x12
+
+/*
+ * Nothing to ignore in pci status register
+ */
+#define PCI_IGNORE 0x00
+
+struct cpld_pic {
+ u8 pci_mask;
+ u8 pci_status;
+ u8 route;
+ u8 misc_mask;
+ u8 misc_status;
+ u8 misc_control;
+};
+
+static struct cpld_pic __iomem *cpld_regs;
+
+static void __iomem *
+irq_to_pic_mask(unsigned int irq)
+{
+ return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask;
+}
+
+static unsigned int
+irq_to_pic_bit(unsigned int irq)
+{
+ return 1 << (irq & 0x7);
+}
+
+static void
+cpld_mask_irq(unsigned int irq)
+{
+ unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
+ void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
+
+ out_8(pic_mask,
+ in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
+}
+
+static void
+cpld_unmask_irq(unsigned int irq)
+{
+ unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
+ void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
+
+ out_8(pic_mask,
+ in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
+}
+
+static struct irq_chip cpld_pic = {
+ .typename = " CPLD PIC ",
+ .mask = cpld_mask_irq,
+ .ack = cpld_mask_irq,
+ .unmask = cpld_unmask_irq,
+};
+
+static int
+cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
+ u8 __iomem *maskp)
+{
+ int cpld_irq;
+ u8 status = in_8(statusp);
+ u8 mask = in_8(maskp);
+
+ /* ignore don't cares and masked irqs */
+ status |= (ignore | mask);
+
+ if (status == 0xff)
+ return NO_IRQ_IGNORE;
+
+ cpld_irq = ffz(status) + offset;
+
+ return irq_linear_revmap(cpld_pic_host, cpld_irq);
+}
+
+static void
+cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
+ &cpld_regs->pci_mask);
+ if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
+ generic_handle_irq(irq);
+ return;
+ }
+
+ irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
+ &cpld_regs->misc_mask);
+ if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
+ generic_handle_irq(irq);
+ return;
+ }
+}
+
+static int
+cpld_pic_host_match(struct irq_host *h, struct device_node *node)
+{
+ return cpld_pic_node == node;
+}
+
+static int
+cpld_pic_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ get_irq_desc(virq)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq);
+ return 0;
+}
+
+static struct
+irq_host_ops cpld_pic_host_ops = {
+ .match = cpld_pic_host_match,
+ .map = cpld_pic_host_map,
+};
+
+void __init
+mpc5121_ads_cpld_map(void)
+{
+ struct device_node *np = NULL;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
+ if (!np) {
+ printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
+ return;
+ }
+
+ cpld_regs = of_iomap(np, 0);
+ of_node_put(np);
+}
+
+void __init
+mpc5121_ads_cpld_pic_init(void)
+{
+ unsigned int cascade_irq;
+ struct device_node *np = NULL;
+
+ pr_debug("cpld_ic_init\n");
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
+ if (!np) {
+ printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
+ return;
+ }
+
+ if (!cpld_regs)
+ goto end;
+
+ cascade_irq = irq_of_parse_and_map(np, 0);
+ if (cascade_irq == NO_IRQ)
+ goto end;
+
+ /*
+ * statically route touch screen pendown through 1
+ * and ignore it here
+ * route all others through our cascade irq
+ */
+ out_8(&cpld_regs->route, 0xfd);
+ out_8(&cpld_regs->pci_mask, 0xff);
+ /* unmask pci ints in misc mask */
+ out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE));
+
+ cpld_pic_node = of_node_get(np);
+
+ cpld_pic_host =
+ irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 16, &cpld_pic_host_ops, 16);
+ if (!cpld_pic_host) {
+ printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
+ goto end;
+ }
+
+ set_irq_chained_handler(cascade_irq, cpld_pic_cascade);
+end:
+ of_node_put(np);
+}
--
^ permalink raw reply related
* [PATCH 3/4][Version 3] MPC5121 Add generic board support
From: John Rigby @ 2008-07-09 20:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
In-Reply-To: <1215636844-32040-3-git-send-email-jrigby@freescale.com>
Move shared code from mpc5121_ads.c to new file mpc512x_shared.c
mpc512x_find_ips_freq -> unchanged
contents of mpc5121_ads_init_IRQ -> mpc512x_init_IRQ
looking for fsl,mpc5121-ipic instead of fsl,ipic
mpc5121_ads_declare_of_platform_devices -> mpc5121_declare_of_platform_devices
and use compatible for lookup instead of node name
Add new generic board setup mpc5121_generic.c
Signed-off-by: John Rigby <jrigby@freescale.com>
---
arch/powerpc/platforms/512x/Kconfig | 15 ++++-
arch/powerpc/platforms/512x/Makefile | 3 +-
arch/powerpc/platforms/512x/mpc5121_ads.c | 64 ++------------------
arch/powerpc/platforms/512x/mpc5121_generic.c | 58 ++++++++++++++++++
arch/powerpc/platforms/512x/mpc512x.h | 17 +++++
.../512x/{mpc5121_ads.c => mpc512x_shared.c} | 57 ++++++------------
6 files changed, 112 insertions(+), 102 deletions(-)
create mode 100644 arch/powerpc/platforms/512x/mpc5121_generic.c
create mode 100644 arch/powerpc/platforms/512x/mpc512x.h
copy arch/powerpc/platforms/512x/{mpc5121_ads.c => mpc512x_shared.c} (55%)
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 162af06..5d72dc3 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -3,12 +3,10 @@ config PPC_MPC512x
select FSL_SOC
select IPIC
select PPC_CLOCK
- default n
config PPC_MPC5121
bool
select PPC_MPC512x
- default n
config MPC5121_ADS
bool "Freescale MPC5121E ADS"
@@ -17,4 +15,15 @@ config MPC5121_ADS
select PPC_MPC5121
help
This option enables support for the MPC5121E ADS board.
- default n
+
+config MPC5121_GENERIC
+ bool "Generic support for simple MPC5121 based boards"
+ depends on PPC_MULTIPLATFORM && PPC32
+ select DEFAULT_UIMAGE
+ select PPC_MPC5121
+ help
+ This option enables support for simple MPC5121 based boards
+ which do not need custom platform specific setup.
+
+ Compatible boards include: Protonic LVT base boards (ZANMCU
+ and VICVT2).
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
index 90910c1..8090e22 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,5 +1,6 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-y += clock.o
+obj-y += clock.o mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
+obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 50bd3a3..3ec9ca3 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
*
@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <linux/irq.h>
#include <linux/of_platform.h>
#include <asm/machdep.h>
@@ -23,65 +22,11 @@
#include <asm/prom.h>
#include <asm/time.h>
-/**
- * mpc512x_find_ips_freq - Find the IPS bus frequency for a device
- * @node: device node
- *
- * Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
- */
-unsigned long
-mpc512x_find_ips_freq(struct device_node *node)
-{
- struct device_node *np;
- const unsigned int *p_ips_freq = NULL;
-
- of_node_get(node);
- while (node) {
- p_ips_freq = of_get_property(node, "bus-frequency", NULL);
- if (p_ips_freq)
- break;
-
- np = of_get_parent(node);
- of_node_put(node);
- node = np;
- }
- if (node)
- of_node_put(node);
-
- return p_ips_freq ? *p_ips_freq : 0;
-}
-EXPORT_SYMBOL(mpc512x_find_ips_freq);
-
-static struct of_device_id __initdata of_bus_ids[] = {
- { .name = "soc", },
- { .name = "localbus", },
- {},
-};
-
-static void __init mpc5121_ads_declare_of_platform_devices(void)
-{
- /* Find every child of the SOC node and add it to of_platform */
- if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
- printk(KERN_ERR __FILE__ ": "
- "Error while probing of_platform bus\n");
-}
+#include "mpc512x.h"
static void __init mpc5121_ads_init_IRQ(void)
{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
- if (!np)
- return;
-
- ipic_init(np, 0);
- of_node_put(np);
-
- /*
- * Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- ipic_set_default_priority();
+ mpc512x_init_IRQ();
}
/*
@@ -97,7 +42,8 @@ static int __init mpc5121_ads_probe(void)
define_machine(mpc5121_ads) {
.name = "MPC5121 ADS",
.probe = mpc5121_ads_probe,
- .init = mpc5121_ads_declare_of_platform_devices,
+ .setup_arch = mpc5121_ads_setup_arch,
+ .init = mpc512x_declare_of_platform_devices,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
new file mode 100644
index 0000000..2479de9
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>
+ *
+ * Description:
+ * MPC5121 SoC setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+#include "mpc512x.h"
+
+/*
+ * list of supported boards
+ */
+static char *board[] __initdata = {
+ "prt,prtlvt",
+ NULL
+};
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc5121_generic_probe(void)
+{
+ unsigned long node = of_get_flat_dt_root();
+ int i = 0;
+
+ while (board[i]) {
+ if (of_flat_dt_is_compatible(node, board[i]))
+ break;
+ i++;
+ }
+
+ return board[i] != NULL;
+}
+
+define_machine(mpc5121_generic) {
+ .name = "MPC5121 generic",
+ .probe = mpc5121_generic_probe,
+ .init = mpc512x_declare_of_platform_devices,
+ .init_IRQ = mpc512x_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
new file mode 100644
index 0000000..9c03693
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Prototypes for MPC512x shared code
+ */
+
+#ifndef __MPC512X_H__
+#define __MPC512X_H__
+extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
+extern void __init mpc512x_init_IRQ(void);
+void __init mpc512x_declare_of_platform_devices(void);
+#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
similarity index 55%
copy from arch/powerpc/platforms/512x/mpc5121_ads.c
copy to arch/powerpc/platforms/512x/mpc512x_shared.c
index 50bd3a3..d8cd579 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -1,16 +1,15 @@
/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
*
- * Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
+ * Author: John Rigby <jrigby@freescale.com>
*
* Description:
- * MPC5121 ADS board setup
+ * MPC512x Shared code
*
* This is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
- *
*/
#include <linux/kernel.h>
@@ -23,12 +22,8 @@
#include <asm/prom.h>
#include <asm/time.h>
-/**
- * mpc512x_find_ips_freq - Find the IPS bus frequency for a device
- * @node: device node
- *
- * Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
- */
+#include "mpc512x.h"
+
unsigned long
mpc512x_find_ips_freq(struct device_node *node)
{
@@ -52,25 +47,11 @@ mpc512x_find_ips_freq(struct device_node *node)
}
EXPORT_SYMBOL(mpc512x_find_ips_freq);
-static struct of_device_id __initdata of_bus_ids[] = {
- { .name = "soc", },
- { .name = "localbus", },
- {},
-};
-
-static void __init mpc5121_ads_declare_of_platform_devices(void)
-{
- /* Find every child of the SOC node and add it to of_platform */
- if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
- printk(KERN_ERR __FILE__ ": "
- "Error while probing of_platform bus\n");
-}
-
-static void __init mpc5121_ads_init_IRQ(void)
+void __init mpc512x_init_IRQ(void)
{
struct device_node *np;
- np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic");
if (!np)
return;
@@ -85,20 +66,18 @@ static void __init mpc5121_ads_init_IRQ(void)
}
/*
- * Called very early, MMU is off, device-tree isn't unflattened
+ * Nodes to do bus probe on, soc and localbus
*/
-static int __init mpc5121_ads_probe(void)
-{
- unsigned long root = of_get_flat_dt_root();
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .compatible = "fsl,mpc5121-immr", },
+ { .compatible = "fsl,mpc5121-localbus", },
+ {},
+};
- return of_flat_dt_is_compatible(root, "fsl,mpc5121ads");
+void __init mpc512x_declare_of_platform_devices(void)
+{
+ if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
+ printk(KERN_ERR __FILE__ ": "
+ "Error while probing of_platform bus\n");
}
-define_machine(mpc5121_ads) {
- .name = "MPC5121 ADS",
- .probe = mpc5121_ads_probe,
- .init = mpc5121_ads_declare_of_platform_devices,
- .init_IRQ = mpc5121_ads_init_IRQ,
- .get_irq = ipic_get_irq,
- .calibrate_decr = generic_calibrate_decr,
-};
--
^ permalink raw reply related
* [PATCH 1/4][Version 3] MPC5121 Update MPC5121ADS device tree
From: John Rigby @ 2008-07-09 20:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
In-Reply-To: <1215636844-32040-1-git-send-email-jrigby@freescale.com>
Current device tree is only bare bones. This patch
adds nodes to make it a complete tree for MPC5121ads.
Added nodes include:
mbx - opengl coprocessor
nfc - nand flash controller
cpld-pic - on board cpld
rtc
clock - clock control
pmc - power management control
gpio
mscan - can module
i2c
axe - audio coprocessor
display - display interface unit
mdio
ethernet
usb
ioctl - pin config
pata
ac97 - PSC configured as AC97
pscfifo - psc fifo configuration
dma
pci
Fix typo in header changing MDS to ADS.
Add a compatible property of the form "fsl,mpc5121-..."
to nodes missing one.
Changed localbus compatible to fsl,mpc5121-localbus, this does
not break anything because the only code that uses it finds it
via the node name, not compatible.
Signed-off-by: John Rigby <jrigby@freescale.com>
---
arch/powerpc/boot/dts/mpc5121ads.dts | 310 ++++++++++++++++++++++++++++++++--
1 files changed, 299 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 94ad7b2..1f9036c 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -1,7 +1,7 @@
/*
- * MPC5121E MDS Device Tree Source
+ * MPC5121E ADS Device Tree Source
*
- * Copyright 2007 Freescale Semiconductor Inc.
+ * Copyright 2007,2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -17,6 +17,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ pci = &pci;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -39,8 +43,41 @@
reg = <0x00000000 0x10000000>; // 256MB at 0
};
+ mbx@20000000 {
+ compatible = "fsl,mpc5121-mbx";
+ reg = <0x20000000 0x4000>;
+ interrupts = <66 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sram@30000000 {
+ compatible = "fsl,mpc5121-sram";
+ reg = <0x30000000 0x20000>; // 128K at 0x30000000
+ };
+
+ nfc@40000000 {
+ compatible = "fsl,mpc5121-nfc";
+ reg = <0x40000000 0x100000>; // 1M at 0x40000000
+ interrupts = <6 8>;
+ interrupt-parent = < &ipic >;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <1>;
+ // ADS has two Hynix 512MB Nand flash chips in a single
+ // stacked package .
+ chips = <2>;
+ nand0@0 {
+ label = "nand0";
+ reg = <0x00000000 0x02000000>; // first 32 MB of chip 0
+ };
+ nand1@20000000 {
+ label = "nand1";
+ reg = <0x20000000 0x02000000>; // first 32 MB of chip 1
+ };
+ };
+
localbus@80000020 {
- compatible = "fsl,mpc5121ads-localbus";
+ compatible = "fsl,mpc5121-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x80000020 0x40>;
@@ -51,14 +88,51 @@
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
bank-width = <4>;
- device-width = <1>;
+ device-width = <2>;
+ protected@0 {
+ label = "protected";
+ reg = <0x00000000 0x00040000>; // first sector is protected
+ read-only;
+ };
+ filesystem@40000 {
+ label = "filesystem";
+ reg = <0x00040000 0x03c00000>; // 60M for filesystem
+ };
+ kernel@3c40000 {
+ label = "kernel";
+ reg = <0x03c40000 0x00280000>; // 2.5M for kernel
+ };
+ device-tree@3ec0000 {
+ label = "device-tree";
+ reg = <0x03ec0000 0x00040000>; // one sector for device tree
+ };
+ u-boot@3f00000 {
+ label = "u-boot";
+ reg = <0x03f00000 0x00100000>; // 1M for u-boot
+ read-only;
+ };
};
board-control@2,0 {
compatible = "fsl,mpc5121ads-cpld";
reg = <0x2 0x0 0x8000>;
};
+
+ cpld_pic: pic@2,a {
+ compatible = "fsl,mpc5121ads-cpld-pic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x2 0xa 0x5>;
+ interrupt-parent = < &ipic >;
+ // irq routing
+ // all irqs but touch screen are routed to irq0 (ipic 48)
+ // touch screen is statically routed to irq1 (ipic 17)
+ // so don't use it here
+ interrupts = <48 0x8>;
+ };
};
soc@80000000 {
@@ -85,38 +159,252 @@
reg = <0xc00 0x100>;
};
- // 512x PSCs are not 52xx PSCs compatible
+ rtc@a00 { // Real time clock
+ compatible = "fsl,mpc5121-rtc";
+ reg = <0xa00 0x100>;
+ interrupts = <79 0x8 80 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ clock@f00 { // Clock control
+ compatible = "fsl,mpc5121-clock";
+ reg = <0xf00 0x100>;
+ };
+
+ pmc@1000{ //Power Management Controller
+ compatible = "fsl,mpc5121-pmc";
+ reg = <0x1000 0x100>;
+ interrupts = <83 0x2>;
+ interrupt-parent = < &ipic >;
+ };
+
+ gpio@1100 {
+ compatible = "fsl,mpc5121-gpio";
+ reg = <0x1100 0x100>;
+ interrupts = <78 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ mscan@1300 {
+ compatible = "fsl,mpc5121-mscan";
+ cell-index = <0>;
+ interrupts = <12 0x8>;
+ interrupt-parent = < &ipic >;
+ reg = <0x1300 0x80>;
+ };
+
+ mscan@1380 {
+ compatible = "fsl,mpc5121-mscan";
+ cell-index = <1>;
+ interrupts = <13 0x8>;
+ interrupt-parent = < &ipic >;
+ reg = <0x1380 0x80>;
+ };
+
+ i2c@1700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+ cell-index = <0>;
+ reg = <0x1700 0x20>;
+ interrupts = <9 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2c@1720 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+ cell-index = <1>;
+ reg = <0x1720 0x20>;
+ interrupts = <10 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2c@1740 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+ cell-index = <2>;
+ reg = <0x1740 0x20>;
+ interrupts = <11 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2ccontrol@1760 {
+ compatible = "fsl,mpc5121-i2c-ctrl";
+ reg = <0x1760 0x8>;
+ };
+
+ axe@2000 {
+ compatible = "fsl,mpc5121-axe";
+ reg = <0x2000 0x100>;
+ interrupts = <42 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ display@2100 {
+ compatible = "fsl,mpc5121-diu", "fsl-diu";
+ reg = <0x2100 0x100>;
+ interrupts = <64 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ mdio@2800 {
+ compatible = "fsl,mpc5121-fec-mdio";
+ reg = <0x2800 0x800>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy: ethernet-phy@0 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@2800 {
+ device_type = "network";
+ compatible = "fsl,mpc5121-fec";
+ reg = <0x2800 0x800>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <4 0x8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy >;
+ fsl,align-tx-packets = <4>;
+ };
+
+ // 5121e has two dr usb modules
+ // mpc5121_ads only uses USB0
+
+ // USB1 using external ULPI PHY
+ //usb@3000 {
+ // compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
+ // reg = <0x3000 0x1000>;
+ // #address-cells = <1>;
+ // #size-cells = <0>;
+ // interrupt-parent = < &ipic >;
+ // interrupts = <43 0x8>;
+ // dr_mode = "otg";
+ // phy_type = "ulpi";
+ // port1;
+ //};
+
+ // USB0 using internal UTMI PHY
+ usb@4000 {
+ compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
+ reg = <0x4000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ port0;
+ };
+
+ // IO control
+ ioctl@a000 {
+ compatible = "fsl,mpc5121-ioctl";
+ reg = <0xA000 0x1000>;
+ };
+
+ pata@10200 {
+ compatible = "fsl,mpc5121-pata";
+ reg = <0x10200 0x100>;
+ interrupts = <5 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ // 512x PSCs are not 52xx PSC compatible
// PSC3 serial port A aka ttyPSC0
serial@11300 {
device_type = "serial";
- compatible = "fsl,mpc5121-psc-uart";
+ compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
// Logical port assignment needed until driver
// learns to use aliases
port-number = <0>;
cell-index = <3>;
reg = <0x11300 0x100>;
- interrupts = <0x28 0x8>; // actually the fifo irq
+ interrupts = <40 0x8>;
interrupt-parent = < &ipic >;
+ rx-fifo-size = <16>;
+ tx-fifo-size = <16>;
};
// PSC4 serial port B aka ttyPSC1
serial@11400 {
device_type = "serial";
- compatible = "fsl,mpc5121-psc-uart";
+ compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
// Logical port assignment needed until driver
// learns to use aliases
port-number = <1>;
cell-index = <4>;
reg = <0x11400 0x100>;
- interrupts = <0x28 0x8>; // actually the fifo irq
+ interrupts = <40 0x8>;
interrupt-parent = < &ipic >;
+ rx-fifo-size = <16>;
+ tx-fifo-size = <16>;
};
- pscsfifo@11f00 {
+ // PSC5 in ac97 mode
+ ac97@11500 {
+ compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
+ cell-index = <5>;
+ reg = <0x11500 0x100>;
+ interrupts = <40 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl,mode = "ac97-slave";
+ rx-fifo-size = <384>;
+ tx-fifo-size = <384>;
+ };
+
+ pscfifo@11f00 {
compatible = "fsl,mpc5121-psc-fifo";
reg = <0x11f00 0x100>;
- interrupts = <0x28 0x8>;
+ interrupts = <40 0x8>;
interrupt-parent = < &ipic >;
};
+
+ dma@14000 {
+ compatible = "fsl,mpc5121-dma2";
+ reg = <0x14000 0x1800>;
+ interrupts = <65 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ };
+
+ pci: pci@80008500 {
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ // IDSEL 0x15 - Slot 1 PCI
+ 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
+ 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
+ 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
+ 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
+
+ // IDSEL 0x16 - Slot 2 MiniPCI
+ 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
+ 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
+
+ // IDSEL 0x17 - Slot 3 MiniPCI
+ 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
+ 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
+ >;
+ interrupt-parent = < &ipic >;
+ interrupts = <1 0x8>;
+ bus-range = <0 0>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0x80008500 0x100>;
+ compatible = "fsl,mpc5121-pci";
+ device_type = "pci";
};
};
--
^ permalink raw reply related
* [PATCH 0/4][Version 3] MPC5121 Updates
From: John Rigby @ 2008-07-09 20:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
The following patches contain updates for MPC5121
1/4
Updates the device tree.
Addresses all comments received.
2/4
Adds a clock driver. Cleanup based on input from Stephen Rothwell,
and Grant Likely. Also now uses the clock driver in
arch/powerpc/kernel/clock.c instead of exporting api's directly.
3/4
Adds support for generic boards. This is nearly identical to
David Jander's patch but does not delete the ADS board option.
ADS is not a candidate for generic since it has an on board
cpld that does pci interrupt routing.
4/4
Adds support for the CPLD on the MPC5121ADS board.
Some minor changes based on input from Grant Likely.
This patchset does not include PCI support. PCI support for 5121
needs mpc83xx_add_bridge to be moved to sysdev/fsl_pci.c. That
change is in a different patch set. I'll submit a 5121 PCI patch
after that different patch set gets committed.
^ permalink raw reply
* Re: [Cbe-oss-dev] [patch 02/02] powerpc/cell: add support for power button of future IBM cell blades
From: Benjamin Herrenschmidt @ 2008-07-09 20:45 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Christian Krafft, Christian Krafft, cbe-oss-dev, linuxppc-dev
In-Reply-To: <200807091515.04484.arnd@arndb.de>
On Wed, 2008-07-09 at 15:15 +0200, Arnd Bergmann wrote:
> Ugly, but doable, yes. I wonder if there is a way that we can trigger some
> interrupt from system_reset_exception context in order to get around the
> polling though. tasklets and workqueues unfortunately won't do us any good
> here because they also depend on disabling interrupts.
You can trigger a DEC interrupt at any time but you don't have
a nice hook to catch it. You can probably trigger an IPI to yourself
using a special call to the iic, do we have any available number ?
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Fix problems with 32bit PPC's running with more than 2GB of RAM
From: Benjamin Herrenschmidt @ 2008-07-09 20:39 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev, Stefan Roese
In-Reply-To: <20080709162219.4c07a67e@zod.rchland.ibm.com>
On Wed, 2008-07-09 at 16:22 -0400, Josh Boyer wrote:
> On Thu, 10 Jul 2008 06:02:38 +1000
> Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> > On Wed, 2008-07-09 at 15:44 +0200, Stefan Roese wrote:
> > > This patch enables 32bit PPC's (with 36bit physical address space, e.g.
> > > IBM/AMCC PPC44x) to run with more than 2GB of RAM. Mostly its just
> > > replacing types (unsigned long -> phys_addr_t).
> > >
> > > Tested on an AMCC Katmai with 4GB of DDR2.
> > >
> > > Signed-off-by: Stefan Roese <sr@denx.de>
> >
> > But DMAs will break no ?
>
> How?
Hrm... forget it. It's fine up to 4G of RAM... (ie. as long as DMA is
below 32 bits).
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Fix problems with 32bit PPC's running with more than 2GB of RAM
From: Josh Boyer @ 2008-07-09 20:22 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Stefan Roese
In-Reply-To: <1215633758.8970.372.camel@pasglop>
On Thu, 10 Jul 2008 06:02:38 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> On Wed, 2008-07-09 at 15:44 +0200, Stefan Roese wrote:
> > This patch enables 32bit PPC's (with 36bit physical address space, e.g.
> > IBM/AMCC PPC44x) to run with more than 2GB of RAM. Mostly its just
> > replacing types (unsigned long -> phys_addr_t).
> >
> > Tested on an AMCC Katmai with 4GB of DDR2.
> >
> > Signed-off-by: Stefan Roese <sr@denx.de>
>
> But DMAs will break no ?
How?
josh
^ permalink raw reply
* Re: [PATCH] powerpc: Fix problems with 32bit PPC's running with more than 2GB of RAM
From: Benjamin Herrenschmidt @ 2008-07-09 20:02 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <1215611076-13518-1-git-send-email-sr@denx.de>
On Wed, 2008-07-09 at 15:44 +0200, Stefan Roese wrote:
> This patch enables 32bit PPC's (with 36bit physical address space, e.g.
> IBM/AMCC PPC44x) to run with more than 2GB of RAM. Mostly its just
> replacing types (unsigned long -> phys_addr_t).
>
> Tested on an AMCC Katmai with 4GB of DDR2.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
But DMAs will break no ?
Ben.
> ---
> arch/powerpc/mm/init_32.c | 4 ++--
> arch/powerpc/mm/mem.c | 8 ++++----
> arch/powerpc/mm/mmu_decl.h | 4 ++--
> 3 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> index 1952b4d..325ccdd 100644
> --- a/arch/powerpc/mm/init_32.c
> +++ b/arch/powerpc/mm/init_32.c
> @@ -56,8 +56,8 @@
>
> DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
>
> -unsigned long total_memory;
> -unsigned long total_lowmem;
> +phys_addr_t total_memory;
> +phys_addr_t total_lowmem;
>
> phys_addr_t memstart_addr = (phys_addr_t)~0ull;
> EXPORT_SYMBOL(memstart_addr);
> diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
> index 51f82d8..55ef772 100644
> --- a/arch/powerpc/mm/mem.c
> +++ b/arch/powerpc/mm/mem.c
> @@ -329,7 +329,7 @@ static int __init mark_nonram_nosave(void)
> void __init paging_init(void)
> {
> unsigned long total_ram = lmb_phys_mem_size();
> - unsigned long top_of_ram = lmb_end_of_DRAM();
> + phys_addr_t top_of_ram = lmb_end_of_DRAM();
> unsigned long max_zone_pfns[MAX_NR_ZONES];
>
> #ifdef CONFIG_PPC32
> @@ -348,10 +348,10 @@ void __init paging_init(void)
> kmap_prot = PAGE_KERNEL;
> #endif /* CONFIG_HIGHMEM */
>
> - printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
> - top_of_ram, total_ram);
> + printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%lx\n",
> + (u64)top_of_ram, total_ram);
> printk(KERN_DEBUG "Memory hole size: %ldMB\n",
> - (top_of_ram - total_ram) >> 20);
> + (long int)((top_of_ram - total_ram) >> 20));
> memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
> #ifdef CONFIG_HIGHMEM
> max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT;
> diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
> index 0480225..4e46c63 100644
> --- a/arch/powerpc/mm/mmu_decl.h
> +++ b/arch/powerpc/mm/mmu_decl.h
> @@ -49,8 +49,8 @@ extern unsigned int num_tlbcam_entries;
> extern unsigned long ioremap_bot;
> extern unsigned long __max_low_memory;
> extern phys_addr_t __initial_memory_limit_addr;
> -extern unsigned long total_memory;
> -extern unsigned long total_lowmem;
> +extern phys_addr_t total_memory;
> +extern phys_addr_t total_lowmem;
> extern phys_addr_t memstart_addr;
> extern phys_addr_t lowmem_end_addr;
>
^ permalink raw reply
* PPC Linux start address on XUPV2P board
From: Alan Casey @ 2008-07-09 20:13 UTC (permalink / raw)
To: linuxppc-embedded
Hi,
I am running the Linux 2.6.24 kernel from the git.xilinx.com source
tree.
I am just wondering what is the start address that is used for
the Linux kernel in RAM/SDRAM on the Xilinx XUPV2P board and
where is this defined in the Linux kernel sources?
Also does the PPC Linux kernel support true 64-bit write/read access
to peripherals on the XUPV2P board or similar boards?
Any info. appreciated,
Regards,
Alan.
^ permalink raw reply
* Re: [PATCH 0/3] ALSA fixes for non-coherent ppc32
From: Benjamin Herrenschmidt @ 2008-07-09 20:06 UTC (permalink / raw)
To: Takashi Iwai; +Cc: linuxppc-dev
In-Reply-To: <s5hlk0byneg.wl%tiwai@suse.de>
> The changes in ppc are only the patch below. The others are in
> sound/*. I wrote it as an inline function simply it's so short and I
> didn't want extra exports.
Thanks. I -may- do something nicer, we'll see, but in any case, I'll
try to have something in .27
Cheers,
Ben.
>
> thanks,
>
> Takashi
>
> ---
> commit 2c8662fde57af4cf928d17e089dc3dd2096f4b30
> Author: Takashi Iwai <tiwai@suse.de>
> Date: Tue Jun 17 16:39:04 2008 +0200
>
> ppc: Add dma_mmap_coherent() for PPC32
>
> A very lazy version of dma_mmap_coherent() implementation for ppc32.
>
> Signed-off-by: Takashi Iwai <tiwai@suse.de>
>
> diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
> index bbefb69..a6a9675 100644
> --- a/include/asm-powerpc/dma-mapping.h
> +++ b/include/asm-powerpc/dma-mapping.h
> @@ -306,6 +306,24 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
> /* We don't do anything here. */
> }
>
> +/*
> + * A helper to mmap the pages allocated via dma_alloc_coherent()
> + */
> +static inline int dma_mmap_coherent(struct device *dev,
> + struct vm_area_struct *vma,
> + void *cpu_addr, dma_addr_t handle,
> + size_t size)
> +{
> + struct page *pg;
> +#ifdef CONFIG_NOT_COHERENT_CACHE
> + /* I'm too lazy and can't stop using bus_to_virt() here... */
> + cpu_addr = bus_to_virt(handle);
> +#endif
> + pg = virt_to_page(cpu_addr);
> + return remap_pfn_range(vma, vma->vm_start,
> + page_to_pfn(pg) + vma->vm_pgoff,
> + size, vma->vm_page_prot);
> +}
> #endif /* CONFIG_PPC64 */
>
> static inline void dma_sync_single_for_cpu(struct device *dev,
^ permalink raw reply
* Re: [PATCH] powerpc: rework 4xx PTE access and TLB miss
From: Benjamin Herrenschmidt @ 2008-07-09 20:04 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <352560B5-24A4-47B8-8A1F-5900957470FC@kernel.crashing.org>
On Wed, 2008-07-09 at 10:31 -0500, Kumar Gala wrote:
> > v3. Relying on the generic code to fixup _PAGE_ACCESSED doesn't
> > work for exec faults because our cache coherency code in
> > do_page_fault() will never go all the way to the generic code
> > for these. We fix it up by always setting _PAGE_ACCESSED when
> > setting _PAGE_HWEXEC in there.
> > This version of the patch is rebased on top of -next
>
> shouldn't you remove _PAGE_HWWRITE from 40x? (I'm still seeing it
> in
> pgtable-ppc32.h and head_40x.S)
I haven't updated 40x at all yet.
Ben.
^ permalink raw reply
* Please pull 'next' branch of 4xx tree
From: Josh Boyer @ 2008-07-09 18:13 UTC (permalink / raw)
To: benh, paulus; +Cc: linuxppc-dev
Hi Ben and Paul,
Please pull from:
master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git next
to get some more changes for .27. These include the TLB rework patch,
support for the Virtex5 platform, some bootwrapper documentation and
patches, and various other fixes.
josh
Benjamin Herrenschmidt (1):
powerpc: rework 4xx PTE access and TLB miss
Grant Likely (4):
powerpc/bootwrapper: Add documentation of boot wrapper targets
powerpc/bootwrapper: add missing bit of simpleImage target
powerpc/bootwrapper: Allow user to specify additional default targets
powerpc/440: Convert Virtex ML507 device tree to dts-v1
John Linn (5):
powerpc/virtex: add dts file for ML507 reference design
powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440
powerpc/virtex: add Xilinx Virtex 5 ppc440 platform support
powerpc/virtex: add Xilinx 440 cpu to the cputable
powerpc/virtex: add defconfig for virtex 5 platforms
Josh Boyer (2):
Merge branch 'virtex-for-2.6.27' of git://git.secretlab.ca/git/linux-2.6-v
powerpc/44x: Update ppc44x_defconfig
Sean MacLennan (1):
powerpc/44x: Support NAND boot for Rev A Warp boards
Stefan Roese (1):
powerpc: Fix problems with 32bit PPC's running with >= 4GB of RAM
Documentation/powerpc/bootwrapper.txt | 141 ++++
arch/powerpc/Kconfig | 13 +
arch/powerpc/Makefile | 15 +-
arch/powerpc/boot/Makefile | 5 +-
arch/powerpc/boot/dts/virtex440-ml507.dts | 296 ++++++++
arch/powerpc/boot/simpleboot.c | 6 +
arch/powerpc/boot/virtex.c | 100 +++
arch/powerpc/boot/wrapper | 10 +-
arch/powerpc/configs/44x/virtex5_defconfig | 1107 ++++++++++++++++++++++++++++
arch/powerpc/configs/ppc44x_defconfig | 149 +++--
arch/powerpc/kernel/cputable.c | 10 +
arch/powerpc/kernel/head_44x.S | 286 +++-----
arch/powerpc/kernel/head_booke.h | 8 +
arch/powerpc/mm/44x_mmu.c | 29 +-
arch/powerpc/mm/fault.c | 3 +-
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/mm/mem.c | 8 +-
arch/powerpc/mm/mmu_decl.h | 4 +-
arch/powerpc/platforms/44x/Kconfig | 26 +
arch/powerpc/platforms/44x/Makefile | 1 +
arch/powerpc/platforms/44x/virtex.c | 60 ++
arch/powerpc/platforms/44x/warp-nand.c | 9 +-
include/asm-powerpc/pgtable-ppc32.h | 61 ++-
23 files changed, 2086 insertions(+), 265 deletions(-)
^ permalink raw reply
* Re: [PATCH] [V3] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: Dmitry Torokhov @ 2008-07-09 18:13 UTC (permalink / raw)
To: John Linn; +Cc: linuxppc-dev, Sadanand Mutyala, linux-input
In-Reply-To: <20080709161408.55E0F4A006C@mail60-va3.bigfish.com>
On Wed, Jul 9, 2008 at 12:14 PM, John Linn <John.Linn@xilinx.com> wrote:
> These look like good comments from Peter.
>
> Dmitry, how would you like to do this, would you prefer us to do an
> incremental patch from the existing patch (V3)? Or a new V4 for the
> patch?
>
Incremental please. I already committed V3 to the 'next' branch and I
don't want to rebuild it unless the patch is completely broken so
incremental cleanup is the way to go.
Thanks.
--
Dmitry
^ permalink raw reply
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