* [RFC 1/2] powerpc: copy_4K_page tweaked for Cell
From: Mark Nelson @ 2008-08-14 6:18 UTC (permalink / raw)
To: linuxppc-dev, cbe-oss-dev
/*
* Copyright (C) 2008 Mark Nelson, IBM Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <asm/processor.h>
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
.section ".toc","aw"
PPC64_CACHES:
.tc ppc64_caches[TC],ppc64_caches
.section ".text"
_GLOBAL(copy_4K_page)
li r5,4096 /* 4K page size */
ld r10,PPC64_CACHES@toc(r2)
lwz r11,DCACHEL1LOGLINESIZE(r10) /* log2 of cache line size */
lwz r12,DCACHEL1LINESIZE(r10) /* Get cache line size */
li r9,0
srd r8,r5,r11
mtctr r8
setup:
dcbt r9,r4
dcbz r9,r3
add r9,r9,r12
bdnz setup
addi r3,r3,-8
srdi r8,r5,7 /* page is copied in 128 byte strides */
addi r8,r8,-1 /* one stride copied outside loop */
mtctr r8
ld r5,0(r4)
ld r6,8(r4)
ld r7,16(r4)
ldu r8,24(r4)
1: std r5,8(r3)
ld r9,8(r4)
std r6,16(r3)
ld r10,16(r4)
std r7,24(r3)
ld r11,24(r4)
std r8,32(r3)
ld r12,32(r4)
std r9,40(r3)
ld r5,40(r4)
std r10,48(r3)
ld r6,48(r4)
std r11,56(r3)
ld r7,56(r4)
std r12,64(r3)
ld r8,64(r4)
std r5,72(r3)
ld r9,72(r4)
std r6,80(r3)
ld r10,80(r4)
std r7,88(r3)
ld r11,88(r4)
std r8,96(r3)
ld r12,96(r4)
std r9,104(r3)
ld r5,104(r4)
std r10,112(r3)
ld r6,112(r4)
std r11,120(r3)
ld r7,120(r4)
stdu r12,128(r3)
ldu r8,128(r4)
bdnz 1b
std r5,8(r3)
ld r9,8(r4)
std r6,16(r3)
ld r10,16(r4)
std r7,24(r3)
ld r11,24(r4)
std r8,32(r3)
ld r12,32(r4)
std r9,40(r3)
ld r5,40(r4)
std r10,48(r3)
ld r6,48(r4)
std r11,56(r3)
ld r7,56(r4)
std r12,64(r3)
ld r8,64(r4)
std r5,72(r3)
ld r9,72(r4)
std r6,80(r3)
ld r10,80(r4)
std r7,88(r3)
ld r11,88(r4)
std r8,96(r3)
ld r12,96(r4)
std r9,104(r3)
std r10,112(r3)
std r11,120(r3)
std r12,128(r3)
blr
^ permalink raw reply
* [RFC 0/2] powerpc: copy_4K_page tweaked for Cell
From: Mark Nelson @ 2008-08-14 6:17 UTC (permalink / raw)
To: linuxppc-dev, cbe-oss-dev
Hi All,
What follows is an updated version of copy_4K_page that has been tuned
for the Cell processor. With this new routine it was found that the
system time measured when compiling a 2.6.26 pseries_defconfig was
reduced by ~10s:
mainline (2.6.27-rc1-00632-g2e1e921):
real 17m8.727s
user 59m48.693s
sys 3m56.089s
real 17m9.350s
user 59m44.822s
sys 3m56.666s
new routine:
real 17m7.311s
user 59m51.339s
sys 3m47.043s
real 17m7.863s
user 59m49.028s
sys 3m46.608s
This same routine was also found to improve performance on 970 CPUs
too (but by a much smaller amount):
mainline (2.6.27-rc1-00632-g2e1e921):
real 16m8.545s
user 14m38.134s
sys 1m55.156s
real 16m7.089s
user 14m37.974s
sys 1m55.010s
new routine:
real 16m11.641s
user 14m37.251s
sys 1m52.618s
real 16m6.139s
user 14m38.282s
sys 1m53.184s
I also did testing on Power{3..6} and I found that Power3, Power5 and
Power6 did better with this new routine when the dcbt and dcbz
weren't used (in which case they achieved performance comparable to
the existing kernel copy_4K_page routine). Power4 on other hand
performed slightly better with the dcbt and dcbz included (still
comparable to the current kernel copy_4K_page).
So in order to get the best performance across the board I created a
new CPU feature that will govern whether the dcbt and dcbz are used
(and un-creatively named it CPU_FTR_CP_USE_DCBTZ). I added it to the
CPU features of Cell, Power4 and 970.
Unfortunately I don't have access to a PA6T but judging by the
marketing material I could find, it looks like it has a strong enough
hardware prefetcher that it probably wouldn't benefit from the dcbt
and dcbz...
Okay, that's probably enough prattling along - you can all go and look
at the code now.
All comments appreciated
[I decided to post the whole copy routine rather than a diff between
it and the current one because I found the diff quite unreadable. I'll post
a real patchset after I've addressed any comments.]
Many thanks!
^ permalink raw reply
* Re: details, details ...
From: Kevin Diggs @ 2008-08-14 4:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200808132305.45507.arnd@arndb.de>
Arnd Bergmann wrote:
> On Wednesday 13 August 2008, Kevin Diggs wrote:
>
>
>>Arnd Bergmann wrote:
>>
>>>On Wednesday 13 August 2008, Kevin Diggs wrote:
>>>
>>>
>>>>In cpu exit function of a cpufreq driver:
>>>>
>>>> while (test_bit(cf750gxmChangingPllBit, &cf750gxvStateBits))
>>>> msleep(1);
>>>>
>>>>This bit will get cleared by a notifier callback.
>>>>
>>>>In module_exit function of a related module:
>>>>
>>>> while (test_bit(PLL_LOCK_BIT, (unsigned long *)&boot_ratio)) {
>>>> msleep(1);
>>>> }
>>>>
>>>>This bit will get cleared by a timer. It will also fire the notifiers
>>>>needed above.
>>>>
>>>>I don't think these are in interrupt context. The sleeps ok here?
>>>
>>>
>>>Technically ok, but not nice. Besides the coding style issues,
>>>it's still a busy loop that should be replaced by wait_for_completion().
>>>
>>
>>I took a brief look at wait_for_completion(). Looks kinda heavy weight.
>>Just to be clear both of these code fragments are in code shutdown (i.e.
>>exit) paths. Is the use of wait_for_completion() still preferred? I
>>thought a "busy loop" used the delay routines?
>
>
> You should always write code that is easy to understand and tells the
> reader what you mean. If you want to wait for something to complete,
> use wait_for_completion. If you look at what msleep does internally,
> you will find that it isn't simpler than wait_for_completion either.
>
> The loop doing msleep(1) is not as bad as a loop doing delays, but
> it can still cause unnecessary wakeups and on average will sleep
> one milisecond too long. Neither of these is a real problem, but
> if you can do it correctly, just do.
>
Please forgive me. I'm not trying to be argumentative. I'm just trying
to learn. I found a section in the O'Reilly Linux device driver guide on
this completion stuff. If I understand it correctly, I initialize a
completion thing. In the code that starts the task I do a complete(). In
the exit code I'll do a wait_for_completion(). In my usage paradigm I
will VERY rarely ever call wait_for_completion() and have it actually
wait. This still match completion's intended use?
>
>>Can you elaborate on the coding style issues? Variable names? Use of the
>>bit stuff? Those brace thingies?
>
>
> Variables should be lower-case names, constants should be upper-case.
> Both should have names that tell you what they are used for.
> The case in the second code sample is either wrong, or redundant.
> You should leave out curly braces when you only have a single line
> in the basic block. Read Documentation/CodingStyle to learn about
> more things to consider.
>
Can I post the 2 routines for RFC style comments? Or is that to much
trouble?
>
>>>Don't bother. Old gcc variants would put these variables into .data
>>>instead of .bss, but with a new (less than 5 years or so) gcc, both
>>>will result in .bss storage that is initialized to zero at boot time.
>>>
>>
>>??? So ... I can ignore the error? Or I should not be initializing
>>variables to 0 (or NULL)?
>
>
> Either fix checkpatch.pl not to warn about these, or just don't initialize
> the variables. Initializing a variable at declaration time is frowned upon
> by some people, because it is redundant in case of static or global
> variables, and error-prone for automatic variables.
>
When you say initializing is frowned upon, do you mean only when you are
initializing to zero? Is the redundancy (for the case of 0?) a part of
the C spec? Or is it gcc specific? error-prone for automatic variables?
kevin
> Arnd <><
>
>
^ permalink raw reply
* Re: [PATCH] libfdt: Add support for using aliases in fdt_path_offset()
From: David Gibson @ 2008-08-14 4:15 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Jon Loeliger, devicetree-discuss
In-Reply-To: <Pine.LNX.4.64.0808132251340.29599@blarg.am.freescale.net>
On Wed, Aug 13, 2008 at 10:52:26PM -0500, Kumar Gala wrote:
> If the path doesn't start with '/' check to see if it matches some alias
> under "/aliases" and substitute the matching alias value in the path
> and retry the lookup.
Kumar, this is broken. If you match an alias you only follow the path
one level down from there. i.e. you will correctly resolve
'somealias' and 'somealias/foo', but not 'somealias/foo/bar'.
> diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
> index ebd1260..74b8153 100644
> --- a/libfdt/fdt_ro.c
> +++ b/libfdt/fdt_ro.c
> @@ -139,8 +139,29 @@ int fdt_path_offset(const void *fdt, const char *path)
>
> FDT_CHECK_HEADER(fdt);
>
> - if (*path != '/')
> - return -FDT_ERR_BADPATH;
> + /* see if we have an alias */
> + if (*path != '/') {
> + const char *q;
> + int aliasoffset = fdt_path_offset(fdt, "/aliases");
> +
> + if (aliasoffset < 0)
> + return -FDT_ERR_BADPATH;
> +
> + q = strchr(path, '/');
> + if (!q)
> + q = end;
> +
> + p = fdt_getprop_namelen(fdt, aliasoffset, path, q - p, NULL);
> + if (!p)
> + return -FDT_ERR_BADPATH;
> +
> + aliasoffset = fdt_path_offset(fdt, p);
You should set 'offset' here instead of 'aliasoffset'..
> + if (*q == '\0')
> + return aliasoffset;
> +
> + q++;
> + return fdt_subnode_offset(fdt, aliasoffset, q);
> + }
..drop the rest of this if block..
>
> while (*p) {
> const char *q;
..and then the loop that's already here will follow the remaining path
components starting from the node that's the target of the alias.
Plus you need a testcase or three.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* [PATCH] libfdt: Add support for using aliases in fdt_path_offset()
From: Kumar Gala @ 2008-08-14 3:52 UTC (permalink / raw)
To: devicetree-discuss; +Cc: linuxppc-dev, Jon Loeliger, David Gibson
If the path doesn't start with '/' check to see if it matches some alias
under "/aliases" and substitute the matching alias value in the path
and retry the lookup.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
libfdt/fdt_ro.c | 25 +++++++++++++++++++++++--
1 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index ebd1260..74b8153 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -139,8 +139,29 @@ int fdt_path_offset(const void *fdt, const char *path)
FDT_CHECK_HEADER(fdt);
- if (*path != '/')
- return -FDT_ERR_BADPATH;
+ /* see if we have an alias */
+ if (*path != '/') {
+ const char *q;
+ int aliasoffset = fdt_path_offset(fdt, "/aliases");
+
+ if (aliasoffset < 0)
+ return -FDT_ERR_BADPATH;
+
+ q = strchr(path, '/');
+ if (!q)
+ q = end;
+
+ p = fdt_getprop_namelen(fdt, aliasoffset, path, q - p, NULL);
+ if (!p)
+ return -FDT_ERR_BADPATH;
+
+ aliasoffset = fdt_path_offset(fdt, p);
+ if (*q == '\0')
+ return aliasoffset;
+
+ q++;
+ return fdt_subnode_offset(fdt, aliasoffset, q);
+ }
while (*p) {
const char *q;
--
1.5.5.1
^ permalink raw reply related
* Re: How to use ramdisk on the ml300?
From: wangyanlong @ 2008-08-14 3:50 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <931ae8260808132008i1cac2e91kc76c099ecc574cd0@mail.gmail.com>
I use the make zImage.initrd to build my linux and i creat a
ramdisk file ,set the console root=/dev/ram.
next i download the zImage.initrd.elf to the board,and down load
the ramdisk file to the right place , but in the boot message , it
not try to load the ramdisk as rootfiles , it really boring me ,why?
Thanks for your help
--
View this message in context: http://www.nabble.com/How-to-use-ramdisk-on-the-ml300--tp18975066p18975316.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH / RFC] net: fix locking in ibm_newemac
From: Benjamin Herrenschmidt @ 2008-08-14 3:45 UTC (permalink / raw)
To: Sebastian Siewior; +Cc: netdev, linuxppc-dev
In-Reply-To: <20080813182957.GA12612@www.tglx.de>
On Wed, 2008-08-13 at 20:29 +0200, Sebastian Siewior wrote:
> |PPC 4xx OCP EMAC driver, version 3.54
> |MAL v2 /plb/mcmal, 2 TX channels, 2 RX channels
> |RGMII /plb/opb/emac-rgmii@ef600b00 initialized with MDIO support
> |/plb/opb/emac-rgmii@ef600b00: input 0 in RGMII mode
> |BUG: spinlock bad magic on CPU#0, swapper/1
> | lock: cf81632c, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
> |Call Trace:
> |[cf82bc70] [c00071c4] show_stack+0x34/0x194 (unreliable)
> |[cf82bca0] [c0136d5c] spin_bug+0x8c/0xd0
> |[cf82bcc0] [c0136f64] _raw_spin_lock+0x94/0x16c
> |[cf82bcf0] [c023b528] _spin_lock_bh+0x20/0x34
> |[cf82bd10] [c01d04a8] dev_mc_add+0x2c/0x84
> |[cf82bd30] [c0166f80] emac_configure+0x2a8/0x55c
> |[cf82bd60] [c02418bc] emac_probe+0xc24/0x105c
> |[cf82be40] [c01bb504] of_platform_device_probe+0x58/0x80
> |[cf82be60] [c016057c] driver_probe_device+0xb8/0x1ec
> |[cf82be80] [c0160734] __driver_attach+0x84/0x88
> |[cf82bea0] [c015fa4c] bus_for_each_dev+0x5c/0x98
> |[cf82bed0] [c0160384] driver_attach+0x24/0x34
> |[cf82bee0] [c01600b4] bus_add_driver+0x1d8/0x24c
> |[cf82bf00] [c0160944] driver_register+0x5c/0x158
> |[cf82bf20] [c01bb3dc] of_register_driver+0x54/0x70
> |[cf82bf30] [c030ba8c] emac_init+0x1c8/0x208
> |[cf82bf60] [c02f4184] kernel_init+0x84/0x27c
> |[cf82bff0] [c000e594] kernel_thread+0x44/0x60
>
> The fix is to defer phy init until netdevice is registered / initialized.
I think it's better instead to take the dev_mc_add() statement
out of emac_configure().
What about this patch instead, does it fix it for you ?
ibm_newemac: Fix uninitialized spinlock at probe time
We must not call dev_mc_add() from within our HW configure which happens
before we initialize and register the netdev. Do it in open() instead.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Index: linux-work/drivers/net/ibm_newemac/core.c
===================================================================
--- linux-work.orig/drivers/net/ibm_newemac/core.c 2008-08-14 13:36:10.000000000 +1000
+++ linux-work/drivers/net/ibm_newemac/core.c 2008-08-14 13:42:10.000000000 +1000
@@ -663,9 +663,6 @@ static int emac_configure(struct emac_in
if (emac_phy_gpcs(dev->phy.mode))
emac_mii_reset_phy(&dev->phy);
- /* Required for Pause packet support in EMAC */
- dev_mc_add(ndev, default_mcast_addr, sizeof(default_mcast_addr), 1);
-
return 0;
}
@@ -1150,6 +1147,9 @@ static int emac_open(struct net_device *
} else
netif_carrier_on(dev->ndev);
+ /* Required for Pause packet support in EMAC */
+ dev_mc_add(ndev, default_mcast_addr, sizeof(default_mcast_addr), 1);
+
emac_configure(dev);
mal_poll_add(dev->mal, &dev->commac);
mal_enable_tx_channel(dev->mal, dev->mal_tx_chan);
^ permalink raw reply
* Re: How to use ramdisk on the ml300?
From: Philipp Hachtmann @ 2008-08-14 3:34 UTC (permalink / raw)
To: Stu Bershtein; +Cc: yanlong wang, linuxppc-embedded
In-Reply-To: <8BB04FAC749BD24BBA250E9D09F2F18B20CCAF@MAIL-SJC.quantum3d.com>
Hi,
> As I discovered today, it is not necessary to use u-boot on the ml507
> board. I cannot speak with certainty about the ml300. For the ml507
> the ramdisk image gets saved as a separate section in the elf file
> that is downloaded with the zImage. In the ml507 case the image is a
> gzipped ext2 filesystem. Makes a very tidy package I'm sure you will
> agree!
But with U-boot it can be way more comfortable!
Regards,
Ph :)
--
http://www.hachti.de
^ permalink raw reply
* RE: How to use ramdisk on the ml300?
From: Stu Bershtein @ 2008-08-14 3:24 UTC (permalink / raw)
To: yanlong wang, linuxppc-embedded
In-Reply-To: <931ae8260808132008i1cac2e91kc76c099ecc574cd0@mail.gmail.com>
Yanlong,
As I discovered today, it is not necessary to use u-boot on the ml507 =
board. I cannot speak with certainty about the ml300. For the ml507 =
the ramdisk image gets saved as a separate section in the elf file that =
is downloaded with the zImage. In the ml507 case the image is a gzipped =
ext2 filesystem. Makes a very tidy package I'm sure you will agree!=20
Stu
-----Original Message-----
From: linuxppc-embedded-bounces+sbershtein=3Dquantum3d.com@ozlabs.org on =
behalf of yanlong wang
Sent: Wed 8/13/2008 8:08 PM
To: linuxppc-embedded@ozlabs.org
Subject: How to use ramdisk on the ml300?
=20
If i want use ramdisk on the ml300 , i must use u-boot in my =
system ?
many thanks
_______________________________________________
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Re: [PATCH 5121 pci 3/3] powerpc: pci: 5121: Hide pci bridge.
From: Kumar Gala @ 2008-08-14 3:19 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, John Rigby
In-Reply-To: <20080813051657.GF17587@secretlab.ca>
On Aug 13, 2008, at 12:16 AM, Grant Likely wrote:
> On Thu, Aug 07, 2008 at 11:36:27AM -0600, John Rigby wrote:
>> The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER
>> while other freescale host bridges have class set to
>> PCI_CLASS_PROCESSOR_POWERPC.
>>
>> This patch makes fixup_hide_host_resource_fsl match
>> PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC.
>>
>> Signed-off-by: John Rigby <jrigby@freescale.com>
>
> I think this is okay, but it might need to be more conservative. I'm
> not the PCI expert. Kumar, thoughts?
This is fine, since we qualify this with an FSL VendorID.
- k
>> ---
>> arch/powerpc/kernel/pci_32.c | 5 +++--
>> 1 files changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/
>> pci_32.c
>> index 88db4ff..162c3a8 100644
>> --- a/arch/powerpc/kernel/pci_32.c
>> +++ b/arch/powerpc/kernel/pci_32.c
>> @@ -54,11 +54,12 @@ LIST_HEAD(hose_list);
>> static int pci_bus_count;
>>
>> static void
>> -fixup_hide_host_resource_fsl(struct pci_dev* dev)
>> +fixup_hide_host_resource_fsl(struct pci_dev *dev)
>> {
>> int i, class = dev->class >> 8;
>>
>> - if ((class == PCI_CLASS_PROCESSOR_POWERPC) &&
>> + if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
>> + class == PCI_CLASS_BRIDGE_OTHER) &&
>> (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
>> (dev->bus->parent == NULL)) {
>> for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
>> --
>>
>>
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@ozlabs.org
>> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* How to use ramdisk on the ml300?
From: yanlong wang @ 2008-08-14 3:08 UTC (permalink / raw)
To: linuxppc-embedded
If i want use ramdisk on the ml300 , i must use u-boot in my system ?
many thanks
^ permalink raw reply
* Re: [PATCH 2/2] port ndfc driver to of platform
From: Sean MacLennan @ 2008-08-13 21:45 UTC (permalink / raw)
Cc: linuxppc-dev, Arnd Bergmann
In-Reply-To: <20080804132459.3fc12f59@lappy.seanm.ca>
Changes to the warp platform with the ndfc as an of platform device.
The main changes are:
* moving the NAND information to the DTS
* removing warp-nand.c
* moving the NAND fixups to cuboot-warp.c
Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
---
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c
index 2178021..6d20a46 100644
--- a/arch/powerpc/boot/cuboot-warp.c
+++ b/arch/powerpc/boot/cuboot-warp.c
@@ -34,10 +34,30 @@ static void warp_fixup_one_nor(u32 from, u32 to)
v[0] = to;
setprop(devp, "reg", v, sizeof(v));
- printf("NOR 64M fixup %x -> %x\r\n", from, to);
+ printf("NOR 64M fixup %x -> %x\r\n", from, to);
}
}
+static void warp_fixup_one_nand(u32 from, u32 to, u32 size)
+{
+ void *devp;
+ char name[50];
+ u32 v[2];
+
+ sprintf(name, "/plb/opb/ebc/nand_flash@1,d0000000/partition@%x", from);
+
+ devp = finddevice(name);
+ if (!devp)
+ return;
+
+ if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
+ v[0] = to;
+ v[1] = size;
+ setprop(devp, "reg", v, sizeof(v));
+
+ printf("NAND 64M fixup %x -> %x\r\n", from, to);
+ }
+}
static void warp_fixups(void)
{
@@ -46,25 +66,39 @@ static void warp_fixups(void)
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
- /* Fixup for 64M flash on Rev A boards. */
+ /* Fixup flash on Rev A boards. */
if (bd.bi_flashsize == 0x4000000) {
void *devp;
u32 v[3];
+ /* NOR */
devp = finddevice("/plb/opb/ebc/nor_flash@0,0");
- if (!devp)
- return;
-
- /* Fixup the size */
- if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
- v[2] = bd.bi_flashsize;
- setprop(devp, "reg", v, sizeof(v));
+ if (devp) {
+ /* Fixup the size */
+ if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
+ v[2] = bd.bi_flashsize;
+ setprop(devp, "reg", v, sizeof(v));
+ }
+
+ /* Fixup parition offsets */
+ warp_fixup_one_nor(0x300000, 0x3f00000);
+ warp_fixup_one_nor(0x340000, 0x3f40000);
+ warp_fixup_one_nor(0x380000, 0x3f80000);
}
- /* Fixup parition offsets */
- warp_fixup_one_nor(0x300000, 0x3f00000);
- warp_fixup_one_nor(0x340000, 0x3f40000);
- warp_fixup_one_nor(0x380000, 0x3f80000);
+ /* NAND */
+ devp = finddevice("/plb/opb/ebc/nand_flash@1,d0000000");
+ if (devp) {
+ /* Fixup the size */
+ if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
+ v[2] = bd.bi_flashsize;
+ setprop(devp, "reg", v, sizeof(v));
+ }
+
+ /* Fixup parition offsets */
+ warp_fixup_one_nand(0x00200000, 0x0200000, 0x3000000);
+ warp_fixup_one_nand(0x40000000, 0x3200000, 0x0e00000);
+ }
}
}
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts
index f4e4ba6..c058e3c 100644
--- a/arch/powerpc/boot/dts/warp.dts
+++ b/arch/powerpc/boot/dts/warp.dts
@@ -155,6 +155,10 @@
reg = <0x00000000 0x00000000 0x00400000>;
#address-cells = <1>;
#size-cells = <1>;
+ partition@0 {
+ label = "splash";
+ reg = <0x00000000 0x00020000>;
+ };
partition@300000 {
label = "fpga";
reg = <0x0300000 0x00040000>;
@@ -168,6 +172,36 @@
reg = <0x0380000 0x00080000>;
};
};
+
+ nand_flash@1,d0000000 {
+ compatible = "amcc,ndfc";
+ reg = <0x00000001 0xd0000000 0x00002000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ccr = <0x00001000>;
+ bank_settings = <0x80002222>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x00000000 0x00200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x00200000 0x03E00000>;
+ };
+ partition@40000000 {
+ label = "persistent";
+ reg = <0x04000000 0x04000000>;
+ };
+ partition@80000000 {
+ label = "persistent1";
+ reg = <0x08000000 0x04000000>;
+ };
+ partition@C0000000 {
+ label = "persistent2";
+ reg = <0x0C000000 0x04000000>;
+ };
+ };
};
UART0: serial@ef600300 {
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 8d0b1a1..53fc7ec 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -8,6 +8,5 @@ obj-$(CONFIG_SEQUOIA) += sequoia.o
obj-$(CONFIG_KATMAI) += katmai.o
obj-$(CONFIG_RAINIER) += rainier.o
obj-$(CONFIG_WARP) += warp.o
-obj-$(CONFIG_WARP) += warp-nand.o
obj-$(CONFIG_CANYONLANDS) += canyonlands.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
deleted file mode 100644
index 89ecd76..0000000
--- a/arch/powerpc/platforms/44x/warp-nand.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * PIKA Warp(tm) NAND flash specific routines
- *
- * Copyright (c) 2008 PIKA Technologies
- * Sean MacLennan <smaclennan@pikatech.com>
- */
-
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/ndfc.h>
-#include <linux/of.h>
-#include <asm/machdep.h>
-
-
-#ifdef CONFIG_MTD_NAND_NDFC
-
-#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
-
-#define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL
-#define WARP_NAND_FLASH_REG_SIZE 0x2000
-
-static struct resource warp_ndfc = {
- .start = WARP_NAND_FLASH_REG_ADDR,
- .end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE - 1,
- .flags = IORESOURCE_MEM,
-};
-
-static struct mtd_partition nand_parts[] = {
- {
- .name = "kernel",
- .offset = 0,
- .size = 0x0200000
- },
- {
- .name = "root",
- .offset = 0x0200000,
- .size = 0x3E00000
- },
- {
- .name = "persistent",
- .offset = 0x4000000,
- .size = 0x4000000
- },
- {
- .name = "persistent1",
- .offset = 0x8000000,
- .size = 0x4000000
- },
- {
- .name = "persistent2",
- .offset = 0xC000000,
- .size = 0x4000000
- }
-};
-
-struct ndfc_controller_settings warp_ndfc_settings = {
- .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
- .ndfc_erpn = 0,
-};
-
-static struct ndfc_chip_settings warp_chip0_settings = {
- .bank_settings = 0x80002222,
-};
-
-struct platform_nand_ctrl warp_nand_ctrl = {
- .priv = &warp_ndfc_settings,
-};
-
-static struct platform_device warp_ndfc_device = {
- .name = "ndfc-nand",
- .id = 0,
- .dev = {
- .platform_data = &warp_nand_ctrl,
- },
- .num_resources = 1,
- .resource = &warp_ndfc,
-};
-
-/* Do NOT set the ecclayout: let it default so it is correct for both
- * 64M and 256M flash chips.
- */
-static struct platform_nand_chip warp_nand_chip0 = {
- .nr_chips = 1,
- .chip_offset = CS_NAND_0,
- .nr_partitions = ARRAY_SIZE(nand_parts),
- .partitions = nand_parts,
- .chip_delay = 20,
- .priv = &warp_chip0_settings,
-};
-
-static struct platform_device warp_nand_device = {
- .name = "ndfc-chip",
- .id = 0,
- .num_resources = 0,
- .dev = {
- .platform_data = &warp_nand_chip0,
- .parent = &warp_ndfc_device.dev,
- }
-};
-
-static int warp_setup_nand_flash(void)
-{
- struct device_node *np;
-
- /* Try to detect a rev A based on NOR size. */
- np = of_find_compatible_node(NULL, NULL, "cfi-flash");
- if (np) {
- struct property *pp;
-
- pp = of_find_property(np, "reg", NULL);
- if (pp && (pp->length == 12)) {
- u32 *v = pp->value;
- if (v[2] == 0x4000000) {
- /* Rev A = 64M NAND */
- warp_nand_chip0.nr_partitions = 3;
-
- nand_parts[1].size = 0x3000000;
- nand_parts[2].offset = 0x3200000;
- nand_parts[2].size = 0x0e00000;
- }
- }
- of_node_put(np);
- }
-
- platform_device_register(&warp_ndfc_device);
- platform_device_register(&warp_nand_device);
-
- return 0;
-}
-machine_device_initcall(warp, warp_setup_nand_flash);
-
-#endif
^ permalink raw reply related
* Re: [PATCH 1/2] port ndfc driver to of platform
From: Sean MacLennan @ 2008-08-13 21:36 UTC (permalink / raw)
To: linuxppc-dev, dwmw2; +Cc: Arnd Bergmann
In-Reply-To: <20080804132459.3fc12f59@lappy.seanm.ca>
Port of the ndfc driver to an of platform driver.
Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
---
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index efb1ab6..55aec25 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -5,9 +5,13 @@
* Platform independend driver for NDFC (NanD Flash Controller)
* integrated into EP440 cores
*
+ * Ported to an OF platform driver by Sean MacLennan
+ *
* Author: Thomas Gleixner
*
* Copyright 2006 IBM
+ * Copyright 2008 PIKA Technologies
+ * Sean MacLennan <smaclennan@pikatech.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -23,38 +27,30 @@
#include <linux/mtd/mtd.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
-#include <linux/platform_device.h>
-
+#include <linux/of_platform.h>
#include <asm/io.h>
-struct ndfc_nand_mtd {
- struct mtd_info mtd;
- struct nand_chip chip;
- struct platform_nand_chip *pl_chip;
-};
-
-static struct ndfc_nand_mtd ndfc_mtd[NDFC_MAX_BANKS];
-struct ndfc_controller {
- void __iomem *ndfcbase;
- struct nand_hw_control ndfc_control;
- atomic_t childs_active;
+struct ndfc_ctrl {
+ struct device *dev;
+ void __iomem *ndfcbase;
+ struct mtd_info mtd;
+ struct nand_chip chip;
+ int chip_select;
+ struct nand_hw_control ndfc_control;
};
-static struct ndfc_controller ndfc_ctrl;
+static struct ndfc_ctrl ndfc_ctrl;
static void ndfc_select_chip(struct mtd_info *mtd, int chip)
{
uint32_t ccr;
- struct ndfc_controller *ndfc = &ndfc_ctrl;
- struct nand_chip *nandchip = mtd->priv;
- struct ndfc_nand_mtd *nandmtd = nandchip->priv;
- struct platform_nand_chip *pchip = nandmtd->pl_chip;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
ccr = __raw_readl(ndfc->ndfcbase + NDFC_CCR);
if (chip >= 0) {
ccr &= ~NDFC_CCR_BS_MASK;
- ccr |= NDFC_CCR_BS(chip + pchip->chip_offset);
+ ccr |= NDFC_CCR_BS(chip + ndfc->chip_select);
} else
ccr |= NDFC_CCR_RESET_CE;
__raw_writel(ccr, ndfc->ndfcbase + NDFC_CCR);
@@ -62,7 +58,7 @@ static void ndfc_select_chip(struct mtd_info *mtd, int chip)
static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
if (cmd == NAND_CMD_NONE)
return;
@@ -75,7 +71,7 @@ static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
static int ndfc_ready(struct mtd_info *mtd)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
return __raw_readl(ndfc->ndfcbase + NDFC_STAT) & NDFC_STAT_IS_READY;
}
@@ -83,7 +79,7 @@ static int ndfc_ready(struct mtd_info *mtd)
static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode)
{
uint32_t ccr;
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
ccr = __raw_readl(ndfc->ndfcbase + NDFC_CCR);
ccr |= NDFC_CCR_RESET_ECC;
@@ -94,7 +90,7 @@ static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode)
static int ndfc_calculate_ecc(struct mtd_info *mtd,
const u_char *dat, u_char *ecc_code)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
uint32_t ecc;
uint8_t *p = (uint8_t *)&ecc;
@@ -117,7 +113,7 @@ static int ndfc_calculate_ecc(struct mtd_info *mtd,
*/
static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
uint32_t *p = (uint32_t *) buf;
for(;len > 0; len -= 4)
@@ -126,7 +122,7 @@ static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
uint32_t *p = (uint32_t *) buf;
for(;len > 0; len -= 4)
@@ -135,7 +131,7 @@ static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
uint32_t *p = (uint32_t *) buf;
for(;len > 0; len -= 4)
@@ -147,10 +143,18 @@ static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
/*
* Initialize chip structure
*/
-static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
+static int ndfc_chip_init(struct ndfc_ctrl *ndfc, struct device_node *node)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
- struct nand_chip *chip = &mtd->chip;
+#ifdef CONFIG_MTD_PARTITIONS
+#ifdef CONFIG_MTD_CMDLINE_PARTS
+ static const char *part_types[] = { "cmdlinepart", NULL };
+#else
+ static const char *part_types[] = { NULL };
+#endif
+ struct mtd_partition *parts;
+#endif
+ struct nand_chip *chip = &ndfc->chip;
+ int ret;
chip->IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA;
chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA;
@@ -158,8 +162,6 @@ static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
chip->dev_ready = ndfc_ready;
chip->select_chip = ndfc_select_chip;
chip->chip_delay = 50;
- chip->priv = mtd;
- chip->options = mtd->pl_chip->options;
chip->controller = &ndfc->ndfc_control;
chip->read_buf = ndfc_read_buf;
chip->write_buf = ndfc_write_buf;
@@ -170,153 +172,125 @@ static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
chip->ecc.mode = NAND_ECC_HW;
chip->ecc.size = 256;
chip->ecc.bytes = 3;
- chip->ecclayout = chip->ecc.layout = mtd->pl_chip->ecclayout;
- mtd->mtd.priv = chip;
- mtd->mtd.owner = THIS_MODULE;
-}
-static int ndfc_chip_probe(struct platform_device *pdev)
-{
- struct platform_nand_chip *nc = pdev->dev.platform_data;
- struct ndfc_chip_settings *settings = nc->priv;
- struct ndfc_controller *ndfc = &ndfc_ctrl;
- struct ndfc_nand_mtd *nandmtd;
-
- if (nc->chip_offset >= NDFC_MAX_BANKS || nc->nr_chips > NDFC_MAX_BANKS)
- return -EINVAL;
-
- /* Set the bank settings */
- __raw_writel(settings->bank_settings,
- ndfc->ndfcbase + NDFC_BCFG0 + (nc->chip_offset << 2));
+ ndfc->mtd.priv = chip;
+ ndfc->mtd.owner = THIS_MODULE;
- nandmtd = &ndfc_mtd[pdev->id];
- if (nandmtd->pl_chip)
- return -EBUSY;
-
- nandmtd->pl_chip = nc;
- ndfc_chip_init(nandmtd);
+ ret = nand_scan(&ndfc->mtd, 1);
+ if (ret)
+ return ret;
- /* Scan for chips */
- if (nand_scan(&nandmtd->mtd, nc->nr_chips)) {
- nandmtd->pl_chip = NULL;
- return -ENODEV;
- }
+ ndfc->mtd.name = ndfc->dev->bus_id;
#ifdef CONFIG_MTD_PARTITIONS
- printk("Number of partitions %d\n", nc->nr_partitions);
- if (nc->nr_partitions) {
- /* Add the full device, so complete dumps can be made */
- add_mtd_device(&nandmtd->mtd);
- add_mtd_partitions(&nandmtd->mtd, nc->partitions,
- nc->nr_partitions);
+ ret = parse_mtd_partitions(&ndfc->mtd, part_types, &parts, 0);
+ if (ret < 0)
+ return ret;
- } else
-#else
- add_mtd_device(&nandmtd->mtd);
+#ifdef CONFIG_MTD_OF_PARTS
+ if (ret == 0) {
+ ret = of_mtd_parse_partitions(ndfc->dev, &ndfc->mtd,
+ node, &parts);
+ if (ret < 0)
+ return ret;
+ }
#endif
- atomic_inc(&ndfc->childs_active);
- return 0;
+ if (ret > 0)
+ return add_mtd_partitions(&ndfc->mtd, parts, ret);
+#endif
+ return add_mtd_device(&ndfc->mtd);
}
-static int ndfc_chip_remove(struct platform_device *pdev)
+static int __devinit ndfc_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
{
- return 0;
-}
+ struct ndfc_ctrl *ndfc = &ndfc_ctrl;
+ const u32 *reg;
+ u32 ccr, bank_settings;
+ int err, len;
-static int ndfc_nand_probe(struct platform_device *pdev)
-{
- struct platform_nand_ctrl *nc = pdev->dev.platform_data;
- struct ndfc_controller_settings *settings = nc->priv;
- struct resource *res = pdev->resource;
- struct ndfc_controller *ndfc = &ndfc_ctrl;
- unsigned long long phys = settings->ndfc_erpn | res->start;
+ spin_lock_init(&ndfc->ndfc_control.lock);
+ init_waitqueue_head(&ndfc->ndfc_control.wq);
+ ndfc->dev = &ofdev->dev;
+ dev_set_drvdata(&ofdev->dev, ndfc);
+
+ /* Read the reg property to get the chip select */
+ reg = of_get_property(ofdev->node, "reg", &len);
+ if (reg == NULL || len != 12) {
+ dev_err(&ofdev->dev, "unable read reg property (%d)\n", len);
+ return -ENOENT;
+ }
+ ndfc->chip_select = *reg;
- ndfc->ndfcbase = ioremap((phys_addr_t)phys, res->end - res->start + 1);
+ ndfc->ndfcbase = ioremap(reg[1], reg[2]);
if (!ndfc->ndfcbase) {
- printk(KERN_ERR "NDFC: ioremap failed\n");
+ dev_err(&ofdev->dev, "failed to get memory\n");
return -EIO;
}
- __raw_writel(settings->ccr_settings, ndfc->ndfcbase + NDFC_CCR);
+ ccr = NDFC_CCR_BS(ndfc->chip_select);
- spin_lock_init(&ndfc->ndfc_control.lock);
- init_waitqueue_head(&ndfc->ndfc_control.wq);
+ /* It is ok if ccr does not exist - just default to 0 */
+ reg = of_get_property(ofdev->node, "ccr", NULL);
+ if (reg)
+ ccr |= *reg;
- platform_set_drvdata(pdev, ndfc);
+ __raw_writel(ccr, ndfc->ndfcbase + NDFC_CCR);
- printk("NDFC NAND Driver initialized. Chip-Rev: 0x%08x\n",
- __raw_readl(ndfc->ndfcbase + NDFC_REVID));
+ /* Set the bank settings */
+ reg = of_get_property(ofdev->node, "bank_settings", NULL);
+ bank_settings = reg ? *reg : 0x80002222;
+
+ __raw_writel(bank_settings,
+ ndfc->ndfcbase + NDFC_BCFG0 + (ndfc->chip_select << 2));
+
+ err = ndfc_chip_init(ndfc, ofdev->node);
+ if (err)
+ goto error_cleanup;
return 0;
+
+error_cleanup:
+ iounmap(ndfc->ndfcbase);
+ return err;
}
-static int ndfc_nand_remove(struct platform_device *pdev)
+static int __devexit ndfc_remove(struct of_device *ofdev)
{
- struct ndfc_controller *ndfc = platform_get_drvdata(pdev);
+ struct ndfc_ctrl *ndfc = dev_get_drvdata(&ofdev->dev);
- if (atomic_read(&ndfc->childs_active))
- return -EBUSY;
+ nand_release(&ndfc->mtd);
- if (ndfc) {
- platform_set_drvdata(pdev, NULL);
- iounmap(ndfc_ctrl.ndfcbase);
- ndfc_ctrl.ndfcbase = NULL;
- }
return 0;
}
-/* driver device registration */
-
-static struct platform_driver ndfc_chip_driver = {
- .probe = ndfc_chip_probe,
- .remove = ndfc_chip_remove,
- .driver = {
- .name = "ndfc-chip",
- .owner = THIS_MODULE,
- },
+static const struct of_device_id ndfc_match[] = {
+ { .compatible = "amcc,ndfc", },
+ {}
};
-static struct platform_driver ndfc_nand_driver = {
- .probe = ndfc_nand_probe,
- .remove = ndfc_nand_remove,
- .driver = {
- .name = "ndfc-nand",
- .owner = THIS_MODULE,
+static struct of_platform_driver ndfc_driver = {
+ .driver = {
+ .name = "ndfc",
},
+ .match_table = ndfc_match,
+ .probe = ndfc_probe,
+ .remove = __devexit_p(ndfc_remove),
};
static int __init ndfc_nand_init(void)
{
- int ret;
-
- spin_lock_init(&ndfc_ctrl.ndfc_control.lock);
- init_waitqueue_head(&ndfc_ctrl.ndfc_control.wq);
-
- ret = platform_driver_register(&ndfc_nand_driver);
- if (ret)
- return ret;
-
- ret = platform_driver_register(&ndfc_chip_driver);
- if (ret) {
- platform_driver_unregister(&ndfc_nand_driver);
- return ret;
- }
-
- return 0;
+ return of_register_platform_driver(&ndfc_driver);
}
+module_init(ndfc_nand_init);
static void __exit ndfc_nand_exit(void)
{
- platform_driver_unregister(&ndfc_chip_driver);
- platform_driver_unregister(&ndfc_nand_driver);
+ of_unregister_platform_driver(&ndfc_driver);
}
-
-module_init(ndfc_nand_init);
module_exit(ndfc_nand_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
-MODULE_DESCRIPTION("Platform driver for NDFC");
-MODULE_ALIAS("platform:ndfc-chip");
-MODULE_ALIAS("platform:ndfc-nand");
+MODULE_DESCRIPTION("OF Platform driver for NDFC");
^ permalink raw reply related
* Re: [PATCH] pata_of_platform: fix no irq handling
From: Steven A. Falco @ 2008-08-13 21:25 UTC (permalink / raw)
To: avorontsov
Cc: Sparks, Sam, linuxppc-dev, linux-ide, Stefan Roese, Jeff Garzik
In-Reply-To: <20080812143110.GA23961@oksana.dev.rtsoft.ru>
[-- Attachment #1: Type: text/plain, Size: 1989 bytes --]
Anton Vorontsov wrote:
> On Tue, Aug 12, 2008 at 06:18:42PM +0400, Sergei Shtylyov wrote:
>
>> Anton Vorontsov wrote:
>>
>>
>>>>>> 1. IDE status read does not work. (But am I understand correctly
>>>>>> that IDE works well if IRQ is unspecified? Then this is hardly
>>>>>> an issue.)
>>>>>> 2. IDE interrupt comes when it should not. I'd recommend to use
>>>>>> oscilloscope to find out what is happening there, that is, if
>>>>>> the drive actually deasserts its irq line after status read.
>>>>>> If so, than this could be a PIC problem.
>>>>>>
>>>>>> What is the platform on which you're observing the issue, btw?
>>>>>>
>>>>> Another possibility is that you got the wrong interrupt number
>>>>> in the device-tree...
>>>>>
>>>>> Ben.
>>>>>
>>>> The platform is the AMCC Sequoia board. We've built a little adapter to
>>>> connect a compact flash card to the processor bus. I believe the
>>>> interrupt selection in the device tree is correct, and I've checked over
>>>> the u-boot settings for the IRQ line (active high, level sensitive).
>>>>
>>> IDE IRQs are active-low.
>>>
>> Only on the PCI and only in the native mode. Natively, the IDE INTRQ
>> signal is active-high, rising edge triggering, as on ISA. You seem to
>> have an invertor somewhere, if it's not a PCI chip...
>>
>
> Ugh. Right you are, as always. I've just looked into mpc8349emitx
> schematics, there is indeed an inverter on the irq line.
>
> CF in True IDE mode is active-high, sorry.
>
Ok, just to close this issue, my CF device is now working perfectly.
Two problems, both my fault. 1) I thought the alternate registers used
the same reg-shift and offset, so the alt_command and alt_status were at
the wrong address, and 2) I was missing a pull-down on the IRQ line -
the sequoia eval board has it in the schematic, but it is marked "not
populated".
Thanks to all for your comments and help,
Steve
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^ permalink raw reply
* Some memory (DDR2 ECC Dual Rank) just doesn't work! Can anyone point me to how to debug this hang?
From: Vince Asbridge @ 2008-08-13 21:21 UTC (permalink / raw)
To: 'linuxppc-embedded'
[-- Attachment #1: Type: text/plain, Size: 1404 bytes --]
All,
We have an 8548 design, which implements a DDR2 on a SODIMM
We have an issue with dual rank memory (specific part number Viking
VR5DR287218EBSS1), which is a 1G ECC Registered SODIMM part, with two ranks.
Our platform wires CS0 and CS1 to the SODIMM slot.
At uBoot, all is well. Memory is discovered as ECC 533, 1G DDR2 64Bit 4
beat bursts, and mtest can read and write all 1G of the SODIMM.
Here's where things get bad.
If I boot linux (2.6.11 or 2.6.23 kernel), after the kernel image
decompresses, the machine simply HANGS.
The IP address of the board is currently set to 192.168.200.90
The MAC address is 00:11:0d:1d:a2:23
If they don't match your network environment, please change them in U-Boot
and kernel manually.
Hit any key to stop autoboot: 0
## Booting image at fc580000 ...
Image Name: Linux-2.6.11
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1706305 Bytes = 1.6 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image . (HANG)
Other DDR2s (identical except for vendor and # of ranks), work perfectly!
Anyone got a clue what I could look at to try to figure this out?
We've tried enable / disable ECC at uboot
We've tried enable / disable Interleaving at uboot
uboot always works (and can read/write entire DDR), Linux always hangs on
boot!
Please help,
Vince
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^ permalink raw reply
* Is petting of watchdog supported in MPC827x?
From: NM @ 2008-08-13 20:54 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 519 bytes --]
Hi,
Is there any framework in place to support petting of a watchdog (in our case external) on MPC8271 powerpc platform?
Having searched around in the tree, I only see support for MPC8313 soc, but not for 8271.
Any pointers would be appreciated in order to avoid duplication of effort.
thanks
__________________________________________________________________
Instant Messaging, free SMS, sharing photos and more... Try the new Yahoo! Canada Messenger at http://ca.beta.messenger.yahoo.com/
[-- Attachment #2: Type: text/html, Size: 1336 bytes --]
^ permalink raw reply
* [PATCH 0/2] Add virtual resolution and panning for Freescale DIU
From: York Sun @ 2008-08-13 20:55 UTC (permalink / raw)
To: akpm; +Cc: linuxppc-dev, linux-fbdev-devel, linux-kernel
This patch set adds virtual resolutoin suppport for Freescale DIU driver.
Applications such as fbset can set visible resolution and virtual resoltuion.
X window can use the virtual resolution if xorg.conf has the following option.
option virtual <vxres> <vyres>
The second patch fixes a bug of AOI position.
Regards,
York
^ permalink raw reply
* [PATCH 2/2] Bug fix. Add sanity check for AOI position
From: York Sun @ 2008-08-13 20:55 UTC (permalink / raw)
To: akpm; +Cc: linuxppc-dev, linux-fbdev-devel, linux-kernel, York Sun
In-Reply-To: <12186609063047-git-send-email-yorksun@freescale.com>
AOI position cannot be negative.
Signed-off-by: York Sun <yorksun@freescale.com>
---
drivers/video/fsl-diu-fb.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index d67e79b..8898d2a 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -479,6 +479,10 @@ static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
+ if (mfbi->x_aoi_d < 0)
+ mfbi->x_aoi_d = 0;
+ if (mfbi->y_aoi_d < 0)
+ mfbi->y_aoi_d = 0;
switch (index) {
case 0:
if (mfbi->x_aoi_d != 0)
--
1.5.2.2
^ permalink raw reply related
* [PATCH 1/2] Added virtual resolution and panning support.
From: York Sun @ 2008-08-13 20:55 UTC (permalink / raw)
To: akpm; +Cc: linuxppc-dev, linux-fbdev-devel, linux-kernel, York Sun
In-Reply-To: <12186609042933-git-send-email-yorksun@freescale.com>
Application can now have the virtual resoltuion and use FBIOPAN_DISPLAY ioctl to pan.
Signed-off-by: York Sun <yorksun@freescale.com>
---
drivers/video/fsl-diu-fb.c | 28 +++++++++++++++++++++++-----
1 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 9cd36c2..d67e79b 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -778,6 +778,22 @@ static void unmap_video_memory(struct fb_info *info)
}
/*
+ * Using the fb_var_screeninfo in fb_info we set the aoi of this
+ * particular framebuffer. It is a light version of fsl_diu_set_par.
+ */
+static int fsl_diu_set_aoi(struct fb_info *info)
+{
+ struct fb_var_screeninfo *var = &info->var;
+ struct mfb_info *mfbi = info->par;
+ struct diu_ad *ad = mfbi->ad;
+
+ /* AOI should not be greater than display size */
+ ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
+ ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
+ return 0;
+}
+
+/*
* Using the fb_var_screeninfo in fb_info we set the resolution of this
* particular framebuffer. This function alters the fb_fix_screeninfo stored
* in fb_info. It does not alter var in fb_info since we are using that
@@ -817,11 +833,11 @@ static int fsl_diu_set_par(struct fb_info *info)
diu_ops.get_pixel_format(var->bits_per_pixel,
machine_data->monitor_port);
ad->addr = cpu_to_le32(info->fix.smem_start);
- ad->src_size_g_alpha = cpu_to_le32((var->yres << 12) |
- var->xres) | mfbi->g_alpha;
- /* fix me. AOI should not be greater than display size */
+ ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
+ var->xres_virtual) | mfbi->g_alpha;
+ /* AOI should not be greater than display size */
ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
- ad->offset_xyi = 0;
+ ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
/* Disable chroma keying function */
@@ -921,6 +937,8 @@ static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
else
info->var.vmode &= ~FB_VMODE_YWRAP;
+ fsl_diu_set_aoi(info);
+
return 0;
}
@@ -989,7 +1007,7 @@ static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
pr_debug("set AOI display offset of index %d to (%d,%d)\n",
mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
fsl_diu_check_var(&info->var, info);
- fsl_diu_set_par(info);
+ fsl_diu_set_aoi(info);
break;
case MFB_GET_AOID:
aoi_d.x_aoi_d = mfbi->x_aoi_d;
--
1.5.2.2
^ permalink raw reply related
* Re: Strange Badness with RT Spin Lock
From: Darcy Watkins @ 2008-08-13 19:55 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1218225371.3465.51.camel@localhost>
I have an update...
First please disregard the follow-up email I sent mentioning memory
barriers. That blew up shortly after I sent out the email.
The problem appears to be resolved when I declare the spinlock variable
using the __cacheline_aligned attribute (that is without the _in_smp
suffix).
Does anyone know of an explanation as to why a spinlock may need to be
cacheline aligned in a uniprocessor system?
Regards,
Darcy
On Fri, 2008-08-08 at 12:56 -0700, Darcy Watkins wrote:
> Hello,
>
> I have a very unusual bug I have been trying to get to the bottom of.
>
> First the background...
>
> AMCC PPC405EP on embedded network device (simpler than a Taihu)
> Kernel 2.6.25.8-rt7 with incremental patches up to 2.6.25.13
> mPCI slot with a WiMax radio card
>
> This is an RT-Preemption kernel.
>
> In my system, in a real time radio (WiMax) driver, I have code that
> makes use of a spinlock to control access to a tree structure...
>
> spinlock_t tree_lock;
>
--
Regards,
Darcy
--------------
Darcy L. Watkins - Senior Software Developer
Tranzeo Wireless Technologies, Inc.
19273 Fraser Way, Pitt Meadows, BC, Canada V3Y 2V4
T:604-460-6002 ext:410
http://www.tranzeo.com
^ permalink raw reply
* [PATCH / RFC] net: fix locking in ibm_newemac
From: Sebastian Siewior @ 2008-08-13 18:29 UTC (permalink / raw)
To: netdev, linuxppc-dev
|PPC 4xx OCP EMAC driver, version 3.54
|MAL v2 /plb/mcmal, 2 TX channels, 2 RX channels
|RGMII /plb/opb/emac-rgmii@ef600b00 initialized with MDIO support
|/plb/opb/emac-rgmii@ef600b00: input 0 in RGMII mode
|BUG: spinlock bad magic on CPU#0, swapper/1
| lock: cf81632c, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
|Call Trace:
|[cf82bc70] [c00071c4] show_stack+0x34/0x194 (unreliable)
|[cf82bca0] [c0136d5c] spin_bug+0x8c/0xd0
|[cf82bcc0] [c0136f64] _raw_spin_lock+0x94/0x16c
|[cf82bcf0] [c023b528] _spin_lock_bh+0x20/0x34
|[cf82bd10] [c01d04a8] dev_mc_add+0x2c/0x84
|[cf82bd30] [c0166f80] emac_configure+0x2a8/0x55c
|[cf82bd60] [c02418bc] emac_probe+0xc24/0x105c
|[cf82be40] [c01bb504] of_platform_device_probe+0x58/0x80
|[cf82be60] [c016057c] driver_probe_device+0xb8/0x1ec
|[cf82be80] [c0160734] __driver_attach+0x84/0x88
|[cf82bea0] [c015fa4c] bus_for_each_dev+0x5c/0x98
|[cf82bed0] [c0160384] driver_attach+0x24/0x34
|[cf82bee0] [c01600b4] bus_add_driver+0x1d8/0x24c
|[cf82bf00] [c0160944] driver_register+0x5c/0x158
|[cf82bf20] [c01bb3dc] of_register_driver+0x54/0x70
|[cf82bf30] [c030ba8c] emac_init+0x1c8/0x208
|[cf82bf60] [c02f4184] kernel_init+0x84/0x27c
|[cf82bff0] [c000e594] kernel_thread+0x44/0x60
The fix is to defer phy init until netdevice is registered / initialized.
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
---
Noticed with spinlock debug enabled & 40x/kilauea_defconfig on a kilaue
board. With this patch, the board boots via NFS root, no problems were
noticed so far
drivers/net/ibm_newemac/core.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index babc79a..c4130e1 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -2751,11 +2751,6 @@ static int __devinit emac_probe(struct of_device *ofdev,
dev->stop_timeout = STOP_TIMEOUT_100;
INIT_DELAYED_WORK(&dev->link_work, emac_link_timer);
- /* Find PHY if any */
- err = emac_init_phy(dev);
- if (err != 0)
- goto err_detach_tah;
-
/* Fill in the driver function table */
ndev->open = &emac_open;
if (dev->tah_dev)
@@ -2785,6 +2780,11 @@ static int __devinit emac_probe(struct of_device *ofdev,
goto err_detach_tah;
}
+ /* Find PHY if any */
+ err = emac_init_phy(dev);
+ if (err != 0)
+ goto err_detach_tah;
+
/* Set our drvdata last as we don't want them visible until we are
* fully initialized
*/
--
1.5.5.2
^ permalink raw reply related
* [PATCH 5121 pci rev2 2/3] powerpc: 5121: Add PCI support.
From: John Rigby @ 2008-08-13 19:05 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
In-Reply-To: <1218654360-7806-1-git-send-email-jrigby@freescale.com>
Uses mpc83xx_add_bridge in fsl_pci.c
Adds second register tuple to pci node register property
as done for 83xx device trees in a previous patch.
Signed-off-by: John Rigby <jrigby@freescale.com>
---
arch/powerpc/boot/dts/mpc5121ads.dts | 3 ++-
arch/powerpc/platforms/512x/Kconfig | 2 ++
arch/powerpc/platforms/512x/mpc5121_ads.c | 10 ++++++++++
arch/powerpc/sysdev/fsl_pci.c | 4 ++--
4 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 1f9036c..c2b8dbf 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -403,7 +403,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0x80008500 0x100>;
+ reg = <0x80008500 0x100 /* internal registers */
+ 0x80008300 0x8>; /* config space access registers */
compatible = "fsl,mpc5121-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index c62f893..326852c 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -3,6 +3,8 @@ config PPC_MPC512x
select FSL_SOC
select IPIC
select PPC_CLOCK
+ select PPC_PCI_CHOICE
+ select FSL_PCI if PCI
config PPC_MPC5121
bool
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 5ebf693..441abc4 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -22,16 +22,26 @@
#include <asm/prom.h>
#include <asm/time.h>
+#include <sysdev/fsl_pci.h>
+
#include "mpc512x.h"
#include "mpc5121_ads.h"
static void __init mpc5121_ads_setup_arch(void)
{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n");
/*
* cpld regs are needed early
*/
mpc5121_ads_cpld_map();
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc5121-pci")
+ mpc83xx_add_bridge(np);
+#endif
}
static void __init mpc5121_ads_init_IRQ(void)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index a3f4aba..5b264eb 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -251,7 +251,7 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
-#if defined(CONFIG_PPC_83xx)
+#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
int __init mpc83xx_add_bridge(struct device_node *dev)
{
int len;
@@ -310,7 +310,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0);
- printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
+ printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
"Firmware bus number: %d->%d\n",
(unsigned long long)rsrc_reg.start, hose->first_busno,
hose->last_busno);
--
1.5.6.2.255.gbed62
^ permalink raw reply related
* [PATCH 5121 pci rev2 3/3] powerpc: pci: 5121: Hide pci bridge.
From: John Rigby @ 2008-08-13 19:06 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
In-Reply-To: <1218654360-7806-2-git-send-email-jrigby@freescale.com>
The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER
while other freescale host bridges have class set to
PCI_CLASS_PROCESSOR_POWERPC.
This patch makes fixup_hide_host_resource_fsl match
PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC.
Signed-off-by: John Rigby <jrigby@freescale.com>
---
arch/powerpc/kernel/pci_32.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 88db4ff..162c3a8 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -54,11 +54,12 @@ LIST_HEAD(hose_list);
static int pci_bus_count;
static void
-fixup_hide_host_resource_fsl(struct pci_dev* dev)
+fixup_hide_host_resource_fsl(struct pci_dev *dev)
{
int i, class = dev->class >> 8;
- if ((class == PCI_CLASS_PROCESSOR_POWERPC) &&
+ if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
+ class == PCI_CLASS_BRIDGE_OTHER) &&
(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
(dev->bus->parent == NULL)) {
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
--
1.5.6.2.255.gbed62
^ permalink raw reply related
* [PATCH 5121 pci rev2 1/3] powerpc: 83xx: pci: Remove need for get_immrbase from mpc83xx_add_bridge.
From: John Rigby @ 2008-08-13 19:05 UTC (permalink / raw)
To: linuxppc-dev; +Cc: John Rigby
Modify mpc83xx_add_bridge to get config space register base address from the device
tree instead of immr + hardcoded offset.
83xx pci nodes have this change:
register properties now contain two address length tuples:
First is the pci bridge register base, this has always been there.
Second is the config base, this is new.
This is documented in Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
The changes accomplish these things:
mpc83xx_add_bridge no longer needs to call get_immrbase
it uses hard coded addresses if the second register value is missing
Signed-off-by: John Rigby <jrigby@freescale.com>
---
.../powerpc/dts-bindings/fsl/83xx-512x-pci.txt | 40 ++++++++++++++
arch/powerpc/boot/dts/mpc8313erdb.dts | 3 +-
arch/powerpc/boot/dts/mpc8315erdb.dts | 3 +-
arch/powerpc/boot/dts/mpc832x_mds.dts | 3 +-
arch/powerpc/boot/dts/mpc832x_rdb.dts | 3 +-
arch/powerpc/boot/dts/mpc8349emitx.dts | 6 ++-
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 3 +-
arch/powerpc/boot/dts/mpc834x_mds.dts | 6 ++-
arch/powerpc/boot/dts/mpc836x_mds.dts | 3 +-
arch/powerpc/boot/dts/mpc836x_rdk.dts | 3 +-
arch/powerpc/boot/dts/mpc8377_mds.dts | 3 +-
arch/powerpc/boot/dts/mpc8377_rdb.dts | 3 +-
arch/powerpc/boot/dts/mpc8378_mds.dts | 3 +-
arch/powerpc/boot/dts/mpc8378_rdb.dts | 3 +-
arch/powerpc/boot/dts/mpc8379_mds.dts | 3 +-
arch/powerpc/boot/dts/mpc8379_rdb.dts | 3 +-
arch/powerpc/boot/dts/sbc8349.dts | 3 +-
arch/powerpc/sysdev/fsl_pci.c | 54 +++++++++++++-------
18 files changed, 111 insertions(+), 37 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
new file mode 100644
index 0000000..35a4653
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
@@ -0,0 +1,40 @@
+* Freescale 83xx and 512x PCI bridges
+
+Freescale 83xx and 512x SOCs include the same pci bridge core.
+
+83xx/512x specific notes:
+- reg: should contain two address length tuples
+ The first is for the internal pci bridge registers
+ The second is for the pci config space access registers
+
+Example (MPC8313ERDB)
+ pci0: pci@e0008500 {
+ cell-index = <1>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x0E -mini PCI */
+ 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x4 &ipic 18 0x8
+
+ /* IDSEL 0x0F - PCI slot */
+ 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
+ compatible = "fsl,mpc8349-pci";
+ device_type = "pci";
+ };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 2a94ae0..f6a93d7 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -359,7 +359,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index f704513..baafa53 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -314,7 +314,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index fbc9304..75f6a93 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -419,7 +419,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index b157d18..25d0e04 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -327,7 +327,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 700e076..64b18ca 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -250,7 +250,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -276,7 +277,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008600 0x100>;
+ reg = <0xe0008600 0x100 /* internal registers */
+ 0xe0008380 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index cdd3063..94f2df9 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -224,7 +224,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008600 0x100>;
+ reg = <0xe0008600 0x100 /* internal registers */
+ 0xe0008380 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 783241c..715ef11 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -311,7 +311,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -372,7 +373,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008600 0x100>;
+ reg = <0xe0008600 0x100 /* internal registers */
+ 0xe0008380 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index a3b76a7..4924a67 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -405,7 +405,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index 89c9202..80730b0 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -405,7 +405,8 @@
#interrupt-cells = <1>;
device_type = "pci";
compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
0x42000000 0 0x80000000 0x80000000 0 0x10000000
0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 432782b..9a60e3e 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -374,7 +374,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index ed137aa..fa71bbd 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -315,7 +315,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index ed32c8d..049368e 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -360,7 +360,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 34a7f2f..f3f00dc 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -301,7 +301,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index f4db9ed..1036699 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -388,7 +388,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e4d7030..d478d11 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -329,7 +329,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 45f789b..eeb7c95 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -268,7 +268,8 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <0xe0008500 0x100>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 61e6d77..a3f4aba 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
/*
- * MPC85xx/86xx PCI/PCIE support routing.
+ * MPC83xx/85xx/86xx PCI/PCIE support routing.
*
- * Copyright 2007 Freescale Semiconductor, Inc
+ * Copyright 2007,2008 Freescale Semiconductor, Inc
*
* Initial author: Xianghua Xiao <x.xiao@freescale.com>
* Recode: ZHANG WEI <wei.zhang@freescale.com>
@@ -256,15 +256,42 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
{
int len;
struct pci_controller *hose;
- struct resource rsrc;
+ struct resource rsrc_reg;
+ struct resource rsrc_cfg;
const int *bus_range;
- int primary = 1, has_address = 0;
- phys_addr_t immr = get_immrbase();
+ int primary;
pr_debug("Adding PCI host bridge %s\n", dev->full_name);
/* Fetch host bridge registers address */
- has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
+ if (of_address_to_resource(dev, 0, &rsrc_reg)) {
+ printk(KERN_WARNING "Can't get pci register base!\n");
+ return -ENOMEM;
+ }
+
+ memset(&rsrc_cfg, 0, sizeof(rsrc_cfg));
+
+ if (of_address_to_resource(dev, 1, &rsrc_cfg)) {
+ printk(KERN_WARNING
+ "No pci config register base in dev tree, "
+ "using default\n");
+ /*
+ * MPC83xx supports up to two host controllers
+ * one at 0x8500 has config space registers at 0x8300
+ * one at 0x8600 has config space registers at 0x8380
+ */
+ if ((rsrc_reg.start & 0xfffff) == 0x8500)
+ rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8300;
+ else if ((rsrc_reg.start & 0xfffff) == 0x8600)
+ rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8380;
+ }
+ /*
+ * Controller at offset 0x8500 is primary
+ */
+ if ((rsrc_reg.start & 0xfffff) == 0x8500)
+ primary = 1;
+ else
+ primary = 0;
/* Get bus range if any */
bus_range = of_get_property(dev, "bus-range", &len);
@@ -281,22 +308,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
- /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
- * the other at 0x8600, we consider the 0x8500 the primary controller
- */
- /* PCI 1 */
- if ((rsrc.start & 0xfffff) == 0x8500) {
- setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
- }
- /* PCI 2 */
- if ((rsrc.start & 0xfffff) == 0x8600) {
- setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
- primary = 0;
- }
+ setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0);
printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
"Firmware bus number: %d->%d\n",
- (unsigned long long)rsrc.start, hose->first_busno,
+ (unsigned long long)rsrc_reg.start, hose->first_busno,
hose->last_busno);
pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
--
1.5.6.2.255.gbed62
^ permalink raw reply related
* Re: [PATCH 4/5] Relocation support
From: Mohan Kumar M @ 2008-08-13 18:22 UTC (permalink / raw)
To: Paul Mackerras; +Cc: ppcdev, miltonm
In-Reply-To: <18594.28433.827798.249177@cargo.ozlabs.ibm.com>
Paul Mackerras wrote:
> Mohan Kumar M writes:
>
Hi Paul,
Thanks for your comments.
I will update the patches as per your comment and will give a detailed
description for each patch.
Regards,
Mohan.
>
>> static inline int in_kernel_text(unsigned long addr)
>> {
>> - if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end)
>> + if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end
>> + + kernel_base)
>
> Your patch adds kernel_base to some addresses but not to all of them,
> so your patch description should have told us why you added it in the
> those places and not others. If you tell us the general principle
> you're following (even if it seems obvious to you) it will be useful
> to people chasing bugs or adding new code later on, or even just
> trying to understand what the code does.
>
>> - RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000);
>> +#ifndef CONFIG_RELOCATABLE_PPC64
>> + RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000);
>> +#else
>> + RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000 +
>> + RELOC(reloc_delta));
>> +#endif
>
> Ifdefs in code inside a function are frowned upon in the Linux
> kernel. Try to find an alternative way to do this, such as ensuring
> that reloc_delta is 0 when CONFIG_RELOCATABLE_PPC64 is not set.
> Also it's not clear (to me at least) why you need to add reloc_data in
> the relocatable case.
>
>> +#ifndef CONFIG_RELOCATABLE_PPC64
>> unsigned long *spinloop
>> = (void *) LOW_ADDR(__secondary_hold_spinloop);
>> unsigned long *acknowledge
>> = (void *) LOW_ADDR(__secondary_hold_acknowledge);
>> +#else
>> + unsigned long *spinloop
>> + = (void *) &__secondary_hold_spinloop;
>> + unsigned long *acknowledge
>> + = (void *) &__secondary_hold_acknowledge;
>> +#endif
>
> This also needs some explanation. (Put it in the patch description or
> in a comment in the code, not in a reply to this mail. :)
>
>> +#ifndef CONFIG_RELOCATABLE_PPC64
>> ld r4,htab_hash_mask@got(2)
>> +#else
>> + LOAD_REG_IMMEDIATE(r4,htab_hash_mask)
>> +#endif
>> ld r27,0(r4) /* htab_hash_mask -> r27 */
>
> Here and in the other similar places, I would prefer you just changed
> it to LOAD_REG_ADDR and not have any ifdef.
>
> Paul.
^ permalink raw reply
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