* [patch 2/2] FEC_MPC52XX_PHY: Refactor read/write routines
From: Wolfram Sang @ 2008-08-16 2:32 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: Wolfram Sang
In-Reply-To: <20080816023159.126377505@pengutronix.de>
Read & write functions now call a generic transfer function, so identical
code in both routines could be eliminated. The result is easier to maintain
and smaller in source and binary code. Also, fix some checkpatch warnings.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
---
drivers/net/fec_mpc52xx_phy.c | 55 ++++++++++++++++--------------------------
1 file changed, 22 insertions(+), 33 deletions(-)
Index: .kernel/drivers/net/fec_mpc52xx_phy.c
===================================================================
--- .kernel.orig/drivers/net/fec_mpc52xx_phy.c
+++ .kernel/drivers/net/fec_mpc52xx_phy.c
@@ -2,6 +2,7 @@
* Driver for the MPC5200 Fast Ethernet Controller - MDIO bus driver
*
* Copyright (C) 2007 Domen Puncer, Telargo, Inc.
+ * Copyright (C) 2008 Wolfram Sang, Pengutronix
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -21,58 +22,45 @@
struct mpc52xx_fec __iomem *regs;
};
-static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id,
+ int reg, u32 value)
{
struct mpc52xx_fec_mdio_priv *priv = bus->priv;
struct mpc52xx_fec __iomem *fec;
int tries = 100;
- u32 request = FEC_MII_READ_FRAME;
+
+ value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
+ value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
fec = priv->regs;
out_be32(&fec->ievent, FEC_IEVENT_MII);
-
- request |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
- request |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
-
- out_be32(&priv->regs->mii_data, request);
+ out_be32(&priv->regs->mii_data, value);
/* wait for it to finish, this takes about 23 us on lite5200b */
while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries)
udelay(5);
- if (tries == 0)
+ if (!tries)
return -ETIMEDOUT;
- return in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK;
+ return value & FEC_MII_DATA_OP_RD ?
+ in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK : 0;
}
-static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data)
+static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg)
{
- struct mpc52xx_fec_mdio_priv *priv = bus->priv;
- struct mpc52xx_fec __iomem *fec;
- u32 value = data;
- int tries = 100;
-
- fec = priv->regs;
- out_be32(&fec->ievent, FEC_IEVENT_MII);
-
- value |= FEC_MII_WRITE_FRAME;
- value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
- value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
-
- out_be32(&priv->regs->mii_data, value);
-
- /* wait for request to finish */
- while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries)
- udelay(5);
-
- if (tries == 0)
- return -ETIMEDOUT;
+ return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, FEC_MII_READ_FRAME);
+}
- return 0;
+static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg,
+ u16 data)
+{
+ return mpc52xx_fec_mdio_transfer(bus, phy_id, reg,
+ data | FEC_MII_WRITE_FRAME);
}
-static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_id *match)
+static int mpc52xx_fec_mdio_probe(struct of_device *of,
+ const struct of_device_id *match)
{
struct device *dev = &of->dev;
struct device_node *np = of->node;
@@ -121,7 +109,8 @@
dev_set_drvdata(dev, bus);
/* set MII speed */
- out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1);
+ out_be32(&priv->regs->mii_speed,
+ ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1);
err = mdiobus_register(bus);
if (err)
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
^ permalink raw reply
* [patch 0/2] FEC_MPC52XX_PHY: Updates
From: Wolfram Sang @ 2008-08-16 2:31 UTC (permalink / raw)
To: linuxppc-embedded
Hello,
While debugging FEC-problems, I encountered some issues in the FEC_PHY
driver.
- Patch 1 removes some obsolete code remaining from a (according to old
mails) broken attempt to handle irqs.
- Patch 2 refactors read/write routines to use common code, so updates
regarding bus transfers just have to be made once.
Tested on a Phytec phyCORE-MPC5200B-IO board.
All the best,
Wolfram
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
^ permalink raw reply
* [patch 1/2] FEC_MPC52XX_PHY: Remove obsolete code
From: Wolfram Sang @ 2008-08-16 2:32 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: Wolfram Sang
In-Reply-To: <20080816023159.126377505@pengutronix.de>
Remove last remains of the former (and broken) irq support code. The
driver is polling only.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
---
drivers/net/fec_mpc52xx_phy.c | 20 --------------------
1 file changed, 20 deletions(-)
Index: .kernel/drivers/net/fec_mpc52xx_phy.c
===================================================================
--- .kernel.orig/drivers/net/fec_mpc52xx_phy.c
+++ .kernel/drivers/net/fec_mpc52xx_phy.c
@@ -76,7 +76,6 @@
{
struct device *dev = &of->dev;
struct device_node *np = of->node;
- struct device_node *child = NULL;
struct mii_bus *bus;
struct mpc52xx_fec_mdio_priv *priv;
struct resource res = {};
@@ -105,15 +104,6 @@
for (i=0; i<PHY_MAX_ADDR; i++)
bus->irq[i] = PHY_POLL;
- while ((child = of_get_next_child(np, child)) != NULL) {
- int irq = irq_of_parse_and_map(child, 0);
- if (irq != NO_IRQ) {
- const u32 *id = of_get_property(child, "reg", NULL);
- if (id)
- bus->irq[*id] = irq;
- }
- }
-
/* setup registers */
err = of_address_to_resource(np, 0, &res);
if (err)
@@ -133,9 +123,6 @@
/* set MII speed */
out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1);
- /* enable MII interrupt */
- out_be32(&priv->regs->imask, in_be32(&priv->regs->imask) | FEC_IMASK_MII);
-
err = mdiobus_register(bus);
if (err)
goto out_unmap;
@@ -145,9 +132,6 @@
out_unmap:
iounmap(priv->regs);
out_free:
- for (i=0; i<PHY_MAX_ADDR; i++)
- if (bus->irq[i] != PHY_POLL)
- irq_dispose_mapping(bus->irq[i]);
kfree(bus->irq);
kfree(priv);
kfree(bus);
@@ -160,15 +144,11 @@
struct device *dev = &of->dev;
struct mii_bus *bus = dev_get_drvdata(dev);
struct mpc52xx_fec_mdio_priv *priv = bus->priv;
- int i;
mdiobus_unregister(bus);
dev_set_drvdata(dev, NULL);
iounmap(priv->regs);
- for (i=0; i<PHY_MAX_ADDR; i++)
- if (bus->irq[i])
- irq_dispose_mapping(bus->irq[i]);
kfree(priv);
kfree(bus->irq);
kfree(bus);
--
Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
^ permalink raw reply
* Re: bug in lmb_enforce_memory_limit()
From: Michael Ellerman @ 2008-08-16 0:46 UTC (permalink / raw)
To: David Miller; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20080815.152501.193746275.davem@davemloft.net>
[-- Attachment #1: Type: text/plain, Size: 1522 bytes --]
On Fri, 2008-08-15 at 15:25 -0700, David Miller wrote:
> From: Michael Ellerman <michael@ellerman.id.au>
> Date: Thu, 14 Aug 2008 21:26:53 +1000
>
> > Perhaps after the first loop we should set memory_limit to equal
> > lmb_end_of_DRAM(), then the second loop should work as it is.
>
> Sounds great. Mind if I push the following to Linus?
Looks good to me.
I'll test it on Monday. I don't know if I have a system with memory
holes to test on, but I take it you do?
I notice some of our 32-bit code is using lmb_enforce_memory_limit() to
enforce an address limit, which is technically broken, but is probably
fine because it doesn't need to worry about holes.
> lmb: Fix reserved region handling in lmb_enforce_memory_limit().
>
> The idea of the implementation of this fix is from Michael Ellerman.
>
> This function has two loops, but they each interpret the memory_limit
> value differently. The first loop interprets it as a "size limit"
> whereas the second loop interprets it as an "address limit".
>
> Before the second loop runs, reset memory_limit to lmb_end_of_DRAM()
> so that it all works out.
>
> Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Michael Ellerman <michael@ellerman.id.au>
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: bug in lmb_enforce_memory_limit()
From: David Miller @ 2008-08-15 22:25 UTC (permalink / raw)
To: michael; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1218713213.10673.17.camel@localhost>
From: Michael Ellerman <michael@ellerman.id.au>
Date: Thu, 14 Aug 2008 21:26:53 +1000
> Perhaps after the first loop we should set memory_limit to equal
> lmb_end_of_DRAM(), then the second loop should work as it is.
Sounds great. Mind if I push the following to Linus?
lmb: Fix reserved region handling in lmb_enforce_memory_limit().
The idea of the implementation of this fix is from Michael Ellerman.
This function has two loops, but they each interpret the memory_limit
value differently. The first loop interprets it as a "size limit"
whereas the second loop interprets it as an "address limit".
Before the second loop runs, reset memory_limit to lmb_end_of_DRAM()
so that it all works out.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/lib/lmb.c b/lib/lmb.c
index 5d7b928..97e5470 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -462,6 +462,8 @@ void __init lmb_enforce_memory_limit(u64 memory_limit)
if (lmb.memory.region[0].size < lmb.rmo_size)
lmb.rmo_size = lmb.memory.region[0].size;
+ memory_limit = lmb_end_of_DRAM();
+
/* And truncate any reserves above the limit also. */
for (i = 0; i < lmb.reserved.cnt; i++) {
p = &lmb.reserved.region[i];
^ permalink raw reply related
* Re: [PATCH] [82xx] powerpc: Add support for mpc8247 based board MGCOGE from keymile.
From: Kumar Gala @ 2008-08-15 21:59 UTC (permalink / raw)
To: hs; +Cc: linuxppc-dev
In-Reply-To: <4858C988.1000405@denx.de>
On Jun 18, 2008, at 3:38 AM, Heiko Schocher wrote:
> Hello,
>
> changes since the last patch:
>
> update the Portpin initialization.
>
> [powerpc] Added support for the MPC8247 based board MGCOGE
> from Keymile.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
> arch/powerpc/boot/dts/mgcoge.dts | 174 +++++++
> arch/powerpc/configs/mgcoge_defconfig | 900 ++++++++++++++++++++++++
> +++++++++
> arch/powerpc/platforms/82xx/Kconfig | 8 +
> arch/powerpc/platforms/82xx/Makefile | 1 +
> arch/powerpc/platforms/82xx/mgcoge.c | 129 +++++
> 5 files changed, 1212 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/mgcoge.dts
> create mode 100644 arch/powerpc/configs/mgcoge_defconfig
> create mode 100644 arch/powerpc/platforms/82xx/mgcoge.c
This fails to compile for with 2.6.27-rc3:
drivers/net/fs_enet/mac-scc.c: In function 'restart':
drivers/net/fs_enet/mac-scc.c:256: error: implicit declaration of
function '__fs_out8'
drivers/net/fs_enet/mac-scc.c:265: error: 'SCC_EB' undeclared (first
use in this function)
drivers/net/fs_enet/mac-scc.c:265: error: (Each undeclared identifier
is reported only once
drivers/net/fs_enet/mac-scc.c:265: error: for each function it appears
in.)
make[3]: *** [drivers/net/fs_enet/mac-scc.o] Error 1
make[2]: *** [drivers/net/fs_enet] Error 2
make[1]: *** [drivers/net] Error 2
make: *** [drivers] Error 2
make: *** Waiting for unfinished jobs....
- k
^ permalink raw reply
* 12.5 MHz woo hoo!
From: Kevin Diggs @ 2008-08-15 21:36 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1206 bytes --]
[root@PowerMac8600B root]# cat /proc/cpuinfo
processor : 0
cpu : 750GX
temperature : 1-76 C (uncalibrated)
clock : 200.000000MHz
revision : 2.3 (pvr 0008 0203)
bogomips : 24.96
timebase : 12500000 <-- 12.5 MHz exactly!!!
platform : PowerMac
model : Power Macintosh
machine : Power Macintosh
motherboard : AAPL,8500 MacRISC
detected as : 16 (PowerMac 8500/8600)
pmac flags : 00000000
pmac-generation : OldWorld
Hey, anybody know if that temperature, thermal thingy works well enough
to bother fooling with the code to produce a more valid value?
also:
[root@PowerMac8600B root]# alias tis
alias tis='cat /sys/devices/system/cpu/cpu0/cpufreq/stats/time_in_state'
[root@PowerMac8600B root]# tis
250000 178419
300000 0
350000 0
400000 0
450000 0
500000 0
550000 0
600000 0
650000 0
700000 0
750000 0
800000 0
850000 0
900000 0
950000 0
1000000 0
[root@PowerMac8600B root]# uname -vr
2.6.26-pll #4 Thu Aug 14 04:02:58 PDT 2008
Finally, can someone tell me if the attached file shows up ok if it were
a patch I wanted to submit? I can't seem to figure out how to 'import
inline' using this ancient mailer.
kevin
[-- Attachment #2: pll_if.c --]
[-- Type: text/plain, Size: 20033 bytes --]
/*
* cf750gx.c - cpufreq driver for the dual PLLs in the 750gx
* ($Revision: 1.0 $)
*
* Copyright (C) 2008 kevin Diggs
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*/
#define DEBUG
#include "linux/init.h"
#include "linux/module.h"
#include <linux/autoconf.h>
#include "linux/kernel.h"
#include <linux/errno.h>
#include <linux/cpu.h>
#include "linux/of.h"
#include "linux/notifier.h"
#include "linux/delay.h"
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_SYSFS
#include "linux/sysdev.h"
#endif
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_HRTIMER
#include "linux/hrtimer.h"
#endif
#include <asm/uaccess.h>
#include <asm/bitops.h>
#include "asm/time.h"
#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/cputable.h>
#include <asm/system.h>
#include <asm/pll_if.h>
#include <asm/pll.h>
#include <asm/smp.h>
MODULE_LICENSE("GPL");
static unsigned int boot_ratio;
static unsigned int pllifvBusClock;
static unsigned int override_bus_clock = 0;
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_HRTIMER
static enum hrtimer_restart pllTimerF(struct hrtimer *hrt);
static struct hrtimer pll_timer;
static unsigned long hrtimers_got_no_freakin_callback_data;
#ifdef DEBUG
cycles_t pll_time_stamp;
#endif
#else
static void pllTimerF(unsigned long newPLL);
static struct timer_list pll_timer;
cycles_t pll_time_stamp;
#endif
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_SYSFS
extern unsigned long loops_per_jiffy;
unsigned long boot_loops;
static struct sys_device *sysdev_cpu;
static ssize_t show_ppc750gxpll(struct sys_device *dev, char *buf)
{
return sprintf(buf, "%x\n", get_PLL());
}
int modifyPLL(unsigned int pll, int scaleLPJ);
//static ssize_t __attribute_used__ store_ppc750gxpll(struct sys_device *dev,
// const char *buf, size_t count)
static ssize_t __used store_ppc750gxpll(struct sys_device *dev,
const char *buf, size_t count)
{
unsigned int pll;
char *ptr;
pr_debug(__FILE__">%s()-%d: buf=%s\n", __func__, __LINE__, buf);
pll = simple_strtoul(buf, &ptr, 16);
pr_debug(__FILE__">%s()-%d: %x (%d)\n", __func__, __LINE__, pll, pll);
/* modifyPLL(pll,!0); */
modifyPLL(pll, 0);
return ptr-buf;
}
static SYSDEV_ATTR(ppc750gxpll, 0600, show_ppc750gxpll, store_ppc750gxpll);
#endif
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_CPU_FREQ
struct plliftCallData {
void *data;
int scalar;
};
static struct plliftCallData pllifvSwitchCallData;
static struct plliftCallData pllifvLockCallData;
static RAW_NOTIFIER_HEAD(pllifvPllSwitchChain);
static RAW_NOTIFIER_HEAD(pllifvPllLockChain);
#endif
/*
* This initializes the code for the PLL control:
* boot_ratio is used to scale the loops_per_jiffy value from its boot value
* boot_loops is the boot value of loops_per_jiffy and is used to compute new
* values
*/
static int __init init_PLL(void)
{
unsigned int temp;
#ifdef CONFIG_PPC_OF
const u32 *clk;
struct device_node *tree_root;
#endif
if (!cpu_has_feature(CPU_FTR_DUAL_PLL_750FX))
return -ENODEV;
boot_ratio = 0;
/*
* See if bus clock override was specified
*/
if (override_bus_clock)
pllifvBusClock = override_bus_clock*1000;
#ifdef CONFIG_PPC_OF
/*
* If bus clock is not specified, try to get it via OF
*/
if (!pllifvBusClock) {
/*
* Get root node (aka MacRISC bus)
*/
tree_root = of_find_node_by_name(NULL, "");
if (tree_root) {
clk = of_get_property(tree_root, "clock-frequency",
NULL);
if (clk && *clk)
pllifvBusClock = (unsigned int) *clk;
of_node_put(tree_root);
pr_debug(__FILE__">%s()-%d: Bus clock from OF is %u\n",
__func__, __LINE__, pllifvBusClock);
}
}
#endif /* CONFIG_PPC_OF */
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_SYSFS
temp = get_PLL();
temp = get_PLL_ratio(get_active_PLL(temp), temp);
/*
* Units for boot ratio is halves, i.e. 20 is a ratio of 10.
* From 21 on the returned value needs to be converted to halves.
*/
if (temp > 20)
temp = (temp-10)<<1;
boot_ratio = temp;
boot_loops = loops_per_jiffy;
/*
* Try to get the cpu sysdev
*/
sysdev_cpu = get_cpu_sysdev(boot_cpuid);
if (sysdev_cpu != NULL)
sysdev_create_file(sysdev_cpu, &attr_ppc750gxpll);
#endif
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_HRTIMER
hrtimer_init(&pll_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
#else
init_timer(&pll_timer);
#endif
pll_timer.function = pllTimerF;
return 0;
}
/*__initcall(init_PLL); */
static void exit_PLL(void)
{
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_SYSFS
if (sysdev_cpu != NULL)
sysdev_remove_file(sysdev_cpu, &attr_ppc750gxpll);
#endif
/*
* Make sure there are no timers pending by making sure we are not
* doing anything
*/
while (test_bit(PLL_LOCK_BIT, (unsigned long *)&boot_ratio))
msleep(1);
}
module_init(init_PLL);
module_exit(exit_PLL);
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_SYSFS
static unsigned long pllNewLPJ(unsigned int oldRatio, unsigned int newRatio,
unsigned long LPJ)
{
if (LPJ > 200000000)
return LPJ/oldRatio*newRatio;
else
return LPJ*newRatio/oldRatio;
}
static inline void pllUpdateLPJ(unsigned int oldRatio, unsigned int newRatio,
unsigned long LPJ)
{
loops_per_jiffy = pllNewLPJ(oldRatio, newRatio, LPJ);
}
#else
#define pllUpdateLPJ(a, b, c)
#endif
static void pllifiSwitchPLLs(unsigned int newPLL)
{
#if 0
unsigned long flags;
#endif
unsigned int new_ratio, new_ratio_cp, old_ratio, current_pll, masked_boot_ratio;
pr_debug(__FILE__">%s()-%d: newPLL=0x%08x\n", __func__, __LINE__, newPLL);
/*
* Compute new loops_per_jiffy
*/
current_pll = get_PLL();
new_ratio = get_PLL_ratio(get_next_PLL(newPLL), current_pll);
old_ratio = get_PLL_ratio(get_active_PLL(current_pll), current_pll);
masked_boot_ratio = boot_ratio&0xff;
new_ratio_cp = new_ratio;
pr_debug(__FILE__">%s()-%d: current_pll=0x%08x, new=%d, old=%d\n",
__func__, __LINE__, current_pll, new_ratio, old_ratio);
current_pll = (current_pll&~PLL_SEL_MASK)|(newPLL&PLL_SEL_MASK);
pr_debug(__FILE__">%s()-%d: current_pll=0x%08x, new=%d, old=%d\n",
__func__, __LINE__, current_pll, new_ratio, old_ratio);
/*
* Convert to halves
*/
if (new_ratio > 20)
new_ratio = (new_ratio-10)<<1;
if (old_ratio > 20)
old_ratio = (old_ratio-10)<<1;
/*
* Make sure that we never shorten the sleep values
*/
if (new_ratio > old_ratio) {
if (newPLL&PLL_DO_LPJ)
pllUpdateLPJ(masked_boot_ratio, new_ratio, boot_loops);
pr_debug(__FILE__">%s()-%d: masked_boot_ratio=%d, new_ratio="
"%d, boot_loops=%ld, loops_per_jiffy=%ld\n", __func__, __LINE__,
masked_boot_ratio, new_ratio, boot_loops, loops_per_jiffy);
set_PLL(current_pll);
} else {
pr_debug(__FILE__">%s()-%d: masked_boot_ratio=%d, new_"
"ratio=%d, boot_loops=%ld, loops_per_jiffy=%ld\n",
__func__, __LINE__, masked_boot_ratio, new_ratio,
boot_loops, loops_per_jiffy);
set_PLL(current_pll);
if (newPLL&PLL_DO_LPJ)
pllUpdateLPJ(masked_boot_ratio, new_ratio, boot_loops);
pr_debug(__FILE__">%s()-%d: masked_boot_ratio=%d, new_"
"ratio=%d, boot_loops=%ld, loops_per_jiffy=%ld\n",
__func__, __LINE__, masked_boot_ratio, new_ratio,
boot_loops, loops_per_jiffy);
}
raw_notifier_call_chain(&pllifvPllSwitchChain, pllifmPllSwitch,
pllifvSwitchCallData.data);
/*
* This is used to print the clock frequency in /proc/cpuinfo
*/
ppc_proc_freq = pllifCfgToFreq(new_ratio_cp);
pr_debug(__FILE__">%s()-%d: pllifCfgToFreq(%u)=%lu\n", __func__,
__LINE__, new_ratio_cp, ppc_proc_freq);
#if 0
save_flags(flags);
cli();
loops_per_jiffy = pllNewLPJ(masked_boot_ratio, new_ratio, boot_loops);
set_PLL(current_pll);
restore_flags(flags);
#endif
}
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_HRTIMER
static enum hrtimer_restart pllTimerF(struct hrtimer *hrt)
{
#ifdef DEBUG
cycles_t now;
cycles_t usec, tmp, cntlz, cnttz;
now = get_cycles();
now = now-pll_time_stamp;
/*
* Aw cmon, I'm just havin' a little fun with PPC assembly.
* Just wish I could find a way to use an rlwinm ...
*/
cnttz = tb_ticks_per_sec; /* needed to get the assembly to ...
* look right ... ??? */
tmp = now*15625;
__asm__ __volatile__ (
"addi %0,%3,-1\n"
"andc %1,%3,%0\n"
"cntlzw %1,%1\n"
"subfic %1,%1,31\n"
"cntlzw %0,%2\n":
"=r"(cntlz), "=r"(cnttz):
"r"(tmp), "b"(cnttz)
);
/*
* 1,000,000 usec per sec and 1,000,000 is 15625<<6
*/
usec = ((tmp<<cntlz)/(tb_ticks_per_sec>>cnttz))<<6;
usec = (usec+(1UL<<(cntlz+cnttz-1)))>>(cntlz+cnttz);
pr_debug(__FILE__">%s()-%d: Time delta is %lu cycles, "
"%lu uS (cntlz=%lu, cnttz=%lu)\n", __func__, __LINE__, now,
usec, cntlz, cnttz);
#endif
raw_notifier_call_chain(&pllifvPllLockChain, pllifmPllLock,
pllifvLockCallData.data);
/*
* Clear all lock bits
*/
boot_ratio &= ~(PLL_TIMER|PLL0_LOCK|PLL1_LOCK);
if ((unsigned int) hrtimers_got_no_freakin_callback_data)
pllifiSwitchPLLs((unsigned int)
hrtimers_got_no_freakin_callback_data);
return HRTIMER_NORESTART;
}
#else
static void pllTimerF(unsigned long newPLL)
{
cycles_t now;
now = get_cycles();
now = now-pll_time_stamp;
#ifdef DEBUG
{
cycles_t usec, tmp, cntlz, cnttz;
/*
* Aw cmon, I'm just havin' a little fun with PPC assembly.
* Just wish I could find a way to use an rlwinm ...
*/
cnttz = tb_ticks_per_sec; /* needed to get the assembly to ...
* look right ... ??? */
#define MULFIRST
#ifdef MULFIRST
tmp = now*15625;
#else
tmp = now;
#endif
__asm__ __volatile__ (
"addi %0,%3,-1\n"
"andc %1,%3,%0\n"
"cntlzw %1,%1\n"
"subfic %1,%1,31\n"
"cntlzw %0,%2\n":
"=r"(cntlz), "=r"(cnttz):
"r"(tmp), "b"(cnttz)
);
/*
* 1,000,000 usec per sec and 1,000,000 is 15625<<6
*/
// usec = (((now<<cntlz)/(tb_ticks_per_sec>>cnttz)*15625)+(1UL<<
// (cntlz+cnttz-1-6)))>>(cntlz+cnttz-6);
#ifdef MULFIRST
usec = ((tmp<<cntlz)/(tb_ticks_per_sec>>cnttz))<<6;
usec = (usec+(1UL<<(cntlz+cnttz-1)))>>(cntlz+cnttz);
#else
usec = ((tmp<<cntlz)/(tb_ticks_per_sec>>cnttz)*15625)<<6;
usec = (usec+(1UL<<(cntlz+cnttz-1)))>>(cntlz+cnttz);
#endif
pr_debug(__FILE__">%s()-%d: Time delta is %lu cycles, "
"%lu uS (cntlz=%lu, cnttz=%lu)\n", __func__, __LINE__,
now, usec, cntlz, cnttz);
}
#endif
/*
* Make sure it has been at least 100 usec. 100 usec is 100 *
* tb_ticks_per_sec / 1,000,000 cycles, so:
* if(now<100*tb_ticks_per_sec/1000000
* 1,000,000 is 15625<<6, so:
* if((now<<6)<100*tb_ticks_per_sec/15625)
* 100 is 25<<2, so:
* if((now<<4)<25*tb_ticks_per_sec/15625)
* 15625 is 3125*5, so:
* if((now<<4)*5<25*tb_ticks_per_sec/3125)
* obviously 25/3125 -> 1/125:
* if((now<<4)*5<tb_ticks_per_sec/125)
*/
if ((now<<4)*5 < tb_ticks_per_sec/125)
udelay(100-now*1000000/tb_ticks_per_sec);
raw_notifier_call_chain(&pllifvPllLockChain, pllifmPllLock,
pllifvLockCallData.data);
/*
* Clear all lock bits
*/
boot_ratio &= ~(PLL_TIMER|PLL0_LOCK|PLL1_LOCK);
if ((unsigned int)newPLL)
pllifiSwitchPLLs((unsigned int)newPLL);
}
#endif
/*
* Handle accesses to the pll register. Examples for write:
* value CFGx/RNGx/res effect
* 0x08010000 switch to PLL1
* 0x08000000 switch to PLL0
* 0xc000fa00 1111 1/01/0 PLL0 off (CFG/RNG 31/1)
* 0xc000f200 1111 0/01/0 PLL0 to 20x (CFG/RNG 30/1)
* 0x30000004 0000 0/10/0 PLL1 off (CFG/RNG 0/2)
* 0x30000054 0101 0/10/0 PLL1 to 5x (CFG/RNG a/2)
*/
/**
* modifyPLL: - Takes steps to modify PLL as requested
* @pll: Specifies the new value and desired operation to be performed
* @scaleLPJ: flag to indicate whether to scale the loops_per_jiffy value
*
* Based on the value passed in the pll argument, this takes the steps necessary
* to change the PLL as requested. The upper 7 or 8 bits of the PLL are read
* only. These bit positions in the pll argument are used to specify flags that
* indicate the validity of the other fields in the pll argument. See the
* pll_if.h header for detail and actual values.
*/
int modifyPLL(unsigned int pll, int scaleLPJ)
{
unsigned int current_pll, work_mask, pll_x;
int rval = 0;
pr_debug(__FILE__">%s()-%d:\n", __func__, __LINE__);
pr_debug(__FILE__">%s()-%d: pll=0x%08x\n", __func__, __LINE__, pll);
/*
* This is not reentrant
*/
if (test_and_set_bit(PLL_LOCK_BIT, (unsigned long *)&boot_ratio)) {
pr_debug(__FILE__">%s()-%d: Busy!\n", __func__, __LINE__);
return -EAGAIN;
}
/*
* Don't allow any changes if a timer is pending
*/
if (test_bit(PLL_TIMER_BIT, (unsigned long *)&boot_ratio))
goto checkPLLBusy;
current_pll = get_PLL();
work_mask = pll>>24;
/*
* Check to see if the currently selected PLL is being modified
*/
pll_x = get_active_PLL(current_pll);
if ((pll_x == 0 && work_mask&(PLL0_DO_CFG|PLL0_DO_RNG|PLL0_DO_CONTROL))
|| (pll_x == 1 && work_mask&(PLL1_DO_CFG|PLL1_DO_RNG)))
goto checkPLLInVal;
/*
* Can't change to a PLL that is off. Also can't immediately change to
* one that is not locked. Catch that supposedly impossible condition.
*/
if (work_mask&PLL_DO_SEL) {
int next_ratio;
unsigned int which_config;
pll_x = get_next_PLL(pll);
/*
* Figure out where the next ratio comes from. It will be from
* pll if we are changing the next pll and current_pll if not.
*/
which_config = pll_x?((work_mask&PLL1_DO_CFG)?pll:current_pll):
((work_mask&PLL0_DO_CFG)?pll:current_pll);
next_ratio = get_PLL_ratio(pll_x, which_config);
if (next_ratio < 4 || next_ratio > 30)
goto checkPLLInVal;
pll_x = ((pll_x == 0 && boot_ratio&PLL0_LOCK) || (pll_x == 1 &&
boot_ratio&PLL1_LOCK))?1:0;
}
/*
* To avoid complications, don't allow both plls to be half ratios
*/
if (work_mask&PLL0_DO_CFG) {
int old_ratio1, new_ratio0;
old_ratio1 = get_PLL_ratio(1, current_pll);
new_ratio0 = get_PLL_ratio(0, pll);
if (old_ratio1 > 4 && old_ratio1 < 20 && new_ratio0 > 4 &&
new_ratio0 < 20 && (old_ratio1&0x1) & (new_ratio0&0x1))
goto checkPLLInVal;
} else if (work_mask&PLL1_DO_CFG) {
int old_ratio0, new_ratio1;
old_ratio0 = get_PLL_ratio(0, current_pll);
new_ratio1 = get_PLL_ratio(1, pll);
if (old_ratio0 > 4 && old_ratio0 < 20 && new_ratio1 > 4 &&
new_ratio1 < 20 && (old_ratio0&0x1) & (new_ratio1&0x1))
goto checkPLLInVal;
}
/*
* Determine if we will need to schedule a timer for a PLL relock. If
* any PLL config is being changed then a timer will be needed. Also
* need one if changing to a PLL that is not locked, though that should
* not happen.
*/
if ((work_mask&(PLL0_DO_CFG|PLL0_DO_RNG|PLL1_DO_CFG|PLL1_DO_RNG|
PLL0_DO_CONTROL)) || (work_mask&PLL_DO_SEL && pll_x)) {
unsigned int pll_mask, temp;
pll_mask = 0;
if (work_mask&PLL0_DO_CFG) {
pll_mask |= PLL0_CFG_MASK;
/*
* Flag that PLL0 needs to relock
*/
boot_ratio |= PLL0_LOCK;
}
if (work_mask&PLL0_DO_RNG)
pll_mask |= PLL0_RNG_MASK;
if (work_mask&PLL1_DO_CFG) {
pll_mask |= PLL1_CFG_MASK;
/*
* Flag that PLL1 needs to relock
*/
boot_ratio |= PLL1_LOCK;
}
if (work_mask&PLL1_DO_RNG)
pll_mask |= PLL1_RNG_MASK;
temp = (current_pll&~pll_mask)|(pll&pll_mask);
if (pll_mask)
set_PLL(temp);
/*
* Flag that a timer is pending
*/
boot_ratio |= PLL_TIMER;
/*
* Schedule a timer to clear the PLL lock bits (and signal that
* it is ok to select the PLL)
*/
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_HRTIMER
/*
* Oh please, someone tell me I'm just to stupid to know how
* to pass this to the timer function!
*/
hrtimers_got_no_freakin_callback_data = (work_mask&PLL_DO_SEL)?
(PLL_DO_SEL<<24)|(scaleLPJ?PLL_DO_LPJ:0)|pll&
PLL_SEL_MASK:0;
pll_timer.expires = ktime_set(0, 100000);
hrtimer_start(&pll_timer, pll_timer.expires, HRTIMER_MODE_REL);
#ifdef DEBUG
pll_time_stamp = get_cycles();
#endif
#else
/*
* We might want to pass three pieces of data to the timer
* i) that we want to switch PLLs (PLL_DO_SEL)
* ii) which PLL to switch to (PLL_SEL_MASK)
* iii) flag to control whether loops_per_jiffy is updated
* (PLL_DO_LPJ)
*/
pll_timer.data = (work_mask&PLL_DO_SEL)?(PLL_DO_SEL<<24)|(
scaleLPJ?PLL_DO_LPJ:0)|(pll&PLL_SEL_MASK):0;
/*
* Relock takes 100 us. See how many jiffies will take care of
* it.
*/
pll_timer.expires = (100*HZ/1000000);
if (pll_timer.expires == 0)
pll_timer.expires = 1;
pll_timer.expires = jiffies+pll_timer.expires;
add_timer(&pll_timer);
pll_time_stamp = get_cycles();
#endif
} else if (work_mask&PLL_DO_SEL)
pllifiSwitchPLLs(pll|(scaleLPJ?PLL_DO_LPJ:0));
checkPLLOut:
clear_bit(PLL_LOCK_BIT, (unsigned long *)&boot_ratio);
return rval;
checkPLLBusy:
rval = -EBUSY;
goto checkPLLOut;
checkPLLInVal:
rval = -EINVAL;
goto checkPLLOut;
}
EXPORT_SYMBOL(modifyPLL);
/**
* pllifCFgToFreq: - Takes a ratio and returns the frequency
* @cfg: The PLL ratio field value
*
* This takes a PLL ratio field value and uses it along with the bus frequency
* to compute the processor frequency.
*/
unsigned int pllifCfgToFreq(unsigned int cfg)
{
return (cfg < 21?cfg>>1:cfg-10)*pllifvBusClock;
}
EXPORT_SYMBOL(pllifCfgToFreq);
#ifdef CONFIG_PPC_750GX_DUAL_PLL_IF_CPU_FREQ
/**
* pllifGetBusClock: - Returns the bus frequency
*
* This returns the determined bus frequency in Hz.
*/
unsigned int pllifGetBusClock()
{
return pllifvBusClock;
}
EXPORT_SYMBOL(pllifGetBusClock);
/**
* pllifRegisterPllSwitchCB: - Registers a pll switch call back
* @nb: structure describing the call back to register
*
* This registers a call back function that will be called when the clock is
* switched from one PLL to the other.
*/
int pllifRegisterPllSwitchCB(struct notifier_block *nb)
{
int ret;
pllifvSwitchCallData.data = (void *)nb->next;
nb->next = NULL;
pllifvSwitchCallData.scalar = nb->priority;
nb->priority = 0;
ret = raw_notifier_chain_register(&pllifvPllSwitchChain, nb);
return ret;
}
EXPORT_SYMBOL(pllifRegisterPllSwitchCB);
/**
* pllifUnregisterPllSwitchCB: - Cancels a previously registered call back
* @nb: structure describing the call back to cancel
*
* This cancels a previously registered switch call back
*/
void pllifUnregisterPllSwitchCB(struct notifier_block *nb)
{
raw_notifier_chain_unregister(&pllifvPllSwitchChain, nb);
}
EXPORT_SYMBOL(pllifUnregisterPllSwitchCB);
/**
* pllifRegisterPllLockCB: - Registers a pll lock call back
* @nb: structure describing the call back to register
*
* This registers a call back function that will be called when a PLL has
* locked to a new frequency.
*/
int pllifRegisterPllLockCB(struct notifier_block *nb)
{
int ret;
pllifvLockCallData.data = (void *)nb->next;
nb->next = NULL;
pllifvLockCallData.scalar = nb->priority;
nb->priority = 0;
ret = raw_notifier_chain_register(&pllifvPllLockChain, nb);
return ret;
}
EXPORT_SYMBOL(pllifRegisterPllLockCB);
/**
* pllifUnregisterPllLockCB: - Cancels a previously registered call back
* @nb: structure describing the call back to cancel
*
* This cancels a previously registered PLL lock call back
*/
void pllifUnregisterPllLockCB(struct notifier_block *nb)
{
raw_notifier_chain_unregister(&pllifvPllLockChain, nb);
}
EXPORT_SYMBOL(pllifUnregisterPllLockCB);
#endif
module_param(override_bus_clock, uint, 0644);
MODULE_PARM_DESC(override_bus_clock,
"Bus clock frequency in KHz used to compute core clock frequency from"
" bus ratios.");
^ permalink raw reply
* Re: patches for 2.6.27... (Kumar Gala)
From: Wolfgang Denk @ 2008-08-15 21:11 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, hs
In-Reply-To: <48994B9C.4050908@denx.de>
Dear Kumar,
In message <48994B9C.4050908@denx.de> Heiko Schocher wrote:
> Hello Kumar,
>
> On Wed Jul 2 19:58:03 EST 2008 Heiko Schocher wrote:
> >On Wednesday 02 July 2008, Kumar Gala wrote:
> >> Please point out any patches that have been posted but havent made it
> >> into a git tree related to Freescale chips.
> >
> > Here are 2 patches that I'd like to see in 2.6.27. They haven't made into
> > any git tree as far as I know.
> >
> > http://ozlabs.org/pipermail/linuxppc-dev/2008-June/058118.html
> >
> > http://ozlabs.org/pipermail/linuxppc-dev/2008-June/057972.html
>
> Can you tell me, if these patches go into the Tree?
> I had generally acks for this boards, but didnt see them in any tree yet?
>
> Are there some more issues?
As discussed, here the references to the patchwork locations:
http://patchwork.ozlabs.org/linuxppc/list?q=8xx+mgsuvd
and
http://patchwork.ozlabs.org/linuxppc/list?q=82xx+MGCOGE
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
The shortest unit of time in the multiverse is the News York Second,
defined as the period of time between the traffic lights turning
green and the cab behind you honking.
- Terry Pratchett, _Lords and Ladies_
^ permalink raw reply
* Re: Possible init bug in ibm_newemac/core.c
From: Darcy Watkins @ 2008-08-15 20:38 UTC (permalink / raw)
To: Benjamin Krill; +Cc: linuxppc-embedded
In-Reply-To: <1218830440.3465.201.camel@localhost>
Good news! The patch in the URL is what I tried earlier (as mentioned
below). The one in the followup post on the thread - I didn't try,
until now. It appears to work properly on both boards.
Cheers and Thanks!
On Fri, 2008-08-15 at 13:00 -0700, Darcy Watkins wrote:
> --snip!-- What they did was exactly what I
> did (and then later reverted).
--snip!--
> On Fri, 2008-08-15 at 10:48 -0700, Benjamin Krill wrote:
--snip!--
> > Have a look at thread:
> > http://ozlabs.org/pipermail/linuxppc-dev/2008-August/061631.html
--snip!--
--
Regards,
Darcy
--------------
Darcy L. Watkins - Senior Software Developer
Tranzeo Wireless Technologies, Inc.
19273 Fraser Way, Pitt Meadows, BC, Canada V3Y 2V4
T:604-460-6002 ext:410
http://www.tranzeo.com
^ permalink raw reply
* [PATCH 3/3] powerpc: add CMO enabled flag and paging space data to lparcfg
From: Robert Jennings @ 2008-08-15 19:10 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev list, Benjamin Herrenschmidt
In-Reply-To: <20080815190230.GA20629@austin.ibm.com>
Add a field in lparcfg output to indicate whether the kernel is running on a
dedicated or shared memory lpar. Added fields to show the paging space pool
IDs and the CMO page size.
Submitted-by: Robert Jennings <rcj@linux.vnet.ibm.com>
---
arch/powerpc/kernel/lparcfg.c | 5 +++++
1 file changed, 5 insertions(+)
Index: b/arch/powerpc/kernel/lparcfg.c
===================================================================
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -416,6 +416,8 @@ static void pseries_cmo_data(struct seq_
unsigned long cmo_faults = 0;
unsigned long cmo_fault_time = 0;
+ seq_printf(m, "cmo_enabled=%d\n", firmware_has_feature(FW_FEATURE_CMO));
+
if (!firmware_has_feature(FW_FEATURE_CMO))
return;
@@ -427,6 +429,9 @@ static void pseries_cmo_data(struct seq_
seq_printf(m, "cmo_faults=%lu\n", cmo_faults);
seq_printf(m, "cmo_fault_time_usec=%lu\n",
cmo_fault_time / tb_ticks_per_usec);
+ seq_printf(m, "cmo_primary_psp=%d\n", cmo_get_primary_psp());
+ seq_printf(m, "cmo_secondary_psp=%d\n", cmo_get_secondary_psp());
+ seq_printf(m, "cmo_page_size=%lu\n", cmo_get_page_size());
}
static int pseries_lparcfg_data(struct seq_file *m, void *v)
^ permalink raw reply
* [PATCH 2/3] powerpc: Fix CMM page loaning on 64k page kernel with 4k hardware pages
From: Robert Jennings @ 2008-08-15 19:09 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev list, Benjamin Herrenschmidt
In-Reply-To: <20080815190230.GA20629@austin.ibm.com>
=46rom: Brian King <brking@linux.vnet.ibm.com>
If the firmware page size used for collaborative memory overcommit
is 4k, but the kernel is using 64k pages, the page loaning is currently
broken as it only marks the first 4k page of each 64k page as loaned.
This fixes this to iterate through each 4k page and mark them all as
loaned/active.
Signed-off-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/plpar_wrappers.h | 27 +++++++++++++++++++=
+++--
1 file changed, 25 insertions(+), 2 deletions(-)
Index: b/arch/powerpc/platforms/pseries/plpar_wrappers.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -2,6 +2,7 @@
#define _PSERIES_PLPAR_WRAPPERS_H
=20
#include <asm/hvcall.h>
+#include <asm/page.h>
=20
static inline long poll_pending(void)
{
@@ -44,12 +45,34 @@ static inline long register_slb_shadow(u
=20
static inline long plpar_page_set_loaned(unsigned long vpa)
{
- return plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_LOANED, vpa, 0);
+ unsigned long cmo_page_sz =3D cmo_get_page_size();
+ long rc =3D 0;
+ int i;
+
+ for (i =3D 0; !rc && i < PAGE_SIZE; i +=3D cmo_page_sz)
+ rc =3D plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_LOANED, vpa + i, 0);
+
+ for (i -=3D cmo_page_sz; rc && i !=3D 0; i -=3D cmo_page_sz)
+ plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_ACTIVE,
+ vpa + i - cmo_page_sz, 0);
+
+ return rc;
}
=20
static inline long plpar_page_set_active(unsigned long vpa)
{
- return plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_ACTIVE, vpa, 0);
+ unsigned long cmo_page_sz =3D cmo_get_page_size();
+ long rc =3D 0;
+ int i;
+
+ for (i =3D 0; !rc && i < PAGE_SIZE; i +=3D cmo_page_sz)
+ rc =3D plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_ACTIVE, vpa + i, 0);
+
+ for (i -=3D cmo_page_sz; rc && i !=3D 0; i -=3D cmo_page_sz)
+ plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_LOANED,
+ vpa + i - cmo_page_sz, 0);
+
+ return rc;
}
=20
extern void vpa_init(int cpu);
^ permalink raw reply
* [PATCH 1/3] powerpc: make CMO paging space pool ID and page size available
From: Robert Jennings @ 2008-08-15 19:07 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev list, Benjamin Herrenschmidt
In-Reply-To: <20080815190230.GA20629@austin.ibm.com>
During platform setup, save off the primary/secondary paging space pool IDs
and the page size. Added accessors in hvcall.h for these variables.
Submitted-by: Robert Jennings <rcj@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/hvcall.h | 21 +++++++++++++++++++++
arch/powerpc/platforms/pseries/setup.c | 28 ++++++++++++++++++++--------
2 files changed, 41 insertions(+), 8 deletions(-)
Index: b/arch/powerpc/include/asm/hvcall.h
===================================================================
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -292,6 +292,27 @@ struct hvcall_mpp_data {
int h_get_mpp(struct hvcall_mpp_data *);
+#ifdef CONFIG_PPC_PSERIES
+extern int CMO_PrPSP;
+extern int CMO_SecPSP;
+extern unsigned long CMO_PageSize;
+
+static inline int cmo_get_primary_psp(void)
+{
+ return CMO_PrPSP;
+}
+
+static inline int cmo_get_secondary_psp(void)
+{
+ return CMO_SecPSP;
+}
+
+static inline unsigned long cmo_get_page_size(void)
+{
+ return CMO_PageSize;
+}
+#endif /* CONFIG_PPC_PSERIES */
+
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_HVCALL_H */
Index: b/arch/powerpc/platforms/pseries/setup.c
===================================================================
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -68,6 +68,9 @@
#include "plpar_wrappers.h"
#include "pseries.h"
+int CMO_PrPSP = -1;
+int CMO_SecPSP = -1;
+unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT);
int fwnmi_active; /* TRUE if an FWNMI handler is present */
@@ -325,8 +328,7 @@ void pSeries_cmo_feature_init(void)
{
char *ptr, *key, *value, *end;
int call_status;
- int PrPSP = -1;
- int SecPSP = -1;
+ int page_order = IOMMU_PAGE_SHIFT;
pr_debug(" -> fw_cmo_feature_init()\n");
spin_lock(&rtas_data_buf_lock);
@@ -365,21 +367,31 @@ void pSeries_cmo_feature_init(void)
break;
}
- if (0 == strcmp(key, "PrPSP"))
- PrPSP = simple_strtol(value, NULL, 10);
+ if (0 == strcmp(key, "CMOPageSize"))
+ page_order = simple_strtol(value, NULL, 10);
+ else if (0 == strcmp(key, "PrPSP"))
+ CMO_PrPSP = simple_strtol(value, NULL, 10);
else if (0 == strcmp(key, "SecPSP"))
- SecPSP = simple_strtol(value, NULL, 10);
+ CMO_SecPSP = simple_strtol(value, NULL, 10);
value = key = ptr + 1;
}
ptr++;
}
- if (PrPSP != -1 || SecPSP != -1) {
+ /* Page size is returned as the power of 2 of the page size,
+ * convert to the page size in bytes before returning
+ */
+ CMO_PageSize = 1 << page_order;
+ pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
+
+ if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
pr_info("CMO enabled\n");
- pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", PrPSP, SecPSP);
+ pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
+ CMO_SecPSP);
powerpc_firmware_features |= FW_FEATURE_CMO;
} else
- pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", PrPSP, SecPSP);
+ pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
+ CMO_SecPSP);
spin_unlock(&rtas_data_buf_lock);
pr_debug(" <- fw_cmo_feature_init()\n");
}
^ permalink raw reply
* [PATCH 0/3] powerpc: cmo fix page loaning and add info to lparcfg
From: Robert Jennings @ 2008-08-15 19:02 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev list, Benjamin Herrenschmidt
We need to correct a problem found where the kernel is using 64k pages
but the firmware pages size is 4k. In this case we were not properly
marking pages as 'loaned' to firmware.
To fix this I exposed some data pulled from rtas during early setup. I
also made these values available via /proc/ppc64/lparcfg in the second
patch.
The first patch makes the data available and the other two patches
(unrelated to each other) depend on the first.
Regards,
Robert Jennings
^ permalink raw reply
* Re: Possible init bug in ibm_newemac/core.c
From: Darcy Watkins @ 2008-08-15 20:00 UTC (permalink / raw)
To: Benjamin Krill; +Cc: linuxppc-embedded
In-Reply-To: <20080815174821.GK10829@codiert.org>
Hi Ben,
Thanks for the pointer the the thread. What they did was exactly what I
did (and then later reverted). I guess my "lame hack attempt" wasn't so
lame after all.
It works fine on my "mule" board with more memory and two Ethernet
ports, but fails on the production board having less memory and only one
Ethernet port.
This probably means that I need to look into something else.
In our setup, the DTS always says two Ethernet ports. It may be that
the failure of the probe in the case of the non-existent Ethernet port
causes the kernel panic when the order of execution of those two
functions are reversed.
Thanks again. This gives me a few more leads to chase down.
Darcy
On Fri, 2008-08-15 at 10:48 -0700, Benjamin Krill wrote:
> Hi Darcy,
>
> >The bug normally goes unnoticed until you turn on spinlock and/or
> >rtmutex debuggging in the kernel config - then the debugging magic
> >checks will catch it during boot.
>
> Have a look at thread:
> http://ozlabs.org/pipermail/linuxppc-dev/2008-August/061631.html
>
> cheers
> ben
>
--
Regards,
Darcy
--------------
Darcy L. Watkins - Senior Software Developer
Tranzeo Wireless Technologies, Inc.
19273 Fraser Way, Pitt Meadows, BC, Canada V3Y 2V4
T:604-460-6002 ext:410
http://www.tranzeo.com
^ permalink raw reply
* Re: Possible init bug in ibm_newemac/core.c
From: Benjamin Krill @ 2008-08-15 17:48 UTC (permalink / raw)
To: Darcy Watkins; +Cc: linuxppc-embedded
In-Reply-To: <1218819785.3465.190.camel@localhost>
Hi Darcy,
>The bug normally goes unnoticed until you turn on spinlock and/or
>rtmutex debuggging in the kernel config - then the debugging magic
>checks will catch it during boot.
Have a look at thread:
http://ozlabs.org/pipermail/linuxppc-dev/2008-August/061631.html
cheers
ben
^ permalink raw reply
* Re: [PATCH 1/2] port ndfc driver to of platform
From: Sean MacLennan @ 2008-08-15 17:29 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, dwmw2
In-Reply-To: <200808150927.41993.arnd@arndb.de>
Added in the MODULE_DEVICE_TABLE.
Cheers,
Sean
Port of the ndfc driver to an of platform driver.
Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 41f361c..ab0d77e 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -165,7 +165,7 @@ config MTD_NAND_S3C2410_HWECC
config MTD_NAND_NDFC
tristate "NDFC NanD Flash Controller"
- depends on 4xx && !PPC_MERGE
+ depends on 4xx
select MTD_NAND_ECC_SMC
help
NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 955959e..abdb42f 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -5,9 +5,13 @@
* Platform independend driver for NDFC (NanD Flash Controller)
* integrated into EP440 cores
*
+ * Ported to an OF platform driver by Sean MacLennan
+ *
* Author: Thomas Gleixner
*
* Copyright 2006 IBM
+ * Copyright 2008 PIKA Technologies
+ * Sean MacLennan <smaclennan@pikatech.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -21,27 +25,17 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/ndfc.h>
#include <linux/mtd/mtd.h>
-#include <linux/platform_device.h>
-
+#include <linux/of_platform.h>
#include <asm/io.h>
-#ifdef CONFIG_40x
-#include <asm/ibm405.h>
-#else
-#include <asm/ibm44x.h>
-#endif
-
-struct ndfc_nand_mtd {
- struct mtd_info mtd;
- struct nand_chip chip;
- struct platform_nand_chip *pl_chip;
-};
-static struct ndfc_nand_mtd ndfc_mtd[NDFC_MAX_BANKS];
struct ndfc_controller {
- void __iomem *ndfcbase;
- struct nand_hw_control ndfc_control;
- atomic_t childs_active;
+ struct of_device *ofdev;
+ void __iomem *ndfcbase;
+ struct mtd_info mtd;
+ struct nand_chip chip;
+ int chip_select;
+ struct nand_hw_control ndfc_control;
};
static struct ndfc_controller ndfc_ctrl;
@@ -50,17 +44,14 @@ static void ndfc_select_chip(struct mtd_info *mtd, int chip)
{
uint32_t ccr;
struct ndfc_controller *ndfc = &ndfc_ctrl;
- struct nand_chip *nandchip = mtd->priv;
- struct ndfc_nand_mtd *nandmtd = nandchip->priv;
- struct platform_nand_chip *pchip = nandmtd->pl_chip;
- ccr = __raw_readl(ndfc->ndfcbase + NDFC_CCR);
+ ccr = in_be32(ndfc->ndfcbase + NDFC_CCR);
if (chip >= 0) {
ccr &= ~NDFC_CCR_BS_MASK;
- ccr |= NDFC_CCR_BS(chip + pchip->chip_offset);
+ ccr |= NDFC_CCR_BS(chip + ndfc->chip_select);
} else
ccr |= NDFC_CCR_RESET_CE;
- __raw_writel(ccr, ndfc->ndfcbase + NDFC_CCR);
+ out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
}
static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
@@ -80,7 +71,7 @@ static int ndfc_ready(struct mtd_info *mtd)
{
struct ndfc_controller *ndfc = &ndfc_ctrl;
- return __raw_readl(ndfc->ndfcbase + NDFC_STAT) & NDFC_STAT_IS_READY;
+ return in_be32(ndfc->ndfcbase + NDFC_STAT) & NDFC_STAT_IS_READY;
}
static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode)
@@ -88,9 +79,9 @@ static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode)
uint32_t ccr;
struct ndfc_controller *ndfc = &ndfc_ctrl;
- ccr = __raw_readl(ndfc->ndfcbase + NDFC_CCR);
+ ccr = in_be32(ndfc->ndfcbase + NDFC_CCR);
ccr |= NDFC_CCR_RESET_ECC;
- __raw_writel(ccr, ndfc->ndfcbase + NDFC_CCR);
+ out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
wmb();
}
@@ -102,9 +93,10 @@ static int ndfc_calculate_ecc(struct mtd_info *mtd,
uint8_t *p = (uint8_t *)&ecc;
wmb();
- ecc = __raw_readl(ndfc->ndfcbase + NDFC_ECC);
- ecc_code[0] = p[1];
- ecc_code[1] = p[2];
+ ecc = in_be32(ndfc->ndfcbase + NDFC_ECC);
+ /* The NDFC uses Smart Media (SMC) bytes order */
+ ecc_code[0] = p[2];
+ ecc_code[1] = p[1];
ecc_code[2] = p[3];
return 0;
@@ -123,7 +115,7 @@ static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
uint32_t *p = (uint32_t *) buf;
for(;len > 0; len -= 4)
- *p++ = __raw_readl(ndfc->ndfcbase + NDFC_DATA);
+ *p++ = in_be32(ndfc->ndfcbase + NDFC_DATA);
}
static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
@@ -132,7 +124,7 @@ static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
uint32_t *p = (uint32_t *) buf;
for(;len > 0; len -= 4)
- __raw_writel(*p++, ndfc->ndfcbase + NDFC_DATA);
+ out_be32(ndfc->ndfcbase + NDFC_DATA, *p++);
}
static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
@@ -141,7 +133,7 @@ static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
uint32_t *p = (uint32_t *) buf;
for(;len > 0; len -= 4)
- if (*p++ != __raw_readl(ndfc->ndfcbase + NDFC_DATA))
+ if (*p++ != in_be32(ndfc->ndfcbase + NDFC_DATA))
return -EFAULT;
return 0;
}
@@ -149,10 +141,19 @@ static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
/*
* Initialize chip structure
*/
-static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
+static int ndfc_chip_init(struct ndfc_controller *ndfc,
+ struct device_node *node)
{
- struct ndfc_controller *ndfc = &ndfc_ctrl;
- struct nand_chip *chip = &mtd->chip;
+#ifdef CONFIG_MTD_PARTITIONS
+#ifdef CONFIG_MTD_CMDLINE_PARTS
+ static const char *part_types[] = { "cmdlinepart", NULL };
+#else
+ static const char *part_types[] = { NULL };
+#endif
+ struct mtd_partition *parts;
+#endif
+ struct nand_chip *chip = &ndfc->chip;
+ int ret;
chip->IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA;
chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA;
@@ -160,8 +161,6 @@ static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
chip->dev_ready = ndfc_ready;
chip->select_chip = ndfc_select_chip;
chip->chip_delay = 50;
- chip->priv = mtd;
- chip->options = mtd->pl_chip->options;
chip->controller = &ndfc->ndfc_control;
chip->read_buf = ndfc_read_buf;
chip->write_buf = ndfc_write_buf;
@@ -172,143 +171,121 @@ static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
chip->ecc.mode = NAND_ECC_HW;
chip->ecc.size = 256;
chip->ecc.bytes = 3;
- chip->ecclayout = chip->ecc.layout = mtd->pl_chip->ecclayout;
- mtd->mtd.priv = chip;
- mtd->mtd.owner = THIS_MODULE;
-}
-
-static int ndfc_chip_probe(struct platform_device *pdev)
-{
- struct platform_nand_chip *nc = pdev->dev.platform_data;
- struct ndfc_chip_settings *settings = nc->priv;
- struct ndfc_controller *ndfc = &ndfc_ctrl;
- struct ndfc_nand_mtd *nandmtd;
-
- if (nc->chip_offset >= NDFC_MAX_BANKS || nc->nr_chips > NDFC_MAX_BANKS)
- return -EINVAL;
- /* Set the bank settings */
- __raw_writel(settings->bank_settings,
- ndfc->ndfcbase + NDFC_BCFG0 + (nc->chip_offset << 2));
+ ndfc->mtd.priv = chip;
+ ndfc->mtd.owner = THIS_MODULE;
- nandmtd = &ndfc_mtd[pdev->id];
- if (nandmtd->pl_chip)
- return -EBUSY;
+ ret = nand_scan(&ndfc->mtd, 1);
+ if (ret)
+ return ret;
- nandmtd->pl_chip = nc;
- ndfc_chip_init(nandmtd);
-
- /* Scan for chips */
- if (nand_scan(&nandmtd->mtd, nc->nr_chips)) {
- nandmtd->pl_chip = NULL;
- return -ENODEV;
- }
+ ndfc->mtd.name = ndfc->ofdev->dev.bus_id;
#ifdef CONFIG_MTD_PARTITIONS
- printk("Number of partitions %d\n", nc->nr_partitions);
- if (nc->nr_partitions) {
- /* Add the full device, so complete dumps can be made */
- add_mtd_device(&nandmtd->mtd);
- add_mtd_partitions(&nandmtd->mtd, nc->partitions,
- nc->nr_partitions);
-
- } else
-#else
- add_mtd_device(&nandmtd->mtd);
+ ret = parse_mtd_partitions(&ndfc->mtd, part_types, &parts, 0);
+ if (ret < 0)
+ return ret;
+
+#ifdef CONFIG_MTD_OF_PARTS
+ if (ret == 0) {
+ ret = of_mtd_parse_partitions(&ndfc->ofdev->dev, &ndfc->mtd,
+ node, &parts);
+ if (ret < 0)
+ return ret;
+ }
#endif
- atomic_inc(&ndfc->childs_active);
- return 0;
-}
+ if (ret > 0)
+ return add_mtd_partitions(&ndfc->mtd, parts, ret);
+#endif
-static int ndfc_chip_remove(struct platform_device *pdev)
-{
- return 0;
+ return add_mtd_device(&ndfc->mtd);
}
-static int ndfc_nand_probe(struct platform_device *pdev)
+static int __devinit ndfc_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
{
- struct platform_nand_ctrl *nc = pdev->dev.platform_data;
- struct ndfc_controller_settings *settings = nc->priv;
- struct resource *res = pdev->resource;
struct ndfc_controller *ndfc = &ndfc_ctrl;
- unsigned long long phys = settings->ndfc_erpn | res->start;
+ const u32 *reg;
+ u32 ccr;
+ int err, len;
-#ifndef CONFIG_PHYS_64BIT
- ndfc->ndfcbase = ioremap((phys_addr_t)phys, res->end - res->start + 1);
-#else
- ndfc->ndfcbase = ioremap64(phys, res->end - res->start + 1);
-#endif
+ spin_lock_init(&ndfc->ndfc_control.lock);
+ init_waitqueue_head(&ndfc->ndfc_control.wq);
+ ndfc->ofdev = ofdev;
+ dev_set_drvdata(&ofdev->dev, ndfc);
+
+ /* Read the reg property to get the chip select */
+ reg = of_get_property(ofdev->node, "reg", &len);
+ if (reg == NULL || len != 12) {
+ dev_err(&ofdev->dev, "unable read reg property (%d)\n", len);
+ return -ENOENT;
+ }
+ ndfc->chip_select = reg[0];
+
+ ndfc->ndfcbase = of_iomap(ofdev->node, 0);
if (!ndfc->ndfcbase) {
- printk(KERN_ERR "NDFC: ioremap failed\n");
+ dev_err(&ofdev->dev, "failed to get memory\n");
return -EIO;
}
- __raw_writel(settings->ccr_settings, ndfc->ndfcbase + NDFC_CCR);
+ ccr = NDFC_CCR_BS(ndfc->chip_select);
- spin_lock_init(&ndfc->ndfc_control.lock);
- init_waitqueue_head(&ndfc->ndfc_control.wq);
+ /* It is ok if ccr does not exist - just default to 0 */
+ reg = of_get_property(ofdev->node, "ccr", NULL);
+ if (reg)
+ ccr |= *reg;
+
+ out_be32(ndfc->ndfcbase + NDFC_CCR, ccr);
- platform_set_drvdata(pdev, ndfc);
+ /* Set the bank settings if given */
+ reg = of_get_property(ofdev->node, "bank-settings", NULL);
+ if (reg) {
+ int offset = NDFC_BCFG0 + (ndfc->chip_select << 2);
+ out_be32(ndfc->ndfcbase + offset, *reg);
+ }
- printk("NDFC NAND Driver initialized. Chip-Rev: 0x%08x\n",
- __raw_readl(ndfc->ndfcbase + NDFC_REVID));
+ err = ndfc_chip_init(ndfc, ofdev->node);
+ if (err) {
+ iounmap(ndfc->ndfcbase);
+ return err;
+ }
return 0;
}
-static int ndfc_nand_remove(struct platform_device *pdev)
+static int __devexit ndfc_remove(struct of_device *ofdev)
{
- struct ndfc_controller *ndfc = platform_get_drvdata(pdev);
+ struct ndfc_controller *ndfc = dev_get_drvdata(&ofdev->dev);
- if (atomic_read(&ndfc->childs_active))
- return -EBUSY;
+ nand_release(&ndfc->mtd);
- if (ndfc) {
- platform_set_drvdata(pdev, NULL);
- iounmap(ndfc_ctrl.ndfcbase);
- ndfc_ctrl.ndfcbase = NULL;
- }
return 0;
}
-/* driver device registration */
-
-static struct platform_driver ndfc_chip_driver = {
- .probe = ndfc_chip_probe,
- .remove = ndfc_chip_remove,
- .driver = {
- .name = "ndfc-chip",
- .owner = THIS_MODULE,
- },
+static const struct of_device_id ndfc_match[] = {
+ { .compatible = "amcc,ndfc", },
+ {}
};
+MODULE_DEVICE_TABLE(of, ndfc_match);
-static struct platform_driver ndfc_nand_driver = {
- .probe = ndfc_nand_probe,
- .remove = ndfc_nand_remove,
- .driver = {
- .name = "ndfc-nand",
- .owner = THIS_MODULE,
+static struct of_platform_driver ndfc_driver = {
+ .driver = {
+ .name = "ndfc",
},
+ .match_table = ndfc_match,
+ .probe = ndfc_probe,
+ .remove = __devexit_p(ndfc_remove),
};
static int __init ndfc_nand_init(void)
{
- int ret;
-
- spin_lock_init(&ndfc_ctrl.ndfc_control.lock);
- init_waitqueue_head(&ndfc_ctrl.ndfc_control.wq);
-
- ret = platform_driver_register(&ndfc_nand_driver);
- if (!ret)
- ret = platform_driver_register(&ndfc_chip_driver);
- return ret;
+ return of_register_platform_driver(&ndfc_driver);
}
static void __exit ndfc_nand_exit(void)
{
- platform_driver_unregister(&ndfc_chip_driver);
- platform_driver_unregister(&ndfc_nand_driver);
+ of_unregister_platform_driver(&ndfc_driver);
}
module_init(ndfc_nand_init);
@@ -316,6 +293,4 @@ module_exit(ndfc_nand_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
-MODULE_DESCRIPTION("Platform driver for NDFC");
-MODULE_ALIAS("platform:ndfc-chip");
-MODULE_ALIAS("platform:ndfc-nand");
+MODULE_DESCRIPTION("OF Platform driver for NDFC");
^ permalink raw reply related
* Possible init bug in ibm_newemac/core.c
From: Darcy Watkins @ 2008-08-15 17:03 UTC (permalink / raw)
To: linuxppc-embedded
Hello,
In function...
static int __devinit emac_probe(struct of_device *ofdev,
const struct of_device_id *match)
... in
drivers/net/ibm_newemac/core.c
... there is a chunk of code as follows (The // DLW - BUG ... comment is
mine) ...
/* Find PHY if any */
// DLW - BUG - This uses an uninitialized spinlock (potential badness).
err = emac_init_phy(dev);
if (err != 0)
goto err_detach_tah;
/* Fill in the driver function table */
ndev->open = &emac_open;
if (dev->tah_dev)
ndev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
ndev->tx_timeout = &emac_tx_timeout;
ndev->watchdog_timeo = 5 * HZ;
ndev->stop = &emac_close;
ndev->get_stats = &emac_stats;
ndev->set_multicast_list = &emac_set_multicast_list;
ndev->do_ioctl = &emac_ioctl;
if (emac_phy_supports_gige(dev->phy_mode)) {
ndev->hard_start_xmit = &emac_start_xmit_sg;
ndev->change_mtu = &emac_change_mtu;
dev->commac.ops = &emac_commac_sg_ops;
} else {
ndev->hard_start_xmit = &emac_start_xmit;
}
SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops);
netif_carrier_off(ndev);
netif_stop_queue(ndev);
err = register_netdev(ndev);
if (err) {
printk(KERN_ERR "%s: failed to register net device (%d)!\n",
np->full_name, err);
goto err_detach_tah;
}
init_emac_phy() uses a spinlock that isn't initialized until
register_netdev() is invoked. I tried moving the init_emac_phy() to be
after the register_netdev(). The fix appeared to work on one board
variant (with two Ethernet ports) but kernel panics during boot on
another board variant (with one Etherent port and less memory).
So I have reverted my lame hack attempt and am reporting this so that an
expert can check into it.
The bug normally goes unnoticed until you turn on spinlock and/or
rtmutex debuggging in the kernel config - then the debugging magic
checks will catch it during boot.
This is based on kernel 2.6.25.8-rt7 and then upgraded to be
2.6.25.13-rt7 using incremental patches - running on an AMCC PPC405EP
but I think you could reproduce it using 2.6.25.8-rt7 (or possibly other
kernel versions).
--
Regards,
Darcy
--------------
Darcy L. Watkins - Senior Software Developer
Tranzeo Wireless Technologies, Inc.
19273 Fraser Way, Pitt Meadows, BC, Canada V3Y 2V4
T:604-460-6002 ext:410
http://www.tranzeo.com
^ permalink raw reply
* Re: mpc52xx localplus bus and dm9000
From: Grant Likely @ 2008-08-15 16:30 UTC (permalink / raw)
To: Sinisa Denic; +Cc: linuxppc-dev
In-Reply-To: <WorldClient-F200808141152.AA52170076@abs-cs.com>
On Thu, Aug 14, 2008 at 3:52 AM, Sinisa Denic <sinisa.denic@abs-cs.com> wrote:
> Hi,I have mpc52xx based board very similar to lite5200b.
> There is Davicom DM9000 connected to Local Plus Bus CS0.
> Does anybody have idea how should DTS part look like in order to add this
> resource in system.
> I've written something like this:
>
> lpb {
> device_type = "network";
device_type doesn't make any sense here. Drop this line.
> compatible = "fsl,lpb";
> ranges = <0 0 ff000000 1000000>;
You need to add #address-cells = <2> and #size-cells = <1> properties
to this node. Otherwise the address translation doesn't work. The
local plus bus uses 2 cells to describe address. First cell is the
chip select and second cell is the address offset on the chip select.
The ranges property translates between the global address space to the
local chip select address space. In this case, "0 0" means 0 offset
from chip select 0, and ff000000 is the address it is mapped to on the
parent bus.
>
> dm9000@0,0 {
> compatible = "dm9000";
> reg = <0 0 100000>;
> #size-cells = <1>;
> #address-cells = <1>;
You should not need #address-cells or #size-cells on the child node
because it is not a bus.
> };
> };
>
> but it's not working.
> Is it enough to have right dts record for default dm9000 driver working
> or I have to change something more?
> Thank you in andvance.
>
> Sinisa Denic
> System and software engineer
> tel: +381(0)112016142
> ABS Control Systems
> bul.Zorana Djindjica 8a
> Belgrade,Serbia
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: flash partitioning
From: Scott Wood @ 2008-08-15 15:47 UTC (permalink / raw)
To: liran raz; +Cc: linuxppc-embedded
In-Reply-To: <e3b3ab5c0808150723o5a4ff1f4je677c7a4475f89b7@mail.gmail.com>
On Fri, Aug 15, 2008 at 10:23:29AM -0400, liran raz wrote:
> localbus@f0010100 {
> compatible = "fsl,mpc8272-localbus",
> "fsl,pq2-localbus";
> #address-cells = <2>;
> #size-cells = <1>;
> reg = <f0010100 40>;
>
> ranges = <0 0 fc000000 04000000>;
> };
>
> flash@fc000000 {
> device_type = "rom";
> compatible = "direct-mapped";
> probe-type = "CFI";
> reg = <fc000000 04000000>;
> bank-width = <4>;
> device-width = <2>;
> #address-cells = <1>;
> #size-cells = <1>;
> partitions = <0 200000
> 2000000 a00000
> c000000 a00000
> 16000000 600000
> 1c000000 e00000
> 2a000000 600000
> 30000000 e00000
> 3e000000 100000
> 3f000000 80000
> 3f800000 40000
> 3fc00000 40000>;
> partition-names =
> "part01","part02","part03","part04","part05","part06","part07","part08","part09","part10","part11";
> };
This is an obsolete binding; please use the current one described in
Documentation/powerpc/booting-without-of.txt, and demonstrated in the
current device tree files.
> I can't see the different partitions linked to the /dev/mtd<x>
> devices in the startup messages. When testing the devices
> I see that only /dev/mtd0 is actually linked to the beginning
> of the flash. (other /dev/mtd1 etc.. can't be opened).
> I included below also the relevant startup messages.
> Does anyone have any idea what is wrong with my flash
> configuration format?
> Thanks, Liran.
>
> Linux version: 2.6.24
> Processor: mpc8272
> Startup messages:
> physmap platform flash device: 04000000 at fc000000
> physmap-flash.0: Found 2 x16 devices at 0x0 in 32-bit bank
> Amd/Fujitsu Extended Query Table at 0x0040
> physmap-flash.0: CFI does not contain boot bank location. Assuming top.
> number of CFI chips: 1
> cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
You're using physmap; you need to use physmap_of. You may need to use a
newer kernel, as well.
-Scott
^ permalink raw reply
* Re: [PATCH V2] DTC: Remove support for the legacy DTS source file format.
From: Jon Loeliger @ 2008-08-15 15:44 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, devicetree-discuss
In-Reply-To: <ed82fe3e0808150817k66d6c70fp17774fbd726ea2b2@mail.gmail.com>
> On Thu, Aug 14, 2008 at 7:29 PM, David Gibson
> <david@gibson.dropbear.id.au> wrote:
> > On Thu, Aug 14, 2008 at 06:02:43PM -0500, Jon Loeliger wrote:
> >> Now that all in-kernel-tree DTS files are properly /dts-v1/,
> >> remove direct support for the older, un-numbered DTS
> >> source file format.
> >
> > Um.. why? I just don't see a compelling reason to remove this
> > backwards compatibility. It costs us very little to keep it around
> > indefinitely.
Because we are going to get rid of the cruft, simplify things,
and move forward. Really. This was the plan from the onset.
> I agree, why are we removing backwards compatibility? The dts-v1
> format isn't that old, so I'm sure there are plenty of device trees
> out there, especially on our BSPs, that haven't been updated yet.
They can run the conversion tool and be fine.
> How about just printing a warning and saying that the device tree
> should be updated with the conversion tool?
How about all the in-tree DTS files are already V1?
jdl
^ permalink raw reply
* Re: [PATCH V2] DTC: Remove support for the legacy DTS source file format.
From: Timur Tabi @ 2008-08-15 15:17 UTC (permalink / raw)
To: Jon Loeliger, devicetree-discuss, linuxppc-dev
In-Reply-To: <20080815002936.GA9877@yookeroo.seuss>
On Thu, Aug 14, 2008 at 7:29 PM, David Gibson
<david@gibson.dropbear.id.au> wrote:
> On Thu, Aug 14, 2008 at 06:02:43PM -0500, Jon Loeliger wrote:
>> Now that all in-kernel-tree DTS files are properly /dts-v1/,
>> remove direct support for the older, un-numbered DTS
>> source file format.
>
> Um.. why? I just don't see a compelling reason to remove this
> backwards compatibility. It costs us very little to keep it around
> indefinitely.
I agree, why are we removing backwards compatibility? The dts-v1
format isn't that old, so I'm sure there are plenty of device trees
out there, especially on our BSPs, that haven't been updated yet.
How about just printing a warning and saying that the device tree
should be updated with the conversion tool?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: Linux issues on Xilinx XUPV2P board
From: Jon Loeliger @ 2008-08-15 15:08 UTC (permalink / raw)
To: John Linn; +Cc: alan.casey5, wangyanlong, linuxppc-embedded
In-Reply-To: <20080815145328.670D4C7004F@mail23-sin.bigfish.com>
John Linn wrote:
> Ah I see, sorry about that, misunderstood what was needed.
>
> So there may be other ways as I'm not a Git expert, but I clone the
> repository, then reset to the a Git tag.
>
>> git reset --hard <tag name>
>
> We're working on a new frame buffer driver for a new core, but the old
> frame buffer has not been high priority for us.
>
> Thanks,
> John
While this "Works" in the sense that it makes your working
directory look like the contents of the given tag, you are
now using a "detached HEAD" -- ie, no real branch.
If you think you will ever want to make a change or check
in something, you might be better to create a branch based
on the original tag, perhaps something like:
$ git checkout -b my-v2.6.24 v2.6.24
HTH,
jdl
^ permalink raw reply
* RE: Linux issues on Xilinx XUPV2P board
From: John Linn @ 2008-08-15 14:53 UTC (permalink / raw)
To: alan.casey5, wangyanlong, linuxppc-embedded
In-Reply-To: <48917117000190E8@hawk.dcu.ie>
Ah I see, sorry about that, misunderstood what was needed.
So there may be other ways as I'm not a Git expert, but I clone the
repository, then reset to the a Git tag.
> git reset --hard <tag name>
We're working on a new frame buffer driver for a new core, but the old
frame buffer has not been high priority for us.
Thanks,
John =
> -----Original Message-----
> From: Alan Casey [mailto:alan.casey5@mail.dcu.ie] =
> Sent: Friday, August 15, 2008 8:36 AM
> To: John Linn; wangyanlong; linuxppc-embedded@ozlabs.org
> Subject: RE: Linux issues on Xilinx XUPV2P board
> =
> Hi John,
> =
> Im not having any problems using GIT. I can download
> 2.6.26 using git no problem - i think wangyanlong
> would like to use 2.6.24 or 2.6.26 and he has problems
> downloading it using git - hence i replied to him that
> he may find more info about how to download the current
> or previous version on git.xilinx.com. I think you misread
> my email.
> =
> The Xilinx Framebuffer driver works fine in Linux 2.6.24
> but there appears to be a problem with one of the Linux-2.6.26
> versions which i posted about a few weeks/months ago.
> =
> Alan.
> =
> >-- Original Message --
> >Subject: RE: Linux issues on Xilinx XUPV2P board
> >Date: Fri, 15 Aug 2008 08:30:25 -0600
> >From: John Linn <John.Linn@xilinx.com>
> >To: <alan.casey5@mail.dcu.ie>,
> > "wangyanlong" <killyouatonce@gmail.com>,
> > <linuxppc-embedded@ozlabs.org>
> >
> >
> >Hi Alan,
> >
> >I'm assuming you must not have Git installed from the question,
> >otherwise you would be using git clone as the site shows.
> >
> >On the http://git.xilinx.com, it says the following, =
> >
> >Users without Git installed may create a tar file by using =
> the snapshot
> >feature. Select the tree view of the repository (far right =
> side) on this
> >page, then select snapshot (near the top) and a gziped tar =
> file will be
> >created and downloaded. =
> >
> >Is this what you're looking for?
> >
> >-- John
> >
> >> -----Original Message-----
> >> From: =
> >> linuxppc-embedded-bounces+john.linn=3Dxilinx.com@ozlabs.org =
> >> [mailto:linuxppc-embedded-bounces+john.linn=3Dxilinx.com@ozlabs.
> >> org] On Behalf Of Alan Casey
> >> Sent: Friday, August 15, 2008 6:34 AM
> >> To: wangyanlong; linuxppc-embedded@ozlabs.org
> >> Subject: Re: Linux issues on Xilinx XUPV2P board
> >> =
> >> Hi,
> >> =
> >> I used version 2.6.24. Current version is 2.6.26+ but im
> >> not sure how to download previous versions from the git
> >> tree, there should be some info at http://git.xilinx.com
> >> about how to do this.
> >> =
> >> Regards,
> >> Alan.
> >> =
> >> >-- Original Message --
> >> >Date: Fri, 15 Aug 2008 04:35:01 -0700 (PDT)
> >> >From: wangyanlong <killyouatonce@gmail.com>
> >> >To: linuxppc-embedded@ozlabs.org
> >> >Subject: Re: Linux issues on Xilinx XUPV2P board
> >> >
> >> >
> >> >
> >> >Hi Alan =
> >> > I dow load the kernel from "
> >> >http://git.xilinx.com/cgi-bin/gitweb.cgi?p=3Dlinux-2.6-xlnx.git
> >> ;a=3Dsummary
> >> "
> >> >
> >> >Merge ../../linux-2.6 into 2.6.26-merge master commit | =
> >> commitdiff | tree
> >> >| snapshot
> >> > =
> >> >this version ,but it not work well,which version you downloaded?
> >> >
> >> >Many thanks
> >> >yanlong
> >> > =
> >> >
> >> >Alan Casey wrote:
> >> >> =
> >> >> Hi,
> >> >> =
> >> >> Yes i had a problem with using one of the Linux 2.6.26
> >> >> kernel versions on the XUPV2P board where the VGA
> >> >> display has not driven correctly, not sure why.
> >> >> The Linux 2.6.24 kernel from git.xilinx.com works fine.
> >> >> =
> >> >> Regards,
> >> >> Alan.
> >> >> =
> >> >> =
> >> >>>-- Original Message --
> >> >>>Date: Fri, 15 Aug 2008 01:43:37 -0700 (PDT)
> >> >>>From: wangyanlong <killyouatonce@gmail.com>
> >> >>>To: linuxppc-embedded@ozlabs.org
> >> >>>Subject: Re: Linux issues on Xilinx XUPV2P board
> >> >>>
> >> >>>
> >> >>>
> >> >>>I meet the problem as yours . And my vga's display is not =
> >> clear , have
> >> >> you
> >> >>>meet this?
> >> >>>
> >> >>>Alan Casey wrote:
> >> >>>> =
> >> >>>> Hi,
> >> >>>> =
> >> >>>> I have tried running the Linux 2.6.24 and Linux 2.6.26 =
> >> kernels from
> >> >> =
> >> >>> =
> >> >>>> git.xilinx.com on the Xilinx XUPV2P board but have run =
> >> into a few
> >> >>>> problems.
> >> >>>> =
> >> >>>> Cross-compiler i use to compile applications was built using
> >> >>>> Crosstools
> >> >>>> and
> >> >>>> based on gcc 3.3.4. I use Xilinx EDK 7.1 for =
> >> integrating hardware
> >> >>>> peripherals
> >> >>>> onto the board.
> >> >>>> =
> >> >>>> The problems i've seen are:
> >> >>>> =
> >> >>>> (i) gettimeofday software function returns time of 0 =
> >> all the time.
> >> >>>> =
> >> >>>> (ii) The Linux 2.6.24 kernel's Xilinx Framebuffer =
> >> driver and/or the
> >> >>>> Xilinx
> >> >>>>
> >> >>>> PLB TFT Controller IP block =
> >> (plb_tft_cntlr_ref_v1_00_d) does
> >> not
> >> >>>> appear
> >> >>>> =
> >> >>>> to centre the display on a VGA screen =
> properly(vertically
> >> >>>> offset).
> >> >>>> =
> >> >>>> (iii) 64-bit write/read access to peripheral =
> >> integrated onto the
> >> >>>> Xilinx
> >> >>>> =
> >> >>>> Virtex-II Pro FPGA either causes a system crash =
> >> or only lower
> >> >> part
> >> >>>> =
> >> >>>> of 32-bit data to be written (i.e. lower part of =
> >> 64-bit data
> >> >>>> appears
> >> >>>> to be mirrored on the upper and lower 32-bits of =
> >> the system
> >> >>>> bus).
> >> >>>> However, 32-bit write/read access to the =
> >> peripheral passes as
> >> >> well
> >> >>>> as 64-bit write/read access to the SDRAM memory =
> >> address space.
> >> >>>> Peripheral interface has been verified to be IBM =
> >> PLB compliant
> >> >>>
> >> >>>> via IBM bus functional model simulations. =
> >> >>>> =
> >> >>>> (iv) The Linux 2.6.26 Xilinx Framebuffer driver on =
> >> the Xilinx XUPV2P
> >> >>>> board
> >> >>>> =
> >> >>>> does not appear to be working - nothing displayed to
> >> >>>> screen/console
> >> >>>>
> >> >>>> not switching to framebuffer device on bootup. =
> >> >>>> =
> >> >>>> Just wondering if anybody has seen these issues =
> >> before and know how
> >> >>>to
> >> >>>> resolve them?
> >> >>>> =
> >> >>>> Any info. appreciated,
> >> >>>> Regards,
> >> >>>> Alan.
> >> >>>> =
> >> >>>> =
> >> >>>> =
> >> >>>> =
> >> >>>> _______________________________________________
> >> >>>> Linuxppc-embedded mailing list
> >> >>>> Linuxppc-embedded@ozlabs.org
> >> >>>> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >> >>>> =
> >> >>>> =
> >> >>>
> >> >>>-- =
> >> >>>View this message in context:
> >> >http://www.nabble.com/Linux-issues-on-Xilinx-XUPV2P-board-tp1
> >> 8262250p18995644.html
> >> >>>Sent from the linuxppc-embedded mailing list archive at =
> Nabble.com.
> >> >>>
> >> >>>_______________________________________________
> >> >>>Linuxppc-embedded mailing list
> >> >>>Linuxppc-embedded@ozlabs.org
> >> >>>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >> >> =
> >> >> =
> >> >> _______________________________________________
> >> >> Linuxppc-embedded mailing list
> >> >> Linuxppc-embedded@ozlabs.org
> >> >> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >> >> =
> >> >> =
> >> >
> >> >-- =
> >> >View this message in context: =
> >> http://www.nabble.com/Linux-issues-on-Xilinx-XUPV2P-board-tp18
> >> 262250p18997255.html
> >> >Sent from the linuxppc-embedded mailing list archive at =
> Nabble.com.
> >> >
> >> >_______________________________________________
> >> >Linuxppc-embedded mailing list
> >> >Linuxppc-embedded@ozlabs.org
> >> >https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >> =
> >> =
> >> _______________________________________________
> >> Linuxppc-embedded mailing list
> >> Linuxppc-embedded@ozlabs.org
> >> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >> =
> >> =
> >
> >This email and any attachments are intended for the sole use =
> of the named
> >recipient(s) and contain(s) confidential information that =
> may be proprietary,
> >privileged or copyrighted under applicable law. If you are =
> not the intended
> >recipient, do not read, copy, or forward this email message =
> or any attachments.
> >Delete this email message and any attachments immediately.
> >
> >
> =
> =
> =
> =
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* Re: Linux issues on Xilinx XUPV2P board
From: Alan Casey @ 2008-08-15 14:50 UTC (permalink / raw)
To: wangyanlong, linuxppc-embedded
In-Reply-To: <18999662.post@talk.nabble.com>
Hi,
2.6.24-rc8 was the version i think i used.
2.6.24 should be fine also.
Alan.
>-- Original Message --
>Date: Fri, 15 Aug 2008 07:31:35 -0700 (PDT)
>From: wangyanlong <killyouatonce@gmail.com>
>To: linuxppc-embedded@ozlabs.org
>Subject: Re: Linux issues on Xilinx XUPV2P board
>
>
>
>Hi
> v2.6.24
> v2.6.24-rc8
> v2.6.24-rc7
> v2.6.24-rc6
> v2.6.24-rc5
> v2.6.24-rc4
> v2.6.24-rc3
> v2.6.24-rc2
>many versions, which one ???
>Thanks :)
>
>
>
> v2.6.24-rc1
>
>
>Hi,
>
> I used version 2.6.24. Current version is 2.6.26+ but im
> not sure how to download previous versions from the git
> tree, there should be some info at http://git.xilinx.com
> about how to do this.
>
> Regards,
> Alan.
>
>
>--
>View this message in context: http://www.nabble.com/Linux-issues-on-Xili=
nx-XUPV2P-board-tp18262250p18999662.html
>Sent from the linuxppc-embedded mailing list archive at Nabble.com.
>
>_______________________________________________
>Linuxppc-embedded mailing list
>Linuxppc-embedded@ozlabs.org
>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* RE: Linux issues on Xilinx XUPV2P board
From: Alan Casey @ 2008-08-15 14:36 UTC (permalink / raw)
To: John Linn, wangyanlong, linuxppc-embedded
In-Reply-To: <20080815143027.BD038B0004C@mail24-sin.bigfish.com>
Hi John,
Im not having any problems using GIT. I can download
2.6.26 using git no problem - i think wangyanlong
would like to use 2.6.24 or 2.6.26 and he has problems
downloading it using git - hence i replied to him that
he may find more info about how to download the current
or previous version on git.xilinx.com. I think you misread
my email.
The Xilinx Framebuffer driver works fine in Linux 2.6.24
but there appears to be a problem with one of the Linux-2.6.26
versions which i posted about a few weeks/months ago.
Alan.
>-- Original Message --
>Subject: RE: Linux issues on Xilinx XUPV2P board
>Date: Fri, 15 Aug 2008 08:30:25 -0600
>From: John Linn <John.Linn@xilinx.com>
>To: <alan.casey5@mail.dcu.ie>,
> "wangyanlong" <killyouatonce@gmail.com>,
> <linuxppc-embedded@ozlabs.org>
>
>
>Hi Alan,
>
>I'm assuming you must not have Git installed from the question,
>otherwise you would be using git clone as the site shows.
>
>On the http://git.xilinx.com, it says the following,
>
>Users without Git installed may create a tar file by using the snapshot
>feature. Select the tree view of the repository (far right side) on this=
>page, then select snapshot (near the top) and a gziped tar file will be
>created and downloaded.
>
>Is this what you're looking for?
>
>-- John
>
>> -----Original Message-----
>> From:
>> linuxppc-embedded-bounces+john.linn=3Dxilinx.com@ozlabs.org
>> [mailto:linuxppc-embedded-bounces+john.linn=3Dxilinx.com@ozlabs.
>> org] On Behalf Of Alan Casey
>> Sent: Friday, August 15, 2008 6:34 AM
>> To: wangyanlong; linuxppc-embedded@ozlabs.org
>> Subject: Re: Linux issues on Xilinx XUPV2P board
>>
>> Hi,
>>
>> I used version 2.6.24. Current version is 2.6.26+ but im
>> not sure how to download previous versions from the git
>> tree, there should be some info at http://git.xilinx.com
>> about how to do this.
>>
>> Regards,
>> Alan.
>>
>> >-- Original Message --
>> >Date: Fri, 15 Aug 2008 04:35:01 -0700 (PDT)
>> >From: wangyanlong <killyouatonce@gmail.com>
>> >To: linuxppc-embedded@ozlabs.org
>> >Subject: Re: Linux issues on Xilinx XUPV2P board
>> >
>> >
>> >
>> >Hi Alan
>> > I dow load the kernel from "
>> >http://git.xilinx.com/cgi-bin/gitweb.cgi?p=3Dlinux-2.6-xlnx.git
>> ;a=3Dsummary
>> "
>> >
>> >Merge ../../linux-2.6 into 2.6.26-merge master commit |
>> commitdiff | tree
>> >| snapshot
>> >
>> >this version ,but it not work well,which version you downloaded?
>> >
>> >Many thanks
>> >yanlong
>> >
>> >
>> >Alan Casey wrote:
>> >>
>> >> Hi,
>> >>
>> >> Yes i had a problem with using one of the Linux 2.6.26
>> >> kernel versions on the XUPV2P board where the VGA
>> >> display has not driven correctly, not sure why.
>> >> The Linux 2.6.24 kernel from git.xilinx.com works fine.
>> >>
>> >> Regards,
>> >> Alan.
>> >>
>> >>
>> >>>-- Original Message --
>> >>>Date: Fri, 15 Aug 2008 01:43:37 -0700 (PDT)
>> >>>From: wangyanlong <killyouatonce@gmail.com>
>> >>>To: linuxppc-embedded@ozlabs.org
>> >>>Subject: Re: Linux issues on Xilinx XUPV2P board
>> >>>
>> >>>
>> >>>
>> >>>I meet the problem as yours . And my vga's display is not
>> clear , have
>> >> you
>> >>>meet this?
>> >>>
>> >>>Alan Casey wrote:
>> >>>>
>> >>>> Hi,
>> >>>>
>> >>>> I have tried running the Linux 2.6.24 and Linux 2.6.26
>> kernels from
>> >>
>> >>>
>> >>>> git.xilinx.com on the Xilinx XUPV2P board but have run
>> into a few
>> >>>> problems.
>> >>>>
>> >>>> Cross-compiler i use to compile applications was built using
>> >>>> Crosstools
>> >>>> and
>> >>>> based on gcc 3.3.4. I use Xilinx EDK 7.1 for
>> integrating hardware
>> >>>> peripherals
>> >>>> onto the board.
>> >>>>
>> >>>> The problems i've seen are:
>> >>>>
>> >>>> (i) gettimeofday software function returns time of 0
>> all the time.
>> >>>>
>> >>>> (ii) The Linux 2.6.24 kernel's Xilinx Framebuffer
>> driver and/or the
>> >>>> Xilinx
>> >>>>
>> >>>> PLB TFT Controller IP block
>> (plb_tft_cntlr_ref_v1_00_d) does
>> not
>> >>>> appear
>> >>>>
>> >>>> to centre the display on a VGA screen properly(vertically
>> >>>> offset).
>> >>>>
>> >>>> (iii) 64-bit write/read access to peripheral
>> integrated onto the
>> >>>> Xilinx
>> >>>>
>> >>>> Virtex-II Pro FPGA either causes a system crash
>> or only lower
>> >> part
>> >>>>
>> >>>> of 32-bit data to be written (i.e. lower part of
>> 64-bit data
>> >>>> appears
>> >>>> to be mirrored on the upper and lower 32-bits of
>> the system
>> >>>> bus).
>> >>>> However, 32-bit write/read access to the
>> peripheral passes as
>> >> well
>> >>>> as 64-bit write/read access to the SDRAM memory
>> address space.
>> >>>> Peripheral interface has been verified to be IBM
>> PLB compliant
>> >>>
>> >>>> via IBM bus functional model simulations.
>> >>>>
>> >>>> (iv) The Linux 2.6.26 Xilinx Framebuffer driver on
>> the Xilinx XUPV2P
>> >>>> board
>> >>>>
>> >>>> does not appear to be working - nothing displayed to
>> >>>> screen/console
>> >>>>
>> >>>> not switching to framebuffer device on bootup.
>> >>>>
>> >>>> Just wondering if anybody has seen these issues
>> before and know how
>> >>>to
>> >>>> resolve them?
>> >>>>
>> >>>> Any info. appreciated,
>> >>>> Regards,
>> >>>> Alan.
>> >>>>
>> >>>>
>> >>>>
>> >>>>
>> >>>> _______________________________________________
>> >>>> Linuxppc-embedded mailing list
>> >>>> Linuxppc-embedded@ozlabs.org
>> >>>> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>> >>>>
>> >>>>
>> >>>
>> >>>--
>> >>>View this message in context:
>> >http://www.nabble.com/Linux-issues-on-Xilinx-XUPV2P-board-tp1
>> 8262250p18995644.html
>> >>>Sent from the linuxppc-embedded mailing list archive at Nabble.com.=
>> >>>
>> >>>_______________________________________________
>> >>>Linuxppc-embedded mailing list
>> >>>Linuxppc-embedded@ozlabs.org
>> >>>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>> >>
>> >>
>> >> _______________________________________________
>> >> Linuxppc-embedded mailing list
>> >> Linuxppc-embedded@ozlabs.org
>> >> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>> >>
>> >>
>> >
>> >--
>> >View this message in context:
>> http://www.nabble.com/Linux-issues-on-Xilinx-XUPV2P-board-tp18
>> 262250p18997255.html
>> >Sent from the linuxppc-embedded mailing list archive at Nabble.com.
>> >
>> >_______________________________________________
>> >Linuxppc-embedded mailing list
>> >Linuxppc-embedded@ozlabs.org
>> >https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>>
>>
>> _______________________________________________
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>>
>>
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