* Re: powerpc allnoconfig
From: Andrew Morton @ 2009-03-03 2:40 UTC (permalink / raw)
To: Michael Neuling; +Cc: linuxppc-dev
In-Reply-To: <12051.1236047470@neuling.org>
On Tue, 03 Mar 2009 13:31:10 +1100 Michael Neuling <mikey@neuling.org> wrote:
> > make mrproper
> > make allnoconfig
> > make vmlinux
> >
> > gives:
> >
> > scripts/kconfig/conf -s arch/powerpc/Kconfig
> > CHK include/linux/version.h
> > UPD include/linux/version.h
> > CHK include/linux/utsrelease.h
> > UPD include/linux/utsrelease.h
> > SYMLINK include/asm -> include/asm-powerpc
> > HOSTCC scripts/ihex2fw
> > HOSTCC scripts/kallsyms
> > HOSTCC scripts/conmakehash
> > CC scripts/mod/empty.o
> > HOSTCC scripts/mod/mk_elfconfig
> > scripts/mod/empty.c:1: error: -m64 requires a PowerPC64 cpu
> > make[2]: *** [scripts/mod/empty.o] Error 1
> > make[2]: *** Waiting for unfinished jobs....
> > make[1]: *** [scripts/mod] Error 2
> > make[1]: *** Waiting for unfinished jobs....
> > make: *** [scripts] Error 2
>
> I can't replicate this with Linus' latest tree with gcc 4.3 or 4.0.
ho hum.
> What's your tool chain? Does it compile 32 or 64bit by default?
It's a cross-compiler: http://userweb.kernel.org/~akpm/cross-compilers/
Here's a `make V=1':
rm -f include/config/kernel.release
echo 2.6.29-rc6 > include/config/kernel.release
set -e; : ' CHK include/linux/version.h'; mkdir -p include/linux/; (echo \#define LINUX_VERSION_CODE 132637; echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))';) < /usr/src/25/Makefile > include/linux/version.h.tmp; if [ -r include/linux/version.h ] && cmp -s include/linux/version.h include/linux/version.h.tmp; then rm -f include/linux/version.h.tmp; else : ' UPD include/linux/version.h'; mv -f include/linux/version.h.tmp include/linux/version.h; fi
set -e; : ' CHK include/linux/utsrelease.h'; mkdir -p include/linux/; if [ `echo -n "2.6.29-rc6" | wc -c ` -gt 64 ]; then echo '"2.6.29-rc6" exceeds 64 characters' >&2; exit 1; fi; (echo \#define UTS_RELEASE \"2.6.29-rc6\";) < include/config/kernel.release > include/linux/utsrelease.h.tmp; if [ -r include/linux/utsrelease.h ] && cmp -s include/linux/utsrelease.h include/linux/utsrelease.h.tmp; then rm -f include/linux/utsrelease.h.tmp; else : ' UPD include/linux/utsrelease.h'; mv -f include/linux/utsrelease.h.tmp include/linux/utsrelease.h; fi
set -e; if [ -L include/asm ]; then asmlink=`readlink include/asm | cut -d '-' -f 2`; if [ "$asmlink" != "powerpc" ]; then echo "ERROR: the symlink include/asm points to asm-$asmlink but asm-powerpc was expected"; echo " set ARCH or save .config and run 'make mrproper' to fix it"; exit 1; fi; test -e $asmlink || rm include/asm; elif [ -d include/asm ]; then echo "ERROR: include/asm is a directory but a symlink was expected"; exit 1; fi
make -f scripts/Makefile.build obj=scripts/basic
if [ ! -L include/asm ]; then : ' SYMLINK include/asm -> include/asm-powerpc'; if [ ! -d include/asm-powerpc ]; then mkdir -p include/asm-powerpc; fi; ln -fsn asm-powerpc include/asm; fi
mkdir -p .tmp_versions
make -f scripts/Makefile.build obj=scripts
make -f scripts/Makefile.build obj=scripts/mod
/opt/crosstool/gcc-4.1.0-glibc-2.3.6/powerpc64-unknown-linux-gnu/bin/powerpc64-unknown-linux-gnu-gcc -Wp,-MD,scripts/mod/.empty.o.d -nostdinc -isystem /opt/crosstool/gcc-4.1.0-glibc-2.3.6/powerpc64-unknown-linux-gnu/lib/gcc/powerpc64-unknown-linux-gnu/4.1.0/./include -Iinclude -I/usr/src/25/arch/powerpc/include -include include/linux/autoconf.h -D__KERNEL__ -Iarch/powerpc -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -O2 -msoft-float -pipe -Iarch/powerpc -ffixed-r2 -mmultiple -mno-altivec -mno-spe -mspe=no -funit-at-a-time -mno-string -mcpu=powerpc -Wa,-maltivec -fno-stack-protector -fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(empty)" -D"KBUILD_MODNAME=KBUILD_STR(empty)" -c -o scripts/mod/empty.o scripts/mod/empty.c
scripts/mod/empty.c:1: error: -m64 requires a PowerPC64 cpu
make[2]: *** [scripts/mod/empty.o] Error 1
make[1]: *** [scripts/mod] Error 2
make: *** [scripts] Error 2
**FAILED**
^ permalink raw reply
* Re: powerpc allnoconfig
From: Michael Neuling @ 2009-03-03 2:31 UTC (permalink / raw)
To: Andrew Morton; +Cc: linuxppc-dev
In-Reply-To: <20090302171948.d1e2aa00.akpm@linux-foundation.org>
> make mrproper
> make allnoconfig
> make vmlinux
>
> gives:
>
> scripts/kconfig/conf -s arch/powerpc/Kconfig
> CHK include/linux/version.h
> UPD include/linux/version.h
> CHK include/linux/utsrelease.h
> UPD include/linux/utsrelease.h
> SYMLINK include/asm -> include/asm-powerpc
> HOSTCC scripts/ihex2fw
> HOSTCC scripts/kallsyms
> HOSTCC scripts/conmakehash
> CC scripts/mod/empty.o
> HOSTCC scripts/mod/mk_elfconfig
> scripts/mod/empty.c:1: error: -m64 requires a PowerPC64 cpu
> make[2]: *** [scripts/mod/empty.o] Error 1
> make[2]: *** Waiting for unfinished jobs....
> make[1]: *** [scripts/mod] Error 2
> make[1]: *** Waiting for unfinished jobs....
> make: *** [scripts] Error 2
I can't replicate this with Linus' latest tree with gcc 4.3 or 4.0.
What's your tool chain? Does it compile 32 or 64bit by default?
Mikey
^ permalink raw reply
* Re: [PATCH] powerpc: add defintion for MSR[GS] to list of MSR bits
From: Timur Tabi @ 2009-03-03 2:16 UTC (permalink / raw)
To: Michael Neuling; +Cc: linuxppc-dev
In-Reply-To: <3431.1236042121@neuling.org>
Michael Neuling wrote:
>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>
> Shouldn't this be in reg_booke.h?
Yes, you're right.
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* powerpc allnoconfig
From: Andrew Morton @ 2009-03-03 1:19 UTC (permalink / raw)
To: linuxppc-dev
make mrproper
make allnoconfig
make vmlinux
gives:
scripts/kconfig/conf -s arch/powerpc/Kconfig
CHK include/linux/version.h
UPD include/linux/version.h
CHK include/linux/utsrelease.h
UPD include/linux/utsrelease.h
SYMLINK include/asm -> include/asm-powerpc
HOSTCC scripts/ihex2fw
HOSTCC scripts/kallsyms
HOSTCC scripts/conmakehash
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
scripts/mod/empty.c:1: error: -m64 requires a PowerPC64 cpu
make[2]: *** [scripts/mod/empty.o] Error 1
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [scripts/mod] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [scripts] Error 2
^ permalink raw reply
* Re: [PATCH] powerpc: add defintion for MSR[GS] to list of MSR bits
From: Michael Neuling @ 2009-03-03 1:02 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1236018001-3206-1-git-send-email-timur@freescale.com>
> Add macros for the GS (guest state) bit to the list of MSR bit definitions.
> On PowerPC cores that support embedded hypervisor mode, GS is cleared if
> the system is running in hypervisor state (and MSR[PR] is cleared), and set
> if it's running in guest state. See the Power ISA 2.06 specification for
> more information.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/include/asm/reg.h | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
Shouldn't this be in reg_booke.h?
Mikey
> index c6d1ab6..ca5c7f8 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -29,6 +29,7 @@
> #define MSR_SF_LG 63 /* Enable 64 bit mode */
> #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
> #define MSR_HV_LG 60 /* Hypervisor state */
> +#define MSR_GS_LG 28 /* Guest state */
> #define MSR_VEC_LG 25 /* Enable AltiVec */
> #define MSR_VSX_LG 23 /* Enable VSX */
> #define MSR_POW_LG 18 /* Enable Power Management */
> @@ -71,6 +72,7 @@
> #define MSR_HV 0
> #endif
>
> +#define MSR_GS __MASK(MSR_GS_LG) /* Guest state */
> #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */
> #define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */
> #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Managem
ent */
> --
> 1.5.5
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
^ permalink raw reply
* DTS format for direct SGMII TSEC link?
From: Aaron Pace @ 2009-03-02 22:09 UTC (permalink / raw)
To: linuxppc-dev
Hello,
I am working with a Freescale 8572 board which uses direct SGMII
connections (no real PHY) for three of the four TSECs. I have been
trying to figure out the appropriate DTS elements to set this up, but
haven't yet managed to figure it out. Everything works great in
u-boot, so I know that the connections & hardware are functional.
I've tried setting up dummy physical phys, using only the tbi-phy, and
using the 'fixed-link' property, none of which have achieved the
desired result.
I realize I'm taking the lazy way out by not digging into the gianfar
code, but I was hoping that this problem had already been seen and
addressed and could be handled with the right text in the DTS file.
Thanks,
Aaron Pace
^ permalink raw reply
* [PATCH] powerpc: add defintion for MSR[GS] to list of MSR bits
From: Timur Tabi @ 2009-03-02 18:20 UTC (permalink / raw)
To: linuxppc-dev, benh
Add macros for the GS (guest state) bit to the list of MSR bit definitions.
On PowerPC cores that support embedded hypervisor mode, GS is cleared if
the system is running in hypervisor state (and MSR[PR] is cleared), and set
if it's running in guest state. See the Power ISA 2.06 specification for
more information.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/include/asm/reg.h | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c6d1ab6..ca5c7f8 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -29,6 +29,7 @@
#define MSR_SF_LG 63 /* Enable 64 bit mode */
#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
#define MSR_HV_LG 60 /* Hypervisor state */
+#define MSR_GS_LG 28 /* Guest state */
#define MSR_VEC_LG 25 /* Enable AltiVec */
#define MSR_VSX_LG 23 /* Enable VSX */
#define MSR_POW_LG 18 /* Enable Power Management */
@@ -71,6 +72,7 @@
#define MSR_HV 0
#endif
+#define MSR_GS __MASK(MSR_GS_LG) /* Guest state */
#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */
#define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */
#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */
--
1.5.5
^ permalink raw reply related
* Re: [PATCH] Add MPC52xx simple interrupt GPIO support
From: Grant Likely @ 2009-03-02 17:45 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, Roman Fietze
In-Reply-To: <20090302171610.GA19984@oksana.dev.rtsoft.ru>
On Mon, Mar 2, 2009 at 10:16 AM, Anton Vorontsov
<avorontsov@ru.mvista.com> wrote:
> On Thu, Feb 26, 2009 at 10:06:59PM -0700, Grant Likely wrote:
>> =A0Maybe something like:
>>
>> struct of_gpio_chip {
>> =A0 =A0 =A0 =A0 int gpio_cells;
>> =A0 =A0 =A0 =A0 int (*xlate)(struct of_gpio_chip *of_gc, struct device_n=
ode *np,
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0const void *gpio_spec, enum o=
f_gpio_flags *flags);
>> =A0 =A0 =A0 =A0 struct gpio_chip gc[1];
>> };
>
> I'd suggest to not touch of_gpio_chip structure, I'd like to keep
> of_gpio_chip struct 1:1 bound to a pure gpio_chip structure. This keeps
> things simple and understandable on the low level.
>
> And when you need several gpio controllers bound to some Linux struct,
> I would rather suggest this:
>
> struct mpc5200_gpio_controller {
> =A0 =A0 =A0 =A0void __iomem *regs;
> =A0 =A0 =A0 =A0void (*save_regs)(struct of_mm_gpio_chip *mm_gc);
> =A0 =A0 =A0 =A0struct of_gpio_chip of_gc[1];
> };
>
> In the of_gc->xlate callback you'll always get &of_gc[0], but since you
> know that this is mpc5200 controller, you can add needed offset depending
> on gpio_spec.
Fair enough. That works too.
> OTOH, there is even more straightforward solution, all you actually need
> is to define "HW GPIO" bindings (which are wkup, which are interrupt, etc=
.),
> and then:
>
> void mpc5200_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)
> {
> =A0 =A0 =A0 =A0if (mpc5200_is_wkup(gpio))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0write to the wkup registers block;
> =A0 =A0 =A0 =A0else if (mpc5200_is_int(gpio))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0write to the int registers block;
> =A0 =A0 =A0 =A0else
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0...
> }
>
> That is, the same thing we do for the interrupt controllers.
Ugh, I'd really do not want to use this approach. The GPIOs path is
too long as is. When GPIOs are used for things like JTAG or other bus
emulation, every cycle counts. As much as possible the long path,
such as figuring out which chip, should be preprocessed so that it is
already known by the time the set/get/direction hooks are called.
IRQ controllers typically need to deal with far lower frequencies on
the IRQ line.
>
> (Note that these "if"s can be replaced by a table, as in
> arch/powerpc/sysdev/qe_lib/qe_ic.c).
Even with the table it is a cost I don't want in the GPIO handler. If
it were possible to do so, I'd even like to remove the spinlocks from
the hooks, but that isn't an option at the moment.
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] Add MPC52xx simple interrupt GPIO support
From: Anton Vorontsov @ 2009-03-02 17:16 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Roman Fietze
In-Reply-To: <fa686aa40902262106i2176f06ew7ab0f870119a8e04@mail.gmail.com>
On Thu, Feb 26, 2009 at 10:06:59PM -0700, Grant Likely wrote:
> Hi Roman,
>
> Thanks for this work. Comments below.
>
> On Thu, Feb 26, 2009 at 7:24 AM, Roman Fietze
> <roman.fietze@telemotive.de> wrote:
> > Hello,
> >
> > I've got a target derived from the Lite5200 that needs to use simple
> > interrupt GPIO pins. I created a patch to support this kind of GPIO.
> >
> > I would need your opinion and like to hear any criticism. Esp. the
> > facts that I ad to split up struct mpc52xx_gpio and that the GPIO
> > numbering might get mixed up concern me.
>
> While I understand why this patch is written the way it is, I don't
> think it is the right approach.
>
> This patch changes the mpc5200 gpio binding to adapt to a Linux
> internal implementation detail. Specifically, the of_mm
> infrastructure only allows a 1:1 relationship between a 'struct
> of_gpio_chip' and a 'struct gpio_chip'. When working with device
> trees, this is the wrong way around. The device tree describes the
> hardware, not the Linux implementation details.
>
> An argument could be made that the current binding isn't ideal and
> that it would be better to split the simple, interrupt and output-only
> gpio pins into separate nodes, but that pretty much comes down to a
> matter of opinion as the existing binding describes the hardware just
> fine. I'm actually of the opinion that it would be better to fewer
> gpio nodes, not more, by merging the simple and wakeup pins into a
> single node, but what's done is done and there is no technical reason
> for changing the current binding.
>
> So, that leaves the problem working with the of_mm infrastructure. I
> think the correct solution is to modify of_gpio_chip to hold an array
> of struct gpio_chip and to change of_gpio_simple_xlate() to handle it.
> Maybe something like:
>
> struct of_gpio_chip {
> int gpio_cells;
> int (*xlate)(struct of_gpio_chip *of_gc, struct device_node *np,
> const void *gpio_spec, enum of_gpio_flags *flags);
> struct gpio_chip gc[1];
> };
I'd suggest to not touch of_gpio_chip structure, I'd like to keep
of_gpio_chip struct 1:1 bound to a pure gpio_chip structure. This keeps
things simple and understandable on the low level.
And when you need several gpio controllers bound to some Linux struct,
I would rather suggest this:
struct mpc5200_gpio_controller {
void __iomem *regs;
void (*save_regs)(struct of_mm_gpio_chip *mm_gc);
struct of_gpio_chip of_gc[1];
};
In the of_gc->xlate callback you'll always get &of_gc[0], but since you
know that this is mpc5200 controller, you can add needed offset depending
on gpio_spec.
(s/mpc5200/of_multi_mm/ or something like this, if you'll manage to
do this for the general case.)
OTOH, there is even more straightforward solution, all you actually need
is to define "HW GPIO" bindings (which are wkup, which are interrupt, etc.),
and then:
void mpc5200_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)
{
if (mpc5200_is_wkup(gpio))
write to the wkup registers block;
else if (mpc5200_is_int(gpio))
write to the int registers block;
else
...
}
That is, the same thing we do for the interrupt controllers.
(Note that these "if"s can be replaced by a table, as in
arch/powerpc/sysdev/qe_lib/qe_ic.c).
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: PHY not found after migration of gianfar driver to an of_platform_driver
From: Grant Likely @ 2009-03-02 15:08 UTC (permalink / raw)
To: Michael Guntsche; +Cc: linuxppc-dev
In-Reply-To: <c19541729a7d99548faadbabe5c7646c@localhost>
On Mon, Mar 2, 2009 at 4:58 AM, Michael Guntsche <mike@it-loops.com> wrote:
> On Sun, 1 Mar 2009 18:15:32 -0700, Grant Likely <grant.likely@secretlab.c=
a>
> wrote:
>>
>> So, what you need is a new adapter which parses the data passed in by
>> routerboot (maybe call it routerImage?) and modifies the .dtb blob to
>> match. =A0You can use simpleImage as a starting point.
> I had a look at that. And this is what I understood so-far.
> SimpleImage just takes the dtb from the segment and parses it as the new
> device tree.
>
> =A0_dtb_start =3D .;
> =A0.kernel:dtb : { *(.kernel:dtb) }
> =A0_dtb_end =3D .;
>
> No I do understand that dtb_start points to this device tree. I also know
> that the standard kernel boot-process
> is able to read he device tree out of the firmware/bootloader (it works i=
f
> I just put with a standard kernel image)
Only if the firmware supports passing in a device tree. Many embedded
firmwares do not, in which case the .dtb must be linked into the
bootwrapper statically.
> but I cannot figure out, where
> exactly (in the code) it is doing that.
Every bootwrapper image (simpleBoot, zImage, cuImage, etc. uImage is
the exception; it doesn't use the bootwarpper) has a function called
platform_init() with the arguments r3, r4, r5, r6, and r7 which hold
the values of those registers when the bootwrapper is called.
platform_init() is called by crt0.S before calling the 'start()' entry
point in main.c and one purpose of it is to adapt the information
available about the board into the device tree.
platform_init is different for each kind of bootwrapper image. In
simpleboot.c, r3-r7 are simply ignored. In a cuImage, a pointer to
the bd_info structure is retrieved from r3 (cuboot.h).
> My problem is now that I have zero
> documentation of the existing bootloader. All I know is that the prom cod=
e
> is able to find and parse it.
> So now my question, is there a way to get to the device tree at this stag=
e
> of the boot process?
You mean like loading it of the CF or something? Yeah, I suppose so
if you wrote a minimal CF driver, but that seems the hard way around
also. You're far better off to statically link in a .dtb image and
modify it. If the bootloader doesn't provide you with any useful
information, you can read the SoC registers to detect memory size and
clock rate. If you're lucky, the bootloader will have already
assigned the correct MAC addresses for you and you can read those out
also.
You can also try inspecting the memory pointed to by r3-r7 and seeing
if any of them point to something interesting.
>>> Can't I just add them in the rbppc.c specific init stuff
> programmatically
>>> withouth a DTS file?
>>
>> You need a device tree. =A0You could theoretically generate the entire
>> tree programmatically, but that is the long way around. =A0What you want
>> is a base .dts file and a new bootwrapper to fill in the missing bits
>> at boot time.
>
> Well the board already provides a device tree so all I would need is the
> missing entries so the PHYs are detected correctly. So I would modify an
> existing tree.
Oh. So routerboot does understand dtb blobs? Okay, I didn't
understand that. Yes, you can call the libfdt functions in your
platform_init() to add the missing nodes.
Cheers,
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: Please pull 'next' branch
From: Josh Boyer @ 2009-03-02 13:25 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
In-Reply-To: <20090224140800.GA2323@yoda.jdub.homelinux.org>
On Tue, Feb 24, 2009 at 09:08:00AM -0500, Josh Boyer wrote:
>Hi Ben,
>
>Please pull the next branch of the 4xx tree. It has a few small commits
>for 2.6.30, as well as the 256K page size patch for 44x.
Ben, ping?
josh
^ permalink raw reply
* Re: PHY not found after migration of gianfar driver to an of_platform_driver
From: Michael Guntsche @ 2009-03-02 11:58 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40903011715u2aed4c23tb8182634fa1220f6@mail.gmail.com>
On Sun, 1 Mar 2009 18:15:32 -0700, Grant Likely <grant.likely@secretlab.ca>
wrote:
>
> So, what you need is a new adapter which parses the data passed in by
> routerboot (maybe call it routerImage?) and modifies the .dtb blob to
> match. You can use simpleImage as a starting point.
I had a look at that. And this is what I understood so-far.
SimpleImage just takes the dtb from the segment and parses it as the new
device tree.
_dtb_start = .;
.kernel:dtb : { *(.kernel:dtb) }
_dtb_end = .;
No I do understand that dtb_start points to this device tree. I also know
that the standard kernel boot-process
is able to read he device tree out of the firmware/bootloader (it works if
I just put with a standard kernel image) but I cannot figure out, where
exactly (in the code) it is doing that. My problem is now that I have zero
documentation of the existing bootloader. All I know is that the prom code
is able to find and parse it.
So now my question, is there a way to get to the device tree at this stage
of the boot process?
>> Can't I just add them in the rbppc.c specific init stuff
programmatically
>> withouth a DTS file?
>
> You need a device tree. You could theoretically generate the entire
> tree programmatically, but that is the long way around. What you want
> is a base .dts file and a new bootwrapper to fill in the missing bits
> at boot time.
Well the board already provides a device tree so all I would need is the
missing entries so the PHYs are detected correctly. So I would modify an
existing tree.
thanks for your help,
Michael
^ permalink raw reply
* Re: [rtc-linux] Re: [PATCH/RFC 0/5] Generic RTC class driver
From: Alessandro Zummo @ 2009-03-02 11:09 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux/m68k, Richard Zidlicky, rtc-linux, linux-parisc,
Development, David, Kyle McMartin, Linux/PPC Development, Linux,
Woodhouse
In-Reply-To: <alpine.LRH.2.00.0903021116450.25117@vixen.sonytel.be>
On Mon, 2 Mar 2009 11:28:01 +0100 (CET)
Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> wrote:
> So I can solve my problem (autoloading the RTC driver on PS3 by udev) by
> converting the old genrtc driver into a platform device driver and creating
> platform devices where appropriate.
yes. btw, if you are building a kernel specific for the PS3, I would
compile the rtc driver statically, otherwise it won't be available
early on boot.
> However, this doesn't solve the distro's problem: as the old RTC framework
> depends on RTC_LIB=n, you cannot have both old and new RTC drivers in your
> (single) distro kernel. That's why dmwm2 created drivers/rtc/rtc-ppc.c: Fedora
> had to support machines with both old and new RTC drivers. As all of the old
> drivers are actually behind the ppc_md.[sg]et_rtc_time() abstraction, this was
> very easy.
ok, generic kernel. you will have to load the modules on initrd. no, sadly you
can't have both of them. you might stick with the old interface or
convert them all.
> Hence it's all or nothing, and we have to convert all of them.
>
> drivers/rtc/rtc-generic.c would allow to have a working system without old
> RTC drivers, until all low-level code has been converted to individual RTC
> drivers.
I know but I have enough experience to foresee that once a generic over generic
framework is in place it's very hard to get rid of it because people
will have no incentives.
If you really need rtc-generic you can keep using it even if it's
not in the kernel, distributions often have their specific
set of kernel patches.
But I'd strongly suggest to plan and execute a conversion process.
> > Layering a generic framework over another generic framework
> > is quite a nonsense .
>
> IMHO these two generic frameworks are quite different: [sg]et_rtc_time()
> abstracts the low-level RTC hardware interface, while RTC class handles the
> interaction with userspace.
When I wrote it my intention was to make it as an abstraction _between_
the userspace and the hardware according to the platform/device model.
--
Best regards,
Alessandro Zummo,
Tower Technologies - Torino, Italy
http://www.towertech.it
^ permalink raw reply
* Re: [rtc-linux] Re: [PATCH/RFC 0/5] Generic RTC class driver
From: Geert Uytterhoeven @ 2009-03-02 10:28 UTC (permalink / raw)
To: Alessandro Zummo
Cc: Linux/m68k, Richard Zidlicky, rtc-linux, linux-parisc, David,
Linux Kernel Development, Kyle McMartin, Linux/PPC Development,
David Woodhouse
In-Reply-To: <20090302110310.35af50ea@i1501.lan.towertech.it>
On Mon, 2 Mar 2009, Alessandro Zummo wrote:
> On Mon, 2 Mar 2009 10:54:14 +0100 (CET)
> Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> wrote:
> > Indeed. You can have a working RTC class driver for lots of hardware by just
> > writing ca. 100 lines of code on top of the generic framework.
>
> That's true, but we would then have two generic frameworks. And one
> of them will have its code scattered all around the kernel.
>
> So you either use the old rtc framework, which is perfectly functional,
> or you move to the new rtc lass and write the drivers.
So I can solve my problem (autoloading the RTC driver on PS3 by udev) by
converting the old genrtc driver into a platform device driver and creating
platform devices where appropriate.
However, this doesn't solve the distro's problem: as the old RTC framework
depends on RTC_LIB=n, you cannot have both old and new RTC drivers in your
(single) distro kernel. That's why dmwm2 created drivers/rtc/rtc-ppc.c: Fedora
had to support machines with both old and new RTC drivers. As all of the old
drivers are actually behind the ppc_md.[sg]et_rtc_time() abstraction, this was
very easy.
Hence it's all or nothing, and we have to convert all of them.
drivers/rtc/rtc-generic.c would allow to have a working system without old
RTC drivers, until all low-level code has been converted to individual RTC
drivers.
> Layering a generic framework over another generic framework
> is quite a nonsense .
IMHO these two generic frameworks are quite different: [sg]et_rtc_time()
abstracts the low-level RTC hardware interface, while RTC class handles the
interaction with userspace.
With kind regards,
Geert Uytterhoeven
Software Architect
Sony Techsoft Centre Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
Phone: +32 (0)2 700 8453
Fax: +32 (0)2 700 8622
E-mail: Geert.Uytterhoeven@sonycom.com
Internet: http://www.sony-europe.com/
A division of Sony Europe (Belgium) N.V.
VAT BE 0413.825.160 · RPR Brussels
Fortis · BIC GEBABEBB · IBAN BE41293037680010
^ permalink raw reply
* Re: [rtc-linux] Re: [PATCH/RFC 0/5] Generic RTC class driver
From: Alessandro Zummo @ 2009-03-02 10:03 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux/m68k, Richard Zidlicky, rtc-linux, linux-parisc,
Development, David, Kyle McMartin, Linux/PPC Development, Linux,
David, Woodhouse
In-Reply-To: <alpine.LRH.2.00.0903021051040.25117@vixen.sonytel.be>
On Mon, 2 Mar 2009 10:54:14 +0100 (CET)
Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> wrote:
> Indeed. You can have a working RTC class driver for lots of hardware by just
> writing ca. 100 lines of code on top of the generic framework.
That's true, but we would then have two generic frameworks. And one
of them will have its code scattered all around the kernel.
So you either use the old rtc framework, which is perfectly functional,
or you move to the new rtc lass and write the drivers.
Layering a generic framework over another generic framework
is quite a nonsense .
--
Best regards,
Alessandro Zummo,
Tower Technologies - Torino, Italy
http://www.towertech.it
^ permalink raw reply
* Re: [rtc-linux] Re: [PATCH/RFC 0/5] Generic RTC class driver
From: Geert Uytterhoeven @ 2009-03-02 9:54 UTC (permalink / raw)
To: Richard Zidlicky
Cc: Linux/m68k, Alessandro Zummo, rtc-linux, linux-parisc, David,
Linux Kernel Development, Kyle McMartin, Linux/PPC Development,
David Woodhouse
In-Reply-To: <20090227185514.GA1071@linux-m68k.org>
On Fri, 27 Feb 2009, Richard Zidlicky wrote:
> On Wed, Feb 25, 2009 at 11:18:36AM +0100, Alessandro Zummo wrote:
> > On Wed, 25 Feb 2009 11:00:13 +0100 (CET)
> > Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> wrote:
> >
> > > I didn't know NTP was broken with RTC class drivers?
> > >
> > > So we should actually keep on using genrtc instead of rtc-ppc/rtc-generic for
> > > now? ;-)
> >
> > broken here means that the kernel won't save the time to the hardware
> > rtc every 11 minutes as it used to do. normal NTP operations are unaffected.
>
> seems like so far ppc is the only architecture attempting to implement it
> correctly, all others either have it unimplemented or use the broken
> by design set_rtc_mmss method.
> Also note that in most cases hwclock has much better possibilities
> to do a good job.
>
> Regarding genrtc vs rtc-ppc/rtc-generic it is worth noting that genrtc
> provides RTC_UIE emulation which is of some use for exotic programs like
> "chrony".
> Afaics this is also the only situation without a good userspace workaround
> and chrony never worked well for me so I have nothing against junking the
> code.
What about CONFIG_RTC_INTF_DEV_UIE_EMUL for RTC class devices?
> Regarding a possible reorganisation from the generic to all separate drivers
> I agree that the habit of putting rtc-chip specific code in asm-generic is
> confusing at best.
> In many cases such code might be better placed in drivers/rtc or
> include/linux/rtc/chipname.
>
> Imho this does not preclude the possibility to use a generic framework. While
> there certainly are valid reasons to have separate drivers in some cases
> I do not see much value in rewriting everything as separate drivers where
> the generic framework works well.
Indeed. You can have a working RTC class driver for lots of hardware by just
writing ca. 100 lines of code on top of the generic framework.
With kind regards,
Geert Uytterhoeven
Software Architect
Sony Techsoft Centre Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
Phone: +32 (0)2 700 8453
Fax: +32 (0)2 700 8622
E-mail: Geert.Uytterhoeven@sonycom.com
Internet: http://www.sony-europe.com/
A division of Sony Europe (Belgium) N.V.
VAT BE 0413.825.160 · RPR Brussels
Fortis · BIC GEBABEBB · IBAN BE41293037680010
^ permalink raw reply
* How to using TSEC in u-boot ?
From: zhong wang @ 2009-03-02 8:29 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 644 bytes --]
hello all
now we are using Rtl821Xb Giga PHY , i am finding driver/net/tsec.c in u-boot ,there is most phy testing function ,but i donot known how to using tsec ?
Qiaofeng Tech Co;
leowang
2009:03:02
___________________________________________________________
好玩贺卡等你发，邮箱贺卡全新上线！
http://card.mail.cn.yahoo.com/
[-- Attachment #2: Type: text/html, Size: 1395 bytes --]
^ permalink raw reply
* Re: [PATCH] powerpc/mm: Merge various PTE bits and accessors definitions
From: Benjamin Herrenschmidt @ 2009-03-02 7:57 UTC (permalink / raw)
To: michael; +Cc: linuxppc-dev
In-Reply-To: <1235979481.8526.31.camel@localhost>
On Mon, 2009-03-02 at 18:38 +1100, Michael Ellerman wrote:
> On Mon, 2009-03-02 at 17:22 +1100, Benjamin Herrenschmidt wrote:
> > Now that they are almost identical, we can merge some of the definitions
> > related to the PTE format into common files.
>
> <snip>
>
> > +/* Protection used for kernel text. We want the debuggers to be able to
> > + * set breakpoints anywhere, so don't write protect the kernel text
> > + * on platforms where such control is possible.
> > + */
> > +#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
> > + defined(CONFIG_KPROBES)
> > +#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
> > +#else
> > +#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
> > +#endif
>
> What about FTRACE? ∞TRACE etc.
Well, I'm just moving those bits around from pgtable-ppc32.h (ie, only
ppc32 uses PAGE_KERNEL_TEXT for now anyway).
Note also that as it is, with ppc32 hash, we don't honor the read-only
restriction on the BAT mapping anyway.
So yes, there's room for fixing things but that isn't what this patch
does.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc/mm: Merge various PTE bits and accessors definitions
From: Michael Ellerman @ 2009-03-02 7:38 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20090302062351.26F84DDFBE@ozlabs.org>
[-- Attachment #1: Type: text/plain, Size: 932 bytes --]
On Mon, 2009-03-02 at 17:22 +1100, Benjamin Herrenschmidt wrote:
> Now that they are almost identical, we can merge some of the definitions
> related to the PTE format into common files.
<snip>
> +/* Protection used for kernel text. We want the debuggers to be able to
> + * set breakpoints anywhere, so don't write protect the kernel text
> + * on platforms where such control is possible.
> + */
> +#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
> + defined(CONFIG_KPROBES)
> +#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
> +#else
> +#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
> +#endif
What about FTRACE? ∞TRACE etc.
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply
* Re: 2.6.29-rc6-git4 boot failure
From: Sachin P. Sant @ 2009-03-02 6:53 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Mel Gorman, linuxppc-dev, Kamalesh Babulal
In-Reply-To: <1235951557.7248.1.camel@pasglop>
[-- Attachment #1: Type: text/plain, Size: 1528 bytes --]
Benjamin Herrenschmidt wrote:
> Ok, so I tried here on a dual G5 and couldn't reproduce with -rc6
> g64e7130.
>
> Now, it would be nice if you guys stopped sending stripped down dmesg...
> the whole thing is potentially relevant. Also, which compiler version
> did you use to generate this kernel ?
>
Hi Ben, Sorry about not attaching the complete log. Here it is. This is
with git5 kernel.
The machines has an older version of compiler. Here are the details :
# gcc -v
Using built-in specs.
Target: powerpc-linux-gnu
Configured with: ../src/configure -v --enable-languages=c,c++,java,f95,
objc,ada,treelang --prefix=/usr --with-gxx-include-dir=/usr/include/c++/4.0.2
--enable-shared --with-system-zlib --libexecdir=/usr/lib --enable-nls
--without-included-gettext --enable-threads=posix --program-suffix=-4.0
--enable-__cxa_atexit --enable-libstdcxx-allocator=mt --enable-clocale=gnu
--enable-libstdcxx-debug --enable-java-gc=boehm --enable-java-awt=gtk-default
--enable-gtk-cairo --with-java-home=/usr/lib/jvm/java-1.4.2-gcj-4.0-1.4.2.0/jre
--enable-mpfr --disable-softfloat --enable-targets=powerpc-linux,powerpc64-linux
--with-cpu=default32 --disable-werror --enable-checking=release powerpc-linux-gnu
Thread model: posix
gcc version 4.0.2 20050808 (prerelease) (Ubuntu 4.0.1-4ubuntu9)
# ld -v
GNU ld version 2.16.1 Debian GNU/Linux
#
Thanks
-Sachin
--
---------------------------------
Sachin Sant
IBM Linux Technology Center
India Systems and Technology Labs
Bangalore, India
---------------------------------
[-- Attachment #2: dmesg_log --]
[-- Type: text/plain, Size: 14156 bytes --]
[1;37m[2;40mConfig file read, 2093 bytes
Welcome to yaboot version 1.3.13
Enter "help" to get some basic usage information
boot: autobench
Please wait, loading kernel...
Elf64 kernel loaded...
Loading ramdisk...
ramdisk loaded at 01b00000, size: 5428 Kbytes
OF stdout device is: /ht@0,f2000000/pci@3/mac-io@7/escc@13000/ch-a@13020
command line: root=/dev/sda4 ro console=tty0 console=ttyS0,57600 autobench_args: root=/dev/sda7 ABAT:1235973754
memory layout at init:
alloc_bottom : 000000000204d000
alloc_top : 0000000030000000
alloc_top_hi : 0000000280000000
rmo_top : 0000000030000000
ram_top : 0000000280000000
Looking for displays
found display : /pci@0,f0000000/ATY,SimoneParent@10/ATY,Simone_A@0, opening ... done
found display : /pci@0,f0000000/ATY,SimoneParent@10/ATY,Simone_B@1, opening ... done
copying OF device tree ...
Building dt strings...
Building dt structure...
Device tree strings 0x000000000234e000 -> 0x000000000234f64c
Device tree struct 0x0000000002350000 -> 0x0000000002389000
Calling quiesce ...
returning from prom_init
Hello World !
[ 0.000000] DART table allocated at: c00000007f000000
[ 0.000000] Using PowerMac machine description
[ 0.000000] Found initrd at 0xc000000001b00000:0xc00000000204d000
[ 0.000000] Found U3 memory controller & host bridge @ 0xf8000000 revision: 0xb3
[ 0.000000] Mapped at 0xd000080080000000
[ 0.000000] Found a K2 mac-io controller, rev: 32, mapped at 0xd000080080041000
[ 0.000000] PowerMac motherboard: PowerMac G5
[ 0.000000] boot stdout isn't a display !
[ 0.000000] DART IOMMU initialized for U3 type chipset
[ 0.000000] console [udbg0] enabled
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] Starting Linux PPC64 #1 SMP Mon Mar 2 05:26:24 UTC 2009
[ 0.000000] -----------------------------------------------------
[ 0.000000] ppc64_pft_size = 0x0
[ 0.000000] physicalMemorySize = 0x200000000
[ 0.000000] htab_address = 0xc000000278000000
[ 0.000000] htab_hash_mask = 0xfffff
[ 0.000000] -----------------------------------------------------
[ 0.000000] Linux version 2.6.29-rc6-git5-autokern1 (root@elm3b19) (gcc version 4.0.2 20050808 (prerelease) (Ubuntu 4.0.1-4ubuntu9)) #1 SMP Mon Mar 2 05:26:24 UTC 2009
CF000012
Setup Arch
[ 0.000000] [boot]0012 Setup Arch
[ 0.000000] Found U3-AGP PCI host bridge. Firmware bus number: 240->255
[ 0.000000] PCI host bridge /pci@0,f0000000 ranges:
[ 0.000000] MEM 0x00000000f1000000..0x00000000f1ffffff -> 0x00000000f1000000
[ 0.000000] IO 0x00000000f0000000..0x00000000f07fffff -> 0x0000000000000000
[ 0.000000] MEM 0x0000000090000000..0x00000000afffffff -> 0x0000000090000000
[ 0.000000] Can't get bus-range for /ht@0,f2000000, assume bus 0
[ 0.000000] Found U3-HT PCI host bridge. Firmware bus number: 0->239
[ 0.000000] PCI host bridge /ht@0,f2000000 (primary) ranges:
[ 0.000000] via-pmu: Server Mode is enabled
[ 0.000000] PMU driver v2 initialized for Core99, firmware: 0c
[ 0.000000] nvram: Checking bank 0...
[ 0.000000] nvram: gen0=776, gen1=777
[ 0.000000] nvram: Active bank is: 1
[ 0.000000] nvram: OF partition at 0x410
[ 0.000000] nvram: XP partition at 0x1020
[ 0.000000] nvram: NR partition at 0x1120
[ 0.000000] Zone PFN ranges:
[ 0.000000] DMA 0x00000000 -> 0x00280000
[ 0.000000] Normal 0x00280000 -> 0x00280000
[ 0.000000] Movable zone start PFN for each node
[ 0.000000] early_node_map[2] active PFN ranges
[ 0.000000] 0: 0x00000000 -> 0x00080000
[ 0.000000] 0: 0x00100000 -> 0x00280000
CF000015
Setup Done
[ 0.000000] [boot]0015 Setup Done
[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 2061312
[ 0.000000] Policy zone: DMA
[ 0.000000] Kernel command line: root=/dev/sda4 ro console=tty0 console=ttyS0,57600 autobench_args: root=/dev/sda7 ABAT:1235973754
[ 0.000000] mpic: Setting up MPIC " MPIC 1 " version 1.2 at 80040000, max 4 CPUs
[ 0.000000] mpic: ISU size: 120, shift: 7, mask: 7f
[ 0.000000] mpic: Initializing for 120 sources
[ 0.000000] mpic: Setting up MPIC " MPIC 2 " version 1.2 at f8040000, max 4 CPUs
[ 0.000000] mpic: ISU size: 120, shift: 7, mask: 7f
[ 0.000000] mpic: Initializing for 120 sources
[ 0.000000] PID hash table entries: 4096 (order: 12, 32768 bytes)
[ 0.000000] clocksource: timebase mult[7800001] shift[22] registered
[ 0.012359] Console: colour dummy device 80x25
[ 0.021190] console [tty0] enabled
[ 0.000000] DART table allocated at: c00000007f000000
[ 0.000000] Using PowerMac machine description
[ 0.000000] Found initrd at 0xc000000001b00000:0xc00000000204d000
[ 0.000000] Found U3 memory controller & host bridge @ 0xf8000000 revision: 0xb3
[ 0.000000] Mapped at 0xd000080080000000
[ 0.000000] Found a K2 mac-io controller, rev: 32, mapped at 0xd000080080041000
[ 0.000000] PowerMac motherboard: PowerMac G5
[ 0.000000] boot stdout isn't a display !
[ 0.000000] DART IOMMU initialized for U3 type chipset
[ 0.000000] console [udbg0] enabled
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] Starting Linux PPC64 #1 SMP Mon Mar 2 05:26:24 UTC 2009
[ 0.000000] -----------------------------------------------------
[ 0.000000] ppc64_pft_size = 0x0
[ 0.000000] physicalMemorySize = 0x200000000
[ 0.000000] htab_address = 0xc000000278000000
[ 0.000000] htab_hash_mask = 0xfffff
[ 0.000000] -----------------------------------------------------
[ 0.000000] Linux version 2.6.29-rc6-git5-autokern1 (root@elm3b19) (gcc version 4.0.2 20050808 (prerelease) (Ubuntu 4.0.1-4ubuntu9)) #1 SMP Mon Mar 2 05:26:24 UTC 2009
[ 0.000000] [boot]0012 Setup Arch
[ 0.000000] Found U3-AGP PCI host bridge. Firmware bus number: 240->255
[ 0.000000] PCI host bridge /pci@0,f0000000 ranges:
[ 0.000000] MEM 0x00000000f1000000..0x00000000f1ffffff -> 0x00000000f1000000
[ 0.000000] IO 0x00000000f0000000..0x00000000f07fffff -> 0x0000000000000000
[ 0.000000] MEM 0x0000000090000000..0x00000000afffffff -> 0x0000000090000000
[ 0.000000] Can't get bus-range for /ht@0,f2000000, assume bus 0
[ 0.000000] Found U3-HT PCI host bridge. Firmware bus number: 0->239
[ 0.000000] PCI host bridge /ht@0,f2000000 (primary) ranges:
[ 0.000000] via-pmu: Server Mode is enabled
[ 0.000000] PMU driver v2 initialized for Core99, firmware: 0c
[ 0.000000] nvram: Checking bank 0...
[ 0.000000] nvram: gen0=776, gen1=777
[ 0.000000] nvram: Active bank is: 1
[ 0.000000] nvram: OF partition at 0x410
[ 0.000000] nvram: XP partition at 0x1020
[ 0.000000] nvram: NR partition at 0x1120
[ 0.000000] Zone PFN ranges:
[ 0.000000] DMA 0x00000000 -> 0x00280000
[ 0.000000] Normal 0x00280000 -> 0x00280000
[ 0.000000] Movable zone start PFN for each node
[ 0.000000] early_node_map[2] active PFN ranges
[ 0.000000] 0: 0x00000000 -> 0x00080000
[ 0.000000] 0: 0x00100000 -> 0x00280000
[ 0.000000] [boot]0015 Setup Done
[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 2061312
[ 0.000000] Policy zone: DMA
[ 0.000000] Kernel command line: root=/dev/sda4 ro console=tty0 console=ttyS0,57600 autobench_args: root=/dev/sda7 ABAT:1235973754
[ 0.000000] mpic: Setting up MPIC " MPIC 1 " version 1.2 at 80040000, max 4 CPUs
[ 0.000000] mpic: ISU size: 120, shift: 7, mask: 7f
[ 0.000000] mpic: Initializing for 120 sources
[ 0.000000] mpic: Setting up MPIC " MPIC 2 " version 1.2 at f8040000, max 4 CPUs
[ 0.000000] mpic: ISU size: 120, shift: 7, mask: 7f
[ 0.000000] mpic: Initializing for 120 sources
[ 0.000000] PID hash table entries: 4096 (order: 12, 32768 bytes)
[ 0.000000] clocksource: timebase mult[7800001] shift[22] registered
[ 0.012359] Console: colour dummy device 80x25
[ 0.021190] console [tty0] enabledú[ 0.641012] console handover: boot [udbg0] -> real [ttyS0]
[ 0.657617] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
[ 0.680829] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
[ 0.697623] freeing bootmem node 0
[ 0.941314] Memory: 8085276k/8388608k available (4348k kernel code, 303332k reserved, 760k data, 436k bss, 272k init)
[ 0.962416] Calibrating delay loop... 66.56 BogoMIPS (lpj=133120)
[ 1.062043] Security Framework initialized
[ 1.070127] SELinux: Disabled at boot.
[ 1.077792] Mount-cache hash table entries: 256
smp_core99_probe
[ 1.092683] PowerMac SMP probe found 2 cpus
[ 1.101139] KeyWest i2c @0xf8001003 irq 42 /u3@0,f8000000/i2c@f8001000
[ 1.114021] channel 0 bus <multibus>
[ 1.121311] channel 1 bus <multibus>
[ 1.128626] KeyWest i2c @0x80018000 irq 26 /ht@0,f2000000/pci@3/mac-io@7/i2c@18000
[ 1.143710] channel 0 bus <multibus>
[ 1.151006] PMU i2c /ht@0,f2000000/pci@3/mac-io@7/via-pmu@16000/pmu-i2c
[ 1.164199] channel 1 bus <multibus>
[ 1.171490] channel 2 bus <multibus>
[ 1.178854] Processor timebase sync using Cypress i2c clock
[ 1.189891] mpic: requesting IPIs ...
smp_core99_kick_cpu
smp_core99_kick_cpu done
[ 1.206762] Processor 1 found.
[ 1.250881] Brought up 2 CPUs
[ 1.250910] Unable to handle kernel paging request for data at address 0x00000009
[ 1.250913] Faulting instruction address: 0xc00000000005b5d8
[ 1.250917] Oops: Kernel access of bad area, sig: 11 [#1]
[ 1.250920] SMP NR_CPUS=32 NUMA PowerMac
[ 1.250923] Modules linked in:
[ 1.250927] NIP: c00000000005b5d8 LR: c00000000006f950 CTR: c00000000005b5a0
[ 1.250931] REGS: c0000002763c3c80 TRAP: 0300 Not tainted (2.6.29-rc6-git5-autokern1)
[ 1.250933] MSR: 9000000000009032 <EE,ME,IR,DR> CR: 24000084 XER: 000fffff
[ 1.250941] DAR: 0000000000000009, DSISR: 0000000040000000
[ 1.250944] TASK = c0000002760e20c0[5] 'ksoftirqd/1' THREAD: c0000002763c0000 CPU: 1
[ 1.250946] GPR00: 0000000000000000 c0000002763c3f00 c0000000005008f8 0000000000000001
[ 1.250951] GPR04: c0000002760e28d0 0000000000000000 0000000024000082 c0000000000101bc
[ 1.250956] GPR08: 0000000000000000 000000000ec1c518 c00000000051ca40 0000000000000010
[ 1.250960] GPR12: c000000000524700 c000000000524500 0000000000000000 0000000000000000
[ 1.250965] GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 1.250969] GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000001400000
[ 1.250973] GPR24: 00000000018314c0 c000000000431260 c000000000529680 0000000000000000
[ 1.250978] GPR28: c0000002760bfc48 0000000000000001 c00000000049f770 c0000000004b7300
[ 1.250989] NIP [c00000000005b5d8] .tasklet_kill_immediate+0x38/0xb8
[ 1.250996] LR [c00000000006f950] .kthread+0x78/0xc4
[ 1.250997] Call Trace:
[ 1.251001] [c0000002763c3f00] [c00000000006f918] .kthread+0x40/0xc4 (unreliable)
[ 1.251008] [c0000002763c3f90] [c000000000022fe8] .kernel_thread+0x54/0x70
[ 1.251010] Instruction dump:
[ 1.251012] 7c8b07b4 7d693670 7d290194 556b06be e95e8038 7d2907b4 79291f24 e94a0000
[ 1.251018] 7c0a482a 7c005c36 780007e0 0b000000 <e8030008> 7800ffe2 0b000000 e8030008
[ 1.251033] ---[ end trace 31fd0ba7d8756001 ]---
[ 1.251059] Unable to handle kernel paging request for data at address 0x00000000
[ 1.251062] Faulting instruction address: 0xc0000000000db8ac
[ 1.251065] Oops: Kernel access of bad area, sig: 11 [#2]
[ 1.251067] SMP NR_CPUS=32 NUMA PowerMac
[ 1.251070] Modules linked in:
[ 1.251073] NIP: c0000000000db8ac LR: c000000000051d30 CTR: 0000000000000003
[ 1.251076] REGS: c0000002763c35d0 TRAP: 0300 Tainted: G D (2.6.29-rc6-git5-autokern1)
[ 1.251079] MSR: 9000000000009032 <EE,ME,IR,DR> CR: 28004082 XER: 200fffff
[ 1.251085] DAR: 0000000000000000, DSISR: 0000000040000000
[ 1.251088] TASK = c0000002760e20c0[5] 'ksoftirqd/1' THREAD: c0000002763c0000 CPU: 1
[ 1.251091] GPR00: 0000000000000004 c0000002763c3850 c0000000005008f8 c000000276027d00
[ 1.251095] GPR04: c0000002763b6980 0000000000000000 000000000000001f c00000000045e0d0
[ 1.251100] GPR08: c0000002760e2288 0000000000000000 c000000000524500 c0000002763b6080
[ 1.251104] GPR12: 0000000048000084 c000000000524500 0000000000000000 0000000000000000
[ 1.251109] GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 1.251113] GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000001
[ 1.251118] GPR24: c0000002760e20b0 c0000002760e2220 0000000000000000 c000000276027d00
[ 1.251122] GPR28: 0000000000000000 c0000002763b6980 c0000000004a37c8 0000000000000000
[ 1.251131] NIP [c0000000000db8ac] .kmem_cache_free+0x1b8/0x244
[ 1.251135] LR [c000000000051d30] .__cleanup_sighand+0x44/0x5c
[ 1.251137] Call Trace:
[ 1.251140] [c0000002763c3850] [c0000000004a19a0] 0xc0000000004a19a0 (unreliable)
[ 1.251145] [c0000002763c3900] [c000000000051d30] .__cleanup_sighand+0x44/0x5c
[ 1.251150] [c0000002763c3980] [c000000000057e74] .release_task+0x320/0x44c
[ 1.251154] [c0000002763c3a20] [c000000000058714] .do_exit+0x774/0x820
[ 1.251158] [c0000002763c3af0] [c000000000020c54] .die+0x1c8/0x1cc
[ 1.251163] [c0000002763c3b90] [c00000000002883c] .bad_page_fault+0xb8/0xd4
[ 1.251168] [c0000002763c3c10] [c000000000005318] handle_page_fault+0x3c/0x5c
[ 1.251175] --- Exception: 300 at .tasklet_kill_immediate+0x38/0xb8
[ 1.251176] LR = .kthread+0x78/0xc4
[ 1.251180] [c0000002763c3f00] [c00000000006f918] .kthread+0x40/0xc4 (unreliable)
[ 1.251185] [c0000002763c3f90] [c000000000022fe8] .kernel_thread+0x54/0x70
[ 1.251188] Instruction dump:
[ 1.251190] 4800016d e97d0168 880d01dc 2fa00000 41be0010 7c0004ac 38000000 980d01dc
[ 1.251196] 7c2004ac 38000000 900b0040 48000050 <817f0000> 801f0004 7f8b0040 409c001c
[ 1.251202] ---[ end trace 31fd0ba7d8756002 ]---
[ 1.251205] Fixing recursive fault but reboot is needed!
core99_setup_cpu 0 done
^ permalink raw reply
* Re: [PATCH] powerpc/mm: Merge various PTE bits and accessors definitions
From: Benjamin Herrenschmidt @ 2009-03-02 6:27 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20090302062351.26F84DDFBE@ozlabs.org>
On Mon, 2009-03-02 at 17:22 +1100, Benjamin Herrenschmidt wrote:
> Now that they are almost identical, we can merge some of the definitions
> related to the PTE format into common files.
Hrm... some of the last 2 patches got mangled with each other ...
applying both works fine but don't try to build with only one of them.
I'll try to fix that up tomorrow.
Ben.
> This creates a new pte-common.h which is included by both 32 and 64-bit
> right after the CPU specific pte-*.h file, and which defines some
> bits to "default" values if they haven't been defined already, and
> then provides a generic definition of most of the bit combinations
> based on these and exposed to the rest of the kernel.
>
> I also moved to the common pgtable.h most of the "small" accessors to the
> PTE bits and modification helpers (pte_mk*). The actual accessors remain
> in their separate files.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
>
> arch/powerpc/include/asm/pgtable-ppc32.h | 124 ---------------------
> arch/powerpc/include/asm/pgtable-ppc64.h | 130 ----------------------
> arch/powerpc/include/asm/pgtable.h | 53 ++++++++-
> arch/powerpc/include/asm/pte-common.h | 177 +++++++++++++++++++++++++++++++
> 4 files changed, 229 insertions(+), 255 deletions(-)
>
> --- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 16:11:50.000000000 +1100
> +++ linux-work/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 16:12:50.000000000 +1100
> @@ -97,94 +97,11 @@ extern int icache_44x_need_flush;
> #include <asm/pte-hash32.h>
> #endif
>
> -/* If _PAGE_SPECIAL is defined, then we advertise our support for it */
> -#ifdef _PAGE_SPECIAL
> -#define __HAVE_ARCH_PTE_SPECIAL
> -#endif
> -
> -/*
> - * We define 2 sets of base prot bits, one for basic pages (ie,
> - * cacheable kernel and user pages) and one for non cacheable
> - * pages. We always set _PAGE_COHERENT when SMP is enabled or
> - * the processor might need it for DMA coherency.
> - */
> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
> -#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
> -#else
> -#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> -#endif
> -#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
> -
> -/* Permission masks used for kernel mappings */
> -#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
> -#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
> - _PAGE_NO_CACHE)
> -#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
> - _PAGE_NO_CACHE | _PAGE_GUARDED)
> -#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
> -#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
> -#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
> -
> -#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
> - defined(CONFIG_KPROBES)
> -/* We want the debuggers to be able to set breakpoints anywhere, so
> - * don't write protect the kernel text */
> -#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
> -#else
> -#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
> -#endif
> -
> -#define PAGE_NONE __pgprot(_PAGE_BASE)
> -#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
> -#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
> -#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
> -#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
> -#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
> -#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
> -
> -/*
> - * The PowerPC can only do execute protection on a segment (256MB) basis,
> - * not on a page basis. So we consider execute permission the same as read.
> - * Also, write permissions imply read permissions.
> - * This is the closest we can get..
> - */
> -#define __P000 PAGE_NONE
> -#define __P001 PAGE_READONLY_X
> -#define __P010 PAGE_COPY
> -#define __P011 PAGE_COPY_X
> -#define __P100 PAGE_READONLY
> -#define __P101 PAGE_READONLY_X
> -#define __P110 PAGE_COPY
> -#define __P111 PAGE_COPY_X
> -
> -#define __S000 PAGE_NONE
> -#define __S001 PAGE_READONLY_X
> -#define __S010 PAGE_SHARED
> -#define __S011 PAGE_SHARED_X
> -#define __S100 PAGE_READONLY
> -#define __S101 PAGE_READONLY_X
> -#define __S110 PAGE_SHARED
> -#define __S111 PAGE_SHARED_X
> +/* And here we include common definitions */
> +#include <asm/pte-common.h>
>
> #ifndef __ASSEMBLY__
> -/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
> - * kernel without large page PMD support */
> -extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
>
> -/*
> - * Conversions between PTE values and page frame numbers.
> - */
> -
> -#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT)
> -#define pte_page(x) pfn_to_page(pte_pfn(x))
> -
> -#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\
> - pgprot_val(prot))
> -#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
> -#endif /* __ASSEMBLY__ */
> -
> -#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
> -#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
> #define pte_clear(mm, addr, ptep) \
> do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
>
> @@ -193,43 +110,6 @@ extern unsigned long bad_call_to_PMD_PAG
> #define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
> #define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0)
>
> -#ifndef __ASSEMBLY__
> -/*
> - * The following only work if pte_present() is true.
> - * Undefined behaviour if not..
> - */
> -static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
> -static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
> -static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
> -static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
> -static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
> -
> -static inline pte_t pte_wrprotect(pte_t pte) {
> - pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
> -static inline pte_t pte_mkclean(pte_t pte) {
> - pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
> -static inline pte_t pte_mkold(pte_t pte) {
> - pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
> -
> -static inline pte_t pte_mkwrite(pte_t pte) {
> - pte_val(pte) |= _PAGE_RW; return pte; }
> -static inline pte_t pte_mkdirty(pte_t pte) {
> - pte_val(pte) |= _PAGE_DIRTY; return pte; }
> -static inline pte_t pte_mkyoung(pte_t pte) {
> - pte_val(pte) |= _PAGE_ACCESSED; return pte; }
> -static inline pte_t pte_mkspecial(pte_t pte) {
> - pte_val(pte) |= _PAGE_SPECIAL; return pte; }
> -static inline pgprot_t pte_pgprot(pte_t pte)
> -{
> - return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
> -}
> -
> -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
> -{
> - pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
> - return pte;
> -}
> -
> /*
> * When flushing the tlb entry for a page, we also need to flush the hash
> * table entry. flush_hash_pages is assembler (for speed) in hashtable.S.
> Index: linux-work/arch/powerpc/include/asm/pgtable-ppc64.h
> ===================================================================
> --- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc64.h 2009-03-02 16:11:50.000000000 +1100
> +++ linux-work/arch/powerpc/include/asm/pgtable-ppc64.h 2009-03-02 16:12:50.000000000 +1100
> @@ -80,80 +80,8 @@
> * Include the PTE bits definitions
> */
> #include <asm/pte-hash64.h>
> +#include <asm/pte-common.h>
>
> -/* Some other useful definitions */
> -#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
> -#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
> -
> -/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
> - * pgprot changes
> - */
> -#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
> - _PAGE_ACCESSED | _PAGE_SPECIAL)
> -
> -#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
> -#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
> -
> -
> -/* Permission masks used to generate the __P and __S table,
> - *
> - * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
> - */
> -#define PAGE_NONE __pgprot(_PAGE_BASE)
> -#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
> -#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
> -#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
> -#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
> -#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
> -#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
> -
> -/* Permission masks used for kernel mappings */
> -#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
> -#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
> - _PAGE_NO_CACHE)
> -#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
> - _PAGE_NO_CACHE | _PAGE_GUARDED)
> -#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
> -#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
> -#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
> -
> -/* Protection bits for use by pte_pgprot() */
> -#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
> - _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
> - _PAGE_4K_PFN | _PAGE_USER | _PAGE_RW | \
> - _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
> -
> -
> -/* We always have _PAGE_SPECIAL on 64 bit */
> -#define __HAVE_ARCH_PTE_SPECIAL
> -
> -
> -/*
> - * POWER4 and newer have per page execute protection, older chips can only
> - * do this on a segment (256MB) basis.
> - *
> - * Also, write permissions imply read permissions.
> - * This is the closest we can get..
> - *
> - * Note due to the way vm flags are laid out, the bits are XWR
> - */
> -#define __P000 PAGE_NONE
> -#define __P001 PAGE_READONLY
> -#define __P010 PAGE_COPY
> -#define __P011 PAGE_COPY
> -#define __P100 PAGE_READONLY_X
> -#define __P101 PAGE_READONLY_X
> -#define __P110 PAGE_COPY_X
> -#define __P111 PAGE_COPY_X
> -
> -#define __S000 PAGE_NONE
> -#define __S001 PAGE_READONLY
> -#define __S010 PAGE_SHARED
> -#define __S011 PAGE_SHARED
> -#define __S100 PAGE_READONLY_X
> -#define __S101 PAGE_READONLY_X
> -#define __S110 PAGE_SHARED_X
> -#define __S111 PAGE_SHARED_X
>
> #ifdef CONFIG_PPC_MM_SLICES
> #define HAVE_ARCH_UNMAPPED_AREA
> @@ -194,34 +122,8 @@
> #endif /* __real_pte */
>
>
> -/*
> - * Conversion functions: convert a page and protection to a page entry,
> - * and a page entry and page directory to the page they refer to.
> - *
> - * mk_pte takes a (struct page *) as input
> - */
> -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
> -
> -static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
> -{
> - pte_t pte;
> -
> -
> - pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
> - return pte;
> -}
> -
> -#define pte_modify(_pte, newprot) \
> - (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
> -
> -#define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
> -#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
> -
> /* pte_clear moved to later in this file */
>
> -#define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
> -#define pte_page(x) pfn_to_page(pte_pfn(x))
> -
> #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
> #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
>
> @@ -269,36 +171,6 @@ static inline pte_t pfn_pte(unsigned lon
> /* This now only contains the vmalloc pages */
> #define pgd_offset_k(address) pgd_offset(&init_mm, address)
>
> -/*
> - * The following only work if pte_present() is true.
> - * Undefined behaviour if not..
> - */
> -static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
> -static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
> -static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
> -static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
> -static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
> -
> -static inline pte_t pte_wrprotect(pte_t pte) {
> - pte_val(pte) &= ~(_PAGE_RW); return pte; }
> -static inline pte_t pte_mkclean(pte_t pte) {
> - pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
> -static inline pte_t pte_mkold(pte_t pte) {
> - pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
> -static inline pte_t pte_mkwrite(pte_t pte) {
> - pte_val(pte) |= _PAGE_RW; return pte; }
> -static inline pte_t pte_mkdirty(pte_t pte) {
> - pte_val(pte) |= _PAGE_DIRTY; return pte; }
> -static inline pte_t pte_mkyoung(pte_t pte) {
> - pte_val(pte) |= _PAGE_ACCESSED; return pte; }
> -static inline pte_t pte_mkhuge(pte_t pte) {
> - return pte; }
> -static inline pte_t pte_mkspecial(pte_t pte) {
> - pte_val(pte) |= _PAGE_SPECIAL; return pte; }
> -static inline pgprot_t pte_pgprot(pte_t pte)
> -{
> - return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
> -}
>
> /* Atomic PTE updates */
> static inline unsigned long pte_update(struct mm_struct *mm,
> Index: linux-work/arch/powerpc/include/asm/pgtable.h
> ===================================================================
> --- linux-work.orig/arch/powerpc/include/asm/pgtable.h 2009-03-02 16:11:50.000000000 +1100
> +++ linux-work/arch/powerpc/include/asm/pgtable.h 2009-03-02 16:17:52.000000000 +1100
> @@ -25,12 +25,57 @@ static inline void assert_pte_locked(str
> # include <asm/pgtable-ppc32.h>
> #endif
>
> -/* Special mapping for AGP */
> -#define PAGE_AGP (PAGE_KERNEL_NC)
> -#define HAVE_PAGE_AGP
> -
> #ifndef __ASSEMBLY__
>
> +/* Generic accessors to PTE bits */
> +static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
> +static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
> +static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
> +static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
> +static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
> +static inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; }
> +static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
> +static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
> +
> +/* Conversion functions: convert a page and protection to a page entry,
> + * and a page entry and page directory to the page they refer to.
> + *
> + * Even if PTEs can be unsigned long long, a PFN is always an unsigned
> + * long for now.
> + */
> +static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) {
> + return __pte((pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot)); }
> +static inline unsigned long pte_pfn(pte_t pte) {
> + return pte_val(pte) >> PTE_RPN_SHIFT; }
> +
> +/* Keep these as a macros to avoid include dependency mess */
> +#define pte_page(x) pfn_to_page(pte_pfn(x))
> +#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
> +
> +/* Generic modifiers for PTE bits */
> +static inline pte_t pte_wrprotect(pte_t pte) {
> + pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
> +static inline pte_t pte_mkclean(pte_t pte) {
> + pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
> +static inline pte_t pte_mkold(pte_t pte) {
> + pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
> +static inline pte_t pte_mkwrite(pte_t pte) {
> + pte_val(pte) |= _PAGE_RW; return pte; }
> +static inline pte_t pte_mkdirty(pte_t pte) {
> + pte_val(pte) |= _PAGE_DIRTY; return pte; }
> +static inline pte_t pte_mkyoung(pte_t pte) {
> + pte_val(pte) |= _PAGE_ACCESSED; return pte; }
> +static inline pte_t pte_mkspecial(pte_t pte) {
> + pte_val(pte) |= _PAGE_SPECIAL; return pte; }
> +static inline pte_t pte_mkhuge(pte_t pte) {
> + return pte; }
> +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
> +{
> + pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
> + return pte;
> +}
> +
> +
> /* Insert a PTE, top-level function is out of line. It uses an inline
> * low level function in the respective pgtable-* files
> */
> Index: linux-work/arch/powerpc/include/asm/pte-common.h
> ===================================================================
> --- /dev/null 1970-01-01 00:00:00.000000000 +0000
> +++ linux-work/arch/powerpc/include/asm/pte-common.h 2009-03-02 16:20:02.000000000 +1100
> @@ -0,0 +1,177 @@
> +/* Included from asm/pgtable-*.h only ! */
> +
> +/*
> + * Some bits are only used on some cpu families... Make sure that all
> + * the undefined gets a sensible default
> + */
> +#ifndef _PAGE_HASHPTE
> +#define _PAGE_HASHPTE 0
> +#endif
> +#ifndef _PAGE_SHARED
> +#define _PAGE_SHARED 0
> +#endif
> +#ifndef _PAGE_HWWRITE
> +#define _PAGE_HWWRITE 0
> +#endif
> +#ifndef _PAGE_HWEXEC
> +#define _PAGE_HWEXEC 0
> +#endif
> +#ifndef _PAGE_EXEC
> +#define _PAGE_EXEC 0
> +#endif
> +#ifndef _PAGE_ENDIAN
> +#define _PAGE_ENDIAN 0
> +#endif
> +#ifndef _PAGE_COHERENT
> +#define _PAGE_COHERENT 0
> +#endif
> +#ifndef _PAGE_WRITETHRU
> +#define _PAGE_WRITETHRU 0
> +#endif
> +#ifndef _PAGE_SPECIAL
> +#define _PAGE_SPECIAL 0
> +#endif
> +#ifndef _PAGE_4K_PFN
> +#define _PAGE_4K_PFN 0
> +#endif
> +#ifndef _PAGE_PSIZE
> +#define _PAGE_PSIZE 0
> +#endif
> +#ifndef _PMD_PRESENT_MASK
> +#define _PMD_PRESENT_MASK _PMD_PRESENT
> +#endif
> +#ifndef _PMD_SIZE
> +#define _PMD_SIZE 0
> +#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
> +#endif
> +#ifndef _PAGE_KERNEL_RO
> +#define _PAGE_KERNEL_RO 0
> +#endif
> +#ifndef _PAGE_KERNEL_RW
> +#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
> +#endif
> +#ifndef _PAGE_HPTEFLAGS
> +#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
> +#endif
> +#ifndef _PTE_NONE_MASK
> +#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
> +#endif
> +
> +/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
> + * kernel without large page PMD support
> + */
> +#ifndef __ASSEMBLY__
> +extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
> +#endif /* __ASSEMBLY__ */
> +
> +/* Location of the PFN in the PTE. Most 32-bit platforms use the same
> + * as _PAGE_SHIFT here (ie, naturally aligned).
> + * Platform who don't just pre-define the value so we don't override it here
> + */
> +#ifndef PTE_RPN_SHIFT
> +#define PTE_RPN_SHIFT (PAGE_SHIFT)
> +#endif
> +
> +/* The mask convered by the RPN must be a ULL on 32-bit platforms with
> + * 64-bit PTEs
> + */
> +#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
> +#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
> +#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
> +#else
> +#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
> +#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
> +#endif
> +
> +/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
> + * pgprot changes
> + */
> +#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
> + _PAGE_ACCESSED | _PAGE_SPECIAL)
> +
> +/* Mask of bits returned by pte_pgprot() */
> +#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
> + _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
> + _PAGE_USER | _PAGE_ACCESSED | \
> + _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
> + _PAGE_EXEC | _PAGE_HWEXEC)
> +
> +/*
> + * We define 2 sets of base prot bits, one for basic pages (ie,
> + * cacheable kernel and user pages) and one for non cacheable
> + * pages. We always set _PAGE_COHERENT when SMP is enabled or
> + * the processor might need it for DMA coherency.
> + */
> +#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
> +#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
> +#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
> +#else
> +#define _PAGE_BASE (_PAGE_BASE_NC)
> +#endif
> +
> +/* Permission masks used to generate the __P and __S table,
> + *
> + * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
> + *
> + * Write permissions imply read permissions for now (we could make write-only
> + * pages on BookE but we don't bother for now). Execute permission control is
> + * possible on platforms that define _PAGE_EXEC
> + *
> + * Note due to the way vm flags are laid out, the bits are XWR
> + */
> +#define PAGE_NONE __pgprot(_PAGE_BASE)
> +#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
> +#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
> +#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
> +#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
> +#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
> +#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
> +
> +#define __P000 PAGE_NONE
> +#define __P001 PAGE_READONLY
> +#define __P010 PAGE_COPY
> +#define __P011 PAGE_COPY
> +#define __P100 PAGE_READONLY_X
> +#define __P101 PAGE_READONLY_X
> +#define __P110 PAGE_COPY_X
> +#define __P111 PAGE_COPY_X
> +
> +#define __S000 PAGE_NONE
> +#define __S001 PAGE_READONLY
> +#define __S010 PAGE_SHARED
> +#define __S011 PAGE_SHARED
> +#define __S100 PAGE_READONLY_X
> +#define __S101 PAGE_READONLY_X
> +#define __S110 PAGE_SHARED_X
> +#define __S111 PAGE_SHARED_X
> +
> +/* Permission masks used for kernel mappings */
> +#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
> +#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
> + _PAGE_NO_CACHE)
> +#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
> + _PAGE_NO_CACHE | _PAGE_GUARDED)
> +#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
> +#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
> +#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
> +
> +/* Protection used for kernel text. We want the debuggers to be able to
> + * set breakpoints anywhere, so don't write protect the kernel text
> + * on platforms where such control is possible.
> + */
> +#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
> + defined(CONFIG_KPROBES)
> +#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
> +#else
> +#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
> +#endif
> +
> +/* Advertise special mapping type for AGP */
> +#define PAGE_AGP (PAGE_KERNEL_NC)
> +#define HAVE_PAGE_AGP
> +
> +/* Advertise support for _PAGE_SPECIAL */
> +#ifdef _PAGE_SPECIAL
> +#define __HAVE_ARCH_PTE_SPECIAL
> +#endif
> +
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* [PATCH] powerpc/mm: Merge various PTE bits and accessors definitions
From: Benjamin Herrenschmidt @ 2009-03-02 6:22 UTC (permalink / raw)
To: linuxppc-dev
Now that they are almost identical, we can merge some of the definitions
related to the PTE format into common files.
This creates a new pte-common.h which is included by both 32 and 64-bit
right after the CPU specific pte-*.h file, and which defines some
bits to "default" values if they haven't been defined already, and
then provides a generic definition of most of the bit combinations
based on these and exposed to the rest of the kernel.
I also moved to the common pgtable.h most of the "small" accessors to the
PTE bits and modification helpers (pte_mk*). The actual accessors remain
in their separate files.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/pgtable-ppc32.h | 124 ---------------------
arch/powerpc/include/asm/pgtable-ppc64.h | 130 ----------------------
arch/powerpc/include/asm/pgtable.h | 53 ++++++++-
arch/powerpc/include/asm/pte-common.h | 177 +++++++++++++++++++++++++++++++
4 files changed, 229 insertions(+), 255 deletions(-)
--- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 16:11:50.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 16:12:50.000000000 +1100
@@ -97,94 +97,11 @@ extern int icache_44x_need_flush;
#include <asm/pte-hash32.h>
#endif
-/* If _PAGE_SPECIAL is defined, then we advertise our support for it */
-#ifdef _PAGE_SPECIAL
-#define __HAVE_ARCH_PTE_SPECIAL
-#endif
-
-/*
- * We define 2 sets of base prot bits, one for basic pages (ie,
- * cacheable kernel and user pages) and one for non cacheable
- * pages. We always set _PAGE_COHERENT when SMP is enabled or
- * the processor might need it for DMA coherency.
- */
-#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
-#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
-#else
-#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
-#endif
-#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
-
-/* Permission masks used for kernel mappings */
-#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
-#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
- _PAGE_NO_CACHE)
-#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
- _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
-#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
-#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
- defined(CONFIG_KPROBES)
-/* We want the debuggers to be able to set breakpoints anywhere, so
- * don't write protect the kernel text */
-#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
-#else
-#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
-#endif
-
-#define PAGE_NONE __pgprot(_PAGE_BASE)
-#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
-#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
-#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-
-/*
- * The PowerPC can only do execute protection on a segment (256MB) basis,
- * not on a page basis. So we consider execute permission the same as read.
- * Also, write permissions imply read permissions.
- * This is the closest we can get..
- */
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY_X
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY_X
-#define __P100 PAGE_READONLY
-#define __P101 PAGE_READONLY_X
-#define __P110 PAGE_COPY
-#define __P111 PAGE_COPY_X
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY_X
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED_X
-#define __S100 PAGE_READONLY
-#define __S101 PAGE_READONLY_X
-#define __S110 PAGE_SHARED
-#define __S111 PAGE_SHARED_X
+/* And here we include common definitions */
+#include <asm/pte-common.h>
#ifndef __ASSEMBLY__
-/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
- * kernel without large page PMD support */
-extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
-/*
- * Conversions between PTE values and page frame numbers.
- */
-
-#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT)
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-
-#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\
- pgprot_val(prot))
-#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
-#endif /* __ASSEMBLY__ */
-
-#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
-#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
#define pte_clear(mm, addr, ptep) \
do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
@@ -193,43 +110,6 @@ extern unsigned long bad_call_to_PMD_PAG
#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0)
-#ifndef __ASSEMBLY__
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
-static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
-static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
-static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
-
-static inline pte_t pte_wrprotect(pte_t pte) {
- pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
-static inline pte_t pte_mkclean(pte_t pte) {
- pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
-static inline pte_t pte_mkold(pte_t pte) {
- pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
-
-static inline pte_t pte_mkwrite(pte_t pte) {
- pte_val(pte) |= _PAGE_RW; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte) {
- pte_val(pte) |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte) {
- pte_val(pte) |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkspecial(pte_t pte) {
- pte_val(pte) |= _PAGE_SPECIAL; return pte; }
-static inline pgprot_t pte_pgprot(pte_t pte)
-{
- return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
-}
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
- pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
- return pte;
-}
-
/*
* When flushing the tlb entry for a page, we also need to flush the hash
* table entry. flush_hash_pages is assembler (for speed) in hashtable.S.
Index: linux-work/arch/powerpc/include/asm/pgtable-ppc64.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc64.h 2009-03-02 16:11:50.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pgtable-ppc64.h 2009-03-02 16:12:50.000000000 +1100
@@ -80,80 +80,8 @@
* Include the PTE bits definitions
*/
#include <asm/pte-hash64.h>
+#include <asm/pte-common.h>
-/* Some other useful definitions */
-#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
-#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
-
-/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
- * pgprot changes
- */
-#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
- _PAGE_ACCESSED | _PAGE_SPECIAL)
-
-#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
-#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
-
-
-/* Permission masks used to generate the __P and __S table,
- *
- * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
- */
-#define PAGE_NONE __pgprot(_PAGE_BASE)
-#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
-#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
-#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-
-/* Permission masks used for kernel mappings */
-#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
-#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
- _PAGE_NO_CACHE)
-#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
- _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
-#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
-#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
-
-/* Protection bits for use by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
- _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
- _PAGE_4K_PFN | _PAGE_USER | _PAGE_RW | \
- _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
-
-
-/* We always have _PAGE_SPECIAL on 64 bit */
-#define __HAVE_ARCH_PTE_SPECIAL
-
-
-/*
- * POWER4 and newer have per page execute protection, older chips can only
- * do this on a segment (256MB) basis.
- *
- * Also, write permissions imply read permissions.
- * This is the closest we can get..
- *
- * Note due to the way vm flags are laid out, the bits are XWR
- */
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY
-#define __P100 PAGE_READONLY_X
-#define __P101 PAGE_READONLY_X
-#define __P110 PAGE_COPY_X
-#define __P111 PAGE_COPY_X
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED
-#define __S100 PAGE_READONLY_X
-#define __S101 PAGE_READONLY_X
-#define __S110 PAGE_SHARED_X
-#define __S111 PAGE_SHARED_X
#ifdef CONFIG_PPC_MM_SLICES
#define HAVE_ARCH_UNMAPPED_AREA
@@ -194,34 +122,8 @@
#endif /* __real_pte */
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- *
- * mk_pte takes a (struct page *) as input
- */
-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
-
-static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
-{
- pte_t pte;
-
-
- pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
- return pte;
-}
-
-#define pte_modify(_pte, newprot) \
- (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
-
-#define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
-#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
-
/* pte_clear moved to later in this file */
-#define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-
#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
@@ -269,36 +171,6 @@ static inline pte_t pfn_pte(unsigned lon
/* This now only contains the vmalloc pages */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
-static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
-static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
-static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
-static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
-
-static inline pte_t pte_wrprotect(pte_t pte) {
- pte_val(pte) &= ~(_PAGE_RW); return pte; }
-static inline pte_t pte_mkclean(pte_t pte) {
- pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
-static inline pte_t pte_mkold(pte_t pte) {
- pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkwrite(pte_t pte) {
- pte_val(pte) |= _PAGE_RW; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte) {
- pte_val(pte) |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte) {
- pte_val(pte) |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkhuge(pte_t pte) {
- return pte; }
-static inline pte_t pte_mkspecial(pte_t pte) {
- pte_val(pte) |= _PAGE_SPECIAL; return pte; }
-static inline pgprot_t pte_pgprot(pte_t pte)
-{
- return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
-}
/* Atomic PTE updates */
static inline unsigned long pte_update(struct mm_struct *mm,
Index: linux-work/arch/powerpc/include/asm/pgtable.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pgtable.h 2009-03-02 16:11:50.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pgtable.h 2009-03-02 16:17:52.000000000 +1100
@@ -25,12 +25,57 @@ static inline void assert_pte_locked(str
# include <asm/pgtable-ppc32.h>
#endif
-/* Special mapping for AGP */
-#define PAGE_AGP (PAGE_KERNEL_NC)
-#define HAVE_PAGE_AGP
-
#ifndef __ASSEMBLY__
+/* Generic accessors to PTE bits */
+static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
+static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
+static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
+static inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; }
+static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
+static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
+
+/* Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ *
+ * Even if PTEs can be unsigned long long, a PFN is always an unsigned
+ * long for now.
+ */
+static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) {
+ return __pte((pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot)); }
+static inline unsigned long pte_pfn(pte_t pte) {
+ return pte_val(pte) >> PTE_RPN_SHIFT; }
+
+/* Keep these as a macros to avoid include dependency mess */
+#define pte_page(x) pfn_to_page(pte_pfn(x))
+#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
+
+/* Generic modifiers for PTE bits */
+static inline pte_t pte_wrprotect(pte_t pte) {
+ pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
+static inline pte_t pte_mkclean(pte_t pte) {
+ pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
+static inline pte_t pte_mkold(pte_t pte) {
+ pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkwrite(pte_t pte) {
+ pte_val(pte) |= _PAGE_RW; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte) {
+ pte_val(pte) |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte) {
+ pte_val(pte) |= _PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkspecial(pte_t pte) {
+ pte_val(pte) |= _PAGE_SPECIAL; return pte; }
+static inline pte_t pte_mkhuge(pte_t pte) {
+ return pte; }
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
+ return pte;
+}
+
+
/* Insert a PTE, top-level function is out of line. It uses an inline
* low level function in the respective pgtable-* files
*/
Index: linux-work/arch/powerpc/include/asm/pte-common.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-work/arch/powerpc/include/asm/pte-common.h 2009-03-02 16:20:02.000000000 +1100
@@ -0,0 +1,177 @@
+/* Included from asm/pgtable-*.h only ! */
+
+/*
+ * Some bits are only used on some cpu families... Make sure that all
+ * the undefined gets a sensible default
+ */
+#ifndef _PAGE_HASHPTE
+#define _PAGE_HASHPTE 0
+#endif
+#ifndef _PAGE_SHARED
+#define _PAGE_SHARED 0
+#endif
+#ifndef _PAGE_HWWRITE
+#define _PAGE_HWWRITE 0
+#endif
+#ifndef _PAGE_HWEXEC
+#define _PAGE_HWEXEC 0
+#endif
+#ifndef _PAGE_EXEC
+#define _PAGE_EXEC 0
+#endif
+#ifndef _PAGE_ENDIAN
+#define _PAGE_ENDIAN 0
+#endif
+#ifndef _PAGE_COHERENT
+#define _PAGE_COHERENT 0
+#endif
+#ifndef _PAGE_WRITETHRU
+#define _PAGE_WRITETHRU 0
+#endif
+#ifndef _PAGE_SPECIAL
+#define _PAGE_SPECIAL 0
+#endif
+#ifndef _PAGE_4K_PFN
+#define _PAGE_4K_PFN 0
+#endif
+#ifndef _PAGE_PSIZE
+#define _PAGE_PSIZE 0
+#endif
+#ifndef _PMD_PRESENT_MASK
+#define _PMD_PRESENT_MASK _PMD_PRESENT
+#endif
+#ifndef _PMD_SIZE
+#define _PMD_SIZE 0
+#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
+#endif
+#ifndef _PAGE_KERNEL_RO
+#define _PAGE_KERNEL_RO 0
+#endif
+#ifndef _PAGE_KERNEL_RW
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
+#endif
+#ifndef _PAGE_HPTEFLAGS
+#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
+#endif
+#ifndef _PTE_NONE_MASK
+#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
+#endif
+
+/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
+ * kernel without large page PMD support
+ */
+#ifndef __ASSEMBLY__
+extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
+#endif /* __ASSEMBLY__ */
+
+/* Location of the PFN in the PTE. Most 32-bit platforms use the same
+ * as _PAGE_SHIFT here (ie, naturally aligned).
+ * Platform who don't just pre-define the value so we don't override it here
+ */
+#ifndef PTE_RPN_SHIFT
+#define PTE_RPN_SHIFT (PAGE_SHIFT)
+#endif
+
+/* The mask convered by the RPN must be a ULL on 32-bit platforms with
+ * 64-bit PTEs
+ */
+#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
+#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
+#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
+#else
+#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
+#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
+#endif
+
+/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
+ * pgprot changes
+ */
+#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
+ _PAGE_ACCESSED | _PAGE_SPECIAL)
+
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+ _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
+ _PAGE_USER | _PAGE_ACCESSED | \
+ _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
+ _PAGE_EXEC | _PAGE_HWEXEC)
+
+/*
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
+ */
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
+#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
+#else
+#define _PAGE_BASE (_PAGE_BASE_NC)
+#endif
+
+/* Permission masks used to generate the __P and __S table,
+ *
+ * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
+ *
+ * Write permissions imply read permissions for now (we could make write-only
+ * pages on BookE but we don't bother for now). Execute permission control is
+ * possible on platforms that define _PAGE_EXEC
+ *
+ * Note due to the way vm flags are laid out, the bits are XWR
+ */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+
+#define __P000 PAGE_NONE
+#define __P001 PAGE_READONLY
+#define __P010 PAGE_COPY
+#define __P011 PAGE_COPY
+#define __P100 PAGE_READONLY_X
+#define __P101 PAGE_READONLY_X
+#define __P110 PAGE_COPY_X
+#define __P111 PAGE_COPY_X
+
+#define __S000 PAGE_NONE
+#define __S001 PAGE_READONLY
+#define __S010 PAGE_SHARED
+#define __S011 PAGE_SHARED
+#define __S100 PAGE_READONLY_X
+#define __S101 PAGE_READONLY_X
+#define __S110 PAGE_SHARED_X
+#define __S111 PAGE_SHARED_X
+
+/* Permission masks used for kernel mappings */
+#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
+#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE)
+#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
+#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
+#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
+
+/* Protection used for kernel text. We want the debuggers to be able to
+ * set breakpoints anywhere, so don't write protect the kernel text
+ * on platforms where such control is possible.
+ */
+#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
+ defined(CONFIG_KPROBES)
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
+#else
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
+#endif
+
+/* Advertise special mapping type for AGP */
+#define PAGE_AGP (PAGE_KERNEL_NC)
+#define HAVE_PAGE_AGP
+
+/* Advertise support for _PAGE_SPECIAL */
+#ifdef _PAGE_SPECIAL
+#define __HAVE_ARCH_PTE_SPECIAL
+#endif
+
^ permalink raw reply
* [PATCH] powerpc/mm: Tweak PTE bit combination definitions
From: Benjamin Herrenschmidt @ 2009-03-02 6:22 UTC (permalink / raw)
To: linuxppc-dev
This patch tweaks the way some PTE bit combinations are defined, in such a
way that the 32 and 64-bit variant become almost identical and that will
make it easier to bring in a new common pte-* file for the new variant
of the Book3-E support.
The combination of bits defining access to kernel pages are now clearly
separated from the combination used by userspace and the core VM. The
resulting generated code should remain identical unless I made a mistake.
Note: While at it, I removed a non-sensical statement related to CONFIG_KGDB
in ppc_mmu_32.c which could cause kernel mappings to be user accessible when
that option is enabled. Probably something that bitrot.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/fixmap.h | 2
arch/powerpc/include/asm/pgtable-ppc32.h | 105 +++----------------------------
arch/powerpc/include/asm/pgtable-ppc64.h | 44 +++++++-----
arch/powerpc/include/asm/pgtable.h | 4 +
arch/powerpc/include/asm/pte-8xx.h | 3
arch/powerpc/include/asm/pte-hash32.h | 1
arch/powerpc/include/asm/pte-hash64-4k.h | 3
arch/powerpc/include/asm/pte-hash64.h | 47 +++++++------
arch/powerpc/mm/fsl_booke_mmu.c | 2
arch/powerpc/mm/pgtable_32.c | 4 -
arch/powerpc/mm/ppc_mmu_32.c | 10 --
arch/powerpc/sysdev/cpm_common.c | 2
12 files changed, 79 insertions(+), 148 deletions(-)
--- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc64.h 2009-03-02 13:41:49.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pgtable-ppc64.h 2009-03-02 16:11:50.000000000 +1100
@@ -81,11 +81,6 @@
*/
#include <asm/pte-hash64.h>
-/* To make some generic powerpc code happy */
-#ifndef _PAGE_HWEXEC
-#define _PAGE_HWEXEC 0
-#endif
-
/* Some other useful definitions */
#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
@@ -96,24 +91,38 @@
#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
_PAGE_ACCESSED | _PAGE_SPECIAL)
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
-/* __pgprot defined in arch/powerpc/include/asm/page.h */
-#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
-
-#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
-#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
+/* Permission masks used to generate the __P and __S table,
+ *
+ * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
+ */
+#define PAGE_NONE __pgprot(_PAGE_BASE)
+#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
-#define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
- _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
-#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
-#define HAVE_PAGE_AGP
+/* Permission masks used for kernel mappings */
+#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
+#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE)
+#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
+#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
+#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
+
+/* Protection bits for use by pte_pgprot() */
+#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
+ _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
+ _PAGE_4K_PFN | _PAGE_USER | _PAGE_RW | \
+ _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
+
/* We always have _PAGE_SPECIAL on 64 bit */
#define __HAVE_ARCH_PTE_SPECIAL
@@ -395,7 +404,8 @@ static inline void pte_clear(struct mm_s
static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
{
unsigned long bits = pte_val(entry) &
- (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
+ (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW |
+ _PAGE_EXEC | _PAGE_HWEXEC);
unsigned long old, tmp;
__asm__ __volatile__(
Index: linux-work/arch/powerpc/include/asm/pte-hash64-4k.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pte-hash64-4k.h 2009-03-02 13:41:49.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pte-hash64-4k.h 2009-03-02 13:56:54.000000000 +1100
@@ -8,9 +8,6 @@
#define _PAGE_F_GIX _PAGE_GROUP_IX
#define _PAGE_SPECIAL 0x10000 /* software: special page */
-/* There is no 4K PFN hack on 4K pages */
-#define _PAGE_4K_PFN 0
-
/* PTE flags to conserve for HPTE identification */
#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
_PAGE_SECONDARY | _PAGE_GROUP_IX)
Index: linux-work/arch/powerpc/include/asm/pte-hash64.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pte-hash64.h 2009-03-02 13:41:49.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pte-hash64.h 2009-03-02 13:56:54.000000000 +1100
@@ -6,36 +6,41 @@
* Common bits between 4K and 64K pages in a linux-style PTE.
* These match the bits in the (hardware-defined) PowerPC PTE as closely
* as possible. Additional bits may be defined in pgtable-hash64-*.h
+ *
+ * Note: We only support user read/write permissions. Supervisor always
+ * have full read/write to pages above PAGE_OFFSET (pages below that
+ * always use the user access permissions).
+ *
+ * We could create separate kernel read-only if we used the 3 PP bits
+ * combinations that newer processors provide but we currently don't.
*/
-#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
-#define _PAGE_USER 0x0002 /* matches one of the PP bits */
-#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
-#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
-#define _PAGE_GUARDED 0x0008
-#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
-#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
-#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
-#define _PAGE_DIRTY 0x0080 /* C: page changed */
-#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
-#define _PAGE_RW 0x0200 /* software: user write access allowed */
-#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
+#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
+#define _PAGE_USER 0x0002 /* matches one of the PP bits */
+#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
+#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
+#define _PAGE_GUARDED 0x0008
+#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
+#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
+#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
+#define _PAGE_DIRTY 0x0080 /* C: page changed */
+#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
+#define _PAGE_RW 0x0200 /* software: user write access allowed */
+#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
+
+/* No separate kernel read-only */
+#define _PAGE_KERNEL_RW (_PAGE_RW | _PAGE_DIRTY) /* user access blocked by key */
+#define _PAGE_KERNEL_RO _PAGE_KERNEL_RW
/* Strong Access Ordering */
-#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
+#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
-#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
-
-#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
+/* No page size encoding in the linux PTE */
+#define _PAGE_PSIZE 0
/* PTEIDX nibble */
#define _PTEIDX_SECONDARY 0x8
#define _PTEIDX_GROUP_IX 0x7
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
- _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
- _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
- _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
-
#ifdef CONFIG_PPC_64K_PAGES
#include <asm/pte-hash64-64k.h>
Index: linux-work/arch/powerpc/include/asm/pgtable-ppc32.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 14:01:44.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pgtable-ppc32.h 2009-03-02 16:11:50.000000000 +1100
@@ -103,79 +103,6 @@ extern int icache_44x_need_flush;
#endif
/*
- * Some bits are only used on some cpu families... Make sure that all
- * the undefined gets defined as 0
- */
-#ifndef _PAGE_HASHPTE
-#define _PAGE_HASHPTE 0
-#endif
-#ifndef _PTE_NONE_MASK
-#define _PTE_NONE_MASK 0
-#endif
-#ifndef _PAGE_SHARED
-#define _PAGE_SHARED 0
-#endif
-#ifndef _PAGE_HWWRITE
-#define _PAGE_HWWRITE 0
-#endif
-#ifndef _PAGE_HWEXEC
-#define _PAGE_HWEXEC 0
-#endif
-#ifndef _PAGE_EXEC
-#define _PAGE_EXEC 0
-#endif
-#ifndef _PAGE_ENDIAN
-#define _PAGE_ENDIAN 0
-#endif
-#ifndef _PAGE_COHERENT
-#define _PAGE_COHERENT 0
-#endif
-#ifndef _PAGE_WRITETHRU
-#define _PAGE_WRITETHRU 0
-#endif
-#ifndef _PAGE_SPECIAL
-#define _PAGE_SPECIAL 0
-#endif
-#ifndef _PMD_PRESENT_MASK
-#define _PMD_PRESENT_MASK _PMD_PRESENT
-#endif
-#ifndef _PMD_SIZE
-#define _PMD_SIZE 0
-#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
-#endif
-
-#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
-
-/* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT
- * here (ie, naturally aligned). Platform who don't just pre-define the
- * value so we don't override it here
- */
-#ifndef PTE_RPN_SHIFT
-#define PTE_RPN_SHIFT (PAGE_SHIFT)
-#endif
-
-#ifdef CONFIG_PTE_64BIT
-#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
-#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
-#else
-#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
-#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
-#endif
-
-/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
- * pgprot changes
- */
-#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
- _PAGE_ACCESSED | _PAGE_SPECIAL)
-
-/* Mask of bits returned by pte_pgprot() */
-#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
- _PAGE_WRITETHRU | _PAGE_ENDIAN | \
- _PAGE_USER | _PAGE_ACCESSED | \
- _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
- _PAGE_EXEC | _PAGE_HWEXEC)
-
-/*
* We define 2 sets of base prot bits, one for basic pages (ie,
* cacheable kernel and user pages) and one for non cacheable
* pages. We always set _PAGE_COHERENT when SMP is enabled or
@@ -186,30 +113,25 @@ extern int icache_44x_need_flush;
#else
#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
#endif
-#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_NO_CACHE)
+#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
-#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE)
-#define _PAGE_KERNEL (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE)
-#define _PAGE_KERNEL_NC (_PAGE_BASE_NC | _PAGE_SHARED | _PAGE_WRENABLE)
-
-#ifdef CONFIG_PPC_STD_MMU
-/* On standard PPC MMU, no user access implies kernel read/write access,
- * so to write-protect kernel memory we must turn on user access */
-#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED | _PAGE_USER)
-#else
-#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED)
-#endif
-
-#define _PAGE_IO (_PAGE_KERNEL_NC | _PAGE_GUARDED)
-#define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC)
+/* Permission masks used for kernel mappings */
+#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
+#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE)
+#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+ _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
+#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
+#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
defined(CONFIG_KPROBES)
/* We want the debuggers to be able to set breakpoints anywhere, so
* don't write protect the kernel text */
-#define _PAGE_RAM_TEXT _PAGE_RAM
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
#else
-#define _PAGE_RAM_TEXT (_PAGE_KERNEL_RO | _PAGE_HWEXEC)
+#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
#endif
#define PAGE_NONE __pgprot(_PAGE_BASE)
@@ -220,9 +142,6 @@ extern int icache_44x_need_flush;
#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_KERNEL __pgprot(_PAGE_RAM)
-#define PAGE_KERNEL_NOCACHE __pgprot(_PAGE_IO)
-
/*
* The PowerPC can only do execute protection on a segment (256MB) basis,
* not on a page basis. So we consider execute permission the same as read.
Index: linux-work/arch/powerpc/include/asm/pte-8xx.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pte-8xx.h 2009-03-02 14:22:50.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pte-8xx.h 2009-03-02 14:25:04.000000000 +1100
@@ -59,6 +59,9 @@
/* Until my rework is finished, 8xx still needs atomic PTE updates */
#define PTE_ATOMIC_UPDATES 1
+/* We need to add _PAGE_SHARED to kernel pages */
+#define _PAGE_KERNEL_RO (_PAGE_SHARED)
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_PGTABLE_8xx_H */
Index: linux-work/arch/powerpc/include/asm/pte-hash32.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pte-hash32.h 2009-03-02 14:05:03.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pte-hash32.h 2009-03-02 14:36:37.000000000 +1100
@@ -44,6 +44,5 @@
/* Hash table based platforms need atomic updates of the linux PTE */
#define PTE_ATOMIC_UPDATES 1
-
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_PGTABLE_HASH32_H */
Index: linux-work/arch/powerpc/mm/pgtable_32.c
===================================================================
--- linux-work.orig/arch/powerpc/mm/pgtable_32.c 2009-03-02 14:26:49.000000000 +1100
+++ linux-work/arch/powerpc/mm/pgtable_32.c 2009-03-02 14:44:27.000000000 +1100
@@ -164,7 +164,7 @@ __ioremap_caller(phys_addr_t addr, unsig
/* Make sure we have the base flags */
if ((flags & _PAGE_PRESENT) == 0)
- flags |= _PAGE_KERNEL;
+ flags |= PAGE_KERNEL;
/* Non-cacheable page cannot be coherent */
if (flags & _PAGE_NO_CACHE)
@@ -296,7 +296,7 @@ void __init mapin_ram(void)
p = memstart_addr + s;
for (; s < total_lowmem; s += PAGE_SIZE) {
ktext = ((char *) v >= _stext && (char *) v < etext);
- f = ktext ?_PAGE_RAM_TEXT : _PAGE_RAM;
+ f = ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL;
map_page(v, p, f);
#ifdef CONFIG_PPC_STD_MMU_32
if (ktext)
Index: linux-work/arch/powerpc/mm/ppc_mmu_32.c
===================================================================
--- linux-work.orig/arch/powerpc/mm/ppc_mmu_32.c 2009-03-02 14:37:05.000000000 +1100
+++ linux-work/arch/powerpc/mm/ppc_mmu_32.c 2009-03-02 15:15:36.000000000 +1100
@@ -74,9 +74,6 @@ unsigned long p_mapped_by_bats(phys_addr
unsigned long __init mmu_mapin_ram(void)
{
-#ifdef CONFIG_POWER4
- return 0;
-#else
unsigned long tot, bl, done;
unsigned long max_size = (256<<20);
@@ -95,7 +92,7 @@ unsigned long __init mmu_mapin_ram(void)
break;
}
- setbat(2, PAGE_OFFSET, 0, bl, _PAGE_RAM);
+ setbat(2, PAGE_OFFSET, 0, bl, PAGE_KERNEL_X);
done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1;
if ((done < tot) && !bat_addrs[3].limit) {
/* use BAT3 to cover a bit more */
@@ -103,12 +100,11 @@ unsigned long __init mmu_mapin_ram(void)
for (bl = 128<<10; bl < max_size; bl <<= 1)
if (bl * 2 > tot)
break;
- setbat(3, PAGE_OFFSET+done, done, bl, _PAGE_RAM);
+ setbat(3, PAGE_OFFSET+done, done, bl, PAGE_KERNEL_X);
done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1;
}
return done;
-#endif
}
/*
@@ -136,9 +132,7 @@ void __init setbat(int index, unsigned l
wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp;
-#ifndef CONFIG_KGDB /* want user access for breakpoints */
if (flags & _PAGE_USER)
-#endif
bat[1].batu |= 1; /* Vp = 1 */
if (flags & _PAGE_GUARDED) {
/* G bit must be zero in IBATs */
Index: linux-work/arch/powerpc/sysdev/cpm_common.c
===================================================================
--- linux-work.orig/arch/powerpc/sysdev/cpm_common.c 2009-03-02 14:26:07.000000000 +1100
+++ linux-work/arch/powerpc/sysdev/cpm_common.c 2009-03-02 15:32:45.000000000 +1100
@@ -56,7 +56,7 @@ void __init udbg_init_cpm(void)
{
if (cpm_udbg_txdesc) {
#ifdef CONFIG_CPM2
- setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO);
+ setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG);
#endif
udbg_putc = udbg_putc_cpm;
}
Index: linux-work/arch/powerpc/include/asm/fixmap.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/fixmap.h 2009-03-02 14:43:23.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/fixmap.h 2009-03-02 15:33:15.000000000 +1100
@@ -61,7 +61,7 @@ extern void __set_fixmap (enum fixed_add
* Some hardware wants to get fixmapped without caching.
*/
#define set_fixmap_nocache(idx, phys) \
- __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
+ __set_fixmap(idx, phys, PAGE_KERNEL_NCG)
#define clear_fixmap(idx) \
__set_fixmap(idx, 0, __pgprot(0))
Index: linux-work/arch/powerpc/include/asm/pgtable.h
===================================================================
--- linux-work.orig/arch/powerpc/include/asm/pgtable.h 2009-03-02 15:31:31.000000000 +1100
+++ linux-work/arch/powerpc/include/asm/pgtable.h 2009-03-02 16:11:50.000000000 +1100
@@ -25,6 +25,10 @@ static inline void assert_pte_locked(str
# include <asm/pgtable-ppc32.h>
#endif
+/* Special mapping for AGP */
+#define PAGE_AGP (PAGE_KERNEL_NC)
+#define HAVE_PAGE_AGP
+
#ifndef __ASSEMBLY__
/* Insert a PTE, top-level function is out of line. It uses an inline
Index: linux-work/arch/powerpc/mm/fsl_booke_mmu.c
===================================================================
--- linux-work.orig/arch/powerpc/mm/fsl_booke_mmu.c 2009-03-02 16:12:37.000000000 +1100
+++ linux-work/arch/powerpc/mm/fsl_booke_mmu.c 2009-03-02 16:12:42.000000000 +1100
@@ -162,7 +162,7 @@ unsigned long __init mmu_mapin_ram(void)
phys_addr_t phys = memstart_addr;
while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
- settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], _PAGE_KERNEL, 0);
+ settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], PAGE_KERNEL_X, 0);
virt += cam[tlbcam_index];
phys += cam[tlbcam_index];
tlbcam_index++;
^ permalink raw reply
* Re: [PATCH] powerpc/mpc52xx: add Phytec phyCORE-MPC5200B-IO board (pcm032)
From: Grant Likely @ 2009-03-02 4:33 UTC (permalink / raw)
To: Jon Smirl; +Cc: linuxppc-dev
In-Reply-To: <9e4733910903011819q105a856n163ccd8fee37d980@mail.gmail.com>
On Sun, Mar 1, 2009 at 7:19 PM, Jon Smirl <jonsmirl@gmail.com> wrote:
> Would it be easier to get Pengutronix to release a new u-boot for the
> pcm030? I'm using U-Boot 1.2.0-mpc5200b-tiny-2 (Apr 17 2007 -
> 11:49:20).
Only if it is a chip IO setup problem (like port_config or clock
setup). Otherwise the kernel should be setting up the PCI controller
correctly. Regardless, I don't think the kernel should be crashing
when PCI is in a funny state.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] powerpc/mpc52xx: add Phytec phyCORE-MPC5200B-IO board (pcm032)
From: Jon Smirl @ 2009-03-02 2:19 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <9e4733910903011815q1a956be0x137bac80f2e21e72@mail.gmail.com>
Would it be easier to get Pengutronix to release a new u-boot for the
pcm030? I'm using U-Boot 1.2.0-mpc5200b-tiny-2 (Apr 17 2007 -
11:49:20).
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply
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