* Re: [PATCH 1/3] powerpc: bare minimum checkpoint/restart implementation
From: Oren Laadan @ 2009-03-18 9:15 UTC (permalink / raw)
To: Cedric Le Goater; +Cc: containers, linuxppc-dev, Nathan Lynch, Serge E. Hallyn
In-Reply-To: <49BF4969.3080308@free.fr>
An alternative: the task that created the container namely, is the parent
(outside the container) of the container init(1). In turn, init(1) creates
a special 'monitor' thread that monitors the restart, and the outside task
reaps the exit status of that thread (and only that thread).
[Hmmm... thinking about this - what happens if the container init(1) calls
clone() with CLONE_PARENT ?? does it not generate sort of a competing
container init(1) ??!!
Oren.
Cedric Le Goater wrote:
>> Again, how would 'cr' obtain exit status for these tasks, and how would
>> it distinguish failure from normal operation?
>
> Here's our solution to this issue.
>
> mcr maintains in its kernel container object an exitcode attribute for
> the mcr-restart process. This process is detached from the fork tree of
> the restarted application.
>
> when the restart is finished, an mcr-wait command can be called to reap
> this exitcode. This make it possible to distinguish an exit of the
> application process from an exit of the mcr-restart process.
>
> This is a must-have for batch managers in an HPC environment.
>
> Cheers,
>
> C.
>
^ permalink raw reply
* AW: spidev.c driver on the ppc8247 (kernel 2.6.27.19)
From: Stepanov, Sergej @ 2009-03-18 8:30 UTC (permalink / raw)
To: Daniel Ng, linuxppc-dev@ozlabs.org
In-Reply-To: <547eba1b0903180036m46f6ffc0g521a5081924a2613@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 5738 bytes --]
Hi Daniel,
in the attachment i send a spi driver (little bit "of") done by myself
1.
to init it you can use the following in your dts-file
soc@f0000000 {
...
cpm@119c0 {
...
spi@11AA0 {
device_type = "spi";
compatible = "platform-mapped";
interrupts = <0x3F 8>;
interrupt-parent = <&pic>;
reg = <0x11AA0 0x60 0x89FC 2>;
};
...
}
2.
in driver/spi/Makefile
+obj-$(CONFIG_SPI_IDS8247) += spi_ids8247.o
3.
In driver/spi/Kconfig
config SPI_IDS8247
tristate "Freescale IDS8247 SPI controller"
depends on PPC_82xx && EXPERIMENTAL
help
This enables using the Freescale MPC8247
controllers in master mode.
Note, this driver uniquely supports the SPI controller on the MPC82xx
family of PowerPC processors.
This driver uses a simple set of shift registers for data
(opposed to the CPM based descriptor model).
4.
This version is for 2.6.27 kernel on ppc8247.
May be it help you and would be a bit faster for you.
Best regards
Sergej.
________________________________________
Von: linuxppc-dev-bounces+sergej.stepanov=ids.de@ozlabs.org [linuxppc-dev-bounces+sergej.stepanov=ids.de@ozlabs.org] im Auftrag von Daniel Ng [daniel.ng1234@gmail.com]
Gesendet: Mittwoch, 18. März 2009 08:36
An: linuxppc-dev@ozlabs.org
Betreff: spidev.c driver on the ppc8247 (kernel 2.6.27.19)
Hi,
I'm trying to get the spidev.c driver working in Kernel 2.6.27.19 on a ppc8247.
Firstly, would I need to convert it to an 'of'-style driver?
Assuming this is the case, I've changed spidev_init() to use
of_register_platform_driver() with what I think is an appropriate
parameter:
static struct of_platform_driver spidev_spi = {
.name = "spidev",
.match_table = spidev_match,
.probe = spidev_probe,
.remove = __devexit_p(spidev_remove),
};
spidev_probe() now looks like the below. I've had to change the
spidev_probe() function signature, which meant I needed to use
to_spi_device() in the function (there are no other changes).
static int __devinit spidev_probe(struct of_device *ofdev, const
struct of_device_id *match)
{
struct spidev_data *spidev;
int status;
unsigned long minor;
struct spi_device *spi;
spi = to_spi_device(&ofdev->dev);
/* Allocate driver data */
spidev = kzalloc(sizeof(*spidev), GFP_KERNEL);
if (!spidev)
return -ENOMEM;
/* Initialize the driver data */
spidev->spi = spi;
spin_lock_init(&spidev->spi_lock);
mutex_init(&spidev->buf_lock);
INIT_LIST_HEAD(&spidev->device_entry);
/* If we can allocate a minor number, hook up this device.
* Reusing minors is fine so long as udev or mdev is working.
*/
mutex_lock(&device_list_lock);
minor = find_first_zero_bit(minors, N_SPI_MINORS);
if (minor < N_SPI_MINORS) {
struct device *dev;
spidev->devt = MKDEV(SPIDEV_MAJOR, minor);
dev = device_create_drvdata(spidev_class, &spi->dev,
spidev->devt, spidev,
"spidev%d.%d",
spi->master->bus_num, spi->chip_select);
printk("spidev_probe(): CREATED spidev%d.%d\n",
spi->master->bus_num, spi->chip_select);
status = IS_ERR(dev) ? PTR_ERR(dev) : 0;
.
.
/////// (the rest of this function is unchanged)
.
}
It all executes ok until the above call to device_create_drvdata(),
where it crashes (see below). Can anyone explain why?
Can I still use the 'old-style' device_create_drvdata() function with
the 'of new-style' driver framework?
Am I going about this the right way?
Unable to handle kernel paging request for data at address 0x00000120
Faulting instruction address: 0xc028e484
Oops: Kernel access of bad area, sig: 11 [#1]
PREEMPT XXX
NIP: c028e484 LR: c028e478 CTR: c01511c8
REGS: c1819d60 TRAP: 0300 Not tainted (2.6.27.19-800-OS-03050107)
MSR: 00009032 <EE,ME,IR,DR> CR: 42044024 XER: 00000000
DAR: 00000120, DSISR: 20000000
TASK = c1814400[1] 'swapper' THREAD: c1818000
GPR00: c028e478 c1819e10 c1814400 0000000b 0000150c 0e400000 00000008 c0270000
GPR08: f0000038 00000000 0000150c c1818000 f0000020 fffffffe 01ff8000 00000000
GPR16: 01fed694 01ff56f0 00000000 00000000 00000000 00000000 c02d0000 c184ec10
GPR24: c02d2610 c1963288 c02d260c c02aafa4 00000000 ffffffed c1963280 c184ec10
NIP [c028e484] spidev_probe+0xec/0x1c8
LR [c028e478] spidev_probe+0xe0/0x1c8
Call Trace:
[c1819e10] [c028e478] spidev_probe+0xe0/0x1c8 (unreliable)
[c1819e40] [c01814a4] of_platform_device_probe+0x5c/0x84
[c1819e60] [c01552c8] driver_probe_device+0xe8/0x240
[c1819e90] [c01554a4] __driver_attach+0x84/0x88
[c1819eb0] [c01548fc] bus_for_each_dev+0x5c/0x98
[c1819ee0] [c01550a0] driver_attach+0x24/0x34
[c1819ef0] [c0154eac] bus_add_driver+0x1b4/0x220
[c1819f10] [c01557b4] driver_register+0x5c/0x158
[c1819f30] [c018136c] of_register_driver+0x54/0x70
[c1819f40] [c0289a28] spidev_init+0x6c/0xf8
[c1819f60] [c00038e8] do_one_initcall+0x38/0x188
[c1819fd0] [c0278180] kernel_init+0x8c/0xf8
[c1819ff0] [c000f6fc] kernel_thread+0x44/0x60
Instruction dump:
4be90481 2b83001f 7c7c1b78 419d00d8 64600e40 901e0000 3c60c027 38638f04
4bd8ea31 813f0120 80be0000 3ce0c027 <a9090120> 38e78f10 893f0128 7fe4fb78
---[ end trace 8d59482f3bf88fe6 ]---
Cheers,
Daniel
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: spi_ids8247.c --]
[-- Type: text/x-csrc; name="spi_ids8247.c", Size: 20504 bytes --]
/*
* Simple IDS8247 SPI controller driver
* based on:
* MPC83xx SPI controller driver.
* from Kumar Gala
*
* Copyright (C) 2008 IDS GmbH.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/platform_device.h>
#include <linux/fsl_devices.h>
#include <linux/dma-mapping.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/cpm2.h>
/* SPI Controller registers */
struct ids8247_spi_reg {
__be16 mode; /* 0x11AA0 */
__be32 rsv1; /* 0x11AA2 */
__be16 event; /* 0x11AA6 */
__be16 rsv2; /* 0x11AA8 */
__be16 mask; /* 0x11AAA */
__be16 rsv3; /* 0x11AAC */
__be16 command; /* 0x11AAD */
};
/*
* Default for SPI Mode:
* SPI MODE 0 (inactive low, phase middle, MSB, 8-bit length, slow clk
*/
#define SPMODE_INIT_VAL (SPMODE_CI | SPMODE_CP | \
SPMODE_DIV16 | SPMODE_REV | \
SPMODE_MSTR | SPMODE_LEN(7) | SPMODE_PM(0x4))
/* SPIE register values */
#define SPIE_NE 0x0200 /* Not empty */
#define SPIE_NF 0x0100 /* Not full */
/* SPIM register values */
#define SPIM_NE 0x0200 /* Not empty */
#define SPIM_NF 0x0100 /* Not full */
#define MAX_RXBUFFS 8
#define MAX_TXBUFFS 8
#define MAX_LEN 512
struct spi_ram{
u16 rxbase; /* 0x00 */
u16 txbase; /* 0x02 */
u8 rfcr; /* 0x04 */
u8 tfcr; /* 0x05 */
u16 mrblr; /* 0x06 */
u32 rstate; /* 0x08 */
u32 cpuse1; /* 0x0c */
u16 rbptr; /* 0x10 */
u16 cpuse2; /* 0x12 */
u32 cpuse3; /* 0x14 */
u32 tstate; /* 0x18 */
u32 cpuse4; /* 0x1c */
u16 tbptr; /* 0x20 */
u16 cpuse5; /* 0x22 */
u32 cpuse[5]; /* 0x24-0x38 */
/* extra for bd of tx and rx */
};
/* SPI Controller driver's private data. */
struct ids8247_spi {
struct ids8247_spi_reg __iomem *base;
void __iomem *dpram;
struct spi_ram __iomem *spi_dpram;
/* rx & tx bufs from the spi_transfer */
// const void *tx;
// void *rx;
cbd_t __iomem *tx_vbase;
cbd_t __iomem *rx_vbase;
u8* rxbuf[MAX_RXBUFFS];
u8* txbuf[MAX_TXBUFFS];
u32 rxdma[MAX_RXBUFFS];
u32 txdma[MAX_TXBUFFS];
/* functions to deal with different sized buffers */
void (*get_rx) (u32 rx_data, struct ids8247_spi *);
u32(*get_tx) (struct ids8247_spi *);
unsigned int count;
int irq;
unsigned nsecs; /* (clock cycle time)/2 */
u32 spibrg; /* SPIBRG input clock */
u32 rxindex;
u32 txindex;
// u32 rx_shift; /* RX data reg shift when in qe mode */
// u32 tx_shift; /* TX data reg shift when in qe mode */
void (*activate_cs) (u8 cs, u8 polarity);
void (*deactivate_cs) (u8 cs, u8 polarity);
u8 busy;
struct workqueue_struct *workqueue;
struct work_struct work;
struct list_head queue;
spinlock_t lock;
struct completion done;
};
struct spi_ids8247_cs {
/* functions to deal with different sized buffers */
void (*get_rx) (u32 rx_data, struct ids8247_spi *);
u32 (*get_tx) (struct ids8247_spi *);
u32 rx_shift; /* RX data reg shift when in qe mode */
u32 tx_shift; /* TX data reg shift when in qe mode */
u32 hw_mode; /* Holds HW mode register settings */
};
static inline void ids8247_spi_write_reg16(__be16 __iomem * reg, u16 val)
{
out_be16(reg, val);
}
static inline u16 ids8247_spi_read_reg16(__be16 __iomem * reg)
{
return in_be16(reg);
}
static inline void ids8247_spi_write_reg(__be32 __iomem * reg, u32 val)
{
out_be32(reg, val);
}
static inline u32 ids8247_spi_read_reg(__be32 __iomem * reg)
{
return in_be32(reg);
}
#if 0
#define IDS8247_SPI_RX_BUF(type) \
void ids8247_spi_rx_buf_##type(u32 data, struct ids8247_spi *ids8247_spi) \
{ \
type * rx = (type*)ids8247_spi->rxbuf; \
*rx++ = (type)(data >> ids8247_spi->rx_shift); \
ids8247_spi->rxbuf = (u8*)rx; \
}
#define IDS8247_SPI_TX_BUF(type) \
u32 ids8247_spi_tx_buf_##type(struct ids8247_spi *ids8247_spi) \
{ \
u32 data; \
const type * tx = (type*)ids8247_spi->txbuf; \
if (!tx) \
return 0; \
data = *tx++ << ids8247_spi->tx_shift; \
ids8247_spi->txbuf = (u8*)tx; \
return data; \
}
IDS8247_SPI_RX_BUF(u8)
IDS8247_SPI_RX_BUF(u16)
IDS8247_SPI_RX_BUF(u32)
IDS8247_SPI_TX_BUF(u8)
IDS8247_SPI_TX_BUF(u16)
IDS8247_SPI_TX_BUF(u32)
#endif
static void ids8247_spi_chipselect(struct spi_device *spi, int value)
{
struct ids8247_spi *ids8247_spi;
u8 pol = spi->mode & SPI_CS_HIGH ? 1 : 0;
struct spi_ids8247_cs *cs = spi->controller_state;
ids8247_spi = spi_master_get_devdata(spi->master);
if (value == BITBANG_CS_INACTIVE) {
if (ids8247_spi->deactivate_cs)
ids8247_spi->deactivate_cs(spi->chip_select, pol);
}
if (value == BITBANG_CS_ACTIVE) {
u32 regval = ids8247_spi_read_reg16(&ids8247_spi->base->mode);
//ids8247_spi->rx_shift = cs->rx_shift;
//ids8247_spi->tx_shift = cs->tx_shift;
ids8247_spi->get_rx = cs->get_rx;
ids8247_spi->get_tx = cs->get_tx;
if (cs->hw_mode != regval) {
unsigned long flags;
void *tmp_ptr = &ids8247_spi->base->mode;
regval = cs->hw_mode;
/* Turn off IRQs locally to minimize time that
* SPI is disabled
*/
local_irq_save(flags);
/* Turn off SPI unit prior changing mode */
ids8247_spi_write_reg(tmp_ptr, regval & ~SPMODE_EN);
ids8247_spi_write_reg(tmp_ptr, regval);
local_irq_restore(flags);
}
if (ids8247_spi->activate_cs)
ids8247_spi->activate_cs(spi->chip_select, pol);
}
}
static
int ids8247_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
{
struct ids8247_spi *ids8247_spi;
u32 regval;
u8 bits_per_word, pm;
u32 hz;
struct spi_ids8247_cs *cs = spi->controller_state;
ids8247_spi = spi_master_get_devdata(spi->master);
if (t) {
bits_per_word = t->bits_per_word;
hz = t->speed_hz;
} else {
bits_per_word = 0;
hz = 0;
}
/* spi_transfer level calls that work per-word */
if (!bits_per_word)
bits_per_word = spi->bits_per_word;
/* Make sure its a bit width we support [4..16, 32] */
if ((bits_per_word < 4)
|| ((bits_per_word > 16) && (bits_per_word != 32)))
return -EINVAL;
if (!hz)
hz = spi->max_speed_hz;
cs->rx_shift = 0;
cs->tx_shift = 0;
if (bits_per_word <= 8) {
//cs->get_rx = ids8247_spi_rx_buf_u8;
//cs->get_tx = ids8247_spi_tx_buf_u8;
}
#if 0
else if (bits_per_word <= 16) {
cs->get_rx = ids8247_spi_rx_buf_u16;
cs->get_tx = ids8247_spi_tx_buf_u16;
} else if (bits_per_word <= 32) {
cs->get_rx = ids8247_spi_rx_buf_u32;
cs->get_tx = ids8247_spi_tx_buf_u32;
} else
return -EINVAL;
#endif
//ids8247_spi->rx_shift = cs->rx_shift;
//ids8247_spi->tx_shift = cs->tx_shift;
ids8247_spi->get_rx = cs->get_rx;
ids8247_spi->get_tx = cs->get_tx;
if (bits_per_word == 32)
bits_per_word = 0;
else
bits_per_word = bits_per_word - 1;
/* mask out bits we are going to set */
cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16
| SPMODE_PM(0xF));
cs->hw_mode |= SPMODE_LEN(bits_per_word);
if ((ids8247_spi->spibrg / hz) > 64) {
cs->hw_mode |= SPMODE_DIV16;
pm = ids8247_spi->spibrg / (hz * 64);
if (pm > 16) {
dev_err(&spi->dev, "Requested speed is too "
"low: %d Hz. Will use %d Hz instead.\n",
hz, ids8247_spi->spibrg / 1024);
pm = 16;
}
} else
pm = ids8247_spi->spibrg / (hz * 4);
if (pm)
pm--;
cs->hw_mode |= SPMODE_PM(pm);
regval = ids8247_spi_read_reg16(&ids8247_spi->base->mode);
if (cs->hw_mode != regval) {
unsigned long flags;
void *tmp_ptr = &ids8247_spi->base->mode;
regval = cs->hw_mode;
/* Turn off IRQs locally to minimize time
* that SPI is disabled
*/
local_irq_save(flags);
/* Turn off SPI unit prior changing mode */
ids8247_spi_write_reg(tmp_ptr, regval & ~SPMODE_EN);
ids8247_spi_write_reg(tmp_ptr, regval);
local_irq_restore(flags);
}
return 0;
}
static int ids8247_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
{
struct ids8247_spi *ids8247_spi;
u32 word, len, bits_per_word;
ids8247_spi = spi_master_get_devdata(spi->master);
memcpy(ids8247_spi->txbuf[ids8247_spi->txindex], t->tx_buf, t->len);
memcpy(t->rx_buf, ids8247_spi->rxbuf[ids8247_spi->rxindex], t->len);
bits_per_word = spi->bits_per_word;
if (t->bits_per_word)
bits_per_word = t->bits_per_word;
len = t->len;
if (bits_per_word > 8) {
/* invalid length? */
if (len & 1)
return -EINVAL;
len /= 2;
}
if (bits_per_word > 16) {
/* invalid length? */
if (len & 1)
return -EINVAL;
len /= 2;
}
ids8247_spi->count = len;
INIT_COMPLETION(ids8247_spi->done);
setbits16( &ids8247_spi->tx_vbase[ids8247_spi->txindex].cbd_sc,
BD_SC_READY | BD_SC_LAST);
out_be16( &ids8247_spi->tx_vbase[ids8247_spi->txindex].cbd_datlen, t->len);
/* enable rx ints */
ids8247_spi_write_reg16(&ids8247_spi->base->mask, SPIM_NE);
setbits16(&ids8247_spi->base,
/* transmit word */
wait_for_completion(&ids8247_spi->done);
/* disable rx ints */
ids8247_spi_write_reg16(&ids8247_spi->base->mask, 0);
return ids8247_spi->count;
}
static void ids8247_spi_work(struct work_struct *work)
{
struct ids8247_spi *ids8247_spi =
container_of(work, struct ids8247_spi, work);
spin_lock_irq(&ids8247_spi->lock);
ids8247_spi->busy = 1;
while (!list_empty(&ids8247_spi->queue)) {
struct spi_message *m;
struct spi_device *spi;
struct spi_transfer *t = NULL;
unsigned cs_change;
int status, nsecs = 50;
m = container_of(ids8247_spi->queue.next,
struct spi_message, queue);
list_del_init(&m->queue);
spin_unlock_irq(&ids8247_spi->lock);
spi = m->spi;
cs_change = 1;
status = 0;
list_for_each_entry(t, &m->transfers, transfer_list) {
if (t->bits_per_word || t->speed_hz) {
/* Don't allow changes if CS is active */
status = -EINVAL;
if (cs_change)
status = ids8247_spi_setup_transfer(spi, t);
if (status < 0)
break;
}
if (cs_change)
ids8247_spi_chipselect(spi, BITBANG_CS_ACTIVE);
cs_change = t->cs_change;
if (t->len)
status = ids8247_spi_bufs(spi, t);
if (status) {
status = -EMSGSIZE;
break;
}
m->actual_length += t->len;
if (t->delay_usecs)
udelay(t->delay_usecs);
if (cs_change) {
ndelay(nsecs);
ids8247_spi_chipselect(spi, BITBANG_CS_INACTIVE);
ndelay(nsecs);
}
}
m->status = status;
m->complete(m->context);
if (status || !cs_change) {
ndelay(nsecs);
ids8247_spi_chipselect(spi, BITBANG_CS_INACTIVE);
}
ids8247_spi_setup_transfer(spi, NULL);
spin_lock_irq(&ids8247_spi->lock);
}
ids8247_spi->busy = 0;
spin_unlock_irq(&ids8247_spi->lock);
}
/* the spi->mode bits understood by this driver: */
#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
| SPI_LSB_FIRST | SPI_LOOP)
static int ids8247_spi_setup(struct spi_device *spi)
{
struct ids8247_spi *ids8247_spi;
int retval;
u32 hw_mode;
struct spi_ids8247_cs *cs = spi->controller_state;
if (spi->mode & ~MODEBITS) {
dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
spi->mode & ~MODEBITS);
return -EINVAL;
}
if (!spi->max_speed_hz)
return -EINVAL;
if (!cs) {
cs = kzalloc(sizeof *cs, GFP_KERNEL);
if (!cs)
return -ENOMEM;
spi->controller_state = cs;
}
ids8247_spi = spi_master_get_devdata(spi->master);
if (!spi->bits_per_word)
spi->bits_per_word = 8;
hw_mode = cs->hw_mode; /* Save orginal settings */
cs->hw_mode = ids8247_spi_read_reg16(&ids8247_spi->base->mode);
/* mask out bits we are going to set */
cs->hw_mode &= ~(SPMODE_CP | SPMODE_CI
| SPMODE_REV | SPMODE_LOOP);
if (spi->mode & SPI_CPHA)
cs->hw_mode |= SPMODE_CP;
if (spi->mode & SPI_CPOL)
cs->hw_mode |= SPMODE_CI;
if (!(spi->mode & SPI_LSB_FIRST))
cs->hw_mode |= SPMODE_REV;
if (spi->mode & SPI_LOOP)
cs->hw_mode |= SPMODE_LOOP;
retval = ids8247_spi_setup_transfer(spi, NULL);
if (retval < 0) {
cs->hw_mode = hw_mode; /* Restore settings */
return retval;
}
dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u Hz\n",
__func__, spi->mode & (SPI_CPOL | SPI_CPHA),
spi->bits_per_word, spi->max_speed_hz);
#if 0 /* Don't think this is needed */
/* NOTE we _need_ to call chipselect() early, ideally with adapter
* setup, unless the hardware defaults cooperate to avoid confusion
* between normal (active low) and inverted chipselects.
*/
/* deselect chip (low or high) */
spin_lock(&ids8247_spi->lock);
if (!ids8247_spi->busy)
ids8247_spi_chipselect(spi, BITBANG_CS_INACTIVE);
spin_unlock(&ids8247_spi->lock);
#endif
return 0;
}
irqreturn_t ids8247_spi_irq(s32 irq, void *context_data)
{
struct ids8247_spi *ids8247_spi = context_data;
u32 event;
irqreturn_t ret = IRQ_NONE;
/* Get interrupt events(tx/rx) */
event = ids8247_spi_read_reg16(&ids8247_spi->base->event);
/* We need handle RX first */
if (event & SPIE_NE) {
/* !!! u32 rx_data = ids8247_spi_read_reg(&ids8247_spi->base->receive);
if (ids8247_spi->rx)
ids8247_spi->get_rx(rx_data, ids8247_spi);*/
//out_be(ids8247_spi->rx_vbase[ids8247_spi->rxinidex],cbd_sc, BD_SC_EMPTY);
ids8247_spi->rxindex = (ids8247_spi->rxindex++) % MAX_RXBUFFS;
ret = IRQ_HANDLED;
}
if ((event & SPIE_NF) == 0)
/* spin until TX is done */
while (((event =
ids8247_spi_read_reg16(&ids8247_spi->base->event)) &
SPIE_NF) == 0)
cpu_relax();
ids8247_spi->count -= 1;
if (ids8247_spi->count) {
// u32 word = ids8247_spi->get_tx(ids8247_spi);
// !!! ids8247_spi_write_reg(&ids8247_spi->base->transmit, word);
ids8247_spi->txindex = (ids8247_spi->txindex++) % MAX_RXBUFFS;
} else {
complete(&ids8247_spi->done);
}
/* Clear the events */
ids8247_spi_write_reg16(&ids8247_spi->base->event, event);
return ret;
}
static int ids8247_spi_transfer(struct spi_device *spi,
struct spi_message *m)
{
struct ids8247_spi *ids8247_spi = spi_master_get_devdata(spi->master);
unsigned long flags;
m->actual_length = 0;
m->status = -EINPROGRESS;
spin_lock_irqsave(&ids8247_spi->lock, flags);
list_add_tail(&m->queue, &ids8247_spi->queue);
queue_work(ids8247_spi->workqueue, &ids8247_spi->work);
spin_unlock_irqrestore(&ids8247_spi->lock, flags);
return 0;
}
static void ids8247_spi_cleanup(struct spi_device *spi)
{
kfree(spi->controller_state);
}
static int __init ids8247_spi_probe(struct platform_device *dev)
{
struct spi_master *master;
struct ids8247_spi *ids8247_spi;
struct fsl_spi_platform_data *pdata;
struct resource *r;
cbd_t __iomem *tbdf;
cbd_t __iomem *rbdf;
u32 regval;
int ret = 0, i;
unsigned long dpramoffset = 0, dprxtxoffsave = 0;
/* Get resources(memory, IRQ) associated with the device */
master = spi_alloc_master(&dev->dev, sizeof(struct ids8247_spi));
if (master == NULL) {
ret = -ENOMEM;
goto err;
}
platform_set_drvdata(dev, master);
pdata = dev->dev.platform_data;
if (pdata == NULL) {
ret = -ENODEV;
goto free_master;
}
r = platform_get_resource(dev, IORESOURCE_MEM, 0);
if (r == NULL) {
ret = -ENODEV;
goto free_master;
}
master->setup = ids8247_spi_setup;
master->transfer = ids8247_spi_transfer;
master->cleanup = ids8247_spi_cleanup;
ids8247_spi = spi_master_get_devdata(master);
ids8247_spi->activate_cs = pdata->activate_cs;
ids8247_spi->deactivate_cs = pdata->deactivate_cs;
ids8247_spi->spibrg = pdata->sysclk;
// !!! ids8247_spi->get_rx = ids8247_spi_rx_buf_u8;
// !!! ids8247_spi->get_tx = ids8247_spi_tx_buf_u8;
//ids8247_spi->rx_shift = 0;
//ids8247_spi->tx_shift = 0;
ids8247_spi->rxindex = 0;
ids8247_spi->txindex = 0;
init_completion(&ids8247_spi->done);
ids8247_spi->base = ioremap(r->start, r->end - r->start + 1);
if (ids8247_spi->base == NULL) {
ret = -ENOMEM;
goto put_master;
}
r = platform_get_resource(dev, IORESOURCE_MEM, 1);
if (r == NULL) {
ret = -ENODEV;
goto free_master;
}
ids8247_spi->dpram = ioremap(r->start, r->end - r->start + 1);
if (ids8247_spi->dpram == NULL) {
ret = -ENOMEM;
goto put_master;
}
/* docu 35-10 */
dpramoffset = cpm_dpalloc( sizeof(struct spi_ram), 64);
out_be16( (u16*)ids8247_spi->dpram, (u16)(dpramoffset & 0xFFFF));
iounmap(ids8247_spi->dpram);
ids8247_spi->dpram = NULL;
ids8247_spi->spi_dpram = ioremap( get_immrbase() + dpramoffset,
sizeof(struct spi_ram));
memset(ids8247_spi->spi_dpram, 0, sizeof(struct spi_ram));
dpramoffset = cpm_dpalloc( sizeof(cbd_t) * (MAX_RXBUFFS + MAX_TXBUFFS), 8);
ids8247_spi->spi_dpram->rxbase = dpramoffset;
ids8247_spi->rx_vbase = cpm_muram_addr(dpramoffset);
ids8247_spi->spi_dpram->txbase = dpramoffset + sizeof(cbd_t) * MAX_RXBUFFS;
ids8247_spi->tx_vbase = cpm_muram_addr(dpramoffset
+ sizeof(cbd_t) * MAX_RXBUFFS);
rbdf = ids8247_spi->rx_vbase;
tbdf = ids8247_spi->tx_vbase;
/* now it is ready for init of bd's */
for (i = 0; i < MAX_RXBUFFS; i++) {
ids8247_spi->rxbuf[i] = dma_alloc_coherent(
NULL, MAX_LEN + 1, &ids8247_spi->rxdma[i], GFP_KERNEL);
if (!ids8247_spi->rxbuf[i]) {
ret = -ENOMEM;
goto put_master;
}
out_be32(&rbdf[i].cbd_bufaddr, ((ids8247_spi->rxdma[i] + 1) & ~1));
out_be16(&rbdf->cbd_datlen, 0);
out_be16(&rbdf[i].cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
}
setbits16(&rbdf[i].cbd_sc, BD_SC_WRAP);
for (i = 0; i < MAX_TXBUFFS; i++) {
ids8247_spi->txbuf[i] = (unsigned char *)dma_alloc_coherent(
NULL, MAX_LEN + 1, &ids8247_spi->txdma[i], GFP_KERNEL);
if (!ids8247_spi->txbuf[i]) {
ret = -ENOMEM;
goto out_muram;
}
out_be32(&tbdf[i].cbd_bufaddr, ids8247_spi->txdma[i]);
out_be16(&tbdf->cbd_datlen, 0);
out_be16(&tbdf[i].cbd_sc, BD_SC_INTRPT);
}
setbits16(&tbdf[i].cbd_sc, BD_SC_WRAP);
ids8247_spi->spi_dpram->rfcr = 0x10;
ids8247_spi->spi_dpram->tfcr = 0x10;
ids8247_spi->spi_dpram->mrblr = MAX_LEN;
ids8247_spi->irq = platform_get_irq(dev, 0);
if (ids8247_spi->irq < 0) {
ret = -ENXIO;
goto unmap_io;
}
/* Register for SPI Interrupt */
ret = request_irq(ids8247_spi->irq, ids8247_spi_irq,
0, "ids8247_spi", ids8247_spi);
if (ret != 0)
goto unmap_io;
master->bus_num = pdata->bus_num;
master->num_chipselect = pdata->max_chipselect;
/* SPI controller initializations */
ids8247_spi_write_reg16(&ids8247_spi->base->mode, 0);
ids8247_spi_write_reg16(&ids8247_spi->base->mask, 0);
ids8247_spi_write_reg16(&ids8247_spi->base->command, 0);
ids8247_spi_write_reg16(&ids8247_spi->base->event, 0xff00);
/* Enable SPI interface */
regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_EN;
ids8247_spi_write_reg16(&ids8247_spi->base->mode, regval);
spin_lock_init(&ids8247_spi->lock);
init_completion(&ids8247_spi->done);
INIT_WORK(&ids8247_spi->work, ids8247_spi_work);
INIT_LIST_HEAD(&ids8247_spi->queue);
ids8247_spi->workqueue = create_singlethread_workqueue(
master->dev.parent->bus_id);
if (ids8247_spi->workqueue == NULL) {
ret = -EBUSY;
goto free_irq;
}
cpm_command(0x25400000, 0);
ret = spi_register_master(master);
if (ret < 0)
goto unreg_master;
printk(KERN_INFO
"%s: ids8247 SPI Controller driver at 0x%p (irq = %d)\n",
dev->dev.bus_id, ids8247_spi->base, ids8247_spi->irq);
return ret;
/*TODO: real cleanup */
out_muram:
unreg_master:
destroy_workqueue(ids8247_spi->workqueue);
free_irq:
free_irq(ids8247_spi->irq, ids8247_spi);
unmap_io:
iounmap(ids8247_spi->base);
put_master:
spi_master_put(master);
free_master:
kfree(master);
err:
return ret;
}
static int __exit ids8247_spi_remove(struct platform_device *dev)
{
struct ids8247_spi *ids8247_spi;
struct spi_master *master;
master = platform_get_drvdata(dev);
ids8247_spi = spi_master_get_devdata(master);
flush_workqueue(ids8247_spi->workqueue);
destroy_workqueue(ids8247_spi->workqueue);
spi_unregister_master(master);
free_irq(ids8247_spi->irq, ids8247_spi);
iounmap(ids8247_spi->base);
return 0;
}
MODULE_ALIAS("platform:ids8247_spi");
static struct platform_driver ids8247_spi_driver = {
.remove = __exit_p(ids8247_spi_remove),
.driver = {
.name = "ids8247_spi",
.owner = THIS_MODULE,
},
};
static int __init ids8247_spi_init(void)
{
return platform_driver_probe(&ids8247_spi_driver, ids8247_spi_probe);
}
static void __exit ids8247_spi_exit(void)
{
platform_driver_unregister(&ids8247_spi_driver);
}
module_init(ids8247_spi_init);
module_exit(ids8247_spi_exit);
MODULE_AUTHOR("Sergej Stepanov");
MODULE_DESCRIPTION("Simple MPC8247 SPI Driver");
MODULE_LICENSE("GPL");
^ permalink raw reply
* Re: IDE cable detection on Apple PowerBook
From: Benjamin Herrenschmidt @ 2009-03-18 7:58 UTC (permalink / raw)
To: TOMARI Hisanobu; +Cc: linuxppc-dev
In-Reply-To: <20090318140638.e6b61eaa.posco.grubb@gmail.com>
On Wed, 2009-03-18 at 14:06 +0900, TOMARI Hisanobu wrote:
> Hello,
>
> I'm using an OCZ PATA SSD on Apple PowerBook5,4 computer.
> The IDE drive fails to recognize 80-conductor cable that
> connects the drive to motherboard to fall back to UDMA33.
>
> This patch fixes this behavior by assuming that the cable is
> short-40pin when the model string matches "PowerBook5" and
> the motherboard detects 80c cable.
>
> This patch is against drivers/ide/pmac.c in linux 2.6.28.8.
The patch is too much of an ad-hoc hack... _maybe_ an option is to make
the core fallback to 40 "short" when 80 pin detection fails on
powerbooks instead ?
Ben.
> (before applying the patch) hdparm -i /dev/hda
> /dev/hda:
> Timing buffered disk reads: 90 MB in 3.03 seconds = 29.73 MB/sec
> (dmesg 2.6.26)
> ide0: Found Apple UniNorth ATA-6 controller, bus ID 3, irq 39
> Probing IDE interface ide0...
> hda: CORE_PATA, ATA DISK drive
> hda: host max PIO4 wanted PIO255(auto-tune) selected PIO4
> hda: drive side 80-wire cable detection failed, limiting max speed to UDMA33
> hda: UDMA/33 mode selected
>
> (after applying the patch) hdparm -i /dev/hda
> /dev/hda:
> Timing buffered disk reads: 240 MB in 3.02 seconds = 79.42 MB/sec
> (dmesg 2.6.28.8)
> ide-pmac: Found Apple UniNorth ATA-6 controller (PCI), bus ID 3, irq 39
> Probing IDE interface ide0...
> hda: CORE_PATA, ATA DISK drive
> hda: host max PIO4 wanted PIO255(auto-tune) selected PIO4
> hda: UDMA/100 mode selected
> ide0 at 0xf102a000-0xf102a070,0xf102a160 on irq 39
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 1/4] NAND: FSL-UPM: add multi chip support
From: Wolfgang Grandegger @ 2009-03-18 7:41 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <20090317192735.GC4287@oksana.dev.rtsoft.ru>
Anton Vorontsov wrote:
> On Tue, Mar 17, 2009 at 10:12:19AM +0100, Wolfgang Grandegegr wrote:
>> From: Wolfgang Grandegger <wg@grandegger.com>
>>
>> This patch adds support for multi-chip NAND devices to the FSL-UPM
>> driver. This requires support for multiple GPIOs for the RNB pins.
>>
>> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
>> ---
>> drivers/mtd/nand/fsl_upm.c | 90 +++++++++++++++++++++++++++++++++----------
>> 1 files changed, 69 insertions(+), 21 deletions(-)
>>
>> diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
>> index 7815a40..ca7e85a 100644
>> --- a/drivers/mtd/nand/fsl_upm.c
>> +++ b/drivers/mtd/nand/fsl_upm.c
>> @@ -23,6 +23,8 @@
>> #include <linux/io.h>
>> #include <asm/fsl_lbc.h>
>>
>> +#define FSL_UPM_NAND_MAX_CHIPS 4
>
> Is there any reason to hardcode max chips? Some obscure limit in the
> UPMs maybe?
Not really. It's limited by NAND_MAX_CHIP. See
http://lxr.linux.no/linux+v2.6.28.8/include/linux/mtd/nand.h#L40
> Otherwise we'd better allocate the rnb_gpios dynamically, depending
> on the num-chips property.
Could be done.
Wolfgang.
^ permalink raw reply
* spidev.c driver on the ppc8247 (kernel 2.6.27.19)
From: Daniel Ng @ 2009-03-18 7:36 UTC (permalink / raw)
To: linuxppc-dev
Hi,
I'm trying to get the spidev.c driver working in Kernel 2.6.27.19 on a ppc8247.
Firstly, would I need to convert it to an 'of'-style driver?
Assuming this is the case, I've changed spidev_init() to use
of_register_platform_driver() with what I think is an appropriate
parameter:
static struct of_platform_driver spidev_spi = {
.name = "spidev",
.match_table = spidev_match,
.probe = spidev_probe,
.remove = __devexit_p(spidev_remove),
};
spidev_probe() now looks like the below. I've had to change the
spidev_probe() function signature, which meant I needed to use
to_spi_device() in the function (there are no other changes).
static int __devinit spidev_probe(struct of_device *ofdev, const
struct of_device_id *match)
{
struct spidev_data *spidev;
int status;
unsigned long minor;
struct spi_device *spi;
spi = to_spi_device(&ofdev->dev);
/* Allocate driver data */
spidev = kzalloc(sizeof(*spidev), GFP_KERNEL);
if (!spidev)
return -ENOMEM;
/* Initialize the driver data */
spidev->spi = spi;
spin_lock_init(&spidev->spi_lock);
mutex_init(&spidev->buf_lock);
INIT_LIST_HEAD(&spidev->device_entry);
/* If we can allocate a minor number, hook up this device.
* Reusing minors is fine so long as udev or mdev is working.
*/
mutex_lock(&device_list_lock);
minor = find_first_zero_bit(minors, N_SPI_MINORS);
if (minor < N_SPI_MINORS) {
struct device *dev;
spidev->devt = MKDEV(SPIDEV_MAJOR, minor);
dev = device_create_drvdata(spidev_class, &spi->dev,
spidev->devt, spidev,
"spidev%d.%d",
spi->master->bus_num, spi->chip_select);
printk("spidev_probe(): CREATED spidev%d.%d\n",
spi->master->bus_num, spi->chip_select);
status = IS_ERR(dev) ? PTR_ERR(dev) : 0;
.
.
/////// (the rest of this function is unchanged)
.
}
It all executes ok until the above call to device_create_drvdata(),
where it crashes (see below). Can anyone explain why?
Can I still use the 'old-style' device_create_drvdata() function with
the 'of new-style' driver framework?
Am I going about this the right way?
Unable to handle kernel paging request for data at address 0x00000120
Faulting instruction address: 0xc028e484
Oops: Kernel access of bad area, sig: 11 [#1]
PREEMPT XXX
NIP: c028e484 LR: c028e478 CTR: c01511c8
REGS: c1819d60 TRAP: 0300 Not tainted (2.6.27.19-800-OS-03050107)
MSR: 00009032 <EE,ME,IR,DR> CR: 42044024 XER: 00000000
DAR: 00000120, DSISR: 20000000
TASK = c1814400[1] 'swapper' THREAD: c1818000
GPR00: c028e478 c1819e10 c1814400 0000000b 0000150c 0e400000 00000008 c0270000
GPR08: f0000038 00000000 0000150c c1818000 f0000020 fffffffe 01ff8000 00000000
GPR16: 01fed694 01ff56f0 00000000 00000000 00000000 00000000 c02d0000 c184ec10
GPR24: c02d2610 c1963288 c02d260c c02aafa4 00000000 ffffffed c1963280 c184ec10
NIP [c028e484] spidev_probe+0xec/0x1c8
LR [c028e478] spidev_probe+0xe0/0x1c8
Call Trace:
[c1819e10] [c028e478] spidev_probe+0xe0/0x1c8 (unreliable)
[c1819e40] [c01814a4] of_platform_device_probe+0x5c/0x84
[c1819e60] [c01552c8] driver_probe_device+0xe8/0x240
[c1819e90] [c01554a4] __driver_attach+0x84/0x88
[c1819eb0] [c01548fc] bus_for_each_dev+0x5c/0x98
[c1819ee0] [c01550a0] driver_attach+0x24/0x34
[c1819ef0] [c0154eac] bus_add_driver+0x1b4/0x220
[c1819f10] [c01557b4] driver_register+0x5c/0x158
[c1819f30] [c018136c] of_register_driver+0x54/0x70
[c1819f40] [c0289a28] spidev_init+0x6c/0xf8
[c1819f60] [c00038e8] do_one_initcall+0x38/0x188
[c1819fd0] [c0278180] kernel_init+0x8c/0xf8
[c1819ff0] [c000f6fc] kernel_thread+0x44/0x60
Instruction dump:
4be90481 2b83001f 7c7c1b78 419d00d8 64600e40 901e0000 3c60c027 38638f04
4bd8ea31 813f0120 80be0000 3ce0c027 <a9090120> 38e78f10 893f0128 7fe4fb78
---[ end trace 8d59482f3bf88fe6 ]---
Cheers,
Daniel
^ permalink raw reply
* Re: [PATCH 4/4] powerpc/85xx: TQM8548: Update DTS file for multi-chip support
From: Wolfgang Grandegger @ 2009-03-18 7:34 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <20090317192341.GB4287@oksana.dev.rtsoft.ru>
Anton Vorontsov wrote:
> On Tue, Mar 17, 2009 at 10:12:22AM +0100, Wolfgang Grandegegr wrote:
>> From: Wolfgang Grandegger <wg@grandegger.com>
>>
>> This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
>> flash memory on the TQM8548 modules.
>>
>> This patch should go through the powerpc/85xx channel.
>>
>> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
>> ---
>> arch/powerpc/boot/dts/tqm8548.dts | 5 +++++
>> 1 files changed, 5 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
>> index 81d3fbb..e5c3c67 100644
>> --- a/arch/powerpc/boot/dts/tqm8548.dts
>> +++ b/arch/powerpc/boot/dts/tqm8548.dts
>> @@ -389,6 +389,11 @@
>> reg = <3 0x0 0x800>;
>> fsl,upm-addr-offset = <0x10>;
>> fsl,upm-cmd-offset = <0x08>;
>> + wait-flags = <0x05>;
>
> Should be at least fsl,upm-wait-flags. (And the flags should
> be documented in dts-bindings ;-).
OK.
>> + /* Multi-chip device */
>> + fsl,upm-mar-chip-offset = <0x200>;
>> + max-chips = <2>;
>
> num-chips would be more appropriate, no?
Yep.
>
>> + chip-offset = <0x200>;
>
> I believe this is from some old code...
No, it's the address offset between the multiple chips. As Kumar already
pointed out, I also need to document the new properties.
Wolfgang.
^ permalink raw reply
* IDE cable detection on Apple PowerBook
From: TOMARI Hisanobu @ 2009-03-18 5:06 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1287 bytes --]
Hello,
I'm using an OCZ PATA SSD on Apple PowerBook5,4 computer.
The IDE drive fails to recognize 80-conductor cable that
connects the drive to motherboard to fall back to UDMA33.
This patch fixes this behavior by assuming that the cable is
short-40pin when the model string matches "PowerBook5" and
the motherboard detects 80c cable.
This patch is against drivers/ide/pmac.c in linux 2.6.28.8.
(before applying the patch) hdparm -i /dev/hda
/dev/hda:
Timing buffered disk reads: 90 MB in 3.03 seconds = 29.73 MB/sec
(dmesg 2.6.26)
ide0: Found Apple UniNorth ATA-6 controller, bus ID 3, irq 39
Probing IDE interface ide0...
hda: CORE_PATA, ATA DISK drive
hda: host max PIO4 wanted PIO255(auto-tune) selected PIO4
hda: drive side 80-wire cable detection failed, limiting max speed to UDMA33
hda: UDMA/33 mode selected
(after applying the patch) hdparm -i /dev/hda
/dev/hda:
Timing buffered disk reads: 240 MB in 3.02 seconds = 79.42 MB/sec
(dmesg 2.6.28.8)
ide-pmac: Found Apple UniNorth ATA-6 controller (PCI), bus ID 3, irq 39
Probing IDE interface ide0...
hda: CORE_PATA, ATA DISK drive
hda: host max PIO4 wanted PIO255(auto-tune) selected PIO4
hda: UDMA/100 mode selected
ide0 at 0xf102a000-0xf102a070,0xf102a160 on irq 39
--
TOMARI Hisanobu <posco.grubb@gmail.com>
[-- Attachment #2: ide-pmac-pbookcable.patch --]
[-- Type: text/x-diff, Size: 1254 bytes --]
*** linux-2.6.28.8/drivers/ide/pmac.c.orig 2009-03-18 13:59:39.645805773 +0900
--- linux-2.6.28.8/drivers/ide/pmac.c 2009-03-18 13:57:38.935818468 +0900
***************
*** 916,926 ****
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
struct device_node *np = pmif->node;
const char *cable = of_get_property(np, "cable-type", NULL);
/* Get cable type from device-tree. */
if (cable && !strncmp(cable, "80-", 3))
! return ATA_CBL_PATA80;
/*
* G5's seem to have incorrect cable type in device-tree.
--- 916,934 ----
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
struct device_node *np = pmif->node;
+ struct device_node *root = of_find_node_by_path("/");
const char *cable = of_get_property(np, "cable-type", NULL);
+ const char *model = of_get_property(root, "model", NULL);
/* Get cable type from device-tree. */
if (cable && !strncmp(cable, "80-", 3))
! {
! if(strncmp(model,"PowerBook5",10)==0)
! /* Some drives fail to detect 80c cable in PowerBook */
! return ATA_CBL_PATA40_SHORT;
! else
! return ATA_CBL_PATA80;
! }
/*
* G5's seem to have incorrect cable type in device-tree.
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2009-03-18 4:11 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev list, Andrew Morton, Linux Kernel list
Hi Linus !
So here's the new ps3 nvram driver for 2.6.29 that we discussed earlier
(I actually sent this days ago but screwed up the email by not actually
sending it to you :-)
In the meantime I've added a PS3 defconfig update and two patches fixing
another fallout from the changes to the way we handle the coherent bit
in our PTEs. Hopefully there should be no more regressions in that area.
Cheers,
Ben.
The following changes since commit ee568b25ee9e160b32d1aef73d8b2ee9c05d34db:
Linus Torvalds (1):
Avoid 64-bit "switch()" statements on 32-bit architectures
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
Benjamin Herrenschmidt (1):
Merge commit 'gcl/merge' into merge
Geert Uytterhoeven (1):
ps3/block: Replace mtd/ps3vram by block/ps3vram
Geoff Levand (1):
powerpc/ps3: ps3_defconfig updates
Kumar Gala (1):
powerpc/mm: Respect _PAGE_COHERENT on classic ppc32 SW
Piotr Ziecik (1):
powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xx
arch/powerpc/configs/ps3_defconfig | 250 ++++++++---
arch/powerpc/include/asm/cputable.h | 4 +-
arch/powerpc/kernel/head_32.S | 6 +-
arch/powerpc/platforms/ps3/Kconfig | 7 +
drivers/block/Makefile | 1 +
drivers/block/ps3vram.c | 865 +++++++++++++++++++++++++++++++++++
drivers/mtd/devices/Kconfig | 7 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/ps3vram.c | 768 -------------------------------
9 files changed, 1069 insertions(+), 840 deletions(-)
create mode 100644 drivers/block/ps3vram.c
delete mode 100644 drivers/mtd/devices/ps3vram.c
^ permalink raw reply
* Re: [RFC] powerpc/8xxx: Clean up setting of CPU_FTR_NEED_COHERENT
From: Benjamin Herrenschmidt @ 2009-03-18 0:42 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20090317045815.27319.62728.stgit@localhost.localdomain>
> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
> index 48d7f5f..a36494e 100644
> --- a/arch/powerpc/include/asm/cputable.h
> +++ b/arch/powerpc/include/asm/cputable.h
> @@ -242,8 +242,7 @@ extern const char *powerpc_base_platform;
> * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
> * require it for PCI "streaming/prefetch" to work properly.
> */
> -#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \
> - || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260)
> +#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
> #define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
> #else
> #define CPU_FTR_COMMON 0
Even the above sucks but at this stage, it's hard to do better. We
really need to fix ppc32 so that the feature fixup is done -after- the
platform probe, so that the platform gets a chance to stick in the bit
when needed.
Ben.
^ permalink raw reply
* Please pull from 'test'
From: Kumar Gala @ 2009-03-18 0:40 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
Please pull from 'test' branch of
master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git test
to receive the following updates:
arch/powerpc/include/asm/mmu.h | 6 +
arch/powerpc/include/asm/mpic.h | 5 +
arch/powerpc/kernel/cpu_setup_6xx.S | 4 +
arch/powerpc/kernel/cputable.c | 9 +-
arch/powerpc/kernel/head_32.S | 109 ++++++++++++++++++++++--------------
arch/powerpc/kernel/pci-common.c | 2
arch/powerpc/sysdev/mpic.c | 30 +++++++++
drivers/net/gianfar.c | 34 +++++------
drivers/net/gianfar.h | 3
9 files changed, 139 insertions(+), 63 deletions(-)
Kumar Gala (7):
powerpc: Add support for CoreInt delivery of interrupts on MPIC
powerpc/pci: Default to dma_direct_ops for pci dma_ops
powerpc/mm: Respect _PAGE_COHERENT on classic ppc32 SW TLB load machines
powerpc/mm: Remove unused register usage in SW TLB miss handling
powerpc/mm: Used free register to save a few cycles in SW TLB miss handling
powerpc/mm: e300c2/c3/c4 TLB errata workaround
gianfar: pass the proper dev to DMA ops
^ permalink raw reply
* Re: Problem with radeonfb on PowerPC 7448&MV64560
From: Benjamin Herrenschmidt @ 2009-03-17 23:05 UTC (permalink / raw)
To: Eduard Fuchs; +Cc: Linuxppc-dev
In-Reply-To: <200903171630.25340.edfuchs@uni-kassel.de>
On Tue, 2009-03-17 at 16:30 +0100, Eduard Fuchs wrote:
> Hi all,
>
> since several days I'm trying to run an ATI 9250 (PCI) graphic card under
> Linux Kernel 2.6.27.19. Nevertheless without success. The kernel shows the
> following message:
>
> videoboot: Booting PCI video card bus 0, function 0, device 7
> biosEmu: undefined interrupt 15h called!
> biosEmu/bios.int42: unknown function AH=0x0, AL=0x7, BL=0x0
The above comes from some patches you added to the kernel ? You should
probably do the softboot in the firmware instead...
> radeonfb (0000:00:07.0): Cannot match card to OF node !
The above should be mostly harmless.
> RADEON: CHIP_FAMILY 10 (0xa)
> RADEON: MMIO_BASE 0xf1058000
> RADEON: MMIO_BASE_PHYS 0x88000000
> radeonfb (0000:00:07.0): Found 0k of SDRAM 64 bits wide videoram
> RADEON: Try map FB Phys 0x80000000, size 0, 16777216. 0
The above sounds wrong, was the card properly initialized ? Looks like
your videoboot failed...
> radeonfb (0000:00:07.0): cannot map FB
> radeonfb: probe of 0000:00:07.0 failed with error -5
>
> This is the PCI initialization :
>
> PCI: Probing PCI hardware
> pci 0000:00:00.0: unknown header type 7f, ignoring device
> pci 0000:00:08.0: PME# supported from D0 D1 D2 D3hot
> pci 0000:00:08.0: PME# disabled
> pci 0000:00:08.1: PME# supported from D0 D1 D2 D3hot
> pci 0000:00:08.1: PME# disabled
> pci 0000:00:08.2: PME# supported from D0 D1 D2 D3hot
> pci 0000:00:08.2: PME# disabled
> PCI: PHB (bus 0) bridge rsrc 0: 0000000000011000-0000000000020fff [0x100],
> parent c0439ce0 (PCI IO)
> PCI BUS: 0xc063e044:0xc0439ce0, 0xc063e060:0xc0439cc4
> PCI: PHB (bus 0) bridge rsrc 1: 0000000080000000-00000000bfffffff [0x200],
> parent c0439cc4 (PCI mem)
> PCI: PHB (bus 0) bridge rsrc 0: 00000000d8080000-00000000d808ffff [0x100],
> parent c0439ce0 (PCI IO)
> PCI: PHB (bus 0) bridge rsrc 1: 0000000060000000-000000007fffffff [0x200],
> parent c0439cc4 (PCI mem)
> PCI: Allocating 0000:00:07.0: Resource 0: 0000000080000000..0000000087ffffff
> [21208]
> PCI: Allocating 0000:00:07.0: Resource 1: 00000000d8011000..00000000d80110ff
> [20101]
> PCI: Cannot allocate resource region 1 of device 0000:00:07.0, will remap
> PCI: Allocating 0000:00:07.0: Resource 2: 0000000088000000..000000008800ffff
> [20200]
> PCI: Allocating 0000:00:07.1: Resource 0: 0000000090000000..0000000097ffffff
> [21208]
> PCI: Allocating 0000:00:07.1: Resource 1: 0000000098000000..000000009800ffff
> [20200]
> PCI: Allocating 0000:00:08.0: Resource 0: 0000000098010000..0000000098010fff
> [20200]
> PCI: Allocating 0000:00:08.1: Resource 0: 0000000098011000..0000000098011fff
> [20200]
> PCI: Allocating 0000:00:08.2: Resource 0: 0000000098012000..00000000980120ff
> [20200]
> PCI: Allocating 0000:00:09.0: Resource 0: 00000000d8011100..00000000d8011107
> [20101]
> PCI: Cannot allocate resource region 0 of device 0000:00:09.0, will remap
> PCI: Allocating 0000:00:09.0: Resource 1: 00000000d8011108..00000000d801110b
> [20101]
> PCI: Cannot allocate resource region 1 of device 0000:00:09.0, will remap
> PCI: Allocating 0000:00:09.0: Resource 2: 00000000d8011110..00000000d8011117
> [20101]
> PCI: Cannot allocate resource region 2 of device 0000:00:09.0, will remap
> PCI: Allocating 0000:00:09.0: Resource 3: 00000000d8011118..00000000d801111b
> [20101]
> PCI: Cannot allocate resource region 3 of device 0000:00:09.0, will remap
> PCI: Allocating 0000:00:09.0: Resource 4: 00000000d8011120..00000000d801112f
> [20101]
> PCI: Cannot allocate resource region 4 of device 0000:00:09.0, will remap
> PCI: Allocating 0000:00:09.0: Resource 5: 0000000098012400..00000000980127ff
> [20200]
> PCI: Allocating 0000:00:0a.0: Resource 0: 000000009c000000..000000009fffffff
> [20200]
> PCI: Assigning unassigned resouces...
> bus: 00 index 0 io port: [11000, 20fff]
> bus: 00 index 1 mmio: [80000000, bfffffff]
> bus: 00 index 0 io port: [d8080000, d808ffff]
> bus: 00 index 1 mmio: [60000000, 7fffffff]
>
>
> At chipset's MV6450 init, I haven't found any errors. Otherwise an PCI SATA
> controller and an 3Com network card running very well. I have no more ideas,
> where can be the possible problem. Do you have any suggestions?
>
> Best regards
>
> Eduard Fuchs
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: Fix for __div64_32 locks when using some 64 bit numbers
From: Benjamin Herrenschmidt @ 2009-03-17 23:03 UTC (permalink / raw)
To: davidastro; +Cc: linuxppc-dev
In-Reply-To: <22567864.post@talk.nabble.com>
On Tue, 2009-03-17 at 14:15 -0700, davidastro wrote:
> I found a bug when using the function __div64_32 in assembly in a 32 bit ppc
> architecture unit.
>
> I tried the numbers 55834565048000000 for the dividend and 4294967079 for
> the divisor. When passing these two numbers to the function __div64_32, I
> had a software lock. I searched for possible patches online and in different
> forums but I could not find anything related to the assembly implementation
> to this function (I would have to apologize if somebody already found a fix
> :-) ).
>
> Anyway, when analyzing the assembly code, I found out with gdb the problem.
> I am not an expert in ppc architecture but I read the documentation and I am
> pretty sure I solved the issue (I have been testing for couple of days using
> random 64 to 32 number combinations with good results).
>
> Who or Where should I post the fix to be reviewed.
Here is fine :-)
Ben.
^ permalink raw reply
* Re: [PATCH v2 1/2] powerpc/86xx: Board support for GE Fanuc's PPC9A
From: David Gibson @ 2009-03-17 22:33 UTC (permalink / raw)
To: Martyn Welch; +Cc: linuxppc-dev
In-Reply-To: <49BF6D55.7020108@gefanuc.com>
On Tue, Mar 17, 2009 at 09:28:53AM +0000, Martyn Welch wrote:
> David Gibson wrote:
>> On Mon, Mar 16, 2009 at 10:32:18AM +0000, Martyn Welch wrote:
>>> Support for the PPC9A VME Single Board Computer from GE Fanuc (PowerPC
>>> MPC8641D).
>>>
>>> This is the basic board support for GE Fanuc's PPC9A, a 6U single board
>>> computer, based on Freescale's MPC8641D.
>>
>> Uh.. sorry. Should have noticed these little nitpicks the first time
>> around.
>>
>
> No problem, just a few queries.
>
>>> + localbus@fef05000 {
>>> + #address-cells = <2>;
>>> + #size-cells = <1>;
>>> + compatible = "fsl,mpc8641-localbus", "simple-bus";
>>> + reg = <0xfef05000 0x1000>;
>>> + interrupts = <19 2>;
>>> + interrupt-parent = <&mpic>;
>>> +
>>> + ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
>>> + 1 0 0xe8000000 0x08000000 // Paged Flash 0
>>> + 2 0 0xe0000000 0x08000000 // Paged Flash 1
>>> + 3 0 0xfc100000 0x00020000 // NVRAM
>>> + 4 0 0xfc000000 0x00008000 // FPGA
>>> + 5 0 0xfc008000 0x00008000 // AFIX FPGA
>>> + 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
>>> + 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
>>> +
>>> + /* flash@0,0 is a mirror of part of the memory in flash@1,0
>>> + flash@0,0 {
>>> + compatible = "cfi-flash";
>>
>> It would be nice to have the actual type of flash chips here, although
>> it's not essential.
>>
>
> Flash is a little tricky, it's paged. We haven't found a good way of dealing with this yet and as a result we currently just support the first page, which may not even match one full chip width. This is especially so for flash@0,0, which is mirrored via an FPGA, the exact region depends on some jumper settings and is access is definitely read only via this region (this region is commented out in the DTS and really there for completeness as we don't expect to ever use it or enable it from Linux and is only there to all the firmware to boot). We are currently using Spansion s29gl01gp parts, which have some tricky mechanisms for sector protection (given that the parts are paged). As a result, providing the specific chip won't be much use, if a specific driver is written for spansion flash the spansion specific mechanisms are unlikely to work.
>
> If you still want the specific chip, how about this:
>
> compatible = "spansion, s29gl01gp", "cfi-flash";
Ah, ok. Yeah, under those circumstances I wouldn't suggest including
the flash chip type. However, it probably would be a good idea to add
some sort of tag to the compatible so that anything that needs to be
aware of the peculiar layout can check if that's the case.
So, something like:
compatible = "gef,ppc9a-wacky-flash-layout", "cfi-flash";
[snip]
>>> + fpga@4,0 {
>>> + compatible = "gef,fpga-regs";
>>
>> I don't imagine this is the only set of FPGA based control regs GE
>> Fanuc will ever make, so this should be more precise. Including the
>> board type here is probably the way to go.
>>
>
> OK.
>
> compatible = "gef,fpga-regs-ppc9a";
Look ok. "gef,ppc9a-fpga-regs" would perhaps be better, though it
doesn't matter that much. Machine then device seems to be the more
common convention, at least in recent work.
>>> + reg = <0x4 0x0 0x40>;
>>> + };
>>> +
>>> + wdt@4,2000 {
>>> + compatible = "gef,fpga-wdt";
>>
>> And likewise here.
>>
>
> We only have one core that is used on all our sites current and planned boards (as far as I know). How about (idea borrowed from virtex440-ml507.dts):
>
> compatible = "gef,fpga-wdt-1.00";
I'd suggest:
compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00";
by way of paranoia. The idea of always listing the specific
board/SoC/whatever variant first is that if a bunch of boards have a
theoretically identical device, but one of the boards has a bug in the
implementation, it's easy to add detection/workaround code to the
driver, even if you only discover the bug some time down the road when
there's lots of boards and copies of the device tree in the field.
>>> + reg = <0x4 0x2000 0x8>;
>>> + interrupts = <0x1a 0x4>;
>>> + interrupt-parent = <&gef_pic>;
>>> + };
>>> + /* Second watchdog available, driver currently supports one.
>>> + wdt@4,2010 {
>>> + compatible = "gef,fpga-wdt";
>>> + reg = <0x4 0x2010 0x8>;
>>> + interrupts = <0x1b 0x4>;
>>> + interrupt-parent = <&gef_pic>;
>>> + };
>>> + */
>>> + gef_pic: pic@4,4000 {
>>> + #interrupt-cells = <1>;
>>> + interrupt-controller;
>>> + compatible = "gef,fpga-pic";
>>
>> And possibly here, although in this case I imagine several boards
>> might have compatible FPGA PICs.
>
> Yes, the same design is used on all the new boards I know about. As
> with the watchdog, boards in the future may have different
> designs. Would this be acceptable?:
>
> compatible = "gef,fpga-pic-1.00";
Same comments as for the watchdog.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH] gianfar: pass the proper dev to DMA ops
From: Becky Bruce @ 2009-03-17 22:24 UTC (permalink / raw)
To: Kumar Gala; +Cc: netdev, Andy Fleming, davem, linuxppc-dev
In-Reply-To: <1237306567-32219-1-git-send-email-galak@kernel.crashing.org>
On Mar 17, 2009, at 11:16 AM, Kumar Gala wrote:
> We need to be passing the of_platform device struct into the DMA ops
> as
> its the one that has the archdata setup to know which low-level DMA
> ops we
> should be using (not the net_device one). This isn't an issue until
> we
> expect the archdata to be setup correctly.
>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Boots on 8641D stock config and gets rid of the panic I was seeing.
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Cheers,
Becky
>
> ---
>
> Dave,
>
> This is for net-next. We are working on having per device dma ops
> for .30 and
> expect the struct device archdata to be setup properly but in .29 we
> still
> default to a direct DMA ops on ppc32 so this "bug" will never show up.
>
> - k
>
> drivers/net/gianfar.c | 34 ++++++++++++++++++----------------
> drivers/net/gianfar.h | 3 ++-
> 2 files changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
> index bed30ef..8659833 100644
> --- a/drivers/net/gianfar.c
> +++ b/drivers/net/gianfar.c
> @@ -365,8 +365,10 @@ static int gfar_probe(struct of_device *ofdev,
> return -ENOMEM;
>
> priv = netdev_priv(dev);
> - priv->dev = dev;
> + priv->ndev = dev;
> + priv->ofdev = ofdev;
> priv->node = ofdev->node;
> + SET_NETDEV_DEV(dev, &ofdev->dev);
>
> err = gfar_of_init(dev);
>
> @@ -538,7 +540,7 @@ static int gfar_remove(struct of_device *ofdev)
> dev_set_drvdata(&ofdev->dev, NULL);
>
> iounmap(priv->regs);
> - free_netdev(priv->dev);
> + free_netdev(priv->ndev);
>
> return 0;
> }
> @@ -870,7 +872,7 @@ void stop_gfar(struct net_device *dev)
>
> free_skb_resources(priv);
>
> - dma_free_coherent(&dev->dev,
> + dma_free_coherent(&priv->ofdev->dev,
> sizeof(struct txbd8)*priv->tx_ring_size
> + sizeof(struct rxbd8)*priv->rx_ring_size,
> priv->tx_bd_base,
> @@ -892,12 +894,12 @@ static void free_skb_resources(struct
> gfar_private *priv)
> if (!priv->tx_skbuff[i])
> continue;
>
> - dma_unmap_single(&priv->dev->dev, txbdp->bufPtr,
> + dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
> txbdp->length, DMA_TO_DEVICE);
> txbdp->lstatus = 0;
> for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
> txbdp++;
> - dma_unmap_page(&priv->dev->dev, txbdp->bufPtr,
> + dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
> txbdp->length, DMA_TO_DEVICE);
> }
> txbdp++;
> @@ -914,7 +916,7 @@ static void free_skb_resources(struct
> gfar_private *priv)
> if(priv->rx_skbuff != NULL) {
> for (i = 0; i < priv->rx_ring_size; i++) {
> if (priv->rx_skbuff[i]) {
> - dma_unmap_single(&priv->dev->dev, rxbdp->bufPtr,
> + dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
> priv->rx_buffer_size,
> DMA_FROM_DEVICE);
>
> @@ -980,7 +982,7 @@ int startup_gfar(struct net_device *dev)
> gfar_write(®s->imask, IMASK_INIT_CLEAR);
>
> /* Allocate memory for the buffer descriptors */
> - vaddr = (unsigned long) dma_alloc_coherent(&dev->dev,
> + vaddr = (unsigned long) dma_alloc_coherent(&priv->ofdev->dev,
> sizeof (struct txbd8) * priv->tx_ring_size +
> sizeof (struct rxbd8) * priv->rx_ring_size,
> &addr, GFP_KERNEL);
> @@ -1192,7 +1194,7 @@ err_rxalloc_fail:
> rx_skb_fail:
> free_skb_resources(priv);
> tx_skb_fail:
> - dma_free_coherent(&dev->dev,
> + dma_free_coherent(&priv->ofdev->dev,
> sizeof(struct txbd8)*priv->tx_ring_size
> + sizeof(struct rxbd8)*priv->rx_ring_size,
> priv->tx_bd_base,
> @@ -1345,7 +1347,7 @@ static int gfar_start_xmit(struct sk_buff
> *skb, struct net_device *dev)
> if (i == nr_frags - 1)
> lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
>
> - bufaddr = dma_map_page(&dev->dev,
> + bufaddr = dma_map_page(&priv->ofdev->dev,
> skb_shinfo(skb)->frags[i].page,
> skb_shinfo(skb)->frags[i].page_offset,
> length,
> @@ -1377,7 +1379,7 @@ static int gfar_start_xmit(struct sk_buff
> *skb, struct net_device *dev)
>
> /* setup the TxBD length and buffer pointer for the first BD */
> priv->tx_skbuff[priv->skb_curtx] = skb;
> - txbdp_start->bufPtr = dma_map_single(&dev->dev, skb->data,
> + txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
> skb_headlen(skb), DMA_TO_DEVICE);
>
> lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
> @@ -1563,7 +1565,7 @@ static void gfar_reset_task(struct work_struct
> *work)
> {
> struct gfar_private *priv = container_of(work, struct gfar_private,
> reset_task);
> - struct net_device *dev = priv->dev;
> + struct net_device *dev = priv->ndev;
>
> if (dev->flags & IFF_UP) {
> stop_gfar(dev);
> @@ -1610,7 +1612,7 @@ static int gfar_clean_tx_ring(struct
> net_device *dev)
> (lstatus & BD_LENGTH_MASK))
> break;
>
> - dma_unmap_single(&dev->dev,
> + dma_unmap_single(&priv->ofdev->dev,
> bdp->bufPtr,
> bdp->length,
> DMA_TO_DEVICE);
> @@ -1619,7 +1621,7 @@ static int gfar_clean_tx_ring(struct
> net_device *dev)
> bdp = next_txbd(bdp, base, tx_ring_size);
>
> for (i = 0; i < frags; i++) {
> - dma_unmap_page(&dev->dev,
> + dma_unmap_page(&priv->ofdev->dev,
> bdp->bufPtr,
> bdp->length,
> DMA_TO_DEVICE);
> @@ -1696,7 +1698,7 @@ static void gfar_new_rxbdp(struct net_device
> *dev, struct rxbd8 *bdp,
> struct gfar_private *priv = netdev_priv(dev);
> u32 lstatus;
>
> - bdp->bufPtr = dma_map_single(&dev->dev, skb->data,
> + bdp->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
> priv->rx_buffer_size, DMA_FROM_DEVICE);
>
> lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
> @@ -1856,7 +1858,7 @@ int gfar_clean_rx_ring(struct net_device *dev,
> int rx_work_limit)
>
> skb = priv->rx_skbuff[priv->skb_currx];
>
> - dma_unmap_single(&priv->dev->dev, bdp->bufPtr,
> + dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
> priv->rx_buffer_size, DMA_FROM_DEVICE);
>
> /* We drop the frame if we failed to allocate a new buffer */
> @@ -1916,7 +1918,7 @@ int gfar_clean_rx_ring(struct net_device *dev,
> int rx_work_limit)
> static int gfar_poll(struct napi_struct *napi, int budget)
> {
> struct gfar_private *priv = container_of(napi, struct gfar_private,
> napi);
> - struct net_device *dev = priv->dev;
> + struct net_device *dev = priv->ndev;
> int tx_cleaned = 0;
> int rx_cleaned = 0;
> unsigned long flags;
> diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
> index 54332b0..dd499d7 100644
> --- a/drivers/net/gianfar.h
> +++ b/drivers/net/gianfar.h
> @@ -738,7 +738,8 @@ struct gfar_private {
> spinlock_t rxlock;
>
> struct device_node *node;
> - struct net_device *dev;
> + struct net_device *ndev;
> + struct of_device *ofdev;
> struct napi_struct napi;
>
> /* skb array and index */
> --
> 1.5.6.6
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Fix for __div64_32 locks when using some 64 bit numbers
From: davidastro @ 2009-03-17 21:15 UTC (permalink / raw)
To: linuxppc-dev
I found a bug when using the function __div64_32 in assembly in a 32 bit ppc
architecture unit.
I tried the numbers 55834565048000000 for the dividend and 4294967079 for
the divisor. When passing these two numbers to the function __div64_32, I
had a software lock. I searched for possible patches online and in different
forums but I could not find anything related to the assembly implementation
to this function (I would have to apologize if somebody already found a fix
:-) ).
Anyway, when analyzing the assembly code, I found out with gdb the problem.
I am not an expert in ppc architecture but I read the documentation and I am
pretty sure I solved the issue (I have been testing for couple of days using
random 64 to 32 number combinations with good results).
Who or Where should I post the fix to be reviewed.
Thanks for your attention
--
View this message in context: http://www.nabble.com/Fix-for-__div64_32-locks-when-using-some-64-bit-numbers-tp22567864p22567864.html
Sent from the linuxppc-dev mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH 1/4] NAND: FSL-UPM: add multi chip support
From: Anton Vorontsov @ 2009-03-17 19:27 UTC (permalink / raw)
To: Wolfgang Grandegegr; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <1237281143-8768-2-git-send-email-wg@grandegger.com>
On Tue, Mar 17, 2009 at 10:12:19AM +0100, Wolfgang Grandegegr wrote:
> From: Wolfgang Grandegger <wg@grandegger.com>
>
> This patch adds support for multi-chip NAND devices to the FSL-UPM
> driver. This requires support for multiple GPIOs for the RNB pins.
>
> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
> ---
> drivers/mtd/nand/fsl_upm.c | 90 +++++++++++++++++++++++++++++++++----------
> 1 files changed, 69 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
> index 7815a40..ca7e85a 100644
> --- a/drivers/mtd/nand/fsl_upm.c
> +++ b/drivers/mtd/nand/fsl_upm.c
> @@ -23,6 +23,8 @@
> #include <linux/io.h>
> #include <asm/fsl_lbc.h>
>
> +#define FSL_UPM_NAND_MAX_CHIPS 4
Is there any reason to hardcode max chips? Some obscure limit in the
UPMs maybe?
Otherwise we'd better allocate the rnb_gpios dynamically, depending
on the num-chips property.
Thanks,
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
From: Anton Vorontsov @ 2009-03-17 18:59 UTC (permalink / raw)
To: Kumar Gala; +Cc: Scott Wood, linuxppc-dev, Li Yang
Currently it doesn't matter where the mdio nodes are placed, but with
power management support (i.e. when sleep = <> properties will take
effect), mdio nodes placement will become important: mdio controller
is a part of the ethernet block, so the mdio nodes should be placed
correctly. Otherwise we may wrongly assume that MDIO controllers are
available during sleep.
Suggested-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Changes since RFC:
- Don't use compatible = "simple-bus" for gianfar nodes.
arch/powerpc/boot/dts/mpc8315erdb.dts | 80 ++++++++++++++++-------------
arch/powerpc/boot/dts/mpc8349emitx.dts | 69 +++++++++++++-----------
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 42 ++++++++-------
arch/powerpc/boot/dts/mpc834x_mds.dts | 81 ++++++++++++++++-------------
arch/powerpc/boot/dts/mpc8377_mds.dts | 80 ++++++++++++++++-------------
arch/powerpc/boot/dts/mpc8377_rdb.dts | 67 +++++++++++++-----------
arch/powerpc/boot/dts/mpc8378_mds.dts | 80 ++++++++++++++++-------------
arch/powerpc/boot/dts/mpc8378_rdb.dts | 69 ++++++++++++++-----------
arch/powerpc/boot/dts/mpc8379_mds.dts | 79 ++++++++++++++++------------
arch/powerpc/boot/dts/mpc8379_rdb.dts | 66 +++++++++++++----------
arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 +
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 +
arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 +
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 +
14 files changed, 398 insertions(+), 319 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 88d691c..c0d5b34 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -190,66 +190,74 @@
phy_type = "utmi";
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy0: ethernet-phy@0 {
- interrupt-parent = <&ipic>;
- interrupts = <20 0x8>;
- reg = <0x0>;
- device_type = "ethernet-phy";
- };
- phy1: ethernet-phy@1 {
- interrupt-parent = <&ipic>;
- interrupts = <19 0x8>;
- reg = <0x1>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = < &phy0 >;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&ipic>;
+ interrupts = <20 0x8>;
+ reg = <0x0>;
+ device_type = "ethernet-phy";
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&ipic>;
+ interrupts = <19 0x8>;
+ reg = <0x1>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
tbi-handle = <&tbi1>;
phy-handle = < &phy1 >;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index b5eda94..5558828 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -170,57 +170,52 @@
phy_type = "ulpi";
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
-
- /* Vitesse 8201 */
- phy1c: ethernet-phy@1c {
- interrupt-parent = <&ipic>;
- interrupts = <18 0x8>;
- reg = <0x1c>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy1c>;
linux,network-index = <0>;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ /* Vitesse 8201 */
+ phy1c: ethernet-phy@1c {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
@@ -228,6 +223,18 @@
fixed-link = <1 1 1000 0 0>;
linux,network-index = <1>;
tbi-handle = <&tbi1>;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index c87a601..33ec2f4 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -149,37 +149,41 @@
phy_type = "ulpi";
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
-
- /* Vitesse 8201 */
- phy1c: ethernet-phy@1c {
- interrupt-parent = <&ipic>;
- interrupts = <18 0x8>;
- reg = <0x1c>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy1c>;
linux,network-index = <0>;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ /* Vitesse 8201 */
+ phy1c: ethernet-phy@1c {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index d9adba0..eb24a3b 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -167,69 +167,76 @@
phy_type = "ulpi";
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
-
- phy0: ethernet-phy@0 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x0>;
- device_type = "ethernet-phy";
- };
- phy1: ethernet-phy@1 {
- interrupt-parent = <&ipic>;
- interrupts = <18 0x8>;
- reg = <0x1>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy0>;
linux,network-index = <0>;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x0>;
+ device_type = "ethernet-phy";
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
tbi-handle = <&tbi1>;
phy-handle = <&phy1>;
linux,network-index = <1>;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index cebfc50..f2718d5 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -196,48 +196,15 @@
sleep = <&pmc 0x00c00000>;
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy2: ethernet-phy@2 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- phy3: ethernet-phy@3 {
- interrupt-parent = <&ipic>;
- interrupts = <18 0x8>;
- reg = <0x3>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
@@ -246,14 +213,43 @@
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
@@ -262,6 +258,18 @@
phy-handle = <&phy3>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 32311c8..54cb336 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -248,42 +248,15 @@
sleep = <&pmc 0x00c00000>;
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy2: ethernet-phy@2 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
@@ -292,14 +265,36 @@
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
@@ -308,6 +303,18 @@
tbi-handle = <&tbi1>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 155841d..03b8625 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -235,48 +235,15 @@
sleep = <&pmc 0x00c00000>;
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy2: ethernet-phy@2 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- phy3: ethernet-phy@3 {
- interrupt-parent = <&ipic>;
- interrupts = <18 0x8>;
- reg = <0x3>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
@@ -285,14 +252,43 @@
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
@@ -301,6 +297,18 @@
phy-handle = <&phy3>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 54ad96c..885d6dd 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -248,64 +248,73 @@
sleep = <&pmc 0x00c00000>;
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy2: ethernet-phy@2 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
+ tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
fixed-link = <1 1 1000 0 0>;
+ tbi-handle = <&tbi1>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 9deb5b2..5e4b457 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -233,47 +233,15 @@
sleep = <&pmc 0x00c00000>;
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy2: ethernet-phy@2 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- phy3: ethernet-phy@3 {
- interrupt-parent = <&ipic>;
- interrupts = <18 0x8>;
- reg = <0x3>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
@@ -282,14 +250,43 @@
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
@@ -298,6 +295,18 @@
phy-handle = <&phy3>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 3f4778f..373aa29 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -246,41 +246,15 @@
sleep = <&pmc 0x00c00000>;
};
- mdio@24520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-mdio";
- reg = <0x24520 0x20>;
- phy2: ethernet-phy@2 {
- interrupt-parent = <&ipic>;
- interrupts = <17 0x8>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- mdio@25520 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,gianfar-tbi";
- reg = <0x25520 0x20>;
-
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
@@ -289,14 +263,36 @@
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
+ ranges;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
@@ -305,6 +301,18 @@
tbi-handle = <&tbi1>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
+
+ mdio@25520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x25520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
};
serial0: serial@4500 {
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 76092d3..81e44fa 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -42,6 +42,7 @@
static struct of_device_id __initdata mpc834x_itx_ids[] = {
{ .compatible = "fsl,pq2pro-localbus", },
{ .compatible = "simple-bus", },
+ { .compatible = "gianfar", },
{},
};
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index fc3f2ed..d0a634b 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -112,6 +112,7 @@ static struct of_device_id mpc834x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .compatible = "simple-bus", },
+ { .compatible = "gianfar", },
{},
};
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 634785c..51df7e7 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -96,6 +96,7 @@ static struct of_device_id mpc837x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .compatible = "simple-bus", },
+ { .compatible = "gianfar", },
{},
};
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 3d7b953..76f3b32 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -48,6 +48,7 @@ static struct of_device_id mpc837x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .compatible = "simple-bus", },
+ { .compatible = "gianfar", },
{},
};
--
1.5.6.5
^ permalink raw reply related
* [PATCH v2 1/2] powerpc/83xx: Add power management support for MPC837x boards
From: Anton Vorontsov @ 2009-03-17 18:58 UTC (permalink / raw)
To: Kumar Gala; +Cc: Scott Wood, linuxppc-dev, Li Yang
This patch adds pmc nodes to the device tree files so that the boards
will able to use standby capability of MPC837x processors. The MPC837x
PMC controllers are compatible with MPC8349 ones (i.e. no deep sleep).
sleep = <> properties are used to specify SCCR masks as described
in "Specifying Device Power Management Information (sleep property)"
chapter in Documentation/powerpc/booting-without-of.txt.
Since I2C1 and eSDHC controllers share the same clock source, they
are now placed under sleep-nexus nodes.
A processor is able to wakeup the boards on LAN events (Wake-On-Lan),
console events (with no_console_suspend kernel command line), GPIO
events and external IRQs (IRQ1 and IRQ2).
The processor can also wakeup the boards by the fourth general purpose
timer in GTM1 block, but the GTM wakeup support isn't yet implemented
(it's tested to work, but it's unclear how can we use the quite short
GTM timers, and how do we want to expose the GTM to userspace).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/boot/dts/mpc8377_mds.dts | 68 ++++++++++++++++-------
arch/powerpc/boot/dts/mpc8377_rdb.dts | 98 +++++++++++++++++++++------------
arch/powerpc/boot/dts/mpc8378_mds.dts | 66 +++++++++++++++-------
arch/powerpc/boot/dts/mpc8378_rdb.dts | 96 ++++++++++++++++++++------------
arch/powerpc/boot/dts/mpc8379_mds.dts | 68 ++++++++++++++++-------
arch/powerpc/boot/dts/mpc8379_rdb.dts | 98 +++++++++++++++++++++------------
6 files changed, 323 insertions(+), 171 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 3e3ec8f..cebfc50 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -129,21 +129,38 @@
reg = <0x200 0x100>;
};
- i2c@3000 {
+ sleep-nexus {
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x3000 0x100>;
- interrupts = <14 0x8>;
- interrupt-parent = <&ipic>;
- dfsrr;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
- rtc@68 {
- compatible = "dallas,ds1374";
- reg = <0x68>;
- interrupts = <19 0x8>;
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ interrupts = <19 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+ };
+
+ sdhci@2e000 {
+ compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
};
};
@@ -176,6 +193,7 @@
interrupts = <38 0x8>;
dr_mode = "host";
phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
};
mdio@24520 {
@@ -226,6 +244,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
};
enet1: ethernet@25000 {
@@ -240,6 +260,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi1>;
phy-handle = <&phy3>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
};
serial0: serial@4500 {
@@ -311,15 +333,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
- };
-
- sdhci@2e000 {
- compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- /* Filled in by U-Boot */
- clock-frequency = <0>;
+ sleep = <&pmc 0x03000000>;
};
sata@18000 {
@@ -327,6 +341,7 @@
reg = <0x18000 0x1000>;
interrupts = <44 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x000000c0>;
};
sata@19000 {
@@ -334,6 +349,7 @@
reg = <0x19000 0x1000>;
interrupts = <45 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000030>;
};
/* IPIC
@@ -349,6 +365,13 @@
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
};
pci0: pci@e0008500 {
@@ -403,6 +426,7 @@
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+ sleep = <&pmc 0x00010000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -428,6 +452,7 @@
0 0 0 2 &ipic 1 8
0 0 0 3 &ipic 1 8
0 0 0 4 &ipic 1 8>;
+ sleep = <&pmc 0x00300000>;
clock-frequency = <0>;
pcie@0 {
@@ -459,6 +484,7 @@
0 0 0 2 &ipic 2 8
0 0 0 3 &ipic 2 8
0 0 0 4 &ipic 2 8>;
+ sleep = <&pmc 0x000c0000>;
clock-frequency = <0>;
pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index fb1d884..32311c8 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -127,37 +127,54 @@
gpio-controller;
};
- i2c@3000 {
+ sleep-nexus {
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x3000 0x100>;
- interrupts = <14 0x8>;
- interrupt-parent = <&ipic>;
- dfsrr;
-
- dtt@48 {
- compatible = "national,lm75";
- reg = <0x48>;
- };
-
- at24@50 {
- compatible = "at24,24c256";
- reg = <0x50>;
- };
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
- rtc@68 {
- compatible = "dallas,ds1339";
- reg = <0x68>;
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+
+ at24@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+
+ mcu_pio: mcu@a {
+ #gpio-cells = <2>;
+ compatible = "fsl,mc9s08qg8-mpc8377erdb",
+ "fsl,mcu-mpc8349emitx";
+ reg = <0x0a>;
+ gpio-controller;
+ };
};
- mcu_pio: mcu@a {
- #gpio-cells = <2>;
- compatible = "fsl,mc9s08qg8-mpc8377erdb",
- "fsl,mcu-mpc8349emitx";
- reg = <0x0a>;
- gpio-controller;
+ sdhci@2e000 {
+ compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
};
};
@@ -228,6 +245,7 @@
interrupt-parent = <&ipic>;
interrupts = <38 0x8>;
phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
};
mdio@24520 {
@@ -272,6 +290,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
};
enet1: ethernet@25000 {
@@ -286,6 +306,8 @@
interrupt-parent = <&ipic>;
fixed-link = <1 1 1000 0 0>;
tbi-handle = <&tbi1>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
};
serial0: serial@4500 {
@@ -318,15 +340,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
- };
-
- sdhci@2e000 {
- compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- /* Filled in by U-Boot */
- clock-frequency = <0>;
+ sleep = <&pmc 0x03000000>;
};
sata@18000 {
@@ -334,6 +348,7 @@
reg = <0x18000 0x1000>;
interrupts = <44 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x000000c0>;
};
sata@19000 {
@@ -341,6 +356,7 @@
reg = <0x19000 0x1000>;
interrupts = <45 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000030>;
};
/* IPIC
@@ -356,6 +372,13 @@
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
};
pci0: pci@e0008500 {
@@ -381,6 +404,7 @@
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ sleep = <&pmc 0x00010000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -406,6 +430,7 @@
0 0 0 2 &ipic 1 8
0 0 0 3 &ipic 1 8
0 0 0 4 &ipic 1 8>;
+ sleep = <&pmc 0x00300000>;
clock-frequency = <0>;
pcie@0 {
@@ -437,6 +462,7 @@
0 0 0 2 &ipic 2 8
0 0 0 3 &ipic 2 8
0 0 0 4 &ipic 2 8>;
+ sleep = <&pmc 0x000c0000>;
clock-frequency = <0>;
pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index c3b212c..155841d 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -129,21 +129,38 @@
reg = <0x200 0x100>;
};
- i2c@3000 {
+ sleep-nexus {
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x3000 0x100>;
- interrupts = <14 0x8>;
- interrupt-parent = <&ipic>;
- dfsrr;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
- rtc@68 {
- compatible = "dallas,ds1374";
- reg = <0x68>;
- interrupts = <19 0x8>;
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ interrupts = <19 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+ };
+
+ sdhci@2e000 {
+ compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
};
};
@@ -215,6 +232,7 @@
interrupts = <38 0x8>;
dr_mode = "host";
phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
};
mdio@24520 {
@@ -265,6 +283,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
};
enet1: ethernet@25000 {
@@ -279,6 +299,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi1>;
phy-handle = <&phy3>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
};
serial0: serial@4500 {
@@ -311,15 +333,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
- };
-
- sdhci@2e000 {
- compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- /* Filled in by U-Boot */
- clock-frequency = <0>;
+ sleep = <&pmc 0x03000000>;
};
/* IPIC
@@ -335,6 +349,13 @@
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
};
pci0: pci@e0008500 {
@@ -390,6 +411,7 @@
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
clock-frequency = <0>;
+ sleep = <&pmc 0x00010000>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
@@ -414,6 +436,7 @@
0 0 0 2 &ipic 1 8
0 0 0 3 &ipic 1 8
0 0 0 4 &ipic 1 8>;
+ sleep = <&pmc 0x00300000>;
clock-frequency = <0>;
pcie@0 {
@@ -445,6 +468,7 @@
0 0 0 2 &ipic 2 8
0 0 0 3 &ipic 2 8
0 0 0 4 &ipic 2 8>;
+ sleep = <&pmc 0x000c0000>;
clock-frequency = <0>;
pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 37c8555..54ad96c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -127,37 +127,54 @@
gpio-controller;
};
- i2c@3000 {
+ sleep-nexus {
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x3000 0x100>;
- interrupts = <14 0x8>;
- interrupt-parent = <&ipic>;
- dfsrr;
-
- dtt@48 {
- compatible = "national,lm75";
- reg = <0x48>;
- };
-
- at24@50 {
- compatible = "at24,24c256";
- reg = <0x50>;
- };
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
- rtc@68 {
- compatible = "dallas,ds1339";
- reg = <0x68>;
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+
+ at24@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+
+ mcu_pio: mcu@a {
+ #gpio-cells = <2>;
+ compatible = "fsl,mc9s08qg8-mpc8378erdb",
+ "fsl,mcu-mpc8349emitx";
+ reg = <0x0a>;
+ gpio-controller;
+ };
};
- mcu_pio: mcu@a {
- #gpio-cells = <2>;
- compatible = "fsl,mc9s08qg8-mpc8378erdb",
- "fsl,mcu-mpc8349emitx";
- reg = <0x0a>;
- gpio-controller;
+ sdhci@2e000 {
+ compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
};
};
@@ -228,6 +245,7 @@
interrupt-parent = <&ipic>;
interrupts = <38 0x8>;
phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
};
mdio@24520 {
@@ -271,6 +289,8 @@
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
};
enet1: ethernet@25000 {
@@ -284,6 +304,8 @@
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
fixed-link = <1 1 1000 0 0>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
};
serial0: serial@4500 {
@@ -316,15 +338,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
- };
-
- sdhci@2e000 {
- compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- /* Filled in by U-Boot */
- clock-frequency = <0>;
+ sleep = <&pmc 0x03000000>;
};
/* IPIC
@@ -340,6 +354,13 @@
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
};
pci0: pci@e0008500 {
@@ -365,6 +386,7 @@
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ sleep = <&pmc 0x00010000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -390,6 +412,7 @@
0 0 0 2 &ipic 1 8
0 0 0 3 &ipic 1 8
0 0 0 4 &ipic 1 8>;
+ sleep = <&pmc 0x00300000>;
clock-frequency = <0>;
pcie@0 {
@@ -421,6 +444,7 @@
0 0 0 2 &ipic 2 8
0 0 0 3 &ipic 2 8
0 0 0 4 &ipic 2 8>;
+ sleep = <&pmc 0x000c0000>;
clock-frequency = <0>;
pcie@0 {
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 1b61cda..9deb5b2 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -127,21 +127,38 @@
reg = <0x200 0x100>;
};
- i2c@3000 {
+ sleep-nexus {
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x3000 0x100>;
- interrupts = <14 0x8>;
- interrupt-parent = <&ipic>;
- dfsrr;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
- rtc@68 {
- compatible = "dallas,ds1374";
- reg = <0x68>;
- interrupts = <19 0x8>;
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ interrupts = <19 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+ };
+
+ sdhci@2e000 {
+ compatible = "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
};
};
@@ -213,6 +230,7 @@
interrupts = <38 0x8>;
dr_mode = "host";
phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
};
mdio@24520 {
@@ -262,6 +280,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
};
enet1: ethernet@25000 {
@@ -276,6 +296,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi1>;
phy-handle = <&phy3>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
};
serial0: serial@4500 {
@@ -308,15 +330,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
- };
-
- sdhci@2e000 {
- compatible = "fsl,mpc8379-esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- /* Filled in by U-Boot */
- clock-frequency = <0>;
+ sleep = <&pmc 0x03000000>;
};
sata@18000 {
@@ -324,6 +338,7 @@
reg = <0x18000 0x1000>;
interrupts = <44 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x000000c0>;
};
sata@19000 {
@@ -331,6 +346,7 @@
reg = <0x19000 0x1000>;
interrupts = <45 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000030>;
};
sata@1a000 {
@@ -338,6 +354,7 @@
reg = <0x1a000 0x1000>;
interrupts = <46 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x0000000c>;
};
sata@1b000 {
@@ -345,6 +362,7 @@
reg = <0x1b000 0x1000>;
interrupts = <47 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000003>;
};
/* IPIC
@@ -360,6 +378,13 @@
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
};
pci0: pci@e0008500 {
@@ -414,6 +439,7 @@
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+ sleep = <&pmc 0x00010000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e2f98e6..3f4778f 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -125,37 +125,54 @@
gpio-controller;
};
- i2c@3000 {
+ sleep-nexus {
#address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x3000 0x100>;
- interrupts = <14 0x8>;
- interrupt-parent = <&ipic>;
- dfsrr;
-
- dtt@48 {
- compatible = "national,lm75";
- reg = <0x48>;
- };
-
- at24@50 {
- compatible = "at24,24c256";
- reg = <0x50>;
- };
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
- rtc@68 {
- compatible = "dallas,ds1339";
- reg = <0x68>;
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+
+ dtt@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+
+ at24@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+
+ mcu_pio: mcu@a {
+ #gpio-cells = <2>;
+ compatible = "fsl,mc9s08qg8-mpc8379erdb",
+ "fsl,mcu-mpc8349emitx";
+ reg = <0x0a>;
+ gpio-controller;
+ };
};
- mcu_pio: mcu@a {
- #gpio-cells = <2>;
- compatible = "fsl,mc9s08qg8-mpc8379erdb",
- "fsl,mcu-mpc8349emitx";
- reg = <0x0a>;
- gpio-controller;
+ sdhci@2e000 {
+ compatible = "fsl,mpc8379-esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ /* Filled in by U-Boot */
+ clock-frequency = <0>;
};
};
@@ -226,6 +243,7 @@
interrupt-parent = <&ipic>;
interrupts = <38 0x8>;
phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
};
mdio@24520 {
@@ -269,6 +287,8 @@
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
};
enet1: ethernet@25000 {
@@ -283,6 +303,8 @@
interrupt-parent = <&ipic>;
fixed-link = <1 1 1000 0 0>;
tbi-handle = <&tbi1>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
};
serial0: serial@4500 {
@@ -315,15 +337,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
- };
-
- sdhci@2e000 {
- compatible = "fsl,mpc8379-esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- /* Filled in by U-Boot */
- clock-frequency = <0>;
+ sleep = <&pmc 0x03000000>;
};
sata@18000 {
@@ -331,6 +345,7 @@
reg = <0x18000 0x1000>;
interrupts = <44 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x000000c0>;
};
sata@19000 {
@@ -338,6 +353,7 @@
reg = <0x19000 0x1000>;
interrupts = <45 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000030>;
};
sata@1a000 {
@@ -345,6 +361,7 @@
reg = <0x1a000 0x1000>;
interrupts = <46 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x0000000c>;
};
sata@1b000 {
@@ -352,6 +369,7 @@
reg = <0x1b000 0x1000>;
interrupts = <47 0x8>;
interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000003>;
};
/* IPIC
@@ -367,6 +385,13 @@
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
};
pci0: pci@e0008500 {
@@ -392,6 +417,7 @@
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ sleep = <&pmc 0x00010000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
--
1.5.6.5
^ permalink raw reply related
* Re: [PATCH 3/4] NAND: FSL-UPM: Add wait flags to support board/chip specific delays
From: Anton Vorontsov @ 2009-03-17 19:01 UTC (permalink / raw)
To: Wolfgang Grandegegr; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <1237281143-8768-4-git-send-email-wg@grandegger.com>
On Tue, Mar 17, 2009 at 10:12:21AM +0100, Wolfgang Grandegegr wrote:
> From: Wolfgang Grandegger <wg@grandegger.com>
>
> The NAND flash on the TQM8548_BE modules requires a short delay after
> running the UPM pattern. The TQM8548_BE requires a further short delay
> after writing out a buffer. Normally the R/B pin should be checked, but
> it's not connected on the TQM8548_BE. The existing driver uses similar
> fixed delay points. To manage these extra delays in a more general way,
> I introduced the "wait_flags" field allowing the board-specific driver
> to specify various types of extra delay.
>
> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
> ---
Just a nitpick...
> + prop = of_get_property(ofdev->node, "wait-flags", &size);
> + if (prop && size == sizeof(uint32_t))
> + fun->wait_flags = *prop;
> + else
> + fun->wait_flags = (FSL_UPM_WAIT_RUN_PATTERN |
> + FSL_UPM_WAIT_WRITE_BYTE);
No need for parenthesis here.
Thanks,
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 4/4] powerpc/85xx: TQM8548: Update DTS file for multi-chip support
From: Anton Vorontsov @ 2009-03-17 19:23 UTC (permalink / raw)
To: Wolfgang Grandegegr; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <1237281143-8768-5-git-send-email-wg@grandegger.com>
On Tue, Mar 17, 2009 at 10:12:22AM +0100, Wolfgang Grandegegr wrote:
> From: Wolfgang Grandegger <wg@grandegger.com>
>
> This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
> flash memory on the TQM8548 modules.
>
> This patch should go through the powerpc/85xx channel.
>
> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
> ---
> arch/powerpc/boot/dts/tqm8548.dts | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
> index 81d3fbb..e5c3c67 100644
> --- a/arch/powerpc/boot/dts/tqm8548.dts
> +++ b/arch/powerpc/boot/dts/tqm8548.dts
> @@ -389,6 +389,11 @@
> reg = <3 0x0 0x800>;
> fsl,upm-addr-offset = <0x10>;
> fsl,upm-cmd-offset = <0x08>;
> + wait-flags = <0x05>;
Should be at least fsl,upm-wait-flags. (And the flags should
be documented in dts-bindings ;-).
> + /* Multi-chip device */
> + fsl,upm-mar-chip-offset = <0x200>;
> + max-chips = <2>;
num-chips would be more appropriate, no?
> + chip-offset = <0x200>;
I believe this is from some old code...
Thanks!
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: Freescale MPC8313ERDB-RevA and newer BSP/kernel
From: Mark Bishop @ 2009-03-17 16:52 UTC (permalink / raw)
To: Vijay Nikam; +Cc: linuxppc-dev
In-Reply-To: <f234e2140903152241i7a8b4c39jd4b4f5935bffed3e@mail.gmail.com>
Quoting Vijay Nikam <vijay.t.nikam@gmail.com>:
> Hi Mark,
>
> Could you please let me know how you booted the latest Linux kernel on
> MPC8313ERDB board ? ? ? As I tried but was not successful. It hangs or
> does nothing and waits at network configuration, mean to determine IP
> address (as I have used dhcp).
>
> Kindly please acknowledge ... thank you ...
>
> Kind Regards,
> Vijay Nikam
>
>
I modified the .dts file (mpc8313erdb.dts)
WAS interrupts = <37 0x8 36 0x8 35 0x8>;
IS interrupts = <34 0x8 33 0x8 32 0x8>;
WAS interrupts = <34 0x8 33 0x8 32 0x8>;
IS interrupts = <37 0x8 36 0x8 35 0x8>;
This is from memory, so let me know if you have a problem.
And sorry for the manual diff.
Any idea on how to get spidev up and running on this board? :)
^ permalink raw reply
* [PATCH v4 4/4] powerpc/mm: e300c2/c3/c4 TLB errata workaround
From: Kumar Gala @ 2009-03-17 16:20 UTC (permalink / raw)
Cc: linuxppc-dev
Complete workaround for DTLB errata in e300c2/c3/c4 processors.
Due to the bug, the hardware-implemented LRU algorythm always goes to way
1 of the TLB. This fix implements the proposed software workaround in
form of a LRW table for chosing the TLB-way.
Based on patch from David Jander <david@protonic.nl>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
* Moved SPRG4 init into __setup_cpu_603. Realized we can't do a feature fixup
of it as early as I had it.
- k
arch/powerpc/include/asm/mmu.h | 6 ++++++
arch/powerpc/kernel/cpu_setup_6xx.S | 4 ++++
arch/powerpc/kernel/cputable.c | 9 ++++++---
arch/powerpc/kernel/head_32.S | 32 ++++++++++++++++++++++++++++----
4 files changed, 44 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 10476a8..cbf1543 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -46,6 +46,12 @@
*/
#define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
+/* This indicates that the processor doesn't handle way selection
+ * properly and needs SW to track and update the LRU state. This
+ * is specific to an errata on e300c2/c3/c4 class parts
+ */
+#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
+
#ifndef __ASSEMBLY__
#include <asm/cputable.h>
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 72d1d73..0ca353f 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -18,6 +18,10 @@
_GLOBAL(__setup_cpu_603)
mflr r4
+BEGIN_MMU_FTR_SECTION
+ li r10,0
+ mtspr SPRN_SPRG4,r10 /* init SW LRU tracking */
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
BEGIN_FTR_SECTION
bl __init_fpu_registers
END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index ccea243..cd1b687 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1090,7 +1090,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_name = "e300c2",
.cpu_features = CPU_FTRS_E300C2,
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
- .mmu_features = MMU_FTR_USE_HIGH_BATS,
+ .mmu_features = MMU_FTR_USE_HIGH_BATS |
+ MMU_FTR_NEED_DTLB_SW_LRU,
.icache_bsize = 32,
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_603,
@@ -1103,7 +1104,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_name = "e300c3",
.cpu_features = CPU_FTRS_E300,
.cpu_user_features = COMMON_USER,
- .mmu_features = MMU_FTR_USE_HIGH_BATS,
+ .mmu_features = MMU_FTR_USE_HIGH_BATS |
+ MMU_FTR_NEED_DTLB_SW_LRU,
.icache_bsize = 32,
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_603,
@@ -1118,7 +1120,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_name = "e300c4",
.cpu_features = CPU_FTRS_E300,
.cpu_user_features = COMMON_USER,
- .mmu_features = MMU_FTR_USE_HIGH_BATS,
+ .mmu_features = MMU_FTR_USE_HIGH_BATS |
+ MMU_FTR_NEED_DTLB_SW_LRU,
.icache_bsize = 32,
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_603,
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 58dcc7c..54e68c1 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -593,9 +593,21 @@ BEGIN_FTR_SECTION
rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
+ mfspr r2,SPRN_SRR1 /* Need to restore CR0 */
+ mtcrf 0x80,r2
+BEGIN_MMU_FTR_SECTION
+ li r0,1
+ mfspr r1,SPRN_SPRG4
+ rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */
+ slw r0,r0,r2
+ xor r1,r0,r1
+ srw r0,r1,r2
+ mtspr SPRN_SPRG4,r1
+ mfspr r2,SPRN_SRR1
+ rlwimi r2,r0,31-14,14,14
+ mtspr SPRN_SRR1,r2
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
tlbld r3
- mfspr r3,SPRN_SRR1 /* Need to restore CR0 */
- mtcrf 0x80,r3
rfi
DataAddressInvalid:
mfspr r3,SPRN_SRR1
@@ -661,9 +673,21 @@ BEGIN_FTR_SECTION
rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
+ mfspr r2,SPRN_SRR1 /* Need to restore CR0 */
+ mtcrf 0x80,r2
+BEGIN_MMU_FTR_SECTION
+ li r0,1
+ mfspr r1,SPRN_SPRG4
+ rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */
+ slw r0,r0,r2
+ xor r1,r0,r1
+ srw r0,r1,r2
+ mtspr SPRN_SPRG4,r1
+ mfspr r2,SPRN_SRR1
+ rlwimi r2,r0,31-14,14,14
+ mtspr SPRN_SRR1,r2
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
tlbld r3
- mfspr r3,SPRN_SRR1 /* Need to restore CR0 */
- mtcrf 0x80,r3
rfi
#ifndef CONFIG_ALTIVEC
--
1.5.6.6
^ permalink raw reply related
* [PATCH] gianfar: pass the proper dev to DMA ops
From: Kumar Gala @ 2009-03-17 16:16 UTC (permalink / raw)
To: davem; +Cc: Becky Bruce, netdev, Andy Fleming, linuxppc-dev
We need to be passing the of_platform device struct into the DMA ops as
its the one that has the archdata setup to know which low-level DMA ops we
should be using (not the net_device one). This isn't an issue until we
expect the archdata to be setup correctly.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
Dave,
This is for net-next. We are working on having per device dma ops for .30 and
expect the struct device archdata to be setup properly but in .29 we still
default to a direct DMA ops on ppc32 so this "bug" will never show up.
- k
drivers/net/gianfar.c | 34 ++++++++++++++++++----------------
drivers/net/gianfar.h | 3 ++-
2 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index bed30ef..8659833 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -365,8 +365,10 @@ static int gfar_probe(struct of_device *ofdev,
return -ENOMEM;
priv = netdev_priv(dev);
- priv->dev = dev;
+ priv->ndev = dev;
+ priv->ofdev = ofdev;
priv->node = ofdev->node;
+ SET_NETDEV_DEV(dev, &ofdev->dev);
err = gfar_of_init(dev);
@@ -538,7 +540,7 @@ static int gfar_remove(struct of_device *ofdev)
dev_set_drvdata(&ofdev->dev, NULL);
iounmap(priv->regs);
- free_netdev(priv->dev);
+ free_netdev(priv->ndev);
return 0;
}
@@ -870,7 +872,7 @@ void stop_gfar(struct net_device *dev)
free_skb_resources(priv);
- dma_free_coherent(&dev->dev,
+ dma_free_coherent(&priv->ofdev->dev,
sizeof(struct txbd8)*priv->tx_ring_size
+ sizeof(struct rxbd8)*priv->rx_ring_size,
priv->tx_bd_base,
@@ -892,12 +894,12 @@ static void free_skb_resources(struct gfar_private *priv)
if (!priv->tx_skbuff[i])
continue;
- dma_unmap_single(&priv->dev->dev, txbdp->bufPtr,
+ dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
txbdp->length, DMA_TO_DEVICE);
txbdp->lstatus = 0;
for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
txbdp++;
- dma_unmap_page(&priv->dev->dev, txbdp->bufPtr,
+ dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
txbdp->length, DMA_TO_DEVICE);
}
txbdp++;
@@ -914,7 +916,7 @@ static void free_skb_resources(struct gfar_private *priv)
if(priv->rx_skbuff != NULL) {
for (i = 0; i < priv->rx_ring_size; i++) {
if (priv->rx_skbuff[i]) {
- dma_unmap_single(&priv->dev->dev, rxbdp->bufPtr,
+ dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
priv->rx_buffer_size,
DMA_FROM_DEVICE);
@@ -980,7 +982,7 @@ int startup_gfar(struct net_device *dev)
gfar_write(®s->imask, IMASK_INIT_CLEAR);
/* Allocate memory for the buffer descriptors */
- vaddr = (unsigned long) dma_alloc_coherent(&dev->dev,
+ vaddr = (unsigned long) dma_alloc_coherent(&priv->ofdev->dev,
sizeof (struct txbd8) * priv->tx_ring_size +
sizeof (struct rxbd8) * priv->rx_ring_size,
&addr, GFP_KERNEL);
@@ -1192,7 +1194,7 @@ err_rxalloc_fail:
rx_skb_fail:
free_skb_resources(priv);
tx_skb_fail:
- dma_free_coherent(&dev->dev,
+ dma_free_coherent(&priv->ofdev->dev,
sizeof(struct txbd8)*priv->tx_ring_size
+ sizeof(struct rxbd8)*priv->rx_ring_size,
priv->tx_bd_base,
@@ -1345,7 +1347,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
if (i == nr_frags - 1)
lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
- bufaddr = dma_map_page(&dev->dev,
+ bufaddr = dma_map_page(&priv->ofdev->dev,
skb_shinfo(skb)->frags[i].page,
skb_shinfo(skb)->frags[i].page_offset,
length,
@@ -1377,7 +1379,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
/* setup the TxBD length and buffer pointer for the first BD */
priv->tx_skbuff[priv->skb_curtx] = skb;
- txbdp_start->bufPtr = dma_map_single(&dev->dev, skb->data,
+ txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
skb_headlen(skb), DMA_TO_DEVICE);
lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
@@ -1563,7 +1565,7 @@ static void gfar_reset_task(struct work_struct *work)
{
struct gfar_private *priv = container_of(work, struct gfar_private,
reset_task);
- struct net_device *dev = priv->dev;
+ struct net_device *dev = priv->ndev;
if (dev->flags & IFF_UP) {
stop_gfar(dev);
@@ -1610,7 +1612,7 @@ static int gfar_clean_tx_ring(struct net_device *dev)
(lstatus & BD_LENGTH_MASK))
break;
- dma_unmap_single(&dev->dev,
+ dma_unmap_single(&priv->ofdev->dev,
bdp->bufPtr,
bdp->length,
DMA_TO_DEVICE);
@@ -1619,7 +1621,7 @@ static int gfar_clean_tx_ring(struct net_device *dev)
bdp = next_txbd(bdp, base, tx_ring_size);
for (i = 0; i < frags; i++) {
- dma_unmap_page(&dev->dev,
+ dma_unmap_page(&priv->ofdev->dev,
bdp->bufPtr,
bdp->length,
DMA_TO_DEVICE);
@@ -1696,7 +1698,7 @@ static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
struct gfar_private *priv = netdev_priv(dev);
u32 lstatus;
- bdp->bufPtr = dma_map_single(&dev->dev, skb->data,
+ bdp->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
priv->rx_buffer_size, DMA_FROM_DEVICE);
lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
@@ -1856,7 +1858,7 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
skb = priv->rx_skbuff[priv->skb_currx];
- dma_unmap_single(&priv->dev->dev, bdp->bufPtr,
+ dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
priv->rx_buffer_size, DMA_FROM_DEVICE);
/* We drop the frame if we failed to allocate a new buffer */
@@ -1916,7 +1918,7 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
static int gfar_poll(struct napi_struct *napi, int budget)
{
struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
- struct net_device *dev = priv->dev;
+ struct net_device *dev = priv->ndev;
int tx_cleaned = 0;
int rx_cleaned = 0;
unsigned long flags;
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index 54332b0..dd499d7 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -738,7 +738,8 @@ struct gfar_private {
spinlock_t rxlock;
struct device_node *node;
- struct net_device *dev;
+ struct net_device *ndev;
+ struct of_device *ofdev;
struct napi_struct napi;
/* skb array and index */
--
1.5.6.6
^ permalink raw reply related
* Problem with radeonfb on PowerPC 7448&MV64560
From: Eduard Fuchs @ 2009-03-17 15:30 UTC (permalink / raw)
To: Linuxppc-dev
Hi all,
since several days I'm trying to run an ATI 9250 (PCI) graphic card under
Linux Kernel 2.6.27.19. Nevertheless without success. The kernel shows the
following message:
videoboot: Booting PCI video card bus 0, function 0, device 7
biosEmu: undefined interrupt 15h called!
biosEmu/bios.int42: unknown function AH=0x0, AL=0x7, BL=0x0
radeonfb (0000:00:07.0): Cannot match card to OF node !
RADEON: CHIP_FAMILY 10 (0xa)
RADEON: MMIO_BASE 0xf1058000
RADEON: MMIO_BASE_PHYS 0x88000000
radeonfb (0000:00:07.0): Found 0k of SDRAM 64 bits wide videoram
RADEON: Try map FB Phys 0x80000000, size 0, 16777216. 0
radeonfb (0000:00:07.0): cannot map FB
radeonfb: probe of 0000:00:07.0 failed with error -5
This is the PCI initialization :
PCI: Probing PCI hardware
pci 0000:00:00.0: unknown header type 7f, ignoring device
pci 0000:00:08.0: PME# supported from D0 D1 D2 D3hot
pci 0000:00:08.0: PME# disabled
pci 0000:00:08.1: PME# supported from D0 D1 D2 D3hot
pci 0000:00:08.1: PME# disabled
pci 0000:00:08.2: PME# supported from D0 D1 D2 D3hot
pci 0000:00:08.2: PME# disabled
PCI: PHB (bus 0) bridge rsrc 0: 0000000000011000-0000000000020fff [0x100],
parent c0439ce0 (PCI IO)
PCI BUS: 0xc063e044:0xc0439ce0, 0xc063e060:0xc0439cc4
PCI: PHB (bus 0) bridge rsrc 1: 0000000080000000-00000000bfffffff [0x200],
parent c0439cc4 (PCI mem)
PCI: PHB (bus 0) bridge rsrc 0: 00000000d8080000-00000000d808ffff [0x100],
parent c0439ce0 (PCI IO)
PCI: PHB (bus 0) bridge rsrc 1: 0000000060000000-000000007fffffff [0x200],
parent c0439cc4 (PCI mem)
PCI: Allocating 0000:00:07.0: Resource 0: 0000000080000000..0000000087ffffff
[21208]
PCI: Allocating 0000:00:07.0: Resource 1: 00000000d8011000..00000000d80110ff
[20101]
PCI: Cannot allocate resource region 1 of device 0000:00:07.0, will remap
PCI: Allocating 0000:00:07.0: Resource 2: 0000000088000000..000000008800ffff
[20200]
PCI: Allocating 0000:00:07.1: Resource 0: 0000000090000000..0000000097ffffff
[21208]
PCI: Allocating 0000:00:07.1: Resource 1: 0000000098000000..000000009800ffff
[20200]
PCI: Allocating 0000:00:08.0: Resource 0: 0000000098010000..0000000098010fff
[20200]
PCI: Allocating 0000:00:08.1: Resource 0: 0000000098011000..0000000098011fff
[20200]
PCI: Allocating 0000:00:08.2: Resource 0: 0000000098012000..00000000980120ff
[20200]
PCI: Allocating 0000:00:09.0: Resource 0: 00000000d8011100..00000000d8011107
[20101]
PCI: Cannot allocate resource region 0 of device 0000:00:09.0, will remap
PCI: Allocating 0000:00:09.0: Resource 1: 00000000d8011108..00000000d801110b
[20101]
PCI: Cannot allocate resource region 1 of device 0000:00:09.0, will remap
PCI: Allocating 0000:00:09.0: Resource 2: 00000000d8011110..00000000d8011117
[20101]
PCI: Cannot allocate resource region 2 of device 0000:00:09.0, will remap
PCI: Allocating 0000:00:09.0: Resource 3: 00000000d8011118..00000000d801111b
[20101]
PCI: Cannot allocate resource region 3 of device 0000:00:09.0, will remap
PCI: Allocating 0000:00:09.0: Resource 4: 00000000d8011120..00000000d801112f
[20101]
PCI: Cannot allocate resource region 4 of device 0000:00:09.0, will remap
PCI: Allocating 0000:00:09.0: Resource 5: 0000000098012400..00000000980127ff
[20200]
PCI: Allocating 0000:00:0a.0: Resource 0: 000000009c000000..000000009fffffff
[20200]
PCI: Assigning unassigned resouces...
bus: 00 index 0 io port: [11000, 20fff]
bus: 00 index 1 mmio: [80000000, bfffffff]
bus: 00 index 0 io port: [d8080000, d808ffff]
bus: 00 index 1 mmio: [60000000, 7fffffff]
At chipset's MV6450 init, I haven't found any errors. Otherwise an PCI SATA
controller and an 3Com network card running very well. I have no more ideas,
where can be the possible problem. Do you have any suggestions?
Best regards
Eduard Fuchs
^ permalink raw reply
* Please pull mpc52xx-next - CPU_FTR_NEED_COHERENT fixes for 2.6.29
From: Grant Likely @ 2009-03-17 15:29 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Kumar Gala, linuxppc-dev, Piotr Ziecik
Hi Ben,
Here are 2 coherency related fixes that need to go into 2.6.29. The
first is the patch we discussed last night about setting
CPU_FTR_NEED_COHERENT when the 5200 is selected. After discussing it
with galak, we agreed to stick with the ugly way for 2.6.29 and then
fix all of them at once in 2.6.30 (CONFIG_PPC_83XX, CONFIG_PPC_8260
and CONFIG_PPC_MPC52xx).
Second is Kumar's page table _PAGE_COHERENT fix. I've tested it on MPC5200.
Cheers,
g.
The following changes since commit 5bee17f18b595937e6beafeee5197868a3f74a06:
Kyle McMartin (1):
parisc: sba_iommu: fix build bug when CONFIG_PARISC_AGP=y
are available in the git repository at:
git://git.secretlab.ca/git/linux-2.6-mpc52xx.git merge
Kumar Gala (1):
powerpc/mm: Respect _PAGE_COHERENT on classic ppc32 SW
Piotr Ziecik (1):
powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xx
arch/powerpc/include/asm/cputable.h | 4 +++-
arch/powerpc/kernel/head_32.S | 6 +++---
2 files changed, 6 insertions(+), 4 deletions(-)
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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