* [PATCH] powerpc: Refactor board check for quirk
From: Kumar Gala @ 2009-04-15 19:37 UTC (permalink / raw)
To: linuxppc-dev
Refactor the check to determine if the quirk is applicable to the boards
into one inline function so we only have to change one place to add more
boards that the quirks might be applicable to.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/platforms/fsl_uli1575.c | 22 ++++++++++++----------
1 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 1db6b9e..4e5ae0a 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -51,13 +51,19 @@ u8 uli_pirq_to_irq[8] = {
ULI_8259_NONE, /* PIRQH */
};
+static inline bool is_quirk_valid(void)
+{
+ return (machine_is(mpc86xx_hpcn) ||
+ machine_is(mpc8544_ds) ||
+ machine_is(mpc8572_ds))
+}
+
/* Bridge */
static void __devinit early_uli5249(struct pci_dev *dev)
{
unsigned char temp;
- if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ if (!is_quirk_valid())
return;
pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO |
@@ -80,8 +86,7 @@ static void __devinit quirk_uli1575(struct pci_dev *dev)
{
int i;
- if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ if (!is_quirk_valid())
return;
/*
@@ -149,8 +154,7 @@ static void __devinit quirk_final_uli1575(struct pci_dev *dev)
* IRQ 14: Edge
* IRQ 15: Edge
*/
- if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ if (!is_quirk_valid())
return;
outb(0xfa, 0x4d0);
@@ -176,8 +180,7 @@ static void __devinit quirk_uli5288(struct pci_dev *dev)
unsigned char c;
unsigned int d;
- if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ if (!is_quirk_valid())
return;
/* read/write lock */
@@ -201,8 +204,7 @@ static void __devinit quirk_uli5229(struct pci_dev *dev)
{
unsigned short temp;
- if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ if (!is_quirk_valid())
return;
pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE |
--
1.6.0.6
^ permalink raw reply related
* Re: [PATCH] powerpc/85xx: Add P2020DS board support
From: Anton Vorontsov @ 2009-04-15 17:54 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Ted Peters
In-Reply-To: <5F3E22A9-AC7D-4066-B861-C98755BAE4A8@kernel.crashing.org>
On Wed, Apr 15, 2009 at 12:22:48PM -0500, Kumar Gala wrote:
>
> On Apr 15, 2009, at 11:50 AM, Anton Vorontsov wrote:
>
>>
>> Sorry for bringing this up again... But can we decide on soc's
>> compatible scheme and finally remove the device_type = "soc"
>> for new boards? "fsl,p2020-soc", "fsl,soc", "simple-bus" maybe?
>>
>> Thanks,
>
> We can, but I don't want to couple the two issues. If someone wants to
> work and post patches related to this issue I'm all for it.
I posted it in 2008:
http://www.mail-archive.com/linuxppc-dev@ozlabs.org/msg14311.html
Do we agree on "fsl,<cpu>-{immr,ccsr}", "fsl,{immr,ccsr}", "fsl,soc",
"simple-bus"?
IIRC you didn't like "fsl,soc" in general and asked for more
discussion:
http://ozlabs.org/pipermail/linuxppc-dev/2008-January/050753.html
And from time to time I'm just trying to provoke this discussion.
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: fixed phy -- how do we decide to use this code?
From: Anton Vorontsov @ 2009-04-15 17:25 UTC (permalink / raw)
To: Kumar Gala; +Cc: netdev, Linuxppc-dev Development
In-Reply-To: <19D58213-D01B-47C1-8A78-6C1D86E624AE@kernel.crashing.org>
On Wed, Apr 15, 2009 at 12:20:14PM -0500, Kumar Gala wrote:
>
> On Apr 15, 2009, at 11:17 AM, Anton Vorontsov wrote:
>
>> On Wed, Apr 15, 2009 at 10:54:40AM -0500, Kumar Gala wrote:
>>> Vitaly, Anton
>>>
>>> You guys have used this code.. I was wondering how we decide to used
>>> the
>>> fixed phy vs another phy. Is this a runtime decision based on
>>> something
>>> in the device tree or purely at compile time?
>>
>> It's specified via fixed-link property in the device tree.
>> The bindings described in Documentation/powerpc/dts-bindings/fsl/
>> tsec.txt.
>
> Ok, I want to make sure I can build a platform that uses a normal PHY
> that is detected (like a marvell PHY) and and have another platform that
> is fixed-link in the same kernel image. Sounds like we'll be ok.
Yep, that will work.
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: Add P2020DS board support
From: Kumar Gala @ 2009-04-15 17:22 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, Ted Peters
In-Reply-To: <20090415165009.GA10214@oksana.dev.rtsoft.ru>
On Apr 15, 2009, at 11:50 AM, Anton Vorontsov wrote:
>
> Sorry for bringing this up again... But can we decide on soc's
> compatible scheme and finally remove the device_type = "soc"
> for new boards? "fsl,p2020-soc", "fsl,soc", "simple-bus" maybe?
>
> Thanks,
We can, but I don't want to couple the two issues. If someone wants
to work and post patches related to this issue I'm all for it.
- k
^ permalink raw reply
* Re: fixed phy -- how do we decide to use this code?
From: Kumar Gala @ 2009-04-15 17:20 UTC (permalink / raw)
To: avorontsov; +Cc: netdev, Linuxppc-dev Development
In-Reply-To: <20090415161728.GA5670@oksana.dev.rtsoft.ru>
On Apr 15, 2009, at 11:17 AM, Anton Vorontsov wrote:
> On Wed, Apr 15, 2009 at 10:54:40AM -0500, Kumar Gala wrote:
>> Vitaly, Anton
>>
>> You guys have used this code.. I was wondering how we decide to
>> used the
>> fixed phy vs another phy. Is this a runtime decision based on
>> something
>> in the device tree or purely at compile time?
>
> It's specified via fixed-link property in the device tree.
> The bindings described in Documentation/powerpc/dts-bindings/fsl/
> tsec.txt.
Ok, I want to make sure I can build a platform that uses a normal PHY
that is detected (like a marvell PHY) and and have another platform
that is fixed-link in the same kernel image. Sounds like we'll be ok.
- k
^ permalink raw reply
* Re: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support and cleanup DCR
From: Grant Likely @ 2009-04-15 16:56 UTC (permalink / raw)
To: Stephen Neuendorffer
Cc: linux-fbdev-devel, adaplas, Suneel Garapati, linuxppc-dev,
John Linn, akonovalov
In-Reply-To: <20090415164417.E85B41600050@mail201-sin.bigfish.com>
On Wed, Apr 15, 2009 at 10:44 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
>
>> -----Original Message-----
>> From: Grant Likely [mailto:grant.likely@secretlab.ca]
>> Sent: Wednesday, April 15, 2009 9:03 AM
>> To: Stephen Neuendorffer
>> Cc: John Linn; jwboyer@linux.vnet.ibm.com; linux-fbdev-devel@lists.sourc=
eforge.net; linuxppc-
>> dev@ozlabs.org; akonovalov@ru.mvista.com; adaplas@gmail.com; Suneel Gara=
pati
>> Subject: Re: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support a=
nd cleanup DCR
>>
>> On Wed, Apr 15, 2009 at 9:58 AM, Stephen Neuendorffer
>> <stephen.neuendorffer@xilinx.com> wrote:
>> >> > - =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, &res);
>> >> > - =A0 =A0 =A0 if (rc) {
>> >> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid address\n"=
);
>> >> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
>> >> > + =A0 =A0 =A0 /*
>> >> > + =A0 =A0 =A0 =A0* To check whether the core is connected directly =
to DCR or PLB
>> >> > + =A0 =A0 =A0 =A0* interface and initialize the tft_access accordin=
gly.
>> >> > + =A0 =A0 =A0 =A0*/
>> >> > + =A0 =A0 =A0 p =3D (u32 *)of_get_property(op->node, "xlnx,dcr-splb=
-slave-if", NULL);
>> >>
>> >> Hmmm. =A0This binding is undocumented. =A0It would be better to make =
the
>> >> decision on the presence/absence of the dcr-reg and/or reg properties=
.
>> >
>> > For backward compatibility with the 'old' way, the device tree generat=
or for this core has both
>> dcr-reg and reg properties (where the reg has been translated back throu=
gh the bridge).
>>
>> So, what is in the regs and dcr-regs properties when DCR is used?
>>
>> How about when MMIO is used?
>>
>
> Currently:
> Core has DCR access, connected DCR bus:
> =A0 =A0 =A0 =A0device tree contains dcr-reg property.
> Core has DCR access, accessed through plb->dcr bridge:
> =A0 =A0 =A0 =A0device tree contains dcr-reg property, AND for backward co=
mpatibility with the
> =A0 =A0 =A0 =A0old driver, a reg property which contains the apparent reg=
isters on the bus.
> Core has PLB access:
> =A0 =A0 =A0 =A0device tree contains reg property only.
>
> So, I guess it really doesn't matter... The only interesting case is the =
second one where (because the way the reg property is published), either me=
thod will work... =A0So, nevermind, the device tree question is completely =
independent and I agree with your comment that there's probably not a need =
for a separate binding.
>
> What I do think would be nice (at some point in the future maybe) is perh=
aps a bit of DCR_or_PLB abstraction for this core and the ll_temac driver t=
o share which would avoid duplicating the code in each driver as to whether=
it uses DCR or PLB access...
Good idea.
g.
>
> Steve
>
>
> This email and any attachments are intended for the sole use of the named=
recipient(s) and contain(s) confidential information that may be proprieta=
ry, privileged or copyrighted under applicable law. If you are not the inte=
nded recipient, do not read, copy, or forward this email message or any att=
achments. Delete this email message and any attachments immediately.
>
>
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: Add P2020DS board support
From: Anton Vorontsov @ 2009-04-15 16:50 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Ted Peters
In-Reply-To: <1239810564-8403-1-git-send-email-galak@kernel.crashing.org>
On Wed, Apr 15, 2009 at 10:49:24AM -0500, Kumar Gala wrote:
> From: Ted Peters <ted.peters@freescale.com>
>
> The P2020 is a dual e500v2 core based SOC with:
> * 3 PCIe controllers
> * 2 General purpose DMA controllers
> * 2 sRIO controllers
> * 3 eTSECS
> * USB 2.0
> * SDHC
> * SPI, I2C, DUART
> * enhanced localbus
> * and optional Security (P2020E) security w/XOR acceleration
>
> The p2020 DS reference board is pretty similar to the existing MPC85xx
> DS boards and has a ULI 1575 connected on one of the PCIe controllers.
>
> Signed-off-by: Ted Peters <Ted.Peters@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
[...]
> + soc@ffe00000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + compatible = "simple-bus";
Sorry for bringing this up again... But can we decide on soc's
compatible scheme and finally remove the device_type = "soc"
for new boards? "fsl,p2020-soc", "fsl,soc", "simple-bus" maybe?
Thanks,
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* RE: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support and cleanup DCR
From: Stephen Neuendorffer @ 2009-04-15 16:44 UTC (permalink / raw)
To: Grant Likely
Cc: linux-fbdev-devel, adaplas, Suneel Garapati, linuxppc-dev,
John Linn, akonovalov
In-Reply-To: <fa686aa40904150903r584a3fd6wb75d4f9f606873dc@mail.gmail.com>
> -----Original Message-----
> From: Grant Likely [mailto:grant.likely@secretlab.ca]
> Sent: Wednesday, April 15, 2009 9:03 AM
> To: Stephen Neuendorffer
> Cc: John Linn; jwboyer@linux.vnet.ibm.com; linux-fbdev-devel@lists.source=
forge.net; linuxppc-
> dev@ozlabs.org; akonovalov@ru.mvista.com; adaplas@gmail.com; Suneel Garap=
ati
> Subject: Re: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support an=
d cleanup DCR
> =
> On Wed, Apr 15, 2009 at 9:58 AM, Stephen Neuendorffer
> <stephen.neuendorffer@xilinx.com> wrote:
> >> > - =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, &res);
> >> > - =A0 =A0 =A0 if (rc) {
> >> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid address\n")=
;
> >> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> >> > + =A0 =A0 =A0 /*
> >> > + =A0 =A0 =A0 =A0* To check whether the core is connected directly t=
o DCR or PLB
> >> > + =A0 =A0 =A0 =A0* interface and initialize the tft_access according=
ly.
> >> > + =A0 =A0 =A0 =A0*/
> >> > + =A0 =A0 =A0 p =3D (u32 *)of_get_property(op->node, "xlnx,dcr-splb-=
slave-if", NULL);
> >>
> >> Hmmm. =A0This binding is undocumented. =A0It would be better to make t=
he
> >> decision on the presence/absence of the dcr-reg and/or reg properties.=
> >
> > For backward compatibility with the 'old' way, the device tree generato=
r for this core has both
> dcr-reg and reg properties (where the reg has been translated back throug=
h the bridge).
> =
> So, what is in the regs and dcr-regs properties when DCR is used?
> =
> How about when MMIO is used?
> =
Currently:
Core has DCR access, connected DCR bus:
device tree contains dcr-reg property.
Core has DCR access, accessed through plb->dcr bridge:
device tree contains dcr-reg property, AND for backward compatibility with=
the =
old driver, a reg property which contains the apparent registers on the bu=
s.
Core has PLB access: =
device tree contains reg property only.
So, I guess it really doesn't matter... The only interesting case is the se=
cond one where (because the way the reg property is published), either meth=
od will work... So, nevermind, the device tree question is completely inde=
pendent and I agree with your comment that there's probably not a need for =
a separate binding.
What I do think would be nice (at some point in the future maybe) is perhap=
s a bit of DCR_or_PLB abstraction for this core and the ll_temac driver to =
share which would avoid duplicating the code in each driver as to whether i=
t uses DCR or PLB access...
Steve
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* RE: Question about DBCR0 initialization for 440
From: Tirumala Reddy Marri @ 2009-04-15 16:24 UTC (permalink / raw)
To: John Linn, jwboyer, grant.likely, linuxppc-dev
In-Reply-To: <20090414203313.8D8F11BE8056@mail209-sin.bigfish.com>
[-- Attachment #1: Type: text/plain, Size: 1891 bytes --]
Some debuggers like BDI(Abatron) they setup the debug registers. If you
have different debugger which doesn't support configuring debug
registers I suggest you to program then in the head_44x.S file.
From: linuxppc-dev-bounces+tmarri=amcc.com@ozlabs.org
[mailto:linuxppc-dev-bounces+tmarri=amcc.com@ozlabs.org] On Behalf Of
John Linn
Sent: Tuesday, April 14, 2009 1:33 PM
To: jwboyer@linux.vnet.ibm.com; grant.likely@secretlab.ca;
linuxppc-dev@ozlabs.org
Subject: Question about DBCR0 initialization for 440
The kernel does not initialize the PPC440 DBCR0 register. This prevents
(among other things) the use of software breakpoints with GDB. I
realize that boot loaders probably do initialize this but we run a lot
without a boot loader and so do our customers.
The file, head_fsl_booke.S, does initialize the register for the
freescale specific code (as shown at the end of the message).
We are needing this also for Xilinx. What's the best method to
incorporate this, is it possible to add to head_44x.S?
Thanks,
John
#if !defined(CONFIG_BDI_SWITCH)
/*
* The Abatron BDI JTAG debugger does not tolerate others
* mucking with the debug registers.
*/
lis r2,DBCR0_IDM@h
mtspr SPRN_DBCR0,r2
isync
/* clear any residual debug events */
li r2,-1
mtspr SPRN_DBSR,r2
#endif
This email and any attachments are intended for the sole use of the
named recipient(s) and contain(s) confidential information that may be
proprietary, privileged or copyrighted under applicable law. If you are
not the intended recipient, do not read, copy, or forward this email
message or any attachments. Delete this email message and any
attachments immediately.
[-- Attachment #2: Type: text/html, Size: 9736 bytes --]
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: Add P2020DS board support
From: Kumar Gala @ 2009-04-15 16:17 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, Ted Peters
In-Reply-To: <ed82fe3e0904150859y3d8cea6dv9f9b88cc4939e9df@mail.gmail.com>
On Apr 15, 2009, at 10:59 AM, Timur Tabi wrote:
> On Wed, Apr 15, 2009 at 10:49 AM, Kumar Gala <galak@kernel.crashing.org
> > wrote:
>
>> --- a/arch/powerpc/platforms/fsl_uli1575.c
>> +++ b/arch/powerpc/platforms/fsl_uli1575.c
>> @@ -57,7 +57,7 @@ static void __devinit early_uli5249(struct
>> pci_dev *dev)
>> unsigned char temp;
>>
>> if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
>> - !machine_is(mpc8572_ds))
>> + !machine_is(mpc8572_ds) && !
>> machine_is(p2020_ds))
>> return;
>
> Are we going to need to update this function every time we add a new
> board that has an ULI 1575 on it? Can't we define some property in
> the device tree to handle this?
Seeing as I think this is the last board that will have the ULI 1575
from us I don't think its worth it.
- k
^ permalink raw reply
* Re: fixed phy -- how do we decide to use this code?
From: Anton Vorontsov @ 2009-04-15 16:17 UTC (permalink / raw)
To: Kumar Gala; +Cc: netdev, Linuxppc-dev Development
In-Reply-To: <B660E2DF-5F6A-4939-9D20-3AB8E7C69EDB@kernel.crashing.org>
On Wed, Apr 15, 2009 at 10:54:40AM -0500, Kumar Gala wrote:
> Vitaly, Anton
>
> You guys have used this code.. I was wondering how we decide to used the
> fixed phy vs another phy. Is this a runtime decision based on something
> in the device tree or purely at compile time?
It's specified via fixed-link property in the device tree.
The bindings described in Documentation/powerpc/dts-bindings/fsl/tsec.txt.
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* RE: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support and cleanup DCR
From: Stephen Neuendorffer @ 2009-04-15 15:58 UTC (permalink / raw)
To: Grant Likely, John Linn
Cc: linux-fbdev-devel, adaplas, Suneel Garapati, linuxppc-dev,
akonovalov
In-Reply-To: <fa686aa40904150814p40813d25w9d04f7e88897a88@mail.gmail.com>
> > - =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, &res);
> > - =A0 =A0 =A0 if (rc) {
> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid address\n");
> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> > + =A0 =A0 =A0 /*
> > + =A0 =A0 =A0 =A0* To check whether the core is connected directly to D=
CR or PLB
> > + =A0 =A0 =A0 =A0* interface and initialize the tft_access accordingly.=
> > + =A0 =A0 =A0 =A0*/
> > + =A0 =A0 =A0 p =3D (u32 *)of_get_property(op->node, "xlnx,dcr-splb-sla=
ve-if", NULL);
> =
> Hmmm. This binding is undocumented. It would be better to make the
> decision on the presence/absence of the dcr-reg and/or reg properties.
For backward compatibility with the 'old' way, the device tree generator fo=
r this core has both dcr-reg and reg properties (where the reg has been tra=
nslated back through the bridge). =
You're probably right that it should just be one or the other, but the devi=
ce tree generator change needs to be synchronized, and it will break backwa=
rd compatibility with the older driver.
Steve =
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* Re: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support and cleanup DCR
From: Grant Likely @ 2009-04-15 16:03 UTC (permalink / raw)
To: Stephen Neuendorffer
Cc: linux-fbdev-devel, adaplas, Suneel Garapati, linuxppc-dev,
John Linn, akonovalov
In-Reply-To: <20090415155837.139A119C0056@mail32-dub.bigfish.com>
On Wed, Apr 15, 2009 at 9:58 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>> > - =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, &res);
>> > - =A0 =A0 =A0 if (rc) {
>> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid address\n");
>> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
>> > + =A0 =A0 =A0 /*
>> > + =A0 =A0 =A0 =A0* To check whether the core is connected directly to =
DCR or PLB
>> > + =A0 =A0 =A0 =A0* interface and initialize the tft_access accordingly=
.
>> > + =A0 =A0 =A0 =A0*/
>> > + =A0 =A0 =A0 p =3D (u32 *)of_get_property(op->node, "xlnx,dcr-splb-sl=
ave-if", NULL);
>>
>> Hmmm. =A0This binding is undocumented. =A0It would be better to make the
>> decision on the presence/absence of the dcr-reg and/or reg properties.
>
> For backward compatibility with the 'old' way, the device tree generator =
for this core has both dcr-reg and reg properties (where the reg has been t=
ranslated back through the bridge).
So, what is in the regs and dcr-regs properties when DCR is used?
How about when MMIO is used?
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: Add P2020DS board support
From: Timur Tabi @ 2009-04-15 15:59 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Ted Peters
In-Reply-To: <1239810564-8403-1-git-send-email-galak@kernel.crashing.org>
On Wed, Apr 15, 2009 at 10:49 AM, Kumar Gala <galak@kernel.crashing.org> wr=
ote:
> --- a/arch/powerpc/platforms/fsl_uli1575.c
> +++ b/arch/powerpc/platforms/fsl_uli1575.c
> @@ -57,7 +57,7 @@ static void __devinit early_uli5249(struct pci_dev *dev=
)
> =A0 =A0 =A0 =A0unsigned char temp;
>
> =A0 =A0 =A0 =A0if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &=
&
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 !machine_is(mpc8572_ds))
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 !machine_is(mpc8572_ds) && =
!machine_is(p2020_ds))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return;
Are we going to need to update this function every time we add a new
board that has an ULI 1575 on it? Can't we define some property in
the device tree to handle this?
--=20
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* [PATCH] [v2] powerpc: CMO unused page hinting
From: Robert Jennings @ 2009-04-15 15:55 UTC (permalink / raw)
To: Paul Mackerras; +Cc: Brian King, linuxppc-dev
In-Reply-To: <20090414013741.GA8678@austin.ibm.com>
Adds support for the "unused" page hint which can be used in shared
memory partitions to flag pages not in use, which will then be stolen
before active pages by the hypervisor when memory needs to be moved to
LPARs in need of additional memory. Failure to mark pages as 'unused'
makes the LPAR slower to give up unused memory to other partitions.
This adds the kernel parameter 'cmo_free_hint' to disable this
functionality.
Signed-off-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com>
---
Documentation/kernel-parameters.txt | 7 +++++
arch/powerpc/include/asm/page.h | 5 +++
arch/powerpc/platforms/pseries/lpar.c | 52 ++++++++++++++++++++++++++++++++++
3 files changed, 64 insertions(+)
Index: b/Documentation/kernel-parameters.txt
===================================================================
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -459,6 +459,13 @@ and is between 256 and 4096 characters.
Also note the kernel might malfunction if you disable
some critical bits.
+ cmo_free_hint= [PPC] Format: { yes | no }
+ Specify whether pages are marked as being inactive
+ when they are freed. This is used in CMO environments
+ to determine OS memory pressure for page stealing by
+ a hypervisor.
+ Default: yes
+
code_bytes [IA32/X86_64] How many bytes of object code to print
in an oops report.
Range: 0 - 8192
Index: b/arch/powerpc/include/asm/page.h
===================================================================
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -231,6 +231,11 @@ extern void copy_user_page(void *to, voi
struct page *p);
extern int page_is_ram(unsigned long pfn);
+#ifdef CONFIG_PPC_SMLPAR
+void arch_free_page(struct page *page, int order);
+#define HAVE_ARCH_FREE_PAGE
+#endif
+
struct vm_area_struct;
typedef struct page *pgtable_t;
Index: b/arch/powerpc/platforms/pseries/lpar.c
===================================================================
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -609,3 +609,55 @@ void __init hpte_init_lpar(void)
ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range;
ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear;
}
+
+#ifdef CONFIG_PPC_SMLPAR
+#define CMO_FREE_HINT_DEFAULT 1
+static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT;
+
+static int __init cmo_free_hint(char *str)
+{
+ char *parm;
+ parm = strstrip(str);
+
+ if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) {
+ printk(KERN_INFO "cmo_free_hint: CMO free page hinting is not active.\n");
+ cmo_free_hint_flag = 0;
+ return 1;
+ }
+
+ cmo_free_hint_flag = 1;
+ printk(KERN_INFO "cmo_free_hint: CMO free page hinting is active.\n");
+
+ if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0)
+ return 1;
+
+ return 0;
+}
+
+__setup("cmo_free_hint=", cmo_free_hint);
+
+static void pSeries_set_page_state(struct page *page, int order,
+ unsigned long state)
+{
+ int i, j;
+ unsigned long cmo_page_sz, addr;
+
+ cmo_page_sz = cmo_get_page_size();
+ addr = __pa((unsigned long)page_address(page));
+
+ for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) {
+ for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
+ plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
+ }
+}
+
+void arch_free_page(struct page *page, int order)
+{
+ if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO))
+ return;
+
+ pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED);
+}
+EXPORT_SYMBOL(arch_free_page);
+
+#endif
^ permalink raw reply
* fixed phy -- how do we decide to use this code?
From: Kumar Gala @ 2009-04-15 15:54 UTC (permalink / raw)
To: Vitaly Bordug, Anton Vorontsov; +Cc: Linuxppc-dev Development, netdev
Vitaly, Anton
You guys have used this code.. I was wondering how we decide to used
the fixed phy vs another phy. Is this a runtime decision based on
something in the device tree or purely at compile time?
- k
^ permalink raw reply
* [PATCH] powerpc/85xx: Add P2020DS board support
From: Kumar Gala @ 2009-04-15 15:49 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Ted Peters
From: Ted Peters <ted.peters@freescale.com>
The P2020 is a dual e500v2 core based SOC with:
* 3 PCIe controllers
* 2 General purpose DMA controllers
* 2 sRIO controllers
* 3 eTSECS
* USB 2.0
* SDHC
* SPI, I2C, DUART
* enhanced localbus
* and optional Security (P2020E) security w/XOR acceleration
The p2020 DS reference board is pretty similar to the existing MPC85xx
DS boards and has a ULI 1575 connected on one of the PCIe controllers.
Signed-off-by: Ted Peters <Ted.Peters@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
I'll post another version w/a defconfig update but that will be post 2.6.30-rc3 as
I plan on reworking the 85xx defconfigs a bit for FSL boards to reduce the total
number of defconfigs and introduce an SMP one.
arch/powerpc/boot/dts/p2020ds.dts | 680 ++++++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 35 ++-
arch/powerpc/platforms/fsl_uli1575.c | 10 +-
arch/powerpc/sysdev/fsl_pci.c | 2 +
include/linux/pci_ids.h | 2 +
5 files changed, 723 insertions(+), 6 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p2020ds.dts
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts
new file mode 100644
index 0000000..4d27eb9
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -0,0 +1,680 @@
+/*
+ * P2020 DS Device Tree Source
+ *
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+ model = "fsl,P2020";
+ compatible = "fsl,P2020DS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,P2020@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ next-level-cache = <&L2>;
+ };
+
+ PowerPC,P2020@1 {
+ device_type = "cpu";
+ reg = <0x1>;
+ next-level-cache = <&L2>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ localbus@ffe05000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
+ reg = <0 0xffe05000 0 0x1000>;
+ interrupts = <19 2>;
+ interrupt-parent = <&mpic>;
+
+ ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
+ 0x1 0x0 0x0 0xe0000000 0x08000000
+ 0x2 0x0 0x0 0xffa00000 0x00040000
+ 0x3 0x0 0x0 0xffdf0000 0x00008000
+ 0x4 0x0 0x0 0xffa40000 0x00040000
+ 0x5 0x0 0x0 0xffa80000 0x00040000
+ 0x6 0x0 0x0 0xffac0000 0x00040000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ ramdisk@0 {
+ reg = <0x0 0x03000000>;
+ read-only;
+ };
+
+ diagnostic@3000000 {
+ reg = <0x03000000 0x00e00000>;
+ read-only;
+ };
+
+ dink@3e00000 {
+ reg = <0x03e00000 0x00200000>;
+ read-only;
+ };
+
+ kernel@4000000 {
+ reg = <0x04000000 0x00400000>;
+ read-only;
+ };
+
+ jffs2@4400000 {
+ reg = <0x04400000 0x03b00000>;
+ };
+
+ dtb@7f00000 {
+ reg = <0x07f00000 0x00080000>;
+ read-only;
+ };
+
+ u-boot@7f80000 {
+ reg = <0x07f80000 0x00080000>;
+ read-only;
+ };
+ };
+
+ nand@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x2 0x0 0x40000>;
+
+ u-boot@0 {
+ reg = <0x0 0x02000000>;
+ read-only;
+ };
+
+ jffs2@2000000 {
+ reg = <0x02000000 0x10000000>;
+ };
+
+ ramdisk@12000000 {
+ reg = <0x12000000 0x08000000>;
+ read-only;
+ };
+
+ kernel@1a000000 {
+ reg = <0x1a000000 0x04000000>;
+ };
+
+ dtb@1e000000 {
+ reg = <0x1e000000 0x01000000>;
+ read-only;
+ };
+
+ empty@1f000000 {
+ reg = <0x1f000000 0x21000000>;
+ };
+ };
+
+ nand@4,0 {
+ compatible = "fsl,p2020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x4 0x0 0x40000>;
+ };
+
+ nand@5,0 {
+ compatible = "fsl,p2020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x5 0x0 0x40000>;
+ };
+
+ nand@6,0 {
+ compatible = "fsl,p2020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x6 0x0 0x40000>;
+ };
+ };
+
+ soc@ffe00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ ranges = <0x0 0 0xffe00000 0x100000>;
+ reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
+ bus-frequency = <0>; // Filled out by uboot.
+
+ memory-controller@2000 {
+ compatible = "fsl,p2020-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,p2020-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x100000>; // L2, 1M
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ dma@c300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2020-dma", "fsl,eloplus-dma";
+ reg = <0xc300 0x4>;
+ ranges = <0x0 0xc100 0x200>;
+ cell-index = <1>;
+ dma-channel@0 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <76 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <77 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <78 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <79 2>;
+ };
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2020-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,p2020-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+ usb@22000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,p2020-usb2-mph", "fsl-usb2-mph";
+ reg = <0x22000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <28 0x2>;
+ phy_type = "ulpi";
+ };
+
+
+ enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ ranges = <0x0 0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x520 0x20>;
+
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <3 1>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <3 1>;
+ reg = <0x1>;
+ };
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <3 1>;
+ reg = <0x2>;
+ };
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ ranges = <0x0 0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ enet2: ethernet@26000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <2>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x26000 0x1000>;
+ ranges = <0x0 0x26000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <31 2 32 2 33 2>;
+ interrupt-parent = <&mpic>;
+ tbi-handle = <&tbi2>;
+ phy-handle = <&phy2>;
+ phy-connection-type = "rgmii-id";
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x520 0x20>;
+
+ tbi2: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ global-utilities@e0000 { //global utilities block
+ compatible = "fsl,p2020-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+
+ msi@41600 {
+ compatible = "fsl,p2020-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2 58 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ };
+ };
+
+ pci0: pcie@ffe08000 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0 0xffe08000 0 0x1000>;
+ bus-range = <0 255>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ clock-frequency = <33333333>;
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x8 0x1
+ 0000 0x0 0x0 0x2 &mpic 0x9 0x1
+ 0000 0x0 0x0 0x3 &mpic 0xa 0x1
+ 0000 0x0 0x0 0x4 &mpic 0xb 0x1
+ >;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ };
+ };
+
+ pci1: pcie@ffe09000 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0 0xffe09000 0 0x1000>;
+ bus-range = <0 255>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ clock-frequency = <33333333>;
+ interrupt-parent = <&mpic>;
+ interrupts = <25 2>;
+ interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ // IDSEL 0x11 func 0 - PCI slot 1
+ 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 1 - PCI slot 1
+ 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 2 - PCI slot 1
+ 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 3 - PCI slot 1
+ 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 4 - PCI slot 1
+ 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 5 - PCI slot 1
+ 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 6 - PCI slot 1
+ 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x11 func 7 - PCI slot 1
+ 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
+ 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+ // IDSEL 0x1d Audio
+ 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+ // IDSEL 0x1e Legacy
+ 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+ 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+ // IDSEL 0x1f IDE/SATA
+ 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+ 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+ >;
+
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ uli1575@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ isa@1e {
+ device_type = "isa";
+ #interrupt-cells = <2>;
+ #size-cells = <1>;
+ #address-cells = <2>;
+ reg = <0xf000 0x0 0x0 0x0 0x0>;
+ ranges = <0x1 0x0 0x1000000 0x0 0x0
+ 0x1000>;
+ interrupt-parent = <&i8259>;
+
+ i8259: interrupt-controller@20 {
+ reg = <0x1 0x20 0x2
+ 0x1 0xa0 0x2
+ 0x1 0x4d0 0x2>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ compatible = "chrp,iic";
+ interrupts = <4 1>;
+ interrupt-parent = <&mpic>;
+ };
+
+ i8042@60 {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+ interrupts = <1 3 12 3>;
+ interrupt-parent =
+ <&i8259>;
+
+ keyboard@0 {
+ reg = <0x0>;
+ compatible = "pnpPNP,303";
+ };
+
+ mouse@1 {
+ reg = <0x1>;
+ compatible = "pnpPNP,f03";
+ };
+ };
+
+ rtc@70 {
+ compatible = "pnpPNP,b00";
+ reg = <0x1 0x70 0x2>;
+ };
+
+ gpio@400 {
+ reg = <0x1 0x400 0x80>;
+ };
+ };
+ };
+ };
+
+ };
+
+ pci2: pcie@ffe0a000 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0 0xffe0a000 0 0x1000>;
+ bus-range = <0 255>;
+ ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+ clock-frequency = <33333333>;
+ interrupt-parent = <&mpic>;
+ interrupts = <26 2>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0000 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0000 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0000 0x0 0x0 0x4 &mpic 0x3 0x1
+ >;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ };
+ };
+};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index de66de7..25f750c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -163,7 +163,8 @@ static void __init mpc85xx_ds_setup_arch(void)
#ifdef CONFIG_PCI
for_each_node_by_type(np, "pci") {
if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
+ of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
+ of_device_is_compatible(np, "fsl,p2020-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
if ((rsrc.start & 0xfffff) == primary_phb_addr)
@@ -214,6 +215,7 @@ static int __init mpc85xxds_publish_devices(void)
}
machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
+machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -232,6 +234,23 @@ static int __init mpc8572_ds_probe(void)
}
}
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init p2020_ds_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
+#ifdef CONFIG_PCI
+ primary_phb_addr = 0x9000;
+#endif
+ return 1;
+ } else {
+ return 0;
+ }
+}
+
define_machine(mpc8544_ds) {
.name = "MPC8544 DS",
.probe = mpc8544_ds_probe,
@@ -259,3 +278,17 @@ define_machine(mpc8572_ds) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+define_machine(p2020_ds) {
+ .name = "P2020 DS",
+ .probe = p2020_ds_probe,
+ .setup_arch = mpc85xx_ds_setup_arch,
+ .init_IRQ = mpc85xx_ds_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 1db6b9e..6adfedd 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -57,7 +57,7 @@ static void __devinit early_uli5249(struct pci_dev *dev)
unsigned char temp;
if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ !machine_is(mpc8572_ds) && !machine_is(p2020_ds))
return;
pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO |
@@ -81,7 +81,7 @@ static void __devinit quirk_uli1575(struct pci_dev *dev)
int i;
if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ !machine_is(mpc8572_ds) && !machine_is(p2020_ds))
return;
/*
@@ -150,7 +150,7 @@ static void __devinit quirk_final_uli1575(struct pci_dev *dev)
* IRQ 15: Edge
*/
if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ !machine_is(mpc8572_ds) && !machine_is(p2020_ds))
return;
outb(0xfa, 0x4d0);
@@ -177,7 +177,7 @@ static void __devinit quirk_uli5288(struct pci_dev *dev)
unsigned int d;
if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ !machine_is(mpc8572_ds) && !machine_is(p2020_ds))
return;
/* read/write lock */
@@ -202,7 +202,7 @@ static void __devinit quirk_uli5229(struct pci_dev *dev)
unsigned short temp;
if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) &&
- !machine_is(mpc8572_ds))
+ !machine_is(mpc8572_ds) && !machine_is(p2020_ds))
return;
pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 78021d8..36db7b3 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -296,6 +296,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header);
#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 170f8b1..5b3d240 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2260,6 +2260,8 @@
#define PCI_DEVICE_ID_MPC8572 0x0041
#define PCI_DEVICE_ID_MPC8536E 0x0050
#define PCI_DEVICE_ID_MPC8536 0x0051
+#define PCI_DEVICE_ID_P2020E 0x0070
+#define PCI_DEVICE_ID_P2020 0x0071
#define PCI_DEVICE_ID_MPC8641 0x7010
#define PCI_DEVICE_ID_MPC8641D 0x7011
#define PCI_DEVICE_ID_MPC8610 0x7018
--
1.6.0.6
^ permalink raw reply related
* Re: [PATCH] powerpc/fsl: Remove cell-index from PCI nodes
From: Grant Likely @ 2009-04-15 15:42 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <1239810033-8213-1-git-send-email-galak@kernel.crashing.org>
On Wed, Apr 15, 2009 at 9:40 AM, Kumar Gala <galak@kernel.crashing.org> wro=
te:
> The cell-index property isn't used on PCI nodes and is ill defined.
> Remove it for now and if someone comes up with a good reason and
> consistent definition for it we can add it back
>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> =A0arch/powerpc/boot/dts/mpc832x_mds.dts =A0 =A0 =A0 =A0 =A0| =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc832x_rdb.dts =A0 =A0 =A0 =A0 =A0| =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8349emitx.dts =A0 =A0 =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc8349emitxgp.dts =A0 =A0 =A0 | =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc834x_mds.dts =A0 =A0 =A0 =A0 =A0| =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc836x_mds.dts =A0 =A0 =A0 =A0 =A0| =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8377_mds.dts =A0 =A0 =A0 =A0 =A0| =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8378_mds.dts =A0 =A0 =A0 =A0 =A0| =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8379_mds.dts =A0 =A0 =A0 =A0 =A0| =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8536ds.dts =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A04 =
----
> =A0arch/powerpc/boot/dts/mpc8540ads.dts =A0 =A0 =A0 =A0 =A0 | =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8541cds.dts =A0 =A0 =A0 =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc8544ds.dts =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A04 =
----
> =A0arch/powerpc/boot/dts/mpc8548cds.dts =A0 =A0 =A0 =A0 =A0 | =A0 =A03 --=
-
> =A0arch/powerpc/boot/dts/mpc8555cds.dts =A0 =A0 =A0 =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc8560ads.dts =A0 =A0 =A0 =A0 =A0 | =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8568mds.dts =A0 =A0 =A0 =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc8572ds.dts =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A03 =
---
> =A0arch/powerpc/boot/dts/mpc8572ds_36b.dts =A0 =A0 =A0 =A0| =A0 =A03 ---
> =A0arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | =A0 =A01 -
> =A0arch/powerpc/boot/dts/mpc8610_hpcd.dts =A0 =A0 =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/mpc8641_hpcn.dts =A0 =A0 =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/sbc8349.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
1 -
> =A0arch/powerpc/boot/dts/sbc8548.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
2 --
> =A0arch/powerpc/boot/dts/sbc8560.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
1 -
> =A0arch/powerpc/boot/dts/sbc8641d.dts =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A02 =
--
> =A0arch/powerpc/boot/dts/socrates.dts =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A01 =
-
> =A0arch/powerpc/boot/dts/stx_gp3_8560.dts =A0 =A0 =A0 =A0 | =A0 =A01 -
> =A0arch/powerpc/boot/dts/tqm8540.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
1 -
> =A0arch/powerpc/boot/dts/tqm8541.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
1 -
> =A0arch/powerpc/boot/dts/tqm8548-bigflash.dts =A0 =A0 | =A0 =A02 --
> =A0arch/powerpc/boot/dts/tqm8548.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
2 --
> =A0arch/powerpc/boot/dts/tqm8555.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
1 -
> =A0arch/powerpc/boot/dts/tqm8560.dts =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0=
1 -
> =A035 files changed, 0 insertions(+), 59 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dt=
s/mpc832x_mds.dts
> index 57c595b..6b319f5 100644
> --- a/arch/powerpc/boot/dts/mpc832x_mds.dts
> +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
> @@ -369,7 +369,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0=
x11 AD17 */
> diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dt=
s/mpc832x_rdb.dts
> index 4319bd7..4c0c249 100644
> --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
> +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
> @@ -327,7 +327,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0=
x10 AD16 (USB) */
> diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/d=
ts/mpc8349emitx.dts
> index 1ae38f0..e3eeaed 100644
> --- a/arch/powerpc/boot/dts/mpc8349emitx.dts
> +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
> @@ -278,7 +278,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0=
x10 - SATA */
> @@ -301,7 +300,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pci@e0008600 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0=
x0E - MiniPCI Slot */
> diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot=
/dts/mpc8349emitxgp.dts
> index 662abe1..eb73211 100644
> --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
> +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
> @@ -227,7 +227,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008600 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0=
x0F - PCI Slot */
> diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dt=
s/mpc834x_mds.dts
> index d9f0a23..a2553a6 100644
> --- a/arch/powerpc/boot/dts/mpc834x_mds.dts
> +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
> @@ -286,7 +286,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> @@ -348,7 +347,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pci@e0008600 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dt=
s/mpc836x_mds.dts
> index 6e34f17..1207ec8 100644
> --- a/arch/powerpc/boot/dts/mpc836x_mds.dts
> +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
> @@ -410,7 +410,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dt=
s/mpc8377_mds.dts
> index 9637080..67bb372 100644
> --- a/arch/powerpc/boot/dts/mpc8377_mds.dts
> +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
> @@ -383,7 +383,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dt=
s/mpc8378_mds.dts
> index 651ff2f..a955a57 100644
> --- a/arch/powerpc/boot/dts/mpc8378_mds.dts
> +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
> @@ -367,7 +367,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dt=
s/mpc8379_mds.dts
> index d6f208b..d266ddb 100644
> --- a/arch/powerpc/boot/dts/mpc8379_mds.dts
> +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
> @@ -397,7 +397,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/=
mpc8536ds.dts
> index b31c504..af8c64c 100644
> --- a/arch/powerpc/boot/dts/mpc8536ds.dts
> +++ b/arch/powerpc/boot/dts/mpc8536ds.dts
> @@ -321,7 +321,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@ffe08000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8540-pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> @@ -346,7 +345,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@ffe09000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -383,7 +381,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@ffe0a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -420,7 +417,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci3: pcie@ffe0b000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <3>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts=
/mpc8540ads.dts
> index ddd67be..de5535c 100644
> --- a/arch/powerpc/boot/dts/mpc8540ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8540ads.dts
> @@ -258,7 +258,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts=
/mpc8541cds.dts
> index e45097f..d10f5d6 100644
> --- a/arch/powerpc/boot/dts/mpc8541cds.dts
> +++ b/arch/powerpc/boot/dts/mpc8541cds.dts
> @@ -272,7 +272,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0x1f800 0x0 0x0 0x=
7>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> @@ -344,7 +343,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pci@e0009000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/=
mpc8544ds.dts
> index 7c6932b..3ae31d7 100644
> --- a/arch/powerpc/boot/dts/mpc8544ds.dts
> +++ b/arch/powerpc/boot/dts/mpc8544ds.dts
> @@ -274,7 +274,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8540-pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> @@ -306,7 +305,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@e0009000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -343,7 +341,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@e000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -380,7 +377,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci3: pcie@e000b000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <3>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts=
/mpc8548cds.dts
> index 804e903..732c111 100644
> --- a/arch/powerpc/boot/dts/mpc8548cds.dts
> +++ b/arch/powerpc/boot/dts/mpc8548cds.dts
> @@ -328,7 +328,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0x4 (PCIX Slot 2)=
*/
> @@ -478,7 +477,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pci@e0009000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> @@ -503,7 +501,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@e000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts=
/mpc8555cds.dts
> index 9484f07..7f9e535 100644
> --- a/arch/powerpc/boot/dts/mpc8555cds.dts
> +++ b/arch/powerpc/boot/dts/mpc8555cds.dts
> @@ -272,7 +272,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0x1f800 0x0 0x0 0x=
7>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> @@ -344,7 +343,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pci@e0009000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts=
/mpc8560ads.dts
> index cc2acf8..190d46b 100644
> --- a/arch/powerpc/boot/dts/mpc8560ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8560ads.dts
> @@ -291,7 +291,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts=
/mpc8568mds.dts
> index 9d52e3b..3330356 100644
> --- a/arch/powerpc/boot/dts/mpc8568mds.dts
> +++ b/arch/powerpc/boot/dts/mpc8568mds.dts
> @@ -459,7 +459,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0x12 AD18 */
> @@ -490,7 +489,6 @@
>
> =A0 =A0 =A0 =A0/* PCI Express */
> =A0 =A0 =A0 =A0pci1: pcie@e000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/=
mpc8572ds.dts
> index 6e79a41..75fc30b 100644
> --- a/arch/powerpc/boot/dts/mpc8572ds.dts
> +++ b/arch/powerpc/boot/dts/mpc8572ds.dts
> @@ -514,7 +514,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pcie@ffe08000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -724,7 +723,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@ffe09000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -761,7 +759,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@ffe0a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/=
dts/mpc8572ds_36b.dts
> index dbd81a7..e2a1f75 100644
> --- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts
> +++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
> @@ -514,7 +514,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pcie@fffe08000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -724,7 +723,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@fffe09000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -761,7 +759,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@fffe0a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerp=
c/boot/dts/mpc8572ds_camp_core0.dts
> index 2bc0c71..45ca89e 100644
> --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
> +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
> @@ -238,7 +238,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pcie@ffe08000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -448,7 +447,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@ffe09000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerp=
c/boot/dts/mpc8572ds_camp_core1.dts
> index 159cb3a..0ded4a6 100644
> --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
> +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
> @@ -196,7 +196,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@ffe0a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8548-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/d=
ts/mpc8610_hpcd.dts
> index 1bd3ebe..4f081bb 100644
> --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
> +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
> @@ -316,7 +316,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8610-pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -346,7 +345,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@e000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8641-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/d=
ts/mpc8641_hpcn.dts
> index d72beb1..51852e6 100644
> --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
> +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
> @@ -357,7 +357,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pcie@ffe08000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8641-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -566,7 +565,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@ffe09000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8641-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sb=
c8349.dts
> index a36dbbc..5fb6f66 100644
> --- a/arch/powerpc/boot/dts/sbc8349.dts
> +++ b/arch/powerpc/boot/dts/sbc8349.dts
> @@ -278,7 +278,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008500 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sb=
c8548.dts
> index b1f1416..196fcc1 100644
> --- a/arch/powerpc/boot/dts/sbc8548.dts
> +++ b/arch/powerpc/boot/dts/sbc8548.dts
> @@ -350,7 +350,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0x01 (PCI-X slot)=
@66MHz */
> @@ -380,7 +379,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci2: pcie@e000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sb=
c8560.dts
> index c4564b8..813d731 100644
> --- a/arch/powerpc/boot/dts/sbc8560.dts
> +++ b/arch/powerpc/boot/dts/sbc8560.dts
> @@ -296,7 +296,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@ff708000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/s=
bc8641d.dts
> index e3e914e..cfd5782 100644
> --- a/arch/powerpc/boot/dts/sbc8641d.dts
> +++ b/arch/powerpc/boot/dts/sbc8641d.dts
> @@ -371,7 +371,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pcie@f8008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8641-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> @@ -410,7 +409,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@f8009000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc8641-pcie";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0device_type =3D "pci";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/s=
ocrates.dts
> index 7a6ae75..e8f4e46 100644
> --- a/arch/powerpc/boot/dts/socrates.dts
> +++ b/arch/powerpc/boot/dts/socrates.dts
> @@ -314,7 +314,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/d=
ts/stx_gp3_8560.dts
> index ea6b151..8691dd3 100644
> --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
> +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
> @@ -251,7 +251,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@fdf08000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
>
> diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tq=
m8540.dts
> index b6f1fc6..c8265b6 100644
> --- a/arch/powerpc/boot/dts/tqm8540.dts
> +++ b/arch/powerpc/boot/dts/tqm8540.dts
> @@ -266,7 +266,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tq=
m8541.dts
> index fa6a3d5..9080546 100644
> --- a/arch/powerpc/boot/dts/tqm8541.dts
> +++ b/arch/powerpc/boot/dts/tqm8541.dts
> @@ -288,7 +288,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/bo=
ot/dts/tqm8548-bigflash.dts
> index 00f7ed7..1139eb5 100644
> --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
> +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
> @@ -419,7 +419,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@a0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> @@ -441,7 +440,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@a000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0x0 (PEX) */
> diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tq=
m8548.dts
> index 673e4a7..d337d83 100644
> --- a/arch/powerpc/boot/dts/tqm8548.dts
> +++ b/arch/powerpc/boot/dts/tqm8548.dts
> @@ -419,7 +419,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> @@ -441,7 +440,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci1: pcie@e000a000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map-mask =3D <0xf800 0x0 0x0 0x7=
>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-map =3D <
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* IDSEL 0x0 (PEX) */
> diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tq=
m8555.dts
> index 6a99f1e..021039b 100644
> --- a/arch/powerpc/boot/dts/tqm8555.dts
> +++ b/arch/powerpc/boot/dts/tqm8555.dts
> @@ -288,7 +288,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tq=
m8560.dts
> index b6c2d71..cec84c2 100644
> --- a/arch/powerpc/boot/dts/tqm8560.dts
> +++ b/arch/powerpc/boot/dts/tqm8560.dts
> @@ -359,7 +359,6 @@
> =A0 =A0 =A0 =A0};
>
> =A0 =A0 =A0 =A0pci0: pci@e0008000 {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 cell-index =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#interrupt-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <3>;
> --
> 1.6.0.6
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* [PATCH] powerpc/fsl: Remove cell-index from PCI nodes
From: Kumar Gala @ 2009-04-15 15:40 UTC (permalink / raw)
To: linuxppc-dev
The cell-index property isn't used on PCI nodes and is ill defined.
Remove it for now and if someone comes up with a good reason and
consistent definition for it we can add it back
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/boot/dts/mpc832x_mds.dts | 1 -
arch/powerpc/boot/dts/mpc832x_rdb.dts | 1 -
arch/powerpc/boot/dts/mpc8349emitx.dts | 2 --
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 1 -
arch/powerpc/boot/dts/mpc834x_mds.dts | 2 --
arch/powerpc/boot/dts/mpc836x_mds.dts | 1 -
arch/powerpc/boot/dts/mpc8377_mds.dts | 1 -
arch/powerpc/boot/dts/mpc8378_mds.dts | 1 -
arch/powerpc/boot/dts/mpc8379_mds.dts | 1 -
arch/powerpc/boot/dts/mpc8536ds.dts | 4 ----
arch/powerpc/boot/dts/mpc8540ads.dts | 1 -
arch/powerpc/boot/dts/mpc8541cds.dts | 2 --
arch/powerpc/boot/dts/mpc8544ds.dts | 4 ----
arch/powerpc/boot/dts/mpc8548cds.dts | 3 ---
arch/powerpc/boot/dts/mpc8555cds.dts | 2 --
arch/powerpc/boot/dts/mpc8560ads.dts | 1 -
arch/powerpc/boot/dts/mpc8568mds.dts | 2 --
arch/powerpc/boot/dts/mpc8572ds.dts | 3 ---
arch/powerpc/boot/dts/mpc8572ds_36b.dts | 3 ---
arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | 2 --
arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 1 -
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 2 --
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 2 --
arch/powerpc/boot/dts/sbc8349.dts | 1 -
arch/powerpc/boot/dts/sbc8548.dts | 2 --
arch/powerpc/boot/dts/sbc8560.dts | 1 -
arch/powerpc/boot/dts/sbc8641d.dts | 2 --
arch/powerpc/boot/dts/socrates.dts | 1 -
arch/powerpc/boot/dts/stx_gp3_8560.dts | 1 -
arch/powerpc/boot/dts/tqm8540.dts | 1 -
arch/powerpc/boot/dts/tqm8541.dts | 1 -
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 2 --
arch/powerpc/boot/dts/tqm8548.dts | 2 --
arch/powerpc/boot/dts/tqm8555.dts | 1 -
arch/powerpc/boot/dts/tqm8560.dts | 1 -
35 files changed, 0 insertions(+), 59 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 57c595b..6b319f5 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -369,7 +369,6 @@
};
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 4319bd7..4c0c249 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -327,7 +327,6 @@
};
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 AD16 (USB) */
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 1ae38f0..e3eeaed 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -278,7 +278,6 @@
};
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
@@ -301,7 +300,6 @@
};
pci1: pci@e0008600 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 662abe1..eb73211 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -227,7 +227,6 @@
};
pci0: pci@e0008600 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index d9f0a23..a2553a6 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -286,7 +286,6 @@
};
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
@@ -348,7 +347,6 @@
};
pci1: pci@e0008600 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 6e34f17..1207ec8 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -410,7 +410,6 @@
};
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 9637080..67bb372 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -383,7 +383,6 @@
};
pci0: pci@e0008500 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 651ff2f..a955a57 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -367,7 +367,6 @@
};
pci0: pci@e0008500 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index d6f208b..d266ddb 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -397,7 +397,6 @@
};
pci0: pci@e0008500 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index b31c504..af8c64c 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -321,7 +321,6 @@
};
pci0: pci@ffe08000 {
- cell-index = <0>;
compatible = "fsl,mpc8540-pci";
device_type = "pci";
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
@@ -346,7 +345,6 @@
};
pci1: pcie@ffe09000 {
- cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -383,7 +381,6 @@
};
pci2: pcie@ffe0a000 {
- cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -420,7 +417,6 @@
};
pci3: pcie@ffe0b000 {
- cell-index = <3>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index ddd67be..de5535c 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -258,7 +258,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index e45097f..d10f5d6 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -272,7 +272,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
interrupt-map = <
@@ -344,7 +343,6 @@
};
pci1: pci@e0009000 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 7c6932b..3ae31d7 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -274,7 +274,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
compatible = "fsl,mpc8540-pci";
device_type = "pci";
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
@@ -306,7 +305,6 @@
};
pci1: pcie@e0009000 {
- cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -343,7 +341,6 @@
};
pci2: pcie@e000a000 {
- cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -380,7 +377,6 @@
};
pci3: pcie@e000b000 {
- cell-index = <3>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 804e903..732c111 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -328,7 +328,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x4 (PCIX Slot 2) */
@@ -478,7 +477,6 @@
};
pci1: pci@e0009000 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
@@ -503,7 +501,6 @@
};
pci2: pcie@e000a000 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 9484f07..7f9e535 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -272,7 +272,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
interrupt-map = <
@@ -344,7 +343,6 @@
};
pci1: pci@e0009000 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index cc2acf8..190d46b 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -291,7 +291,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 9d52e3b..3330356 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -459,7 +459,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x12 AD18 */
@@ -490,7 +489,6 @@
/* PCI Express */
pci1: pcie@e000a000 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 6e79a41..75fc30b 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -514,7 +514,6 @@
};
pci0: pcie@ffe08000 {
- cell-index = <0>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -724,7 +723,6 @@
};
pci1: pcie@ffe09000 {
- cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -761,7 +759,6 @@
};
pci2: pcie@ffe0a000 {
- cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
index dbd81a7..e2a1f75 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -514,7 +514,6 @@
};
pci0: pcie@fffe08000 {
- cell-index = <0>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -724,7 +723,6 @@
};
pci1: pcie@fffe09000 {
- cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -761,7 +759,6 @@
};
pci2: pcie@fffe0a000 {
- cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index 2bc0c71..45ca89e 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -238,7 +238,6 @@
};
pci0: pcie@ffe08000 {
- cell-index = <0>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -448,7 +447,6 @@
};
pci1: pcie@ffe09000 {
- cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index 159cb3a..0ded4a6 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -196,7 +196,6 @@
};
pci2: pcie@ffe0a000 {
- cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 1bd3ebe..4f081bb 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -316,7 +316,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
compatible = "fsl,mpc8610-pci";
device_type = "pci";
#interrupt-cells = <1>;
@@ -346,7 +345,6 @@
};
pci1: pcie@e000a000 {
- cell-index = <1>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index d72beb1..51852e6 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -357,7 +357,6 @@
};
pci0: pcie@ffe08000 {
- cell-index = <0>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -566,7 +565,6 @@
};
pci1: pcie@ffe09000 {
- cell-index = <1>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index a36dbbc..5fb6f66 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -278,7 +278,6 @@
};
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index b1f1416..196fcc1 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -350,7 +350,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x01 (PCI-X slot) @66MHz */
@@ -380,7 +379,6 @@
};
pci2: pcie@e000a000 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index c4564b8..813d731 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -296,7 +296,6 @@
};
pci0: pci@ff708000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index e3e914e..cfd5782 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -371,7 +371,6 @@
};
pci0: pcie@f8008000 {
- cell-index = <0>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
@@ -410,7 +409,6 @@
};
pci1: pcie@f8009000 {
- cell-index = <1>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
index 7a6ae75..e8f4e46 100644
--- a/arch/powerpc/boot/dts/socrates.dts
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -314,7 +314,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index ea6b151..8691dd3 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -251,7 +251,6 @@
};
pci0: pci@fdf08000 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index b6f1fc6..c8265b6 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -266,7 +266,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index fa6a3d5..9080546 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -288,7 +288,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 00f7ed7..1139eb5 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -419,7 +419,6 @@
};
pci0: pci@a0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
@@ -441,7 +440,6 @@
};
pci1: pcie@a000a000 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0 (PEX) */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 673e4a7..d337d83 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -419,7 +419,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
@@ -441,7 +440,6 @@
};
pci1: pcie@e000a000 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0 (PEX) */
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 6a99f1e..021039b 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -288,7 +288,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index b6c2d71..cec84c2 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -359,7 +359,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
--
1.6.0.6
^ permalink raw reply related
* Re: OF PCI howto?
From: Kumar Gala @ 2009-04-15 15:20 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linuxppc-dev, Joakim Tjernlund
In-Reply-To: <20090415130844.GB3301@pengutronix.de>
On Apr 15, 2009, at 8:08 AM, Wolfram Sang wrote:
> On Wed, Apr 15, 2009 at 02:54:57PM +0200, Joakim Tjernlund wrote:
>
>> dts fragment correct for my setup? If not, is there a better
>> example I can
>> look at?
>
> Maybe this message/thread can help you:
>
> http://ozlabs.org/pipermail/devicetree-discuss/2009-March/000597.html
You may also want to take a look at ePAPR on the power.org site
- k
^ permalink raw reply
* Re: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support and cleanup DCR
From: Grant Likely @ 2009-04-15 15:14 UTC (permalink / raw)
To: John Linn; +Cc: linux-fbdev-devel, adaplas, Suneel, linuxppc-dev, akonovalov
In-Reply-To: <20090414200834.D05446F8056@mail163-wa4.bigfish.com>
On Tue, Apr 14, 2009 at 2:08 PM, John Linn <john.linn@xilinx.com> wrote:
> Added support for the new xps tft controller. The new core
> has PLB interface support in addition to existing DCR interface.
Good looking patch. A few more comments below.
g.
> =A0/*
> =A0* Xilinx calls it "PLB TFT LCD Controller" though it can also be used =
for
> - * the VGA port on the Xilinx ML40x board. This is a hardware display co=
ntroller
> - * for a 640x480 resolution TFT or VGA screen.
> + * the VGA port on the Xilinx ML40x board. This is a hardware display
> + * controller for a 640x480 resolution TFT or VGA screen.
This isn't necessarily true. This driver will handle controllers
using different resolutions (I know, I know, this is just cleaning up
an existing comment, but no need to leave inaccuracies in there) :-)
> -#define xilinx_fb_out_be32(driverdata, offset, val) \
> - =A0 =A0 =A0 out_be32(driverdata->regs + offset, val)
> +static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 off=
set,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 u32 val)
> +{
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 out_be32(drvdata->regs + (offset << 2), val=
);
> + =A0 =A0 =A0 else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dcr_write(drvdata->dcr_host, offset, val);
> +
This could more simply be:
if (drvdata->regs)
out_be32(drvdata->regs + (offset << 2), val);
else
dcr_write(drvdata->dcr_host, offset, val);
regs will be NULL if DCR is active.
> -static int xilinxfb_assign(struct device *dev, unsigned long physaddr,
> +static int xilinxfb_assign(struct device *dev,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0struct xilinxfb_drvd=
ata *drvdata,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0unsigned long physad=
dr,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct xilinxfb_platf=
orm_data *pdata)
> =A0{
> - =A0 =A0 =A0 struct xilinxfb_drvdata *drvdata;
> =A0 =A0 =A0 =A0int rc;
> =A0 =A0 =A0 =A0int fbsize =3D pdata->xvirt * pdata->yvirt * BYTES_PER_PIX=
EL;
>
> - =A0 =A0 =A0 /* Allocate the driver data region */
> - =A0 =A0 =A0 drvdata =3D kzalloc(sizeof(*drvdata), GFP_KERNEL);
> - =A0 =A0 =A0 if (!drvdata) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(dev, "Couldn't allocate device priv=
ate record\n");
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENOMEM;
> - =A0 =A0 =A0 }
> - =A0 =A0 =A0 dev_set_drvdata(dev, drvdata);
> -
> - =A0 =A0 =A0 /* Map the control registers in */
> - =A0 =A0 =A0 if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(dev, "Couldn't lock memory region a=
t 0x%08lX\n",
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 physaddr);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D -ENODEV;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_region;
> - =A0 =A0 =A0 }
> - =A0 =A0 =A0 drvdata->regs_phys =3D physaddr;
> - =A0 =A0 =A0 drvdata->regs =3D ioremap(physaddr, 8);
> - =A0 =A0 =A0 if (!drvdata->regs) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(dev, "Couldn't lock memory region a=
t 0x%08lX\n",
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 physaddr);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D -ENODEV;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_map;
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG) {
Again, I think using "if (physaddr) {" would be simpler and make more
sense and would eliminate even needing a flags data member.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /*
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Map the control registers in if the co=
ntroller
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* is on direct PLB interface.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!request_mem_region(physaddr, 8, DRIVER=
_NAME)) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(dev, "Couldn't lock=
memory region at 0x%08lX\n",
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 physaddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D -ENODEV;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_region;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 drvdata->regs_phys =3D physaddr;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 drvdata->regs =3D ioremap(physaddr, 8);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!drvdata->regs) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(dev, "Couldn't lock=
memory region at 0x%08lX\n",
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 physaddr);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D -ENODEV;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_map;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> =A0 =A0 =A0 =A0}
>
> =A0 =A0 =A0 =A0/* Allocate the framebuffer memory */
> @@ -247,7 +267,10 @@ static int xilinxfb_assign(struct device *dev, unsig=
ned long physaddr,
> =A0 =A0 =A0 =A0if (!drvdata->fb_virt) {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "Could not allocate frame buf=
fer memory\n");
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0rc =3D -ENOMEM;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_fbmem;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_fbmem;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto err_region;
This change doesn't make much sense because the same condition is
tested for again at the err_fbmem: label. To avoid confusion later
on, keep the unwind path simple (don't jump to different labels).
> =A0 =A0 =A0 =A0}
>
> =A0 =A0 =A0 =A0/* Clear (turn to black) the framebuffer */
> @@ -260,7 +283,8 @@ static int xilinxfb_assign(struct device *dev, unsign=
ed long physaddr,
> =A0 =A0 =A0 =A0drvdata->reg_ctrl_default =3D REG_CTRL_ENABLE;
> =A0 =A0 =A0 =A0if (pdata->rotate_screen)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0drvdata->reg_ctrl_default |=3D REG_CTRL_RO=
TATE;
> - =A0 =A0 =A0 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_def=
ault);
> + =A0 =A0 =A0 xilinx_fb_out_be32(drvdata, REG_CTRL,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 drvdata->reg_ctrl_default);
>
> =A0 =A0 =A0 =A0/* Fill struct fb_info */
> =A0 =A0 =A0 =A0drvdata->info.device =3D dev;
> @@ -296,11 +320,14 @@ static int xilinxfb_assign(struct device *dev, unsi=
gned long physaddr,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0goto err_regfb;
> =A0 =A0 =A0 =A0}
>
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG) {
if (drvdata->regs) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Put a banner in the log (for DEBUG) */
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_dbg(dev, "regs: phys=3D%lx, virt=3D%p\n=
", physaddr,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 drvdata->regs);
> + =A0 =A0 =A0 }
> =A0 =A0 =A0 =A0/* Put a banner in the log (for DEBUG) */
> - =A0 =A0 =A0 dev_dbg(dev, "regs: phys=3D%lx, virt=3D%p\n", physaddr, drv=
data->regs);
> - =A0 =A0 =A0 dev_dbg(dev, "fb: phys=3D%llx, virt=3D%p, size=3D%x\n",
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 (unsigned long long) drvdata->fb_phys, drvd=
ata->fb_virt,
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 fbsize);
> + =A0 =A0 =A0 dev_dbg(dev, "fb: phys=3D%p, virt=3D%p, size=3D%x\n",
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 (void *)drvdata->fb_phys, drvdata->fb_virt,=
fbsize);
>
> =A0 =A0 =A0 =A0return 0; =A0 =A0 =A0 /* success */
>
> @@ -311,14 +338,19 @@ err_cmap:
> =A0 =A0 =A0 =A0if (drvdata->fb_alloced)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dma_free_coherent(dev, PAGE_ALIGN(fbsize),=
drvdata->fb_virt,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0drvdata->fb_phys);
> + =A0 =A0 =A0 else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(drvdata->fb_virt);
> +
> =A0 =A0 =A0 =A0/* Turn off the display */
> =A0 =A0 =A0 =A0xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
>
> =A0err_fbmem:
> - =A0 =A0 =A0 iounmap(drvdata->regs);
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(drvdata->regs);
if (drvdata->regs)
>
> =A0err_map:
> - =A0 =A0 =A0 release_mem_region(physaddr, 8);
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 release_mem_region(physaddr, 8);
if (physaddr)
>
> =A0err_region:
> =A0 =A0 =A0 =A0kfree(drvdata);
> @@ -342,12 +374,18 @@ static int xilinxfb_release(struct device *dev)
> =A0 =A0 =A0 =A0if (drvdata->fb_alloced)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dma_free_coherent(dev, PAGE_ALIGN(drvdata-=
>info.fix.smem_len),
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0drvdat=
a->fb_virt, drvdata->fb_phys);
> + =A0 =A0 =A0 else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(drvdata->fb_virt);
>
> =A0 =A0 =A0 =A0/* Turn off the display */
> =A0 =A0 =A0 =A0xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
> - =A0 =A0 =A0 iounmap(drvdata->regs);
>
> - =A0 =A0 =A0 release_mem_region(drvdata->regs_phys, 8);
> + =A0 =A0 =A0 /* Release the resources, as allocated based on interface *=
/
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(drvdata->regs);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 release_mem_region(drvdata->regs_phys, 8);
> + =A0 =A0 =A0 } else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dcr_unmap(drvdata->dcr_host, drvdata->dcr_l=
en);
et cetera
> -#if defined(CONFIG_OF)
> =A0static int __devinit
> =A0xilinxfb_of_probe(struct of_device *op, const struct of_device_id *mat=
ch)
> =A0{
> - =A0 =A0 =A0 struct resource res;
> =A0 =A0 =A0 =A0const u32 *prop;
> + =A0 =A0 =A0 u32 *p;
> + =A0 =A0 =A0 u32 tft_access;
> =A0 =A0 =A0 =A0struct xilinxfb_platform_data pdata;
> + =A0 =A0 =A0 struct resource res;
> =A0 =A0 =A0 =A0int size, rc;
> + =A0 =A0 =A0 int start =3D 0, len =3D 0;
> + =A0 =A0 =A0 dcr_host_t dcr_host;
> + =A0 =A0 =A0 struct xilinxfb_drvdata *drvdata;
>
> =A0 =A0 =A0 =A0/* Copy with the default pdata (not a ptr reference!) */
> =A0 =A0 =A0 =A0pdata =3D xilinx_fb_default_pdata;
>
> =A0 =A0 =A0 =A0dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match=
);
>
> - =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, &res);
> - =A0 =A0 =A0 if (rc) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid address\n");
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> + =A0 =A0 =A0 /*
> + =A0 =A0 =A0 =A0* To check whether the core is connected directly to DCR=
or PLB
> + =A0 =A0 =A0 =A0* interface and initialize the tft_access accordingly.
> + =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 p =3D (u32 *)of_get_property(op->node, "xlnx,dcr-splb-slave=
-if", NULL);
Hmmm. This binding is undocumented. It would be better to make the
decision on the presence/absence of the dcr-reg and/or reg properties.
> +
> + =A0 =A0 =A0 if (p)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 tft_access =3D *p;
> + =A0 =A0 =A0 else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 tft_access =3D 0; =A0 =A0 =A0 =A0 /* For ba=
ckward compatibility */
Common pattern: tft_access =3D p ? *p : 0;
> +
> + =A0 =A0 =A0 /*
> + =A0 =A0 =A0 =A0* Fill the resource structure if its direct PLB interfac=
e
> + =A0 =A0 =A0 =A0* otherwise fill the dcr_host structure.
> + =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 if (tft_access) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, =
&res);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (rc) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid =
address\n");
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENODEV;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> +
> + =A0 =A0 =A0 } else {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 start =3D dcr_resource_start(op->node, 0);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 len =3D dcr_resource_len(op->node, 0);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dcr_host =3D dcr_map(op->node, start, len);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!DCR_MAP_OK(dcr_host)) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid =
address\n");
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENODEV;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> =A0 =A0 =A0 =A0}
>
> =A0 =A0 =A0 =A0prop =3D of_get_property(op->node, "phys-size", &size);
> @@ -450,7 +468,26 @@ xilinxfb_of_probe(struct of_device *op, const struct=
of_device_id *match)
> =A0 =A0 =A0 =A0if (of_find_property(op->node, "rotate-display", NULL))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pdata.rotate_screen =3D 1;
>
> - =A0 =A0 =A0 return xilinxfb_assign(&op->dev, res.start, &pdata);
> + =A0 =A0 =A0 /* Allocate the driver data region */
> + =A0 =A0 =A0 drvdata =3D kzalloc(sizeof(*drvdata), GFP_KERNEL);
> + =A0 =A0 =A0 if (!drvdata) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "Couldn't allocate device=
private record\n");
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENOMEM;
> + =A0 =A0 =A0 }
> + =A0 =A0 =A0 dev_set_drvdata(&op->dev, drvdata);
> +
> + =A0 =A0 =A0 if (tft_access)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 drvdata->flags |=3D PLB_ACCESS_FLAG;
> +
> + =A0 =A0 =A0 /* Arguments are passed based on the interface */
> + =A0 =A0 =A0 if (drvdata->flags & PLB_ACCESS_FLAG) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return xilinxfb_assign(&op->dev, drvdata, r=
es.start, &pdata);
> + =A0 =A0 =A0 } else {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 drvdata->dcr_start =3D start;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 drvdata->dcr_len =3D len;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 drvdata->dcr_host =3D dcr_host;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return xilinxfb_assign(&op->dev, drvdata, 0=
, &pdata);
> + =A0 =A0 =A0 }
> =A0}
>
> =A0static int __devexit xilinxfb_of_remove(struct of_device *op)
> @@ -460,7 +497,9 @@ static int __devexit xilinxfb_of_remove(struct of_dev=
ice *op)
>
> =A0/* Match table for of_platform binding */
> =A0static struct of_device_id xilinxfb_of_match[] __devinitdata =3D {
> + =A0 =A0 =A0 { .compatible =3D "xlnx,xps-tft-1.00.a", },
> =A0 =A0 =A0 =A0{ .compatible =3D "xlnx,plb-tft-cntlr-ref-1.00.a", },
> + =A0 =A0 =A0 { .compatible =3D "xlnx,plb-dvi-cntlr-ref-1.00.c", },
> =A0 =A0 =A0 =A0{},
> =A0};
> =A0MODULE_DEVICE_TABLE(of, xilinxfb_of_match);
> @@ -476,22 +515,6 @@ static struct of_platform_driver xilinxfb_of_driver =
=3D {
> =A0 =A0 =A0 =A0},
> =A0};
>
> -/* Registration helpers to keep the number of #ifdefs to a minimum */
> -static inline int __init xilinxfb_of_register(void)
> -{
> - =A0 =A0 =A0 pr_debug("xilinxfb: calling of_register_platform_driver()\n=
");
> - =A0 =A0 =A0 return of_register_platform_driver(&xilinxfb_of_driver);
> -}
> -
> -static inline void __exit xilinxfb_of_unregister(void)
> -{
> - =A0 =A0 =A0 of_unregister_platform_driver(&xilinxfb_of_driver);
> -}
> -#else /* CONFIG_OF */
> -/* CONFIG_OF not enabled; do nothing helpers */
> -static inline int __init xilinxfb_of_register(void) { return 0; }
> -static inline void __exit xilinxfb_of_unregister(void) { }
> -#endif /* CONFIG_OF */
>
> =A0/* -------------------------------------------------------------------=
--
> =A0* Module setup and teardown
> @@ -500,28 +523,18 @@ static inline void __exit xilinxfb_of_unregister(vo=
id) { }
> =A0static int __init
> =A0xilinxfb_init(void)
> =A0{
> - =A0 =A0 =A0 int rc;
> - =A0 =A0 =A0 rc =3D xilinxfb_of_register();
> - =A0 =A0 =A0 if (rc)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> -
> - =A0 =A0 =A0 rc =3D platform_driver_register(&xilinxfb_platform_driver);
> - =A0 =A0 =A0 if (rc)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 xilinxfb_of_unregister();
> -
> - =A0 =A0 =A0 return rc;
> + =A0 =A0 =A0 return of_register_platform_driver(&xilinxfb_of_driver);
> =A0}
>
> =A0static void __exit
> =A0xilinxfb_cleanup(void)
> =A0{
> - =A0 =A0 =A0 platform_driver_unregister(&xilinxfb_platform_driver);
> - =A0 =A0 =A0 xilinxfb_of_unregister();
> + =A0 =A0 =A0 of_unregister_platform_driver(&xilinxfb_of_driver);
> =A0}
>
> =A0module_init(xilinxfb_init);
> =A0module_exit(xilinxfb_cleanup);
>
> =A0MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
> -MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
> +MODULE_DESCRIPTION("Xilinx TFT frame buffer driver");
> =A0MODULE_LICENSE("GPL");
> --
> 1.6.2.1
>
>
>
> This email and any attachments are intended for the sole use of the named=
recipient(s) and contain(s) confidential information that may be proprieta=
ry, privileged or copyrighted under applicable law. If you are not the inte=
nded recipient, do not read, copy, or forward this email message or any att=
achments. Delete this email message and any attachments immediately.
>
>
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] AOA: Convert onyx and tas codecs to new-style i2c drivers (v3)
From: Jean Delvare @ 2009-04-15 13:53 UTC (permalink / raw)
To: Johannes Berg; +Cc: Benjamin, linuxppc-dev, alsa-devel, Takashi Iwai
In-Reply-To: <1239800444.9071.5.camel@johannes.local>
On Wed, 15 Apr 2009 15:00:44 +0200, Johannes Berg wrote:
> On Wed, 2009-04-15 at 14:22 +0200, Jean Delvare wrote:
> > The legacy i2c binding model is going away soon, so convert the AOA
> > codec drivers to the new model or they'll break.
> >
> > Signed-off-by: Jean Delvare <khali@linux-fr.org>
> > Cc: Johannes Berg <johannes@sipsolutions.net>
> > Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > Tested-by: Andreas Schwab <schwab@linux-m68k.org>
> > ---
> > Johannes, this is a reworked patch which assumes that the onyx codec
> > probing can fail. It's not exactly clean but that's the easiest
> > approach for now. Can you please give it a try? Thanks.
>
> This works.
> Tested-by: Johannes Berg <johannes@sipsolutions.net> [quad G5]
Excellent, thanks for the testing!
--
Jean Delvare
^ permalink raw reply
* Re: [PATCH] AOA: Convert onyx and tas codecs to new-style i2c drivers
From: Jean Delvare @ 2009-04-15 13:52 UTC (permalink / raw)
To: Johannes Berg; +Cc: Benjamin, linuxppc-dev, alsa-devel, Takashi Iwai
In-Reply-To: <1239801490.9071.11.camel@johannes.local>
On Wed, 15 Apr 2009 15:18:10 +0200, Johannes Berg wrote:
> On Wed, 2009-04-15 at 15:06 +0200, Jean Delvare wrote:
> > Yes, i2c core or even driver core. I'll see if I can reproduce it.
>
> Alright.
Hmm, couldn't reproduce it. Maybe it is fixed in rc2. I don't have too
much time to spend on this, so if we don't hit it again I consider it
solved.
> > (...)
> > What I had in mind was not so complex. Simply, we could move the
> > i2c_new_device() calls into layout_found_codec(). That way we can
> > decide to instantiate the I2C device if and only if check_codec() is
> > successful. This is more efficient that creating the device, letting
> > the driver attach to it, with probing eventually failing, and then
> > removing the device if it wasn't the right one.
> >
> > That is, the i2c client would be a mere helper on top of struct
> > aoa_codec, rather than the other way around.
>
> Ah. That would probably work, but right now I have little motivation to
> work on it -- I hardly use the G5 desktop machine any more.
OK, no problem. I don't want to force anyone to spend time on this. But
if anyone ever does and need my help for the i2c part, just drop me a
line!
> > Wow. One I2C device which can be reached through 2 different I2C buses?
> > First time I hear about something like this. Very odd. I can't see the
> > point of doing this.
>
> Hmm. How do you know it's on different buses?
2-0046 fails and 3-0046 succeeds. The second number is the hexadecimal
I2C address, the first number is the I2C bus number. So, unless
i2c-powermac was told to register the same I2C bus twice (which would
be dangerous), the device can be accessed through 2 different buses.
> I don't really know
> anything -- all I know is that the DT is buggered and lists the codec
> twice. Since we can talk to both, then I'm sure it's just one chip, they
> wouldn't put the chip in twice when you can use only one of them :)
There's probably little point in trying to guess anything further, the
only thing that would help are the detailed schematics of that part of
the board.
--
Jean Delvare
^ permalink raw reply
* Re: [PATCH] AOA: Convert onyx and tas codecs to new-style i2c drivers
From: Johannes Berg @ 2009-04-15 13:18 UTC (permalink / raw)
To: Jean Delvare; +Cc: Takashi Iwai, linuxppc-dev, alsa-devel
In-Reply-To: <20090415150632.0b2fe6bb@hyperion.delvare>
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On Wed, 2009-04-15 at 15:06 +0200, Jean Delvare wrote:
> > That would be weird -- the error path _has_ to be taken always in onyx.
> > Unless you're talking about something in the i2c core or whatever?
>
> Yes, i2c core or even driver core. I'll see if I can reproduce it.
Alright.
> > > (...)
> > > Well, there is a dirty workaround, which I will apply for now, but...
> > > ideally the layout factory should be revisited so that the codec check
> > > happens earlier. Is this something you could help with?
> >
> > That's not really possible unless the factory post-processes the entire
> > device-tree -- very ugly.
>
> What I had in mind was not so complex. Simply, we could move the
> i2c_new_device() calls into layout_found_codec(). That way we can
> decide to instantiate the I2C device if and only if check_codec() is
> successful. This is more efficient that creating the device, letting
> the driver attach to it, with probing eventually failing, and then
> removing the device if it wasn't the right one.
>
> That is, the i2c client would be a mere helper on top of struct
> aoa_codec, rather than the other way around.
Ah. That would probably work, but right now I have little motivation to
work on it -- I hardly use the G5 desktop machine any more.
> > > That's something which isn't too clear to me: is there a physical
> > > device at 2-0046 and 3-0046? The onyx codec is accepted for the latter,
> > > however it seems that the test of a device presence at 2-0046 succeeds
> > > as well...
> >
> > It's the _same_ physical device.
>
> Wow. One I2C device which can be reached through 2 different I2C buses?
> First time I hear about something like this. Very odd. I can't see the
> point of doing this.
Hmm. How do you know it's on different buses? I don't really know
anything -- all I know is that the DT is buggered and lists the codec
twice. Since we can talk to both, then I'm sure it's just one chip, they
wouldn't put the chip in twice when you can use only one of them :)
johannes
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^ permalink raw reply
* Re: OF PCI howto?
From: Wolfram Sang @ 2009-04-15 13:08 UTC (permalink / raw)
To: Joakim Tjernlund; +Cc: linuxppc-dev
In-Reply-To: <OF2E7A8F65.EA7B7D26-ONC1257599.004624DB-C1257599.0046F2EB@transmode.se>
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On Wed, Apr 15, 2009 at 02:54:57PM +0200, Joakim Tjernlund wrote:
> dts fragment correct for my setup? If not, is there a better example I can
> look at?
Maybe this message/thread can help you:
http://ozlabs.org/pipermail/devicetree-discuss/2009-March/000597.html
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
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