* [PATCH 7/8] spi_mpc8xxx: Turn qe_mode into flags
From: Anton Vorontsov @ 2009-08-14 22:26 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
Soon there will be more flags introduced in subsequent patches, so
let's turn qe_mode into flags.
Also introduce mpc8xxx_spi_strmode() and print current SPI mode.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/spi/spi_mpc8xxx.c | 30 +++++++++++++++++++-----------
include/linux/fsl_devices.h | 2 +-
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 4b119ea..80374df 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -96,7 +96,8 @@ struct mpc8xxx_spi {
u32 rx_shift; /* RX data reg shift when in qe mode */
u32 tx_shift; /* TX data reg shift when in qe mode */
- bool qe_mode;
+ unsigned int flags;
+#define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
struct workqueue_struct *workqueue;
struct work_struct work;
@@ -235,14 +236,14 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
if (bits_per_word <= 8) {
cs->get_rx = mpc8xxx_spi_rx_buf_u8;
cs->get_tx = mpc8xxx_spi_tx_buf_u8;
- if (mpc8xxx_spi->qe_mode) {
+ if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
cs->rx_shift = 16;
cs->tx_shift = 24;
}
} else if (bits_per_word <= 16) {
cs->get_rx = mpc8xxx_spi_rx_buf_u16;
cs->get_tx = mpc8xxx_spi_tx_buf_u16;
- if (mpc8xxx_spi->qe_mode) {
+ if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
cs->rx_shift = 16;
cs->tx_shift = 16;
}
@@ -252,7 +253,8 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
} else
return -EINVAL;
- if (mpc8xxx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
+ if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE &&
+ spi->mode & SPI_LSB_FIRST) {
cs->tx_shift = 0;
if (bits_per_word <= 8)
cs->rx_shift = 8;
@@ -518,6 +520,13 @@ static void mpc8xxx_spi_cleanup(struct spi_device *spi)
kfree(spi->controller_state);
}
+static const char *mpc8xxx_spi_strmode(unsigned int flags)
+{
+ if (flags & SPI_QE_CPU_MODE)
+ return "QE CPU";
+ return "CPU";
+}
+
static struct spi_master * __devinit
mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
{
@@ -544,14 +553,14 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
master->cleanup = mpc8xxx_spi_cleanup;
mpc8xxx_spi = spi_master_get_devdata(master);
- mpc8xxx_spi->qe_mode = pdata->qe_mode;
mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
+ mpc8xxx_spi->flags = pdata->flags;
mpc8xxx_spi->spibrg = pdata->sysclk;
mpc8xxx_spi->rx_shift = 0;
mpc8xxx_spi->tx_shift = 0;
- if (mpc8xxx_spi->qe_mode) {
+ if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) {
mpc8xxx_spi->rx_shift = 16;
mpc8xxx_spi->tx_shift = 24;
}
@@ -584,7 +593,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
/* Enable SPI interface */
regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
- if (pdata->qe_mode)
+ if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE)
regval |= SPMODE_OP;
mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
@@ -604,9 +613,8 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
if (ret < 0)
goto unreg_master;
- printk(KERN_INFO
- "%s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n",
- dev_name(dev), mpc8xxx_spi->base, mpc8xxx_spi->irq);
+ dev_info(dev, "at 0x%p (irq = %d), %s mode\n", mpc8xxx_spi->base,
+ mpc8xxx_spi->irq, mpc8xxx_spi_strmode(mpc8xxx_spi->flags));
return master;
@@ -797,7 +805,7 @@ static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
prop = of_get_property(np, "mode", NULL);
if (prop && !strcmp(prop, "cpu-qe"))
- pdata->qe_mode = 1;
+ pdata->flags = SPI_QE_CPU_MODE;
ret = of_mpc8xxx_spi_get_chipselects(dev);
if (ret)
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 43fc95d..39fd946 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -74,7 +74,7 @@ struct spi_device;
struct fsl_spi_platform_data {
u32 initial_spmode; /* initial SPMODE value */
s16 bus_num;
- bool qe_mode;
+ unsigned int flags;
/* board specific information */
u16 max_chipselect;
void (*cs_control)(struct spi_device *spi, bool on);
--
1.6.3.3
^ permalink raw reply related
* [PATCH 6/8] spi_mpc8xxx: Factor out SPI mode change steps into a call
From: Anton Vorontsov @ 2009-08-14 22:26 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
We'll add more steps soon, so get rid of the duplication.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/spi/spi_mpc8xxx.c | 56 +++++++++++++++++++-------------------------
1 files changed, 24 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 518671b..4b119ea 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -155,6 +155,26 @@ MPC83XX_SPI_TX_BUF(u8)
MPC83XX_SPI_TX_BUF(u16)
MPC83XX_SPI_TX_BUF(u32)
+static void mpc8xxx_spi_change_mode(struct spi_device *spi)
+{
+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
+ struct spi_mpc8xxx_cs *cs = spi->controller_state;
+ __be32 __iomem *mode = &mspi->base->mode;
+ unsigned long flags;
+
+ if (cs->hw_mode == mpc8xxx_spi_read_reg(mode))
+ return;
+
+ /* Turn off IRQs locally to minimize time that SPI is disabled. */
+ local_irq_save(flags);
+
+ /* Turn off SPI unit prior changing mode */
+ mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE);
+ mpc8xxx_spi_write_reg(mode, cs->hw_mode);
+
+ local_irq_restore(flags);
+}
+
static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
{
struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
@@ -168,27 +188,13 @@ static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
}
if (value == BITBANG_CS_ACTIVE) {
- u32 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
-
mpc8xxx_spi->rx_shift = cs->rx_shift;
mpc8xxx_spi->tx_shift = cs->tx_shift;
mpc8xxx_spi->get_rx = cs->get_rx;
mpc8xxx_spi->get_tx = cs->get_tx;
- if (cs->hw_mode != regval) {
- unsigned long flags;
- __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
-
- regval = cs->hw_mode;
- /* Turn off IRQs locally to minimize time that
- * SPI is disabled
- */
- local_irq_save(flags);
- /* Turn off SPI unit prior changing mode */
- mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
- mpc8xxx_spi_write_reg(mode, regval);
- local_irq_restore(flags);
- }
+ mpc8xxx_spi_change_mode(spi);
+
if (pdata->cs_control)
pdata->cs_control(spi, pol);
}
@@ -198,7 +204,6 @@ static
int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
{
struct mpc8xxx_spi *mpc8xxx_spi;
- u32 regval;
u8 bits_per_word, pm;
u32 hz;
struct spi_mpc8xxx_cs *cs = spi->controller_state;
@@ -286,21 +291,8 @@ int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
pm--;
cs->hw_mode |= SPMODE_PM(pm);
- regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
- if (cs->hw_mode != regval) {
- unsigned long flags;
- __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
-
- regval = cs->hw_mode;
- /* Turn off IRQs locally to minimize time
- * that SPI is disabled
- */
- local_irq_save(flags);
- /* Turn off SPI unit prior changing mode */
- mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
- mpc8xxx_spi_write_reg(mode, regval);
- local_irq_restore(flags);
- }
+
+ mpc8xxx_spi_change_mode(spi);
return 0;
}
--
1.6.3.3
^ permalink raw reply related
* [PATCH 5/8] spi_mpc8xxx: Fix uninitialized variable
From: Anton Vorontsov @ 2009-08-14 22:25 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
This patch fixes the following warning:
CC drivers/spi/spi_mpc8xxx.o
spi_mpc8xxx.c: In function 'of_mpc8xxx_spi_probe':
spi_mpc8xxx.c:681: warning: 'ret' may be used uninitialized in this function
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/spi/spi_mpc8xxx.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index 0fd0ec4..518671b 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -709,6 +709,7 @@ static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
gpio = of_get_gpio_flags(np, i, &flags);
if (!gpio_is_valid(gpio)) {
dev_err(dev, "invalid gpio #%d: %d\n", i, gpio);
+ ret = gpio;
goto err_loop;
}
--
1.6.3.3
^ permalink raw reply related
* [PATCH 4/8] powerpc/qe&cpm: Implement static inline stubs for non-QE/CPM builds
From: Anton Vorontsov @ 2009-08-14 22:25 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
This is needed to avoid ugly #ifdefs in drivers.
QE/CPM UDC and MPC8xxx SPI drivers will benefit from this change.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/include/asm/cpm.h | 44 ++++++++++++++++++++++++++++++++++++++++
arch/powerpc/include/asm/qe.h | 11 +++++++++-
2 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index ea3fdb9..0835eb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -3,6 +3,7 @@
#include <linux/compiler.h>
#include <linux/types.h>
+#include <linux/errno.h>
#include <linux/of.h>
/*
@@ -131,13 +132,56 @@ typedef struct cpm_buf_desc {
#define BD_I2C_START (0x0400)
int cpm_muram_init(void);
+
+#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
+#else
+static inline unsigned long cpm_muram_alloc(unsigned long size,
+ unsigned long align)
+{
+ return -ENOSYS;
+}
+
+static inline int cpm_muram_free(unsigned long offset)
+{
+ return -ENOSYS;
+}
+
+static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
+ unsigned long size)
+{
+ return -ENOSYS;
+}
+
+static inline void __iomem *cpm_muram_addr(unsigned long offset)
+{
+ return NULL;
+}
+
+static inline unsigned long cpm_muram_offset(void __iomem *addr)
+{
+ return -ENOSYS;
+}
+
+static inline dma_addr_t cpm_muram_dma(void __iomem *addr)
+{
+ return 0;
+}
+#endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */
+
+#ifdef CONFIG_CPM
int cpm_command(u32 command, u8 opcode);
+#else
+static inline int cpm_command(u32 command, u8 opcode)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_CPM */
int cpm2_gpiochip_add32(struct device_node *np);
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 157c5ca..791c67a 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -145,8 +145,17 @@ static inline void qe_pin_set_gpio(struct qe_pin *qe_pin) {}
static inline void qe_pin_set_dedicated(struct qe_pin *pin) {}
#endif /* CONFIG_QE_GPIO */
-/* QE internal API */
+#ifdef CONFIG_QUICC_ENGINE
int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
+#else
+static inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol,
+ u32 cmd_input)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_QUICC_ENGINE */
+
+/* QE internal API */
enum qe_clock qe_clock_source(const char *source);
unsigned int qe_get_brg_clk(void);
int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
--
1.6.3.3
^ permalink raw reply related
* [PATCH 3/8] powerpc/cpm: Move CPMFCR_* defines into cpm.h
From: Anton Vorontsov @ 2009-08-14 22:25 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
The bits are generic to CPM devices, so let's move them to the
common header file, so drivers won't need to privately reintroduce
another bunch of the same bits (as we can't include cpm2.h header
together with cpm1.h).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/include/asm/cpm.h | 16 ++++++++++++++++
arch/powerpc/include/asm/cpm2.h | 8 --------
2 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index b5f1534..ea3fdb9 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -27,6 +27,22 @@ struct usb_ctlr {
u8 res6[0x22];
} __attribute__ ((packed));
+/*
+ * Function code bits, usually generic to devices.
+ */
+#ifdef CONFIG_CPM1
+#define CPMFCR_GBL ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_TC2 ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_DTB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#define CPMFCR_BDB ((u_char)0x00) /* Flag doesn't exist in CPM1 */
+#else
+#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
+#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
+#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
+#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
+#endif
+#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX ((ushort)0x0000)
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 236cfa3..f42e9ba 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -124,14 +124,6 @@ static inline void cpm2_fastbrg(uint brg, uint rate, int div16)
__cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT);
}
-/* Function code bits, usually generic to devices.
-*/
-#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
-#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
-#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
-#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
-#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
-
/* Parameter RAM offsets from the base.
*/
#define PROFF_SCC1 ((uint)0x8000)
--
1.6.3.3
^ permalink raw reply related
* [PATCH 2/8] powerpc/qe&cpm2: Avoid redefinitions in CPM2 and QE headers
From: Anton Vorontsov @ 2009-08-14 22:25 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
struct mcc defined in both immap_qe.h and immap_cpm2.h, so they will
conflic when included in a single file. The mcc struct is easy to deal
with, since it isn't used in any driver (yet), so let's just rename QE
version to qe_mcc.
The ucb_ctlr is a bit trickier, since it is used by fsl_qe_udc driver,
and the driver supports both CPM and QE UDCs, plus the QE version is
used to form a bigger immap struct.
I don't want to touch USB code in this series, so for now let's just
copy most generic version into the common cpm.h header, later we'll
create cpm_usb.h where we'll place common USB structs that are used
by QE/CPM UDC and QE Host drivers (FHCI).
And as for the structs in qe.h and cpm2.h, just prefix them with qe_
and cpm_.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/include/asm/cpm.h | 22 ++++++++++++++++++++++
arch/powerpc/include/asm/immap_cpm2.h | 2 +-
arch/powerpc/include/asm/immap_qe.h | 8 ++++----
3 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index 24d79e3..b5f1534 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -5,6 +5,28 @@
#include <linux/types.h>
#include <linux/of.h>
+/*
+ * USB Controller pram common to QE and CPM.
+ */
+struct usb_ctlr {
+ u8 usb_usmod;
+ u8 usb_usadr;
+ u8 usb_uscom;
+ u8 res1[1];
+ __be16 usb_usep[4];
+ u8 res2[4];
+ __be16 usb_usber;
+ u8 res3[2];
+ __be16 usb_usbmr;
+ u8 res4[1];
+ u8 usb_usbs;
+ /* Fields down below are QE-only */
+ __be16 usb_ussft;
+ u8 res5[2];
+ __be16 usb_usfrn;
+ u8 res6[0x22];
+} __attribute__ ((packed));
+
/* Opcodes common to CPM1 and CPM2
*/
#define CPM_CR_INIT_TRX ((ushort)0x0000)
diff --git a/arch/powerpc/include/asm/immap_cpm2.h b/arch/powerpc/include/asm/immap_cpm2.h
index d4f069b..7c64fda 100644
--- a/arch/powerpc/include/asm/immap_cpm2.h
+++ b/arch/powerpc/include/asm/immap_cpm2.h
@@ -549,7 +549,7 @@ typedef struct comm_proc {
/* USB Controller.
*/
-typedef struct usb_ctlr {
+typedef struct cpm_usb_ctlr {
u8 usb_usmod;
u8 usb_usadr;
u8 usb_uscom;
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index c346d0b..4e10f50 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -210,7 +210,7 @@ struct sir {
} __attribute__ ((packed));
/* USB Controller */
-struct usb_ctlr {
+struct qe_usb_ctlr {
u8 usb_usmod;
u8 usb_usadr;
u8 usb_uscom;
@@ -229,7 +229,7 @@ struct usb_ctlr {
} __attribute__ ((packed));
/* MCC */
-struct mcc {
+struct qe_mcc {
__be32 mcce; /* MCC event register */
__be32 mccm; /* MCC mask register */
__be32 mccf; /* MCC configuration register */
@@ -431,9 +431,9 @@ struct qe_immap {
struct qe_mux qmx; /* QE Multiplexer */
struct qe_timers qet; /* QE Timers */
struct spi spi[0x2]; /* spi */
- struct mcc mcc; /* mcc */
+ struct qe_mcc mcc; /* mcc */
struct qe_brg brg; /* brg */
- struct usb_ctlr usb; /* USB */
+ struct qe_usb_ctlr usb; /* USB */
struct si1 si1; /* SI */
u8 res11[0x800];
struct sir sir; /* SI Routing Tables */
--
1.6.3.3
^ permalink raw reply related
* [PATCH 1/8] powerpc/cpm: Remove SPI defines and spi structs
From: Anton Vorontsov @ 2009-08-14 22:25 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
In-Reply-To: <20090814222453.GA9568@oksana.dev.rtsoft.ru>
When cpm2.h included into spi_mpc8xxx driver, the SPI defines
in the header conflict with defines in the driver.
We don't need them in the header file, so remove them. Plus
remove "struct spi", we'll use a better version in the driver.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/include/asm/cpm1.h | 45 ---------------------------------------
arch/powerpc/include/asm/cpm2.h | 39 ---------------------------------
2 files changed, 0 insertions(+), 84 deletions(-)
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index 7685ffd..81b0119 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -478,51 +478,6 @@ typedef struct iic {
char res2[2]; /* Reserved */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uint spi_rstate; /* Internal */
- uint spi_rdp; /* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc; /* Internal */
- uint spi_rxtmp; /* Internal */
- uint spi_tstate; /* Internal */
- uint spi_tdp; /* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc; /* Internal */
- uint spi_txtmp; /* Internal */
- uint spi_res;
- ushort spi_rpbase; /* Relocation pointer */
- ushort spi_res2;
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */
-#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */
-#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */
-#define SPMODE_EN ((ushort)0x0100) /* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */
-#define SPMODE_LEN4 ((ushort)0x0030) /* 4 bits per char */
-#define SPMODE_LEN8 ((ushort)0x0070) /* 8 bits per char */
-#define SPMODE_LEN16 ((ushort)0x00f0) /* 16 bits per char */
-#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */
-
-/* SPIE fields */
-#define SPIE_MME 0x20
-#define SPIE_TXE 0x10
-#define SPIE_BSY 0x04
-#define SPIE_TXB 0x02
-#define SPIE_RXB 0x01
-
/*
* RISC Controller Configuration Register definitons
*/
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index 990ff19..236cfa3 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -654,45 +654,6 @@ typedef struct iic {
uint iic_txtmp; /* Internal */
} iic_t;
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uint spi_rstate; /* Internal */
- uint spi_rdp; /* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc; /* Internal */
- uint spi_rxtmp; /* Internal */
- uint spi_tstate; /* Internal */
- uint spi_tdp; /* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc; /* Internal */
- uint spi_txtmp; /* Internal */
- uint spi_res; /* Tx temp. */
- uint spi_res1[4]; /* SDMA temp. */
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */
-#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */
-#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */
-#define SPMODE_EN ((ushort)0x0100) /* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */
-#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */
-
-#define SPMODE_LEN(x) ((((x)-1)&0xF)<<4)
-#define SPMODE_PM(x) ((x) &0xF)
-
-#define SPI_EB ((u_char)0x10) /* big endian byte order */
-
/* IDMA parameter RAM
*/
typedef struct idma {
--
1.6.3.3
^ permalink raw reply related
* [PATCH 0/8] spi_mpc8xxx: Add support for DMA transfers
From: Anton Vorontsov @ 2009-08-14 22:24 UTC (permalink / raw)
To: David Brownell
Cc: spi-devel-general, Andrew Morton, linux-kernel, linuxppc-dev
Hi all,
Here are some patches that add DMA support for spi_mpc8xxx driver,
which means that we now support QE BD mode and SPI on CPM1 and CPM2
chips.
QE BD mode and CPM2 SPI support were tested on real hardware, CPM1
was only compile tested (though I belive it will work :-).
Thanks,
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH] Add kmemleak annotations to lmb.c
From: Catalin Marinas @ 2009-08-14 21:57 UTC (permalink / raw)
To: David Miller; +Cc: linuxppc-dev
In-Reply-To: <20090814.124933.146642945.davem@davemloft.net>
On Fri, 2009-08-14 at 12:49 -0700, David Miller wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Date: Fri, 14 Aug 2009 17:56:40 +1000
>
> > On Thu, 2009-08-13 at 16:40 +0100, Catalin Marinas wrote:
> >> On Thu, 2009-08-13 at 13:01 +1000, Michael Ellerman wrote:
> >> > We don't actually want kmemleak to track the lmb allocations, so we
> >> > pass min_count as 0. However telling kmemleak about lmb allocations
> >> > allows it to scan that memory for pointers to other memory that is
> >> > tracked by kmemleak, ie. slab allocations etc.
> >>
> >> Looks alright to me (though I haven't tested it). You can add a
> >> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
> >
> > Actually, Milton pointed to me that we may not want to allow all
> > LMB chunks to be scanned by kmemleaks, things like the DART hole
> > that's taken out of the linear mapping for example may need to
> > be avoided, though I'm not sure what would be the right way to
> > do it.
>
> I think that annotating LMB for kmemleak may be more problems
> that it's worth.
BTW, are there many LMB allocations used for storing pointers to other
objects? If not, it may be worth just annotating those with
kmemleak_alloc() if you get false positives.
--
Catalin
^ permalink raw reply
* Re: [PATCH 2/4] Add localbus node and MTD partitions for SBC834x
From: Kumar Gala @ 2009-08-14 20:32 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <22f17c810cb3e567a842300c553121a574d9b139.1250036189.git.paul.gortmaker@windriver.com>
On Aug 12, 2009, at 8:34 AM, Paul Gortmaker wrote:
> From: Liang Li <liang.li@windriver.com>
>
> There is 8MB flash, 8kB EEPROM and 128MB SDRAM on the sbc834x
> local bus, so add a localbus node in DTS with MTD partitions.
>
> The recent U-boot commit fe613cdd4eb moves u-boot to the beginning
> of flash, hence the legacy label on the partition at the end of flash.
>
> Signed-off-by: Liang Li <liang.li@windriver.com>
> Signed-off-by: Yang Shi <yang.shi@windriver.com>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/boot/dts/sbc8349.dts | 40 ++++++++++++++++++++++++++++
> +++++++++
> 1 files changed, 40 insertions(+), 0 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 4/4] sbc8349: update defconfig, enable MTD, USB storage
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <af988ab89523a12510ac715429df6551312d1a80.1250036189.git.paul.gortmaker@windriver.com>
On Aug 12, 2009, at 8:34 AM, Paul Gortmaker wrote:
> With flash partition entries in the DTS file, MTD might as well
> be enabled in the defconfig. In a similar vein, enable USB and
> enough related options (SCSI/ext2/ext3) so that a user can read
> and write to a generic USB flash drive as well.
>
> Also, this board only has the two default SOC UARTs, so adjust the
> UART config accordingly.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/configs/83xx/sbc834x_defconfig | 320 ++++++++++++++++++
> ++++++++-
> 1 files changed, 308 insertions(+), 12 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 1/4] Remove second USB node from SBC834x DTS
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <87b9869d069308d2ed12324ea924e284c85a6765.1250036189.git.paul.gortmaker@windriver.com>
On Aug 12, 2009, at 8:34 AM, Paul Gortmaker wrote:
> From: Liang Li <liang.li@windriver.com>
>
> Since only one of the SoC USB devices is brought out to a physical
> connector on the board, remove the 2nd (USB-DR) node from the DTS.
> Having it present and USB enabled will cause a hang at boot.
>
> Signed-off-by: Liang Li <liang.li@windriver.com>
> Signed-off-by: Yang Shi <yang.shi@windriver.com>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/boot/dts/sbc8349.dts | 12 ------------
> 1 files changed, 0 insertions(+), 12 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 3/4] Fix incorrect PCI interrupt map in SBC834x DTS
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <764194b0524e1baccb737668f5aeb198989ac2d1.1250036189.git.paul.gortmaker@windriver.com>
On Aug 12, 2009, at 8:34 AM, Paul Gortmaker wrote:
> From: Liang Li <liang.li@windriver.com>
>
> Allows interrupts to occur on the sbc834x. Currently PCI devices
> get assigned an incorrect IRQ and so the interrupt count never
> increases. This was tested with the 82546GB based dual port E1000
> PCI-X NIC which uses two distinct IRQ lines on the one card.
>
> root@localhost:/root> cat /proc/interrupts | grep eth
> 17: 78 IPIC Level eth1
> 48: 27121 IPIC Level eth0
>
> Signed-off-by: Liang Li <liang.li@windriver.com>
> Signed-off-by: Yang Shi <yang.shi@windriver.com>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/boot/dts/sbc8349.dts | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH v2] sbc8560: Fix warm reboot with board specific reset function
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: Linuxppc-dev
In-Reply-To: <1250260574-13747-1-git-send-email-paul.gortmaker@windriver.com>
On Aug 14, 2009, at 9:36 AM, Paul Gortmaker wrote:
> From: Liang Li <Liang.Li@windriver.com>
>
> The existing fsl_rstcr_restart function is not applicable to the
> mpc8560. The Global Utilities Block on this earlier CPU doesn't have
> the control/reset register at 0xe00b0. This implements a board
> specific reset function that uses the RCR(Reset Control Register) of
> the sbc8560's EPLD to do a reset.
>
> Signed-off-by: Liang Li <Liang.Li@windriver.com>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
>
> v2: update comment, change outb(x, inb(x)&0x7f) --> clrbits(x,0x80)
applied to next
- k
^ permalink raw reply
* Re: [v3][PATCH][powerpc/85xx] P2020RDB Platform Support Added
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Poonam Aggrwal; +Cc: linuxppc-dev
In-Reply-To: <1249659316-22927-1-git-send-email-poonam.aggrwal@freescale.com>
On Aug 7, 2009, at 10:35 AM, Poonam Aggrwal wrote:
> Adds P2020RDB basic support in linux.
> Overview of P2020RDB platform
> - DDR
> DDR2 1G
> - NOR Flash
> 16MByte
> - NAND Flash
> 32MByte
> - 3 Ethernet interfaces
> 1) etSEC1
> - RGMII
> - connected to a 5 port Vitesse Switch(VSC7385)
> - Switch is memory mapped through eLBC interface(CS#2)
> - IRQ1
> 2) etSEC2
> - SGMII
> - connected to VSC8221
> - IRQ2
> 3) etSEC3
> - RGMII
> - connected to VSC8641
> - IRQ3
> - 2 1X PCIe interfaces
> - SD/MMC ,USB
> - SPI EEPROM
> - Serial I2C EEPROM
>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> ---
> based on http://www.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> Incorporated more feedback from Felix
> arch/powerpc/boot/dts/p2020rdb.dts | 586 ++++++++++++++++++++
> +++++++++
> arch/powerpc/configs/mpc85xx_defconfig | 1 +
> arch/powerpc/platforms/85xx/Kconfig | 9 +
> arch/powerpc/platforms/85xx/Makefile | 3 +-
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 141 +++++++
> 5 files changed, 739 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p2020rdb.dts
> create mode 100644 arch/powerpc/platforms/85xx/mpc85xx_rdb.c
applied to next
- k
^ permalink raw reply
* Re: [PATCH 2/2] sbc8560: remove "has-rstcr" from global utilities block
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: Linuxppc-dev
In-Reply-To: <4935eb5c085f994943e2f989a74c1333c60aebf1.1250266325.git.paul.gortmaker@windriver.com>
On Aug 14, 2009, at 11:13 AM, Paul Gortmaker wrote:
> The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0
> in the GUTS. The generic reboot code uses this tag to
> determine if it should be using the RSTCR for reboot, so
> remove it from the board definition.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/boot/dts/sbc8560.dts | 1 -
> 1 files changed, 0 insertions(+), 1 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 1/2] powerpc: issue fsl_soc reboot warning only when applicable
From: Kumar Gala @ 2009-08-14 20:21 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: Linuxppc-dev
In-Reply-To: <2d219a4998d568c5925727ce61ca440dfb25f5e7.1250266325.git.paul.gortmaker@windriver.com>
On Aug 14, 2009, at 11:13 AM, Paul Gortmaker wrote:
> Some CPU, like the MPC8560 don't have a RSTCR in the Global
> Utilities Block. These boards will implement their own reboot
> call, and not use this code, so we should only warn about the
> absence of the GUTS RSTCR when the default reboot code is used.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/sysdev/fsl_soc.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH] Add kmemleak annotations to lmb.c
From: David Miller @ 2009-08-14 19:49 UTC (permalink / raw)
To: benh; +Cc: catalin.marinas, linuxppc-dev
In-Reply-To: <1250236600.24143.34.camel@pasglop>
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Fri, 14 Aug 2009 17:56:40 +1000
> On Thu, 2009-08-13 at 16:40 +0100, Catalin Marinas wrote:
>> On Thu, 2009-08-13 at 13:01 +1000, Michael Ellerman wrote:
>> > We don't actually want kmemleak to track the lmb allocations, so we
>> > pass min_count as 0. However telling kmemleak about lmb allocations
>> > allows it to scan that memory for pointers to other memory that is
>> > tracked by kmemleak, ie. slab allocations etc.
>>
>> Looks alright to me (though I haven't tested it). You can add a
>> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
>
> Actually, Milton pointed to me that we may not want to allow all
> LMB chunks to be scanned by kmemleaks, things like the DART hole
> that's taken out of the linear mapping for example may need to
> be avoided, though I'm not sure what would be the right way to
> do it.
I think that annotating LMB for kmemleak may be more problems
that it's worth.
I can't think of any specific problems like the DART thing on
sparc64, but I'm sure that as soon as someone starts trying
to test this they'll run into one thing or another :-)
^ permalink raw reply
* [PATCH] powerpc: Fix __tlb_remove_tlb_entry for PPC_STD_MMU_32
From: Becky Bruce @ 2009-08-14 19:47 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
Ben's recent patches are missing the CONFIG_ prefix to
PPC_STD_MMU_32, which results in not properly flushing hash
entries. On 8641, this showed up as a platform that would boot,
but deny logins.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
---
arch/powerpc/include/asm/tlb.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/tlb.h b/arch/powerpc/include/asm/tlb.h
index 5db9910..e2b428b 100644
--- a/arch/powerpc/include/asm/tlb.h
+++ b/arch/powerpc/include/asm/tlb.h
@@ -39,7 +39,7 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
unsigned long address)
{
-#ifdef PPC_STD_MMU_32
+#ifdef CONFIG_PPC_STD_MMU_32
if (pte_val(*ptep) & _PAGE_HASHPTE)
flush_hash_entry(tlb->mm, ptep, address);
#endif
--
1.6.0.6
^ permalink raw reply related
* Re: [PATCH 1/3] Support for PCI Express reset type
From: Jesse Barnes @ 2009-08-14 16:54 UTC (permalink / raw)
To: Mike Mason
Cc: linuxppc-dev, Paul Mackerras, Richard Lary, linux-pci,
linasvepstas
In-Reply-To: <4A721FB1.4040903@us.ibm.com>
On Thu, 30 Jul 2009 15:33:21 -0700
Mike Mason <mmlnx@us.ibm.com> wrote:
> This is the first of three patches that implement a bit field that
> PCI Express device drivers can use to indicate they need a
> fundamental reset during error recovery.
>
> By default, the EEH framework on powerpc does what's known as a "hot
> reset" during recovery of a PCI Express device. We've found a case
> where the device needs a "fundamental reset" to recover properly.
> The current PCI error recovery and EEH frameworks do not support this
> distinction.
>
> The attached patch (courtesy of Richard Lary) adds a bit field to
> pci_dev that indicates whether the device requires a fundamental
> reset during recovery.
>
> These patches supersede the previously submitted patch that
> implemented a fundamental reset bit field.
>
> Please review and let me know of any concerns.
>
> Signed-off-by: Mike Mason <mmlnx@us.ibm.com>
> Signed-off-by: Richard Lary <rlary@us.ibm.com>
Ok, applied this series to my linux-next branch, it looks pretty
reasonable to me.
For future patches, please cc me, and include the subsystem in the
subject, along with a specific description of the patch, e.g. "PCI: add
PCIe fundamental reset interface", "PCI: document PCIe fundamental
reset", or for arch specific patches, "PCI/powerpc: implement support
for PCIe fundamental reset".
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
^ permalink raw reply
* [PATCH 2/2] sbc8560: remove "has-rstcr" from global utilities block
From: Paul Gortmaker @ 2009-08-14 16:13 UTC (permalink / raw)
To: Linuxppc-dev
In-Reply-To: <2d219a4998d568c5925727ce61ca440dfb25f5e7.1250266325.git.paul.gortmaker@windriver.com>
The earlier mpc8560 CPUs don't have the RSTCR at 0xe00b0
in the GUTS. The generic reboot code uses this tag to
determine if it should be using the RSTCR for reboot, so
remove it from the board definition.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/sbc8560.dts | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 239d57a..9e13ed8 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -303,7 +303,6 @@
global-utilities@e0000 {
compatible = "fsl,mpc8560-guts";
reg = <0xe0000 0x1000>;
- fsl,has-rstcr;
};
};
--
1.6.3.3
^ permalink raw reply related
* [PATCH 1/2] powerpc: issue fsl_soc reboot warning only when applicable
From: Paul Gortmaker @ 2009-08-14 16:13 UTC (permalink / raw)
To: Linuxppc-dev
Some CPU, like the MPC8560 don't have a RSTCR in the Global
Utilities Block. These boards will implement their own reboot
call, and not use this code, so we should only warn about the
absence of the GUTS RSTCR when the default reboot code is used.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/sysdev/fsl_soc.c | 6 ++++--
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 95dbc64..adca4af 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -37,6 +37,7 @@
#include <asm/irq.h>
#include <asm/time.h>
#include <asm/prom.h>
+#include <asm/machdep.h>
#include <sysdev/fsl_soc.h>
#include <mm/mmu_decl.h>
#include <asm/cpm2.h>
@@ -383,8 +384,9 @@ static int __init setup_rstcr(void)
if (!rstcr)
printk (KERN_EMERG "Error: reset control register "
"not mapped!\n");
- } else
- printk (KERN_INFO "rstcr compatible register does not exist!\n");
+ } else if (ppc_md.restart == fsl_rstcr_restart)
+ printk(KERN_ERR "No RSTCR register, warm reboot won't work\n");
+
if (np)
of_node_put(np);
return 0;
--
1.6.3.3
^ permalink raw reply related
* Re: [PATCH] sbc8560: Fix warm reboot with board specific reset function
From: Kumar Gala @ 2009-08-14 14:53 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <4A857814.5080209@windriver.com>
On Aug 14, 2009, at 9:43 AM, Paul Gortmaker wrote:
> Kumar Gala wrote:
>> On Aug 13, 2009, at 6:06 PM, Paul Gortmaker wrote:
>>> From: Liang Li <Liang.Li@windriver.com>
>>>
>>> The existing fsl_rstcr_restart function fails to reset the sbc8560
>>> board. This implements a board specific reset function that uses
>>> the RCR(Reset Control Register) of the board's EPLD to do a reset.
>>>
>>> Signed-off-by: Liang Li <Liang.Li@windriver.com>
>>> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
>>> ---
>>> arch/powerpc/platforms/85xx/sbc8560.c | 39 ++++++++++++++++++++++
>>> ++++++++++-
>>> 1 files changed, 38 insertions(+), 1 deletions(-)
>> The reason it didn't was that feature doesnt exist on the mpc8560 :)
>
> I could see how that might have an impact on the
> functionality.... :-)
>
> So, what should the guts block of the 8560 dts look
> like? It currently has the standard:
>
> ------------
> global-utilities@e0000 {
> compatible = "fsl,mpc8560-guts";
> reg = <0xe0000 0x1000>;
> fsl,has-rstcr;
> };
> ------------
>
> MPC8560 has a guts block, but saying "has-rstcr", as
> you've pointed out, is a bit of a lie. If we remove that
> tag, then we'll trip the:
>
> printk(KERN_INFO "rstcr compatible register does not exist!\n");
>
> which isn't the end of the world, but at the moment it
> reads more like an error message, vs. an informative one.
we should probably remove 'fsl,has-rstcr' from the .dts since that's
just wrong. I've got no issue w/either removing the warning or
changing its wording.
- k
^ permalink raw reply
* Re: [PATCH] sbc8560: Fix warm reboot with board specific reset function
From: Paul Gortmaker @ 2009-08-14 14:43 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <B86B0653-311C-49EA-B27F-F5AB98D49401@kernel.crashing.org>
Kumar Gala wrote:
>
> On Aug 13, 2009, at 6:06 PM, Paul Gortmaker wrote:
>
>> From: Liang Li <Liang.Li@windriver.com>
>>
>> The existing fsl_rstcr_restart function fails to reset the sbc8560
>> board. This implements a board specific reset function that uses
>> the RCR(Reset Control Register) of the board's EPLD to do a reset.
>>
>> Signed-off-by: Liang Li <Liang.Li@windriver.com>
>> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
>> ---
>> arch/powerpc/platforms/85xx/sbc8560.c | 39
>> ++++++++++++++++++++++++++++++++-
>> 1 files changed, 38 insertions(+), 1 deletions(-)
>
> The reason it didn't was that feature doesnt exist on the mpc8560 :)
I could see how that might have an impact on the
functionality.... :-)
So, what should the guts block of the 8560 dts look
like? It currently has the standard:
------------
global-utilities@e0000 {
compatible = "fsl,mpc8560-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
------------
MPC8560 has a guts block, but saying "has-rstcr", as
you've pointed out, is a bit of a lie. If we remove that
tag, then we'll trip the:
printk(KERN_INFO "rstcr compatible register does not exist!\n");
which isn't the end of the world, but at the moment it
reads more like an error message, vs. an informative one.
Paul.
>
> - k
^ permalink raw reply
* [PATCH v2] sbc8560: Fix warm reboot with board specific reset function
From: Paul Gortmaker @ 2009-08-14 14:36 UTC (permalink / raw)
To: Linuxppc-dev
In-Reply-To: <1456507C-E9F9-436B-9901-6F127A5FDD1F@kernel.crashing.org>
From: Liang Li <Liang.Li@windriver.com>
The existing fsl_rstcr_restart function is not applicable to the
mpc8560. The Global Utilities Block on this earlier CPU doesn't have
the control/reset register at 0xe00b0. This implements a board
specific reset function that uses the RCR(Reset Control Register) of
the sbc8560's EPLD to do a reset.
Signed-off-by: Liang Li <Liang.Li@windriver.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
v2: update comment, change outb(x, inb(x)&0x7f) --> clrbits(x,0x80)
arch/powerpc/platforms/85xx/sbc8560.c | 39 ++++++++++++++++++++++++++++++++-
1 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index cc27807..a5ad1c7 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -267,6 +267,43 @@ arch_initcall(sbc8560_rtc_init);
#endif /* M48T59 */
+static __u8 __iomem *brstcr;
+
+static int __init sbc8560_bdrstcr_init(void)
+{
+ struct device_node *np;
+ struct resource res;
+
+ np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr");
+ if (np == NULL) {
+ printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n");
+ return -ENODEV;
+ }
+
+ of_address_to_resource(np, 0, &res);
+
+ printk(KERN_INFO "sbc8560: Found BRSTCR at i/o 0x%x\n", res.start);
+
+ brstcr = ioremap(res.start, res.end - res.start);
+ if(!brstcr)
+ printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n");
+
+ of_node_put(np);
+
+ return 0;
+}
+
+arch_initcall(sbc8560_bdrstcr_init);
+
+void sbc8560_rstcr_restart(char * cmd)
+{
+ local_irq_disable();
+ if(brstcr)
+ clrbits8(brstcr, 0x80);
+
+ while(1);
+}
+
define_machine(sbc8560) {
.name = "SBC8560",
.probe = sbc8560_probe,
@@ -274,7 +311,7 @@ define_machine(sbc8560) {
.init_IRQ = sbc8560_pic_init,
.show_cpuinfo = sbc8560_show_cpuinfo,
.get_irq = mpic_get_irq,
- .restart = fsl_rstcr_restart,
+ .restart = sbc8560_rstcr_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
--
1.6.3.3
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