* Re: MPC85xx External/Internal Interrupts
From: Alemao @ 2009-09-04 19:14 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <d970ff420909041201m343dafdfta0e55df8b5c01f60@mail.gmail.com>
I've read some posts in the list, and about:
irq_of_parse_and_map()
irq_create_map()
But Im still trying to understand MPC85xx TSEC1 dts.
Gianfar driver is using request_irq(), and request_irq() uses virtual
irq, right?
Thats why in dts all irqs for TSEC1 are "offseted" of 16?
Manual | DTS
---------------
13 29
14 30
18 34
And about external IRQs, MPC8555RM doesnt have IDs for them, what
should I use to request IRQ0 using irq_create_map()??
In MPC83xx all interrupts have IDs, including IRQ0, IRQ1...
That make things much more clear.
Thanks in advance,
--
Alemao
^ permalink raw reply
* Re: MPC85xx External/Internal Interrupts
From: Alemao @ 2009-09-04 19:24 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <d970ff420909041214o56cb58b3mfe71eb036218dada@mail.gmail.com>
On Fri, Sep 4, 2009 at 4:14 PM, Alemao<xcarandiru@gmail.com> wrote:
> I've read some posts in the list, and about:
>
> irq_of_parse_and_map()
> irq_create_map()
>
> But Im still trying to understand MPC85xx TSEC1 dts.
>
> Gianfar driver is using request_irq(), and request_irq() uses virtual
> irq, right?
>
> Thats why in dts all irqs for TSEC1 are "offseted" of 16?
>
> Manual =A0| =A0DTS
> ---------------
> 13 =A0 =A0 =A0 =A0 29
> 14 =A0 =A0 =A0 =A0 30
> 18 =A0 =A0 =A0 =A0 34
>
This makes no sense.
CPM2-PIC, in MPC8555ERM, its on 30. In DTS is on 46. Offset of 16.
But my platform code use irq_of_parse_and_map()!
So why this offset?!?!
--
Alemao
^ permalink raw reply
* Re: MPC85xx External/Internal Interrupts
From: Sebastian Andrzej Siewior @ 2009-09-06 11:06 UTC (permalink / raw)
To: Alemao; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <d970ff420909041229hb3aa96dya329e06ea56dd1ac@mail.gmail.com>
* Alemao | 2009-09-04 16:29:15 [-0300]:
>On Fri, Sep 4, 2009 at 4:28 PM, Alemao<xcarandiru@gmail.com> wrote:
>> I've read some posts in the list, and about:
>>
>> irq_of_parse_and_map()
>> irq_create_map()
>>
>> But Im still trying to understand MPC85xx TSEC1 dts.
>>
>> Gianfar driver is using request_irq(), and request_irq() uses virtual
>> irq, right?
Yes. request_irq() expects a linux-irq-number. irq_of_parse_and_map()
provides such a number.
>>
>> Thats why in dts all irqs for TSEC1 are "offseted" of 16?
>>
>> Manual ?| ?DTS
>> ----------------------
>> 13 ? ? ? ? 29
>> 14 ? ? ? ? 30
>> 18 ? ? ? ? 34
>>
>
>This makes no sense.
>
>CPM2-PIC, in MPC8555ERM, its on 30. In DTS is on 46. Offset of 16.
>But my platform code use irq_of_parse_and_map()!
>
>So why this offset?!?!
irq_of_parse_and_map() creates a mapping between the hardware irq number
as specified in the device tree and the linux number (virq) which is
used within the linux api in request_irq() for instance.
irq_of_parse_and_map() is essential to create a mapping between those
two. The interrupt controller on the MPC8555 (mpic) specifies the first
few interrupt numbers as external sources followed by internal sources.
Now, during the init sequenze of the mpic every interrupt source
(internal and external) becomes its uniqe vector number which identifies
the source by a number. This number is the hardware interrupt number
i.e. that thing in the device tree. The init sequence is a for loop
which starts at 0 for the first interrupt source which happens to be
external interrupt 0, 1 for external interrupt 1 and so on. At the time
it reaches the first internal interrupt source the vector number is 16.
That's why you always have an offset of 16 between every internal
interupt source number in the MPC855ERM document and those weired
numbers in the device tree :)
>Alemao
Sebastian
^ permalink raw reply
* Re: [PATCH 1/2] powerpc: add kexec support on FSL-Book-E
From: wilbur.chan @ 2009-09-06 14:27 UTC (permalink / raw)
To: Sebastian Andrzej Siewior; +Cc: linuxppc-dev
In-Reply-To: <4A98317B.6050805@linutronix.de>
2009/8/29, Sebastian Andrzej Siewior <bigeasy@linutronix.de>:
> If you send some patches I could add them to my tree so we have
> everything together.
Hmmm..I don't know how to make a patch like yours.. So , I just
manually list my
codes below which are added to machine_kexec_32.c and misc_32.S respectively.
1) machine_kexec_32.c (only test on MPC8572, MPC8541 , P2020DS, so I
used macro here, the param of image->segment[image->nr_segments - 1].mem
is the dtb address)
//default_machine_kexec
+ #if defined(CONFIG_MPC8572_PC) || defined(CONFIG_P2020) ||
defined(CONFIG_MPC8560_ADS)
+ (*rnk)(page_list, reboot_code_buffer, image->start,
image->segment[image->nr_segments - 1].mem);
+#else
rnk = (relocate_new_kernel_t) reboot_code_buffer;
(*rnk)(page_list, reboot_code_buffer_phys, image->start);
+#endif
2) misc_32.S:
define macro to setup mapping:
+#define FSL_BOOKE_MAS0(tlbsel,esel,nv) \
+ (MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel) | MAS0_NV(nv))
+#define FSL_BOOKE_MAS1(v,iprot,tid,ts,tsize) \
+ ((((v) << 31) & MAS1_VALID) |\
+(((iprot) << 30) & MAS1_IPROT) |\
+ (MAS1_TID(tid)) |\
+(((ts) << 12) & MAS1_TS) |\
+ (MAS1_TSIZE(tsize)))
+#define FSL_BOOKE_MAS2(epn, wimge) \
+(((epn) & MAS3_RPN) | (wimge))
+#define FSL_BOOKE_MAS3(rpn, user, perms) \
+ (((rpn) & MAS3_RPN) | (user) | (perms))
+ #ifdef CONFIG_E500
/* 1. Find the index of the entry we're executing in */
bl invstr /* Find our address */
invstr:
mflr r6 /* Make it accessible */
mfmsr r7
rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
mfspr r7, SPRN_PID0
slwi r7,r7,16
or r7,r7,r4
mtspr SPRN_MAS6,r7
tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
mfspr r7,SPRN_MAS1
andis. r7,r7,MAS1_VALID@h
bne match_TLB
/*
* We search just in PID0 because kernel's global mapping has to be
* there. We simply return to the caller if we didn't find the mapping
* since we didn't (yet) pass the point of no return. This should not
* happen.
*/
mtlr r28
blr
match_TLB:
mfspr r7,SPRN_MAS0
rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */
mfspr r7,SPRN_MAS1 /* Insure IPROT set */
oris r7,r7,MAS1_IPROT@h
mtspr SPRN_MAS1,r7
tlbwe
/* 2. Invalidate all entries except the entry we're executing in */
mfspr r9,SPRN_TLB1CFG
andi. r9,r9,0xfff
li r6,0 /* Set Entry counter to 0 */
1:
lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
mtspr SPRN_MAS0,r7
tlbre
mfspr r7,SPRN_MAS1
rlwinm r7,r7,0,2,31 /* Clear MAS1 Valid and IPROT */
cmpw r3,r6
beq skpinv /* Dont update the current execution TLB */
mtspr SPRN_MAS1,r7
tlbwe
isync
skpinv:
addi r6,r6,1 /* Increment */
cmpw r6,r9 /* Are we done? */
bne 1b /* If not, repeat */
/* Invalidate TLB0 */
li r6,0x04
tlbivax 0,r6
TLBSYNC
/* Invalidate TLB1 */
li r6,0x0c
tlbivax 0,r6
TLBSYNC
+#ifdef CONFIG_MPC8572_PC || CONFIG_P2020
+ lis r6,FSL_BOOKE_MAS0(1, 13, 0)@h
+ ori r6,r6,FSL_BOOKE_MAS0(1, 13, 0)@l
+lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1GB)@h
+ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1GB)@l
+ lis r8,FSL_BOOKE_MAS2(0x00000000, (MAS2_I|MAS2_G))@h
+ori r8,r8,FSL_BOOKE_MAS2(0x00000000, (MAS2_I|MAS2_G))@l
+ lis r9,FSL_BOOKE_MAS3(0x00000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ ori r9,r9,FSL_BOOKE_MAS3(0x00000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+mtspr SPRN_MAS0,r6
+ mtspr SPRN_MAS1,r7
+mtspr SPRN_MAS2,r8
+mtspr SPRN_MAS3,r9
+ isync
+ msync
+tlbwe
+ lis r6,FSL_BOOKE_MAS0(1, 12, 0)@h
+ ori r6,r6,FSL_BOOKE_MAS0(1, 12, 0)@l
+lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1GB)@h
+ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1GB)@l
+lis r8,FSL_BOOKE_MAS2(0x40000000, (MAS2_I|MAS2_G))@h
+ori r8,r8,FSL_BOOKE_MAS2(0x40000000, (MAS2_I|MAS2_G))@l
+lis r9,FSL_BOOKE_MAS3(0x40000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ori r9,r9,FSL_BOOKE_MAS3(0x40000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+mtspr SPRN_MAS0,r6
+ mtspr SPRN_MAS1,r7
+ mtspr SPRN_MAS2,r8
+mtspr SPRN_MAS3,r9
+isync
+msync
+ tlbwe
+#endif
+#ifdef CONFIG_MPC8560_ADS
+ lis r6,FSL_BOOKE_MAS0(1, 13, 0)@h
+ori r6,r6,FSL_BOOKE_MAS0(1, 13, 0)@l
+ lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@h
+ ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@l
+lis r8,FSL_BOOKE_MAS2(0x00000000, (MAS2_I|MAS2_G))@h
+ori r8,r8,FSL_BOOKE_MAS2(0x00000000, (MAS2_I|MAS2_G))@l
+ lis r9,FSL_BOOKE_MAS3(0x00000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ori r9,r9,FSL_BOOKE_MAS3(0x00000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+mtspr SPRN_MAS0,r6
+mtspr SPRN_MAS1,r7
+ mtspr SPRN_MAS2,r8
+mtspr SPRN_MAS3,r9
+isync
+ msync
+tlbwe
+ lis r6,FSL_BOOKE_MAS0(1, 12, 0)@h
+ori r6,r6,FSL_BOOKE_MAS0(1, 12, 0)@l
+lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@h
+ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@l
+ lis r8,FSL_BOOKE_MAS2(0x10000000, (MAS2_I|MAS2_G))@h
+ ori r8,r8,FSL_BOOKE_MAS2(0x10000000, (MAS2_I|MAS2_G))@l
+lis r9,FSL_BOOKE_MAS3(0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ori r9,r9,FSL_BOOKE_MAS3(0x10000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+ mtspr SPRN_MAS0,r6
+mtspr SPRN_MAS1,r7
+mtspr SPRN_MAS2,r8
+mtspr SPRN_MAS3,r9
+isync
+msync
+tlbwe
+lis r6,FSL_BOOKE_MAS0(1, 11, 0)@h
+ ori r6,r6,FSL_BOOKE_MAS0(1, 11, 0)@l
+ lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@h
+ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@l
+ lis r8,FSL_BOOKE_MAS2(0x20000000, (MAS2_I|MAS2_G))@h
+ ori r8,r8,FSL_BOOKE_MAS2(0x20000000, (MAS2_I|MAS2_G))@l
+ lis r9,FSL_BOOKE_MAS3(0x20000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ori r9,r9,FSL_BOOKE_MAS3(0x20000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+mtspr SPRN_MAS0,r6
+ mtspr SPRN_MAS1,r7
+ mtspr SPRN_MAS2,r8
+ mtspr SPRN_MAS3,r9
+isync
+ msync
+ tlbwe
+ lis r6,FSL_BOOKE_MAS0(1, 10, 0)@h
+ori r6,r6,FSL_BOOKE_MAS0(1, 10, 0)@l
+lis r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@h
+ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)@l
+ lis r8,FSL_BOOKE_MAS2(0x30000000, (MAS2_I|MAS2_G))@h
+ori r8,r8,FSL_BOOKE_MAS2(0x30000000, (MAS2_I|MAS2_G))@l
+lis r9,FSL_BOOKE_MAS3(0x30000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ori r9,r9,FSL_BOOKE_MAS3(0x30000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+ mtspr SPRN_MAS0,r6
+mtspr SPRN_MAS1,r7
+mtspr SPRN_MAS2,r8
+ mtspr SPRN_MAS3,r9
+isync
+msync
+tlbwe
+#endif
+#endif
mr r3, r29
mr r5, r31
^ permalink raw reply
* gianfar compilation is broken in 2.6.31-rc9
From: Felix Radensky @ 2009-09-06 19:40 UTC (permalink / raw)
To: uchiyama.toru, linuxppc-dev@ozlabs.org list, linux-netdev
Hi,
Compilation of gianfar driver fails in 2.6.31-rc9:
CC drivers/net/gianfar.o
drivers/net/gianfar.c: In function 'gfar_remove':
drivers/net/gianfar.c:494: error: 'dev' undeclared (first use in this
function)
drivers/net/gianfar.c:494: error: (Each undeclared identifier is
reported only once
drivers/net/gianfar.c:494: error: for each function it appears in.)
make[2]: *** [drivers/net/gianfar.o] Error 1
make[1]: *** [drivers/net] Error 2
make: *** [drivers] Error 2
The problem was introduce by the following commit:
commit 38bddf04bcfe661fbdab94888c3b72c32f6873b3
Author: Toru UCHIYAMA <uchiyama.toru@jp.fujitsu.com>
Date: Sun Aug 30 22:04:07 2009 -0700
gianfar: gfar_remove needs to call unregister_netdev()
Felix.
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Benjamin Herrenschmidt @ 2009-09-06 21:32 UTC (permalink / raw)
To: Wrobel Heinz-R39252
Cc: Tom Burns, Chris Pringle, Andrea Zypchen, linuxppc-dev, azilkie
In-Reply-To: <AAE514D00E55E6438B7F5186462A545202750F9B@zuk35exm20.fsl.freescale.net>
On Thu, 2009-09-03 at 13:20 +0100, Wrobel Heinz-R39252 wrote:
> Hi,
>
> This doesn't seem right. If we are talking about a single CPU core chip,
> i.e., just one data cache, then setting M is typically a) useless and
> could even b) cause a performance penalty depending on a chip's
> implementation.
> The M bit is required if *other* cores with caches need to see changes
> for coherency of their caches. You wouldn't set it for one core only
> because your own core knows about its own cache.
> The possible performance penalty could happen because you need some way
> to tell the others that they better intercept a transaction. And that
> could, depending on the chip, by a clock extra or so per transaction.
> Now, in theory, a DMA engine could have caches, read from cache content
> first, and could snoop the bus on global transactions like another core,
> but I have never heard of such a beast.
Actually there are some freescale part, afaik, that require M for proper
cache coherency :-) I don't have names off the top of my mind, I think
it has to be with PCI inbound buffers.
In this case, however, it's 440 on which I believe M is simply ignored.
Cheers,
Ben.
> Hope this helps,
>
> Heinz
>
> -----Original Message-----
> From: linuxppc-dev-bounces+heinz.wrobel=freescale.com@lists.ozlabs.org
> [mailto:linuxppc-dev-bounces+heinz.wrobel=freescale.com@lists.ozlabs.org
> ] On Behalf Of Chris Pringle
> Sent: Donnerstag, 3. September 2009 10:05
> To: azilkie@datacast.com
> Cc: Tom Burns; Andrea Zypchen; linuxppc-dev@lists.ozlabs.org
> Subject: Re: AW: PowerPC PCI DMA issues (prefetch/coherency?)
>
> Hi Adam,
>
> If you have a look in include/asm-ppc/pgtable.h for the following
> section:
> #ifdef CONFIG_44x
> #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_GUARDED)
> #else
> #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> #endif
>
> Try adding _PAGE_COHERENT to the appropriate line above and see if that
> fixes your issue - this causes the 'M' bit to be set on the page which
> sure enforce cache coherency. If it doesn't, you'll need to check the
> 'M' bit isn't being masked out in head_44x.S (it was originally masked
> out on arch/powerpc, but was fixed in later kernels when the cache
> coherency issues with non-SMP systems were resolved).
>
> The patch I had fixed two problems on 2.6.26 for 'powerpc':
> 1) It stopped the 'M' bit being masked out (head_32.S)
> 2) It set the cache coherency ('M' bit) flag on each page table entry
> (pgtable-ppc32.h)
>
> Hope this helps!
>
> Cheers,
> Chris
>
> Adam Zilkie wrote:
> > Hi Chris,
> >
> > I am having a problem similar to what you described in this
> discussion.
> > We are using the ppc arch with 2.6.24 with CONFIG_SEQUOIA with
> > compiles arch/ppc/kernel/head_44x.c (quite different from
> > /arch/powerpc/kernel/head_32.S). I would like to apply your
> > backporting patch to this architecture. Any help would be appreciated.
> >
> > Regards,
> > Adam
> >
> >
>
>
^ permalink raw reply
* [PATCH] mpc512x: Reset module
From: Damien Dusha @ 2009-09-07 0:06 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 443 bytes --]
Dear all,
I have written a small patch to get the software reset working on the
mpc5121. It is similar to the reset driver found in
arch/powerpc/platforms/83xx/misc.c except it has been modified to look
for the reset node in the device tree before writing to the reset
module.
Comments are welcome. It's my first patch to the mailing list, so
I'll apologise in advance for any problems with the submission
procedure.
Damien.
[-- Attachment #2: mpc512x_restart.patch --]
[-- Type: text/x-patch, Size: 2005 bytes --]
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index a8976b4..16ca250 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -70,4 +70,5 @@ define_machine(mpc5121_ads) {
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
+ .restart = mpc512x_restart,
};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
index f4db8a7..d77f0ab 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -14,5 +14,6 @@
extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
extern void __init mpc512x_init_IRQ(void);
extern void __init mpc512x_init_i2c(void);
+extern void mpc512x_restart(char *cmd);
void __init mpc512x_declare_of_platform_devices(void);
#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 135fd6b..deddafc 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -22,6 +22,7 @@
#include <asm/prom.h>
#include <asm/time.h>
+#include <asm/mpc512x.h>
#include "mpc512x.h"
unsigned long
@@ -89,6 +90,33 @@ void __init mpc512x_init_i2c(void)
}
}
+void mpc512x_restart(char *cmd)
+{
+ struct device_node *np;
+ struct mpc512x_reset_module *rm;
+
+ local_irq_disable();
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
+
+ if (np) {
+
+ rm = of_iomap(np, 0);
+ if (rm) {
+
+ /* Enable software reset "RSTE" (in hex) */
+ out_be32( &(rm->rpr) , 0x52535445);
+
+ /* Set the software hard reset */
+ out_be32( &(rm->rcr), 0x2);
+ }
+ }
+
+ printk (KERN_EMERG "Error: Unable to map reset module, spinning forever!\n");
+ for(;;);
+}
+
+
/*
* Nodes to do bus probe on, soc and localbus
*/
^ permalink raw reply related
* [PATCH] powerpc: Cleanup linker script using new linker script macros.
From: Tim Abbott @ 2009-09-07 3:09 UTC (permalink / raw)
To: Linux Kernel Mailing List
Cc: linuxppc-dev, Tim Abbott, Sam Ravnborg, Paul Mackerras
Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@ozlabs.org
Cc: Sam Ravnborg <sam@ravnborg.org>
---
arch/powerpc/kernel/vmlinux.lds.S | 69 ++++++++-----------------------------
1 files changed, 15 insertions(+), 54 deletions(-)
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 8ef8a14..c5e176c 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -6,6 +6,7 @@
#include <asm/page.h>
#include <asm-generic/vmlinux.lds.h>
#include <asm/cache.h>
+#include <asm/thread_info.h>
ENTRY(_stext)
@@ -77,12 +78,7 @@ SECTIONS
/* Read-only data */
RODATA
- /* Exception & bug tables */
- __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
- __start___ex_table = .;
- *(__ex_table)
- __stop___ex_table = .;
- }
+ EXCEPTION_TABLE(0)
NOTES :kernel :notes
@@ -99,12 +95,7 @@ SECTIONS
*/
. = ALIGN(PAGE_SIZE);
__init_begin = .;
-
- .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
- _sinittext = .;
- INIT_TEXT
- _einittext = .;
- } :kernel
+ INIT_TEXT_SECTION(PAGE_SIZE) :kernel
/* .exit.text is discarded at runtime, not link time,
* to deal with references from __bug_table
@@ -128,23 +119,16 @@ SECTIONS
#endif
}
- . = ALIGN(16);
.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
- __setup_start = .;
- *(.init.setup)
- __setup_end = .;
+ INIT_SETUP(16)
}
.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
- __initcall_start = .;
- INITCALLS
- __initcall_end = .;
- }
+ INIT_CALLS
+ }
.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
- __con_initcall_start = .;
- *(.con_initcall.init)
- __con_initcall_end = .;
+ CON_INITCALL
}
SECURITY_INIT
@@ -175,14 +159,10 @@ SECTIONS
__stop___fw_ftr_fixup = .;
}
#endif
-#ifdef CONFIG_BLK_DEV_INITRD
- . = ALIGN(PAGE_SIZE);
.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
- __initramfs_start = .;
- *(.init.ramfs)
- __initramfs_end = .;
+ INIT_RAM_FS
}
-#endif
+
PERCPU(PAGE_SIZE)
. = ALIGN(8);
@@ -250,50 +230,31 @@ SECTIONS
PROVIDE32 (edata = .);
/* The initial task and kernel stack */
-#ifdef CONFIG_PPC32
- . = ALIGN(8192);
-#else
- . = ALIGN(16384);
-#endif
.data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
- *(.data.init_task)
+ INIT_TASK_DATA(THREAD_SIZE)
}
- . = ALIGN(PAGE_SIZE);
.data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
- *(.data.page_aligned)
+ PAGE_ALIGNED_DATA(PAGE_SIZE)
}
- . = ALIGN(L1_CACHE_BYTES);
.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
- *(.data.cacheline_aligned)
+ CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
}
- . = ALIGN(L1_CACHE_BYTES);
.data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) {
- *(.data.read_mostly)
+ READ_MOSTLY_DATA(L1_CACHE_BYTES)
}
- . = ALIGN(PAGE_SIZE);
.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
- __nosave_begin = .;
- *(.data.nosave)
- . = ALIGN(PAGE_SIZE);
- __nosave_end = .;
+ NOSAVE_DATA
}
/*
* And finally the bss
*/
- .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
- __bss_start = .;
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- __bss_stop = .;
- }
+ BSS_SECTION(0, 0, 0)
. = ALIGN(PAGE_SIZE);
_end = . ;
--
1.6.3.3
^ permalink raw reply related
* [RFC] [PATCH] Write to HVC terminal from purgatory code
From: M. Mohan Kumar @ 2009-09-07 5:14 UTC (permalink / raw)
To: horms, kexec; +Cc: linuxppc-dev, miltonm
Write to HVC terminal from purgatory code
Current x86/x86-64 kexec-tools print the message "I'm in purgatory" to
serial console/VGA while executing the purgatory code. Implement this
feature for POWERPC pseries platform by using the H_PUT_TERM_CHAR
hypervisor call by printng to hvc console.
Signed-off-by: M. Mohan Kumar <mohan@in.ibm.com>
---
kexec/arch/ppc64/fs2dt.c | 47 +++++++++++++++++++++++++++++++-
kexec/arch/ppc64/kexec-elf-ppc64.c | 7 +++++
kexec/arch/ppc64/kexec-ppc64.h | 1 +
purgatory/arch/ppc64/Makefile | 1 +
purgatory/arch/ppc64/console-ppc64.c | 14 +++++++++
purgatory/arch/ppc64/hvCall.S | 28 +++++++++++++++++++
purgatory/arch/ppc64/hvCall.h | 8 +++++
purgatory/arch/ppc64/purgatory-ppc64.c | 1 +
8 files changed, 106 insertions(+), 1 deletions(-)
create mode 100644 purgatory/arch/ppc64/hvCall.S
create mode 100644 purgatory/arch/ppc64/hvCall.h
diff --git a/kexec/arch/ppc64/fs2dt.c b/kexec/arch/ppc64/fs2dt.c
index b01ff86..bd9d36c 100644
--- a/kexec/arch/ppc64/fs2dt.c
+++ b/kexec/arch/ppc64/fs2dt.c
@@ -434,6 +434,9 @@ static void putnode(void)
if (!strcmp(basename,"/chosen/")) {
size_t cmd_len = 0;
char *param = NULL;
+ char filename[MAXPATH];
+ char buff[64];
+ int fd;
cmd_len = strlen(local_cmdline);
if (cmd_len != 0) {
@@ -446,7 +449,6 @@ static void putnode(void)
/* ... if not, grab root= from the old command line */
if (!param) {
- char filename[MAXPATH];
FILE *fp;
char *last_cmdline = NULL;
char *old_param;
@@ -483,8 +485,51 @@ static void putnode(void)
dt += (cmd_len + 3)/4;
fprintf(stderr, "Modified cmdline:%s\n", local_cmdline);
+
+ /*
+ * Determine the platform type/stdout type, so that purgatory
+ * code can print 'I'm in purgatory' message. Currently only
+ * pseries/hvcterminal is supported.
+ */
+ strcpy(filename, pathname);
+ strcat(filename, "linux,stdout-path");
+ fd = open(filename, O_RDONLY);
+ if (fd == -1) {
+ printf("Unable to find linux,stdout-path, printing"
+ " from purgatory is diabled\n");
+ goto no_debug;
+ }
+ if (fstat(fd, &statbuf)) {
+ printf("Unable to stat linux,stdout-path, printing"
+ " from purgatory is diabled\n");
+ close(fd);
+ goto no_debug;
+ }
+ read(fd, buff, statbuf.st_size);
+ close(fd);
+ strcpy(filename, "/proc/device-tree/");
+ strcat(filename, buff);
+ strcat(filename, "/compatible");
+ fd = open(filename, O_RDONLY);
+ if (fd == -1) {
+ printf("Unable to find linux,stdout-path/compatible, "
+ " printing from purgatory is diabled\n");
+ goto no_debug;
+ }
+ if (fstat(fd, &statbuf)) {
+ printf("Unable to stat linux,stdout-path/compatible, "
+ " printing from purgatory is diabled\n");
+ close(fd);
+ goto no_debug;
+ }
+ read(fd, buff, statbuf.st_size);
+ if (!strcmp(buff, "hvterm1") ||
+ !strcmp(buff, "hvterm-protocol"))
+ my_debug = 1;
+ close(fd);
}
+no_debug:
for (i=0; i < numlist; i++) {
dp = namelist[i];
strcpy(dn, dp->d_name);
diff --git a/kexec/arch/ppc64/kexec-elf-ppc64.c b/kexec/arch/ppc64/kexec-elf-ppc64.c
index 21533cb..65fc42f 100644
--- a/kexec/arch/ppc64/kexec-elf-ppc64.c
+++ b/kexec/arch/ppc64/kexec-elf-ppc64.c
@@ -41,6 +41,8 @@
uint64_t initrd_base, initrd_size;
unsigned char reuse_initrd = 0;
const char *ramdisk;
+/* Used for enabling printing message from purgatory code */
+int my_debug = 0;
int elf_ppc64_probe(const char *buf, off_t len)
{
@@ -296,6 +298,8 @@ int elf_ppc64_load(int argc, char **argv, const char *buf, off_t len,
toc_addr = my_r2(&info->rhdr);
elf_rel_set_symbol(&info->rhdr, "my_toc", &toc_addr, sizeof(toc_addr));
+ /* Set debug */
+ elf_rel_set_symbol(&info->rhdr, "debug", &my_debug, sizeof(my_debug));
#ifdef DEBUG
my_kernel = 0;
my_dt_offset = 0;
@@ -304,6 +308,7 @@ int elf_ppc64_load(int argc, char **argv, const char *buf, off_t len,
my_stack = 0;
toc_addr = 0;
my_run_at_load = 0;
+ my_debug = 0;
elf_rel_get_symbol(&info->rhdr, "kernel", &my_kernel, sizeof(my_kernel));
elf_rel_get_symbol(&info->rhdr, "dt_offset", &my_dt_offset,
@@ -317,6 +322,7 @@ int elf_ppc64_load(int argc, char **argv, const char *buf, off_t len,
elf_rel_get_symbol(&info->rhdr, "stack", &my_stack, sizeof(my_stack));
elf_rel_get_symbol(&info->rhdr, "my_toc", &toc_addr,
sizeof(toc_addr));
+ elf_rel_get_symbol(&info->rhdr, "debug", &my_debug, sizeof(my_debug));
fprintf(stderr, "info->entry is %p\n", info->entry);
fprintf(stderr, "kernel is %llx\n", (unsigned long long)my_kernel);
@@ -329,6 +335,7 @@ int elf_ppc64_load(int argc, char **argv, const char *buf, off_t len,
fprintf(stderr, "stack is %llx\n", (unsigned long long)my_stack);
fprintf(stderr, "toc_addr is %llx\n", (unsigned long long)toc_addr);
fprintf(stderr, "purgatory size is %zu\n", purgatory_size);
+ fprintf(stderr, "debug is %d\n", my_debug);
#endif
for (i = 0; i < info->nr_segments; i++)
diff --git a/kexec/arch/ppc64/kexec-ppc64.h b/kexec/arch/ppc64/kexec-ppc64.h
index 920ac46..838c6da 100644
--- a/kexec/arch/ppc64/kexec-ppc64.h
+++ b/kexec/arch/ppc64/kexec-ppc64.h
@@ -20,6 +20,7 @@ unsigned long my_r2(const struct mem_ehdr *ehdr);
extern uint64_t initrd_base, initrd_size;
extern int max_memory_ranges;
extern unsigned char reuse_initrd;
+extern int my_debug;
/* boot block version 2 as defined by the linux kernel */
struct bootblock {
diff --git a/purgatory/arch/ppc64/Makefile b/purgatory/arch/ppc64/Makefile
index aaa4046..40a9e99 100644
--- a/purgatory/arch/ppc64/Makefile
+++ b/purgatory/arch/ppc64/Makefile
@@ -3,6 +3,7 @@
#
ppc64_PURGATORY_SRCS += purgatory/arch/ppc64/v2wrap.S
+ppc64_PURGATORY_SRCS += purgatory/arch/ppc64/hvCall.S
ppc64_PURGATORY_SRCS += purgatory/arch/ppc64/purgatory-ppc64.c
ppc64_PURGATORY_SRCS += purgatory/arch/ppc64/console-ppc64.c
ppc64_PURGATORY_SRCS += purgatory/arch/ppc64/crashdump_backup.c
diff --git a/purgatory/arch/ppc64/console-ppc64.c b/purgatory/arch/ppc64/console-ppc64.c
index d6da7b3..78a233b 100644
--- a/purgatory/arch/ppc64/console-ppc64.c
+++ b/purgatory/arch/ppc64/console-ppc64.c
@@ -20,8 +20,22 @@
*/
#include <purgatory.h>
+#include "hvCall.h"
+
+extern int debug;
void putchar(int c)
{
+ char buff[16];
+ unsigned long *lbuf = (unsigned long *)buff;
+
+ if (!debug) /* running on non pseries */
+ return;
+
+ if (c == '\n')
+ putchar('\r');
+
+ buff[0] = c;
+ plpar_hcall_norets(H_PUT_TERM_CHAR, 0, 1, lbuf[0], lbuf[1]);
return;
}
diff --git a/purgatory/arch/ppc64/hvCall.S b/purgatory/arch/ppc64/hvCall.S
new file mode 100644
index 0000000..e401f81
--- /dev/null
+++ b/purgatory/arch/ppc64/hvCall.S
@@ -0,0 +1,28 @@
+/*
+ * This file contains the generic function to perform a call to the
+ * pSeries LPAR hypervisor.
+ *
+ * Created by M. Mohan Kumar (mohan@in.ibm.com)
+ * Copyright (C) IBM Corporation
+ * Taken from linux/arch/powerpc/platforms/pseries/hvCall.S
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#define HVSC .long 0x44000022
+.text
+ .machine ppc64
+.globl .plpar_hcall_norets
+.plpar_hcall_norets:
+ or 6,6,6 # medium low priority
+ mfcr 0
+ stw 0,8(1)
+
+ HVSC /* invoke the hypervisor */
+
+ lwz 0,8(1)
+ mtcrf 0xff,0
+ blr /* return r3 = status */
diff --git a/purgatory/arch/ppc64/hvCall.h b/purgatory/arch/ppc64/hvCall.h
new file mode 100644
index 0000000..187e24d
--- /dev/null
+++ b/purgatory/arch/ppc64/hvCall.h
@@ -0,0 +1,8 @@
+#ifndef HVCALL_H
+#define HVCALL_H
+
+#define H_PUT_TERM_CHAR 0x58
+
+long plpar_hcall_norets(unsigned long opcode, ...);
+
+#endif
diff --git a/purgatory/arch/ppc64/purgatory-ppc64.c b/purgatory/arch/ppc64/purgatory-ppc64.c
index 93f28d2..0b6d326 100644
--- a/purgatory/arch/ppc64/purgatory-ppc64.c
+++ b/purgatory/arch/ppc64/purgatory-ppc64.c
@@ -28,6 +28,7 @@ unsigned long stack = 0;
unsigned long dt_offset = 0;
unsigned long my_toc = 0;
unsigned long kernel = 0;
+unsigned int debug = 0;
void setup_arch(void)
{
--
1.6.2.5
^ permalink raw reply related
* [PATCH] powerpc: Declare hcall_inst_seq_ops const
From: Tobias Klauser @ 2009-09-07 7:28 UTC (permalink / raw)
To: Paul Mackerras, Benjamin Herrenschmidt; +Cc: linuxppc-dev, Tobias Klauser
Marking it const moves it to the .rodata section, which avoids false
sharing with potential dirty data. In addition it'll catch accidental
writes at compile time to these shared resources.
(description taken from commit 5dfe4c964a0dd7bb3a1d64a4166835a153146207)
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
---
arch/powerpc/platforms/pseries/hvCall_inst.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index eae51ef..3631a4f 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -71,7 +71,7 @@ static int hc_show(struct seq_file *m, void *p)
return 0;
}
-static struct seq_operations hcall_inst_seq_ops = {
+static const struct seq_operations hcall_inst_seq_ops = {
.start = hc_start,
.next = hc_next,
.stop = hc_stop,
--
1.6.0.4
^ permalink raw reply related
* Re: [PATCH] mpc512x: Reset module
From: Wolfram Sang @ 2009-09-07 8:13 UTC (permalink / raw)
To: Damien Dusha; +Cc: linuxppc-dev
In-Reply-To: <c788c1220909061706i3c1c2c52rc1284e0ad416cb7@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 5661 bytes --]
Hi,
On Mon, Sep 07, 2009 at 10:06:01AM +1000, Damien Dusha wrote:
> Dear all,
>
> I have written a small patch to get the software reset working on the
> mpc5121. It is similar to the reset driver found in
> arch/powerpc/platforms/83xx/misc.c except it has been modified to look
> for the reset node in the device tree before writing to the reset
> module.
Heh, my patch looks quite similar :)
From: Wolfram Sang <w.sang@pengutronix.de>
Subject: mpc5121: add restart capability
Hack? Not intended for upstream yet.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
---
arch/powerpc/platforms/512x/mpc5121_generic.c | 32 ++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
Index: arch/powerpc/platforms/512x/mpc5121_generic.c
===================================================================
--- arch/powerpc/platforms/512x/mpc5121_generic.c.orig
+++ arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -20,6 +20,7 @@
#include <asm/ipic.h>
#include <asm/prom.h>
#include <asm/time.h>
+#include <asm/mpc512x.h>
#include "mpc512x.h"
@@ -49,6 +50,36 @@ static int __init mpc5121_generic_probe(
return board[i] != NULL;
}
+static void mpc5121_restart(char *cmd) {
+
+ struct mpc512x_reset_module *rm;
+ struct device_node *rmnode;
+
+ /* HACK: Proably not good from IRQ context */
+
+ rmnode = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
+ if (!rmnode) {
+ printk(KERN_ERR "Missing 'fsl,mpc5121-reset' "
+ "node in device tree!\n");
+ goto out;
+ }
+
+ rm = of_iomap(rmnode, 0);
+ if (!rm) {
+ printk(KERN_ERR "Error mapping reset module node!\n");
+ goto out;
+ }
+
+ local_irq_disable();
+
+ /* Unlock register first, then reset */
+ out_be32(&rm->rpr, 0x52535445);
+ out_be32(&rm->rcr, 0x00000002);
+out:
+ while (1) ;
+}
+
define_machine(mpc5121_generic) {
.name = "MPC5121 generic",
.probe = mpc5121_generic_probe,
@@ -56,4 +89,5 @@ define_machine(mpc5121_generic) {
.init_IRQ = mpc512x_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
+ .restart = mpc5121_restart,
};
There is one reason which I wanted to check before submitting this (alas, no
time :( ). From mpc52xx_common.c:
...
/*
* This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
* Permanent mapping is required because mpc52xx_restart() can be called
* from interrupt context while node mapping (which calls ioremap())
* cannot be used at such point.
*/
static DEFINE_SPINLOCK(mpc52xx_lock);
static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
...
I think this may be needed here also...
>
> Comments are welcome. It's my first patch to the mailing list, so
> I'll apologise in advance for any problems with the submission
> procedure.
>
> Damien.
> diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
> index a8976b4..16ca250 100644
> --- a/arch/powerpc/platforms/512x/mpc5121_ads.c
> +++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
> @@ -70,4 +70,5 @@ define_machine(mpc5121_ads) {
> .init_IRQ = mpc5121_ads_init_IRQ,
> .get_irq = ipic_get_irq,
> .calibrate_decr = generic_calibrate_decr,
> + .restart = mpc512x_restart,
Please use tabs and not spaces (See CodingStyle).
> };
> diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
> index f4db8a7..d77f0ab 100644
> --- a/arch/powerpc/platforms/512x/mpc512x.h
> +++ b/arch/powerpc/platforms/512x/mpc512x.h
> @@ -14,5 +14,6 @@
> extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
> extern void __init mpc512x_init_IRQ(void);
> extern void __init mpc512x_init_i2c(void);
> +extern void mpc512x_restart(char *cmd);
Um, do we need that?
> void __init mpc512x_declare_of_platform_devices(void);
> #endif /* __MPC512X_H__ */
> diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
> index 135fd6b..deddafc 100644
> --- a/arch/powerpc/platforms/512x/mpc512x_shared.c
> +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
> @@ -22,6 +22,7 @@
> #include <asm/prom.h>
> #include <asm/time.h>
>
> +#include <asm/mpc512x.h>
> #include "mpc512x.h"
>
> unsigned long
> @@ -89,6 +90,33 @@ void __init mpc512x_init_i2c(void)
> }
> }
>
> +void mpc512x_restart(char *cmd)
> +{
> + struct device_node *np;
Again spaces instead of a tab.
> + struct mpc512x_reset_module *rm;
> +
> + local_irq_disable();
> +
> + np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
> +
> + if (np) {
> +
> + rm = of_iomap(np, 0);
> + if (rm) {
Here you used tabs :)
> +
> + /* Enable software reset "RSTE" (in hex) */
> + out_be32( &(rm->rpr) , 0x52535445);
> +
> + /* Set the software hard reset */
> + out_be32( &(rm->rcr), 0x2);
> + }
> + }
While one probably won't see that because the reset comes immediately, the flow
of code may lead to the false assumption that the following error message gets
printed if somebody doesn't have knowledge about this controller.
> +
> + printk (KERN_EMERG "Error: Unable to map reset module, spinning forever!\n");
KERN_ERR should be enough, I think.
> + for(;;);
> +}
> +
> +
> /*
> * Nodes to do bus probe on, soc and localbus
> */
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply
* [PATCH] seq_file: convert /proc/device-tree/ to seq_file
From: Alexey Dobriyan @ 2009-09-07 9:31 UTC (permalink / raw)
To: benh, paulus; +Cc: linuxppc-dev
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
---
fs/proc/proc_devtree.c | 41 +++++++++++++++++++++--------------------
1 file changed, 21 insertions(+), 20 deletions(-)
--- a/fs/proc/proc_devtree.c
+++ b/fs/proc/proc_devtree.c
@@ -7,6 +7,7 @@
#include <linux/init.h>
#include <linux/time.h>
#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
#include <linux/stat.h>
#include <linux/string.h>
#include <asm/prom.h>
@@ -25,26 +26,27 @@ static struct proc_dir_entry *proc_device_tree;
/*
* Supply data on a read from /proc/device-tree/node/property.
*/
-static int property_read_proc(char *page, char **start, off_t off,
- int count, int *eof, void *data)
+static int property_proc_show(struct seq_file *m, void *v)
{
- struct property *pp = data;
- int n;
+ struct property *pp = m->private;
- if (off >= pp->length) {
- *eof = 1;
- return 0;
- }
- n = pp->length - off;
- if (n > count)
- n = count;
- else
- *eof = 1;
- memcpy(page, (char *)pp->value + off, n);
- *start = page;
- return n;
+ seq_write(m, pp->value, pp->length);
+ return 0;
+}
+
+static int property_proc_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, property_proc_show, PDE(inode)->data);
}
+static const struct file_operations property_proc_fops = {
+ .owner = THIS_MODULE,
+ .open = property_proc_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
/*
* For a node with a name like "gc@10", we make symlinks called "gc"
* and "@10" to it.
@@ -63,10 +65,9 @@ __proc_device_tree_add_prop(struct proc_dir_entry *de, struct property *pp,
* Unfortunately proc_register puts each new entry
* at the beginning of the list. So we rearrange them.
*/
- ent = create_proc_read_entry(name,
- strncmp(name, "security-", 9)
- ? S_IRUGO : S_IRUSR, de,
- property_read_proc, pp);
+ ent = proc_create_data(name,
+ strncmp(name, "security-", 9) ? S_IRUGO : S_IRUSR,
+ de, &property_proc_fops, pp);
if (ent == NULL)
return NULL;
^ permalink raw reply
* MPC8536DS: u-boot detects PCIe card but Linux 2.6.30 does not.
From: Leon Woestenberg @ 2009-09-07 11:01 UTC (permalink / raw)
To: Linux PPC
[-- Attachment #1: Type: text/plain, Size: 16290 bytes --]
Hello,
on my MPC8536DS development board, a PCIe card does not get detected
by Linux, u-boot does list it.
I'm suspecting the PCIe bridge (?) to not initialize correctly, but
that is a wild guess. See the u-boot log and kernel boot log with PCI
Debugging enabled.
Kernel config file is attached.
"[ 0.191336] pci 0001:01:00.0: ignoring class b20 (doesn't match
header type 01)"
Regards,
Leon.
U-Boot 1.3.4 (Sep 4 2008 - 14:28:00)
CPU: 8536E, Version: 1.0, (0x803f0090)
Core: E500, Version: 3.0, (0x80210030)
Clock Configuration:
CPU:1250 MHz, CCB: 500 MHz,
DDR: 250 MHz (500 MT/s data rate), LBC: 31 MHz
L1: D-cache 32 kB enabled
I-cache 32 kB enabled
Board: MPC8536DS, System ID: 0x15, System Version: 0x10, FPGA Version: 0x13
I2C: ready
DRAM: Initializing.... DDR: 512 MB
FLASH: 128 MB
L2: 512 KB enabled
Invalid ID (ff ff ff ff)
PCIE3 connected to Slot3 as Root Complex (base address ffe0b000)
PCIE3 on bus 00 - 00
PCIE1 connected to Slot1 as Root Complex (base address ffe0a000)
Scanning PCI bus 02
02 00 1172 0004 ff00 00
PCIE1 on bus 01 - 02
PCIE2 connected to Slot 2 as Root Complex (base address ffe09000)
PCIE2 on bus 03 - 03
PCI: 32 bit, 66 MHz, async, host, arbiter (base address ffe08000)
Scanning PCI bus 04
PCI on bus 04 - 04
----
## Booting kernel from Legacy Image at 01000000 ...
Image Name: Angstrom/2.6.30/calamari
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 3371458 Bytes = 3.2 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
## Flattened Device Tree blob at 00c00000
Booting using the fdt blob at 0xc00000
Loading Device Tree to 007fa000, end 007fffff ... OK
[ 0.000000] Using MPC8536 DS machine description
[ 0.000000] Memory CAM mapping: 256/256/0 Mb, residual: 0Mb
[ 0.000000] Linux version 2.6.30 (leon@bigtee) (gcc version 4.3.3
(GCC) ) #8 PREEMPT Mon Sep 7 11:20:17 CEST 2009
[ 0.000000] console [udbg0] enabled
setup_arch: bootmem
mpc8536_ds_setup_arch()
[ 0.000000] Found FSL PCI host bridge at 0x00000000ffe08000.
Firmware bus number: 0->0
[ 0.000000] PCI host bridge /pci@ffe08000 (primary) ranges:
[ 0.000000] MEM 0x0000000080000000..0x000000008fffffff ->
0x0000000080000000
[ 0.000000] IO 0x00000000ffc00000..0x00000000ffc0ffff -> 0x0000000000000000
[ 0.000000] Found FSL PCI host bridge at 0x00000000ffe09000.
Firmware bus number: 0->0
[ 0.000000] PCI host bridge /pcie@ffe09000 ranges:
[ 0.000000] MEM 0x0000000098000000..0x000000009fffffff ->
0x0000000098000000
[ 0.000000] IO 0x00000000ffc20000..0x00000000ffc2ffff -> 0x0000000000000000
[ 0.000000] Found FSL PCI host bridge at 0x00000000ffe0a000.
Firmware bus number: 0->1
[ 0.000000] PCI host bridge /pcie@ffe0a000 ranges:
[ 0.000000] MEM 0x0000000090000000..0x0000000097ffffff ->
0x0000000090000000
[ 0.000000] IO 0x00000000ffc10000..0x00000000ffc1ffff -> 0x0000000000000000
[ 0.000000] Found FSL PCI host bridge at 0x00000000ffe0b000.
Firmware bus number: 0->0
[ 0.000000] PCI host bridge /pcie@ffe0b000 ranges:
[ 0.000000] MEM 0x00000000a0000000..0x00000000bfffffff ->
0x00000000a0000000
[ 0.000000] IO 0x00000000ffc30000..0x00000000ffc3ffff -> 0x0000000000000000
[ 0.000000] MPC8536 DS board from Freescale Semiconductor
arch: exit
[ 0.000000] Zone PFN ranges:
[ 0.000000] DMA 0x00000000 -> 0x00020000
[ 0.000000] Normal 0x00020000 -> 0x00020000
[ 0.000000] HighMem 0x00020000 -> 0x00020000
[ 0.000000] Movable zone start PFN for each node
[ 0.000000] early_node_map[1] active PFN ranges
[ 0.000000] 0: 0x00000000 -> 0x00020000
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on.
Total pages: 130048
[ 0.000000] Kernel command line: root=/dev/nfs rw
nfsroot=172.16.0.50:/nfsroot/calamari
ip=172.16.0.36:172.16.0.50:192.168.1.1:255.255.0.0:unknown:eth0:off
console=ttyS0,115200
[ 0.000000] NR_IRQS:512
[ 0.000000] mpic: Setting up MPIC " OpenPIC " version 1.2 at
ffe40000, max 1 CPUs
[ 0.000000] mpic: ISU size: 256, shift: 8, mask: ff
[ 0.000000] mpic: Initializing for 256 sources
[ 0.000000] PID hash table entries: 2048 (order: 11, 8192 bytes)
[ 0.000000] clocksource: timebase mult[400029f] shift[22] registered
[ 0.006332] Console: colour dummy device 80x25
[ 0.011069] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.018467] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.050445] Memory: 512128k/524288k available (6664k kernel code,
11780k reserved, 232k data, 284k bss, 196k init)
[ 0.060689] Kernel virtual memory layout:
[ 0.064673] * 0xfffef000..0xfffff000 : fixmap
[ 0.069271] * 0xff800000..0xffc00000 : highmem PTEs
[ 0.074388] * 0xff7b0000..0xff800000 : early ioremap
[ 0.079591] * 0xe1000000..0xff7b0000 : vmalloc & ioremap
[ 0.085184] SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0,
CPUs=1, Nodes=1
[ 0.092778] Calibrating delay loop... 124.92 BogoMIPS (lpj=249856)
[ 0.171324] Mount-cache hash table entries: 512
[ 0.176820] net_namespace: 752 bytes
[ 0.180596] NET: Registered protocol family 16
[ 0.187381] PCI: Probing PCI hardware
[ 0.191336] pci 0001:01:00.0: ignoring class b20 (doesn't match
header type 01)
[ 0.198586] pci 0001:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.205138] pci 0001:01:00.0: PME# disabled
[ 0.209614] pci 0002:03:00.0: ignoring class b20 (doesn't match
header type 01)
[ 0.216865] pci 0002:03:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.223446] pci 0002:03:00.0: PME# disabled
[ 0.227902] pci 0003:05:00.0: ignoring class b20 (doesn't match
header type 01)
[ 0.235152] pci 0003:05:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 0.241707] pci 0003:05:00.0: PME# disabled
[ 0.246128] pci 0001:01:00.0: PCI bridge, secondary bus 0001:02
[ 0.251951] pci 0001:01:00.0: IO window: 0x00-0xffff
[ 0.257073] pci 0001:01:00.0: MEM window: 0x98000000-0x9fffffff
[ 0.263133] pci 0001:01:00.0: PREFETCH window: disabled
[ 0.268513] pci 0001:01:00.0: enabling device (0106 -> 0107)
[ 0.274148] pci 0002:03:00.0: PCI bridge, secondary bus 0002:04
[ 0.280043] pci 0002:03:00.0: IO window: 0x00-0xffff
[ 0.285160] pci 0002:03:00.0: MEM window: 0x90000000-0x97ffffff
[ 0.291230] pci 0002:03:00.0: PREFETCH window: disabled
[ 0.296608] pci 0002:03:00.0: enabling device (0106 -> 0107)
[ 0.302245] pci 0003:05:00.0: PCI bridge, secondary bus 0003:06
[ 0.308141] pci 0003:05:00.0: IO window: 0x00-0xffff
[ 0.313258] pci 0003:05:00.0: MEM window: 0xa0000000-0xbfffffff
[ 0.319327] pci 0003:05:00.0: PREFETCH window: disabled
[ 0.324706] pci 0003:05:00.0: enabling device (0106 -> 0107)
[ 0.336862] bio: create slab <bio-0> at 0
[ 0.341276] SCSI subsystem initialized
[ 0.345356] usbcore: registered new interface driver usbfs
[ 0.351197] usbcore: registered new interface driver hub
[ 0.356496] usbcore: registered new device driver usb
[ 0.361656] Freescale Elo / Elo Plus DMA driver
[ 0.367229] NET: Registered protocol family 2
[ 0.371632] IP route cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.379059] TCP established hash table entries: 65536 (order: 7,
524288 bytes)
[ 0.386958] TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.393860] TCP: Hash tables configured (established 65536 bind 65536)
[ 0.400287] TCP reno registered
[ 0.403556] NET: Registered protocol family 1
[ 0.408727] fsl-elo-dma ffe21300.dma: Probe the Freescale DMA
driver for fsl,eloplus-dma controller at 0xffe21300...
[ 0.419197] fsl-elo-dma ffe21300.dma: #0 (fsl,eloplus-dma-channel), irq 20
[ 0.426047] fsl-elo-dma ffe21300.dma: #1 (fsl,eloplus-dma-channel), irq 21
[ 0.432881] fsl-elo-dma ffe21300.dma: #2 (fsl,eloplus-dma-channel), irq 22
[ 0.439732] fsl-elo-dma ffe21300.dma: #3 (fsl,eloplus-dma-channel), irq 23
[ 0.451662] Freescale PowerQUICC MII Bus: probed
[ 0.456647] Freescale PowerQUICC MII Bus: probed
[ 0.462282] audit: initializing netlink socket (disabled)
[ 0.467626] type=2000 audit(0.376:1): initialized
[ 0.477863] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.484236] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
[ 0.490645] NTFS driver 2.1.29 [Flags: R/O].
[ 0.495260] SGI XFS with security attributes, large block/inode
numbers, no debug enabled
[ 0.504931] Btrfs loaded
[ 0.507372] msgmni has been set to 1000
[ 0.511706] alg: No test for stdrng (krng)
[ 0.515733] io scheduler noop registered
[ 0.519610] io scheduler anticipatory registered
[ 0.524231] io scheduler deadline registered
[ 0.528488] io scheduler cfq registered (default)
[ 0.611967] Generic non-volatile memory driver v1.1
[ 0.616877] Serial: 8250/16550 driver, 2 ports, IRQ sharing enabled
[ 0.623834] serial8250.0: ttyS0 at MMIO 0xffe04500 (irq = 42) is a 16550A
[ 0.630536] console handover: boot [udbg0] -> real [ttyS0]
[ 0.636419] serial8250.0: ttyS1 at MMIO 0xffe04600 (irq = 42) is a 16550A
[ 0.646072] brd: module loaded
[ 0.650436] loop: module loaded
[ 0.653696] nbd: registered device at major 43
[ 0.661260] st: Version 20081215, fixed bufsize 32768, s/g segs 256
[ 0.667812] Driver 'st' needs updating - please use bus_type methods
[ 0.674279] Driver 'sd' needs updating - please use bus_type methods
[ 0.680688] Driver 'sr' needs updating - please use bus_type methods
[ 0.687282] fsl-sata ffe18000.sata: Sata FSL Platform/CSB Driver init
[ 0.693869] scsi0 : sata_fsl
[ 0.696988] ata1: SATA max UDMA/133 irq 74
[ 0.701102] fsl-sata ffe19000.sata: Sata FSL Platform/CSB Driver init
[ 0.707641] scsi1 : sata_fsl
[ 0.710724] ata2: SATA max UDMA/133 irq 41
[ 0.715006] e1000e: Intel(R) PRO/1000 Network Driver - 0.3.3.4-k4
[ 0.721106] e1000e: Copyright (c) 1999-2008 Intel Corporation.
[ 0.727546] eth0: Gianfar Ethernet Controller Version 1.2, 00:04:9f:00:c4:a1
[ 0.734594] eth0: Running with NAPI enabled
[ 0.738767] eth0: 256/256 RX/TX BD ring size
[ 0.743526] eth1: Gianfar Ethernet Controller Version 1.2, 00:04:9f:00:c4:a2
[ 0.750574] eth1: Running with NAPI enabled
[ 0.754748] eth1: 256/256 RX/TX BD ring size
[ 0.759077] ucc_geth: QE UCC Gigabit Ethernet Controller
[ 0.765449] Fixed MDIO Bus: probed
[ 0.769709] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 0.776255] fsl-ehci fsl-ehci.0: Freescale On-Chip EHCI Host Controller
[ 0.783109] fsl-ehci fsl-ehci.0: new USB bus registered, assigned
bus number 1
[ 0.811509] fsl-ehci fsl-ehci.0: irq 28, io base 0xffe22000
[ 0.827496] fsl-ehci fsl-ehci.0: USB 2.0 started, EHCI 1.00
[ 0.833269] usb usb1: configuration #1 chosen from 1 choice
[ 0.838931] hub 1-0:1.0: USB hub found
[ 0.842690] hub 1-0:1.0: 1 port detected
[ 0.847066] fsl-ehci fsl-ehci.1: Freescale On-Chip EHCI Host Controller
[ 0.853886] fsl-ehci fsl-ehci.1: new USB bus registered, assigned
bus number 2
[ 0.883506] fsl-ehci fsl-ehci.1: irq 46, io base 0xffe23000
[ 0.899497] fsl-ehci fsl-ehci.1: USB 2.0 started, EHCI 1.00
[ 0.905241] usb usb2: configuration #1 chosen from 1 choice
[ 0.910897] hub 2-0:1.0: USB hub found
[ 0.914655] hub 2-0:1.0: 1 port detected
[ 0.919146] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 0.925479] Initializing USB Mass Storage driver...
[ 0.930466] usbcore: registered new interface driver usb-storage
[ 0.936469] USB Mass Storage support registered.
[ 0.941760] EDAC MC: Ver: 2.1.0 Aug 4 2009
[ 0.946107] Freescale(R) MPC85xx EDAC driver, (C) 2006 Montavista Software
[ 0.953099] mpc85xx_mc_err_probe: No ECC DIMMs discovered
[ 0.958906] EDAC DEVICE0: Giving out device to module
'MPC85xx_edac' controller 'mpc85xx_l2_err': DEV 'mpc85xx_l2_err'
(INTERRUPT)
[ 0.970688] MPC85xx_edac acquired irq 18 for L2 Err
[ 0.975560] MPC85xx_edac L2 err registered
[ 0.980112] talitos ffe30000.crypto: hwrng
[ 0.984240] alg: No test for authenc(hmac(sha1),cbc(aes))
(authenc-hmac-sha1-cbc-aes-talitos)
[ 0.992786] talitos ffe30000.crypto: authenc-hmac-sha1-cbc-aes-talitos
[ 0.999329] alg: No test for authenc(hmac(sha1),cbc(des3_ede))
(authenc-hmac-sha1-cbc-3des-talitos)
[ 1.008402] talitos ffe30000.crypto: authenc-hmac-sha1-cbc-3des-talitos
[ 1.015033] alg: No test for authenc(hmac(sha256),cbc(aes))
(authenc-hmac-sha256-cbc-aes-talitos)
[ 1.023931] talitos ffe30000.crypto: authenc-hmac-sha256-cbc-aes-talitos
[ 1.030649] alg: No test for authenc(hmac(sha256),cbc(des3_ede))
(authenc-hmac-sha256-cbc-3des-talitos)
[ 1.040061] talitos ffe30000.crypto: authenc-hmac-sha256-cbc-3des-talitos
[ 1.046864] alg: No test for authenc(hmac(md5),cbc(aes))
(authenc-hmac-md5-cbc-aes-talitos)
[ 1.055225] talitos ffe30000.crypto: authenc-hmac-md5-cbc-aes-talitos
[ 1.061672] ata2: Signature Update detected @ 0 msecs
[ 1.066737] alg: No test for authenc(hmac(md5),cbc(des3_ede))
(authenc-hmac-md5-cbc-3des-talitos)
[ 1.075615] talitos ffe30000.crypto: authenc-hmac-md5-cbc-3des-talitos
[ 1.083369] usbcore: registered new interface driver usbhid
[ 1.088943] usbhid: v2.6:USB HID core driver
[ 1.093303] Advanced Linux Sound Architecture Driver Version 1.0.20.
[ 1.099900] ALSA device list:
[ 1.102856] No soundcards found.
[ 1.107018] IPv4 over IPv4 tunneling driver
[ 1.111731] GRE over IPv4 tunneling driver
[ 1.116341] TCP cubic registered
[ 1.119566] Initializing XFRM netlink socket
[ 1.124268] NET: Registered protocol family 10
[ 1.132089] IPv6 over IPv4 tunneling driver
[ 1.137522] NET: Registered protocol family 17
[ 1.142259] RPC: Registered udp transport module.
[ 1.146971] RPC: Registered tcp transport module.
[ 1.152190] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
[ 1.247505] ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 1.253884] ata2.00: ATA-7: INTEL SSDSA2MH080G1GC, 045C8820, max UDMA/133
[ 1.260664] ata2.00: 156301488 sectors, multi 1: LBA48 NCQ (depth 16/31)
[ 1.267616] ata2.00: configured for UDMA/133
[ 1.563498] ata1: Signature Update detected @ 504 msecs
[ 1.660764] ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 1.739502] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 1.746512] ata1.00: ATA-7: Hitachi HDS721616PLA380, P22OABEA, max UDMA/133
[ 1.753467] ata1.00: 312581808 sectors, multi 0: LBA48 NCQ (depth 16/32)
[ 1.761208] ata1.00: configured for UDMA/133
[ 1.779645] scsi 0:0:0:0: Direct-Access ATA Hitachi
HDS72161 P22O PQ: 0 ANSI: 5
[ 1.788305] sd 0:0:0:0: Attached scsi generic sg0 type 0
[ 1.793734] scsi 1:0:0:0: Direct-Access ATA INTEL
SSDSA2MH08 045C PQ: 0 ANSI: 5
[ 1.801954] sd 0:0:0:0: [sda] 312581808 512-byte hardware sectors:
(160 GB/149 GiB)
[ 1.809650] sd 0:0:0:0: [sda] Write Protect is off
[ 1.814493] sd 0:0:0:0: [sda] Write cache: enabled, read cache:
enabled, doesn't support DPO or FUA
[ 1.823733] sda:<5>sd 1:0:0:0: [sdb] 156301488 512-byte hardware
sectors: (80.0 GB/74.5 GiB)
[ 1.832826] sd 1:0:0:0: [sdb] Write Protect is off
[ 1.837669] sd 1:0:0:0: [sdb] Write cache: enabled, read cache:
enabled, doesn't support DPO or FUA
[ 1.846735] sda1 sda2 sda3 sda4 <<6> sdb:<5>sd 1:0:0:0: Attached
scsi generic sg1 type 0
[ 1.855280] sdb1
[ 1.857547] sd 1:0:0:0: [sdb] Attached SCSI disk
[ 1.862182] sda5 sda6 >
[ 1.876940] sd 0:0:0:0: [sda] Attached SCSI disk
[ 2.667563] IP-Config: Gateway not on directly connected network.
[ 2.673720] Looking up port of RPC 100003/2 on 172.16.0.50
[ 10.521736] PHY: mdio@ffe24520:01 - Link is Up - 1000/Full
[ 10.527551] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 17.679851] Looking up port of RPC 100005/1 on 172.16.0.50
[ 17.714609] VFS: Mounted root (nfs filesystem) on device 0:14.
[ 17.720478] Freeing unused kernel memory: 196k init
INIT: version 2.86 booting
--
Leon
[-- Attachment #2: .config --]
[-- Type: application/octet-stream, Size: 45174 bytes --]
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.30
# Tue Aug 4 18:08:02 2009
#
# CONFIG_PPC64 is not set
#
# Processor support
#
# CONFIG_6xx is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_E200 is not set
CONFIG_E500=y
# CONFIG_PPC_E500MC is not set
CONFIG_BOOKE=y
CONFIG_FSL_BOOKE=y
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_PHYS_64BIT is not set
CONFIG_SPE=y
CONFIG_PPC_MMU_NOHASH=y
CONFIG_PPC_BOOK3E_MMU=y
# CONFIG_PPC_MM_SLICES is not set
# CONFIG_SMP is not set
CONFIG_PPC32=y
CONFIG_WORD_SIZE=32
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
CONFIG_MMU=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_HARDIRQS=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_IRQ_PER_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
CONFIG_PPC=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_NVRAM=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_PPC_OF=y
CONFIG_OF=y
CONFIG_PPC_UDBG_16550=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_AUDIT_ARCH=y
CONFIG_GENERIC_BUG=y
CONFIG_DTC=y
CONFIG_DEFAULT_UIMAGE=y
# CONFIG_PPC_DCR_NATIVE is not set
# CONFIG_PPC_DCR_MMIO is not set
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
CONFIG_AUDIT=y
# CONFIG_AUDITSYSCALL is not set
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=17
CONFIG_GROUP_SCHED=y
# CONFIG_FAIR_GROUP_SCHED is not set
# CONFIG_RT_GROUP_SCHED is not set
CONFIG_USER_SCHED=y
# CONFIG_CGROUP_SCHED is not set
# CONFIG_CGROUPS is not set
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_PCI_QUIRKS=y
CONFIG_SLUB_DEBUG=y
CONFIG_COMPAT_BRK=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_CLK=y
# CONFIG_SLOW_WORK is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
CONFIG_LBD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
# CONFIG_FREEZER is not set
CONFIG_PPC_MSI_BITMAP=y
#
# Platform support
#
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PQ2ADS is not set
CONFIG_MPC85xx=y
CONFIG_MPC8540_ADS=y
CONFIG_MPC8560_ADS=y
CONFIG_MPC85xx_CDS=y
CONFIG_MPC85xx_MDS=y
CONFIG_MPC8536_DS=y
CONFIG_MPC85xx_DS=y
CONFIG_SOCRATES=y
CONFIG_KSI8560=y
CONFIG_STX_GP3=y
CONFIG_TQM8540=y
CONFIG_TQM8541=y
CONFIG_TQM8548=y
CONFIG_TQM8555=y
CONFIG_TQM8560=y
CONFIG_SBC8548=y
# CONFIG_SBC8560 is not set
CONFIG_TQM85xx=y
# CONFIG_IPIC is not set
CONFIG_MPIC=y
# CONFIG_MPIC_WEIRD is not set
CONFIG_PPC_I8259=y
# CONFIG_PPC_RTAS is not set
# CONFIG_MMIO_NVRAM is not set
# CONFIG_PPC_MPC106 is not set
# CONFIG_PPC_970_NAP is not set
# CONFIG_PPC_INDIRECT_IO is not set
# CONFIG_GENERIC_IOMAP is not set
CONFIG_CPU_FREQ=y
# CONFIG_CPU_FREQ_DEBUG is not set
# CONFIG_CPU_FREQ_STAT is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
CONFIG_CPU_FREQ_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
#
# CPU Frequency drivers
#
CONFIG_QUICC_ENGINE=y
CONFIG_QE_GPIO=y
CONFIG_CPM2=y
CONFIG_FSL_ULI1575=y
CONFIG_CPM=y
CONFIG_MPC8xxx_GPIO=y
# CONFIG_SIMPLE_GPIO is not set
#
# Kernel options
#
CONFIG_HIGHMEM=y
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_BINFMT_ELF=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_HAVE_AOUT is not set
CONFIG_BINFMT_MISC=m
CONFIG_MATH_EMULATION=y
# CONFIG_IOMMU_HELPER is not set
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_UNEVICTABLE_LRU=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_PPC_4K_PAGES=y
# CONFIG_PPC_16K_PAGES is not set
# CONFIG_PPC_64K_PAGES is not set
# CONFIG_PPC_256K_PAGES is not set
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
CONFIG_EXTRA_TARGETS=""
CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
# CONFIG_SECCOMP is not set
CONFIG_ISA_DMA_API=y
#
# Bus options
#
CONFIG_ZONE_DMA=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_FSL_SOC=y
CONFIG_FSL_PCI=y
CONFIG_PPC_PCI_CHOICE=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_SYSCALL=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIEAER=y
# CONFIG_PCIEASPM is not set
CONFIG_ARCH_SUPPORTS_MSI=y
CONFIG_PCI_MSI=y
# CONFIG_PCI_LEGACY is not set
CONFIG_PCI_DEBUG=y
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
# CONFIG_HAS_RAPIDIO is not set
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LOWMEM_CAM_NUM=3
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_PHYSICAL_START=0x00000000
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_TASK_SIZE=0xc0000000
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=y
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
CONFIG_NET_KEY=m
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_ASK_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NET_IPIP=y
CONFIG_NET_IPGRE=y
CONFIG_NET_IPGRE_BROADCAST=y
CONFIG_IP_MROUTE=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_ARPD=y
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
CONFIG_INET_TUNNEL=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
CONFIG_IPV6=y
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_IPV6_ROUTER_PREF is not set
# CONFIG_IPV6_OPTIMISTIC_DAD is not set
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_IPV6_MIP6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_XFRM_MODE_TRANSPORT=y
CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=y
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
CONFIG_IP_SCTP=m
# CONFIG_SCTP_DBG_MSG is not set
# CONFIG_SCTP_DBG_OBJCNT is not set
# CONFIG_SCTP_HMAC_NONE is not set
# CONFIG_SCTP_HMAC_SHA1 is not set
CONFIG_SCTP_HMAC_MD5=y
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_LIB80211 is not set
# CONFIG_MAC80211 is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
CONFIG_OF_DEVICE=y
CONFIG_OF_GPIO=y
CONFIG_OF_I2C=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=y
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=131072
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set
# CONFIG_ISL29003 is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
CONFIG_EEPROM_LEGACY=y
# CONFIG_EEPROM_93CX6 is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_CHR_DEV_SG=y
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_CONSTANTS is not set
CONFIG_SCSI_LOGGING=y
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_CXGB3_ISCSI is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_MPT2SAS is not set
# CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_LIBFC is not set
# CONFIG_LIBFCOE is not set
# CONFIG_FCOE is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLA_FC is not set
# CONFIG_SCSI_QLA_ISCSI is not set
# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_SRP is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
CONFIG_SATA_PMP=y
CONFIG_SATA_AHCI=y
# CONFIG_SATA_SIL24 is not set
CONFIG_SATA_FSL=y
CONFIG_ATA_SFF=y
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_MV is not set
# CONFIG_SATA_NV is not set
# CONFIG_PDC_ADMA is not set
# CONFIG_SATA_QSTOR is not set
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_SATA_VITESSE is not set
# CONFIG_SATA_INIC162X is not set
CONFIG_PATA_ALI=y
# CONFIG_PATA_AMD is not set
# CONFIG_PATA_ARTOP is not set
# CONFIG_PATA_ATIIXP is not set
# CONFIG_PATA_CMD640_PCI is not set
# CONFIG_PATA_CMD64X is not set
# CONFIG_PATA_CS5520 is not set
# CONFIG_PATA_CS5530 is not set
# CONFIG_PATA_CYPRESS is not set
# CONFIG_PATA_EFAR is not set
# CONFIG_ATA_GENERIC is not set
# CONFIG_PATA_HPT366 is not set
# CONFIG_PATA_HPT37X is not set
# CONFIG_PATA_HPT3X2N is not set
# CONFIG_PATA_HPT3X3 is not set
# CONFIG_PATA_IT821X is not set
# CONFIG_PATA_IT8213 is not set
# CONFIG_PATA_JMICRON is not set
# CONFIG_PATA_TRIFLEX is not set
# CONFIG_PATA_MARVELL is not set
# CONFIG_PATA_MPIIX is not set
# CONFIG_PATA_OLDPIIX is not set
# CONFIG_PATA_NETCELL is not set
# CONFIG_PATA_NINJA32 is not set
# CONFIG_PATA_NS87410 is not set
# CONFIG_PATA_NS87415 is not set
# CONFIG_PATA_OPTI is not set
# CONFIG_PATA_OPTIDMA is not set
# CONFIG_PATA_PDC_OLD is not set
# CONFIG_PATA_RADISYS is not set
# CONFIG_PATA_RZ1000 is not set
# CONFIG_PATA_SC1200 is not set
# CONFIG_PATA_SERVERWORKS is not set
# CONFIG_PATA_PDC2027X is not set
# CONFIG_PATA_SIL680 is not set
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
# CONFIG_PATA_SCH is not set
# CONFIG_MD is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# Enable only one of the two stacks, unless you know what you are doing
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_NETDEVICES=y
CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_DUMMY=y
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
# CONFIG_ARCNET is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
CONFIG_CICADA_PHY=y
CONFIG_VITESSE_PHY=y
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
CONFIG_FIXED_PHY=y
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_ETHOC is not set
# CONFIG_DNET is not set
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
# CONFIG_ATL2 is not set
CONFIG_FS_ENET=y
CONFIG_FS_ENET_HAS_SCC=y
CONFIG_FS_ENET_HAS_FCC=y
# CONFIG_FS_ENET_MDIO_FCC is not set
CONFIG_NETDEV_1000=y
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
CONFIG_E1000E=y
# CONFIG_IP1000 is not set
# CONFIG_IGB is not set
# CONFIG_IGBVF is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
CONFIG_FSL_PQ_MDIO=y
CONFIG_GIANFAR=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_MAGIC_PACKET is not set
# CONFIG_UGETH_TX_ON_DEMAND is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
# CONFIG_ATL1E is not set
# CONFIG_ATL1C is not set
# CONFIG_JME is not set
CONFIG_NETDEV_10000=y
# CONFIG_CHELSIO_T1 is not set
CONFIG_CHELSIO_T3_DEPENDS=y
# CONFIG_CHELSIO_T3 is not set
# CONFIG_ENIC is not set
# CONFIG_IXGBE is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_VXGE is not set
# CONFIG_MYRI10GE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_NIU is not set
# CONFIG_MLX4_EN is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
# CONFIG_QLGE is not set
# CONFIG_SFC is not set
# CONFIG_BE2NET is not set
# CONFIG_TR is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
#
# USB Network Adapters
#
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NET_FC is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_SERIO_XILINX_XPS_PS2 is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_NR_UARTS=2
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_CPM is not set
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_SERIAL_QE=m
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_HVC_UDBG is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
CONFIG_NVRAM=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_CHARDEV is not set
CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_CPM=m
# CONFIG_I2C_GPIO is not set
CONFIG_I2C_MPC=y
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_SIMTEC is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set
#
# Graphics adapter I2C/DDC channel drivers
#
# CONFIG_I2C_VOODOO3 is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
#
# Memory mapped GPIO expanders:
#
# CONFIG_GPIO_XILINX is not set
#
# I2C GPIO expanders:
#
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
#
# PCI GPIO expanders:
#
# CONFIG_GPIO_BT8XX is not set
#
# SPI GPIO expanders:
#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_UCB1400_CORE is not set
# CONFIG_TPS65010 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
CONFIG_DVB_CORE=m
CONFIG_VIDEO_MEDIA=m
#
# Multimedia drivers
#
# CONFIG_MEDIA_ATTACH is not set
CONFIG_MEDIA_TUNER=m
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
CONFIG_MEDIA_TUNER_SIMPLE=m
CONFIG_MEDIA_TUNER_TDA8290=m
CONFIG_MEDIA_TUNER_TDA9887=m
CONFIG_MEDIA_TUNER_TEA5761=m
CONFIG_MEDIA_TUNER_TEA5767=m
CONFIG_MEDIA_TUNER_MT20XX=m
CONFIG_MEDIA_TUNER_XC2028=m
CONFIG_MEDIA_TUNER_XC5000=m
CONFIG_MEDIA_TUNER_MC44S803=m
# CONFIG_DVB_DYNAMIC_MINORS is not set
CONFIG_DVB_CAPTURE_DRIVERS=y
#
# Supported SAA7146 based PCI Adapters
#
# CONFIG_TTPCI_EEPROM is not set
# CONFIG_DVB_BUDGET_CORE is not set
#
# Supported USB Adapters
#
# CONFIG_DVB_USB is not set
# CONFIG_DVB_TTUSB_BUDGET is not set
# CONFIG_DVB_TTUSB_DEC is not set
# CONFIG_DVB_SIANO_SMS1XXX is not set
#
# Supported FlexCopII (B2C2) Adapters
#
# CONFIG_DVB_B2C2_FLEXCOP is not set
#
# Supported BT878 Adapters
#
#
# Supported Pluto2 Adapters
#
# CONFIG_DVB_PLUTO2 is not set
#
# Supported SDMC DM1105 Adapters
#
# CONFIG_DVB_DM1105 is not set
#
# Supported DVB Frontends
#
# CONFIG_DVB_FE_CUSTOMISE is not set
CONFIG_DAB=y
# CONFIG_USB_DABUSB is not set
#
# Graphics support
#
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=y
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
#
CONFIG_VGA_CONSOLE=y
# CONFIG_VGACON_SOFT_SCROLLBACK is not set
CONFIG_DUMMY_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
# CONFIG_SND_SEQUENCER is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
CONFIG_SND_PCM_OSS_PLUGINS=y
# CONFIG_SND_HRTIMER is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
# CONFIG_SND_SUPPORT_OLD_API is not set
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
CONFIG_SND_VMASTER=y
CONFIG_SND_AC97_CODEC=y
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
# CONFIG_SND_AC97_POWER_SAVE is not set
CONFIG_SND_PCI=y
# CONFIG_SND_AD1889 is not set
# CONFIG_SND_ALS300 is not set
# CONFIG_SND_ALS4000 is not set
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_ATIIXP is not set
# CONFIG_SND_ATIIXP_MODEM is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
# CONFIG_SND_AW2 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
# CONFIG_SND_OXYGEN is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_CS5530 is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_GINA20 is not set
# CONFIG_SND_LAYLA20 is not set
# CONFIG_SND_DARLA24 is not set
# CONFIG_SND_GINA24 is not set
# CONFIG_SND_LAYLA24 is not set
# CONFIG_SND_MONA is not set
# CONFIG_SND_MIA is not set
# CONFIG_SND_ECHO3G is not set
# CONFIG_SND_INDIGO is not set
# CONFIG_SND_INDIGOIO is not set
# CONFIG_SND_INDIGODJ is not set
# CONFIG_SND_INDIGOIOX is not set
# CONFIG_SND_INDIGODJX is not set
# CONFIG_SND_EMU10K1 is not set
# CONFIG_SND_EMU10K1X is not set
# CONFIG_SND_ENS1370 is not set
# CONFIG_SND_ENS1371 is not set
# CONFIG_SND_ES1938 is not set
# CONFIG_SND_ES1968 is not set
# CONFIG_SND_FM801 is not set
# CONFIG_SND_HDA_INTEL is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
# CONFIG_SND_HIFIER is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
CONFIG_SND_INTEL8X0=y
# CONFIG_SND_INTEL8X0M is not set
# CONFIG_SND_KORG1212 is not set
# CONFIG_SND_MAESTRO3 is not set
# CONFIG_SND_MIXART is not set
# CONFIG_SND_NM256 is not set
# CONFIG_SND_PCXHR is not set
# CONFIG_SND_RIPTIDE is not set
# CONFIG_SND_RME32 is not set
# CONFIG_SND_RME96 is not set
# CONFIG_SND_RME9652 is not set
# CONFIG_SND_SONICVIBES is not set
# CONFIG_SND_TRIDENT is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
# CONFIG_SND_VIRTUOSO is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set
CONFIG_SND_PPC=y
CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_USB_USX2Y is not set
# CONFIG_SND_USB_CAIAQ is not set
# CONFIG_SND_SOC is not set
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=y
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
# CONFIG_HIDRAW is not set
#
# USB Input Devices
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
#
# Special HID drivers
#
CONFIG_HID_A4TECH=y
CONFIG_HID_APPLE=y
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
CONFIG_HID_CHICONY=y
CONFIG_HID_CYPRESS=y
# CONFIG_DRAGONRISE_FF is not set
CONFIG_HID_EZKEY=y
# CONFIG_HID_KYE is not set
CONFIG_HID_GYRATION=y
# CONFIG_HID_KENSINGTON is not set
CONFIG_HID_LOGITECH=y
# CONFIG_LOGITECH_FF is not set
# CONFIG_LOGIRUMBLEPAD2_FF is not set
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MONTEREY=y
# CONFIG_HID_NTRIG is not set
CONFIG_HID_PANTHERLORD=y
# CONFIG_PANTHERLORD_FF is not set
CONFIG_HID_PETALYNX=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SONY=y
CONFIG_HID_SUNPLUS=y
# CONFIG_GREENASIA_FF is not set
# CONFIG_HID_TOPSEED is not set
CONFIG_THRUSTMASTER_FF=m
CONFIG_ZEROPLUS_FF=m
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_SUSPEND is not set
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
CONFIG_USB_MON=y
# CONFIG_USB_WUSB is not set
# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_EHCI_HCD_PPC_OF=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1760_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PPC_OF=y
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
CONFIG_USB_OHCI_HCD_PCI=y
CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_FHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_WHCI_HCD is not set
# CONFIG_USB_HWA_HCD is not set
# CONFIG_USB_MUSB_HDRC is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#
#
# also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_LIBUSUAL is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_BERRY_CHARGE is not set
# CONFIG_USB_LED is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_VST is not set
# CONFIG_USB_GADGET is not set
#
# OTG and related infrastructure
#
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_EDAC=y
#
# Reporting subsystems
#
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_MPC85XX=y
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
CONFIG_RTC_DRV_CMOS=y
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_GENERIC is not set
CONFIG_DMADEVICES=y
#
# DMA Devices
#
CONFIG_FSL_DMA=y
CONFIG_DMA_ENGINE=y
#
# DMA Clients
#
# CONFIG_NET_DMA is not set
# CONFIG_ASYNC_TX_DMA is not set
# CONFIG_DMATEST is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
CONFIG_XFS_FS=y
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
# CONFIG_XFS_DEBUG is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
CONFIG_BTRFS_FS=y
# CONFIG_BTRFS_FS_POSIX_ACL is not set
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# Caches
#
# CONFIG_FSCACHE is not set
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
CONFIG_UDF_NLS=y
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_NTFS_FS=y
# CONFIG_NTFS_DEBUG is not set
# CONFIG_NTFS_RW is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
CONFIG_MISC_FILESYSTEMS=y
CONFIG_ADFS_FS=m
# CONFIG_ADFS_FS_RW is not set
CONFIG_AFFS_FS=m
CONFIG_HFS_FS=m
CONFIG_HFSPLUS_FS=m
CONFIG_BEFS_FS=m
# CONFIG_BEFS_DEBUG is not set
CONFIG_BFS_FS=m
CONFIG_EFS_FS=m
CONFIG_CRAMFS=y
CONFIG_SQUASHFS=y
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
CONFIG_VXFS_FS=m
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
CONFIG_HPFS_FS=m
CONFIG_QNX4FS_FS=m
# CONFIG_ROMFS_FS is not set
CONFIG_SYSV_FS=m
CONFIG_UFS_FS=m
# CONFIG_UFS_FS_WRITE is not set
# CONFIG_UFS_DEBUG is not set
CONFIG_NILFS2_FS=y
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_V4 is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
CONFIG_NLS_UTF8=m
# CONFIG_DLM is not set
CONFIG_UCC_SLOW=y
CONFIG_UCC_FAST=y
CONFIG_UCC=y
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_HAVE_LMB=y
CONFIG_NLATTR=y
#
# Kernel hacking
#
CONFIG_PRINTK_TIME=y
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_HIGHMEM is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_DEBUG_PAGEALLOC is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_TRACING_SUPPORT=y
#
# Tracers
#
# CONFIG_FUNCTION_TRACER is not set
# CONFIG_PREEMPT_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
# CONFIG_EVENT_TRACER is not set
# CONFIG_BOOT_TRACER is not set
# CONFIG_TRACE_BRANCH_PROFILING is not set
# CONFIG_STACK_TRACER is not set
# CONFIG_KMEMTRACE is not set
# CONFIG_WORKQUEUE_TRACER is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
CONFIG_PRINT_STACK_DEPTH=64
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_CODE_PATCHING_SELFTEST is not set
# CONFIG_FTR_FIXUP_SELFTEST is not set
# CONFIG_MSI_BITMAP_SELFTEST is not set
# CONFIG_XMON is not set
# CONFIG_IRQSTACKS is not set
CONFIG_VIRQ_DEBUG=y
# CONFIG_BDI_SWITCH is not set
# CONFIG_PPC_EARLY_DEBUG is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_PCOMP=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
CONFIG_CRYPTO_WORKQUEUE=y
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_AUTHENC=y
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set
#
# Block modes
#
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
# CONFIG_CRYPTO_ECB is not set
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=m
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_ZLIB is not set
# CONFIG_CRYPTO_LZO is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
CONFIG_CRYPTO_DEV_TALITOS=y
CONFIG_PPC_CLOCK=y
CONFIG_PPC_LIB_RHEAP=y
CONFIG_VIRTUALIZATION=y
# CONFIG_KVM_E500 is not set
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_BALLOON is not set
^ permalink raw reply
* Re: MPC8536DS: u-boot detects PCIe card but Linux 2.6.30 does not.
From: Leon Woestenberg @ 2009-09-07 20:38 UTC (permalink / raw)
To: Linux PPC
In-Reply-To: <c384c5ea0909070401g30241826v89adda7aa0fb1d6d@mail.gmail.com>
Hello,
On Mon, Sep 7, 2009 at 1:01 PM, Leon
Woestenberg<leon.woestenberg@gmail.com> wrote:
> on my MPC8536DS development board, a PCIe card does not get detected
> by Linux, u-boot does list it.
>
> I'm suspecting the PCIe bridge (?) to not initialize correctly, but
> that is a wild guess. See the u-boot log and kernel boot log with PCI
>
It seems this might be a endpoint hardware issue where the PCIe hot
reset signal is ignored.
Investigating further.
Regards,
--
Leon
^ permalink raw reply
* Question about e300 core decrementer interrupt
From: Li Tao-B22598 @ 2009-09-08 5:48 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 703 bytes --]
Dear all,
I have a problem in MPC5121 sleep mode. As you know MPC5121 use e300c4
core. When I make the e300c4 core into sleep mode, it will return to
full power mode when the“decrementer interrupt” occurred.
But in the e300 core reference manual said that the “decrementer
interrupt”have no effect when e300 core in sleep mode, because the time
base and decrementer are disabled while the core is in sleep mode.
Can anybody explain about this procedure ?
Another question is how can I disable the“decrementer interrupt”without
disable int,smi, or mcpinternal signals.
Any help or suggestion would be very helpful.
Thank you for your time.
--
Best Regards,
Li Tao
[-- Attachment #2: Type: text/html, Size: 1178 bytes --]
^ permalink raw reply
* Queries regarding I2C and GPIO driver for Freescale MPC5121e in Linux 2.6.24 of BSP: MPC512xADS_20090603-ltib.iso
From: Uma Kanta Patro @ 2009-09-08 10:55 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1670 bytes --]
Hi all,
I am a newbie to the powerpc linux kernel, but I have worked
on some drivers in arm architecture. I am finding powerpc architecture to be
fully different than that.
I am working on Freescale MPC5121e with the BSP MPC512xADS_20090603-ltib.iso
running in it on the ADS512101 Rev4.1 development kit.
Can anyone help me in finding some documentation for understanding and
working on the powerpc kernel. Any links to the powerpc forums will also be
appreciable.
-> Currently I am going to develop an I2C client driver for one slave
microcontroller of our project.
I have some knowledge in the I2C client driver making(legacy style and new
style).
I made a basic I2C client driver to probe for the chip address and for
testing I gave it the chip address 0x68(I2C chip address of the M4T162 RTC,
present on the board).
But while inserting my driver I am getting failure message for the detection
of my chip.
So I would like to know what other formalities am I lagging in my I2C chip
driver.
-> Also I am in a need for the GPIO driver for my controller ot get
interrupt on ht estate change. When I searched in the kernel code I could
not find any procedure to do that, also I could not find out the procedure
to access either any GPIO pin macros or any register to remap with
ioremap(). So please guide me in finding the proper way to do the GPIO
accessing and interrupt registration.
Will the ioremap() work on powerpc arch? If yes where can I find the memory
mapping(register definitions) to use for my GPIO driver making.
Thanks for patience in reading my queries.
Any help is appreciable.
Thanks & Regards,
Uma
[-- Attachment #2: Type: text/html, Size: 4461 bytes --]
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Adam Zilkie @ 2009-09-08 18:01 UTC (permalink / raw)
To: phazarika; +Cc: Andrea Zypchen, linuxppc-dev, Tom Burns
In-Reply-To: <0CA0A16855646F4FA96D25A158E299D606F60795@SDCEXCHANGE01.ad.amcc.com>
Hi Prodyut,
Yes, I am using the 440EPx (same as the sequoia board).
Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus (using
the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on timing)
end up being partially corrupted when we try to parse the data in the
virtual page. We have confirmed the data is good before the PCI-IDE
bridge. We are creating two 8K pages and map them to physical DMA memory
using single-entry scatter/gather structs. When a DMA block is
corrupted, we see a random portion of it (always a multiple of 16byte
cache lines) is overwritten with old data from the last time the buffer
was used.
Regards,
Adam
On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> Hi Adam,
>
> > Are you sure there is L2 cache on the 440?
>
> It depends on the SoC you are using. SoC like 460EX (Canyonlands board)
> have L2Cache.
> It seems you are using a Sequoia board, which has a 440EPx SoC. 440EPx
> has a 440 cpu core, but no L2Cache.
> Could you please tell me which SoC you are using?
> You can also refer to the appropriate dts file to see if there is L2C.
> For example, in canyonlands.dts (460EX based board), we have the L2C
> entry.
> L2C0: l2c {
> ...
> }
>
> >I am seeing this problem with our custom IDE driver which is based on
> >pretty old code. Our driver uses pci_alloc_consistent() to allocate the
>
> >physical DMA memory and alloc_pages() to allocate a virtual page. It
> >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I
> >should convert these to the DMA API calls as you suggest.
>
> Could you give more details on the consistency problem? It is a good
> idea to change to the new DMA APIs, but pci_alloc_consistent() should
> work too
>
> Thanks
> Prodyut
>
> On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > Hi Adam,
> > >
> > > If you have a look in include/asm-ppc/pgtable.h for the following
> section:
> > > #ifdef CONFIG_44x
> > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> _PAGE_GUARDED)
> > > #else
> > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > #endif
> > >
> > > Try adding _PAGE_COHERENT to the appropriate line above and see if
> that
> > > fixes your issue - this causes the 'M' bit to be set on the page
> which
> > > sure enforce cache coherency. If it doesn't, you'll need to check
> the
> > > 'M' bit isn't being masked out in head_44x.S (it was originally
> masked
> > > out on arch/powerpc, but was fixed in later kernels when the cache
> > > coherency issues with non-SMP systems were resolved).
> >
> > I have some doubts about the usefulness of doing that for 4xx. AFAIK,
> > the 440 core just ignores M.
> >
> > The problem lies probably elsewhere. Maybe the L2 cache coherency
> isn't
> > enabled or not working ?
> >
> > The L1 cache on 440 is simply not coherent, so drivers have to make
> sure
> > they use the appropriate DMA APIs which will do cache flushing when
> > needed.
> >
> > Adam, what driver is causing you that sort of problems ?
> >
> > Cheers,
> > Ben.
> >
> >
--
Adam Zilkie
Software Designer,
International Datacasting Corp.
This message and the documents attached hereto are intended only for the addressee and may contain privileged or confidential information. Any unauthorized disclosure is strictly prohibited. If you have received this message in error, please notify us immediately so that we may correct our internal records. Please then delete the original message. Thank you.
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Prodyut Hazarika @ 2009-09-08 18:59 UTC (permalink / raw)
To: azilkie; +Cc: Andrea Zypchen, linuxppc-dev, Tom Burns
In-Reply-To: <1252432873.2548.41.camel@Adam>
Hi Adam,
> Yes, I am using the 440EPx (same as the sequoia board).=20
> Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus
(using
> the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on timing)
> end up being partially corrupted when we try to parse the data in the
> virtual page. We have confirmed the data is good before the PCI-IDE
> bridge. We are creating two 8K pages and map them to physical DMA
memory
> using single-entry scatter/gather structs. When a DMA block is
> corrupted, we see a random portion of it (always a multiple of 16byte
> cache lines) is overwritten with old data from the last time the
buffer
> was used.=20
This looks like a cache coherency problem.
Can you ensure that the TLB entries corresponding to the DMA region has
the CacheInhibit bit set.
You will need a BDI connected to your system.
Also, you will need to invalidate and flush the lines appropriately,
since in 440 cores,
L1Cache coherency is managed entirely by software.
Please look at drivers/net/ibm_newemac/mal.c and core.c for example on
how to do it.
Thanks
Prodyut
On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> Hi Adam,
>=20
> > Are you sure there is L2 cache on the 440?
>=20
> It depends on the SoC you are using. SoC like 460EX (Canyonlands
board)
> have L2Cache.
> It seems you are using a Sequoia board, which has a 440EPx SoC. 440EPx
> has a 440 cpu core, but no L2Cache.
> Could you please tell me which SoC you are using?
> You can also refer to the appropriate dts file to see if there is L2C.
> For example, in canyonlands.dts (460EX based board), we have the L2C
> entry.
> L2C0: l2c {
> ...
> }
>=20
> >I am seeing this problem with our custom IDE driver which is based on
> >pretty old code. Our driver uses pci_alloc_consistent() to allocate
the
>=20
> >physical DMA memory and alloc_pages() to allocate a virtual page. It=20
> >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I=20
> >should convert these to the DMA API calls as you suggest.
>=20
> Could you give more details on the consistency problem? It is a good
> idea to change to the new DMA APIs, but pci_alloc_consistent() should
> work too
>=20
> Thanks
> Prodyut=09
>=20
> On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > Hi Adam,
> > >=20
> > > If you have a look in include/asm-ppc/pgtable.h for the following
> section:
> > > #ifdef CONFIG_44x
> > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> _PAGE_GUARDED)
> > > #else
> > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > #endif
> > >=20
> > > Try adding _PAGE_COHERENT to the appropriate line above and see if
> that=20
> > > fixes your issue - this causes the 'M' bit to be set on the page
> which=20
> > > sure enforce cache coherency. If it doesn't, you'll need to check
> the=20
> > > 'M' bit isn't being masked out in head_44x.S (it was originally
> masked=20
> > > out on arch/powerpc, but was fixed in later kernels when the cache
> > > coherency issues with non-SMP systems were resolved).
> >=20
> > I have some doubts about the usefulness of doing that for 4xx.
AFAIK,
> > the 440 core just ignores M.
> >=20
> > The problem lies probably elsewhere. Maybe the L2 cache coherency
> isn't
> > enabled or not working ?
> >=20
> > The L1 cache on 440 is simply not coherent, so drivers have to make
> sure
> > they use the appropriate DMA APIs which will do cache flushing when
> > needed.
> >=20
> > Adam, what driver is causing you that sort of problems ?
> >=20
> > Cheers,
> > Ben.
> >=20
> >=20
--=20
Adam Zilkie
Software Designer,
International Datacasting Corp.
This message and the documents attached hereto are intended only for the
addressee and may contain privileged or confidential information. Any
unauthorized disclosure is strictly prohibited. If you have received
this message in error, please notify us immediately so that we may
correct our internal records. Please then delete the original message.
Thank you.
--------------------------------------------------------
CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, =
is for the sole use of the intended recipient(s) and contains =
information that is confidential and proprietary to AppliedMicro =
Corporation or its subsidiaries. It is to be used solely for the purpose =
of furthering the parties' business relationship. All unauthorized =
review, use, disclosure or distribution is prohibited. If you are not =
the intended recipient, please contact the sender by reply e-mail and =
destroy all copies of the original message.
^ permalink raw reply
* [PATCH] powerpc/85xx: Fix SMP compile error and allow NULL for smp_ops
From: Kumar Gala @ 2009-09-08 19:21 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
The following commit introduced a compile error since it removed
the implementation of smp_85xx_basic_setup:
commit 77c0a700c1c292edafa11c1e52821ce4636f81b0
Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Fri Aug 28 14:25:04 2009 +1000
powerpc: Properly start decrementer on BookE secondary CPUs
Make it so that smp_ops probe() and setup_cpu() can be set to NULL.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/smp.c | 10 +++++++---
arch/powerpc/platforms/85xx/smp.c | 13 +++----------
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 96f107c..d387b39 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -269,7 +269,10 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
cpu_callin_map[boot_cpuid] = 1;
if (smp_ops)
- max_cpus = smp_ops->probe();
+ if (smp_ops->probe)
+ max_cpus = smp_ops->probe();
+ else
+ max_cpus = NR_CPUS;
else
max_cpus = 1;
@@ -493,7 +496,8 @@ int __devinit start_secondary(void *unused)
preempt_disable();
cpu_callin_map[cpu] = 1;
- smp_ops->setup_cpu(cpu);
+ if (smp_ops->setup_cpu)
+ smp_ops->setup_cpu(cpu);
if (smp_ops->take_timebase)
smp_ops->take_timebase();
@@ -556,7 +560,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
old_mask = current->cpus_allowed;
set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid));
- if (smp_ops)
+ if (smp_ops && smp_ops->setup_cpu)
smp_ops->setup_cpu(boot_cpuid);
set_cpus_allowed(current, old_mask);
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 94f901d..d3cf357 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -85,28 +85,21 @@ smp_85xx_setup_cpu(int cpu_nr)
}
struct smp_ops_t smp_85xx_ops = {
+ .message_pass = NULL,
+ .probe = NULL,
.kick_cpu = smp_85xx_kick_cpu,
+ .setup_cpu = NULL,
};
-static int __init smp_dummy_probe(void)
-{
- return NR_CPUS;
-}
-
void __init mpc85xx_smp_init(void)
{
struct device_node *np;
- smp_85xx_ops.message_pass = NULL;
-
np = of_find_node_by_type(NULL, "open-pic");
if (np) {
smp_85xx_ops.probe = smp_mpic_probe;
smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
smp_85xx_ops.message_pass = smp_mpic_message_pass;
- } else {
- smp_85xx_ops.probe = smp_dummy_probe;
- smp_85xx_ops.setup_cpu = smp_85xx_basic_setup;
}
if (cpu_has_feature(CPU_FTR_DBELL))
--
1.6.0.6
^ permalink raw reply related
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Adam Zilkie @ 2009-09-08 19:30 UTC (permalink / raw)
To: phazarika; +Cc: Andrea Zypchen, linuxppc-dev, Tom Burns
In-Reply-To: <0CA0A16855646F4FA96D25A158E299D606F60B70@SDCEXCHANGE01.ad.amcc.com>
All,
We have found that using flush_dcache_range() after each DMA solves the
problem. Ideally, we'd like to be able to allocate the virtual page in
cache inhibited memory to avoid the performance loss from all the flush
calls. To do this, we'd have to change our TLB sizes and reserve a TLB
in memory as cache inhibited (using the 'I' bit). Will update if this
works as well. Thanks for your help in this.
Regards,
Adam
On Tue, 2009-09-08 at 11:59 -0700, Prodyut Hazarika wrote:
> Hi Adam,
>
> > Yes, I am using the 440EPx (same as the sequoia board).
> > Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus
> (using
> > the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on timing)
> > end up being partially corrupted when we try to parse the data in the
> > virtual page. We have confirmed the data is good before the PCI-IDE
> > bridge. We are creating two 8K pages and map them to physical DMA
> memory
> > using single-entry scatter/gather structs. When a DMA block is
> > corrupted, we see a random portion of it (always a multiple of 16byte
> > cache lines) is overwritten with old data from the last time the
> buffer
> > was used.
>
> This looks like a cache coherency problem.
> Can you ensure that the TLB entries corresponding to the DMA region has
> the CacheInhibit bit set.
> You will need a BDI connected to your system.
>
> Also, you will need to invalidate and flush the lines appropriately,
> since in 440 cores,
> L1Cache coherency is managed entirely by software.
> Please look at drivers/net/ibm_newemac/mal.c and core.c for example on
> how to do it.
>
> Thanks
> Prodyut
>
> On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> > Hi Adam,
> >
> > > Are you sure there is L2 cache on the 440?
> >
> > It depends on the SoC you are using. SoC like 460EX (Canyonlands
> board)
> > have L2Cache.
> > It seems you are using a Sequoia board, which has a 440EPx SoC. 440EPx
> > has a 440 cpu core, but no L2Cache.
> > Could you please tell me which SoC you are using?
> > You can also refer to the appropriate dts file to see if there is L2C.
> > For example, in canyonlands.dts (460EX based board), we have the L2C
> > entry.
> > L2C0: l2c {
> > ...
> > }
> >
> > >I am seeing this problem with our custom IDE driver which is based on
>
> > >pretty old code. Our driver uses pci_alloc_consistent() to allocate
> the
> >
> > >physical DMA memory and alloc_pages() to allocate a virtual page. It
> > >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I
> > >should convert these to the DMA API calls as you suggest.
> >
> > Could you give more details on the consistency problem? It is a good
> > idea to change to the new DMA APIs, but pci_alloc_consistent() should
> > work too
> >
> > Thanks
> > Prodyut
> >
> > On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > > Hi Adam,
> > > >
> > > > If you have a look in include/asm-ppc/pgtable.h for the following
> > section:
> > > > #ifdef CONFIG_44x
> > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> > _PAGE_GUARDED)
> > > > #else
> > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > > #endif
> > > >
> > > > Try adding _PAGE_COHERENT to the appropriate line above and see if
> > that
> > > > fixes your issue - this causes the 'M' bit to be set on the page
> > which
> > > > sure enforce cache coherency. If it doesn't, you'll need to check
> > the
> > > > 'M' bit isn't being masked out in head_44x.S (it was originally
> > masked
> > > > out on arch/powerpc, but was fixed in later kernels when the cache
>
> > > > coherency issues with non-SMP systems were resolved).
> > >
> > > I have some doubts about the usefulness of doing that for 4xx.
> AFAIK,
> > > the 440 core just ignores M.
> > >
> > > The problem lies probably elsewhere. Maybe the L2 cache coherency
> > isn't
> > > enabled or not working ?
> > >
> > > The L1 cache on 440 is simply not coherent, so drivers have to make
> > sure
> > > they use the appropriate DMA APIs which will do cache flushing when
> > > needed.
> > >
> > > Adam, what driver is causing you that sort of problems ?
> > >
> > > Cheers,
> > > Ben.
> > >
> > >
> --
> Adam Zilkie
> Software Designer,
> International Datacasting Corp.
>
> This message and the documents attached hereto are intended only for the
> addressee and may contain privileged or confidential information. Any
> unauthorized disclosure is strictly prohibited. If you have received
> this message in error, please notify us immediately so that we may
> correct our internal records. Please then delete the original message.
> Thank you.
> --------------------------------------------------------
>
> CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and contains information that is confidential and proprietary to AppliedMicro Corporation or its subsidiaries. It is to be used solely for the purpose of furthering the parties' business relationship. All unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message.
>
--
Adam Zilkie
Software Designer,
International Datacasting Corp.
This message and the documents attached hereto are intended only for the addressee and may contain privileged or confidential information. Any unauthorized disclosure is strictly prohibited. If you have received this message in error, please notify us immediately so that we may correct our internal records. Please then delete the original message. Thank you.
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Prodyut Hazarika @ 2009-09-08 19:56 UTC (permalink / raw)
To: azilkie; +Cc: Andrea Zypchen, linuxppc-dev, Tom Burns
In-Reply-To: <1252438259.2548.50.camel@Adam>
> We have found that using flush_dcache_range() after each DMA solves
the
> problem. Ideally, we'd like to be able to allocate the virtual page in
> cache inhibited memory to avoid the performance loss from all the
flush
> calls. To do this, we'd have to change our TLB sizes and reserve a TLB
> in memory as cache inhibited (using the 'I' bit). Will update if this
> works as well. Thanks for your help in this.
Aren't you using dma_alloc_coherent to get buffers that are shared
between CPU and external devices?
Thanks
Prodyut
On Tue, 2009-09-08 at 11:59 -0700, Prodyut Hazarika wrote:
> Hi Adam,
>=20
> > Yes, I am using the 440EPx (same as the sequoia board).=20
> > Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus
> (using
> > the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on
timing)
> > end up being partially corrupted when we try to parse the data in
the
> > virtual page. We have confirmed the data is good before the PCI-IDE
> > bridge. We are creating two 8K pages and map them to physical DMA
> memory
> > using single-entry scatter/gather structs. When a DMA block is
> > corrupted, we see a random portion of it (always a multiple of
16byte
> > cache lines) is overwritten with old data from the last time the
> buffer
> > was used.=20
>=20
> This looks like a cache coherency problem.
> Can you ensure that the TLB entries corresponding to the DMA region
has
> the CacheInhibit bit set.
> You will need a BDI connected to your system.
>=20
> Also, you will need to invalidate and flush the lines appropriately,
> since in 440 cores,
> L1Cache coherency is managed entirely by software.
> Please look at drivers/net/ibm_newemac/mal.c and core.c for example on
> how to do it.
>=20
> Thanks
> Prodyut
>=20
> On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> > Hi Adam,
> >=20
> > > Are you sure there is L2 cache on the 440?
> >=20
> > It depends on the SoC you are using. SoC like 460EX (Canyonlands
> board)
> > have L2Cache.
> > It seems you are using a Sequoia board, which has a 440EPx SoC.
440EPx
> > has a 440 cpu core, but no L2Cache.
> > Could you please tell me which SoC you are using?
> > You can also refer to the appropriate dts file to see if there is
L2C.
> > For example, in canyonlands.dts (460EX based board), we have the L2C
> > entry.
> > L2C0: l2c {
> > ...
> > }
> >=20
> > >I am seeing this problem with our custom IDE driver which is based
on
>=20
> > >pretty old code. Our driver uses pci_alloc_consistent() to allocate
> the
> >=20
> > >physical DMA memory and alloc_pages() to allocate a virtual page.
It=20
> > >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I
> > >should convert these to the DMA API calls as you suggest.
> >=20
> > Could you give more details on the consistency problem? It is a good
> > idea to change to the new DMA APIs, but pci_alloc_consistent()
should
> > work too
> >=20
> > Thanks
> > Prodyut=09
> >=20
> > On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > > Hi Adam,
> > > >=20
> > > > If you have a look in include/asm-ppc/pgtable.h for the
following
> > section:
> > > > #ifdef CONFIG_44x
> > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> > _PAGE_GUARDED)
> > > > #else
> > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > > #endif
> > > >=20
> > > > Try adding _PAGE_COHERENT to the appropriate line above and see
if
> > that=20
> > > > fixes your issue - this causes the 'M' bit to be set on the page
> > which=20
> > > > sure enforce cache coherency. If it doesn't, you'll need to
check
> > the=20
> > > > 'M' bit isn't being masked out in head_44x.S (it was originally
> > masked=20
> > > > out on arch/powerpc, but was fixed in later kernels when the
cache
>=20
> > > > coherency issues with non-SMP systems were resolved).
> > >=20
> > > I have some doubts about the usefulness of doing that for 4xx.
> AFAIK,
> > > the 440 core just ignores M.
> > >=20
> > > The problem lies probably elsewhere. Maybe the L2 cache coherency
> > isn't
> > > enabled or not working ?
> > >=20
> > > The L1 cache on 440 is simply not coherent, so drivers have to
make
> > sure
> > > they use the appropriate DMA APIs which will do cache flushing
when
> > > needed.
> > >=20
> > > Adam, what driver is causing you that sort of problems ?
> > >=20
> > > Cheers,
> > > Ben.
> > >=20
> > >=20
> --=20
> Adam Zilkie
> Software Designer,
> International Datacasting Corp.
>=20
> This message and the documents attached hereto are intended only for
the
> addressee and may contain privileged or confidential information. Any
> unauthorized disclosure is strictly prohibited. If you have received
> this message in error, please notify us immediately so that we may
> correct our internal records. Please then delete the original message.
> Thank you.
> --------------------------------------------------------
>=20
> CONFIDENTIALITY NOTICE: This e-mail message, including any
attachments, is for the sole use of the intended recipient(s) and
contains information that is confidential and proprietary to
AppliedMicro Corporation or its subsidiaries. It is to be used solely
for the purpose of furthering the parties' business relationship. All
unauthorized review, use, disclosure or distribution is prohibited. If
you are not the intended recipient, please contact the sender by reply
e-mail and destroy all copies of the original message.
>=20
--=20
Adam Zilkie
Software Designer,
International Datacasting Corp.
This message and the documents attached hereto are intended only for the
addressee and may contain privileged or confidential information. Any
unauthorized disclosure is strictly prohibited. If you have received
this message in error, please notify us immediately so that we may
correct our internal records. Please then delete the original message.
Thank you.
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Adam Zilkie @ 2009-09-08 20:00 UTC (permalink / raw)
To: phazarika; +Cc: Tom Burns, Andrea Zypchen, linuxppc-dev
In-Reply-To: <0CA0A16855646F4FA96D25A158E299D606F60BA2@SDCEXCHANGE01.ad.amcc.com>
We are using pci_alloc_consistent()
Adam
On Tue, 2009-09-08 at 12:56 -0700, Prodyut Hazarika wrote:
> > We have found that using flush_dcache_range() after each DMA solves
> the
> > problem. Ideally, we'd like to be able to allocate the virtual page in
> > cache inhibited memory to avoid the performance loss from all the
> flush
> > calls. To do this, we'd have to change our TLB sizes and reserve a TLB
> > in memory as cache inhibited (using the 'I' bit). Will update if this
> > works as well. Thanks for your help in this.
>
> Aren't you using dma_alloc_coherent to get buffers that are shared
> between CPU and external devices?
>
> Thanks
> Prodyut
>
> On Tue, 2009-09-08 at 11:59 -0700, Prodyut Hazarika wrote:
> > Hi Adam,
> >
> > > Yes, I am using the 440EPx (same as the sequoia board).
> > > Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus
> > (using
> > > the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on
> timing)
> > > end up being partially corrupted when we try to parse the data in
> the
> > > virtual page. We have confirmed the data is good before the PCI-IDE
> > > bridge. We are creating two 8K pages and map them to physical DMA
> > memory
> > > using single-entry scatter/gather structs. When a DMA block is
> > > corrupted, we see a random portion of it (always a multiple of
> 16byte
> > > cache lines) is overwritten with old data from the last time the
> > buffer
> > > was used.
> >
> > This looks like a cache coherency problem.
> > Can you ensure that the TLB entries corresponding to the DMA region
> has
> > the CacheInhibit bit set.
> > You will need a BDI connected to your system.
> >
> > Also, you will need to invalidate and flush the lines appropriately,
> > since in 440 cores,
> > L1Cache coherency is managed entirely by software.
> > Please look at drivers/net/ibm_newemac/mal.c and core.c for example on
> > how to do it.
> >
> > Thanks
> > Prodyut
> >
> > On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> > > Hi Adam,
> > >
> > > > Are you sure there is L2 cache on the 440?
> > >
> > > It depends on the SoC you are using. SoC like 460EX (Canyonlands
> > board)
> > > have L2Cache.
> > > It seems you are using a Sequoia board, which has a 440EPx SoC.
> 440EPx
> > > has a 440 cpu core, but no L2Cache.
> > > Could you please tell me which SoC you are using?
> > > You can also refer to the appropriate dts file to see if there is
> L2C.
> > > For example, in canyonlands.dts (460EX based board), we have the L2C
> > > entry.
> > > L2C0: l2c {
> > > ...
> > > }
> > >
> > > >I am seeing this problem with our custom IDE driver which is based
> on
> >
> > > >pretty old code. Our driver uses pci_alloc_consistent() to allocate
> > the
> > >
> > > >physical DMA memory and alloc_pages() to allocate a virtual page.
> It
> > > >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I
>
> > > >should convert these to the DMA API calls as you suggest.
> > >
> > > Could you give more details on the consistency problem? It is a good
> > > idea to change to the new DMA APIs, but pci_alloc_consistent()
> should
> > > work too
> > >
> > > Thanks
> > > Prodyut
> > >
> > > On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > > > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > > > Hi Adam,
> > > > >
> > > > > If you have a look in include/asm-ppc/pgtable.h for the
> following
> > > section:
> > > > > #ifdef CONFIG_44x
> > > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> > > _PAGE_GUARDED)
> > > > > #else
> > > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > > > #endif
> > > > >
> > > > > Try adding _PAGE_COHERENT to the appropriate line above and see
> if
> > > that
> > > > > fixes your issue - this causes the 'M' bit to be set on the page
> > > which
> > > > > sure enforce cache coherency. If it doesn't, you'll need to
> check
> > > the
> > > > > 'M' bit isn't being masked out in head_44x.S (it was originally
> > > masked
> > > > > out on arch/powerpc, but was fixed in later kernels when the
> cache
> >
> > > > > coherency issues with non-SMP systems were resolved).
> > > >
> > > > I have some doubts about the usefulness of doing that for 4xx.
> > AFAIK,
> > > > the 440 core just ignores M.
> > > >
> > > > The problem lies probably elsewhere. Maybe the L2 cache coherency
> > > isn't
> > > > enabled or not working ?
> > > >
> > > > The L1 cache on 440 is simply not coherent, so drivers have to
> make
> > > sure
> > > > they use the appropriate DMA APIs which will do cache flushing
> when
> > > > needed.
> > > >
> > > > Adam, what driver is causing you that sort of problems ?
> > > >
> > > > Cheers,
> > > > Ben.
> > > >
> > > >
> > --
> > Adam Zilkie
> > Software Designer,
> > International Datacasting Corp.
> >
> > This message and the documents attached hereto are intended only for
> the
> > addressee and may contain privileged or confidential information. Any
> > unauthorized disclosure is strictly prohibited. If you have received
> > this message in error, please notify us immediately so that we may
> > correct our internal records. Please then delete the original message.
> > Thank you.
> > --------------------------------------------------------
> >
> > CONFIDENTIALITY NOTICE: This e-mail message, including any
> attachments, is for the sole use of the intended recipient(s) and
> contains information that is confidential and proprietary to
> AppliedMicro Corporation or its subsidiaries. It is to be used solely
> for the purpose of furthering the parties' business relationship. All
> unauthorized review, use, disclosure or distribution is prohibited. If
> you are not the intended recipient, please contact the sender by reply
> e-mail and destroy all copies of the original message.
> >
--
Adam Zilkie
Software Designer,
International Datacasting Corp.
This message and the documents attached hereto are intended only for the addressee and may contain privileged or confidential information. Any unauthorized disclosure is strictly prohibited. If you have received this message in error, please notify us immediately so that we may correct our internal records. Please then delete the original message. Thank you.
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Benjamin Herrenschmidt @ 2009-09-08 21:29 UTC (permalink / raw)
To: azilkie; +Cc: phazarika, Tom Burns, Andrea Zypchen, linuxppc-dev
In-Reply-To: <1252432873.2548.41.camel@Adam>
On Tue, 2009-09-08 at 14:01 -0400, Adam Zilkie wrote:
> Hi Prodyut,
>
> Yes, I am using the 440EPx (same as the sequoia board).
> Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus (using
> the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on timing)
> end up being partially corrupted when we try to parse the data in the
> virtual page. We have confirmed the data is good before the PCI-IDE
> bridge. We are creating two 8K pages and map them to physical DMA memory
> using single-entry scatter/gather structs. When a DMA block is
> corrupted, we see a random portion of it (always a multiple of 16byte
> cache lines) is overwritten with old data from the last time the buffer
> was used.
Smells to me like you aren't properly using the dma or pci dma APIs to
flush/invalidate the cache around your transfers.
Ben.
> Regards,
> Adam
>
> On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> > Hi Adam,
> >
> > > Are you sure there is L2 cache on the 440?
> >
> > It depends on the SoC you are using. SoC like 460EX (Canyonlands board)
> > have L2Cache.
> > It seems you are using a Sequoia board, which has a 440EPx SoC. 440EPx
> > has a 440 cpu core, but no L2Cache.
> > Could you please tell me which SoC you are using?
> > You can also refer to the appropriate dts file to see if there is L2C.
> > For example, in canyonlands.dts (460EX based board), we have the L2C
> > entry.
> > L2C0: l2c {
> > ...
> > }
> >
> > >I am seeing this problem with our custom IDE driver which is based on
> > >pretty old code. Our driver uses pci_alloc_consistent() to allocate the
> >
> > >physical DMA memory and alloc_pages() to allocate a virtual page. It
> > >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I
> > >should convert these to the DMA API calls as you suggest.
> >
> > Could you give more details on the consistency problem? It is a good
> > idea to change to the new DMA APIs, but pci_alloc_consistent() should
> > work too
> >
> > Thanks
> > Prodyut
> >
> > On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > > Hi Adam,
> > > >
> > > > If you have a look in include/asm-ppc/pgtable.h for the following
> > section:
> > > > #ifdef CONFIG_44x
> > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> > _PAGE_GUARDED)
> > > > #else
> > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > > #endif
> > > >
> > > > Try adding _PAGE_COHERENT to the appropriate line above and see if
> > that
> > > > fixes your issue - this causes the 'M' bit to be set on the page
> > which
> > > > sure enforce cache coherency. If it doesn't, you'll need to check
> > the
> > > > 'M' bit isn't being masked out in head_44x.S (it was originally
> > masked
> > > > out on arch/powerpc, but was fixed in later kernels when the cache
> > > > coherency issues with non-SMP systems were resolved).
> > >
> > > I have some doubts about the usefulness of doing that for 4xx. AFAIK,
> > > the 440 core just ignores M.
> > >
> > > The problem lies probably elsewhere. Maybe the L2 cache coherency
> > isn't
> > > enabled or not working ?
> > >
> > > The L1 cache on 440 is simply not coherent, so drivers have to make
> > sure
> > > they use the appropriate DMA APIs which will do cache flushing when
> > > needed.
> > >
> > > Adam, what driver is causing you that sort of problems ?
> > >
> > > Cheers,
> > > Ben.
> > >
> > >
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: Fix SMP compile error and allow NULL for smp_ops
From: Benjamin Herrenschmidt @ 2009-09-08 21:31 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <1252437668-28508-1-git-send-email-galak@kernel.crashing.org>
On Tue, 2009-09-08 at 14:21 -0500, Kumar Gala wrote:
>
> struct smp_ops_t smp_85xx_ops = {
> + .message_pass = NULL,
> + .probe = NULL,
> .kick_cpu = smp_85xx_kick_cpu,
> + .setup_cpu = NULL,
> };
Why explicitely setting those to NULL ?
Cheers,
Ben.
> -static int __init smp_dummy_probe(void)
> -{
> - return NR_CPUS;
> -}
> -
> void __init mpc85xx_smp_init(void)
> {
> struct device_node *np;
>
> - smp_85xx_ops.message_pass = NULL;
> -
> np = of_find_node_by_type(NULL, "open-pic");
> if (np) {
> smp_85xx_ops.probe = smp_mpic_probe;
> smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
> smp_85xx_ops.message_pass = smp_mpic_message_pass;
> - } else {
> - smp_85xx_ops.probe = smp_dummy_probe;
> - smp_85xx_ops.setup_cpu = smp_85xx_basic_setup;
> }
>
> if (cpu_has_feature(CPU_FTR_DBELL))
^ permalink raw reply
* RE: AW: PowerPC PCI DMA issues (prefetch/coherency?)
From: Benjamin Herrenschmidt @ 2009-09-08 21:34 UTC (permalink / raw)
To: azilkie; +Cc: phazarika, Tom Burns, Andrea Zypchen, linuxppc-dev
In-Reply-To: <1252438259.2548.50.camel@Adam>
On Tue, 2009-09-08 at 15:30 -0400, Adam Zilkie wrote:
> All,
>
> We have found that using flush_dcache_range() after each DMA solves the
> problem. Ideally, we'd like to be able to allocate the virtual page in
> cache inhibited memory to avoid the performance loss from all the flush
> calls. To do this, we'd have to change our TLB sizes and reserve a TLB
> in memory as cache inhibited (using the 'I' bit). Will update if this
> works as well. Thanks for your help in this.
I think the problem is that you are manipulating the TLB directly, which
you shouldn't have to do. You also shouldn't have to use
flush_dcache_range() yourself neither.
It should all be handled by the DMA and PCI DMA APIs, you are just not
using those correctly.
You have two choice. You can either allocate memory permanently mapped
with I=1, in which case, use pci_alloc_consistent() (or
dma_alloc_coherent(), same thing).
Or you can use "normal" memory and ensure you flush/invalidate the cache
at the right time, which you can do with something like
pci_map_sg/pci_unmap_sg (or dma_* variants) or the dma_sync_* functions.
It's all pretty standard mechanisms in Linux, other platforms also have
non-coherent DMA (such as some ARMs) and those functions are generic.
Cheers,
Ben.
> Regards,
> Adam
>
> On Tue, 2009-09-08 at 11:59 -0700, Prodyut Hazarika wrote:
> > Hi Adam,
> >
> > > Yes, I am using the 440EPx (same as the sequoia board).
> > > Our ideDriver is DMA'ing blocks of 192-byte data over the PCI bus
> > (using
> > > the Sil0680A PCI-IDE bridge). Most of the DMA's (depending on timing)
> > > end up being partially corrupted when we try to parse the data in the
> > > virtual page. We have confirmed the data is good before the PCI-IDE
> > > bridge. We are creating two 8K pages and map them to physical DMA
> > memory
> > > using single-entry scatter/gather structs. When a DMA block is
> > > corrupted, we see a random portion of it (always a multiple of 16byte
> > > cache lines) is overwritten with old data from the last time the
> > buffer
> > > was used.
> >
> > This looks like a cache coherency problem.
> > Can you ensure that the TLB entries corresponding to the DMA region has
> > the CacheInhibit bit set.
> > You will need a BDI connected to your system.
> >
> > Also, you will need to invalidate and flush the lines appropriately,
> > since in 440 cores,
> > L1Cache coherency is managed entirely by software.
> > Please look at drivers/net/ibm_newemac/mal.c and core.c for example on
> > how to do it.
> >
> > Thanks
> > Prodyut
> >
> > On Thu, 2009-09-03 at 13:27 -0700, Prodyut Hazarika wrote:
> > > Hi Adam,
> > >
> > > > Are you sure there is L2 cache on the 440?
> > >
> > > It depends on the SoC you are using. SoC like 460EX (Canyonlands
> > board)
> > > have L2Cache.
> > > It seems you are using a Sequoia board, which has a 440EPx SoC. 440EPx
> > > has a 440 cpu core, but no L2Cache.
> > > Could you please tell me which SoC you are using?
> > > You can also refer to the appropriate dts file to see if there is L2C.
> > > For example, in canyonlands.dts (460EX based board), we have the L2C
> > > entry.
> > > L2C0: l2c {
> > > ...
> > > }
> > >
> > > >I am seeing this problem with our custom IDE driver which is based on
> >
> > > >pretty old code. Our driver uses pci_alloc_consistent() to allocate
> > the
> > >
> > > >physical DMA memory and alloc_pages() to allocate a virtual page. It
> > > >then uses pci_map_sg() to map to a scatter/gather buffer. Perhaps I
> > > >should convert these to the DMA API calls as you suggest.
> > >
> > > Could you give more details on the consistency problem? It is a good
> > > idea to change to the new DMA APIs, but pci_alloc_consistent() should
> > > work too
> > >
> > > Thanks
> > > Prodyut
> > >
> > > On Thu, 2009-09-03 at 19:57 +1000, Benjamin Herrenschmidt wrote:
> > > > On Thu, 2009-09-03 at 09:05 +0100, Chris Pringle wrote:
> > > > > Hi Adam,
> > > > >
> > > > > If you have a look in include/asm-ppc/pgtable.h for the following
> > > section:
> > > > > #ifdef CONFIG_44x
> > > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED |
> > > _PAGE_GUARDED)
> > > > > #else
> > > > > #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
> > > > > #endif
> > > > >
> > > > > Try adding _PAGE_COHERENT to the appropriate line above and see if
> > > that
> > > > > fixes your issue - this causes the 'M' bit to be set on the page
> > > which
> > > > > sure enforce cache coherency. If it doesn't, you'll need to check
> > > the
> > > > > 'M' bit isn't being masked out in head_44x.S (it was originally
> > > masked
> > > > > out on arch/powerpc, but was fixed in later kernels when the cache
> >
> > > > > coherency issues with non-SMP systems were resolved).
> > > >
> > > > I have some doubts about the usefulness of doing that for 4xx.
> > AFAIK,
> > > > the 440 core just ignores M.
> > > >
> > > > The problem lies probably elsewhere. Maybe the L2 cache coherency
> > > isn't
> > > > enabled or not working ?
> > > >
> > > > The L1 cache on 440 is simply not coherent, so drivers have to make
> > > sure
> > > > they use the appropriate DMA APIs which will do cache flushing when
> > > > needed.
> > > >
> > > > Adam, what driver is causing you that sort of problems ?
> > > >
> > > > Cheers,
> > > > Ben.
> > > >
> > > >
> > --
> > Adam Zilkie
> > Software Designer,
> > International Datacasting Corp.
> >
> > This message and the documents attached hereto are intended only for the
> > addressee and may contain privileged or confidential information. Any
> > unauthorized disclosure is strictly prohibited. If you have received
> > this message in error, please notify us immediately so that we may
> > correct our internal records. Please then delete the original message.
> > Thank you.
> > --------------------------------------------------------
> >
> > CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and contains information that is confidential and proprietary to AppliedMicro Corporation or its subsidiaries. It is to be used solely for the purpose of furthering the parties' business relationship. All unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message.
> >
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox