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* [RFC Patch 0/1] [hw-bkpt BookE] hw-breakpoint interfaces for BookE - ver I
From: K.Prasad @ 2010-04-27 16:40 UTC (permalink / raw)
  To: linuxppc-dev@ozlabs.org
  Cc: Benjamin Herrenschmidt, shaggy, Frederic Weisbecker, David Gibson,
	paulus, Roland McGrath

Hi All,
	Please find a patch that implements hardware-breakpoint interfaces for
BookE processors. The patches are under continuous development and are sent
to receive early comments. For the moment, they are (only) compile tested (with
ppc64e_defconfig), further testing will accompany the ongoing development.

A few notes about the patchset, as below:
- The patch is designed with reference to BookIII-E type processors
  specification (having two DAC/DVC registers).
- Instruction breakpoint requests are not implemented through the generic
  breakpoint interfaces. Such requests are still possible for user-space through 
  ptrace.
- Breakpoint exceptions are designed to 'trigger-after-execute', although the
  processors raise the exception before instruction execution. To achieve this,
  the causative insruction is single-stepped over and the breakpoint handler is 
  invoked in the ICMP exception handler.
- The patches are dependant on the recent submissions (not yet integrated into
  mainline) that bring support for hw-breakpoint weight (patchset from Frederic
  Weisbecker LKML ref:1271999639-23605-1-git-send-regression-fweisbec@gmail.com)
  and PPC64 hw-breakpoint support (linuxppc-dev
  ref:20100414034340.GA6571@in.ibm.com).

Here are a few items identified to work upon in the successive versions.
TO DO
------
- Modify ptrace requests to use the generic hw-breakpoint interfaces 
 (PTRACE_<GET><SET>_DEBUGREG, PTRACE_SETHWDEBUG)
- Explore intergration of BookE and BookS code intergration 
 (hw_breakpoint.c and hw_breakpoint_booke.c) 
- Code clean-up and reduction.

Kindly let me know about comments/suggestions, if any.

Thank You,
K.Prasad

^ permalink raw reply

* [RFC Patch 1/1] Implement hw-breakpoint interfaces for BookE processors
From: K.Prasad @ 2010-04-27 16:40 UTC (permalink / raw)
  To: linuxppc-dev@ozlabs.org
  Cc: Benjamin Herrenschmidt, shaggy, Frederic Weisbecker, David Gibson,
	paulus, K.Prasad, Roland McGrath
In-Reply-To: <20100427163508.631888092@linux.vnet.ibm.com>

Implement hardware breakpoint interfaces for PowerPC BookE processors

Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
 arch/powerpc/Kconfig                           |    2 
 arch/powerpc/include/asm/cputable.h            |    4 
 arch/powerpc/include/asm/hw_breakpoint_booke.h |   42 +++
 arch/powerpc/kernel/Makefile                   |    4 
 arch/powerpc/kernel/hw_breakpoint_booke.c      |  326 +++++++++++++++++++++++++
 arch/powerpc/kernel/ptrace.c                   |    8 
 arch/powerpc/kernel/traps.c                    |   11 
 include/linux/perf_event.h                     |    4 
 8 files changed, 398 insertions(+), 3 deletions(-)

Index: linux-2.6.bookE/arch/powerpc/include/asm/hw_breakpoint_booke.h
===================================================================
--- /dev/null
+++ linux-2.6.bookE/arch/powerpc/include/asm/hw_breakpoint_booke.h
@@ -0,0 +1,42 @@
+#ifndef	_I386_HW_BREAKPOINT_H
+#define	_I386_HW_BREAKPOINT_H
+
+#ifdef	__KERNEL__
+#define	__ARCH_HW_BREAKPOINT_H
+
+struct arch_hw_breakpoint {
+	u8		len;
+	unsigned long	address;
+	unsigned long	type;
+};
+
+#include <linux/kdebug.h>
+#include <linux/percpu.h>
+#include <linux/list.h>
+
+/* Breakpoint length beyond which we should use 'range' breakpoints */
+#define DAC_LEN 8
+
+static inline int hw_breakpoint_slots(int type)
+{
+	return HBP_NUM;
+}
+
+struct perf_event;
+struct pmu;
+
+extern int arch_check_bp_in_kernelspace(struct perf_event *bp);
+extern int arch_validate_hwbkpt_settings(struct perf_event *bp);
+extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
+						unsigned long val, void *data);
+extern void hw_breakpoint_handler(struct pt_regs *regs,
+				unsigned long debug_status);
+int arch_install_hw_breakpoint(struct perf_event *bp);
+void arch_uninstall_hw_breakpoint(struct perf_event *bp);
+void hw_breakpoint_pmu_read(struct perf_event *bp);
+
+extern struct pmu perf_ops_bp;
+
+#endif	/* __KERNEL__ */
+#endif	/* _I386_HW_BREAKPOINT_H */
+
Index: linux-2.6.bookE/arch/powerpc/kernel/hw_breakpoint_booke.c
===================================================================
--- /dev/null
+++ linux-2.6.bookE/arch/powerpc/kernel/hw_breakpoint_booke.c
@@ -0,0 +1,326 @@
+#include <linux/perf_event.h>
+#include <linux/hw_breakpoint.h>
+#include <linux/notifier.h>
+#include <linux/percpu.h>
+#include <linux/kprobes.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+
+#include <asm/hw_breakpoint_booke.h>
+#include <asm/reg_booke.h>
+#include <asm/reg.h>
+
+/*
+ * Store the 'bp' that caused the hw-breakpoint exception just before we
+ * single-step. Use it to distinguish a single-step exception (due to a
+ * previous hw-breakpoint exception) from a normal one
+ */
+static DEFINE_PER_CPU(struct perf_event *, last_hit_bp);
+
+/*
+ * Save the debug registers to restore them after single-stepping the
+ * instruction that caused the debug exception
+ */
+static DEFINE_PER_CPU(unsigned long, last_hit_dac[2]);
+static DEFINE_PER_CPU(unsigned long, last_hit_dbcr0);
+
+/*
+ * Stores the breakpoints currently in use on each breakpoint address
+ * register for each cpus
+ */
+static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
+
+int hw_breakpoint_weight(struct perf_event *bp)
+{
+	return (bp->attr.bp_len > DAC_LEN) ? 2 : 1;
+}
+
+/*
+ * Install a perf counter breakpoint.
+ *
+ * We seek a free debug address register and use it for this
+ * breakpoint. Eventually we enable it in the debug control register.
+ *
+ * Atomic: we hold the counter->ctx->lock and we only handle variables
+ * and registers local to this cpu.
+ */
+int arch_install_hw_breakpoint(struct perf_event *bp)
+{
+	bool range_bp;
+	int i;
+	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+	unsigned long dbcr0 = mfspr(SPRN_DBCR0);
+
+	range_bp = (info->len > DAC_LEN) ? true : false;
+	for (i = 0; i < HBP_NUM; i++) {
+		struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
+
+		if (*slot)
+			continue;
+		*slot = bp;
+		mtspr(SPRN_DAC1, info->address);
+		/* Clean the 'type' fields to erase past values */
+		dbcr0 &= ~(DBCR0_DAC2W | DBCR0_DAC2R);
+
+		mtspr(SPRN_DBCR0, dbcr0 |
+				(info->type << (HBP_NUM - i)) | DBCR0_IDM);
+		/*
+		 * Use DAC2 register in 'range' mode if the length of the
+		 * breakpoint request is 'large'
+		 */
+		if (unlikely(range_bp)) {
+			if (i > (HBP_NUM - hw_breakpoint_weight(bp))) {
+				*slot = NULL;
+				mtspr(SPRN_DBCR0, dbcr0);
+				return -EBUSY;
+			}
+			(*slot)++;
+			i++;
+			/*
+			 * In 'range' mode use two debug registers, but copy
+			 * same breakpoint structure in both slots
+			 */
+			*slot = bp;
+			mtspr(SPRN_DAC2, info->address + info->len);
+			mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) |
+				(info->type << (HBP_NUM - i)) | DBCR0_IDM);
+			/* We support only 'inclusive' range for now */
+			mtspr(SPRN_DBCR2, DBCR2_DAC12M);
+		}
+		break;
+	}
+
+/* TODO: Support DVC settings - atleast for user-space breakpoint requests */
+	return 0;
+}
+
+/*
+ * Uninstall the breakpoint contained in the given counter.
+ *
+ * First we search the debug address register it uses and then we disable
+ * it.
+ *
+ * Atomic: we hold the counter->ctx->lock and we only handle variables
+ * and registers local to this cpu.
+ */
+void arch_uninstall_hw_breakpoint(struct perf_event *bp)
+{
+	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+	int i;
+	unsigned long dbcr0 = mfspr(SPRN_DBCR0);
+
+	for (i = 0; i < HBP_NUM; i++) {
+		struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
+
+		if (*slot != bp)
+			continue;
+		*slot = NULL;
+		dbcr0 &= ~((DBCR0_DAC2W | DBCR0_DAC2R) << i);
+		mtspr(SPRN_DBCR0, dbcr0);
+		if (info->len > DAC_LEN) {
+			(*slot)++;
+			i++;
+			*slot = NULL;
+			dbcr0 &= ~((DBCR0_DAC2W | DBCR0_DAC2R) << i);
+			mtspr(SPRN_DBCR0, dbcr0);
+		}
+		break;
+	}
+
+	if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
+		return;
+}
+
+/*
+ * Check for virtual address in kernel space.
+ */
+int arch_check_bp_in_kernelspace(struct perf_event *bp)
+{
+	unsigned long va;
+	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+
+	va = info->address;
+	return (va >= TASK_SIZE) && ((va + info->len - 1) >= TASK_SIZE);
+}
+
+static int arch_build_bp_info(struct perf_event *bp)
+{
+	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+
+	/* Type */
+	switch (bp->attr.bp_type) {
+	case HW_BREAKPOINT_R:
+		info->type = DBCR0_DAC2R;
+		break;
+	case HW_BREAKPOINT_W:
+		info->type = DBCR0_DAC2W;
+		break;
+	case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
+		info->type = (DBCR0_DAC2W | DBCR0_DAC2R);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/*
+ * Validate the arch-specific HW Breakpoint register settings
+ */
+int arch_validate_hwbkpt_settings(struct perf_event *bp)
+{
+	int ret;
+
+	ret = arch_build_bp_info(bp);
+	if (ret)
+		return ret;
+	/* TODO: Remove this check when user-space breakpoints are supported */
+	ret = arch_check_bp_in_kernelspace(bp);
+
+	return ret;
+}
+
+/*
+ * Release the user breakpoints used by ptrace
+ */
+void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
+{
+	/* Placeholder for now...required for compilation */
+}
+
+void __kprobes hw_breakpoint_handler(struct pt_regs *regs,
+					unsigned long debug_status)
+{
+	int i, cpu;
+	struct perf_event *bp = NULL;
+	struct arch_hw_breakpoint *bp_info;
+	unsigned long dbcr0;
+
+	/* Disable breakpoints during exception handling */
+	mtmsr(mfmsr() & ~MSR_DE);
+	cpu = smp_processor_id();
+
+	/* Handle all the breakpoints that were triggered */
+	for (i = 0; i < HBP_NUM; ++i) {
+		if ((debug_status & ((DBSR_DAC2R | DBSR_DAC2W) << i)) == 0)
+			continue;
+		/* Clear the debug status register */
+		mtspr(SPRN_DBSR, (DBSR_DAC2R | DBSR_DAC2W) << (HBP_NUM - i));
+
+		/*
+		 * The counter may be concurrently released but that can only
+		 * occur from a call_rcu() path. We can then safely fetch
+		 * the breakpoint, use its callback, touch its counter
+		 * while we are in an rcu_read_lock() path.
+		 */
+		rcu_read_lock();
+		bp = per_cpu(bp_per_reg[i], cpu);
+		/*
+		 * bp can be NULL due to lazy debug register switching
+		 * or due to concurrent perf counter removing.
+		 */
+		if (!bp) {
+			rcu_read_unlock();
+			return;
+		}
+	}
+
+	bp_info = counter_arch_bp(bp);
+
+	/*
+	 * Clear the breakpoint register and single-step the
+	 * causative instruction
+	 */
+	dbcr0 = per_cpu(last_hit_dbcr0, cpu) = mfspr(SPRN_DBCR0);
+	dbcr0 &= ~((DBCR0_DAC2W | DBCR0_DAC2R) << i);
+
+	/*
+	 * Save the debug registers in corresponding per-cpu variables, only to
+	 * be restored in the single-step exception handler.
+	 */
+	per_cpu(last_hit_dac[0], cpu) = mfspr(SPRN_DAC1);
+	if (unlikely(bp_info->len > DAC_LEN)) {
+		dbcr0 &= ~((DBCR0_DAC2W | DBCR0_DAC2R) << i);
+		per_cpu(last_hit_dac[1], cpu) = mfspr(SPRN_DAC1);
+	}
+	rcu_read_unlock();
+
+	/*
+	 * Block-step and single-stepping is not supported
+	 * simultaneously for now
+	 */
+	dbcr0 &= ~DBCR0_BT;
+	mtspr(SPRN_DBCR0, dbcr0 | DBCR0_IDM | DBCR0_IC);
+	mtmsr(mfmsr() | MSR_DE);
+}
+
+/*
+ * Handle single-step exceptions following a DAC hit
+ */
+int __kprobes single_step_dac_instruction(struct pt_regs *regs)
+{
+	int i, cpu = smp_processor_id();
+	struct arch_hw_breakpoint *bp_info;
+	struct perf_event *bp = per_cpu(last_hit_bp, cpu);
+	unsigned long dbcr0 = mfspr(SPRN_DBCR0);
+
+	/*
+	 * Check if we are single-stepping as a result of a
+	 * previous HW Breakpoint exception
+	 */
+	if (!bp)
+		return NOTIFY_DONE;
+	bp_info = counter_arch_bp(bp);
+	/*
+	 * We shall invoke the user-defined callback function in the single
+	 * stepping handler to confirm to 'trigger-after-execute' semantics
+	 */
+	perf_bp_event(bp, regs);
+
+	/*
+	 * Loop through the 'slot's to identify the appropriate DAC register
+	 * and restore the breakpoint values
+	 */
+	for (i = 0; i < HBP_NUM; i++) {
+		struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
+
+		if (*slot != bp)
+			continue;
+		mtspr(SPRN_DAC1, bp_info->address);
+		dbcr0 &= ~(DBCR0_DAC2W | DBCR0_DAC2R);
+		mtspr(SPRN_DBCR0, dbcr0 |
+				(bp_info->type << (HBP_NUM - i)) | DBCR0_IDM);
+		if (unlikely(bp_info->len > DAC_LEN)) {
+			i++;
+			mtspr(SPRN_DAC2, bp_info->address + bp_info->len);
+			mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) |
+				(bp_info->type << (HBP_NUM - i)) | DBCR0_IDM);
+			mtspr(SPRN_DBCR2, DBCR2_DAC12M);
+		}
+		break;
+	}
+	mtspr(SPRN_DBCR0, dbcr0 | DBCR0_IDM | DBCR0_IC);
+	return NOTIFY_STOP;
+}
+
+/*
+ * Handle debug exception notifications.
+ */
+int __kprobes hw_breakpoint_exceptions_notify(
+		struct notifier_block *unused, unsigned long val, void *data)
+{
+	int ret = NOTIFY_DONE;
+
+	if (val == DIE_SSTEP)
+		ret = single_step_dac_instruction(data);
+	return ret;
+}
+
+void hw_breakpoint_pmu_read(struct perf_event *bp)
+{
+	/* TODO */
+}
Index: linux-2.6.bookE/arch/powerpc/kernel/traps.c
===================================================================
--- linux-2.6.bookE.orig/arch/powerpc/kernel/traps.c
+++ linux-2.6.bookE/arch/powerpc/kernel/traps.c
@@ -57,6 +57,9 @@
 #ifdef CONFIG_FSL_BOOKE
 #include <asm/dbell.h>
 #endif
+#ifdef CONFIG_BOOKE
+#include <asm/hw_breakpoint_booke.h>
+#endif
 
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 int (*__debugger)(struct pt_regs *regs) __read_mostly;
@@ -1151,8 +1154,12 @@ void __kprobes DebugException(struct pt_
 		}
 
 		_exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
-	} else
-		handle_debug(regs, debug_status);
+	} else {
+		if (is_kernel_addr(regs->dar))
+			hw_breakpoint_handler(regs, debug_status);
+		else
+			handle_debug(regs, debug_status);
+	}
 }
 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
 
Index: linux-2.6.bookE/arch/powerpc/Kconfig
===================================================================
--- linux-2.6.bookE.orig/arch/powerpc/Kconfig
+++ linux-2.6.bookE/arch/powerpc/Kconfig
@@ -140,7 +140,7 @@ config PPC
 	select HAVE_SYSCALL_WRAPPERS if PPC64
 	select GENERIC_ATOMIC64 if PPC32
 	select HAVE_PERF_EVENTS
-	select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
+	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && PPC_BOOK3S_64) || BOOKE
 
 config EARLY_PRINTK
 	bool
Index: linux-2.6.bookE/arch/powerpc/kernel/Makefile
===================================================================
--- linux-2.6.bookE.orig/arch/powerpc/kernel/Makefile
+++ linux-2.6.bookE/arch/powerpc/kernel/Makefile
@@ -34,7 +34,11 @@ obj-y				+= vdso32/
 obj-$(CONFIG_PPC64)		+= setup_64.o sys_ppc32.o \
 				   signal_64.o ptrace32.o \
 				   paca.o nvram_64.o firmware.o
+ifeq ($(CONFIG_BOOKE),y)
+obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint_booke.o
+else
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)	+= hw_breakpoint.o
+endif
 obj-$(CONFIG_PPC_BOOK3S_64)	+= cpu_setup_ppc970.o cpu_setup_pa6t.o
 obj64-$(CONFIG_RELOCATABLE)	+= reloc_64.o
 obj-$(CONFIG_PPC_BOOK3E_64)	+= exceptions-64e.o
Index: linux-2.6.bookE/arch/powerpc/kernel/ptrace.c
===================================================================
--- linux-2.6.bookE.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6.bookE/arch/powerpc/kernel/ptrace.c
@@ -787,10 +787,12 @@ int ptrace_set_debugreg(struct task_stru
 			       unsigned long data)
 {
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
+#ifndef CONFIG_BOOKE
 	int ret;
 	struct thread_struct *thread = &(task->thread);
 	struct perf_event *bp;
 	struct perf_event_attr attr;
+#endif /* CONFIG_BOOKE */
 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 
 	/* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
@@ -821,6 +823,11 @@ int ptrace_set_debugreg(struct task_stru
 	if (data && !(data & DABR_TRANSLATION))
 		return -EIO;
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
+/*
+ * Temporarily disable use of breakpoint interfaces through ptrace until
+ * user-space breakpoint support is enabled.
+ */
+#ifndef CONFIG_BOOKE
 	bp = thread->ptrace_bps[0];
 	if (data == 0) {
 		if (bp) {
@@ -873,6 +880,7 @@ int ptrace_set_debugreg(struct task_stru
 		return PTR_ERR(bp);
 	}
 
+#endif /* CONFIG_BOOKE */
 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 
 	/* Move contents to the DABR register */
Index: linux-2.6.bookE/arch/powerpc/include/asm/cputable.h
===================================================================
--- linux-2.6.bookE.orig/arch/powerpc/include/asm/cputable.h
+++ linux-2.6.bookE/arch/powerpc/include/asm/cputable.h
@@ -512,7 +512,11 @@ static inline int cpu_has_feature(unsign
 }
 
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
+#ifdef CONFIG_BOOKE
+#define HBP_NUM 2
+#else
 #define HBP_NUM 1
+#endif /* CONFIG_BOOKE */
 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 
 #endif /* !__ASSEMBLY__ */
Index: linux-2.6.bookE/include/linux/perf_event.h
===================================================================
--- linux-2.6.bookE.orig/include/linux/perf_event.h
+++ linux-2.6.bookE/include/linux/perf_event.h
@@ -440,7 +440,11 @@ enum perf_callchain_context {
 #endif
 
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
+#ifdef CONFIG_BOOKE
+#include <asm/hw_breakpoint_booke.h>
+#else
 #include <asm/hw_breakpoint.h>
+#endif /* CONFIG_BOOKE */
 #endif
 
 #include <linux/list.h>

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Liam Girdwood @ 2010-04-27 16:41 UTC (permalink / raw)
  To: Timur Tabi; +Cc: alsa-devel, kumar.gala, broonie, linuxppc-dev
In-Reply-To: <4BD70292.20001@freescale.com>

On Tue, 2010-04-27 at 10:28 -0500, Timur Tabi wrote:
> Liam Girdwood wrote:
> 
> > Iirc, the SSI and DMA controllers on your SoC mean that each DMA device
> > can only do one direction (either Playback or Capture). So I'm thinking
> > we create two DAI link entries for your sound card (one for playback and
> > the other for capture) and they both use the same SSI device but each
> > would have it's own DMA device.
> 
> Do you mean here:
> 
> 	machine_data->card.probe = mpc8610_hpcd_machine_probe;
> 	machine_data->card.remove = mpc8610_hpcd_machine_remove;
> 	machine_data->card.name = "MPC8610 HPCD";
> 	machine_data->card.num_links = 1;
> 	machine_data->card.dai_link = &machine_data->dai;
> 
> So that num_links would be 2 instead of 1?
> 

Yes.

> I would need some way for fsl_dma_open() to get a pointer to private,
> DMA-specific data.  I'm not sure how I can do that.
> 

In multi-component we now have platform_data and device private data
(from the regular driver model).

We also have stream snd_soc_dai_set_dma_data() for runtime DMA config.

So it depends on who is setting your DMA data. If it's DTS then it would
be the of_ platform equivalent, if it's your DMA probe() then dev data
otherwise you can use the snd_soc_dai_set_dma_data().

> > This would result in two separate pcm devices being exported to
> > userspace i.e one for playback only and the other for capture only. I
> > think this is also a more accurate representation of your hardware too
> > (since we have different DMA devices for each pcm stream direction).
> 
> I can say for certain whether that will actually work.  My gut tells
> me that I might run into problems trying to implement that.  The only
> way to know for sure is to start hacking.  Unfortunately, my window of
> opportunity to work on this just closed, and it may not open for a
> while.  I know my current patch is less-than-ideal, but it does
> restore functionality to the 8610, and without needing any U-Boot or
> device-tree changes.  So unless there are any real objections, I'd
> like it to be merged.  Otherwise, 8610 audio will be broken in the
> next release.

Ok, I can live with this providing we can mark it as a TODO: and have a
PPC Ack. It may be easier to fix in the future too as the ASoC card
registration clean-up should be complete/in-progress (i.e. card
platform_data and private_data will be available for passing in anything
you like).

Thanks

Liam 

-- 
Freelance Developer, SlimLogic Ltd
ASoC and Voltage Regulator Maintainer.
http://www.slimlogic.co.uk

^ permalink raw reply

* Re: [PATCH 1/4] powerpc/fsl_soc.c: prepare for addition of mpc5121 USB code
From: Grant Likely @ 2010-04-27 16:51 UTC (permalink / raw)
  To: Anatolij Gustschin
  Cc: Greg Kroah-Hartman, Wolfgang Denk, Detlev Zundel, linux-usb,
	linuxppc-dev, David Brownell
In-Reply-To: <1272384698-4359-2-git-send-email-agust@denx.de>

On Tue, Apr 27, 2010 at 10:11 AM, Anatolij Gustschin <agust@denx.de> wrote:
> Factor out common code for registering a FSL EHCI platform
> device into new fsl_usb2_register_device() function. This
> is done to avoid code duplication while adding code for
> instantiating of MPC5121 dual role USB platform devices.
> Then, the subsequent patch can use
> for_each_compatible_node(np, NULL, "fsl,mpc5121-usb2-dr") {
> =A0 =A0 =A0 =A0...
> =A0 =A0 =A0 =A0fsl_usb2_register_device();
> }
>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Cc: Kumar Gala <galak@kernel.crashing.org>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> ---
> =A0arch/powerpc/sysdev/fsl_soc.c | =A0231 +++++++++++++++++++------------=
---------

Hi Anatolij,

Thanks for this work.  However, I've got concerns.

Forgive me for ragging on code that you didn't write, but this
fsl_soc.c code for registering the USB device really doesn't belong
here anymore.  It should be part of the drivers/usb/host/ehci-fsl.c
and the driver should do of-style binding (Which should be a lot
easier if I manage to get the merge of platform bus and of_platform
bus into 2.6.35).

This patch series makes the fsl_soc.c code even more complicated, and
scatters what is essentially driver code over even more places in the
arch/powerpc tree.  I'm really not keen on it being merged in this
form.

g.

^ permalink raw reply

* Re: [PATCH 3/4] USB: add USB OTG support for MPC5121 SoC
From: Grant Likely @ 2010-04-27 17:07 UTC (permalink / raw)
  To: Anatolij Gustschin
  Cc: Greg Kroah-Hartman, Wolfgang Denk, Detlev Zundel, linux-usb,
	linuxppc-dev, David Brownell, Bruce Schmid
In-Reply-To: <1272384698-4359-4-git-send-email-agust@denx.de>

Hi Anatolij,

I haven't looked deeply, but I've written a couple of minor comments below.

g.

On Tue, Apr 27, 2010 at 10:11 AM, Anatolij Gustschin <agust@denx.de> wrote:
> Adds Freescale USB OTG driver and extends Freescale
> USB SoC Device Controller driver and FSL EHCI driver
> to support OTG operation on MPC5121.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Bruce Schmid <duck@freescale.com>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Cc: Greg Kroah-Hartman <gregkh@suse.de>
> Cc: David Brownell <dbrownell@users.sourceforge.net>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> ---
> =A0arch/powerpc/include/asm/fsl_usb_io.h | =A0106 +++
> =A0drivers/usb/gadget/fsl_udc_core.c =A0 =A0 | =A0357 ++++++++--
> =A0drivers/usb/gadget/fsl_usb2_udc.h =A0 =A0 | =A0 14 +
> =A0drivers/usb/host/ehci-fsl.c =A0 =A0 =A0 =A0 =A0 | =A0261 +++++++-
> =A0drivers/usb/host/ehci-fsl.h =A0 =A0 =A0 =A0 =A0 | =A0 =A03 +
> =A0drivers/usb/host/ehci-hub.c =A0 =A0 =A0 =A0 =A0 | =A0 39 ++
> =A0drivers/usb/host/ehci.h =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A05 +
> =A0drivers/usb/otg/Kconfig =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A08 +
> =A0drivers/usb/otg/Makefile =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A02 +
> =A0drivers/usb/otg/fsl_otg.c =A0 =A0 =A0 =A0 =A0 =A0 | 1199 +++++++++++++=
++++++++++++++++++++
> =A0drivers/usb/otg/fsl_otg.h =A0 =A0 =A0 =A0 =A0 =A0 | =A0418 +++++++++++=
+
> =A0drivers/usb/otg/otg.c =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 17 +
> =A0drivers/usb/otg/otg_fsm.c =A0 =A0 =A0 =A0 =A0 =A0 | =A0368 ++++++++++
> =A0drivers/usb/otg/otg_fsm.h =A0 =A0 =A0 =A0 =A0 =A0 | =A0154 +++++
> =A0include/linux/fsl_devices.h =A0 =A0 =A0 =A0 =A0 | =A0 15 +
> =A015 files changed, 2867 insertions(+), 99 deletions(-)
> =A0create mode 100644 arch/powerpc/include/asm/fsl_usb_io.h
> =A0create mode 100644 drivers/usb/otg/fsl_otg.c
> =A0create mode 100644 drivers/usb/otg/fsl_otg.h
> =A0create mode 100644 drivers/usb/otg/otg_fsm.c
> =A0create mode 100644 drivers/usb/otg/otg_fsm.h
>
> diff --git a/arch/powerpc/include/asm/fsl_usb_io.h b/arch/powerpc/include=
/asm/fsl_usb_io.h
> new file mode 100644
> index 0000000..20c42ef
> --- /dev/null
> +++ b/arch/powerpc/include/asm/fsl_usb_io.h
> @@ -0,0 +1,106 @@
> +/* Copyright (c) 2008 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute =A0it and/or modi=
fy it
> + * under =A0the terms of =A0the GNU General =A0Public License as publish=
ed by the
> + * Free Software Foundation; =A0either version 2 of the =A0License, or (=
at your
> + * option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. =A0See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the =A0GNU General Public License =
along
> + * with this program; if not, write =A0to the Free Software Foundation, =
Inc.,
> + * 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +#ifndef _FSL_USB_IO_H
> +#define _FSL_USB_IO_H
> +
> +/*
> + * On some SoCs, the USB controller registers can be big or little endia=
n,
> + * depending on the version of the chip. =A0For these SoCs, the kernel
> + * should be configured with CONFIG_USB_FSL_BIG_ENDIAN_MMIO enabled.
> + *
> + * Platform code for SoCs that have BE USB registers should set
> + * pdata->big_endian_mmio flag.
> + *
> + * In order to be able to run the same kernel binary on 2 different
> + * versions of an SoC, the BE/LE decision must be made at run time.
> + * _fsl_readl and fsl_writel are pointers to the BE or LE readl()
> + * and writel() functions, and fsl_readl() and fsl_writel() call through
> + * those pointers.
> + *
> + * For SoCs with the usual LE USB registers, don't enable
> + * CONFIG_USB_FSL_BIG_ENDIAN_MMIO, and then fsl_readl() and fsl_writel()
> + * are just macro wrappers for in_le32() and out_le32().
> + *
> + * In either (LE or mixed) case, the function fsl_set_usb_accessors()
> + * should be called at probe time, to either set up the readl/writel
> + * function pointers (mixed case), or do nothing (LE case).
> + *
> + * The host USB drivers already have a mechanism to handle BE/LE
> + * registers. =A0The functionality here is intended to be used by the
> + * gadget and OTG transceiver drivers.
> + *
> + * This file also contains controller-to-cpu accessors for the
> + * USB descriptors, since their endianess is also SoC dependant.
> + * The kernel option CONFIG_USB_FSL_BIG_ENDIAN_DESC configures
> + * which way to go.
> + */
> +
> +#ifdef CONFIG_USB_FSL_BIG_ENDIAN_MMIO
> +static u32 __maybe_unused _fsl_readl_be(const unsigned __iomem *p)
> +{
> + =A0 =A0 =A0 return in_be32(p);
> +}
> +static u32 __maybe_unused _fsl_readl_le(const unsigned __iomem *p)
> +{
> + =A0 =A0 =A0 return in_le32(p);
> +}
> +
> +static void __maybe_unused _fsl_writel_be(u32 v, unsigned __iomem *p)
> +{
> + =A0 =A0 =A0 out_be32(p, v);
> +}
> +static void __maybe_unused _fsl_writel_le(u32 v, unsigned __iomem *p)
> +{
> + =A0 =A0 =A0 out_le32(p, v);
> +}
> +
> +static u32 (*_fsl_readl)(const unsigned __iomem *p);
> +static void (*_fsl_writel)(u32 v, unsigned __iomem *p);

statics defined in a header file?  That doesn't look right.  These
dynamic accessors probably need to be defined in a .c file and linked
to the rest of the driver code.

It is also better practise to put ops like these into the drivers
private instance data structure, but I understand that there is a
large driver impact associated with making that change.

> +
> +#define fsl_readl(p) =A0 =A0 =A0 =A0 =A0 (*_fsl_readl)((p))
> +#define fsl_writel(v, p) =A0 =A0 =A0 (*_fsl_writel)((v), (p))
> +
> +static inline void fsl_set_usb_accessors(struct fsl_usb2_platform_data *=
pdata)
> +{
> + =A0 =A0 =A0 if (pdata->big_endian_mmio) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 _fsl_readl =3D _fsl_readl_be;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 _fsl_writel =3D _fsl_writel_be;
> + =A0 =A0 =A0 } else {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 _fsl_readl =3D _fsl_readl_le;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 _fsl_writel =3D _fsl_writel_le;
> + =A0 =A0 =A0 }
> +}
> +
> +#else /* CONFIG_USB_FSL_BIG_ENDIAN_MMIO */
> +
> +#define fsl_readl(addr) =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0in_le32((addr))
> +#define fsl_writel(val32, addr) out_le32((addr), (val32))
> +
> +static inline void fsl_set_usb_accessors(struct fsl_usb2_platform_data *=
pdata)
> +{
> +}
> +#endif /* CONFIG_USB_FSL_BIG_ENDIAN_MMIO */
> +
> +#ifdef CONFIG_USB_FSL_BIG_ENDIAN_DESC
> +#define cpu_to_hc32(x) (x)
> +#define hc32_to_cpu(x) (x)
> +#else
> +#define cpu_to_hc32(x) cpu_to_le32((x))
> +#define hc32_to_cpu(x) le32_to_cpu((x))
> +#endif
> +
> +#endif /* _FSL_USB_IO_H */
> diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_u=
dc_core.c
> index fa3d142..b5361a8 100644
> --- a/drivers/usb/gadget/fsl_udc_core.c
> +++ b/drivers/usb/gadget/fsl_udc_core.c
> @@ -45,6 +45,7 @@
> =A0#include <asm/system.h>
> =A0#include <asm/unaligned.h>
> =A0#include <asm/dma.h>
> +#include <asm/cacheflush.h>
>
> =A0#include "fsl_usb2_udc.h"
>
> @@ -76,10 +77,7 @@ fsl_ep0_desc =3D {
>
> =A0static void fsl_ep_fifo_flush(struct usb_ep *_ep);
>
> -#ifdef CONFIG_PPC32
> -#define fsl_readl(addr) =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0in_le32(addr)
> -#define fsl_writel(val32, addr) out_le32(addr, val32)
> -#else
> +#ifndef CONFIG_PPC32
> =A0#define fsl_readl(addr) =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0readl(addr)
> =A0#define fsl_writel(val32, addr) writel(val32, addr)
> =A0#endif

I would think these !CONFIG_PPC32 defines should also move into the
header file just so everything is defined in the same place.

Cheers,
g.

^ permalink raw reply

* Re: [PATCH 2/4] powerpc/mpc5121: add USB host support
From: Grant Likely @ 2010-04-27 17:12 UTC (permalink / raw)
  To: Anatolij Gustschin
  Cc: Greg Kroah-Hartman, Wolfgang Denk, Detlev Zundel,
	devicetree-discuss, linux-usb, linuxppc-dev, David Brownell,
	Bruce Schmid
In-Reply-To: <1272384698-4359-3-git-send-email-agust@denx.de>

On Tue, Apr 27, 2010 at 10:11 AM, Anatolij Gustschin <agust@denx.de> wrote:
> Platform specific code for MPC5121 USB Host support.
>
> The patch also contains changes to FSL EHCI platform driver
> needed to support MPC5121 USB controllers. MPC5121 Rev 2.0
> silicon EHCI registers are in big endian format. The
> appropriate flags are set using the information in the
> platform data structure. 83xx system interface registers
> are not available on 512x, so the access to these registers
> is isolated for 512x. Furthermore the USB controller clock
> must be enabled before 512x register access which is done
> by providing platform specific init callback.
>
> The 512x internal USB PHY doesn't provide supply voltage.
> For boards using different power switches allow specifying
> DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal
> PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault"
> properties in the device tree USB node.
>
> Signed-off-by: Bruce Schmid <duck@freescale.com>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Cc: David Brownell <dbrownell@users.sourceforge.net>
> Cc: Greg Kroah-Hartman <gregkh@suse.de>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Kumar Gala <galak@kernel.crashing.org>
> Cc: devicetree-discuss@lists.ozlabs.org
> ---
> =A0Documentation/powerpc/dts-bindings/fsl/usb.txt | =A0 22 ++++
> =A0arch/powerpc/platforms/512x/Kconfig =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A03 =
+
> =A0arch/powerpc/platforms/512x/Makefile =A0 =A0 =A0 =A0 =A0 | =A0 =A02 +-
> =A0arch/powerpc/platforms/512x/mpc5121_usb.c =A0 =A0 =A0| =A0131 ++++++++=
++++++++++++++++
> =A0arch/powerpc/platforms/512x/mpc512x.h =A0 =A0 =A0 =A0 =A0| =A0 =A01 +
> =A0arch/powerpc/platforms/512x/mpc512x_shared.c =A0 | =A0 =A01 +
> =A0arch/powerpc/sysdev/fsl_soc.c =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0=
 20 ++++
> =A0arch/powerpc/sysdev/fsl_soc.h =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0=
 =A09 ++
> =A0drivers/usb/host/ehci-fsl.c =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =
=A0111 +++++++++++++++------
> =A0drivers/usb/host/ehci-fsl.h =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =
=A0 19 ++++-
> =A0drivers/usb/host/ehci-mem.c =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =
=A0 =A02 +-
> =A0include/linux/fsl_devices.h =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =
=A0 13 +++
> =A012 files changed, 301 insertions(+), 33 deletions(-)
> =A0create mode 100644 arch/powerpc/platforms/512x/mpc5121_usb.c
>
> diff --git a/Documentation/powerpc/dts-bindings/fsl/usb.txt b/Documentati=
on/powerpc/dts-bindings/fsl/usb.txt
> index b001524..bd5723f 100644
> --- a/Documentation/powerpc/dts-bindings/fsl/usb.txt
> +++ b/Documentation/powerpc/dts-bindings/fsl/usb.txt
> @@ -8,6 +8,7 @@ and additions :
> =A0Required properties :
> =A0- compatible : Should be "fsl-usb2-mph" for multi port host USB
> =A0 =A0controllers, or "fsl-usb2-dr" for dual role USB controllers
> + =A0 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121
> =A0- phy_type : For multi port host USB controllers, should be one of
> =A0 =A0"ulpi", or "serial". For dual role USB controllers, should be
> =A0 =A0one of "ulpi", "utmi", "utmi_wide", or "serial".
> @@ -33,6 +34,12 @@ Recommended properties :
> =A0- interrupt-parent : the phandle for the interrupt controller that
> =A0 =A0services interrupts for this device.
>
> +Optional properties :
> + - fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the
> + =A0 port power polarity of internal PHY signal DRVVBUS is inverted.
> + - fsl,invert-pwr-fault : boolean; for MPC5121 USB0 only. Indicates
> + =A0 the PWR_FAULT signal polarity is inverted.
> +
> =A0Example multi port host USB controller device node :
> =A0 =A0 =A0 =A0usb@22000 {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl-usb2-mph";
> @@ -57,3 +64,18 @@ Example dual role USB controller device node :
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dr_mode =3D "otg";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0phy =3D "ulpi";
> =A0 =A0 =A0 =A0};
> +
> +Example dual role USB controller device node for MPC5121ADS:
> +
> + =A0 =A0 =A0 usb@4000 {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "fsl,mpc5121-usb2-dr";
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x4000 0x1000>;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 #address-cells =3D <1>;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 #size-cells =3D <0>;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt-parent =3D < &ipic >;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupts =3D <44 0x8>;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dr_mode =3D "otg";
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 phy_type =3D "utmi_wide";
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 fsl,invert-drvvbus;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 fsl,invert-pwr-fault;
> + =A0 =A0 =A0 };

This modification to the device binding looks fine to me.

Cheers,
g.

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Timur Tabi @ 2010-04-27 18:32 UTC (permalink / raw)
  To: Liam Girdwood; +Cc: alsa-devel, kumar.gala, broonie, linuxppc-dev
In-Reply-To: <1272386470.11000.84.camel@odin>

Liam Girdwood wrote:

>> I would need some way for fsl_dma_open() to get a pointer to private,
>> DMA-specific data.  I'm not sure how I can do that.
> 
> In multi-component we now have platform_data and device private data
> (from the regular driver model).

In that case, I still have the same problem with how to generate an 'id' based on a device tree node.  We have the idea of a 'phandle', which is a unique integer for a node, but there's no way to create phandles from within Linux.  They have to exist in the DTS first, and I'm loathe to modify the DTS.


-- 
Timur Tabi
Linux kernel developer at Freescale

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Grant Likely @ 2010-04-27 19:15 UTC (permalink / raw)
  To: Timur Tabi; +Cc: alsa-devel, kumar.gala, broonie, linuxppc-dev, Liam Girdwood
In-Reply-To: <4BD72DB0.20808@freescale.com>

On Tue, Apr 27, 2010 at 12:32 PM, Timur Tabi <timur@freescale.com> wrote:
> Liam Girdwood wrote:
>
>>> I would need some way for fsl_dma_open() to get a pointer to private,
>>> DMA-specific data. =A0I'm not sure how I can do that.
>>
>> In multi-component we now have platform_data and device private data
>> (from the regular driver model).
>
> In that case, I still have the same problem with how to generate an 'id' =
based on a device tree node. =A0We have the idea of a 'phandle', which is a=
 unique integer for a node, but there's no way to create phandles from with=
in Linux. =A0They have to exist in the DTS first, and I'm loathe to modify =
the DTS.

Can you not dynamically assign an id?  If alsa soc needs a unique id
number, then just create a lookup function.  Something like
of_asoc_phandle_to_codec_id() that will either return a previously
assigned id, or will assign a new id.  You shouldn't ever need to add
data to the tree at runtime.

g.

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Grant Likely @ 2010-04-27 19:21 UTC (permalink / raw)
  To: Timur Tabi; +Cc: linuxppc-dev, alsa-devel, broonie, kumar.gala, lrg
In-Reply-To: <1272314980-23679-1-git-send-email-timur@freescale.com>

On Mon, Apr 26, 2010 at 2:49 PM, Timur Tabi <timur@freescale.com> wrote:
> An upcoming change in the architecture of ALSA SoC (ASoC) will require th=
e
> MPC8610 HPCD's ASoC fabric driver to register as a standard platform driv=
er.
> Therefore, we need to call platform_device_register_simple() from the boa=
rd's
> platform code.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
>
> Kumar, the ASoC mainters are willing to pick up this patch, but they want=
 an
> ACK from you first. =A0Or, you could pick it up, since by itself it's har=
mless.
>
> =A0arch/powerpc/platforms/86xx/mpc8610_hpcd.c | =A0 =A03 +++
> =A01 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/pl=
atforms/86xx/mpc8610_hpcd.c
> index 5abe137..66afff3 100644
> --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
> +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
> @@ -98,6 +98,9 @@ static int __init mpc8610_declare_of_platform_devices(v=
oid)
> =A0 =A0 =A0 =A0/* Without this call, the SSI device driver won't get prob=
ed. */
> =A0 =A0 =A0 =A0of_platform_bus_probe(NULL, mpc8610_ids, NULL);
>
> + =A0 =A0 =A0 /* Register the platform device for the ASoC fabric driver =
*/
> + =A0 =A0 =A0 platform_device_register_simple("snd-soc-mpc8610-hpcd", 0, =
NULL, 0);
> +

Since this is a temporary measure, this device registration is
probably best put into the .probe() hook of the i2s driver.  That will
keep everything contained in the same place until we can hammer out a
reasonable binding.

g.

^ permalink raw reply

* gianfar driver with realtime patch does not work
From: Xianghua Xiao @ 2010-04-27 19:26 UTC (permalink / raw)
  To: linuxppc-dev

I'm trying to get 834x/TSEC gianfar.c working with 2.6.33/RT.

when PREEMPT is disabled gianfar driver worked well.

if PREEMPT is enabled, especially when PREEMPT_RT is enabled,
network(gianfar) will be disconnected in about 2-3 minutes under
iperf.

In an older version (2.6.18-rt) where NAPI is disabled, gianfar
performed well under PREEMPT_RT, in the new version of gianfar, NAPI
is enforced(the code is there by default and it's hard to disable NAPI
in the code now), also TX COALESCE is enabled while RX COALESCE is
disabled. It seems to me NAPI is now by default for Rx and COALESCE is
by default for Tx.

Both NAPI/COALESCE may have negative effects for real time systems,
where latency is more important than throughput. Unfortunately it's
hard to disable either of them now after some experiments.

Is there anyone here using gianfar with PREEMPT_RT? Do I have to port
an older version gianfar to get rid of NAPI at least?

Thanks,
Xianghua

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Timur Tabi @ 2010-04-27 20:04 UTC (permalink / raw)
  To: Grant Likely; +Cc: alsa-devel, kumar.gala, broonie, linuxppc-dev, Liam Girdwood
In-Reply-To: <s2ifa686aa41004271215tb3c992c1v8996ce5520896c6c@mail.gmail.com>

Grant Likely wrote:

> Can you not dynamically assign an id?  If alsa soc needs a unique id
> number, then just create a lookup function. 

What I need is something like a hashing function that can convert a "struct device_node *" into an "int".  I'm going to have two functions that independently parse the device tree and locate a specific node.  Both functions will "register the node" with asoc, but they'll use an integer ID to uniquely identify the node.

At least, that's the way ASoC likes to operate.  AsoC takes a fixed string plus a unique integer.  I could technically create a unique string for each DMA device, and have the integer always be 0.

> Something like
> of_asoc_phandle_to_codec_id() that will either return a previously
> assigned id, or will assign a new id.  You shouldn't ever need to add
> data to the tree at runtime.

I know.  It just would have been nice if my nodes already had phandles in them.

-- 
Timur Tabi
Linux kernel developer at Freescale

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Timur Tabi @ 2010-04-27 20:05 UTC (permalink / raw)
  To: Grant Likely; +Cc: linuxppc-dev, alsa-devel, broonie, kumar.gala, lrg
In-Reply-To: <j2qfa686aa41004271221g18f04fbcla8b74861f87b8c84@mail.gmail.com>

Grant Likely wrote:
>> +       /* Register the platform device for the ASoC fabric driver */
>> > +       platform_device_register_simple("snd-soc-mpc8610-hpcd", 0, NULL, 0);
>> > +
> Since this is a temporary measure, this device registration is
> probably best put into the .probe() hook of the i2s driver.  That will
> keep everything contained in the same place until we can hammer out a
> reasonable binding.

This part is not temporary, I think.  The fabric driver will always be a standard platform driver, not an OF driver, because there are no DT nodes that it can probe against.  BenH is suggestion that maybe we can create one, but I'm not sure that's really the best approach.

-- 
Timur Tabi
Linux kernel developer at Freescale

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Grant Likely @ 2010-04-27 20:24 UTC (permalink / raw)
  To: Liam Girdwood; +Cc: alsa-devel, kumar.gala, broonie, linuxppc-dev, Timur Tabi
In-Reply-To: <1272355624.3204.52.camel@odin>

On Tue, Apr 27, 2010 at 2:07 AM, Liam Girdwood <lrg@slimlogic.co.uk> wrote:
> On Tue, 2010-04-27 at 16:36 +1000, Benjamin Herrenschmidt wrote:
>> On Mon, 2010-04-26 at 15:49 -0500, Timur Tabi wrote:
>> > An upcoming change in the architecture of ALSA SoC (ASoC) will require the
>> > MPC8610 HPCD's ASoC fabric driver to register as a standard platform driver.
>> > Therefore, we need to call platform_device_register_simple() from the board's
>> > platform code.
>> >
>> > Signed-off-by: Timur Tabi <timur@freescale.com>
>> > ---
>>
>> Gross. Loses the linkage to device-tree etc... which is useful for audio
>> especially. You should at least make sure the device node follows for
>> the target driver to be able to use it :-) I'd like you to sync with
>> Grant work on that matter if you are going to convert of_devices into
>> platform_devices.
>
> Timur, please correct my device tree understanding form our IRC
> conversation if I'm wrong here.
>
> I think one of the difficulties encountered here is that the device tree
> root for sound in this case is the SSI (Digital Audio Interface)
> controller and not the sound card as in ASoC. So maybe the problem is
> how do we represent an ASoC sound card in the device tree ?

Most likely this is currently a problem, yes.  *however* the device
tree is just data.  It is convenient and useful to have a common
representation between similar kinds of devices, but it isn't
mandatory.  The device tree structure does *not* need to have a 1:1
correspondence to the ASoC device registrations.

So, the current 86xx device tree binding assumes a simple layout with
a node describing an DAI controller, and another node describing the
codec with a single phandle (pointer) from the DAI to the codec.  In
this configuration, it is completely reasonable for the DAI node to
trigger both the instantiation of the ASoC DAI controller device and
the sound card device.  Linux can treat them as separate even though
the current device tree has a simplistic representation.

> The sound card within ASoC is a compound device that is made up of the
> SSI, Codec and audio DMA engine components. The SSI/Codec/DMA components
> do not have to be the sound cards child devices wrt the driver model but
> do register with the ASoC core and are 'joined' with each other and the
> sound card driver to form a working audio device.

Right.  This makes sense to me.

> Now I don't know the mechanics of adding an ASoC sound card to the
> device tree, but the device tree should be able to define an ASoC sound
> card and also represent the relationships between the sound card and the
> SSI/Codec/DMA components. The components should also be represented in
> the device tree. Parsing the device tree should probe() all the ASoC
> components and sound card. The ASoC core would then instantiated them as
> a sound device.

I've tried very hard to maintain a distinction between device tree
binding (representation) and Linux kernel internal implementation
details.  The real question is whether or not the binding provides
sufficient detail for the operating system to figure out what to do.
In the extreme minimalist case, the audio driver could decide how to
configure itself solely on the board name property of the root node.
There is nothing wrong with that, but it also means that no data is
available to dynamically select common modules or modify connections;
it all has to be hard coded.

The 8610 device tree looks something like this right now:

	[...]
		cs4270:codec@4f {
			compatible = "cirrus,cs4270";
			reg = <0x4f>;
			/* MCLK source is a stand-alone oscillator */
			clock-frequency = <12288000>;
		};
	[...]
	ssi@16000 {
		compatible = "fsl,mpc8610-ssi";
		[...]
		fsl,mode = "i2s-slave";
		codec-handle = <&cs4270>;
		fsl,playback-dma = <&dma00>;
		fsl,capture-dma = <&dma01>;
		fsl,fifo-depth = <8>;
		sleep = <&pmc 0 0x08000000>;
	};
	[...]

(I've omitted the DMA nodes and some irrelevant details)  This is
enough information for a simplistic driver registration that probably
makes a lot of assumptions.  Such as the ssi represents a single
logical sound device.  It won't handle complex representations, but in
a lot of cases that may be just fine.

However, as you and Mark rightly point out, it completely fails to
represent complex sound devices with weird clocking and strange
routes.  Something like this is probably more appropriate:

	[...]
		codec1 :codec@4f {
			compatible = "cirrus,cs4270";
			reg = <0x4f>;
			/* MCLK source is a stand-alone oscillator */
			clock-frequency = <12288000>;
		};
	[...]
	ssi1: ssi@16000 {
		compatible = "fsl,mpc8610-ssi";
		[...]
		fsl,mode = "i2s-slave";
		fsl,playback-dma = <&dma00>;
		fsl,capture-dma = <&dma01>;
		fsl,fifo-depth = <8>;
		sleep = <&pmc 0 0x08000000>;
	};
	[...]
	sound {
		compatible = "fsl,mpc8610-hpcd-sound";
		/* maybe something like (totally off the top of my head) */
		dai-links = <&ssi1 0 &codec 0
		             &ssi1 1 &codec 1>;
		[...]
	};

Where the 'sound' node is now the starting point for representing a
logical sound device instead of the ssi node.  This binding probably
makes more sense (but I'm not committing to anything like this until I
see a real proposal for a real device).

The question for the drivers is more around how to deal with the data
provided.  I've got zero issues with platform specific code to handle
things that aren't easily described in a device tree.  The point is to
make the common cases data-driven so that common code will handle
them.  The complex corner cases are still complex corner cases that
need platform specific code.

Or, in other words, the device tree should *not* be used to describe
every possible detail and permutation.  It is best used to describe
the permutations that are common so that they don't need to be hard
coded for each and every board.

I would solve the problem this way: In the ssi driver, if the
codec-node property is present, then call a function to instantiate a
simple or platform specific sound card instance that makes the
assumptions listed above.  If not, then just register the ssi and
exit, which leaves the ssi available for a separate driver to pick it
up.  I wouldn't do this for new platforms, but it gracefully makes use
of the data provided in the current 8610 device tree.

BTW Timur, there is nothing wrong with registering multiple devices
that all have the of_node pointer set to the same node.

g.

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Grant Likely @ 2010-04-27 20:27 UTC (permalink / raw)
  To: Benjamin Herrenschmidt
  Cc: alsa-devel, kumar.gala, Mark Brown, linuxppc-dev, Timur Tabi, lrg
In-Reply-To: <1272362955.24542.24.camel@pasglop>

On Tue, Apr 27, 2010 at 4:09 AM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Tue, 2010-04-27 at 10:54 +0100, Mark Brown wrote:
>> I'd just like to add that I *really* want to see you guys come to some
>> sort of firm and documented conclusion about the way to handle
>> situations like this. =A0Some variant of this seems to come up every
>> single time anyone tries to do anything to do with audio on a system
>> using the device tree and it's getting really repetitive. =A0What would =
be
>> really useful for audio at this point would be if we could get some sort
>> of decision about how to represent this stuff which we can point people
>> at so that work on systems using the device tree can be done without
>> having to deal with the device tree layout discussions that frequently
>> seem to be involved.

Yes, you're right.  I completely agree.

[...]
> Keep in mind that it's perfectly kosher to create nodes for "virtual"
> devices. IE. We could imagine a node for the "sound subsystem" that
> doesn't actually correspond to any physical device but contain the
> necessary properties that binds everything together. You could even have
> multiple of these if you have separate set of sound HW that aren't
> directly dependant.
>
> I don't have bandwidth to contribute much in this discussion right now,
> at least not to lead it, so I'm happy to let others do so, but I'm happy
> to provide feedback from my own experience as proposals are made.

Unfortunately, I'm in the same boat.  :-(  However, I'll be at UDS in
2 weeks time, and I know audio is a big concern for the Ubuntu folks.
A bunch of the ARM vendors will be there too.  I'll schedule a session
to talk about audio bindings and hopefully that way make some headway
on defining a binding that makes sense and is actually useful.

g.

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Mark Brown @ 2010-04-27 20:38 UTC (permalink / raw)
  To: Timur Tabi; +Cc: alsa-devel, kumar.gala, linuxppc-dev, Liam Girdwood
In-Reply-To: <4BD74351.9030704@freescale.com>

On Tue, Apr 27, 2010 at 03:04:33PM -0500, Timur Tabi wrote:

[Reflowed into 80 columns]

> At least, that's the way ASoC likes to operate.  AsoC takes a fixed
> string plus a unique integer.  I could technically create a unique
> string for each DMA device, and have the integer always be 0.

This seems like the most direct approach to your problem - as with other
subsystems the .id is there mostly to provide deduping when the string
is always the same, if you can easily come up with sensible names you
can just use those.

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Timur Tabi @ 2010-04-27 20:46 UTC (permalink / raw)
  To: Grant Likely; +Cc: alsa-devel, kumar.gala, broonie, linuxppc-dev, Liam Girdwood
In-Reply-To: <g2mfa686aa41004271324g8ff0d67fi3df4336cb25e9acc@mail.gmail.com>

Grant Likely wrote:

> So, the current 86xx device tree binding assumes a simple layout with
> a node describing an DAI controller, and another node describing the
> codec with a single phandle (pointer) from the DAI to the codec.  In
> this configuration, it is completely reasonable for the DAI node to
> trigger both the instantiation of the ASoC DAI controller device and
> the sound card device.  Linux can treat them as separate even though
> the current device tree has a simplistic representation.

The only problem with this is that there is board-specific programming that needs to be done (look at mpc8610_hpcd_machine_probe), so we still need to have a fabric driver that is independent of the SSI, codec, or DMA drivers.  The P1022 also has an SSI, and I'm hoping that all I need to do is create a new fabric driver, not hack up the SSI driver to support board programming. 

So if the fabric driver still needs to exist, then it still needs a struct device, and it still needs to register with asoc.  I don't see how I can register the sound card itself in the SSI driver, because it won't know anything about the board-specific code in the fabric driver.

> I've tried very hard to maintain a distinction between device tree
> binding (representation) and Linux kernel internal implementation
> details.  The real question is whether or not the binding provides
> sufficient detail for the operating system to figure out what to do.

I think it does, because it's working today.

> In the extreme minimalist case, the audio driver could decide how to
> configure itself solely on the board name property of the root node.
> There is nothing wrong with that, but it also means that no data is
> available to dynamically select common modules or modify connections;
> it all has to be hard coded.

Well, asoc already has several hard-coded requirements:

	machine_data->dai.cpu_dai_drv = &fsl_ssi_dai;
	machine_data->dai.codec_dai_drv = &cs4270_dai;
	machine_data->dai.codec_drv = &soc_codec_device_cs4270;
	machine_data->dai.ops = &mpc8610_hpcd_ops;
	machine_data->dai.platform_drv = &fsl_soc_platform;

So even though I probe for each device separately and register them separately, the fabric driver still needs to have hard-coded addresses 

Maybe the asoc guys can tell me why I need to register the cpu_dai_drv structure via platform_device_add(), when it's already being registered via snd_soc_register_dai().

> (I've omitted the DMA nodes and some irrelevant details)  This is
> enough information for a simplistic driver registration that probably
> makes a lot of assumptions.  Such as the ssi represents a single
> logical sound device.  It won't handle complex representations, but in
> a lot of cases that may be just fine.

Why would I ever represent the SSI as anything but a single logical sound device?  Let ALSA handle synchronizing multiple streams together if it wants to.

> 	sound {
> 		compatible = "fsl,mpc8610-hpcd-sound";
> 		/* maybe something like (totally off the top of my head) */
> 		dai-links = <&ssi1 0 &codec 0
> 		             &ssi1 1 &codec 1>;
> 		[...]
> 	};

I don't know when I would ever do this.  The two SSI devices are completely independent.  Why would I bind them together into one "device"?

> Where the 'sound' node is now the starting point for representing a
> logical sound device instead of the ssi node.  This binding probably
> makes more sense (but I'm not committing to anything like this until I
> see a real proposal for a real device).

The only issue I have with this is all it does is turn the fabric driver from a platform driver that scans the OF tree, into an OF driver that still needs to query the device tree to get all the data it needs.  For example, the fabric driver still needs to know the clock frequency and direction of the codec node, so that it can call snd_soc_dai_set_fmt() and snd_soc_dai_set_sysclk() properly.  To eliminate that, we could have the fabric driver never call these functions, and expect the SSI and codec drivers to gather this information itself.  But the codec driver is not an OF driver, so it has no expectation of being able to query the codec node.

> I would solve the problem this way: In the ssi driver, if the
> codec-node property is present, then call a function to instantiate a
> simple or platform specific sound card instance that makes the
> assumptions listed above.  If not, then just register the ssi and
> exit, which leaves the ssi available for a separate driver to pick it
> up.  I wouldn't do this for new platforms, but it gracefully makes use
> of the data provided in the current 8610 device tree.

Eh, I'll have to think about that.  The absence of a codec pointer in the SSI node means that the SSI is not connected to a codec, so it should just be ignored altogether.  An SSI is useless if it's not connected to a codec.

> BTW Timur, there is nothing wrong with registering multiple devices
> that all have the of_node pointer set to the same node.

Sorry, I don't understand what you're getting at.

-- 
Timur Tabi
Linux kernel developer at Freescale

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Mark Brown @ 2010-04-27 20:50 UTC (permalink / raw)
  To: Grant Likely; +Cc: alsa-devel, kumar.gala, linuxppc-dev, Timur Tabi, lrg
In-Reply-To: <j2pfa686aa41004271327v1658e33bgd170ecc9735f285b@mail.gmail.com>

On Tue, Apr 27, 2010 at 02:27:42PM -0600, Grant Likely wrote:
> On Tue, Apr 27, 2010 at 4:09 AM, Benjamin Herrenschmidt

> > I don't have bandwidth to contribute much in this discussion right now,
> > at least not to lead it, so I'm happy to let others do so, but I'm happy
> > to provide feedback from my own experience as proposals are made.

> Unfortunately, I'm in the same boat.  :-(  However, I'll be at UDS in
> 2 weeks time, and I know audio is a big concern for the Ubuntu folks.
> A bunch of the ARM vendors will be there too.  I'll schedule a session
> to talk about audio bindings and hopefully that way make some headway
> on defining a binding that makes sense and is actually useful.

Hrm, the only issue that's been raised upstream is multi-CODEC (there
are one or two other things that boil down to multi-CODEC, but nothing
else I'm aware of).  If you schedule something please announce it here,
I believe that UDS generally has arrangements for remote participation.

Note that most of the complexity explosion you'll see here is visible in
things like phones more than the sort of devices you'd run Ubuntu on
currently and much of it isn't really visible to a lot of the CPU
vendors at all since it's generally all handled off the CPU.

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Timur Tabi @ 2010-04-27 20:53 UTC (permalink / raw)
  To: Mark Brown; +Cc: alsa-devel, kumar.gala, linuxppc-dev, lrg
In-Reply-To: <20100427205004.GB15083@opensource.wolfsonmicro.com>

Mark Brown wrote:
> Hrm, the only issue that's been raised upstream is multi-CODEC (there
> are one or two other things that boil down to multi-CODEC, but nothing
> else I'm aware of).  If you schedule something please announce it here,
> I believe that UDS generally has arrangements for remote participation.

Keep in mind that the phandle-type properties can accept multiple phandles.  So for instance, if I had two codecs attached to an SSI, the SSI node would look like this:

	ssi@16000 {
		compatible = "fsl,mpc8610-ssi";
		...
		codec-handle = <&cs4270_1 &cs4270_2>;
	};

-- 
Timur Tabi
Linux kernel developer at Freescale

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Mark Brown @ 2010-04-27 20:59 UTC (permalink / raw)
  To: Timur Tabi; +Cc: alsa-devel, kumar.gala, linuxppc-dev, Liam Girdwood
In-Reply-To: <4BD74D0C.40303@freescale.com>

On Tue, Apr 27, 2010 at 03:46:04PM -0500, Timur Tabi wrote:

[Reflowed into 80 columns; please fix your mail client.]

> > (I've omitted the DMA nodes and some irrelevant details)  This is
> > enough information for a simplistic driver registration that probably
> > makes a lot of assumptions.  Such as the ssi represents a single
> > logical sound device.  It won't handle complex representations, but in

> Why would I ever represent the SSI as anything but a single logical
> sound device?  Let ALSA handle synchronizing multiple streams together
> if it wants to.

...

> > 		dai-links = <&ssi1 0 &codec 0
> >                            &ssi1 1 &codec 1>;
> > 		[...]

> I don't know when I would ever do this.  The two SSI devices are
> completely independent.  Why would I bind them together into one
> "device"?

It's entirely possible that if the board designer intended the verious
SSIs to be used in concert they've done something like cross wire the
clocks which creates a board-specific interrelationship that needs to be
dealt with.

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Timur Tabi @ 2010-04-27 21:03 UTC (permalink / raw)
  To: Mark Brown; +Cc: alsa-devel, kumar.gala, linuxppc-dev, Liam Girdwood
In-Reply-To: <20100427205924.GC15083@opensource.wolfsonmicro.com>

Mark Brown wrote:
> It's entirely possible that if the board designer intended the verious
> SSIs to be used in concert they've done something like cross wire the
> clocks which creates a board-specific interrelationship that needs to be
> dealt with.

Fine, but I don't see how that can be handled with the current code.  Each SSI is independent, and audio is streamed to it via DMA.  The current SSI driver would need to be completely rewritten in order to initiate both DMA operations simultaneously.  The clocking is the least of my problems.

-- 
Timur Tabi
Linux kernel developer at Freescale

^ permalink raw reply

* Re: [alsa-devel] [PATCH 1/2] powerpc: add platform registration for ALSA SoC drivers
From: Mark Brown @ 2010-04-27 21:11 UTC (permalink / raw)
  To: Timur Tabi; +Cc: alsa-devel, kumar.gala, linuxppc-dev, Liam Girdwood
In-Reply-To: <4BD7511F.7090201@freescale.com>

On Tue, Apr 27, 2010 at 04:03:27PM -0500, Timur Tabi wrote:

[Reflowing the text into 80 columns again]

> Mark Brown wrote:
> > It's entirely possible that if the board designer intended the verious
> > SSIs to be used in concert they've done something like cross wire the
> > clocks which creates a board-specific interrelationship that needs to be
> > dealt with.

> Fine, but I don't see how that can be handled with the current code.
> Each SSI is independent, and audio is streamed to it via DMA.  The
> current SSI driver would need to be completely rewritten in order to
> initiate both DMA operations simultaneously.  The clocking is the least
> of my problems.

I believe the usual technique is to start the DMA then clock the bus -
data doesn't flow over the bus until the clock appears and that appears
everywhere simultaneously.  Obviously some hardware really doesn't like
having the DMA blocked like that, but not all.

^ permalink raw reply

* [patch 1/1] powerpc: add rcu_read_lock() to gup_fast() implementation
From: akpm @ 2010-04-27 21:10 UTC (permalink / raw)
  To: benh; +Cc: npiggin, riel, a.p.zijlstra, linuxppc-dev, akpm, paulmck

From: Peter Zijlstra <a.p.zijlstra@chello.nl>

The powerpc page table freeing relies on the fact that IRQs hold off an
RCU grace period, this is currently true for all existing RCU
implementations but is not an assumption Paul wants to support.

Therefore, also take the RCU read lock along with disabling IRQs to ensure
the RCU grace period does at least cover these lookups.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Requested-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
---

 arch/powerpc/mm/gup.c |    3 +++
 1 file changed, 3 insertions(+)

diff -puN arch/powerpc/mm/gup.c~powerpc-add-rcu_read_lock-to-gup_fast-implementation arch/powerpc/mm/gup.c
--- a/arch/powerpc/mm/gup.c~powerpc-add-rcu_read_lock-to-gup_fast-implementation
+++ a/arch/powerpc/mm/gup.c
@@ -142,6 +142,7 @@ int get_user_pages_fast(unsigned long st
 	 * So long as we atomically load page table pointers versus teardown,
 	 * we can follow the address down to the the page and take a ref on it.
 	 */
+	rcu_read_lock();
 	local_irq_disable();
 
 	pgdp = pgd_offset(mm, addr);
@@ -162,6 +163,7 @@ int get_user_pages_fast(unsigned long st
 	} while (pgdp++, addr = next, addr != end);
 
 	local_irq_enable();
+	rcu_read_unlock();
 
 	VM_BUG_ON(nr != (end - start) >> PAGE_SHIFT);
 	return nr;
@@ -171,6 +173,7 @@ int get_user_pages_fast(unsigned long st
 
 slow:
 		local_irq_enable();
+		rcu_read_unlock();
 slow_irqon:
 		pr_devel("  slow path ! nr = %d\n", nr);
 
_

^ permalink raw reply

* Re: [PATCH] add icswx support
From: Tseng-Hui (Frank) Lin @ 2010-04-27 21:56 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1272070551.2330.213.camel@pasglop>

On Sat, 2010-04-24 at 10:55 +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2010-04-23 at 17:04 -0500, Tseng-Hui (Frank) Lin wrote:
> > Add Power7 icswx co-processor instruction support.
> 
> Please provide a -much- more detailed explanation of what it is, what it
> does and why it requires hooking into the MMU context switch code. _I_
> know these things but nobody else on the list does which limits the
> ability of people to review your patch.
>

icswx is a PowerPC co-processor instruction to send data to a 
co-processor. On Book-S processors the LPAR_ID and process ID (PID) of 
the owning process are registered in the window context of the
co-processor at initial time. When the icswx instruction is executed,
the L2 generates a cop-reg transaction on PowerBus. The transaction has
no address and the processor does not perform an MMU access to 
authenticate the transaction. The coprocessor compares the LPAR_ID and
the PID included in the transaction and the LPAR_ID and PID held in the
window context to determine if the process is authorized to generate the
transaction.

> > Signed-off-by: Sonny Rao <sonnyrao@linux.vnet.ibm.com>
> > Signed-off-by: Tseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com>
> > ---
> >  arch/powerpc/include/asm/mmu-hash64.h  |    3 +
> >  arch/powerpc/include/asm/mmu_context.h |    4 ++
> >  arch/powerpc/include/asm/reg.h         |    3 +
> >  arch/powerpc/mm/mmu_context_hash64.c   |   79
> > ++++++++++++++++++++++++++++++++
> >  4 files changed, 89 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/powerpc/include/asm/mmu-hash64.h
> > b/arch/powerpc/include/asm/mmu-hash64.h
> > index 2102b21..ba5727d 100644
> > --- a/arch/powerpc/include/asm/mmu-hash64.h
> > +++ b/arch/powerpc/include/asm/mmu-hash64.h
> > @@ -421,6 +421,9 @@ typedef struct {
> >  #ifdef CONFIG_PPC_SUBPAGE_PROT
> >  	struct subpage_prot_table spt;
> >  #endif /* CONFIG_PPC_SUBPAGE_PROT */
> > +	unsigned long acop;
> > +#define HASH64_MAX_PID (0xFFFF)
> > +	unsigned int pid;
> 
> Please add a comment as to what those two fields are about, something
> like acop; /* mask of enabled coprocessor types */ and pid /* pid
> value used with coprocessors */ or something like that.
> 
> >  } mm_context_t;
> >  
> > 
> > diff --git a/arch/powerpc/include/asm/mmu_context.h
> > b/arch/powerpc/include/asm/mmu_context.h
> > index 26383e0..d6c8841 100644
> > --- a/arch/powerpc/include/asm/mmu_context.h
> > +++ b/arch/powerpc/include/asm/mmu_context.h
> > @@ -78,6 +78,10 @@ static inline void switch_mm(struct mm_struct *prev,
> > struct mm_struct *next,
> >  
> >  #define deactivate_mm(tsk,mm)	do { } while (0)
> >  
> > +extern void switch_cop(struct mm_struct *next);
> > +extern int  use_cop(unsigned long acop, struct task_struct *task);
>               ^ remove that space
> > +extern void disuse_cop(unsigned long acop, struct mm_struct *mm);
> 
> I'd prefer "drop" or "forget" :-)
> 
> > +
> >  /*
> >   * After we have set current->mm to a new value, this activates
> >   * the context for the new mm so we see the new mappings.
> > diff --git a/arch/powerpc/include/asm/reg.h
> > b/arch/powerpc/include/asm/reg.h
> > index 5572e86..30503f8 100644
> > --- a/arch/powerpc/include/asm/reg.h
> > +++ b/arch/powerpc/include/asm/reg.h
> > @@ -516,6 +516,9 @@
> >  #define SPRN_SIAR	780
> >  #define SPRN_SDAR	781
> >  
> > +#define SPRN_ACOP	 31
> > +#define SPRN_PID	 48
> > +
> 
> Remove the definition of SPRN_PID from reg_booke.h to avoid a double
> definition then.
> 
> >  #define SPRN_PA6T_MMCR0 795
> >  #define   PA6T_MMCR0_EN0	0x0000000000000001UL
> >  #define   PA6T_MMCR0_EN1	0x0000000000000002UL
> > diff --git a/arch/powerpc/mm/mmu_context_hash64.c
> > b/arch/powerpc/mm/mmu_context_hash64.c
> > index 2535828..d0a79f6 100644
> > --- a/arch/powerpc/mm/mmu_context_hash64.c
> > +++ b/arch/powerpc/mm/mmu_context_hash64.c
> > @@ -18,6 +18,7 @@
> >  #include <linux/mm.h>
> >  #include <linux/spinlock.h>
> >  #include <linux/idr.h>
> > +#include <linux/percpu.h>
> >  #include <linux/module.h>
> >  #include <linux/gfp.h>
> >  
> > @@ -25,6 +26,82 @@
> >  
> >  static DEFINE_SPINLOCK(mmu_context_lock);
> >  static DEFINE_IDA(mmu_context_ida);
> > +static DEFINE_IDA(cop_ida);
> > +
> > +/* Lazy switch the ACOP register */
> > +static DEFINE_PER_CPU(unsigned long, acop_reg);
> > +
> > +void switch_cop(struct mm_struct *next)
> > +{
> > +	mtspr(SPRN_PID, next->context.pid);
> > +	if (next->context.pid &&
> > +	    __get_cpu_var(acop_reg) != next->context.acop) {
> > +		mtspr(SPRN_ACOP, next->context.acop);
> > +		__get_cpu_var(acop_reg) = next->context.acop;
> > +	}
> > +}
> 
> The above doesn't appear to be called anywhere ?
> 
> > +int use_cop(unsigned long acop, struct task_struct *task)
> > +{
> > +	int pid;
> > +	int err;
> > +	struct mm_struct *mm = get_task_mm(task);
> > +
> > +	if (!mm)
> > +		return -EINVAL;
> > +
> > +	if (!mm->context.pid) {
> > +		if (!ida_pre_get(&cop_ida, GFP_KERNEL))
> > +			return -ENOMEM;
> > +again:
> > +		spin_lock(&mmu_context_lock);
> > +		err = ida_get_new_above(&cop_ida, 1, &pid);
> > +		spin_unlock(&mmu_context_lock);
> > +
> > +		if (err == -EAGAIN)
> > +			goto again;
> > +		else if (err)
> > +			return err;
> > +
> > +		if (pid > HASH64_MAX_PID) {
> > +			spin_lock(&mmu_context_lock);
> > +			ida_remove(&cop_ida, pid);
> > +			spin_unlock(&mmu_context_lock);
> > +			return -EBUSY;
> > +		}
> > +		mm->context.pid = pid;
> > +		mtspr(SPRN_PID,  mm->context.pid);
> 
> Shouldn't the above be ?
> 
> 	if (mm == current->active_mm)
> 		mtspr(....)
> 
> > +	}
> > +	mm->context.acop |= acop;
> 
> Locking ?
> 
> > +	get_cpu_var(acop_reg) = mm->context.acop;
> > +	mtspr(SPRN_ACOP, mm->context.acop);
> 
> Same comment about testing for current.
> 
> > +	put_cpu_var(acop_reg);
> > +
> > +	return mm->context.pid;
> > +}
> > +EXPORT_SYMBOL(use_cop);
> > +
> > +void disuse_cop(unsigned long acop, struct mm_struct *mm)
> > +{
> > +	if (WARN_ON(!mm))
> > +		return;
> > +
> > +	mm->context.acop &= ~acop;
> 
> Shouldn't the above need some kind of locking if multiple threads hit it
> with different "acop" values ?
> 
> > +	if (!mm->context.acop) {
> > +		spin_lock(&mmu_context_lock);
> > +		ida_remove(&cop_ida, mm->context.pid);
> > +		spin_unlock(&mmu_context_lock);
> > +		mm->context.pid = 0;
> > +		mtspr(SPRN_PID, 0);
> 
> Same comment about current.
> 
> > +	} else {
> > +		get_cpu_var(acop_reg) = mm->context.acop;
> > +		mtspr(SPRN_ACOP, mm->context.acop);
> 
> Same comment.
> 
> > +		put_cpu_var(acop_reg);
> > +	}
> > +	mmput(mm);
> > +}
> > +EXPORT_SYMBOL(disuse_cop);
> >  
> >  /*
> >   * The proto-VSID space has 2^35 - 1 segments available for user
> > mappings.
> > @@ -94,6 +171,8 @@ EXPORT_SYMBOL_GPL(__destroy_context);
> >  void destroy_context(struct mm_struct *mm)
> >  {
> >  	__destroy_context(mm->context.id);
> > +	if (mm->context.pid)
> > +		ida_remove(&cop_ida, mm->context.pid);
> >  	subpage_prot_free(mm);
> >  	mm->context.id = NO_CONTEXT;
> >  }
> 
> Cheers,
> Ben.
> 
> 
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev

^ permalink raw reply

* Re: [PATCH] add icswx support
From: Benjamin Herrenschmidt @ 2010-04-27 22:01 UTC (permalink / raw)
  To: Tseng-Hui (Frank) Lin; +Cc: linuxppc-dev
In-Reply-To: <1272405410.6329.16.camel@flin.austin.ibm.com>

On Tue, 2010-04-27 at 16:56 -0500, Tseng-Hui (Frank) Lin wrote:

> icswx is a PowerPC co-processor instruction to send data to a 
> co-processor. On Book-S processors the LPAR_ID and process ID (PID) of 
> the owning process are registered in the window context of the
> co-processor at initial time. When the icswx instruction is executed,
> the L2 generates a cop-reg transaction on PowerBus. The transaction has
> no address and the processor does not perform an MMU access to 
> authenticate the transaction. The coprocessor compares the LPAR_ID and
> the PID included in the transaction and the LPAR_ID and PID held in the
> window context to determine if the process is authorized to generate the
> transaction.

Ok, good, then stick that in the cset comment of your next patch
submission after you've addresses all my other comments :-)

Cheers,
Ben.

^ permalink raw reply

* [PATCHv2] [RFC] Xilinx MPMC SDMA subsystem
From: Sergey Temerkhanov @ 2010-04-27 22:06 UTC (permalink / raw)
  To: linuxppc-dev, Grant Likely, microblaze-uclinux,
	Linux Kernel Mailing List

[-- Attachment #1: Type: text/plain, Size: 365 bytes --]

This is the 2nd version of Xilinx MPMC LocalLink SDMA subsystem

Changelog v2:
* Changed the functions and struct definition prefix from sdma_ to xllsdma_
* Platform bus bindings and various changes by Steven J. Magnani.
* Moved source files from arch/powerpc/sysdev to global locations and added
  CONFIG_XLLSDMA option.

Regards, Sergey Temerkhanov,
Cifronic ZAO

[-- Attachment #2: sdma.patch --]
[-- Type: text/x-patch, Size: 30469 bytes --]

diff -r baced9e29ab5 drivers/dma/Kconfig
--- a/drivers/dma/Kconfig	Tue Apr 27 20:48:50 2010 +0400
+++ b/drivers/dma/Kconfig	Wed Apr 28 02:00:51 2010 +0400
@@ -97,6 +97,14 @@
 	  Support the TXx9 SoC internal DMA controller.  This can be
 	  integrated in chips such as the Toshiba TX4927/38/39.
 
+config XLLSDMA
+	bool "Xilinx MPMC DMA support"
+	depends on XILINX_VIRTEX || MICROBLAZE
+	select DMA_ENGINE
+	help
+	  Support fot Xilinx MPMC LocalLink SDMA. Virtex FPGA family
+	  has it integrated or fabric-based.
+
 config DMA_ENGINE
 	bool
 
@@ -133,3 +141,5 @@
 	  DMA Device driver.
 
 endif
+
+
diff -r baced9e29ab5 drivers/dma/Makefile
--- a/drivers/dma/Makefile	Tue Apr 27 20:48:50 2010 +0400
+++ b/drivers/dma/Makefile	Wed Apr 28 02:00:51 2010 +0400
@@ -10,3 +10,4 @@
 obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
 obj-$(CONFIG_MX3_IPU) += ipu/
 obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
+obj-$(CONFIG_XLLSDMA) += xllsdma.o
diff -r baced9e29ab5 drivers/dma/xllsdma.c
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/drivers/dma/xllsdma.c	Wed Apr 28 02:00:51 2010 +0400
@@ -0,0 +1,887 @@
+/*
+ * SDMA subsystem support for Xilinx MPMC.
+ *
+ * Author: Sergey Temerkhanov
+ * Platform Bus by Steven J. Magnani
+ *
+ * Copyright (c) 2008-2010 Cifronic ZAO
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <linux/list.h>
+#include <linux/io.h>
+#include <linux/xllsdma.h>
+
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+
+#define DRV_VERSION "0.1.0"
+#define DRV_NAME "sdma"
+
+MODULE_AUTHOR("Sergey Temerkhanov <temerkhanov@cifronik.ru>");
+MODULE_DESCRIPTION("Xilinx SDMA driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(DRV_VERSION);
+
+LIST_HEAD(mpmc_devs);
+DEFINE_MUTEX(mpmc_devs_lock);
+
+enum {
+	XLLSDMA_TX_REGS	= 0x00,	/* TX channel registers beginning */
+	XLLSDMA_RX_REGS	= 0x20,	/* RX channel registers beginning */
+	XLLSDMA_DMACR	= 0x40,	/* DMA control register */
+
+	XLLSDMA_NDESCR	= 0x00,	/* Next descriptor address */
+	XLLSDMA_BUFA	= 0x04,	/* Current buffer address */
+	XLLSDMA_BUFL	= 0x08,	/* Current buffer length */
+	XLLSDMA_CDESCR	= 0x0C,	/* Current descriptor address */
+	XLLSDMA_TDESCR	= 0x10,	/* Tail descriptor address */
+	XLLSDMA_CR	= 0x14,	/* Channel control */
+	XLLSDMA_IRQ	= 0x18,	/* Interrupt register */
+	XLLSDMA_SR	= 0x1C,	/* Status */
+};
+
+enum {
+	XLLSDMA_CR_IRQ_TIMEOUT_MSK   = (0xFF << 24),	/* Interrupt coalesce timeout */
+	XLLSDMA_CR_IRQ_THRESHOLD_MSK = (0xFF << 16),	/* Interrupt coalesce count */
+	XLLSDMA_CR_MSB_ADDR_MSK	     = (0xF << 12),	/* MSB for 36 bit addressing */
+	XLLSDMA_CR_APP_EN	  = (1 << 11),	/* Application data mask enable */
+	XLLSDMA_CR_1_BIT_CNT	  = (1 << 10),	/* All interrupt counters are 1-bit */
+	XLLSDMA_CR_INT_ON_END	  = (1 << 9),	/* Interrupt-on-end */
+	XLLSDMA_CR_LD_IRQ_CNT	  = (1 << 8),	/* Load IRQ_COUNT */
+	XLLSDMA_CR_IRQ_EN	  = (1 << 7),	/* Master interrupt enable */
+	XLLSDMA_CR_IRQ_ERROR	  = (1 << 2),	/* Error interrupt enable */
+	XLLSDMA_CR_IRQ_TIMEOUT	  = (1 << 1),	/* Coalesce timeout interrupt enable */
+	XLLSDMA_CR_IRQ_THRESHOLD  = (1 << 0),	/* Coalesce threshold interrupt enable */
+
+	XLLSDMA_CR_IRQ_ALL	  = XLLSDMA_CR_IRQ_EN | XLLSDMA_CR_IRQ_ERROR |
+					XLLSDMA_CR_IRQ_TIMEOUT | XLLSDMA_CR_IRQ_THRESHOLD,
+
+	XLLSDMA_CR_IRQ_TIMEOUT_SH   = 24,
+	XLLSDMA_CR_IRQ_THRESHOLD_SH = 16,
+	XLLSDMA_CR_MSB_ADDR_SH	    = 12,
+
+	XLLSDMA_IRQ_WRQ_EMPTY	 = (1 << 14),	/* Write Command Queue Empty (rx) */
+	XLLSDMA_IRQ_PLB_RD_ERROR = (1 << 4),	/* PLB Read Error IRQ */
+	XLLSDMA_IRQ_PLB_WR_ERROR = (1 << 3),	/* PLB Write Error IRQ */
+	XLLSDMA_IRQ_ERROR	 = (1 << 2),	/* Error IRQ */
+	XLLSDMA_IRQ_TIMEOUT	 = (1 << 1),	/* Coalesce timeout IRQ */
+	XLLSDMA_IRQ_THRESHOLD	 = (1 << 0),	/* Coalesce threshold IRQ */
+
+	XLLSDMA_IRQ_ALL_ERR	 = 0x1C,	/* All error interrupt */
+	XLLSDMA_IRQ_ALL		 = 0x1F,	/* All interrupt bits */
+	XLLSDMA_IRQ_ALL_DONE	 = 0x3,		/* All work complete interrupt bits */
+
+
+#define XLLSDMA_IRQ_COALESCE_COUNT(x)	((x >> 10) & 0xF)
+#define XLLSDMA_IRQ_DELAY_COUNT(x)		((x >> 8) & 0x3)
+
+	XLLSDMA_SR_ERR_TDESCR	 = (1 << 21),	/* Tail descriptor pointer is invalid */
+	XLLSDMA_SR_ERR_CMPL	 = (1 << 20),	/* Complete bit is set */
+	XLLSDMA_SR_ERR_BUFA	 = (1 << 19),	/* Buffer address is invalid */
+	XLLSDMA_SR_ERR_NDESCR	 = (1 << 18),	/* Next descriptor pointer is invalid */
+	XLLSDMA_SR_ERR_CDESCR	 = (1 << 17),	/* Current descriptor pointer is invalid */
+	XLLSDMA_SR_ERR_BUSYWR	 = (1 << 16),	/* Current descriptor modified */
+	XLLSDMA_SR_ERROR	 = (1 << 7),	/* Error IRQ has occurred */
+	XLLSDMA_SR_IRQ_ON_END	 = (1 << 6),	/* On-end IRQ has occurred */
+	XLLSDMA_SR_STOP_ON_END	 = (1 << 5), 	/* Stop on end has occurred */
+	XLLSDMA_SR_COMPLETED	 = (1 << 4),	/* BD completed */
+	XLLSDMA_SR_SOP		 = (1 << 3),	/* Current BD has SOP set */
+	XLLSDMA_SR_EOP		 = (1 << 2),	/* Current BD has EOP set */
+	XLLSDMA_SR_ENGINE_BUSY	 = (1 << 1),	/* Channel is busy */
+	
+
+	XLLSDMA_DMACR_TX_PAUSE	  = (1 << 29),	/* Pause TX channel */
+	XLLSDMA_DMACR_RX_PAUSE	  = (1 << 28),	/* Pause RX channel */
+	XLLSDMA_DMACR_PLB_ERR_DIS = (1 << 5),	/* Disable PLB error detection */
+	XLLSDMA_DMACR_RX_OVF_DIS  = (1 << 4),	/* Disable error on RX coalesce counter overflows */
+	XLLSDMA_DMACR_TX_OVF_DIS  = (1 << 3),	/* Disable error on TX coalesce counter overflows */
+	XLLSDMA_DMACR_TAIL_PTR_EN = (1 << 2),	/* Enable use of tail pointer register */
+	XLLSDMA_DMACR_EN_ARB_HOLD = (1 << 1),	/* Enable arbitration hold */
+	XLLSDMA_DMACR_RESET	  = (1 << 0),	/* Reset both channels */
+};
+
+static inline void xllsdma_write_cr(struct xllsdma_device *sdma, u32 value)
+{
+	out_be32(sdma->ioaddr + XLLSDMA_DMACR, value);
+}
+
+static inline u32 xllsdma_read_cr(struct xllsdma_device *sdma)
+{
+	return in_be32(sdma->ioaddr + XLLSDMA_DMACR);
+}
+
+static inline void xllsdma_tx_out32(struct xllsdma_device *sdma, int reg, u32 value)
+{
+	out_be32(sdma->ioaddr + reg + XLLSDMA_TX_REGS, value);
+}
+
+static inline u32 xllsdma_tx_in32(struct xllsdma_device *sdma, int reg)
+{
+	return in_be32(sdma->ioaddr + reg + XLLSDMA_TX_REGS);
+}
+
+static inline void xllsdma_rx_out32(struct xllsdma_device *sdma, int reg, u32 value)
+{
+	out_be32(sdma->ioaddr + reg + XLLSDMA_RX_REGS, value);
+}
+
+static inline u32 xllsdma_rx_in32(struct xllsdma_device *sdma, int reg)
+{
+	return in_be32(sdma->ioaddr + reg + XLLSDMA_RX_REGS);
+}
+
+void xllsdma_reset(struct xllsdma_device *sdma)
+{
+	u32 rx_cr, tx_cr, rx_irq, tx_irq;
+
+	unsigned long flags;
+	struct xllsdma_client *client, *tmp;
+
+	DEFINE_XLLSDMA_COALESCE(coal);
+	spin_lock_irqsave(&sdma->lock, flags);
+
+	xllsdma_write_cr(sdma, XLLSDMA_DMACR_RESET);
+
+	while (xllsdma_read_cr(sdma) & XLLSDMA_DMACR_RESET)
+		udelay(100);
+
+	rx_cr = xllsdma_rx_in32(sdma, XLLSDMA_CR);
+	tx_cr = xllsdma_tx_in32(sdma, XLLSDMA_CR);
+
+	xllsdma_rx_out32(sdma, XLLSDMA_CR, rx_cr & ~XLLSDMA_CR_IRQ_ALL);
+	xllsdma_tx_out32(sdma, XLLSDMA_CR, tx_cr & ~XLLSDMA_CR_IRQ_ALL);
+
+	rx_irq = xllsdma_rx_in32(sdma, XLLSDMA_IRQ);
+	tx_irq = xllsdma_tx_in32(sdma, XLLSDMA_IRQ);
+
+	xllsdma_rx_out32(sdma, XLLSDMA_IRQ, rx_irq);
+	xllsdma_tx_out32(sdma, XLLSDMA_IRQ, tx_irq);
+
+	xllsdma_write_cr(sdma, XLLSDMA_DMACR_TAIL_PTR_EN |
+		XLLSDMA_DMACR_RX_OVF_DIS | XLLSDMA_DMACR_TX_OVF_DIS);
+
+	if (sdma->rx_irq != NO_IRQ) {
+		xllsdma_rx_out32(sdma, XLLSDMA_CR,
+			      rx_cr | (XLLSDMA_CR_IRQ_ALL & ~XLLSDMA_CR_IRQ_EN));
+
+		rx_cr = xllsdma_rx_in32(sdma, XLLSDMA_CR);
+		xllsdma_rx_out32(sdma, XLLSDMA_CR, rx_cr | XLLSDMA_CR_IRQ_EN);
+	}
+
+	if (sdma->tx_irq != NO_IRQ) {
+		xllsdma_tx_out32(sdma, XLLSDMA_CR,
+			      tx_cr | (XLLSDMA_CR_IRQ_ALL & ~XLLSDMA_CR_IRQ_EN));
+		tx_cr = xllsdma_tx_in32(sdma, XLLSDMA_CR);
+		xllsdma_tx_out32(sdma, XLLSDMA_CR, tx_cr | XLLSDMA_CR_IRQ_EN);
+	}
+
+	spin_unlock_irqrestore(&sdma->lock, flags);
+
+	list_for_each_entry_safe(client, tmp, &sdma->clients, item)
+		if (likely(client->reset))
+			client->reset(client->data);
+
+	xllsdma_set_coalesce(sdma, &coal);
+}
+EXPORT_SYMBOL_GPL(xllsdma_reset);
+
+void xllsdma_tx_irq_enable(struct xllsdma_device *sdma)
+{
+	u32 tx_cr;
+	unsigned long flags;
+
+	BUG_ON(sdma->tx_irq == NO_IRQ);
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	tx_cr = xllsdma_tx_in32(sdma, XLLSDMA_CR);
+	xllsdma_tx_out32(sdma, XLLSDMA_CR, tx_cr | XLLSDMA_CR_IRQ_EN);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_tx_irq_enable);
+
+void xllsdma_rx_irq_enable(struct xllsdma_device *sdma)
+{
+	u32 rx_cr;
+	unsigned long flags;
+
+	BUG_ON(sdma->rx_irq == NO_IRQ);
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	rx_cr = xllsdma_rx_in32(sdma, XLLSDMA_CR);
+	xllsdma_rx_out32(sdma, XLLSDMA_CR, rx_cr | XLLSDMA_CR_IRQ_EN);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_rx_irq_enable);
+
+void xllsdma_tx_irq_disable(struct xllsdma_device *sdma)
+{
+	u32 tx_cr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	tx_cr = xllsdma_tx_in32(sdma, XLLSDMA_CR);
+	xllsdma_tx_out32(sdma, XLLSDMA_CR, tx_cr & ~XLLSDMA_CR_IRQ_EN);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_tx_irq_disable);
+
+void xllsdma_rx_irq_disable(struct xllsdma_device *sdma)
+{
+	u32 rx_cr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	rx_cr = xllsdma_rx_in32(sdma, XLLSDMA_CR);
+	xllsdma_rx_out32(sdma, XLLSDMA_CR, rx_cr & ~XLLSDMA_CR_IRQ_EN);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_rx_irq_disable);
+
+void xllsdma_tx_irq_ack(struct xllsdma_device *sdma)
+{
+	u32 irq_stat;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	irq_stat = xllsdma_tx_in32(sdma, XLLSDMA_IRQ);
+	xllsdma_tx_out32(sdma, XLLSDMA_IRQ, irq_stat & XLLSDMA_IRQ_ALL_DONE);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_tx_irq_ack);
+
+void xllsdma_rx_irq_ack(struct xllsdma_device *sdma)
+{
+	u32 irq_stat;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	irq_stat = xllsdma_rx_in32(sdma, XLLSDMA_IRQ);
+	xllsdma_rx_out32(sdma, XLLSDMA_IRQ, irq_stat & XLLSDMA_IRQ_ALL_DONE);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_rx_irq_ack);
+
+void xllsdma_pause(struct xllsdma_device *sdma)
+{
+	u32 dmacr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	dmacr = xllsdma_read_cr(sdma);
+	dmacr |= XLLSDMA_DMACR_TX_PAUSE | XLLSDMA_DMACR_RX_PAUSE;
+	xllsdma_write_cr(sdma, dmacr);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_pause);
+
+void xllsdma_resume(struct xllsdma_device *sdma)
+{
+	u32 dmacr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+	dmacr = xllsdma_read_cr(sdma);
+	dmacr &= ~(XLLSDMA_DMACR_TX_PAUSE | XLLSDMA_DMACR_RX_PAUSE);
+	xllsdma_write_cr(sdma, dmacr);
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+EXPORT_SYMBOL_GPL(xllsdma_resume);
+
+int xllsdma_set_coalesce(struct xllsdma_device *sdma, struct xllsdma_coalesce *coal)
+{
+	u32 tx_cr, rx_cr;
+	unsigned long flags;
+
+	if (coal->tx_timeout > 255 ||
+	    coal->rx_timeout > 255 ||
+	    coal->tx_threshold > 255 ||
+	    coal->rx_threshold > 255)
+		return -EINVAL;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+
+	if (sdma->rx_irq != NO_IRQ) {
+		rx_cr = xllsdma_rx_in32(sdma, XLLSDMA_CR);
+
+		if (coal->rx_timeout == 0) {
+			coal->rx_timeout = 1;
+			rx_cr &= ~XLLSDMA_CR_IRQ_TIMEOUT;
+		} else {
+			rx_cr |= XLLSDMA_CR_IRQ_TIMEOUT;
+		}
+
+		rx_cr &= ~(XLLSDMA_CR_IRQ_THRESHOLD_MSK | XLLSDMA_CR_IRQ_TIMEOUT_SH);
+		rx_cr |= (coal->rx_threshold << XLLSDMA_CR_IRQ_THRESHOLD_SH)
+			 & XLLSDMA_CR_IRQ_THRESHOLD_MSK;
+		rx_cr |= (coal->rx_timeout << XLLSDMA_CR_IRQ_TIMEOUT_SH)
+			 & XLLSDMA_CR_IRQ_TIMEOUT_MSK;
+		rx_cr |= XLLSDMA_CR_LD_IRQ_CNT;
+
+		xllsdma_rx_out32(sdma, XLLSDMA_CR, rx_cr);
+	}
+
+	if (sdma->tx_irq != NO_IRQ) {
+		tx_cr = xllsdma_tx_in32(sdma, XLLSDMA_CR);
+
+		if (coal->tx_timeout == 0) {
+			coal->tx_timeout = 1;
+			tx_cr &= ~XLLSDMA_CR_IRQ_TIMEOUT;
+		} else {
+			tx_cr |= XLLSDMA_CR_IRQ_TIMEOUT;
+		}
+
+		tx_cr &= ~(XLLSDMA_CR_IRQ_THRESHOLD_MSK | XLLSDMA_CR_IRQ_TIMEOUT_SH);
+		tx_cr |= (coal->tx_threshold << XLLSDMA_CR_IRQ_THRESHOLD_SH)
+			 & XLLSDMA_CR_IRQ_THRESHOLD_MSK;
+		tx_cr |= (coal->tx_timeout << XLLSDMA_CR_IRQ_TIMEOUT_SH)
+			 & XLLSDMA_CR_IRQ_TIMEOUT_MSK;
+		tx_cr |= XLLSDMA_CR_LD_IRQ_CNT;
+
+		xllsdma_tx_out32(sdma, XLLSDMA_CR, tx_cr);
+	}
+
+	spin_unlock_irqrestore(&sdma->lock, flags);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(xllsdma_set_coalesce);
+
+int xllsdma_get_coalesce(struct xllsdma_device *sdma, struct xllsdma_coalesce *coal)
+{
+	u32 tx_cr, rx_cr;
+	unsigned long flags;
+
+	spin_lock_irqsave(&sdma->lock, flags);
+
+	tx_cr = xllsdma_tx_in32(sdma, XLLSDMA_CR);
+	rx_cr = xllsdma_rx_in32(sdma, XLLSDMA_CR);
+
+	coal->tx_threshold = (tx_cr & XLLSDMA_CR_IRQ_THRESHOLD_MSK)
+			     >> XLLSDMA_CR_IRQ_THRESHOLD_SH;
+	coal->tx_timeout = (tx_cr & XLLSDMA_CR_IRQ_TIMEOUT_MSK)
+			   >> XLLSDMA_CR_IRQ_TIMEOUT_SH;
+
+	coal->rx_threshold = (rx_cr & XLLSDMA_CR_IRQ_THRESHOLD_MSK)
+			     >> XLLSDMA_CR_IRQ_THRESHOLD_SH;
+	coal->rx_timeout = (rx_cr & XLLSDMA_CR_IRQ_TIMEOUT_MSK)
+			     >> XLLSDMA_CR_IRQ_TIMEOUT_SH;
+
+	if (!(tx_cr & XLLSDMA_CR_IRQ_TIMEOUT))
+		coal->tx_timeout = 0;
+
+	if (!(rx_cr & XLLSDMA_CR_IRQ_TIMEOUT))
+		coal->rx_timeout = 0;
+
+	spin_unlock_irqrestore(&sdma->lock, flags);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(xllsdma_get_coalesce);
+
+int xllsdma_tx_submit(struct xllsdma_device *sdma, dma_addr_t desc)
+{
+	xllsdma_tx_out32(sdma, XLLSDMA_TDESCR, desc);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(xllsdma_tx_submit);
+
+int xllsdma_rx_submit(struct xllsdma_device *sdma, dma_addr_t desc)
+{
+	xllsdma_rx_out32(sdma, XLLSDMA_TDESCR, desc);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(xllsdma_rx_submit);
+
+void xllsdma_tx_init(struct xllsdma_device *sdma, dma_addr_t desc)
+{
+	xllsdma_tx_out32(sdma, XLLSDMA_CDESCR, desc);
+}
+EXPORT_SYMBOL_GPL(xllsdma_tx_init);
+
+void xllsdma_rx_init(struct xllsdma_device *sdma, dma_addr_t desc)
+{
+	xllsdma_rx_out32(sdma, XLLSDMA_CDESCR, desc);
+}
+EXPORT_SYMBOL_GPL(xllsdma_rx_init);
+
+struct xllsdma_device *xllsdma_find_device(int phandle)
+{
+	struct mpmc_device *mpmc;
+	struct xllsdma_device *sdma = NULL;
+	int found = 0;
+	mutex_lock(&mpmc_devs_lock);
+	list_for_each_entry(mpmc, &mpmc_devs, item) {
+		mutex_lock(&mpmc->devs_lock);
+		list_for_each_entry(sdma, &mpmc->xllsdma_devs, item) {
+			if (sdma->phandle == phandle) {
+				found = 1;
+				break;
+			}
+		}
+		mutex_unlock(&mpmc->devs_lock);
+		if (found)
+			break;
+		else
+			sdma = NULL;
+	}
+	mutex_unlock(&mpmc_devs_lock);
+	return sdma;
+}
+EXPORT_SYMBOL_GPL(xllsdma_find_device);
+
+static irqreturn_t xllsdma_rx_intr(int irq, void *dev_id)
+{
+	u32 irq_ack, status;
+	struct xllsdma_device *sdma = dev_id;
+	struct xllsdma_client *client, *tmp;
+
+	/* Read pending interrupts */
+	status = xllsdma_rx_in32(sdma, XLLSDMA_IRQ);
+	irq_ack = status;
+	irq_ack &= sdma->rx_ack ? XLLSDMA_IRQ_ALL : XLLSDMA_IRQ_ALL_ERR;
+	xllsdma_rx_out32(sdma, XLLSDMA_IRQ, irq_ack);
+
+	if (unlikely(status & XLLSDMA_IRQ_ALL_ERR)) {
+		dev_err(sdma->dev, "%s: error status: %08x\n", __func__, 
+			status);
+		xllsdma_reset(sdma);
+		list_for_each_entry_safe(client, tmp, &sdma->clients, item)
+			if (likely(client->error))
+				client->error(client->data);
+		return IRQ_HANDLED;
+	}
+
+	if (likely(status & XLLSDMA_IRQ_ALL_DONE)) {
+		list_for_each_entry_safe(client, tmp, &sdma->clients, item)
+			if (likely(client->rx_complete))
+				client->rx_complete(client->data);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t xllsdma_tx_intr(int irq, void *dev_id)
+{
+	u32 irq_ack, status;
+	struct xllsdma_device *sdma = dev_id;
+	struct xllsdma_client *client, *tmp;
+
+	/* Read pending interrupts */
+	status = xllsdma_tx_in32(sdma, XLLSDMA_IRQ);
+	irq_ack = status;
+	irq_ack &= sdma->tx_ack ? XLLSDMA_IRQ_ALL : XLLSDMA_IRQ_ALL_ERR;
+	xllsdma_tx_out32(sdma, XLLSDMA_IRQ, irq_ack);
+
+	if (unlikely(status & XLLSDMA_IRQ_ALL_ERR)) {
+		dev_err(sdma->dev, "%s: error status: %08x\n", __func__, 
+			status);
+		xllsdma_reset(sdma);
+		list_for_each_entry_safe(client, tmp, &sdma->clients, item)
+			if (likely(client->error))
+				client->error(client->data);
+		return IRQ_HANDLED;
+	}
+
+	if (likely(status & XLLSDMA_IRQ_ALL_DONE)) {
+		list_for_each_entry_safe(client, tmp, &sdma->clients, item)
+			if (likely(client->tx_complete))
+				client->tx_complete(client->data);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void xllsdma_dev_register(struct mpmc_device *mpmc,
+			      struct xllsdma_device *sdma)
+{
+	mutex_lock(&mpmc->devs_lock);
+	list_add(&sdma->item, &mpmc->xllsdma_devs);
+	mutex_unlock(&mpmc->devs_lock);
+}
+
+static void xllsdma_dev_unregister(struct xllsdma_device *sdma)
+{
+	struct mpmc_device *mpmc = sdma->parent;
+
+	mutex_lock(&mpmc->devs_lock);
+	list_del(&sdma->item);
+	mutex_unlock(&mpmc->devs_lock);
+}
+
+static void xllsdma_cleanup(struct device *dev)
+{
+	struct xllsdma_device *sdma = dev_get_drvdata(dev);
+
+	if (sdma->tx_irq)
+		free_irq(sdma->tx_irq, sdma);
+
+	if (sdma->rx_irq)
+		free_irq(sdma->rx_irq, sdma);
+
+	if (sdma->memregion.start)
+		release_mem_region(sdma->memregion.start,
+			sdma->memregion.end - sdma->memregion.start + 1);
+
+	if (sdma->ioaddr)
+		iounmap(sdma->ioaddr);
+
+	xllsdma_dev_unregister(sdma);
+	kfree(sdma);
+	dev_set_drvdata(dev, NULL);
+}
+
+static void mpmc_dev_register(struct mpmc_device *mpmc)
+{
+	mutex_lock(&mpmc_devs_lock);
+	list_add_tail(&mpmc->item, &mpmc_devs);
+	mutex_unlock(&mpmc_devs_lock);
+}
+
+static void mpmc_dev_unregister(struct mpmc_device *mpmc)
+{
+	mutex_lock(&mpmc_devs_lock);
+	list_del(&mpmc->item);
+	mutex_unlock(&mpmc_devs_lock);
+}
+
+static void mpmc_cleanup(struct device *dev)
+{
+	struct mpmc_device *mpmc = dev_get_drvdata(dev);
+
+	if (mpmc->registered)
+		mpmc_dev_unregister(mpmc);
+
+	kfree(mpmc);
+	dev_set_drvdata(dev, NULL);
+}
+
+static int __devinit xllsdma_init(struct device *dev, struct resource *rx_irq,
+			       struct resource *tx_irq, struct resource *mem,
+			       int phandle)
+{
+	struct xllsdma_device *sdma;
+	struct mpmc_device *mpmc;
+
+	resource_size_t region_size;
+	int res;
+
+	mpmc = dev_get_drvdata(dev->parent);
+
+	sdma = kzalloc(sizeof(struct xllsdma_device), GFP_KERNEL);
+	if (!sdma) {
+		dev_err(dev, "Cannot allocate SDMA device\n");
+		return -ENOMEM;
+	}
+	dev_set_drvdata(dev, sdma);
+	sdma->dev = dev;
+
+	spin_lock_init(&sdma->lock);
+	INIT_LIST_HEAD(&sdma->clients);
+	mutex_init(&sdma->clients_lock);
+	sdma->parent = mpmc;
+	sdma->phandle = phandle;
+
+	region_size = mem->end - mem->start + 1;
+	if (!request_mem_region(mem->start, region_size, DRV_NAME)) {
+		dev_err(dev, "I/O memory region at %p is busy\n",
+			(void *)mem->start);
+		return -EBUSY;
+	}
+	sdma->memregion = *mem;
+
+	sdma->ioaddr = ioremap(mem->start, region_size);
+	if (!sdma->ioaddr) {
+		dev_err(dev, "Cannot ioremap() I/O memory %p\n",
+			(void *)mem->start);
+		return -ENOMEM;
+	}
+
+	xllsdma_reset(sdma);
+
+	sdma->rx_irq = NO_IRQ;
+	if (rx_irq) {
+		res = request_irq(rx_irq->start, xllsdma_rx_intr,
+				IRQF_SHARED, "SDMA RX", sdma);
+		if (res) {
+			dev_err(dev, "Could not allocate RX interrupt %d.\n",
+				rx_irq->start);
+			return res;
+		}
+		sdma->rx_irq = rx_irq->start;
+	}
+
+	sdma->tx_irq = NO_IRQ;
+	if (tx_irq) {
+		res = request_irq(tx_irq->start, xllsdma_tx_intr,
+				IRQF_SHARED, "SDMA TX", sdma);
+		if (res) {
+			dev_err(dev, "Could not allocate TX interrupt %d.\n",
+				tx_irq->start);
+			return res;
+		}
+		sdma->tx_irq = tx_irq->start;
+	}
+
+	sdma->rx_ack = 1;
+	sdma->tx_ack = 1;
+	xllsdma_dev_register(mpmc, sdma);
+
+	return 0;
+}
+
+static int __devinit mpmc_init(struct device *dev)
+{
+	struct mpmc_device *mpmc;
+
+	mpmc = kzalloc(sizeof(struct mpmc_device), GFP_KERNEL);
+
+	if (!mpmc) {
+		dev_err(dev, "Cannot allocate MPMC device\n");
+		return -ENOMEM;
+	}
+
+	dev_set_drvdata(dev, mpmc);
+
+	INIT_LIST_HEAD(&mpmc->xllsdma_devs);
+	mutex_init(&mpmc->devs_lock);
+
+	mpmc_dev_register(mpmc);
+	mpmc->registered = 1;
+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static int xllsdma_of_remove(struct of_device *op)
+{
+	xllsdma_cleanup(&op->dev);
+	return 0;
+}
+
+/* Match table for of_platform binding */
+static struct of_device_id xllsdma_of_match[] = {
+	{ .compatible = "xlnx,ll-dma-1.00.a" },
+	{},
+};
+
+static int __devinit xllsdma_of_probe(struct of_device *op,
+				   const struct of_device_id *match)
+{
+	const int *prop;
+	int phandle;
+	struct resource rx_irq, tx_irq, mem;
+	struct resource *tx_irq_res = NULL;
+	struct resource *rx_irq_res = NULL;
+	int res;
+
+	res = of_address_to_resource(op->node, 0, &mem);
+	if (res) {
+		dev_err(&op->dev, "invalid address\n");
+		return res;
+	}
+
+	/* IRQ */
+	res = of_irq_to_resource(op->node, 0, &rx_irq);
+	if (res != NO_IRQ)
+		rx_irq_res = &rx_irq;
+
+	res = of_irq_to_resource(op->node, 1, &tx_irq);
+	if (res != NO_IRQ)
+		tx_irq_res = &tx_irq;
+
+	prop = of_get_property(op->node, "linux,phandle", NULL);
+	phandle = (prop) ? *prop : -1;
+
+	res = xllsdma_init(&op->dev, rx_irq_res, tx_irq_res, &mem, phandle);
+	if (res)
+		xllsdma_of_remove(op);
+
+	return res;
+}
+
+static struct of_platform_driver xllsdma_of_driver = {
+	.name		= "xilinx-sdma",
+	.match_table	= xllsdma_of_match,
+	.probe		= xllsdma_of_probe,
+	.remove		= xllsdma_of_remove,
+};
+
+int __init xllsdma_of_init(void)
+{
+	int ret;
+
+	ret = of_register_platform_driver(&xllsdma_of_driver);
+	if (ret) {
+		of_unregister_platform_driver(&xllsdma_of_driver);
+		printk(KERN_ERR "registering driver failed: err=%i", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+void xllsdma_of_exit(void)
+{
+	of_unregister_platform_driver(&xllsdma_of_driver);
+}
+
+static int mpmc_of_remove(struct of_device *op)
+{
+	struct device_node *node;
+	struct of_device *ofdev;
+
+	for_each_child_of_node(op->node, node) {
+		ofdev = of_find_device_by_node(node);
+		of_device_unregister(ofdev);
+		of_device_free(ofdev);
+	}
+
+	mpmc_cleanup(&op->dev);
+	return 0;
+}
+
+static int __devinit mpmc_of_probe(struct of_device *op,
+			const struct of_device_id *match)
+{
+	int err = mpmc_init(&op->dev);
+	if (err)
+		return err;
+
+	of_platform_bus_probe(op->node, xllsdma_of_match, &op->dev);
+	return 0;
+}
+
+static struct of_device_id  __devinitdata mpmc_of_match[] = {
+	{ .compatible = "xlnx,mpmc-4.01.a" },
+	{ .compatible = "xlnx,mpmc-4.03.a" },
+	{},
+};
+
+static struct of_platform_driver mpmc_of_driver = {
+	.name = "xilinx-mpmc",
+	.match_table = mpmc_of_match,
+	.probe = mpmc_of_probe,
+	.remove	= mpmc_of_remove,
+};
+
+int __init mpmc_of_init(void)
+{
+	return of_register_platform_driver(&mpmc_of_driver);
+}
+
+void mpmc_of_exit(void)
+{
+	of_unregister_platform_driver(&mpmc_of_driver);
+}
+
+subsys_initcall(mpmc_of_init);
+subsys_initcall(xllsdma_of_init);
+#else	/* CONFIG_OF */
+/*---------------------------------------------------------------------------
+ * Platform bus attachment
+ */
+
+static __devexit int xllsdma_plat_remove(struct platform_device *pdev)
+{
+	xllsdma_cleanup(&pdev->dev);
+	return 0;
+}
+
+static int __devinit xllsdma_plat_probe(struct platform_device *pdev)
+{
+	struct resource *rx_irq, *tx_irq, *mem;
+	int err = 0;
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!mem) {
+		dev_err(&pdev->dev, "invalid address\n");
+		err = -EINVAL;
+		goto fail;
+	}
+
+	/* RX interrupt is optional, and first */
+	rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+
+	/* TX interrupt is optional, and second */
+	tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
+
+	err = xllsdma_init(&pdev->dev, rx_irq, tx_irq, mem, pdev->id);
+	if (err)
+		xllsdma_plat_remove(pdev);
+fail:
+	return err;
+}
+
+static struct platform_driver xllsdma_plat_driver = {
+	.probe = xllsdma_plat_probe,
+	.remove	= __devexit_p(xllsdma_plat_remove),
+	.driver = {
+		.owner = THIS_MODULE,
+		.name  = "xilinx-sdma",
+	},
+};
+
+int __init xllsdma_plat_init(void)
+{
+	int err = platform_driver_register(&xllsdma_plat_driver);
+	if (err) {
+		platform_driver_unregister(&xllsdma_plat_driver);
+		printk(KERN_ERR "registering driver failed: err=%i", err);
+		return err;
+	}
+
+	return 0;
+}
+subsys_initcall(xllsdma_plat_init);
+
+void xllsdma_plat_exit(void)
+{
+	platform_driver_unregister(&xllsdma_plat_driver);
+}
+
+static int mpmc_plat_probe(struct platform_device *pdev)
+{
+	return mpmc_init(&pdev->dev);
+}
+
+static int __devexit mpmc_plat_remove(struct platform_device *pdev)
+{
+	mpmc_cleanup(&pdev->dev);
+	return 0;
+}
+
+static struct platform_driver mpmc_plat_driver = {
+	.probe = mpmc_plat_probe,
+	.remove	= __devexit_p(mpmc_plat_remove),
+	.driver = {
+		.owner = THIS_MODULE,
+		.name  = "xilinx-mpmc",
+	},
+};
+
+int __init mpmc_plat_init(void)
+{
+	return platform_driver_register(&mpmc_plat_driver);
+}
+subsys_initcall(mpmc_plat_init);
+
+void mpmc_plat_exit(void)
+{
+	platform_driver_unregister(&mpmc_plat_driver);
+}
+#endif	/* CONFIG_OF */
diff -r baced9e29ab5 include/linux/xllsdma.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/include/linux/xllsdma.h	Wed Apr 28 02:00:51 2010 +0400
@@ -0,0 +1,187 @@
+/*
+ * SDMA subsystem support for Xilinx MPMC.
+ *
+ * Author: Sergey Temerkhanov
+ *
+ * Copyright (c) 2008-2010 Cifronic ZAO
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __XLLSDMA_H__
+#define __XLLSDMA_H__
+
+#include <linux/types.h>
+#include <linux/dma-mapping.h>
+
+#define XLLSDMA_ALIGNMENT	0x40
+
+struct xllsdma_desc {
+	__be32 next;
+	__be32 address;
+	__be32 length;
+	__be32 stat_ctl;
+	__be32 app1;
+	__be32 app2;
+	__be32 app3;
+	__be32 app4;
+	void *virt;
+	u32 flags;
+} __attribute__((aligned(XLLSDMA_ALIGNMENT)));
+
+
+enum {
+	XLLSDMA_STSCTL_ERROR	= (1 << 31), /* DMA error */
+	XLLSDMA_STSCTL_IOE		= (1 << 30), /* Interrupt on end */
+	XLLSDMA_STSCTL_SOE		= (1 << 29), /* Stop on end */
+	XLLSDMA_STSCTL_DONE	= (1 << 28), /* DMA completed */
+	XLLSDMA_STSCTL_SOP		= (1 << 27), /* Start of packet */
+	XLLSDMA_STSCTL_EOP		= (1 << 26), /* End of packet */
+	XLLSDMA_STSCTL_BUSY	= (1 << 25), /* DMA busy */
+	XLLSDMA_STSCTL_CSUM	= (1 << 0),  /* Checksum enable */
+
+	XLLSDMA_STSCTL_MSK		= (0xFF << 24), /*Status/control field */
+};
+
+/* SDMA client operations */
+struct xllsdma_client {
+	void *data;
+	void (*tx_complete) (void *data);
+	void (*rx_complete) (void *data);
+	void (*error) (void *data);
+	void (*reset) (void *data);
+	struct list_head item;
+};
+
+struct xllsdma_coalesce {
+	int tx_threshold;
+	int tx_timeout;
+
+	int rx_threshold;
+	int rx_timeout;
+};
+
+#define DEFINE_XLLSDMA_COALESCE(x) struct xllsdma_coalesce x = { \
+	.tx_timeout	= 0, \
+	.tx_threshold	= 1, \
+	.rx_timeout	= 0, \
+	.rx_threshold	= 1, };
+
+struct mpmc_device {
+	void __iomem		*ioaddr;
+
+	struct resource		memregion;
+	int			irq;
+
+	int			registered;
+	struct list_head	item;
+
+	struct mutex		devs_lock;
+	struct list_head	xllsdma_devs;
+};
+
+struct xllsdma_device {
+	struct device		*dev;
+	void __iomem		*ioaddr;
+	wait_queue_head_t 	wait;
+
+	spinlock_t		lock;
+
+	struct resource		memregion;
+	int			rx_irq;
+	int			tx_irq;
+	int			rx_ack;
+	int			tx_ack;
+	int			phandle;
+
+	int			registered;
+	struct mpmc_device	*parent;
+
+	struct xllsdma_coalesce	coal;
+	struct list_head	item;
+
+	struct mutex		clients_lock;
+	struct list_head	clients;
+};
+
+static inline void xllsdma_add_client(struct xllsdma_device *sdma,
+				   struct xllsdma_client *client)
+{
+	mutex_lock(&sdma->clients_lock);
+	list_add(&client->item, &sdma->clients);
+	mutex_unlock(&sdma->clients_lock);
+}
+
+static inline void xllsdma_del_client(struct xllsdma_device *sdma,
+				   struct xllsdma_client *client)
+{
+	mutex_lock(&sdma->clients_lock);
+	list_del(&client->item);
+	mutex_unlock(&sdma->clients_lock);
+}
+
+struct xllsdma_device *xllsdma_find_device(int phandle);
+void xllsdma_pause(struct xllsdma_device *sdma);
+void xllsdma_resume(struct xllsdma_device *sdma);
+void xllsdma_reset(struct xllsdma_device *sdma);
+void xllsdma_rx_init(struct xllsdma_device *sdma, dma_addr_t desc);
+void xllsdma_tx_init(struct xllsdma_device *sdma, dma_addr_t desc);
+
+int xllsdma_tx_submit(struct xllsdma_device *sdma, dma_addr_t desc);
+int xllsdma_rx_submit(struct xllsdma_device *sdma, dma_addr_t desc);
+
+void xllsdma_tx_irq_enable(struct xllsdma_device *sdma);
+void xllsdma_rx_irq_enable(struct xllsdma_device *sdma);
+void xllsdma_tx_irq_disable(struct xllsdma_device *sdma);
+void xllsdma_rx_irq_disable(struct xllsdma_device *sdma);
+void xllsdma_tx_irq_ack(struct xllsdma_device *sdma);
+void xllsdma_rx_irq_ack(struct xllsdma_device *sdma);
+
+int xllsdma_set_coalesce(struct xllsdma_device *sdma, struct xllsdma_coalesce *coal);
+int xllsdma_get_coalesce(struct xllsdma_device *sdma, struct xllsdma_coalesce *coal);
+
+static inline int xllsdma_has_tx_irq(struct xllsdma_device *sdma)
+{
+	return sdma->tx_irq != NO_IRQ;
+}
+
+static inline int xllsdma_has_rx_irq(struct xllsdma_device *sdma)
+{
+	return sdma->rx_irq != NO_IRQ;
+}
+
+static inline int xllsdma_desc_busy(struct xllsdma_desc *desc)
+{
+	return desc->stat_ctl & __constant_be32_to_cpu(XLLSDMA_STSCTL_BUSY);
+}
+
+static inline int xllsdma_desc_done(struct xllsdma_desc *desc)
+{
+	return desc->stat_ctl & __constant_be32_to_cpu(XLLSDMA_STSCTL_DONE);
+}
+
+static inline int xllsdma_desc_sop(struct xllsdma_desc *desc)
+{
+	return desc->stat_ctl & __constant_be32_to_cpu(XLLSDMA_STSCTL_SOP);
+}
+
+static inline int xllsdma_desc_eop(struct xllsdma_desc *desc)
+{
+	return desc->stat_ctl & __constant_be32_to_cpu(XLLSDMA_STSCTL_EOP);
+}
+
+static inline void xllsdma_set_ack(struct xllsdma_device *sdma, int rx_ack,
+				int tx_ack)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&sdma->lock, flags);
+	sdma->rx_ack = rx_ack;
+	sdma->tx_ack = tx_ack;
+	spin_unlock_irqrestore(&sdma->lock, flags);
+}
+
+#endif

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