* Re: Commit 3da34aa brakes MSI support on MPC8308 (possibly all MPC83xx) [REPOST]
From: Ilya Yanok @ 2010-07-22 21:11 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Wolfgang Denk
In-Reply-To: <4C48B384.1020006@emcraft.com>
23.07.2010 1:09, Ilya Yanok wrote:
> I hope to disturb you but I haven't got any reply for my first posting...
I shouldn't be working at night... It's 'hate' not 'hope'...
Regards, Ilya.
^ permalink raw reply
* Commit 3da34aa brakes MSI support on MPC8308 (possibly all MPC83xx) [REPOST]
From: Ilya Yanok @ 2010-07-22 21:09 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Wolfgang Denk
Hi Kumar, Kim, Josh, everybody,
I hope to disturb you but I haven't got any reply for my first posting...
I've found that MSI work correctly with older kernels on my MPC8308RDB
board and don't work with newer ones. After bisecting I've found that
the source of the problem is commit 3da34aa:
commit 3da34aae03d498ee62f75aa7467de93cce3030fd
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Tue May 12 15:51:56 2009 -0500
powerpc/fsl: Support unique MSI addresses per PCIe Root Complex
Its feasible based on how the PCI address map is setup that the region
of PCI address space used for MSIs differs for each PHB on the same
SoC.
Instead of assuming that the address mappes to CCSRBAR 1:1 we read
PEXCSRBAR (BAR0) for the PHB that the given pci_dev is on.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
I can see BAR0 initialization for 85xx/86xx hardware but not for 83xx
neigher in the kernel nor in U-Boot (that makes me think that all 83xx
can be affected).
I'm not actually an PCI expert so I've just tried to write IMMR base
address to the BAR0 register from the U-Boot to get the correct address
but this doesn't help.
Please direct me how to init 83xx PCIE controller to make it compatible
with this patch.
Kim, I think MPC8315E is affected too, could you please test it?
Thanks in advance.
Regards, Ilya.
^ permalink raw reply
* [PATCH 1/1] powerpc: Increase pseries_cpu_die delay
From: Brian King @ 2010-07-22 21:23 UTC (permalink / raw)
To: benh; +Cc: brking, linuxppc-dev
In testing SMT disable, we have been regularly seeing the following message:
Querying DEAD? cpu %i (%i) shows %i
This indicates the current delay in pseries_cpu_die where we wait
for the specified CPU to die, is insufficient. Usually, this does
not cause a problem, but we've seen this result in BUG_ON's going
off in the timer code when we try to migrate the timers off the
dead cpu while a timer is still running. Increasing this delay,
as is done in this patch, seems to resolve this issue.
Signed-off-by: Brian King <brking@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/hotplug-cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff -puN arch/powerpc/platforms/pseries/hotplug-cpu.c~powerpc_cpu_die_delay arch/powerpc/platforms/pseries/hotplug-cpu.c
--- linux-2.6/arch/powerpc/platforms/pseries/hotplug-cpu.c~powerpc_cpu_die_delay 2010-07-20 09:24:01.000000000 -0500
+++ linux-2.6-bjking1/arch/powerpc/platforms/pseries/hotplug-cpu.c 2010-07-20 09:24:20.000000000 -0500
@@ -193,12 +193,12 @@ static void pseries_cpu_die(unsigned int
if (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
cpu_status = 1;
- for (tries = 0; tries < 1000; tries++) {
+ for (tries = 0; tries < 5000; tries++) {
if (get_cpu_current_state(cpu) == CPU_STATE_INACTIVE) {
cpu_status = 0;
break;
}
- cpu_relax();
+ msleep(1);
}
} else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) {
_
^ permalink raw reply
* Re: [PATCH] powerpc: print cores passed to firmware in decimal
From: Jesse Larrew @ 2010-07-22 21:09 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <4553.1279775749@neuling.org>
On 07/22/2010 12:15 AM, Michael Neuling wrote:
> @@ -869,12 +895,12 @@ static void __init prom_send_capabilities(void)
> cores = (u32 *)PTRRELOC(&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET]);
> if (*cores != NR_CPUS) {
> prom_printf("WARNING ! "
> - "ibm_architecture_vec structure inconsistent: 0x%x !\n",
> + "ibm_architecture_vec structure inconsistent: 0x%i !\n",
> *cores);
>
Since we're changing from hex to decimal, we shouldn't print the "0x".
Sincerely,
--
Jesse Larrew
Software Engineer, Linux on Power Kernel Team
IBM Linux Technology Center
Phone: (512) 973-2052 (T/L: 363-2052)
jlarrew@linux.vnet.ibm.com
^ permalink raw reply
* sec 1.0 talitos driver
From: Jayasri Sangu @ 2010-07-22 20:54 UTC (permalink / raw)
To: 'linuxppc-dev@lists.ozlabs.org'
[-- Attachment #1: Type: text/plain, Size: 110 bytes --]
Hi,
Does anybody developed sec 1.0 talitos driver fro mpc8248 freescale processor.
Thanks,
Jayasri
[-- Attachment #2: Type: text/html, Size: 4494 bytes --]
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Kumar Gala @ 2010-07-22 19:45 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Linus Torvalds
The following changes since commit cd5b8f8755a89a57fc8c408d284b8b613f090345:
Linus Torvalds (1):
Merge branch 'urgent' of git://git.kernel.org/.../brodo/pcmcia-2.6
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge
Kumar Gala (1):
powerpc/kexec: Fix boundary case for book-e kexec memory limits
arch/powerpc/include/asm/kexec.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
^ permalink raw reply
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Scott Wood @ 2010-07-22 19:25 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov; +Cc: linuxppc-dev, Doug Thompson, bluesmoke-devel
In-Reply-To: <AANLkTikX8An80SMZiypoO63Be8MKyCsmNzviwqR6syQd@mail.gmail.com>
On Thu, 22 Jul 2010 23:03:03 +0400
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
> Hello,
>
> On Thu, Jul 22, 2010 at 10:40 PM, Kumar Gala <galak@kernel.crashing.org> wrote:
> >
> > On Jul 22, 2010, at 1:25 PM, Scott Wood wrote:
> >> How about keeping the error stuff as a separate device from Linux's
> >> perspective, but have the main Freescale PCI code create it as a
> >> platform device instead of putting it in the device tree?
> >
> > I'd be good with that solution.
>
> Then we come back to the question that was raised before (during initial
> review of edac driver): as PCI code is probbed long before other parts
> of the kernel and mpc85xx_edac code can be compiled as module,
> it's not possible to directly call mpc85xx_edac code from fsl_pci.c
Right, that's why I suggested creating a platform device rather than
just a function call.
> Two initial suggestions were:
> 1) creating special platform device
> 2) creating special of_platform device from dts
>
> Which approach should I choose? Did i miss any other opportunities?
#1, as it keeps the split out of the device tree.
Besides the theoretical/aesthetic issues of putting Linux
implementation concerns into the device tree, #2 would mean that the
edac driver wouldn't work when Linux is booted with an old device tree.
-Scott
^ permalink raw reply
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Grant Likely @ 2010-07-22 19:15 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov
Cc: Scott Wood, linuxppc-dev, Doug Thompson, bluesmoke-devel
In-Reply-To: <AANLkTikX8An80SMZiypoO63Be8MKyCsmNzviwqR6syQd@mail.gmail.com>
On Thu, Jul 22, 2010 at 1:03 PM, Dmitry Eremin-Solenikov
<dbaryshkov@gmail.com> wrote:
> Hello,
>
> On Thu, Jul 22, 2010 at 10:40 PM, Kumar Gala <galak@kernel.crashing.org> =
wrote:
>>
>> On Jul 22, 2010, at 1:25 PM, Scott Wood wrote:
>>
>>> On Thu, 22 Jul 2010 20:48:15 +0400
>>> Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
>>>
>>>> Hello,
>>>>
>>>> On Thu, Jul 22, 2010 at 7:38 PM, Kumar Gala <galak@kernel.crashing.org=
> wrote:
>>>>>
>>>>> On Jul 21, 2010, at 7:03 PM, Dmitry Eremin-Solenikov wrote:
>>>>>
>>>>>> Currently (as mpc8540-pci) devices are not created on of_platform bu=
s,
>>>>>> mpc85xx_edac can't probe to them. Follow the change to dts trees to =
bind
>>>>>> not to the main mpc8540-pci node but to special mpc85xx-pci-error no=
des,
>>>>>> present on soc bus.
>>>>>>
>>>>>> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>>>>>> ---
>>>>>> drivers/edac/mpc85xx_edac.c | =A0 18 +++++++++---------
>>>>>> 1 files changed, 9 insertions(+), 9 deletions(-)
>>>>>
>>>>> Nak.
>>>>>
>>>>> We already have a node in the dts for the PCI controller. =A0Lets upd=
ate the platform code to add the pci controller to the of_platform_bus_prob=
e list.
>>>>
>>>> I've had that idea. However it's really look strange to me to call
>>>> of_platform_bus_probe() on the bus node, for which we (IMO) explicitly
>>>> won't like for
>>>> child devices (PCI devices) to be added to of_platform bus.
>>>
>>> Right, and it's also not great for a driver for one aspect of PCI to
>>> claim to be the driver for the whole thing.
>>>
>>> But changing the device tree because of this Linux-internal concern is
>>> also not good.
>>>
>>> How about keeping the error stuff as a separate device from Linux's
>>> perspective, but have the main Freescale PCI code create it as a
>>> platform device instead of putting it in the device tree?
>>
>> I'd be good with that solution.
>
> Then we come back to the question that was raised before (during initial
> review of edac driver): as PCI code is probbed long before other parts
> of the kernel and mpc85xx_edac code can be compiled as module,
> it's not possible to directly call mpc85xx_edac code from fsl_pci.c
Not sure what you mean here. If the driver is compiled as a module,
then it must be handled the same way all other drivers are handled.
The platform code registers an of_platform_device at boot time, and
the driver gets bound to it whenever it happens to show up. None of
the children of that bus can be available until after the driver is
probed.
> Two initial suggestions were:
> 1) creating special platform device
> 2) creating special of_platform device from dts
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Grant Likely @ 2010-07-22 19:10 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov; +Cc: linuxppc-dev, Doug Thompson, bluesmoke-devel
In-Reply-To: <AANLkTim7kbHsouc==7gRAuRO6AYMNVdA4yyPFpRBC+QR@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1545 bytes --]
On Thu, Jul 22, 2010 at 10:48 AM, Dmitry Eremin-Solenikov
<dbaryshkov@gmail.com> wrote:
> Hello,
>
> On Thu, Jul 22, 2010 at 7:38 PM, Kumar Gala <galak@kernel.crashing.org> wrote:
>>
>> On Jul 21, 2010, at 7:03 PM, Dmitry Eremin-Solenikov wrote:
>>
>>> Currently (as mpc8540-pci) devices are not created on of_platform bus,
>>> mpc85xx_edac can't probe to them. Follow the change to dts trees to bind
>>> not to the main mpc8540-pci node but to special mpc85xx-pci-error nodes,
>>> present on soc bus.
>>>
>>> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>>> ---
>>> drivers/edac/mpc85xx_edac.c | 18 +++++++++---------
>>> 1 files changed, 9 insertions(+), 9 deletions(-)
>>
>> Nak.
>>
>> We already have a node in the dts for the PCI controller. Lets update the platform code to add the pci controller to the of_platform_bus_probe list.
>
> I've had that idea. However it's really look strange to me to call
> of_platform_bus_probe() on the bus node, for which we (IMO) explicitly
> won't like for
> child devices (PCI devices) to be added to of_platform bus. Would it
> be suitable to just call of_platform_device_create for it (Or do i
> miss someth<ing)?
Try the attached patch (lightly tested). If it works for you then
I'll post it for wider review.
> BTW: While I'm at it, should I change all mpc8540-pci/-pcix device
> names to include respective SoC name?
It is good practice to include both the specific name, and the name of
the device it is backwards compatible to.
g.
[-- Attachment #2: 0001-of-device-Register-children-with-a-compatible-value-.patch --]
[-- Type: text/x-diff, Size: 2708 bytes --]
From d84af195dbcd99ce172bf639538231141176d402 Mon Sep 17 00:00:00 2001
From: Grant Likely <grant.likely@secretlab.ca>
Date: Thu, 22 Jul 2010 13:01:11 -0600
Subject: [PATCH] of/device: Register children with a compatible value in of_platform_bus_probe()
Currently, of_platform_bus_probe() completely skips nodes which do not
explicitly match the 'matches' table passed in. Or, if the root node
matches, then it registers all the children unconditionally. However,
there are situations, such as registering devices from the root node,
when it is desirable to register child nodes, but only if they actually
represent devices. For example, the root node may contain both a local
bus and a PCI device, but it also contains the chosen, aliases and cpus
nodes which don't represent real devices.
This patch changes of_platform_bus_probe() to register all nodes at the
top level if they either match the matches table (the current behaviour),
or if they have a 'compatible' value (indicating it represents a device).
---
drivers/of/platform.c | 31 ++++++++++++++++++++++++++-----
1 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index f3f1ec8..2ead562 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -709,16 +709,37 @@ int of_platform_bus_probe(struct device_node *root,
rc = of_platform_bus_create(root, matches, &dev->dev);
goto bail;
}
+
+ /* Register each child node if either:
+ * a) it has a 'compatible' value indicating they are a device, or
+ * b) it is specified by the 'matches' table (by name or device_type)
+ * If a node is specified in the matches table, then all its children
+ * also get registered.
+ */
for_each_child_of_node(root, child) {
- if (!of_match_node(matches, child))
+ void *compat = of_get_property(child, "compatible", NULL);
+ struct of_device_id *match = of_match_node(matches, child);
+
+ /* Skip if node neither matches nor has a compatible property */
+ if (!compat && !match)
continue;
- pr_debug(" match: %s\n", child->full_name);
+ pr_debug(" register device: %s\n", child->full_name);
+
+ /* Passed the first test, register node as a platform device */
dev = of_platform_device_create(child, NULL, parent);
- if (dev == NULL)
+ if (!dev) {
rc = -ENOMEM;
- else
- rc = of_platform_bus_create(child, matches, &dev->dev);
+ of_node_put(child);
+ break;
+ }
+
+ /* Only register child nodes if specified by matches table */
+ if (!match)
+ continue;
+
+ pr_debug(" register children of: %s\n", child->full_name);
+ rc = of_platform_bus_create(child, matches, &dev->dev);
if (rc) {
of_node_put(child);
break;
--
1.7.0.4
^ permalink raw reply related
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Dmitry Eremin-Solenikov @ 2010-07-22 19:03 UTC (permalink / raw)
To: Kumar Gala; +Cc: Scott Wood, linuxppc-dev, bluesmoke-devel, Doug Thompson
In-Reply-To: <95F6CFEA-DC74-4CF6-A195-4CBFABAAB7F0@kernel.crashing.org>
Hello,
On Thu, Jul 22, 2010 at 10:40 PM, Kumar Gala <galak@kernel.crashing.org> wr=
ote:
>
> On Jul 22, 2010, at 1:25 PM, Scott Wood wrote:
>
>> On Thu, 22 Jul 2010 20:48:15 +0400
>> Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
>>
>>> Hello,
>>>
>>> On Thu, Jul 22, 2010 at 7:38 PM, Kumar Gala <galak@kernel.crashing.org>=
wrote:
>>>>
>>>> On Jul 21, 2010, at 7:03 PM, Dmitry Eremin-Solenikov wrote:
>>>>
>>>>> Currently (as mpc8540-pci) devices are not created on of_platform bus=
,
>>>>> mpc85xx_edac can't probe to them. Follow the change to dts trees to b=
ind
>>>>> not to the main mpc8540-pci node but to special mpc85xx-pci-error nod=
es,
>>>>> present on soc bus.
>>>>>
>>>>> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>>>>> ---
>>>>> drivers/edac/mpc85xx_edac.c | =A0 18 +++++++++---------
>>>>> 1 files changed, 9 insertions(+), 9 deletions(-)
>>>>
>>>> Nak.
>>>>
>>>> We already have a node in the dts for the PCI controller. =A0Lets upda=
te the platform code to add the pci controller to the of_platform_bus_probe=
list.
>>>
>>> I've had that idea. However it's really look strange to me to call
>>> of_platform_bus_probe() on the bus node, for which we (IMO) explicitly
>>> won't like for
>>> child devices (PCI devices) to be added to of_platform bus.
>>
>> Right, and it's also not great for a driver for one aspect of PCI to
>> claim to be the driver for the whole thing.
>>
>> But changing the device tree because of this Linux-internal concern is
>> also not good.
>>
>> How about keeping the error stuff as a separate device from Linux's
>> perspective, but have the main Freescale PCI code create it as a
>> platform device instead of putting it in the device tree?
>
> I'd be good with that solution.
Then we come back to the question that was raised before (during initial
review of edac driver): as PCI code is probbed long before other parts
of the kernel and mpc85xx_edac code can be compiled as module,
it's not possible to directly call mpc85xx_edac code from fsl_pci.c
Two initial suggestions were:
1) creating special platform device
2) creating special of_platform device from dts
Which approach should I choose? Did i miss any other opportunities?
--=20
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH][v2] powerpc: rename immap_86xx.h to fsl_guts.h, and add 85xx support
From: Kumar Gala @ 2010-07-22 18:43 UTC (permalink / raw)
To: Mark Brown; +Cc: linuxppc-dev, alsa-devel, Timur Tabi, lrg
In-Reply-To: <20100722164927.GC16119@rakim.wolfsonmicro.main>
On Jul 22, 2010, at 11:49 AM, Mark Brown wrote:
> On Thu, Jul 22, 2010 at 11:33:30AM -0500, Timur Tabi wrote:
>> The immap_86xx.h header file only defines one data structure: the =
"global
>> utilities" register set found on Freescale PowerPC SOCs. Rename this =
file
>> to fsl_guts.h to reflect its true purpose, and extend it to cover the =
"GUTS"
>> register set on 85xx chips.
>>=20
>> Signed-off-by: Timur Tabi <timur@freescale.com>
>=20
> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
- k=
^ permalink raw reply
* Re: [PATCH][RFC] preempt_count corruption across H_CEDE call with CONFIG_PREEMPT on pseries
From: Thomas Gleixner @ 2010-07-22 18:38 UTC (permalink / raw)
To: Darren Hart
Cc: Stephen Rothwell, Gautham R Shenoy, Steven Rostedt, linuxppc-dev,
Will Schmidt, Paul Mackerras
In-Reply-To: <4C488CCD.60004@us.ibm.com>
On Thu, 22 Jul 2010, Darren Hart wrote:
> Also of interest is that this path
> cpu_idle()->cpu_die()->pseries_mach_cpu_die() to start_secondary()
> enters with a preempt_count=1 if it wasn't corrupted across the hcall.
That triggers the problem as well. preempt_count needs to be 0 when
entering start_secondary(). So I really wonder how that ever worked.
> The early boot path from _start however appears to call
> start_secondary() with a preempt_count of 0.
Which is correct.
> The following patch is most certainly not correct, but it does eliminate
It is correct, but i think it is incomplete as other portions of the
thread_info on the stack might be in some weird state as well.
> the situation on mainline 100% of the time (there is still a 25%
> reproduction rate on PREEMPT_RT).
But those are diffferent issues, for which we have reasonable
explanations and patches/workarounds.
> 2) Should we call preempt_enable() in cpu_idle() prior to cpu_die() ?
No
Thanks,
tglx
^ permalink raw reply
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Kumar Gala @ 2010-07-22 18:40 UTC (permalink / raw)
To: Scott Wood
Cc: Dmitry Eremin-Solenikov, linuxppc-dev, bluesmoke-devel,
Doug Thompson
In-Reply-To: <20100722132548.6eef941b@schlenkerla.am.freescale.net>
On Jul 22, 2010, at 1:25 PM, Scott Wood wrote:
> On Thu, 22 Jul 2010 20:48:15 +0400
> Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
>=20
>> Hello,
>>=20
>> On Thu, Jul 22, 2010 at 7:38 PM, Kumar Gala =
<galak@kernel.crashing.org> wrote:
>>>=20
>>> On Jul 21, 2010, at 7:03 PM, Dmitry Eremin-Solenikov wrote:
>>>=20
>>>> Currently (as mpc8540-pci) devices are not created on of_platform =
bus,
>>>> mpc85xx_edac can't probe to them. Follow the change to dts trees to =
bind
>>>> not to the main mpc8540-pci node but to special mpc85xx-pci-error =
nodes,
>>>> present on soc bus.
>>>>=20
>>>> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>>>> ---
>>>> drivers/edac/mpc85xx_edac.c | 18 +++++++++---------
>>>> 1 files changed, 9 insertions(+), 9 deletions(-)
>>>=20
>>> Nak.
>>>=20
>>> We already have a node in the dts for the PCI controller. Lets =
update the platform code to add the pci controller to the =
of_platform_bus_probe list.
>>=20
>> I've had that idea. However it's really look strange to me to call
>> of_platform_bus_probe() on the bus node, for which we (IMO) =
explicitly
>> won't like for
>> child devices (PCI devices) to be added to of_platform bus.
>=20
> Right, and it's also not great for a driver for one aspect of PCI to
> claim to be the driver for the whole thing.
>=20
> But changing the device tree because of this Linux-internal concern is
> also not good.
>=20
> How about keeping the error stuff as a separate device from Linux's
> perspective, but have the main Freescale PCI code create it as a
> platform device instead of putting it in the device tree?
I'd be good with that solution.
- k=
^ permalink raw reply
* Re: [PATCH][RFC] preempt_count corruption across H_CEDE call with CONFIG_PREEMPT on pseries
From: Darren Hart @ 2010-07-22 18:36 UTC (permalink / raw)
To: linuxppc-dev
Cc: Stephen Rothwell, Gautham R Shenoy, Steven Rostedt, Will Schmidt,
Paul Mackerras, Thomas Gleixner
In-Reply-To: <4C488CCD.60004@us.ibm.com>
On 07/22/2010 11:24 AM, Darren Hart wrote:
> The following patch is most certainly not correct, but it does eliminate
> the situation on mainline 100% of the time (there is still a 25%
> reproduction rate on PREEMPT_RT). Can someone comment on:
Apologies. This particular issue is also 100% eliminated on PREEMPT_RT.
We hit another issue possibly unrelated to this 25% of time. Please
disregard the comment regarding 25% failure on PREEMPT_RT.
--
Darren Hart
IBM Linux Technology Center
Real-Time Linux Team
^ permalink raw reply
* [PATCH] powerpc/kexec: Fix boundary case for book-e kexec memory limits
From: Kumar Gala @ 2010-07-22 18:32 UTC (permalink / raw)
To: linuxppc-dev
The KEXEC_*_MEMORY_LIMITs are inclusive addresses. We define them as
2Gs as that is what we allow mapping via TLBs. However, this should be
2G - 1 to be inclusive, otherwise if we have >2G of memory in a system
we fail to boot properly via kexec.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/include/asm/kexec.h | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 2a9cd74..076327f 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -8,9 +8,9 @@
* On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory
* and therefore we can only deal with memory within this range
*/
-#define KEXEC_SOURCE_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL)
-#define KEXEC_DESTINATION_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL)
-#define KEXEC_CONTROL_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL)
+#define KEXEC_SOURCE_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL - 1)
+#define KEXEC_DESTINATION_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL - 1)
+#define KEXEC_CONTROL_MEMORY_LIMIT (2 * 1024 * 1024 * 1024UL - 1)
#else
--
1.6.0.6
^ permalink raw reply related
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Scott Wood @ 2010-07-22 18:25 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov; +Cc: linuxppc-dev, Doug Thompson, bluesmoke-devel
In-Reply-To: <AANLkTim7kbHsouc==7gRAuRO6AYMNVdA4yyPFpRBC+QR@mail.gmail.com>
On Thu, 22 Jul 2010 20:48:15 +0400
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
> Hello,
>=20
> On Thu, Jul 22, 2010 at 7:38 PM, Kumar Gala <galak@kernel.crashing.org> w=
rote:
> >
> > On Jul 21, 2010, at 7:03 PM, Dmitry Eremin-Solenikov wrote:
> >
> >> Currently (as mpc8540-pci) devices are not created on of_platform bus,
> >> mpc85xx_edac can't probe to them. Follow the change to dts trees to bi=
nd
> >> not to the main mpc8540-pci node but to special mpc85xx-pci-error node=
s,
> >> present on soc bus.
> >>
> >> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
> >> ---
> >> drivers/edac/mpc85xx_edac.c | =A0 18 +++++++++---------
> >> 1 files changed, 9 insertions(+), 9 deletions(-)
> >
> > Nak.
> >
> > We already have a node in the dts for the PCI controller. =A0Lets updat=
e the platform code to add the pci controller to the of_platform_bus_probe =
list.
>=20
> I've had that idea. However it's really look strange to me to call
> of_platform_bus_probe() on the bus node, for which we (IMO) explicitly
> won't like for
> child devices (PCI devices) to be added to of_platform bus.
Right, and it's also not great for a driver for one aspect of PCI to
claim to be the driver for the whole thing.
But changing the device tree because of this Linux-internal concern is
also not good.
How about keeping the error stuff as a separate device from Linux's
perspective, but have the main Freescale PCI code create it as a
platform device instead of putting it in the device tree?
-Scott
^ permalink raw reply
* [PATCH][RFC] preempt_count corruption across H_CEDE call with CONFIG_PREEMPT on pseries
From: Darren Hart @ 2010-07-22 18:24 UTC (permalink / raw)
To: linuxppc-dev
Cc: Stephen Rothwell, Gautham R Shenoy, Steven Rostedt, Will Schmidt,
Paul Mackerras, Thomas Gleixner
While testing CPU offline/online, we hit various preempt_count related
bugs. Various hacks have been employed for several theoretical corner
cases. One situation however is perfectly repeatable on 2.6.33.6 with
CONFIG_PREEMPT=y.
BUG: scheduling while atomic: swapper/0/0x00000065
Modules linked in: autofs4 sunrpc ipv6 dm_mirror dm_region_hash dm_log
dm_mod ehea sg ext4 jbd2 mbcache sd_mod crc_t10dif ibmvscsic
scsi_transport_srp scsi_tgt [last unloaded: scsi_wait_scan]
Call Trace:
[c00000010e9e39f0] [c0000000000144d4] .show_stack+0x74/0x1c0 (unreliable)
[c00000010e9e3aa0] [c00000000007a680] .__schedule_bug+0xa0/0xb0
[c00000010e9e3b30] [c00000000056dea4] .schedule+0x7a4/0xd60
[c00000010e9e3cd0] [c000000000016be8] .cpu_idle+0x1f8/0x220
[c00000010e9e3d80] [c00000000057d858] .start_secondary+0x388/0x3c0
[c00000010e9e3e30] [c000000000008278] .start_secondary_resume+0x10/0x14
With some instrumentation we were able to determine that the
preempt_count() appears to change across the extended_cede_processor()
call. Specifically across the plpar_hcall_norets(H_CEDE) call. On
PREEMPT_RT we call this with preempt_count=1 and return with
preempt_count=0xffffffff. On mainline with CONFIG_PREEMPT=y, the value
is different (0x65) but is still incorrect.
Also of interest is that this path
cpu_idle()->cpu_die()->pseries_mach_cpu_die() to start_secondary()
enters with a preempt_count=1 if it wasn't corrupted across the hcall.
The early boot path from _start however appears to call
start_secondary() with a preempt_count of 0.
The following patch is most certainly not correct, but it does eliminate
the situation on mainline 100% of the time (there is still a 25%
reproduction rate on PREEMPT_RT). Can someone comment on:
1) How can the preempt_count() get mangled across the H_CEDE hcall?
2) Should we call preempt_enable() in cpu_idle() prior to cpu_die() ?
Hacked-up-by: Darren Hart <dvhltc@us.ibm.com>
Index: linux-2.6.33.6/arch/powerpc/platforms/pseries/hotplug-cpu.c
===================================================================
--- linux-2.6.33.6.orig/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ linux-2.6.33.6/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -138,6 +138,7 @@ static void pseries_mach_cpu_die(void)
* Kernel stack will be reset and start_secondary()
* will be called to continue the online operation.
*/
+ preempt_count() = 0;
start_secondary_resume();
}
}
--
Darren Hart
IBM Linux Technology Center
Real-Time Linux Team
^ permalink raw reply
* Re: [PATCH v2 2/2] EDAC: Remove deprecated bindings for MPC85xx
From: Scott Wood @ 2010-07-22 18:02 UTC (permalink / raw)
To: Bradley Hughes; +Cc: linuxppc-dev
In-Reply-To: <AANLkTinRf_s2gC_O3D_Fh7qJjPEMltMxIaDfin-rOV5m@mail.gmail.com>
On Wed, 21 Jul 2010 18:04:10 -0400
Bradley Hughes <bhughes@silicontkx.com> wrote:
> The "fsl,85..." style bindings for the l2-cache-controller
> and memory-controller were intended to be deprected as of 2.6.30
> per comment in drivers/edac/mpc85xx_edac.c.
And yet they were only removed from the in-kernel dts files in patch
1/2.
> Previous patch in this
> series updates all DTS to use the "fsl,mpc85..." style binding
> for these two nodes, allowing us to finally deprecate said
> notation.
Please leave this around. Once a binding is used, we try to stay
compatible with it when practical. Not all device trees in use come
straight from arch/powerpc/boot/dts (consider custom boards, and
firmware device tree manipulation), and even those that do come
straihgt from the kernel tree are not necessarily rebuilt at the same
time as the kernel.
-Scott
^ permalink raw reply
* Re: [PATCH 1/2] MPC85xx: add definitions for PCI error detection soc part
From: Peter Tyser @ 2010-07-22 17:09 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov
Cc: linuxppc-dev, Doug Thompson, bluesmoke-devel, Dave Jiang
In-Reply-To: <AANLkTikd3pyVa3=V0pqA5uOto+RYWY_0kF_SL0d0B=BD@mail.gmail.com>
> > On Thu, 2010-07-22 at 04:03 +0400, Dmitry Eremin-Solenikov wrote:
> >> Add definitions for PCI error detection device to be handled by (already
> >> existing) mpc85xx_edac.c driver.
> >>
> >> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
> >> ---
> >> arch/powerpc/boot/dts/mpc8536ds.dts | 7 +++++++
> >> arch/powerpc/boot/dts/mpc8536ds_36b.dts | 7 +++++++
> >> arch/powerpc/boot/dts/mpc8540ads.dts | 8 ++++++++
> >> arch/powerpc/boot/dts/mpc8541cds.dts | 14 ++++++++++++++
> >> arch/powerpc/boot/dts/mpc8544ds.dts | 7 +++++++
> >> arch/powerpc/boot/dts/mpc8548cds.dts | 14 ++++++++++++++
> >> arch/powerpc/boot/dts/mpc8555cds.dts | 14 ++++++++++++++
> >> arch/powerpc/boot/dts/mpc8560ads.dts | 7 +++++++
> >> arch/powerpc/boot/dts/mpc8568mds.dts | 7 +++++++
> >> arch/powerpc/boot/dts/sbc8548.dts | 7 +++++++
> >> arch/powerpc/boot/dts/sbc8560.dts | 7 +++++++
> >> arch/powerpc/boot/dts/socrates.dts | 7 +++++++
> >> arch/powerpc/boot/dts/stx_gp3_8560.dts | 7 +++++++
> >> arch/powerpc/boot/dts/tqm8540.dts | 10 ++++++++++
> >> arch/powerpc/boot/dts/tqm8541.dts | 7 +++++++
> >> arch/powerpc/boot/dts/tqm8548-bigflash.dts | 7 +++++++
> >> arch/powerpc/boot/dts/tqm8548.dts | 7 +++++++
> >> arch/powerpc/boot/dts/tqm8555.dts | 7 +++++++
> >> arch/powerpc/boot/dts/tqm8560.dts | 7 +++++++
> >> arch/powerpc/boot/dts/xpedite5200.dts | 7 +++++++
> >> arch/powerpc/boot/dts/xpedite5200_xmon.dts | 7 +++++++
> >> 21 files changed, 172 insertions(+), 0 deletions(-)
> >
> > It looks like the dts files for the MPC8572-based boards weren't
> > included in this change despite patch 2/2 adding support for them. I'd
> > guess some other Freescale CPUs (eg P1020, P2020, etc) could be
> > supported by the same driver if you are inclined to add them to this
> > patch series.
>
> I just did a quick search for all dts including mpc8540-pci node and added
> respective mpc85xx-pci-error node. Current MPC85xx EDAC driver doesn't
> support error handling on PCI-E busses (which MPC8572 and other CPUs
> you mentioned have). I'll maybe look into PCI-E EDAC later. Also I don't have
> access to P10xx/P20xx manuals, so support for them may require some
> more time.
Thanks for the explanation. I noticed this because patch 2/2 adds
support for the 8572 to the mpc85xx_pci_err_of_match[] table. Sounds
like that was the bug instead of my comment above.
Best,
Peter
^ permalink raw reply
* Re: [PATCH][v2] powerpc: rename immap_86xx.h to fsl_guts.h, and add 85xx support
From: Mark Brown @ 2010-07-22 16:49 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, alsa-devel, kumar.gala, lrg
In-Reply-To: <1279816410-19079-1-git-send-email-timur@freescale.com>
On Thu, Jul 22, 2010 at 11:33:30AM -0500, Timur Tabi wrote:
> The immap_86xx.h header file only defines one data structure: the "global
> utilities" register set found on Freescale PowerPC SOCs. Rename this file
> to fsl_guts.h to reflect its true purpose, and extend it to cover the "GUTS"
> register set on 85xx chips.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
^ permalink raw reply
* Re: [PATCH 1/2] MPC85xx: add definitions for PCI error detection soc part
From: Dmitry Eremin-Solenikov @ 2010-07-22 16:56 UTC (permalink / raw)
To: Peter Tyser; +Cc: linuxppc-dev, Dave Jiang, bluesmoke-devel, Doug Thompson
In-Reply-To: <1279811975.7232.8696.camel@petert>
Hello,
On Thu, Jul 22, 2010 at 7:19 PM, Peter Tyser <ptyser@xes-inc.com> wrote:
> Hi Dmitry,
>
> On Thu, 2010-07-22 at 04:03 +0400, Dmitry Eremin-Solenikov wrote:
>> Add definitions for PCI error detection device to be handled by (already
>> existing) mpc85xx_edac.c driver.
>>
>> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>> ---
>> =A0arch/powerpc/boot/dts/mpc8536ds.dts =A0 =A0 =A0 =A0| =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/mpc8536ds_36b.dts =A0 =A0| =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/mpc8540ads.dts =A0 =A0 =A0 | =A0 =A08 ++++++++
>> =A0arch/powerpc/boot/dts/mpc8541cds.dts =A0 =A0 =A0 | =A0 14 +++++++++++=
+++
>> =A0arch/powerpc/boot/dts/mpc8544ds.dts =A0 =A0 =A0 =A0| =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/mpc8548cds.dts =A0 =A0 =A0 | =A0 14 +++++++++++=
+++
>> =A0arch/powerpc/boot/dts/mpc8555cds.dts =A0 =A0 =A0 | =A0 14 +++++++++++=
+++
>> =A0arch/powerpc/boot/dts/mpc8560ads.dts =A0 =A0 =A0 | =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/mpc8568mds.dts =A0 =A0 =A0 | =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/sbc8548.dts =A0 =A0 =A0 =A0 =A0| =A0 =A07 +++++=
++
>> =A0arch/powerpc/boot/dts/sbc8560.dts =A0 =A0 =A0 =A0 =A0| =A0 =A07 +++++=
++
>> =A0arch/powerpc/boot/dts/socrates.dts =A0 =A0 =A0 =A0 | =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/stx_gp3_8560.dts =A0 =A0 | =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/tqm8540.dts =A0 =A0 =A0 =A0 =A0| =A0 10 +++++++=
+++
>> =A0arch/powerpc/boot/dts/tqm8541.dts =A0 =A0 =A0 =A0 =A0| =A0 =A07 +++++=
++
>> =A0arch/powerpc/boot/dts/tqm8548-bigflash.dts | =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/tqm8548.dts =A0 =A0 =A0 =A0 =A0| =A0 =A07 +++++=
++
>> =A0arch/powerpc/boot/dts/tqm8555.dts =A0 =A0 =A0 =A0 =A0| =A0 =A07 +++++=
++
>> =A0arch/powerpc/boot/dts/tqm8560.dts =A0 =A0 =A0 =A0 =A0| =A0 =A07 +++++=
++
>> =A0arch/powerpc/boot/dts/xpedite5200.dts =A0 =A0 =A0| =A0 =A07 +++++++
>> =A0arch/powerpc/boot/dts/xpedite5200_xmon.dts | =A0 =A07 +++++++
>> =A021 files changed, 172 insertions(+), 0 deletions(-)
>
> It looks like the dts files for the MPC8572-based boards weren't
> included in this change despite patch 2/2 adding support for them. =A0I'd
> guess some other Freescale CPUs (eg P1020, P2020, etc) could be
> supported by the same driver if you are inclined to add them to this
> patch series.
I just did a quick search for all dts including mpc8540-pci node and added
respective mpc85xx-pci-error node. Current MPC85xx EDAC driver doesn't
support error handling on PCI-E busses (which MPC8572 and other CPUs
you mentioned have). I'll maybe look into PCI-E EDAC later. Also I don't ha=
ve
access to P10xx/P20xx manuals, so support for them may require some
more time.
--=20
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 2/2] mpc85xx_edac: change to use new definitions for PCI EDAC regspace
From: Dmitry Eremin-Solenikov @ 2010-07-22 16:48 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, bluesmoke-devel, Doug Thompson
In-Reply-To: <566EC982-1CDA-4806-8EC0-8C9F36448F83@kernel.crashing.org>
Hello,
On Thu, Jul 22, 2010 at 7:38 PM, Kumar Gala <galak@kernel.crashing.org> wro=
te:
>
> On Jul 21, 2010, at 7:03 PM, Dmitry Eremin-Solenikov wrote:
>
>> Currently (as mpc8540-pci) devices are not created on of_platform bus,
>> mpc85xx_edac can't probe to them. Follow the change to dts trees to bind
>> not to the main mpc8540-pci node but to special mpc85xx-pci-error nodes,
>> present on soc bus.
>>
>> Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
>> ---
>> drivers/edac/mpc85xx_edac.c | =A0 18 +++++++++---------
>> 1 files changed, 9 insertions(+), 9 deletions(-)
>
> Nak.
>
> We already have a node in the dts for the PCI controller. =A0Lets update =
the platform code to add the pci controller to the of_platform_bus_probe li=
st.
I've had that idea. However it's really look strange to me to call
of_platform_bus_probe() on the bus node, for which we (IMO) explicitly
won't like for
child devices (PCI devices) to be added to of_platform bus. Would it
be suitable to just call of_platform_device_create for it (Or do i
miss someth<ing)?
BTW: While I'm at it, should I change all mpc8540-pci/-pcix device
names to include respective SoC name?
--=20
With best wishes
Dmitry
^ permalink raw reply
* [PATCH][v2] powerpc: rename immap_86xx.h to fsl_guts.h, and add 85xx support
From: Timur Tabi @ 2010-07-22 16:33 UTC (permalink / raw)
To: alsa-devel, linuxppc-dev, lrg, broonie, kumar.gala
The immap_86xx.h header file only defines one data structure: the "global
utilities" register set found on Freescale PowerPC SOCs. Rename this file
to fsl_guts.h to reflect its true purpose, and extend it to cover the "GUTS"
register set on 85xx chips.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
Liam,
This patch is a powerpc-patch, but it's much simpler if you apply it to
multi-component, since only the SSI audio drivers are affected.
.../include/asm/{immap_86xx.h => fsl_guts.h} | 111 +++++++++++++------
sound/soc/fsl/fsl_ssi.c | 2 -
sound/soc/fsl/mpc8610_hpcd.c | 10 +-
3 files changed, 81 insertions(+), 42 deletions(-)
rename arch/powerpc/include/asm/{immap_86xx.h => fsl_guts.h} (66%)
diff --git a/arch/powerpc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/fsl_guts.h
similarity index 66%
rename from arch/powerpc/include/asm/immap_86xx.h
rename to arch/powerpc/include/asm/fsl_guts.h
index 0f165e5..bebd124 100644
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -1,5 +1,5 @@
/**
- * MPC86xx Internal Memory Map
+ * Freecale 85xx and 86xx Global Utilties register set
*
* Authors: Jeff Brown
* Timur Tabi <timur@freescale.com>
@@ -10,73 +10,112 @@
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- *
- * This header file defines structures for various 86xx SOC devices that are
- * used by multiple source files.
*/
-#ifndef __ASM_POWERPC_IMMAP_86XX_H__
-#define __ASM_POWERPC_IMMAP_86XX_H__
+#ifndef __ASM_POWERPC_FSL_GUTS_H__
+#define __ASM_POWERPC_FSL_GUTS_H__
#ifdef __KERNEL__
-/* Global Utility Registers */
-struct ccsr_guts {
+/*
+ * These #ifdefs are safe because it's not possible to build a kernel that
+ * runs on e500 and e600 cores.
+ */
+
+#if !defined(CONFIG_PPC_85xx) && !defined(CONFIG_PPC_86xx)
+#error Only 85xx and 86xx SOCs are supported
+#endif
+
+/**
+ * Global Utility Registers.
+ *
+ * Not all registers defined in this structure are available on all chips, so
+ * you are expected to know whether a given register actually exists on your
+ * chip before you access it.
+ *
+ * Also, some registers are similar on different chips but have slightly
+ * different names. In these cases, one name is chosen to avoid extraneous
+ * #ifdefs.
+ */
+#ifdef CONFIG_PPC_85xx
+struct ccsr_guts_85xx {
+#else
+struct ccsr_guts_86xx {
+#endif
__be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
__be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
__be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */
__be32 pordevsr; /* 0x.000c - POR I/O Device Status Register */
__be32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */
- u8 res1[0x20 - 0x14];
+ __be32 pordevsr2; /* 0x.0014 - POR device status register 2 */
+ u8 res018[0x20 - 0x18];
__be32 porcir; /* 0x.0020 - POR Configuration Information Register */
- u8 res2[0x30 - 0x24];
+ u8 res024[0x30 - 0x24];
__be32 gpiocr; /* 0x.0030 - GPIO Control Register */
- u8 res3[0x40 - 0x34];
+ u8 res034[0x40 - 0x34];
__be32 gpoutdr; /* 0x.0040 - General-Purpose Output Data Register */
- u8 res4[0x50 - 0x44];
+ u8 res044[0x50 - 0x44];
__be32 gpindr; /* 0x.0050 - General-Purpose Input Data Register */
- u8 res5[0x60 - 0x54];
+ u8 res054[0x60 - 0x54];
__be32 pmuxcr; /* 0x.0060 - Alternate Function Signal Multiplex Control */
- u8 res6[0x70 - 0x64];
+ __be32 pmuxcr2; /* 0x.0064 - Alternate function signal multiplex control 2 */
+ __be32 dmuxcr; /* 0x.0068 - DMA Mux Control Register */
+ u8 res06c[0x70 - 0x6c];
__be32 devdisr; /* 0x.0070 - Device Disable Control */
__be32 devdisr2; /* 0x.0074 - Device Disable Control 2 */
- u8 res7[0x80 - 0x78];
+ u8 res078[0x7c - 0x78];
+ __be32 pmjcr; /* 0x.007c - 4 Power Management Jog Control Register */
__be32 powmgtcsr; /* 0x.0080 - Power Management Status and Control Register */
- u8 res8[0x90 - 0x84];
+ __be32 pmrccr; /* 0x.0084 - Power Management Reset Counter Configuration Register */
+ __be32 pmpdccr; /* 0x.0088 - Power Management Power Down Counter Configuration Register */
+ __be32 pmcdr; /* 0x.008c - 4Power management clock disable register */
__be32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */
__be32 rstrscr; /* 0x.0094 - Reset Request Status and Control Register */
- u8 res9[0xA0 - 0x98];
+ __be32 ectrstcr; /* 0x.0098 - Exception reset control register */
+ __be32 autorstsr; /* 0x.009c - Automatic reset status register */
__be32 pvr; /* 0x.00a0 - Processor Version Register */
__be32 svr; /* 0x.00a4 - System Version Register */
- u8 res10[0xB0 - 0xA8];
+ u8 res0a8[0xb0 - 0xa8];
__be32 rstcr; /* 0x.00b0 - Reset Control Register */
- u8 res11[0xC0 - 0xB4];
+ u8 res0b4[0xc0 - 0xb4];
+#ifdef CONFIG_PPC_85xx
+ __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register */
+#else
__be32 elbcvselcr; /* 0x.00c0 - eLBC Voltage Select Ctrl Reg */
- u8 res12[0x800 - 0xC4];
+#endif
+ u8 res0c4[0x224 - 0xc4];
+ __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
+ __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
+ u8 res22c[0x800 - 0x22c];
__be32 clkdvdr; /* 0x.0800 - Clock Divide Register */
- u8 res13[0x900 - 0x804];
+ u8 res804[0x900 - 0x804];
__be32 ircr; /* 0x.0900 - Infrared Control Register */
- u8 res14[0x908 - 0x904];
+ u8 res904[0x908 - 0x904];
__be32 dmacr; /* 0x.0908 - DMA Control Register */
- u8 res15[0x914 - 0x90C];
+ u8 res90c[0x914 - 0x90c];
__be32 elbccr; /* 0x.0914 - eLBC Control Register */
- u8 res16[0xB20 - 0x918];
+ u8 res918[0xb20 - 0x918];
__be32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */
__be32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */
__be32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */
- u8 res17[0xE00 - 0xB2C];
+ u8 resb2c[0xe00 - 0xb2c];
__be32 clkocr; /* 0x.0e00 - Clock Out Select Register */
- u8 res18[0xE10 - 0xE04];
+ u8 rese04[0xe10 - 0xe04];
__be32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */
- u8 res19[0xE20 - 0xE14];
+ u8 rese14[0xe20 - 0xe14];
__be32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */
- u8 res20[0xF04 - 0xE24];
+ __be32 cpfor; /* 0x.0e24 - L2 charge pump fuse override register */
+ u8 rese28[0xf04 - 0xe28];
__be32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */
__be32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */
- u8 res21[0xF40 - 0xF0C];
- __be32 srds2cr0; /* 0x.0f40 - SerDes1 Control Register 0 */
- __be32 srds2cr1; /* 0x.0f44 - SerDes1 Control Register 0 */
+ u8 resf0c[0xf2c - 0xf0c];
+ __be32 itcr; /* 0x.0f2c - Internal transaction control register */
+ u8 resf30[0xf40 - 0xf30];
+ __be32 srds2cr0; /* 0x.0f40 - SerDes2 Control Register 0 */
+ __be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */
} __attribute__ ((packed));
+#ifdef CONFIG_PPC_86xx
+
#define CCSR_GUTS_DMACR_DEV_SSI 0 /* DMA controller/channel set to SSI */
#define CCSR_GUTS_DMACR_DEV_IR 1 /* DMA controller/channel set to IR */
@@ -93,7 +132,7 @@ struct ccsr_guts {
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx)
*/
-static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
+static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts,
unsigned int co, unsigned int ch, unsigned int device)
{
unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
@@ -129,7 +168,7 @@ static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* value: the new value for the bit (0 or 1)
*/
-static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
+static inline void guts_set_pmuxcr_dma(struct ccsr_guts_86xx __iomem *guts,
unsigned int co, unsigned int ch, unsigned int value)
{
if ((ch == 0) || (ch == 3)) {
@@ -152,5 +191,7 @@ static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
#define CCSR_GUTS_CLKDVDR_SSICLK_MASK 0x000000FF
#define CCSR_GUTS_CLKDVDR_SSICLK(x) ((x) & CCSR_GUTS_CLKDVDR_SSICLK_MASK)
-#endif /* __ASM_POWERPC_IMMAP_86XX_H__ */
-#endif /* __KERNEL__ */
+#endif
+
+#endif
+#endif
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 31e8e5c..48fc0bd 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -24,8 +24,6 @@
#include <sound/initval.h>
#include <sound/soc.h>
-#include <asm/immap_86xx.h>
-
#include "fsl_ssi.h"
/**
diff --git a/sound/soc/fsl/mpc8610_hpcd.c b/sound/soc/fsl/mpc8610_hpcd.c
index 81ab639..69aeaeb 100644
--- a/sound/soc/fsl/mpc8610_hpcd.c
+++ b/sound/soc/fsl/mpc8610_hpcd.c
@@ -14,7 +14,7 @@
#include <linux/interrupt.h>
#include <linux/of_device.h>
#include <sound/soc.h>
-#include <asm/immap_86xx.h>
+#include <asm/fsl_guts.h>
#include "../codecs/cs4270.h"
#include "fsl_dma.h"
@@ -54,9 +54,9 @@ static int mpc8610_hpcd_machine_probe(struct platform_device *sound_device)
struct snd_soc_card *card = platform_get_drvdata(sound_device);
struct mpc8610_hpcd_data *machine_data =
container_of(card, struct mpc8610_hpcd_data, card);
- struct ccsr_guts __iomem *guts;
+ struct ccsr_guts_86xx __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts_86xx));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
@@ -139,9 +139,9 @@ static int mpc8610_hpcd_machine_remove(struct platform_device *sound_device)
struct snd_soc_card *card = platform_get_drvdata(sound_device);
struct mpc8610_hpcd_data *machine_data =
container_of(card, struct mpc8610_hpcd_data, card);
- struct ccsr_guts __iomem *guts;
+ struct ccsr_guts_86xx __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts_86xx));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
--
1.7.0.1
^ permalink raw reply related
* [PATCH 3/3] USB: add USB EHCI support for MPC5121 SoC
From: Anatolij Gustschin @ 2010-07-22 16:25 UTC (permalink / raw)
To: linux-usb
Cc: David Brownell, Wolfgang Denk, Detlev Zundel, Greg Kroah-Hartman,
linuxppc-dev, Anatolij Gustschin
In-Reply-To: <1279815922-27198-1-git-send-email-agust@denx.de>
Extends FSL EHCI platform driver glue layer to support
MPC5121 USB controllers. MPC5121 Rev 2.0 silicon EHCI
registers are in big endian format. The appropriate flags
are set using the information in the platform data structure.
MPC83xx system interface registers are not available on
MPC512x, so the access to these registers is isolated in
MPC512x case. Furthermore the USB controller clocks
must be enabled before 512x register accesses which is
done by providing platform specific init callback.
The MPC512x internal USB PHY doesn't provide supply voltage.
For boards using different power switches allow specifying
DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal
PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault"
properties in the device tree USB nodes. Adds documentation
for this new device tree bindings.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/powerpc/dts-bindings/fsl/usb.txt | 22 +++++
drivers/usb/Kconfig | 1 +
drivers/usb/host/Kconfig | 6 +-
drivers/usb/host/ehci-fsl.c | 107 +++++++++++++++++------
drivers/usb/host/ehci-fsl.h | 19 ++++-
drivers/usb/host/ehci-mem.c | 2 +-
drivers/usb/host/fsl-mph-dr-of.c | 89 ++++++++++++++++++++
include/linux/fsl_devices.h | 15 ++++
8 files changed, 229 insertions(+), 32 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/usb.txt b/Documentation/powerpc/dts-bindings/fsl/usb.txt
index b001524..bd5723f 100644
--- a/Documentation/powerpc/dts-bindings/fsl/usb.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/usb.txt
@@ -8,6 +8,7 @@ and additions :
Required properties :
- compatible : Should be "fsl-usb2-mph" for multi port host USB
controllers, or "fsl-usb2-dr" for dual role USB controllers
+ or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121
- phy_type : For multi port host USB controllers, should be one of
"ulpi", or "serial". For dual role USB controllers, should be
one of "ulpi", "utmi", "utmi_wide", or "serial".
@@ -33,6 +34,12 @@ Recommended properties :
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
+Optional properties :
+ - fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the
+ port power polarity of internal PHY signal DRVVBUS is inverted.
+ - fsl,invert-pwr-fault : boolean; for MPC5121 USB0 only. Indicates
+ the PWR_FAULT signal polarity is inverted.
+
Example multi port host USB controller device node :
usb@22000 {
compatible = "fsl-usb2-mph";
@@ -57,3 +64,18 @@ Example dual role USB controller device node :
dr_mode = "otg";
phy = "ulpi";
};
+
+Example dual role USB controller device node for MPC5121ADS:
+
+ usb@4000 {
+ compatible = "fsl,mpc5121-usb2-dr";
+ reg = <0x4000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ fsl,invert-drvvbus;
+ fsl,invert-pwr-fault;
+ };
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 6a58cb1..6e547b5 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -58,6 +58,7 @@ config USB_ARCH_HAS_OHCI
config USB_ARCH_HAS_EHCI
boolean
default y if PPC_83xx
+ default y if PPC_MPC512x
default y if SOC_AU1200
default y if ARCH_IXP4XX
default y if ARCH_W90X900
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 6687523..90e50f0 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -93,12 +93,14 @@ config USB_EHCI_TT_NEWSCHED
config USB_EHCI_BIG_ENDIAN_MMIO
bool
- depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX)
+ depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || ARCH_IXP4XX || \
+ XPS_USB_HCD_XILINX || PPC_MPC512x)
default y
config USB_EHCI_BIG_ENDIAN_DESC
bool
- depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX)
+ depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
+ PPC_MPC512x)
default y
config XPS_USB_HCD_XILINX
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index a416421..ff50f5c 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -116,13 +116,39 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
goto err3;
}
- /* Enable USB controller */
- temp = in_be32(hcd->regs + 0x500);
- out_be32(hcd->regs + 0x500, temp | 0x4);
+ pdata->regs = hcd->regs;
+
+ /*
+ * do platform specific init: check the clock, grab/config pins, etc.
+ */
+ if (pdata->init && pdata->init(pdev)) {
+ retval = -ENODEV;
+ goto err3;
+ }
+
+ /*
+ * Check if it is MPC5121 SoC, otherwise set pdata->have_sysif_regs
+ * flag for 83xx or 8536 system interface registers.
+ */
+ if (pdata->big_endian_mmio)
+ temp = in_be32(hcd->regs + FSL_SOC_USB_ID);
+ else
+ temp = in_le32(hcd->regs + FSL_SOC_USB_ID);
+
+ if ((temp & ID_MSK) != (~((temp & NID_MSK) >> 8) & ID_MSK))
+ pdata->have_sysif_regs = 1;
+
+ /* Enable USB controller, 83xx or 8536 */
+ if (pdata->have_sysif_regs)
+ setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
/* Set to Host mode */
- temp = in_le32(hcd->regs + 0x1a8);
- out_le32(hcd->regs + 0x1a8, temp | 0x3);
+ if (pdata->big_endian_mmio) {
+ setbits32(hcd->regs + FSL_SOC_USB_USBMODE, USBMODE_CM_HOST);
+ } else {
+ clrsetbits_le32(hcd->regs + FSL_SOC_USB_USBMODE,
+ USBMODE_CM_MASK, USBMODE_CM_HOST);
+ }
retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
if (retval != 0)
@@ -137,6 +163,8 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
usb_put_hcd(hcd);
err1:
dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
+ if (pdata->exit)
+ pdata->exit(pdev);
return retval;
}
@@ -154,17 +182,30 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
struct platform_device *pdev)
{
+ struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
+
usb_remove_hcd(hcd);
+
+ /*
+ * do platform specific un-initialization:
+ * release iomux pins, disable clock, etc.
+ */
+ if (pdata->exit)
+ pdata->exit(pdev);
iounmap(hcd->regs);
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
}
-static void mpc83xx_setup_phy(struct ehci_hcd *ehci,
- enum fsl_usb2_phy_modes phy_mode,
- unsigned int port_offset)
+static void ehci_fsl_setup_phy(struct ehci_hcd *ehci,
+ enum fsl_usb2_phy_modes phy_mode,
+ unsigned int port_offset)
{
- u32 portsc = 0;
+ u32 portsc;
+
+ portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
+ portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
+
switch (phy_mode) {
case FSL_USB2_PHY_ULPI:
portsc |= PORT_PTS_ULPI;
@@ -184,20 +225,21 @@ static void mpc83xx_setup_phy(struct ehci_hcd *ehci,
ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
}
-static void mpc83xx_usb_setup(struct usb_hcd *hcd)
+static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
{
- struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ struct usb_hcd *hcd = ehci_to_hcd(ehci);
struct fsl_usb2_platform_data *pdata;
void __iomem *non_ehci = hcd->regs;
u32 temp;
- pdata =
- (struct fsl_usb2_platform_data *)hcd->self.controller->
- platform_data;
+ pdata = hcd->self.controller->platform_data;
+
/* Enable PHY interface in the control reg. */
- temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
- out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
- out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b);
+ if (pdata->have_sysif_regs) {
+ temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
+ out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
+ out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b);
+ }
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
/*
@@ -214,7 +256,7 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
- mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
+ ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
unsigned int chip, rev, svr;
@@ -228,27 +270,31 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
ehci->has_fsl_port_bug = 1;
if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
- mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
+ ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
- mpc83xx_setup_phy(ehci, pdata->phy_mode, 1);
+ ehci_fsl_setup_phy(ehci, pdata->phy_mode, 1);
}
/* put controller in host mode. */
- ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE);
+ temp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
+ ehci_writel(ehci, temp, non_ehci + FSL_SOC_USB_USBMODE);
+
+ if (pdata->have_sysif_regs) {
#ifdef CONFIG_PPC_85xx
- out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
- out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
+ out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
+ out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
#else
- out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
- out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
+ out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
+ out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
#endif
- out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
+ out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
+ }
}
/* called after powerup, by probe or system-pm "wakeup" */
static int ehci_fsl_reinit(struct ehci_hcd *ehci)
{
- mpc83xx_usb_setup(ehci_to_hcd(ehci));
+ ehci_fsl_usb_setup(ehci);
ehci_port_power(ehci, 0);
return 0;
@@ -259,6 +305,11 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
int retval;
+ struct fsl_usb2_platform_data *pdata;
+
+ pdata = hcd->self.controller->platform_data;
+ ehci->big_endian_desc = pdata->big_endian_desc;
+ ehci->big_endian_mmio = pdata->big_endian_mmio;
/* EHCI registers start at offset 0x100 */
ehci->caps = hcd->regs + 0x100;
@@ -372,7 +423,7 @@ static const struct hc_driver ehci_fsl_hc_driver = {
* generic hardware linkage
*/
.irq = ehci_irq,
- .flags = HCD_USB2,
+ .flags = HCD_USB2 | HCD_MEMORY,
/*
* basic lifecycle operations
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index b5e59db..e56be7b 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2005 freescale semiconductor
+/* Copyright (C) 2005-2010 Freescale Semiconductor, Inc.
* Copyright (c) 2005 MontaVista Software
*
* This program is free software; you can redistribute it and/or modify it
@@ -19,6 +19,11 @@
#define _EHCI_FSL_H
/* offsets for the non-ehci registers in the FSL SOC USB controller */
+#define FSL_SOC_USB_ID 0x0
+#define ID_MSK 0x3f
+#define NID_MSK 0x3f00
+#define FSL_SOC_USB_SBUSCFG 0x90
+#define FSL_SOC_USB_BURSTSIZE 0x160
#define FSL_SOC_USB_ULPIVP 0x170
#define FSL_SOC_USB_PORTSC1 0x184
#define PORT_PTS_MSK (3<<30)
@@ -26,8 +31,20 @@
#define PORT_PTS_ULPI (2<<30)
#define PORT_PTS_SERIAL (3<<30)
#define PORT_PTS_PTW (1<<28)
+#define PORT_PTS_PHCD (1<<23)
#define FSL_SOC_USB_PORTSC2 0x188
#define FSL_SOC_USB_USBMODE 0x1a8
+#define USBMODE_CM_MASK (3 << 0) /* controller mode mask */
+#define USBMODE_CM_HOST (3 << 0) /* controller mode: host */
+#define USBMODE_ES (1 << 2) /* (Big) Endian Select */
+
+#define FSL_SOC_USB_USBGENCTRL 0x200
+#define USBGENCTRL_PPP (1 << 3)
+#define USBGENCTRL_PFP (1 << 2)
+#define FSL_SOC_USB_ISIPHYCTRL 0x204
+#define ISIPHYCTRL_PXE (1)
+#define ISIPHYCTRL_PHYE (1 << 4)
+
#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
diff --git a/drivers/usb/host/ehci-mem.c b/drivers/usb/host/ehci-mem.c
index 1f3f01e..d36e4e7 100644
--- a/drivers/usb/host/ehci-mem.c
+++ b/drivers/usb/host/ehci-mem.c
@@ -40,7 +40,7 @@ static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd,
{
memset (qtd, 0, sizeof *qtd);
qtd->qtd_dma = dma;
- qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
+ qtd->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
qtd->hw_next = EHCI_LIST_END(ehci);
qtd->hw_alt_next = EHCI_LIST_END(ehci);
INIT_LIST_HEAD (&qtd->qtd_list);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 020a939..0ced9fc 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -14,6 +14,7 @@
#include <linux/fsl_devices.h>
#include <linux/io.h>
#include <linux/of_platform.h>
+#include <linux/clk.h>
struct fsl_usb2_dev_data {
char *dr_mode; /* controller mode */
@@ -146,6 +147,12 @@ static int __devinit fsl_usb2_mph_dr_of_probe(struct of_device *ofdev,
pdata->operating_mode = FSL_USB2_MPH_HOST;
} else {
+ if (of_get_property(np, "fsl,invert-drvvbus", NULL))
+ pdata->invert_drvvbus = 1;
+
+ if (of_get_property(np, "fsl,invert-pwr-fault", NULL))
+ pdata->invert_pwr_fault = 1;
+
/* setup mode selected in the device tree */
pdata->operating_mode = dev_data->op_mode;
}
@@ -167,9 +174,91 @@ static int __devinit fsl_usb2_mph_dr_of_probe(struct of_device *ofdev,
return 0;
}
+#ifdef CONFIG_PPC_MPC512x
+
+#define USBGENCTRL 0x200 /* NOTE: big endian */
+#define GC_WU_INT_CLR (1 << 5) /* Wakeup int clear */
+#define GC_ULPI_SEL (1 << 4) /* ULPI i/f select (usb0 only)*/
+#define GC_PPP (1 << 3) /* Inv. Port Power Polarity */
+#define GC_PFP (1 << 2) /* Inv. Power Fault Polarity */
+#define GC_WU_ULPI_EN (1 << 1) /* Wakeup on ULPI event */
+#define GC_WU_IE (1 << 1) /* Wakeup interrupt enable */
+
+#define ISIPHYCTRL 0x204 /* NOTE: big endian */
+#define PHYCTRL_PHYE (1 << 4) /* On-chip UTMI PHY enable */
+#define PHYCTRL_BSENH (1 << 3) /* Bit Stuff Enable High */
+#define PHYCTRL_BSEN (1 << 2) /* Bit Stuff Enable */
+#define PHYCTRL_LSFE (1 << 1) /* Line State Filter Enable */
+#define PHYCTRL_PXE (1 << 0) /* PHY oscillator enable */
+
+int fsl_usb2_mpc5121_init(struct platform_device *pdev)
+{
+ struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
+ struct clk *clk;
+ char clk_name[10];
+ int base, clk_num;
+
+ base = pdev->resource->start & 0xf000;
+ if (base == 0x3000)
+ clk_num = 1;
+ else if (base == 0x4000)
+ clk_num = 2;
+ else
+ return -ENODEV;
+
+ snprintf(clk_name, sizeof(clk_name), "usb%d_clk", clk_num);
+ clk = clk_get(&pdev->dev, clk_name);
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "failed to get clk\n");
+ return PTR_ERR(clk);
+ }
+
+ clk_enable(clk);
+ pdata->clk = clk;
+
+ if (pdata->phy_mode == FSL_USB2_PHY_UTMI_WIDE) {
+ u32 reg = 0;
+
+ if (pdata->invert_drvvbus)
+ reg |= GC_PPP;
+
+ if (pdata->invert_pwr_fault)
+ reg |= GC_PFP;
+
+ out_be32(pdata->regs + ISIPHYCTRL, PHYCTRL_PHYE | PHYCTRL_PXE);
+ out_be32(pdata->regs + USBGENCTRL, reg);
+ }
+ return 0;
+}
+
+static void fsl_usb2_mpc5121_exit(struct platform_device *pdev)
+{
+ struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
+
+ pdata->regs = NULL;
+
+ if (pdata->clk) {
+ clk_disable(pdata->clk);
+ clk_put(pdata->clk);
+ }
+}
+
+struct fsl_usb2_platform_data fsl_usb2_mpc5121_pd = {
+ .big_endian_desc = 1,
+ .big_endian_mmio = 1,
+ .es = 1,
+ .le_setup_buf = 1,
+ .init = fsl_usb2_mpc5121_init,
+ .exit = fsl_usb2_mpc5121_exit,
+};
+#endif /* CONFIG_PPC_MPC512x */
+
static const struct of_device_id fsl_usb2_mph_dr_of_match[] = {
{ .compatible = "fsl-usb2-mph", },
{ .compatible = "fsl-usb2-dr", },
+#ifdef CONFIG_PPC_MPC512x
+ { .compatible = "fsl,mpc5121-usb2-dr", .data = &fsl_usb2_mpc5121_pd, },
+#endif
{},
};
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 28e33fe..d5f9a74 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -58,11 +58,26 @@ enum fsl_usb2_phy_modes {
FSL_USB2_PHY_SERIAL,
};
+struct clk;
+struct platform_device;
+
struct fsl_usb2_platform_data {
/* board specific information */
enum fsl_usb2_operating_modes operating_mode;
enum fsl_usb2_phy_modes phy_mode;
unsigned int port_enables;
+
+ int (*init)(struct platform_device *);
+ void (*exit)(struct platform_device *);
+ void __iomem *regs; /* ioremap'd register base */
+ struct clk *clk;
+ unsigned big_endian_mmio:1;
+ unsigned big_endian_desc:1;
+ unsigned es:1; /* need USBMODE:ES */
+ unsigned le_setup_buf:1;
+ unsigned have_sysif_regs:1;
+ unsigned invert_drvvbus:1;
+ unsigned invert_pwr_fault:1;
};
/* Flags in fsl_usb2_mph_platform_data */
--
1.7.0.4
^ permalink raw reply related
* [PATCH 2/3] USB: add of_platform glue driver for FSL USB DR controller
From: Anatolij Gustschin @ 2010-07-22 16:25 UTC (permalink / raw)
To: linux-usb
Cc: David Brownell, Wolfgang Denk, Detlev Zundel, Greg Kroah-Hartman,
linuxppc-dev, Anatolij Gustschin
In-Reply-To: <1279815922-27198-1-git-send-email-agust@denx.de>
The driver creates platform devices based on the information
from USB nodes in the flat device tree. This is the replacement
for old arch fsl_soc usb code removed by the previous patch.
It uses usual of-style binding, available EHCI-HCD and UDC
drivers can be bound to the created devices. The new of-style
driver additionaly instantiates USB OTG platform device, as the
appropriate USB OTG driver will be added soon.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
---
drivers/usb/gadget/Kconfig | 1 +
drivers/usb/host/Kconfig | 5 +
drivers/usb/host/Makefile | 1 +
drivers/usb/host/fsl-mph-dr-of.c | 189 ++++++++++++++++++++++++++++++++++++++
4 files changed, 196 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/host/fsl-mph-dr-of.c
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index cd27f9b..e15e314 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -158,6 +158,7 @@ config USB_GADGET_FSL_USB2
boolean "Freescale Highspeed USB DR Peripheral Controller"
depends on FSL_SOC || ARCH_MXC
select USB_GADGET_DUALSPEED
+ select USB_FSL_MPH_DR_OF
help
Some of Freescale PowerPC processors have a High Speed
Dual-Role(DR) USB controller, which supports device mode.
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 2d926ce..6687523 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -112,10 +112,15 @@ config XPS_USB_HCD_XILINX
support both high speed and full speed devices, or high speed
devices only.
+config USB_FSL_MPH_DR_OF
+ bool
+ depends on PPC_OF
+
config USB_EHCI_FSL
bool "Support for Freescale on-chip EHCI USB controller"
depends on USB_EHCI_HCD && FSL_SOC
select USB_EHCI_ROOT_HUB_TT
+ select USB_FSL_MPH_DR_OF
---help---
Variation of ARC USB block used in some Freescale chips.
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index b6315aa..aacbe82 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -33,4 +33,5 @@ obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o
obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o
obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o
+obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
new file mode 100644
index 0000000..020a939
--- /dev/null
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -0,0 +1,189 @@
+/*
+ * Setup platform devices needed by the Freescale multi-port host
+ * and/or dual-role USB controller modules based on the description
+ * in flat device tree.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/fsl_devices.h>
+#include <linux/io.h>
+#include <linux/of_platform.h>
+
+struct fsl_usb2_dev_data {
+ char *dr_mode; /* controller mode */
+ char *drivers[3]; /* drivers to instantiate for this mode */
+ enum fsl_usb2_operating_modes op_mode; /* operating mode */
+};
+
+struct fsl_usb2_dev_data dr_mode_data[] __devinitdata = {
+ {
+ "host",
+ { "fsl-ehci", NULL, NULL, },
+ FSL_USB2_DR_HOST,
+ },
+ {
+ "otg",
+ { "fsl-ehci", "fsl-usb2-udc", "fsl-usb2-otg", },
+ FSL_USB2_DR_OTG,
+ },
+ {
+ "periferal",
+ { "fsl-usb2-udc", NULL, NULL, },
+ FSL_USB2_DR_DEVICE,
+ },
+};
+
+struct fsl_usb2_dev_data * __devinit get_dr_mode_data(struct device_node *np)
+{
+ const unsigned char *prop;
+ int i;
+
+ prop = of_get_property(np, "dr_mode", NULL);
+ if (prop) {
+ for (i = 0; i < ARRAY_SIZE(dr_mode_data); i++) {
+ if (!strcmp(prop, dr_mode_data[i].dr_mode))
+ return &dr_mode_data[i];
+ }
+ }
+ return &dr_mode_data[0]; /* mode not specified, use host */
+}
+
+static enum fsl_usb2_phy_modes __devinit determine_usb_phy(const char *phy_type)
+{
+ if (!phy_type)
+ return FSL_USB2_PHY_NONE;
+ if (!strcasecmp(phy_type, "ulpi"))
+ return FSL_USB2_PHY_ULPI;
+ if (!strcasecmp(phy_type, "utmi"))
+ return FSL_USB2_PHY_UTMI;
+ if (!strcasecmp(phy_type, "utmi_wide"))
+ return FSL_USB2_PHY_UTMI_WIDE;
+ if (!strcasecmp(phy_type, "serial"))
+ return FSL_USB2_PHY_SERIAL;
+
+ return FSL_USB2_PHY_NONE;
+}
+
+struct platform_device * __devinit
+fsl_usb2_device_register(struct of_device *ofdev,
+ struct fsl_usb2_platform_data *pdata,
+ const char *name, int id)
+{
+ struct platform_device *pdev;
+ const struct resource *res = ofdev->resource;
+ unsigned int num = ofdev->num_resources;
+ int retval;
+
+ pdev = platform_device_alloc(name, id);
+ if (!pdev) {
+ retval = -ENOMEM;
+ goto error;
+ }
+
+ pdev->dev.parent = &ofdev->dev;
+
+ pdev->dev.coherent_dma_mask = ofdev->dev.coherent_dma_mask;
+ pdev->dev.dma_mask = &pdev->archdata.dma_mask;
+ *pdev->dev.dma_mask = *ofdev->dev.dma_mask;
+
+ retval = platform_device_add_data(pdev, pdata, sizeof(*pdata));
+ if (retval)
+ goto error;
+
+ if (num) {
+ retval = platform_device_add_resources(pdev, res, num);
+ if (retval)
+ goto error;
+ }
+
+ retval = platform_device_add(pdev);
+ if (retval)
+ goto error;
+
+ return pdev;
+
+error:
+ platform_device_put(pdev);
+ return ERR_PTR(retval);
+}
+
+static int __devinit fsl_usb2_mph_dr_of_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct device_node *np = ofdev->dev.of_node;
+ struct platform_device *usb_dev;
+ struct fsl_usb2_platform_data data, *pdata;
+ struct fsl_usb2_dev_data *dev_data;
+ const unsigned char *prop;
+ static unsigned int idx;
+ int i;
+
+ if (!of_device_is_available(np))
+ return -ENODEV;
+
+ pdata = match->data;
+ if (!pdata) {
+ memset(&data, 0, sizeof(data));
+ pdata = &data;
+ }
+
+ dev_data = get_dr_mode_data(np);
+
+ if (of_device_is_compatible(np, "fsl-usb2-mph")) {
+ prop = of_get_property(np, "port0", NULL);
+ if (prop)
+ pdata->port_enables |= FSL_USB2_PORT0_ENABLED;
+
+ prop = of_get_property(np, "port1", NULL);
+ if (prop)
+ pdata->port_enables |= FSL_USB2_PORT1_ENABLED;
+
+ pdata->operating_mode = FSL_USB2_MPH_HOST;
+ } else {
+ /* setup mode selected in the device tree */
+ pdata->operating_mode = dev_data->op_mode;
+ }
+
+ prop = of_get_property(np, "phy_type", NULL);
+ pdata->phy_mode = determine_usb_phy(prop);
+
+ for (i = 0; i < ARRAY_SIZE(dev_data->drivers); i++) {
+ if (!dev_data->drivers[i])
+ continue;
+ usb_dev = fsl_usb2_device_register(ofdev, pdata,
+ dev_data->drivers[i], idx);
+ if (IS_ERR(usb_dev)) {
+ dev_err(&ofdev->dev, "Can't register usb device\n");
+ return PTR_ERR(usb_dev);
+ }
+ }
+ idx++;
+ return 0;
+}
+
+static const struct of_device_id fsl_usb2_mph_dr_of_match[] = {
+ { .compatible = "fsl-usb2-mph", },
+ { .compatible = "fsl-usb2-dr", },
+ {},
+};
+
+static struct of_platform_driver fsl_usb2_mph_dr_driver = {
+ .driver = {
+ .name = "fsl-usb2-mph-dr",
+ .owner = THIS_MODULE,
+ .of_match_table = fsl_usb2_mph_dr_of_match,
+ },
+ .probe = fsl_usb2_mph_dr_of_probe,
+};
+
+static int __init fsl_usb2_mph_dr_init(void)
+{
+ return of_register_platform_driver(&fsl_usb2_mph_dr_driver);
+}
+fs_initcall(fsl_usb2_mph_dr_init);
--
1.7.0.4
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