* RE: [PATCH 3/3 RFC] dt: add documentation of ARM dt boot interface
From: Stephen Neuendorffer @ 2011-01-31 18:00 UTC (permalink / raw)
To: Grant Likely, devicetree-discuss, linuxppc-dev, linux-kernel; +Cc: sam
In-Reply-To: <20110131074510.9058.59071.stgit@localhost6.localdomain6>
> -----Original Message-----
> From: linuxppc-dev-bounces+stephen=3Dneuendorffer.name@lists.ozlabs.org
[mailto:linuxppc-dev-
> bounces+stephen=3Dneuendorffer.name@lists.ozlabs.org] On Behalf Of Grant
Likely
> Sent: Sunday, January 30, 2011 11:46 PM
> To: devicetree-discuss@lists.ozlabs.org;
linuxppc-dev@lists.ozlabs.org; linux-kernel@vger.kernel.org
> Cc: sam@ravnborg.org
> Subject: [PATCH 3/3 RFC] dt: add documentation of ARM dt boot
interface
> =
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> =
> For RFC only. I do not plan to merge this change yet.
> =
> g.
> =
> Documentation/devicetree/booting-without-of.txt | 40
+++++++++++++++++++++++
> 1 files changed, 40 insertions(+), 0 deletions(-)
> =
> diff --git a/Documentation/devicetree/booting-without-of.txt
b/Documentation/devicetree/booting-
> without-of.txt
> index 6bca668..3950aea 100644
> --- a/Documentation/devicetree/booting-without-of.txt
> +++ b/Documentation/devicetree/booting-without-of.txt
In order to make this more generic, perhaps it should change names, so
that it is actually a description of what the file
describes, as opposed to what it doesn't describe. "booting.txt"?
> @@ -13,6 +13,7 @@ Table of Contents
> =
> I - Introduction
> 1) Entry point for arch/powerpc
> + 2) Entry point for arch/arm
We should probably include microblaze here too...
Steve
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^ permalink raw reply
* Re: [PATCH 1/3] dt: Move device tree documentation out of powerpc directory
From: Josh Boyer @ 2011-01-31 11:41 UTC (permalink / raw)
To: Grant Likely; +Cc: sam, devicetree-discuss, linuxppc-dev, linux-kernel
In-Reply-To: <20110131074446.9058.52690.stgit@localhost6.localdomain6>
On Mon, Jan 31, 2011 at 12:44:57AM -0700, Grant Likely wrote:
>The device tree is used by more than just PowerPC. Make the documentation
>directory available to all.
>
>v2: reorganized files while moving to create arch and driver specific
> directories.
Thanks Grant.
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
^ permalink raw reply
* Re: [PATCH 2/3] dt: Remove obsolete description of powerpc boot interface
From: Josh Boyer @ 2011-01-31 11:36 UTC (permalink / raw)
To: Grant Likely; +Cc: sam, devicetree-discuss, linuxppc-dev, linux-kernel
In-Reply-To: <20110131074502.9058.11473.stgit@localhost6.localdomain6>
On Mon, Jan 31, 2011 at 12:45:05AM -0700, Grant Likely wrote:
>32 and 64 bit powerpc support has been merged for a while now, but
>the booting-without-of.txt document still describes 32 bit as not
>supporting multiplatform, which is no longer true. This patch fixes
>the documentation.
>
>Also remove references to powerpc-specific details outside of section
>I in preparation to add details for other architectures.
There's a line around 500 that starts:
"The kernel powerpc generic code does..."
Perhaps the powerpc reference should be dropped there?
Also, there are several mentions of "real Open Firmware", which are
probably just fine, and prom_init(), which are probably arch specific.
There is a section that talks about ranges that starts with:
"For a new 64-bit powerpc board, I...".
Section III 5) has all kinds of powerpc specific stuff. CHRP,
pSeries, PAPR in the root node. The references to Apple machines for
examples are probably OK, but it shouldn't make PowerPC items as
explicit requirements.
Section III 5e) references a file that doesn't exist:
arch/ppc64/kernel/setup.c
Section V, paragraph 2 references a file that doesn't exist:
arch/ppc64/kernel/prom.c
Hope that helps you...
josh
^ permalink raw reply
* Re: [PATCH 3/3 RFC] dt: add documentation of ARM dt boot interface
From: Josh Boyer @ 2011-01-31 11:24 UTC (permalink / raw)
To: Grant Likely; +Cc: sam, devicetree-discuss, linuxppc-dev, linux-kernel
In-Reply-To: <20110131074510.9058.59071.stgit@localhost6.localdomain6>
On Mon, Jan 31, 2011 at 12:45:41AM -0700, Grant Likely wrote:
>Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>---
>
>For RFC only. I do not plan to merge this change yet.
>
>g.
>
> Documentation/devicetree/booting-without-of.txt | 40 +++++++++++++++++++++++
> 1 files changed, 40 insertions(+), 0 deletions(-)
>
>diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
>index 6bca668..3950aea 100644
>--- a/Documentation/devicetree/booting-without-of.txt
>+++ b/Documentation/devicetree/booting-without-of.txt
>@@ -232,6 +233,45 @@ it with special cases.
> cannot support both configurations with Book E and configurations
> with classic Powerpc architectures.
>
>+2) Entry point for arch/arm
>+---------------------------
>+
>+ There is one and one single entry point to the kernel, at the start
"one and one" ?
josh
^ permalink raw reply
* Re: [PATCH 1/4 v4] video, sm501: add I/O functions for use on powerpc
From: Samuel Ortiz @ 2011-01-31 10:50 UTC (permalink / raw)
To: Heiko Schocher
Cc: linux-fbdev, devicetree-discuss, Vincent Sanders, linux-kernel,
Ben Dooks, Randy Dunlap, Paul Mundt, linuxppc-dev
In-Reply-To: <1295863040-11086-1-git-send-email-hs@denx.de>
Hi Heiko,
On Mon, Jan 24, 2011 at 10:57:20AM +0100, Heiko Schocher wrote:
> - add read/write functions for using this driver
> also on powerpc plattforms
Not sure whose tree this is going through. Probably Paul's one though.
The mfd part looks fine to me, please add my:
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
^ permalink raw reply
* Re: [PATCH 3/4 v4] video, sm501: add OF binding to support SM501
From: Samuel Ortiz @ 2011-01-31 10:52 UTC (permalink / raw)
To: Heiko Schocher
Cc: linux-fbdev, devicetree-discuss, Vincent Sanders, linux-kernel,
Ben Dooks, Randy Dunlap, Paul Mundt, linuxppc-dev
In-Reply-To: <1295863058-11168-1-git-send-email-hs@denx.de>
Hi Heiko,
On Mon, Jan 24, 2011 at 10:57:38AM +0100, Heiko Schocher wrote:
> - add binding to OF, compatible name "smi,sm501"
The MFD part looks fine to me:
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Cheers,
Samuel.
--
Intel Open Source Technology Centre
http://oss.intel.com/
^ permalink raw reply
* [PATCH 3/3 RFC] dt: add documentation of ARM dt boot interface
From: Grant Likely @ 2011-01-31 7:45 UTC (permalink / raw)
To: devicetree-discuss, linuxppc-dev, linux-kernel; +Cc: sam
In-Reply-To: <20110131073918.9058.37628.stgit@localhost6.localdomain6>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
For RFC only. I do not plan to merge this change yet.
g.
Documentation/devicetree/booting-without-of.txt | 40 +++++++++++++++++++++++
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 6bca668..3950aea 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -13,6 +13,7 @@ Table of Contents
I - Introduction
1) Entry point for arch/powerpc
+ 2) Entry point for arch/arm
II - The DT block format
1) Header
@@ -232,6 +233,45 @@ it with special cases.
cannot support both configurations with Book E and configurations
with classic Powerpc architectures.
+2) Entry point for arch/arm
+---------------------------
+
+ There is one and one single entry point to the kernel, at the start
+ of the kernel image. That entry point supports two calling
+ conventions. A summary of the interface is described here. A full
+ description of the boot requirements is documented in
+ Documentation/arm/Booting
+
+ a) ATAGS interface. Minimal information is passed from firmware
+ to the kernel with a tagged list of predefined parameters.
+
+ r0 : 0
+
+ r1 : Machine type number
+
+ r2 : Physical address of tagged list in system RAM
+
+ b) Entry with a flattened device-tree block. Firmware loads the
+ physical address of the flattened device tree block (dtb) into r2,
+ r1 is not used, but it is considered good practise to use a valid
+ machine number as described in Documentation/arm/Booting.
+
+ r0 : 0
+
+ r1 : Valid machine type number. When using a device tree,
+ a single machine type number will often be assigned to
+ represent a class or family of SoCs.
+
+ r2 : physical pointer to the device-tree block
+ (defined in chapter II) in RAM. Device tree can be located
+ anywhere in system RAM, but it should be aligned on a 32 bit
+ boundary.
+
+ The kernel will differentiate between ATAGS and device tree booting by
+ reading the memory pointed to by r1 and looking for either the flattened
+ device tree block magic value (0xd00dfeed) or the ATAG_CORE value at
+ offset 0x4 from r2 (0x54410001).
+
II - The DT block format
========================
^ permalink raw reply related
* [PATCH 2/3] dt: Remove obsolete description of powerpc boot interface
From: Grant Likely @ 2011-01-31 7:45 UTC (permalink / raw)
To: devicetree-discuss, linuxppc-dev, linux-kernel; +Cc: sam
In-Reply-To: <20110131073918.9058.37628.stgit@localhost6.localdomain6>
32 and 64 bit powerpc support has been merged for a while now, but
the booting-without-of.txt document still describes 32 bit as not
supporting multiplatform, which is no longer true. This patch fixes
the documentation.
Also remove references to powerpc-specific details outside of section
I in preparation to add details for other architectures.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/devicetree/booting-without-of.txt | 60 +++--------------------
1 files changed, 8 insertions(+), 52 deletions(-)
diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 7400d75..6bca668 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -13,7 +13,6 @@ Table of Contents
I - Introduction
1) Entry point for arch/powerpc
- 2) Board support
II - The DT block format
1) Header
@@ -123,7 +122,7 @@ Revision Information
I - Introduction
================
-During the recent development of the Linux/ppc64 kernel, and more
+During the development of the Linux/ppc64 kernel, and more
specifically, the addition of new platform types outside of the old
IBM pSeries/iSeries pair, it was decided to enforce some strict rules
regarding the kernel entry and bootloader <-> kernel interfaces, in
@@ -146,7 +145,7 @@ section III, but, for example, the kernel does not require you to
create a node for every PCI device in the system. It is a requirement
to have a node for PCI host bridges in order to provide interrupt
routing informations and memory/IO ranges, among others. It is also
-recommended to define nodes for on chip devices and other busses that
+recommended to define nodes for on chip devices and other buses that
don't specifically fit in an existing OF specification. This creates a
great flexibility in the way the kernel can then probe those and match
drivers to device, without having to hard code all sorts of tables. It
@@ -210,12 +209,6 @@ it with special cases.
with all CPUs. The way to do that with method b) will be
described in a later revision of this document.
-
-2) Board support
-----------------
-
-64-bit kernels:
-
Board supports (platforms) are not exclusive config options. An
arbitrary set of board supports can be built in a single kernel
image. The kernel will "know" what set of functions to use for a
@@ -234,48 +227,11 @@ it with special cases.
containing the various callbacks that the generic code will
use to get to your platform specific code
- c) Add a reference to your "ppc_md" structure in the
- "machines" table in arch/powerpc/kernel/setup_64.c if you are
- a 64-bit platform.
-
- d) request and get assigned a platform number (see PLATFORM_*
- constants in arch/powerpc/include/asm/processor.h
-
-32-bit embedded kernels:
-
- Currently, board support is essentially an exclusive config option.
- The kernel is configured for a single platform. Part of the reason
- for this is to keep kernels on embedded systems small and efficient;
- part of this is due to the fact the code is already that way. In the
- future, a kernel may support multiple platforms, but only if the
+ A kernel image may support multiple platforms, but only if the
platforms feature the same core architecture. A single kernel build
cannot support both configurations with Book E and configurations
with classic Powerpc architectures.
- 32-bit embedded platforms that are moved into arch/powerpc using a
- flattened device tree should adopt the merged tree practice of
- setting ppc_md up dynamically, even though the kernel is currently
- built with support for only a single platform at a time. This allows
- unification of the setup code, and will make it easier to go to a
- multiple-platform-support model in the future.
-
-NOTE: I believe the above will be true once Ben's done with the merge
-of the boot sequences.... someone speak up if this is wrong!
-
- To add a 32-bit embedded platform support, follow the instructions
- for 64-bit platforms above, with the exception that the Kconfig
- option should be set up such that the kernel builds exclusively for
- the platform selected. The processor type for the platform should
- enable another config option to select the specific board
- supported.
-
-NOTE: If Ben doesn't merge the setup files, may need to change this to
-point to setup_32.c
-
-
- I will describe later the boot process and various callbacks that
- your platform should implement.
-
II - The DT block format
========================
@@ -300,8 +256,8 @@ the block to RAM before passing it to the kernel.
1) Header
---------
- The kernel is entered with r3 pointing to an area of memory that is
- roughly described in arch/powerpc/include/asm/prom.h by the structure
+ The kernel is passed the physical address pointing to an area of memory
+ that is roughly described in include/linux/fdt.h by the structure
boot_param_header:
struct boot_param_header {
@@ -339,7 +295,7 @@ struct boot_param_header {
All values in this header are in big endian format, the various
fields in this header are defined more precisely below. All
"offset" values are in bytes from the start of the header; that is
- from the value of r3.
+ from the physical base address of the device tree block.
- magic
@@ -437,7 +393,7 @@ struct boot_param_header {
------------------------------
- r3 -> | struct boot_param_header |
+ base -> | struct boot_param_header |
------------------------------
| (alignment gap) (*) |
------------------------------
@@ -457,7 +413,7 @@ struct boot_param_header {
-----> ------------------------------
|
|
- --- (r3 + totalsize)
+ --- (base + totalsize)
(*) The alignment gaps are not necessarily present; their presence
and size are dependent on the various alignment requirements of
^ permalink raw reply related
* [PATCH 1/3] dt: Move device tree documentation out of powerpc directory
From: Grant Likely @ 2011-01-31 7:44 UTC (permalink / raw)
To: devicetree-discuss, linuxppc-dev, linux-kernel; +Cc: sam
In-Reply-To: <20110131073918.9058.37628.stgit@localhost6.localdomain6>
The device tree is used by more than just PowerPC. Make the documentation
directory available to all.
v2: reorganized files while moving to create arch and driver specific
directories.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/devicetree/bindings/ata/fsl-sata.txt | 0
Documentation/devicetree/bindings/eeprom.txt | 0
.../devicetree/bindings/gpio/8xxx_gpio.txt | 0
Documentation/devicetree/bindings/gpio/gpio.txt | 0
Documentation/devicetree/bindings/gpio/led.txt | 0
Documentation/devicetree/bindings/i2c/fsl-i2c.txt | 0
Documentation/devicetree/bindings/marvell.txt | 0
.../devicetree/bindings/mmc/fsl-esdhc.txt | 0
.../devicetree/bindings/mmc/mmc-spi-slot.txt | 0
.../devicetree/bindings/mtd/fsl-upm-nand.txt | 0
.../devicetree/bindings/mtd/mtd-physmap.txt | 0
.../devicetree/bindings/net/can/mpc5xxx-mscan.txt | 0
.../devicetree/bindings/net/can/sja1000.txt | 0
.../devicetree/bindings/net/fsl-tsec-phy.txt | 0
.../devicetree/bindings/net/mdio-gpio.txt | 0
Documentation/devicetree/bindings/net/phy.txt | 0
.../devicetree/bindings/pci/83xx-512x-pci.txt | 0
.../devicetree/bindings/powerpc/4xx/cpm.txt | 0
.../devicetree/bindings/powerpc/4xx/emac.txt | 0
.../devicetree/bindings/powerpc/4xx/ndfc.txt | 0
.../bindings/powerpc/4xx/ppc440spe-adma.txt | 0
.../devicetree/bindings/powerpc/4xx/reboot.txt | 0
.../devicetree/bindings/powerpc/fsl/board.txt | 0
.../devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/brg.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/pic.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/usb.txt | 0
.../bindings/powerpc/fsl/cpm_qe/gpio.txt | 0
.../bindings/powerpc/fsl/cpm_qe/network.txt | 0
.../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/firmware.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/par_io.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/ucc.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/usb.txt | 0
.../bindings/powerpc/fsl/cpm_qe/serial.txt | 0
.../devicetree/bindings/powerpc/fsl/diu.txt | 0
.../devicetree/bindings/powerpc/fsl/dma.txt | 0
.../devicetree/bindings/powerpc/fsl/ecm.txt | 0
.../devicetree/bindings/powerpc/fsl/gtm.txt | 0
.../devicetree/bindings/powerpc/fsl/guts.txt | 0
.../devicetree/bindings/powerpc/fsl/lbc.txt | 0
.../devicetree/bindings/powerpc/fsl/mcm.txt | 0
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 0
.../bindings/powerpc/fsl/mpc5121-psc.txt | 0
.../devicetree/bindings/powerpc/fsl/mpc5200.txt | 0
.../devicetree/bindings/powerpc/fsl/mpic.txt | 0
.../devicetree/bindings/powerpc/fsl/msi-pic.txt | 0
.../devicetree/bindings/powerpc/fsl/pmc.txt | 0
.../devicetree/bindings/powerpc/fsl/sec.txt | 0
.../devicetree/bindings/powerpc/fsl/ssi.txt | 0
.../bindings/powerpc/nintendo/gamecube.txt | 0
.../devicetree/bindings/powerpc/nintendo/wii.txt | 0
Documentation/devicetree/bindings/spi/fsl-spi.txt | 0
Documentation/devicetree/bindings/spi/spi-bus.txt | 0
Documentation/devicetree/bindings/usb/fsl-usb.txt | 0
Documentation/devicetree/bindings/usb/usb-ehci.txt | 0
Documentation/devicetree/bindings/xilinx.txt | 0
Documentation/devicetree/booting-without-of.txt | 0
60 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/{powerpc/dts-bindings/fsl/sata.txt => devicetree/bindings/ata/fsl-sata.txt} (100%)
rename Documentation/{powerpc/dts-bindings/eeprom.txt => devicetree/bindings/eeprom.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/8xxx_gpio.txt => devicetree/bindings/gpio/8xxx_gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/gpio/gpio.txt => devicetree/bindings/gpio/gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/gpio/led.txt => devicetree/bindings/gpio/led.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/i2c.txt => devicetree/bindings/i2c/fsl-i2c.txt} (100%)
rename Documentation/{powerpc/dts-bindings/marvell.txt => devicetree/bindings/marvell.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/esdhc.txt => devicetree/bindings/mmc/fsl-esdhc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/mmc-spi-slot.txt => devicetree/bindings/mmc/mmc-spi-slot.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/upm-nand.txt => devicetree/bindings/mtd/fsl-upm-nand.txt} (100%)
rename Documentation/{powerpc/dts-bindings/mtd-physmap.txt => devicetree/bindings/mtd/mtd-physmap.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/can.txt => devicetree/bindings/net/can/mpc5xxx-mscan.txt} (100%)
rename Documentation/{powerpc/dts-bindings/can/sja1000.txt => devicetree/bindings/net/can/sja1000.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/tsec.txt => devicetree/bindings/net/fsl-tsec-phy.txt} (100%)
rename Documentation/{powerpc/dts-bindings/gpio/mdio.txt => devicetree/bindings/net/mdio-gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/phy.txt => devicetree/bindings/net/phy.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/83xx-512x-pci.txt => devicetree/bindings/pci/83xx-512x-pci.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/cpm.txt => devicetree/bindings/powerpc/4xx/cpm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/emac.txt => devicetree/bindings/powerpc/4xx/emac.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/ndfc.txt => devicetree/bindings/powerpc/4xx/ndfc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/ppc440spe-adma.txt => devicetree/bindings/powerpc/4xx/ppc440spe-adma.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/reboot.txt => devicetree/bindings/powerpc/4xx/reboot.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/board.txt => devicetree/bindings/powerpc/fsl/board.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/gpio.txt => devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/network.txt => devicetree/bindings/powerpc/fsl/cpm_qe/network.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/firmware.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/par_io.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/serial.txt => devicetree/bindings/powerpc/fsl/cpm_qe/serial.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/diu.txt => devicetree/bindings/powerpc/fsl/diu.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/dma.txt => devicetree/bindings/powerpc/fsl/dma.txt} (100%)
rename Documentation/{powerpc/dts-bindings/ecm.txt => devicetree/bindings/powerpc/fsl/ecm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/gtm.txt => devicetree/bindings/powerpc/fsl/gtm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/guts.txt => devicetree/bindings/powerpc/fsl/guts.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/lbc.txt => devicetree/bindings/powerpc/fsl/lbc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mcm.txt => devicetree/bindings/powerpc/fsl/mcm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mcu-mpc8349emitx.txt => devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mpc5121-psc.txt => devicetree/bindings/powerpc/fsl/mpc5121-psc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mpc5200.txt => devicetree/bindings/powerpc/fsl/mpc5200.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mpic.txt => devicetree/bindings/powerpc/fsl/mpic.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/msi-pic.txt => devicetree/bindings/powerpc/fsl/msi-pic.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/pmc.txt => devicetree/bindings/powerpc/fsl/pmc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/sec.txt => devicetree/bindings/powerpc/fsl/sec.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/ssi.txt => devicetree/bindings/powerpc/fsl/ssi.txt} (100%)
rename Documentation/{powerpc/dts-bindings/nintendo/gamecube.txt => devicetree/bindings/powerpc/nintendo/gamecube.txt} (100%)
rename Documentation/{powerpc/dts-bindings/nintendo/wii.txt => devicetree/bindings/powerpc/nintendo/wii.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/spi.txt => devicetree/bindings/spi/fsl-spi.txt} (100%)
rename Documentation/{powerpc/dts-bindings/spi-bus.txt => devicetree/bindings/spi/spi-bus.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/usb.txt => devicetree/bindings/usb/fsl-usb.txt} (100%)
rename Documentation/{powerpc/dts-bindings/usb-ehci.txt => devicetree/bindings/usb/usb-ehci.txt} (100%)
rename Documentation/{powerpc/dts-bindings/xilinx.txt => devicetree/bindings/xilinx.txt} (100%)
rename Documentation/{powerpc/booting-without-of.txt => devicetree/booting-without-of.txt} (100%)
diff --git a/Documentation/powerpc/dts-bindings/fsl/sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
similarity index 100%
rename from Documentation/powerpc/dts-bindings/fsl/sata.txt
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rename from Documentation/powerpc/dts-bindings/eeprom.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt
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rename from Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt
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diff --git a/Documentation/powerpc/dts-bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
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rename from Documentation/powerpc/dts-bindings/gpio/gpio.txt
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diff --git a/Documentation/powerpc/dts-bindings/gpio/led.txt b/Documentation/devicetree/bindings/gpio/led.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-i2c.txt
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diff --git a/Documentation/powerpc/dts-bindings/marvell.txt b/Documentation/devicetree/bindings/marvell.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
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diff --git a/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt b/Documentation/devicetree/bindings/mtd/fsl-upm-nand.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/can.txt b/Documentation/devicetree/bindings/net/can/mpc5xxx-mscan.txt
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diff --git a/Documentation/powerpc/dts-bindings/phy.txt b/Documentation/devicetree/bindings/net/phy.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
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diff --git a/Documentation/powerpc/dts-bindings/4xx/ppc440spe-adma.txt b/Documentation/devicetree/bindings/powerpc/4xx/ppc440spe-adma.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/devicetree/bindings/powerpc/fsl/board.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/gpio.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/firmware.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/par_io.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/serial.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/devicetree/bindings/powerpc/fsl/diu.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/mcu-mpc8349emitx.txt b/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
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diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5121-psc.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpc5121-psc.txt
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rename to Documentation/devicetree/bindings/xilinx.txt
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
similarity index 100%
rename from Documentation/powerpc/booting-without-of.txt
rename to Documentation/devicetree/booting-without-of.txt
^ permalink raw reply
* [PATCH 0/3] dt: documentation reorganization
From: Grant Likely @ 2011-01-31 7:44 UTC (permalink / raw)
To: devicetree-discuss, linuxppc-dev, linux-kernel; +Cc: sam
This series reorganizes and cleans up the device tree documentation
to make the directory useful for non-powerpc users.
Patch 3 of this series adds some documentation about the ARM device
tree boot interface, but I'm posting this one for RFC only at the
moment. I'll not merge this until dt support for ARM is also merged.
g.
---
Grant Likely (3):
dt: Move device tree documentation out of powerpc directory
dt: Remove obsolete description of powerpc boot interface
dt: add documentation of ARM dt boot interface
Documentation/devicetree/bindings/ata/fsl-sata.txt | 0
Documentation/devicetree/bindings/eeprom.txt | 0
.../devicetree/bindings/gpio/8xxx_gpio.txt | 0
Documentation/devicetree/bindings/gpio/gpio.txt | 0
Documentation/devicetree/bindings/gpio/led.txt | 0
Documentation/devicetree/bindings/i2c/fsl-i2c.txt | 0
Documentation/devicetree/bindings/marvell.txt | 0
.../devicetree/bindings/mmc/fsl-esdhc.txt | 0
.../devicetree/bindings/mmc/mmc-spi-slot.txt | 0
.../devicetree/bindings/mtd/fsl-upm-nand.txt | 0
.../devicetree/bindings/mtd/mtd-physmap.txt | 0
.../devicetree/bindings/net/can/mpc5xxx-mscan.txt | 0
.../devicetree/bindings/net/can/sja1000.txt | 0
.../devicetree/bindings/net/fsl-tsec-phy.txt | 0
.../devicetree/bindings/net/mdio-gpio.txt | 0
Documentation/devicetree/bindings/net/phy.txt | 0
.../devicetree/bindings/pci/83xx-512x-pci.txt | 0
.../devicetree/bindings/powerpc/4xx/cpm.txt | 0
.../devicetree/bindings/powerpc/4xx/emac.txt | 0
.../devicetree/bindings/powerpc/4xx/ndfc.txt | 0
.../bindings/powerpc/4xx/ppc440spe-adma.txt | 0
.../devicetree/bindings/powerpc/4xx/reboot.txt | 0
.../devicetree/bindings/powerpc/fsl/board.txt | 0
.../devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/brg.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/pic.txt | 0
.../bindings/powerpc/fsl/cpm_qe/cpm/usb.txt | 0
.../bindings/powerpc/fsl/cpm_qe/gpio.txt | 0
.../bindings/powerpc/fsl/cpm_qe/network.txt | 0
.../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/firmware.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/par_io.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/ucc.txt | 0
.../bindings/powerpc/fsl/cpm_qe/qe/usb.txt | 0
.../bindings/powerpc/fsl/cpm_qe/serial.txt | 0
.../devicetree/bindings/powerpc/fsl/diu.txt | 0
.../devicetree/bindings/powerpc/fsl/dma.txt | 0
.../devicetree/bindings/powerpc/fsl/ecm.txt | 0
.../devicetree/bindings/powerpc/fsl/gtm.txt | 0
.../devicetree/bindings/powerpc/fsl/guts.txt | 0
.../devicetree/bindings/powerpc/fsl/lbc.txt | 0
.../devicetree/bindings/powerpc/fsl/mcm.txt | 0
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 0
.../bindings/powerpc/fsl/mpc5121-psc.txt | 0
.../devicetree/bindings/powerpc/fsl/mpc5200.txt | 0
.../devicetree/bindings/powerpc/fsl/mpic.txt | 0
.../devicetree/bindings/powerpc/fsl/msi-pic.txt | 0
.../devicetree/bindings/powerpc/fsl/pmc.txt | 0
.../devicetree/bindings/powerpc/fsl/sec.txt | 0
.../devicetree/bindings/powerpc/fsl/ssi.txt | 0
.../bindings/powerpc/nintendo/gamecube.txt | 0
.../devicetree/bindings/powerpc/nintendo/wii.txt | 0
Documentation/devicetree/bindings/spi/fsl-spi.txt | 0
Documentation/devicetree/bindings/spi/spi-bus.txt | 0
Documentation/devicetree/bindings/usb/fsl-usb.txt | 0
Documentation/devicetree/bindings/usb/usb-ehci.txt | 0
Documentation/devicetree/bindings/xilinx.txt | 0
Documentation/devicetree/booting-without-of.txt | 86 +++++++++-----------
60 files changed, 40 insertions(+), 46 deletions(-)
rename Documentation/{powerpc/dts-bindings/fsl/sata.txt => devicetree/bindings/ata/fsl-sata.txt} (100%)
rename Documentation/{powerpc/dts-bindings/eeprom.txt => devicetree/bindings/eeprom.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/8xxx_gpio.txt => devicetree/bindings/gpio/8xxx_gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/gpio/gpio.txt => devicetree/bindings/gpio/gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/gpio/led.txt => devicetree/bindings/gpio/led.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/i2c.txt => devicetree/bindings/i2c/fsl-i2c.txt} (100%)
rename Documentation/{powerpc/dts-bindings/marvell.txt => devicetree/bindings/marvell.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/esdhc.txt => devicetree/bindings/mmc/fsl-esdhc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/mmc-spi-slot.txt => devicetree/bindings/mmc/mmc-spi-slot.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/upm-nand.txt => devicetree/bindings/mtd/fsl-upm-nand.txt} (100%)
rename Documentation/{powerpc/dts-bindings/mtd-physmap.txt => devicetree/bindings/mtd/mtd-physmap.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/can.txt => devicetree/bindings/net/can/mpc5xxx-mscan.txt} (100%)
rename Documentation/{powerpc/dts-bindings/can/sja1000.txt => devicetree/bindings/net/can/sja1000.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/tsec.txt => devicetree/bindings/net/fsl-tsec-phy.txt} (100%)
rename Documentation/{powerpc/dts-bindings/gpio/mdio.txt => devicetree/bindings/net/mdio-gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/phy.txt => devicetree/bindings/net/phy.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/83xx-512x-pci.txt => devicetree/bindings/pci/83xx-512x-pci.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/cpm.txt => devicetree/bindings/powerpc/4xx/cpm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/emac.txt => devicetree/bindings/powerpc/4xx/emac.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/ndfc.txt => devicetree/bindings/powerpc/4xx/ndfc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/ppc440spe-adma.txt => devicetree/bindings/powerpc/4xx/ppc440spe-adma.txt} (100%)
rename Documentation/{powerpc/dts-bindings/4xx/reboot.txt => devicetree/bindings/powerpc/4xx/reboot.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/board.txt => devicetree/bindings/powerpc/fsl/board.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt => devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/gpio.txt => devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/network.txt => devicetree/bindings/powerpc/fsl/cpm_qe/network.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/firmware.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/par_io.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt => devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/cpm_qe/serial.txt => devicetree/bindings/powerpc/fsl/cpm_qe/serial.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/diu.txt => devicetree/bindings/powerpc/fsl/diu.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/dma.txt => devicetree/bindings/powerpc/fsl/dma.txt} (100%)
rename Documentation/{powerpc/dts-bindings/ecm.txt => devicetree/bindings/powerpc/fsl/ecm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/gtm.txt => devicetree/bindings/powerpc/fsl/gtm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/guts.txt => devicetree/bindings/powerpc/fsl/guts.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/lbc.txt => devicetree/bindings/powerpc/fsl/lbc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mcm.txt => devicetree/bindings/powerpc/fsl/mcm.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mcu-mpc8349emitx.txt => devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mpc5121-psc.txt => devicetree/bindings/powerpc/fsl/mpc5121-psc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mpc5200.txt => devicetree/bindings/powerpc/fsl/mpc5200.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/mpic.txt => devicetree/bindings/powerpc/fsl/mpic.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/msi-pic.txt => devicetree/bindings/powerpc/fsl/msi-pic.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/pmc.txt => devicetree/bindings/powerpc/fsl/pmc.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/sec.txt => devicetree/bindings/powerpc/fsl/sec.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/ssi.txt => devicetree/bindings/powerpc/fsl/ssi.txt} (100%)
rename Documentation/{powerpc/dts-bindings/nintendo/gamecube.txt => devicetree/bindings/powerpc/nintendo/gamecube.txt} (100%)
rename Documentation/{powerpc/dts-bindings/nintendo/wii.txt => devicetree/bindings/powerpc/nintendo/wii.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/spi.txt => devicetree/bindings/spi/fsl-spi.txt} (100%)
rename Documentation/{powerpc/dts-bindings/spi-bus.txt => devicetree/bindings/spi/spi-bus.txt} (100%)
rename Documentation/{powerpc/dts-bindings/fsl/usb.txt => devicetree/bindings/usb/fsl-usb.txt} (100%)
rename Documentation/{powerpc/dts-bindings/usb-ehci.txt => devicetree/bindings/usb/usb-ehci.txt} (100%)
rename Documentation/{powerpc/dts-bindings/xilinx.txt => devicetree/bindings/xilinx.txt} (100%)
rename Documentation/{powerpc/booting-without-of.txt => devicetree/booting-without-of.txt} (96%)
--
Signature
^ permalink raw reply
* linux-next: build failure after merge of the final tree
From: Stephen Rothwell @ 2011-01-31 6:26 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, linuxppc-dev
Cc: linux-next, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 607 bytes --]
Hi all,
After merging the final tree, today's linux-next build (powerpc
allyesconfig) failed like this:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:989: Error: attempt to move .org backwards
arch/powerpc/kernel/exceptions-64s.S:999: Error: attempt to move .org backwards
arch/powerpc/kernel/exceptions-64s.S:1008: Error: attempt to move .org backwards
So something has added a bit of bloat in there. I have left this broken
for now.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
[-- Attachment #2: Type: application/pgp-signature, Size: 490 bytes --]
^ permalink raw reply
* Re: State of suspend-to-ram?
From: Benjamin Herrenschmidt @ 2011-01-30 11:09 UTC (permalink / raw)
To: Mathias Krause; +Cc: linuxppc-dev
In-Reply-To: <4537ED74-779B-4511-B4ED-339CAC355261@googlemail.com>
On Sun, 2011-01-30 at 12:03 +0100, Mathias Krause wrote:
> Hi all!
>
> First of all: Sorry, this is the wrong mailing list, but I searched a
> lot and found none that would fit to PPC user-related problems --
> linux-ppc would have been one but this one seems to be dead since
> 2004?
.../....
The matter is mostly to get the video chip back. It gets powered down
during suspend and we don't have the black magic formula to
re-initialize it.
I've reverse-engineered that for other similar chips, but not that one.
If you think you're up to the task, let me know privately and I'll point
you to some tools that can help spying what the MacOS driver does, which
you can then use to find the right sequence. But beware, it's nasty :-)
Cheers,
Ben.
> I've a G4 based Mac mini and would like to suspend it to RAM, though
> the vanilla kernel doesn't allow me to do this (/sys/power/state
> mentions only "disk"). The reason for this is my platform is marked as
> PMAC_MB_MAY_SLEEP instead of PMAC_MB_CAN_SLEEP in
> arch/powerpc/platforms/powermac/feature.c. So I changed that to be
> PMAC_MB_CAN_SLEEP and was able to suspend the system using the
> pm-suspend script from the pm-utils suite. The LED on the front was
> pulsing like it is when suspended under MacOS X. After pushing the
> power button the system started to resume but just got stuck. I see no
> messages on the console, nothing in syslog. So I assume the system
> panics pretty early in the resume path. Because the system has no
> serial console the debug capabilities are fairly limited. Any hints
> why this doesn't work or how to debug this any further?
>
> Some system information:
>
> mk@maxi:~$ cat /proc/cpuinfo
> processor : 0
> cpu : 7447A, altivec supported
> clock : 1416.666661MHz
> revision : 1.2 (pvr 8003 0102)
> bogomips : 83.24
> timebase : 41620997
> platform : PowerMac
> model : PowerMac10,1
> machine : PowerMac10,1
> motherboard : PowerMac10,1 MacRISC3 Power Macintosh
> detected as : 287 (Mac mini)
> pmac flags : 00000001
> L2 cache : 512K unified
> pmac-generation : NewWorld
> Memory : 1024 MB
> mk@maxi:~$ uname -a
> Linux maxi 2.6.37+ #2 Mon Jan 24 08:56:01 CET 2011 ppc GNU/Linux
>
> Regards,
> Mathias
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* State of suspend-to-ram?
From: Mathias Krause @ 2011-01-30 11:03 UTC (permalink / raw)
To: linuxppc-dev
Hi all!
First of all: Sorry, this is the wrong mailing list, but I searched a =
lot and found none that would fit to PPC user-related problems -- =
linux-ppc would have been one but this one seems to be dead since 2004?!
I've a G4 based Mac mini and would like to suspend it to RAM, though the =
vanilla kernel doesn't allow me to do this (/sys/power/state mentions =
only "disk"). The reason for this is my platform is marked as =
PMAC_MB_MAY_SLEEP instead of PMAC_MB_CAN_SLEEP in =
arch/powerpc/platforms/powermac/feature.c. So I changed that to be =
PMAC_MB_CAN_SLEEP and was able to suspend the system using the =
pm-suspend script from the pm-utils suite. The LED on the front was =
pulsing like it is when suspended under MacOS X. After pushing the power =
button the system started to resume but just got stuck. I see no =
messages on the console, nothing in syslog. So I assume the system =
panics pretty early in the resume path. Because the system has no serial =
console the debug capabilities are fairly limited. Any hints why this =
doesn't work or how to debug this any further?
Some system information:
mk@maxi:~$ cat /proc/cpuinfo=20
processor : 0
cpu : 7447A, altivec supported
clock : 1416.666661MHz
revision : 1.2 (pvr 8003 0102)
bogomips : 83.24
timebase : 41620997
platform : PowerMac
model : PowerMac10,1
machine : PowerMac10,1
motherboard : PowerMac10,1 MacRISC3 Power Macintosh=20
detected as : 287 (Mac mini)
pmac flags : 00000001
L2 cache : 512K unified
pmac-generation : NewWorld
Memory : 1024 MB
mk@maxi:~$ uname -a=20
Linux maxi 2.6.37+ #2 Mon Jan 24 08:56:01 CET 2011 ppc GNU/Linux
Regards,
Mathias
^ permalink raw reply
* Re: PCIe end-point on FPGA doesn't show up on PCI bus when configured
From: tiejun.chen @ 2011-01-30 8:05 UTC (permalink / raw)
To: Stijn Devriendt; +Cc: linuxppc-dev, Matias Garcia, Elie De Brauwer
In-Reply-To: <AANLkTimUkSmvgb8Qax_g8mMj8FMJWq5wPHA_2aXszpyZ@mail.gmail.com>
Stijn Devriendt wrote:
> As far as I know, you're violating PCIe spec.
> PCIe base spec (rev1.0a) states that a device must start link training
> within 80ms
> after a fundamental reset and that each device must be ready to accept config
> requests within 100ms after fundamental reset.
Nope.
>From this scenario I only doubts this problem is issued like some Freescale PCIe
errata. From that chip errata you can find this easily, "This sequence resets
the PCI Express controllers only.", and so these codes are used definitely on
u-boot.
Tiejun
>
> Regards,
> Stijn
>
> On Sun, Jan 30, 2011 at 4:07 AM, tiejun.chen <tiejun.chen@windriver.com> wrote:
>> Elie De Brauwer wrote:
>>> On 01/28/11 19:37, Matias Garcia wrote:
>>>> I'm running a vanilla linux 2.6.37 kernel on a Freescale P2020 dual-core
>>>> processor, and have the following conundrum: I configure the FPGA which
>>>> brings up a PCIe interface to the processor. I scan both PCI buses on
>>>> the system (I believe the second bus is behind the Freescale integrated
>>>> bridge on the first), and it doesn't show up. I initiate a reset on the
>>>> processor, and both U-boot and Linux now see the FPGA PCI device at
>>>> 0000:01:00.00. I've noticed some of the memory mappings in the PCI
>>>> bridge windows are different between the two boot sequences. I've tried
>>>> all manner of pci calls (including the pcibios_fixup routines) on the
>>>> bridge device (including removing and re-scanning it), and on bus 1,
>>>> which is otherwise empty, to no avail. Following are some debug listings
>>>> from dmesg; any help/ideas in tracking down the problem (hardware or
>>>> software) is greatly appreciated.
>>>>
>>>> #Boot without FPGA configured:
>>>> <snip>
>>>> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
>>>> 0->255
>>>> PCI host bridge /pcie@8ff70a000 ranges:
>>>> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
>>>> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
>>>> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
>>>> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
>>>> Adjusting the memory map could reduce unnecessary bounce buffering.
>>>> /pcie@8ff70a000: DMA window size is 0x80000000
>>>> MPC85xx RDB board from Freescale Semiconductor
>>>> <...>
>>>> PCI: Probing PCI hardware
>>>> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
>>>> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
>>>> pci 0000:00:00.0: supports D1 D2
>>>> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>>>> pci 0000:00:00.0: PME# disabled
>>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>>>> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
>>>> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff] (disabled)
>>>> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff pref]
>>>> (disabled)
>>>> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
>>>> pci 0000:00:00.0: PCI bridge to [bus 01-01]
>>>> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
>>>> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
>>>> pci 0000:00:00.0: bridge window [mem pref disabled]
>>>> pci 0000:00:00.0: enabling device (0106 -> 0107)
>>>> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
>>>> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
>>>> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
>>>> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>>>>
>>>> #Reset with FPGA configured:
>>>> <snip>
>>>> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
>>>> 0->255
>>>> PCI host bridge /pcie@8ff70a000 ranges:
>>>> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
>>>> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
>>>> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
>>>> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
>>>> Adjusting the memory map could reduce unnecessary bounce buffering.
>>>> /pcie@8ff70a000: DMA window size is 0x80000000
>>>> MPC85xx RDB board from Freescale Semiconductor
>>>> <...>
>>>> PCI: Probing PCI hardware
>>>> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
>>>> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
>>>> pci 0000:00:00.0: supports D1 D2
>>>> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>>>> pci 0000:00:00.0: PME# disabled
>>>> pci 0000:01:00.0: [1172:0004] type 0 class 0x001000
>>>> pci 0000:01:00.0: reg 10: [mem 0x80000000-0x80ffffff]
>>>> pci 0000:01:00.0: reg 14: [mem 0x81000000-0x81ffffff]
>>>> pci 0000:01:00.0: reg 18: [mem 0x82000000-0x82ffffff]
>>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>>>> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
>>>> pci 0000:00:00.0: bridge window [mem 0x80000000-0x82ffffff]
>>>> pci 0000:00:00.0: bridge window [mem 0x10000000-0x000fffff pref]
>>>> (disabled)
>>>> irq: irq 0 on host /soc@8ff700000/pic@40000 mapped to virtual irq 16
>>>> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
>>>> pci 0000:00:00.0: PCI bridge to [bus 01-01]
>>>> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
>>>> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
>>>> pci 0000:00:00.0: bridge window [mem pref disabled]
>>>> pci 0000:00:00.0: enabling device (0106 -> 0107)
>>>> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
>>>> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
>>>> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
>>>> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>>>
>>> Hi Mattias,
>>>
>>> I'm doing the same on a similar setup, also a P2020 but a 2.6.36 and
>>> with me it works just fine. However I encountered one problem. I
>>> understand it as follows, if there is no physical PCIe link then
>>> somewhere a flag PPC_INDIRECT_TYPE_NO_PCIE_LINK gets set. This has as
>>> result that reading the PCIe config space will fail with a
>>> PCIBIOS_DEVICE_NOT_FOUND (ref
>>> http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/sysdev/indirect_pci.c#L24 )
>>>
>>>
>>> At
>>> http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/include/asm/pci-bridge.h#L105
>>> they specify this as a workaround since the PCIe might hang if there is
>>> no physical link. So my workaround for this issue was:
>>>
>>> - load the fpga
>>> - travel down the pci bus to the correct bus where the fpga is attached
>>> �use a pci_bus_to_host() to obtain a struct pci_controller, unset the
>>> PPC_INDIRECT_TYPE_NO_PCIE_LINK �and call a pci_rescon_bus() on that bus.
>>>
>>> After doing this I can find access the FPGA, and reload it if needed.
>>> Not a clue if this is 'the proper way' to do it, but it works for me.
>> Looks this may be really related to the PCIe Link Training. So you have to reset
>> the PCIe after load the FPGA, but I think we should do this in the u-boot. For
>> more detail on this please refer to the code segments defined by
>> CONFIG_FSL_PCIE_RESET in the file, drivers/pci/fsl_pci_init.c.
>>
>> Tiejun
>>
>>> gr
>>> E.
^ permalink raw reply
* Re: PCIe end-point on FPGA doesn't show up on PCI bus when configured
From: Stijn Devriendt @ 2011-01-30 7:36 UTC (permalink / raw)
To: tiejun.chen; +Cc: linuxppc-dev, Matias Garcia, Elie De Brauwer
In-Reply-To: <4D44D5DE.1060104@windriver.com>
As far as I know, you're violating PCIe spec.
PCIe base spec (rev1.0a) states that a device must start link training
within 80ms
after a fundamental reset and that each device must be ready to accept conf=
ig
requests within 100ms after fundamental reset.
Regards,
Stijn
On Sun, Jan 30, 2011 at 4:07 AM, tiejun.chen <tiejun.chen@windriver.com> wr=
ote:
> Elie De Brauwer wrote:
>> On 01/28/11 19:37, Matias Garcia wrote:
>>> I'm running a vanilla linux 2.6.37 kernel on a Freescale P2020 dual-cor=
e
>>> processor, and have the following conundrum: I configure the FPGA which
>>> brings up a PCIe interface to the processor. I scan both PCI buses on
>>> the system (I believe the second bus is behind the Freescale integrated
>>> bridge on the first), and it doesn't show up. I initiate a reset on the
>>> processor, and both U-boot and Linux now see the FPGA PCI device at
>>> 0000:01:00.00. I've noticed some of the memory mappings in the PCI
>>> bridge windows are different between the two boot sequences. I've tried
>>> all manner of pci calls (including the pcibios_fixup routines) on the
>>> bridge device (including removing and re-scanning it), and on bus 1,
>>> which is otherwise empty, to no avail. Following are some debug listing=
s
>>> from dmesg; any help/ideas in tracking down the problem (hardware or
>>> software) is greatly appreciated.
>>>
>>> #Boot without FPGA configured:
>>> <snip>
>>> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
>>> 0->255
>>> PCI host bridge /pcie@8ff70a000 ranges:
>>> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
>>> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
>>> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
>>> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map=
.
>>> Adjusting the memory map could reduce unnecessary bounce buffering.
>>> /pcie@8ff70a000: DMA window size is 0x80000000
>>> MPC85xx RDB board from Freescale Semiconductor
>>> <...>
>>> PCI: Probing PCI hardware
>>> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
>>> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
>>> pci 0000:00:00.0: supports D1 D2
>>> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>>> pci 0000:00:00.0: PME# disabled
>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>>> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
>>> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff] (disabled)
>>> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff pref]
>>> (disabled)
>>> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
>>> pci 0000:00:00.0: PCI bridge to [bus 01-01]
>>> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
>>> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
>>> pci 0000:00:00.0: bridge window [mem pref disabled]
>>> pci 0000:00:00.0: enabling device (0106 -> 0107)
>>> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
>>> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
>>> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
>>> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>>>
>>> #Reset with FPGA configured:
>>> <snip>
>>> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
>>> 0->255
>>> PCI host bridge /pcie@8ff70a000 ranges:
>>> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
>>> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
>>> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
>>> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map=
.
>>> Adjusting the memory map could reduce unnecessary bounce buffering.
>>> /pcie@8ff70a000: DMA window size is 0x80000000
>>> MPC85xx RDB board from Freescale Semiconductor
>>> <...>
>>> PCI: Probing PCI hardware
>>> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
>>> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
>>> pci 0000:00:00.0: supports D1 D2
>>> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>>> pci 0000:00:00.0: PME# disabled
>>> pci 0000:01:00.0: [1172:0004] type 0 class 0x001000
>>> pci 0000:01:00.0: reg 10: [mem 0x80000000-0x80ffffff]
>>> pci 0000:01:00.0: reg 14: [mem 0x81000000-0x81ffffff]
>>> pci 0000:01:00.0: reg 18: [mem 0x82000000-0x82ffffff]
>>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>>> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
>>> pci 0000:00:00.0: bridge window [mem 0x80000000-0x82ffffff]
>>> pci 0000:00:00.0: bridge window [mem 0x10000000-0x000fffff pref]
>>> (disabled)
>>> irq: irq 0 on host /soc@8ff700000/pic@40000 mapped to virtual irq 16
>>> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
>>> pci 0000:00:00.0: PCI bridge to [bus 01-01]
>>> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
>>> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
>>> pci 0000:00:00.0: bridge window [mem pref disabled]
>>> pci 0000:00:00.0: enabling device (0106 -> 0107)
>>> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
>>> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
>>> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
>>> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>>
>>
>> Hi Mattias,
>>
>> I'm doing the same on a similar setup, also a P2020 but a 2.6.36 and
>> with me it works just fine. However I encountered one problem. I
>> understand it as follows, if there is no physical PCIe link then
>> somewhere a flag PPC_INDIRECT_TYPE_NO_PCIE_LINK gets set. This has as
>> result that reading the PCIe config space will fail with a
>> PCIBIOS_DEVICE_NOT_FOUND (ref
>> http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/sysdev/indirect_pci.c#L2=
4 )
>>
>>
>> At
>> http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/include/asm/pci-bridge.h=
#L105
>> they specify this as a workaround since the PCIe might hang if there is
>> no physical link. So my workaround for this issue was:
>>
>> - load the fpga
>> - travel down the pci bus to the correct bus where the fpga is attached
>> =A0use a pci_bus_to_host() to obtain a struct pci_controller, unset the
>> PPC_INDIRECT_TYPE_NO_PCIE_LINK =A0and call a pci_rescon_bus() on that bu=
s.
>>
>> After doing this I can find access the FPGA, and reload it if needed.
>> Not a clue if this is 'the proper way' to do it, but it works for me.
>
> Looks this may be really related to the PCIe Link Training. So you have t=
o reset
> the PCIe after load the FPGA, but I think we should do this in the u-boot=
. For
> more detail on this please refer to the code segments defined by
> CONFIG_FSL_PCIE_RESET in the file, drivers/pci/fsl_pci_init.c.
>
> Tiejun
>
>>
>> gr
>> E.
>>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: PCIe end-point on FPGA doesn't show up on PCI bus when configured
From: tiejun.chen @ 2011-01-30 3:07 UTC (permalink / raw)
To: Elie De Brauwer, Matias Garcia; +Cc: linuxppc-dev
In-Reply-To: <4D4321E1.7060506@gmail.com>
Elie De Brauwer wrote:
> On 01/28/11 19:37, Matias Garcia wrote:
>> I'm running a vanilla linux 2.6.37 kernel on a Freescale P2020 dual-core
>> processor, and have the following conundrum: I configure the FPGA which
>> brings up a PCIe interface to the processor. I scan both PCI buses on
>> the system (I believe the second bus is behind the Freescale integrated
>> bridge on the first), and it doesn't show up. I initiate a reset on the
>> processor, and both U-boot and Linux now see the FPGA PCI device at
>> 0000:01:00.00. I've noticed some of the memory mappings in the PCI
>> bridge windows are different between the two boot sequences. I've tried
>> all manner of pci calls (including the pcibios_fixup routines) on the
>> bridge device (including removing and re-scanning it), and on bus 1,
>> which is otherwise empty, to no avail. Following are some debug listings
>> from dmesg; any help/ideas in tracking down the problem (hardware or
>> software) is greatly appreciated.
>>
>> #Boot without FPGA configured:
>> <snip>
>> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
>> 0->255
>> PCI host bridge /pcie@8ff70a000 ranges:
>> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
>> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
>> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
>> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
>> Adjusting the memory map could reduce unnecessary bounce buffering.
>> /pcie@8ff70a000: DMA window size is 0x80000000
>> MPC85xx RDB board from Freescale Semiconductor
>> <...>
>> PCI: Probing PCI hardware
>> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
>> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
>> pci 0000:00:00.0: supports D1 D2
>> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>> pci 0000:00:00.0: PME# disabled
>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
>> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff] (disabled)
>> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff pref]
>> (disabled)
>> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
>> pci 0000:00:00.0: PCI bridge to [bus 01-01]
>> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
>> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
>> pci 0000:00:00.0: bridge window [mem pref disabled]
>> pci 0000:00:00.0: enabling device (0106 -> 0107)
>> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
>> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
>> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
>> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>>
>> #Reset with FPGA configured:
>> <snip>
>> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
>> 0->255
>> PCI host bridge /pcie@8ff70a000 ranges:
>> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
>> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
>> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
>> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
>> Adjusting the memory map could reduce unnecessary bounce buffering.
>> /pcie@8ff70a000: DMA window size is 0x80000000
>> MPC85xx RDB board from Freescale Semiconductor
>> <...>
>> PCI: Probing PCI hardware
>> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
>> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
>> pci 0000:00:00.0: supports D1 D2
>> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>> pci 0000:00:00.0: PME# disabled
>> pci 0000:01:00.0: [1172:0004] type 0 class 0x001000
>> pci 0000:01:00.0: reg 10: [mem 0x80000000-0x80ffffff]
>> pci 0000:01:00.0: reg 14: [mem 0x81000000-0x81ffffff]
>> pci 0000:01:00.0: reg 18: [mem 0x82000000-0x82ffffff]
>> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
>> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
>> pci 0000:00:00.0: bridge window [mem 0x80000000-0x82ffffff]
>> pci 0000:00:00.0: bridge window [mem 0x10000000-0x000fffff pref]
>> (disabled)
>> irq: irq 0 on host /soc@8ff700000/pic@40000 mapped to virtual irq 16
>> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
>> pci 0000:00:00.0: PCI bridge to [bus 01-01]
>> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
>> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
>> pci 0000:00:00.0: bridge window [mem pref disabled]
>> pci 0000:00:00.0: enabling device (0106 -> 0107)
>> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
>> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
>> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
>> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>
>
> Hi Mattias,
>
> I'm doing the same on a similar setup, also a P2020 but a 2.6.36 and
> with me it works just fine. However I encountered one problem. I
> understand it as follows, if there is no physical PCIe link then
> somewhere a flag PPC_INDIRECT_TYPE_NO_PCIE_LINK gets set. This has as
> result that reading the PCIe config space will fail with a
> PCIBIOS_DEVICE_NOT_FOUND (ref
> http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/sysdev/indirect_pci.c#L24 )
>
>
> At
> http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/include/asm/pci-bridge.h#L105
> they specify this as a workaround since the PCIe might hang if there is
> no physical link. So my workaround for this issue was:
>
> - load the fpga
> - travel down the pci bus to the correct bus where the fpga is attached
> use a pci_bus_to_host() to obtain a struct pci_controller, unset the
> PPC_INDIRECT_TYPE_NO_PCIE_LINK and call a pci_rescon_bus() on that bus.
>
> After doing this I can find access the FPGA, and reload it if needed.
> Not a clue if this is 'the proper way' to do it, but it works for me.
Looks this may be really related to the PCIe Link Training. So you have to reset
the PCIe after load the FPGA, but I think we should do this in the u-boot. For
more detail on this please refer to the code segments defined by
CONFIG_FSL_PCIE_RESET in the file, drivers/pci/fsl_pci_init.c.
Tiejun
>
> gr
> E.
>
^ permalink raw reply
* [PATCH 5/5] powerpc/numa: Fix bug in unmap_cpu_from_node
From: Anton Blanchard @ 2011-01-29 22:37 UTC (permalink / raw)
To: Nishanth Aravamudan, Benjamin Herrenschmidt, jlarrew; +Cc: linuxppc-dev
In-Reply-To: <20110130092434.42a887ef@kryten>
When converting to the new cpumask code I screwed up:
- if (cpu_isset(cpu, numa_cpumask_lookup_table[node])) {
- cpu_clear(cpu, numa_cpumask_lookup_table[node]);
+ if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) {
+ cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
This was introduced in commit 25863de07af9 (powerpc/cpumask: Convert NUMA code
to new cpumask API)
Fix it.
Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: <stable@kernel.org>
---
Index: linux-2.6/arch/powerpc/mm/numa.c
===================================================================
--- linux-2.6.orig/arch/powerpc/mm/numa.c 2011-01-29 13:06:05.259039081 +1100
+++ linux-2.6/arch/powerpc/mm/numa.c 2011-01-30 08:26:48.148366563 +1100
@@ -186,7 +186,7 @@ static void unmap_cpu_from_node(unsigned
dbg("removing cpu %lu from node %d\n", cpu, node);
if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) {
- cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
+ cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
} else {
printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n",
cpu, node);
^ permalink raw reply
* [PATCH 4/5] powerpc/numa: Disable VPHN on dedicated processor partitions
From: Anton Blanchard @ 2011-01-29 22:35 UTC (permalink / raw)
To: Nishanth Aravamudan, Benjamin Herrenschmidt, jlarrew; +Cc: linuxppc-dev
In-Reply-To: <20110130092434.42a887ef@kryten>
There is no need to start up the timer and monitor topology changes on a
dedicated processor partition, so disable it.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
Index: linux-2.6/arch/powerpc/mm/numa.c
===================================================================
--- linux-2.6.orig/arch/powerpc/mm/numa.c 2011-01-29 12:58:01.849279835 +1100
+++ linux-2.6/arch/powerpc/mm/numa.c 2011-01-29 12:58:02.489239819 +1100
@@ -1520,7 +1520,8 @@ int start_topology_update(void)
{
int rc = 0;
- if (firmware_has_feature(FW_FEATURE_VPHN)) {
+ if (firmware_has_feature(FW_FEATURE_VPHN) &&
+ get_lppaca()->shared_proc) {
vphn_enabled = 1;
setup_cpu_associativity_change_counters();
init_timer_deferrable(&topology_timer);
^ permalink raw reply
* [PATCH 3/5] powerpc/numa: Add length when creating OF properties via VPHN
From: Anton Blanchard @ 2011-01-29 22:28 UTC (permalink / raw)
To: Nishanth Aravamudan, Benjamin Herrenschmidt, jlarrew; +Cc: linuxppc-dev
In-Reply-To: <20110130092434.42a887ef@kryten>
The rest of the NUMA code expects an OF associativity property with
the first cell containing the length. Without this fix all topology changes
cause us to misparse the property and put the cpu into node 0.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
Index: linux-2.6/arch/powerpc/mm/numa.c
===================================================================
--- linux-2.6.orig/arch/powerpc/mm/numa.c 2011-01-29 12:45:09.257654450 +1100
+++ linux-2.6/arch/powerpc/mm/numa.c 2011-01-29 12:56:30.854975882 +1100
@@ -1356,8 +1356,11 @@ static int update_cpu_associativity_chan
return nr_cpus;
}
-/* 6 64-bit registers unpacked into 12 32-bit associativity values */
-#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32))
+/*
+ * 6 64-bit registers unpacked into 12 32-bit associativity values. To form
+ * the complete property we have to add the length in the first cell.
+ */
+#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32) + 1)
/*
* Convert the associativity domain numbers returned from the hypervisor
@@ -1373,7 +1376,7 @@ static int vphn_unpack_associativity(con
#define VPHN_FIELD_MSB (0x8000)
#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB)
- for (i = 0; i < VPHN_ASSOC_BUFSIZE; i++) {
+ for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
if (*field == VPHN_FIELD_UNUSED) {
/* All significant fields processed, and remaining
* fields contain the reserved value of all 1's.
@@ -1398,6 +1401,9 @@ static int vphn_unpack_associativity(con
}
}
+ /* The first cell contains the length of the property */
+ unpacked[0] = nr_assoc_doms;
+
return nr_assoc_doms;
}
^ permalink raw reply
* [PATCH 2/5] powerpc/numa: Check for all VPHN changes
From: Anton Blanchard @ 2011-01-29 22:26 UTC (permalink / raw)
To: Nishanth Aravamudan, Benjamin Herrenschmidt, jlarrew; +Cc: linuxppc-dev
In-Reply-To: <20110130092434.42a887ef@kryten>
The hypervisor uses unsigned 1 byte counters to signal topology changes to
the OS. Since they can wrap we need to check for any difference, not just if
the hypervisor count is greater than the previous count.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
Index: linux-2.6/arch/powerpc/mm/numa.c
===================================================================
--- linux-2.6.orig/arch/powerpc/mm/numa.c 2011-01-29 11:16:56.741843175 +1100
+++ linux-2.6/arch/powerpc/mm/numa.c 2011-01-29 12:44:42.059356526 +1100
@@ -1342,7 +1342,7 @@ static int update_cpu_associativity_chan
volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
for (i = 0; i < distance_ref_points_depth; i++) {
- if (hypervisor_counts[i] > counts[i]) {
+ if (hypervisor_counts[i] != counts[i]) {
counts[i] = hypervisor_counts[i];
changed = 1;
}
^ permalink raw reply
* [PATCH 1/5] powerpc/numa: Only use active VPHN count fields
From: Anton Blanchard @ 2011-01-29 22:24 UTC (permalink / raw)
To: Nishanth Aravamudan, Benjamin Herrenschmidt, jlarrew; +Cc: linuxppc-dev
In-Reply-To: <20110130092217.70ebb424@kryten>
VPHN supports up to 8 distance fields but the number of entries in
ibm,associativity-reference-points signifies how many are in use.
Don't look at all the VPHN counts, only distance_ref_points_depth
worth.
Since we already cap our distance metrics at MAX_DISTANCE_REF_POINTS,
use that to size the VPHN arrays and add a BUILD_BUG_ON to avoid it growing
larger than the VPHN maximum of 8.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
Index: linux-2.6/arch/powerpc/mm/numa.c
===================================================================
--- linux-2.6.orig/arch/powerpc/mm/numa.c 2011-01-29 10:48:21.280075270 +1100
+++ linux-2.6/arch/powerpc/mm/numa.c 2011-01-29 10:54:24.547203014 +1100
@@ -1291,8 +1291,7 @@ u64 memory_hotplug_max(void)
/* Vrtual Processor Home Node (VPHN) support */
#ifdef CONFIG_PPC_SPLPAR
-#define VPHN_NR_CHANGE_CTRS (8)
-static u8 vphn_cpu_change_counts[NR_CPUS][VPHN_NR_CHANGE_CTRS];
+static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
static cpumask_t cpu_associativity_changes_mask;
static int vphn_enabled;
static void set_topology_timer(void);
@@ -1305,12 +1304,15 @@ static void setup_cpu_associativity_chan
{
int cpu = 0;
+ /* The VPHN feature supports a maximum of 8 reference points */
+ BUILD_BUG_ON(MAX_DISTANCE_REF_POINTS > 8);
+
for_each_possible_cpu(cpu) {
int i = 0;
u8 *counts = vphn_cpu_change_counts[cpu];
volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
- for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) {
+ for (i = 0; i < distance_ref_points_depth; i++) {
counts[i] = hypervisor_counts[i];
}
}
@@ -1339,7 +1341,7 @@ static int update_cpu_associativity_chan
u8 *counts = vphn_cpu_change_counts[cpu];
volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
- for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) {
+ for (i = 0; i < distance_ref_points_depth; i++) {
if (hypervisor_counts[i] > counts[i]) {
counts[i] = hypervisor_counts[i];
changed = 1;
^ permalink raw reply
* Re: 2.6.37-git17 virtual IO boot failure
From: Anton Blanchard @ 2011-01-29 22:22 UTC (permalink / raw)
To: Nishanth Aravamudan; +Cc: jlarrew, linuxppc-dev
In-Reply-To: <20110119043757.GA29865@us.ibm.com>
Hi,
> FWIW, I looked at Anton's logs, and I don't think the boot failed, per
> se. I think it may have timed out (but not positive on that). I was
> able to boot 2.6.27-git17 on the exact same box, albeit it locks up
> at a later point (the sd abort I e-mailed about in a follow-up).
This fail bisects down to the VPHN (shared processor affinity) patch.
I've got some fixes on the way.
Anton
^ permalink raw reply
* State of suspend-to-ram?
From: Mathias Krause @ 2011-01-29 18:43 UTC (permalink / raw)
To: linuxppc-dev
Hi all!
First of all: Sorry, this is the wrong mailing list, but I searched a =
lot and found none that would fit to PPC user-related problems -- =
linux-ppc would have been one but this one seems to be dead since 2004?!
I've a G4 based Mac mini and would like to suspend it to RAM, though the =
vanilla kernel doesn't allow me to do this (/sys/power/state mentions =
only "disk"). The reason for this is my platform is marked as =
PMAC_MB_MAY_SLEEP instead of PMAC_MB_CAN_SLEEP in =
arch/powerpc/platforms/powermac/feature.c. So I changed that to be =
PMAC_MB_CAN_SLEEP and was able to suspend the system using the =
pm-suspend script from the pm-utils suite. The LED on the front was =
pulsing like it is when suspended under MacOS X. After pushing the power =
button the system started to resume but just got stuck. I see no =
messages on the console, nothing in syslog. So I assume the system =
panics pretty early in the resume path. Because the system has no serial =
console the debug capabilities are fairly limited. Any hints why this =
doesn't work or how to debug this any further?
Some system information:
mk@maxi:~$ cat /proc/cpuinfo=20
processor : 0
cpu : 7447A, altivec supported
clock : 1416.666661MHz
revision : 1.2 (pvr 8003 0102)
bogomips : 83.24
timebase : 41620997
platform : PowerMac
model : PowerMac10,1
machine : PowerMac10,1
motherboard : PowerMac10,1 MacRISC3 Power Macintosh=20
detected as : 287 (Mac mini)
pmac flags : 00000001
L2 cache : 512K unified
pmac-generation : NewWorld
Memory : 1024 MB
mk@maxi:~$ uname -a=20
Linux maxi 2.6.37+ #2 Mon Jan 24 08:56:01 CET 2011 ppc GNU/Linux
Regards,
Mathias
^ permalink raw reply
* Re: PCIe end-point on FPGA doesn't show up on PCI bus when configured
From: Elie De Brauwer @ 2011-01-28 20:06 UTC (permalink / raw)
To: Matias Garcia; +Cc: linuxppc-dev
In-Reply-To: <4D430CD4.6060201@rossvideo.com>
On 01/28/11 19:37, Matias Garcia wrote:
> I'm running a vanilla linux 2.6.37 kernel on a Freescale P2020 dual-core
> processor, and have the following conundrum: I configure the FPGA which
> brings up a PCIe interface to the processor. I scan both PCI buses on
> the system (I believe the second bus is behind the Freescale integrated
> bridge on the first), and it doesn't show up. I initiate a reset on the
> processor, and both U-boot and Linux now see the FPGA PCI device at
> 0000:01:00.00. I've noticed some of the memory mappings in the PCI
> bridge windows are different between the two boot sequences. I've tried
> all manner of pci calls (including the pcibios_fixup routines) on the
> bridge device (including removing and re-scanning it), and on bus 1,
> which is otherwise empty, to no avail. Following are some debug listings
> from dmesg; any help/ideas in tracking down the problem (hardware or
> software) is greatly appreciated.
>
> #Boot without FPGA configured:
> <snip>
> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
> 0->255
> PCI host bridge /pcie@8ff70a000 ranges:
> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
> Adjusting the memory map could reduce unnecessary bounce buffering.
> /pcie@8ff70a000: DMA window size is 0x80000000
> MPC85xx RDB board from Freescale Semiconductor
> <...>
> PCI: Probing PCI hardware
> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
> pci 0000:00:00.0: supports D1 D2
> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> pci 0000:00:00.0: PME# disabled
> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff] (disabled)
> pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff pref] (disabled)
> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
> pci 0000:00:00.0: PCI bridge to [bus 01-01]
> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
> pci 0000:00:00.0: bridge window [mem pref disabled]
> pci 0000:00:00.0: enabling device (0106 -> 0107)
> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
>
> #Reset with FPGA configured:
> <snip>
> Found FSL PCI host bridge at 0x00000008ff70a000. Firmware bus number:
> 0->255
> PCI host bridge /pcie@8ff70a000 ranges:
> MEM 0x0000000880000000..0x000000088fffffff -> 0x0000000080000000
> IO 0x00000008a0000000..0x00000008a000ffff -> 0x0000000000000000
> /pcie@8ff70a000: PCICSRBAR @ 0xfff00000
> /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
> Adjusting the memory map could reduce unnecessary bounce buffering.
> /pcie@8ff70a000: DMA window size is 0x80000000
> MPC85xx RDB board from Freescale Semiconductor
> <...>
> PCI: Probing PCI hardware
> pci 0000:00:00.0: [1957:0070] type 1 class 0x000b20
> pci 0000:00:00.0: ignoring class b20 (doesn't match header type 01)
> pci 0000:00:00.0: supports D1 D2
> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> pci 0000:00:00.0: PME# disabled
> pci 0000:01:00.0: [1172:0004] type 0 class 0x001000
> pci 0000:01:00.0: reg 10: [mem 0x80000000-0x80ffffff]
> pci 0000:01:00.0: reg 14: [mem 0x81000000-0x81ffffff]
> pci 0000:01:00.0: reg 18: [mem 0x82000000-0x82ffffff]
> pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> pci 0000:00:00.0: bridge window [io 0x0000-0x0000] (disabled)
> pci 0000:00:00.0: bridge window [mem 0x80000000-0x82ffffff]
> pci 0000:00:00.0: bridge window [mem 0x10000000-0x000fffff pref] (disabled)
> irq: irq 0 on host /soc@8ff700000/pic@40000 mapped to virtual irq 16
> PCI 0000:00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
> pci 0000:00:00.0: PCI bridge to [bus 01-01]
> pci 0000:00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
> pci 0000:00:00.0: bridge window [mem 0x880000000-0x88fffffff]
> pci 0000:00:00.0: bridge window [mem pref disabled]
> pci 0000:00:00.0: enabling device (0106 -> 0107)
> pci_bus 0000:00: resource 0 [io 0xffbed000-0xffbfcfff]
> pci_bus 0000:00: resource 1 [mem 0x880000000-0x88fffffff]
> pci_bus 0000:01: resource 0 [io 0xffbed000-0xffbfcfff]
> pci_bus 0000:01: resource 1 [mem 0x880000000-0x88fffffff]
Hi Mattias,
I'm doing the same on a similar setup, also a P2020 but a 2.6.36 and
with me it works just fine. However I encountered one problem. I
understand it as follows, if there is no physical PCIe link then
somewhere a flag PPC_INDIRECT_TYPE_NO_PCIE_LINK gets set. This has as
result that reading the PCIe config space will fail with a
PCIBIOS_DEVICE_NOT_FOUND (ref
http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/sysdev/indirect_pci.c#L24 )
At
http://lxr.linux.no/#linux+v2.6.37/arch/powerpc/include/asm/pci-bridge.h#L105
they specify this as a workaround since the PCIe might hang if there is
no physical link. So my workaround for this issue was:
- load the fpga
- travel down the pci bus to the correct bus where the fpga is attached
use a pci_bus_to_host() to obtain a struct pci_controller, unset the
PPC_INDIRECT_TYPE_NO_PCIE_LINK and call a pci_rescon_bus() on that bus.
After doing this I can find access the FPGA, and reload it if needed.
Not a clue if this is 'the proper way' to do it, but it works for me.
gr
E.
--
Elie De Brauwer
^ permalink raw reply
* Re: [PATCH v2] gianfar: Fall back to software tcp/udp checksum on oldercontrollers
From: David Miller @ 2011-01-28 19:59 UTC (permalink / raw)
To: scottwood; +Cc: netdev, David.Laight, linuxppc-dev
In-Reply-To: <20110128105610.4a518456@udp111988uds.am.freescale.net>
From: Scott Wood <scottwood@freescale.com>
Date: Fri, 28 Jan 2011 10:56:10 -0600
> On Fri, 28 Jan 2011 09:10:46 +0000
> David Laight <David.Laight@ACULAB.COM> wrote:
>
>>
>> > + if (unlikely(gfar_has_errata(priv, GFAR_ERRATA_12)
>> > + && ((unsigned long)fcb % 0x20) > 0x18)) {
>>
>> You need to check the generated code, but I think you need:
>>
>> if (unlikely(gfar_has_errata(priv, GFAR_ERRATA_12))
>> && unlikely(((unsigned long)fcb % 0x20) > 0x18))
>>
>> ie unlikely() around both the primitive comparisons.
>
> Is the first condition actually unlikely? If you've got affected
> hardware, you'll hit it every time.
>
> If packets with the problematic alignment are rare, seems like it'd be
> better to check that first.
In cases like this gfar_has_errata() case, better to leave it's
likelyhood unmarked.
And yes, since it's cheaper, checking the alignment should be done
first.
^ permalink raw reply
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