* Re: [OT - MPC5200B] strange framing, break problems with uart
From: Albrecht Dreß @ 2011-03-02 20:16 UTC (permalink / raw)
To: Henk Stegeman; +Cc: Linux PPC Development
In-Reply-To: <AANLkTi=gqFLtM7f01GFVKdSibxz4q5J9LtHrpOcH_1ta@mail.gmail.com>
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Hi Henk:
Am 01.03.11 23:28 schrieb(en) Henk Stegeman:
> Today I noticed corrupted and missing chunks of data on the 5200 with the 2.6.37 uart driver in 2.6.37.
> I don't have these problems when I use the driver from 2.6.33 (with minor changes to make it fit in 2.6.37).
Hmm, I hope it's not related to my my baud rate divisor selection patch... :-/
> While looking for a reason/solution online I came across your problem report. I hope to investigate my problem further soon, but was also wondering if you found a cause/early solution for your problem yet, just in case they could be related.
Well, my problem occurs when the '5200B is connected to a FTDI usb/serial converter (FT2232D) chip, and when both are configured to use rts/cts hw handshake.
After some discussions with Freescale's and FTDI's support, the reason seems to be that the FTDI chips continues to send zero up to 4 chars *after* the RTSn line has been deactivated by the '5200B (actually, this is the behaviour of many uart's). However, the manual says that the '5200B should report overruns (and not breaks and/or framing errors) in this case. Although I asked several times, the guy at Freescale did not say a word about this, but just blamed FTDI. So, at best their manual is plain wrong... Interestingly, if I switch rts/cts off, I *do* get overrun errors. Strange!
The solution for me seems to write my own driver - as I know (unlike "usual" serial connections) the packet sizes I expect, I can utilise the PSC's fifo and issue an IRQ when it's almost (FIFO size minus 16 chars seems to be bullet-proof after first tests even at 3 MBaud) full. In the ISR I /manually/ deactivate RTSn, a tasklet empties the FIFO and asserts RTSn again. As a positive side effect, it drastically reduces the number of interrupts. Using Bestcomm would probably be better, but I didn't get it working (still get the cpu irq's, and the task doesn't run).
Not sure if this information is helpful for you...
Cheers,
Albrecht.
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^ permalink raw reply
* [PATCH v4 2/2] add icswx support
From: Tseng-Hui (Frank) Lin @ 2011-03-02 17:20 UTC (permalink / raw)
To: linuxppc-dev; +Cc: tsenglin
Icswx is a PowerPC co-processor instruction to send data to a
co-processor. On Book-S processors the LPAR_ID and process ID (PID) of
the owning process are registered in the window context of the
co-processor at initial time. When the icswx instruction is executed,
the L2 generates a cop-reg transaction on PowerBus. The transaction has
no address and the processor does not perform an MMU access to
authenticate the transaction. The coprocessor compares the LPAR_ID and
the PID included in the transaction and the LPAR_ID and PID held in the
window context to determine if the process is authorized to generate the
transaction.
The OS needs to assign a 16-bit PID for the process. This cop-PID needs
to be updated during context switch. The cop-PID needs to be destroied
when the context is destroied.
Change log from V3:
- Rebase to linux/kernel/git/next/linux-next.git 2011-02-28
- Move the SPRN_PID changes into a separate patch.
- (Unchanged) Not to make icswx a cpu_user_feature as the icswx support
is to be used by coprocessor drivers only.
arch/powerpc/platforms/Kconfig.cputype:
- Add ICSWX_LAZY_SWITCH
arch/powerpc/include/asm/mmu_context.h:
- Call switch_cop() in switch_mm() only if prev or next uses a coprocessor.
arch/powerpc/include/asm/mmu-hash64.h:
- Add cop_lock to mm_context_t
- Rename HASH64_MAX_PID to COP_PID_MAX and move to mmu_context_hash64.c
arch/powerpc/mm/mmu_context_hash64.c:
- Add a comment block to describe the usage of the icswx support code
- Define COP_PID_NONE, COP_PID_MIN, COP_PID_MAX for id allocation
- Define mtspr_acop() to make lazy switching a config option.
- change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL.
- Remove EXPORT_SYMBOL(switch_cop) as it is only used in switch_mm().
- use_cop(): make id allocation code into new new_cop_pid().
- use_cop/drop_cop(): Use cop_lock to guard acop and cop_pid accesses
between threads in the same process. Init sop_lock in init_new_context().
- Remove unnecessary cpu_has_feature() check from drop_cop() and switch_cop().
- Call drop_cop() instead of destroy_acop() in destroy_context().
- Remove unused destroy_acop() function.
Change log from v2:
- Make the code a CPU feature and return -NODEV if CPU doesn't have
icswx co-processor instruction.
- Change the goto loop in use_cop() into a do-while loop.
- Change context destroy code into a new destroy_context_acop() function
and #define it based on CONFIG_ICSWX.
- Remove mmput() from drop_cop().
- Fix some TAB/space problems.
Change log from V1:
- Change 2'nd parameter of use_cop() from struct task_struct *task
to struct mm_struct *mm.
- Check for mm == current->active_mm before calling mtspr().
- Add a lock to guard acop related operations.
- Check for POWER7 CPU.
- Move the definition of SPRN_PID from reg_booke.h to avoid
defining SPRN_PID in two different files.
- Rename pid to acop_pid.
- Change function name disuse_cop() to drop_cop().
- Add a comment to describe the two new fields in mm_context_t.
- Moving CONFIG_ICSWX from arch/powerpc/platforms/pseries/Kconfig
to arch/powerpc/platforms/Kconfig.cputype.
Signed-off-by: Sonny Rao <sonnyrao@linux.vnet.ibm.com>
Signed-off-by: Tseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/cputable.h | 4 +-
arch/powerpc/include/asm/mmu-hash64.h | 13 +++
arch/powerpc/include/asm/mmu_context.h | 12 ++
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/mm/mmu_context_hash64.c | 177 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/Kconfig.cputype | 43 ++++++++
6 files changed, 249 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index be3cdf9..c56e2df 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -202,6 +202,7 @@ extern const char *powerpc_base_platform;
#define CPU_FTR_STCX_CHECKS_ADDRESS LONG_ASM_CONST(0x0200000000000000)
#define CPU_FTR_POPCNTB LONG_ASM_CONST(0x0400000000000000)
#define CPU_FTR_POPCNTD LONG_ASM_CONST(0x0800000000000000)
+#define CPU_FTR_ICSWX LONG_ASM_CONST(0x1000000000000000)
#ifndef __ASSEMBLY__
@@ -421,7 +422,8 @@ extern const char *powerpc_base_platform;
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \
- CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD)
+ CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
+ CPU_FTR_ICSWX)
#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index acac35d..b0c2549 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -409,6 +409,14 @@ static inline void subpage_prot_init_new_context(struct mm_struct *mm) { }
typedef unsigned long mm_context_id_t;
+#ifdef CONFIG_ICSWX
+/*
+ * Use forward declearation to avoid including linux/spinlock_types.h
+ * which breaks kernel build.
+ */
+struct spinlock;
+#endif /* CONFIG_ICSWX */
+
typedef struct {
mm_context_id_t id;
u16 user_psize; /* page size index */
@@ -423,6 +431,11 @@ typedef struct {
#ifdef CONFIG_PPC_SUBPAGE_PROT
struct subpage_prot_table spt;
#endif /* CONFIG_PPC_SUBPAGE_PROT */
+#ifdef CONFIG_ICSWX
+ struct spinlock *cop_lockp; /* guard acop and cop_pid */
+ unsigned long acop; /* mask of enabled coprocessor types */
+ unsigned int cop_pid; /* pid value used with coprocessors */
+#endif /* CONFIG_ICSWX */
} mm_context_t;
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index 81fb412..fe0a09a 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -32,6 +32,12 @@ extern void __destroy_context(unsigned long context_id);
extern void mmu_context_init(void);
#endif
+#ifdef CONFIG_ICSWX
+extern void switch_cop(struct mm_struct *next);
+extern int use_cop(unsigned long acop, struct mm_struct *mm);
+extern void drop_cop(unsigned long acop, struct mm_struct *mm);
+#endif /* CONFIG_ICSWX */
+
/*
* switch_mm is the entry point called from the architecture independent
* code in kernel/sched.c
@@ -55,6 +61,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
if (prev == next)
return;
+#ifdef CONFIG_ICSWX
+ /* Switch coprocessor context only if prev or next uses a coprocessor */
+ if (prev->context.acop || next->context.acop)
+ switch_cop(next);
+#endif /* CONFIG_ICSWX */
+
/* We must stop all altivec streams before changing the HW
* context
*/
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 125fc1a..51585eb 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -182,6 +182,7 @@
#define SPRN_CTR 0x009 /* Count Register */
#define SPRN_DSCR 0x11
+#define SPRN_ACOP 0x1F /* Available Coprocessor Register */
#define SPRN_CTRLF 0x088
#define SPRN_CTRLT 0x098
#define CTRL_CT 0xc0000000 /* current thread */
diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c
index 2535828..43d66cc 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -18,11 +18,177 @@
#include <linux/mm.h>
#include <linux/spinlock.h>
#include <linux/idr.h>
+#include <linux/percpu.h>
#include <linux/module.h>
#include <linux/gfp.h>
+#include <linux/slab.h>
#include <asm/mmu_context.h>
+#ifdef CONFIG_ICSWX
+/*
+ * The processor and its L2 cache cause the icswx instruction to
+ * generate a COP_REQ transaction on PowerBus. The transaction has
+ * no address, and the processor does not perform an MMU access
+ * to authenticate the transaction. The command portion of the
+ * PowerBus COP_REQ transaction includes the LPAR_ID (LPID) and
+ * the coprocessor Process ID (PID), which the coprocessor compares
+ * to the authorized LPID and PID held in the coprocessor, to determine
+ * if the process is authorized to generate the transaction.
+ * The data of the COP_REQ transaction is 128-byte or less and is
+ * placed in cacheable memory on a 128-byte cache line boundary.
+ *
+ * The task to use a coprocessor should use use_cop() to allocate
+ * a coprocessor PID before executing icswx instruction. use_cop()
+ * also enables the coprocessor context switching. Drop_cop() is
+ * used to free the coprocessor PID.
+ *
+ * Example:
+ * Host Fabric Interface (HFI) is a PowerPC network coprocessor.
+ * Each HFI have multiple windows. Each HFI window serves as a
+ * network device sending to and receiving from HFI network.
+ * HFI immediate send function uses icswx instruction. The immediate
+ * send function allows small (single cache-line) packets be sent
+ * without using the regular HFI send FIFO and doorbell, which are
+ * much slower than immediate send.
+ *
+ * For each task intending to use HFI immediate send, the HFI driver
+ * calls use_cop() to obtain a coprocessor PID for the task.
+ * The HFI driver then allocate a free HFI window and save the
+ * coprocessor PID to the HFI window to allow the task to use the
+ * HFI window.
+ *
+ * The HFI driver repeatedly creates immediate send packets and
+ * issues icswx instruction to send data through the HFI window.
+ * The HFI compares the coprocessor PID in the CPU PID register
+ * to the PID held in the HFI window to determine if the transaction
+ * is allowed.
+ *
+ * When the task to release the HFI window, the HFI driver calls
+ * drop_cop() to release the coprocessor PID.
+ */
+
+#ifdef CONFIG_ICSWX_LAZY_SWITCH
+static DEFINE_PER_CPU(unsigned long, acop_reg);
+#define mtspr_acop(val) \
+ if (__get_cpu_var(acop_reg) != val) { \
+ get_cpu_var(acop_reg) = val; \
+ mtspr(SPRN_ACOP, val); \
+ put_cpu_var(acop_reg); \
+ }
+#else
+#define mtspr_acop(val) mtspr(SPRN_ACOP, val)
+#endif /* CONFIG_ICSWX_LAZY_SWITCH */
+
+#define COP_PID_NONE 0
+#define COP_PID_MIN (COP_PID_NONE + 1)
+#define COP_PID_MAX (0xFFFF)
+
+static DEFINE_SPINLOCK(mmu_context_acop_lock);
+static DEFINE_IDA(cop_ida);
+
+void switch_cop(struct mm_struct *next)
+{
+ mtspr(SPRN_PID, next->context.cop_pid);
+ mtspr_acop(next->context.acop);
+}
+
+static int new_cop_pid(struct ida *ida, int min_id, int max_id,
+ spinlock_t *lock)
+{
+ int index;
+ int err;
+
+again:
+ if (!ida_pre_get(ida, GFP_KERNEL))
+ return -ENOMEM;
+
+ spin_lock(lock);
+ err = ida_get_new_above(ida, min_id, &index);
+ spin_unlock(lock);
+
+ if (err == -EAGAIN)
+ goto again;
+ else if (err)
+ return err;
+
+ if (index > max_id) {
+ spin_lock(lock);
+ ida_remove(ida, index);
+ spin_unlock(lock);
+ return -ENOMEM;
+ }
+
+ return index;
+}
+
+/*
+ * Start using a coprocessor.
+ * @acop: mask of coprocessor to be used.
+ * @mm: The mm the coprocessor to associate with. Most likely current mm.
+ *
+ * Return a positive PID if successful. Negative errno otherwise.
+ * The returned PID will be fed to the coprocessor to determine if an
+ * icswx transaction is authenticated.
+ */
+int use_cop(unsigned long acop, struct mm_struct *mm)
+{
+ int cop_pid;
+
+ if (!cpu_has_feature(CPU_FTR_ICSWX))
+ return -ENODEV;
+
+ if (!mm || !acop)
+ return -EINVAL;
+
+ spin_lock(mm->context.cop_lockp);
+ if (mm->context.cop_pid == COP_PID_NONE) {
+ cop_pid = new_cop_pid(&cop_ida, COP_PID_MIN, COP_PID_MAX,
+ &mmu_context_acop_lock);
+ if (cop_pid < 0) {
+ spin_unlock(mm->context.cop_lockp);
+ return cop_pid;
+ }
+ mm->context.cop_pid = cop_pid;
+ if (mm == current->active_mm)
+ mtspr(SPRN_PID, mm->context.cop_pid);
+ }
+ mm->context.acop |= acop;
+ if (mm == current->active_mm)
+ mtspr_acop(mm->context.acop);
+ spin_unlock(mm->context.cop_lockp);
+ return mm->context.cop_pid;
+}
+EXPORT_SYMBOL_GPL(use_cop);
+
+/*
+ * Stop using a coprocessor.
+ * @acop: mask of coprocessor to be stopped.
+ * @mm: The mm the coprocessor associated with.
+ */
+void drop_cop(unsigned long acop, struct mm_struct *mm)
+{
+ if (WARN_ON(!mm))
+ return;
+
+ spin_lock(mm->context.cop_lockp);
+ mm->context.acop &= ~acop;
+ if (mm == current->active_mm)
+ mtspr_acop(mm->context.acop);
+ if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
+ spin_lock(&mmu_context_acop_lock);
+ ida_remove(&cop_ida, mm->context.cop_pid);
+ spin_unlock(&mmu_context_acop_lock);
+ mm->context.cop_pid = COP_PID_NONE;
+ if (mm == current->active_mm)
+ mtspr(SPRN_PID, mm->context.cop_pid);
+ }
+ spin_unlock(mm->context.cop_lockp);
+}
+EXPORT_SYMBOL_GPL(drop_cop);
+
+#endif /* CONFIG_ICSWX */
+
static DEFINE_SPINLOCK(mmu_context_lock);
static DEFINE_IDA(mmu_context_ida);
@@ -79,6 +245,12 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
slice_set_user_psize(mm, mmu_virtual_psize);
subpage_prot_init_new_context(mm);
mm->context.id = index;
+#ifdef CONFIG_ICSWX
+ mm->context.cop_lockp = kmalloc(sizeof(spinlock_t), GFP_KERNEL);
+ if (! mm->context.cop_lockp)
+ return -ENOMEM;
+ spin_lock_init(mm->context.cop_lockp);
+#endif /* CONFIG_ICSWX */
return 0;
}
@@ -93,6 +265,11 @@ EXPORT_SYMBOL_GPL(__destroy_context);
void destroy_context(struct mm_struct *mm)
{
+#ifdef CONFIG_ICSWX
+ drop_cop(mm->context.acop, mm);
+ kfree(mm->context.cop_lockp);
+ mm->context.cop_lockp = NULL;
+#endif /* CONFIG_ICSWX */
__destroy_context(mm->context.id);
subpage_prot_free(mm);
mm->context.id = NO_CONTEXT;
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 111138c..0007b66 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -226,6 +226,49 @@ config VSX
If in doubt, say Y here.
+config ICSWX
+ bool "Support for PowerPC icswx coprocessor instruction"
+ depends on POWER4
+ default n
+ ---help---
+
+ Enabling this option to turn on the PowerPC Initiate Coprocessor
+ Store Word (icswx) coprocessor instruction support for POWER7
+ or newer processors.
+
+ This option is only useful if you have a processor that supports
+ icswx coprocessor instruction. It does not have any effect on
+ processors without icswx coprocessor instruction.
+
+ This option slightly increases kernel memory usage.
+
+ Say N if you do not have a PowerPC processor supporting icswx
+ instruction and a PowerPC coprocessor.
+
+config ICSWX_LAZY_SWITCH
+ bool "Lazy switching coprocessor type registers at context switching"
+ depends on ICSWX
+ default y
+ ---help---
+
+ Coprocessor type register is part of process context. It needs
+ to be switched at context switching.
+
+ As most machines have a very small number (most likely <= 1)
+ of coprocessors, there is a good chance that the value of the
+ coprocessor type register is the same between many processes.
+ We do not need to change coprocessor type register at context
+ switching unless the task to switch to has a different value.
+
+ Accessing CPU special purpose registers is far more expensive
+ than accessing memory. This option uses a per-CPU variable
+ to track the value of coprocessor type register. The variable
+ is checked before updating coprocessor type register. The saving
+ for one access is small but could turn big with the high
+ frequency of context switching.
+
+ Say Y unless you have multiple coprocessors.
+
config SPE
bool "SPE Support"
depends on E200 || (E500 && !PPC_E500MC)
^ permalink raw reply related
* [PATCH v4 1/2] add icswx support
From: Tseng-Hui (Frank) Lin @ 2011-03-02 17:20 UTC (permalink / raw)
To: linuxppc-dev; +Cc: tsenglin
Move SPRN_PID declearations in various locations into one place.
Signed-off-by: Tseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/reg.h | 10 ++++++++++
arch/powerpc/include/asm/reg_booke.h | 3 ---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 125fc1a..bd0d36e 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -170,6 +170,16 @@
#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
/* Special Purpose Registers (SPRNs)*/
+
+#ifdef CONFIG_40x
+#define SPRN_PID 0x3B1 /* Process ID */
+#else
+#define SPRN_PID 0x030 /* Process ID */
+#ifdef CONFIG_BOOKE
+#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */
+#endif
+#endif
+
#define SPRN_CTR 0x009 /* Count Register */
#define SPRN_DSCR 0x11
#define SPRN_CTRLF 0x088
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index e68c69b..86ad812 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -150,8 +150,6 @@
* or IBM 40x.
*/
#ifdef CONFIG_BOOKE
-#define SPRN_PID 0x030 /* Process ID */
-#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */
#define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */
#define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */
#define SPRN_DEAR 0x03D /* Data Error Address Register */
@@ -168,7 +166,6 @@
#define SPRN_TCR 0x154 /* Timer Control Register */
#endif /* Book E */
#ifdef CONFIG_40x
-#define SPRN_PID 0x3B1 /* Process ID */
#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
^ permalink raw reply related
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Ira W. Snyder @ 2011-03-02 16:42 UTC (permalink / raw)
To: Felix Radensky; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4D6DDA85.8070204@embedded-sol.com>
On Wed, Mar 02, 2011 at 07:49:57AM +0200, Felix Radensky wrote:
> Hi Ira,
>
> On 03/01/2011 09:52 PM, Ira W. Snyder wrote:
> > On Tue, Mar 01, 2011 at 08:55:15AM -0800, Ira W. Snyder wrote:
> >
> > [ big snip ]
> >
> >
> > I'd still like the bisect if you have a chance. I've re-reviewed the
> > patch series, and found the places that change register writes to the
> > controller.
> >
> > The patch below changes the register operations back to the original
> > order. It doesn't make any sense why this would be required, but it is
> > worth a quick try.
> >
> > I've added an "XXX" mark where you can comment out a single line if this
> > patch fails. It is highly unlikely to make any difference, but I'm
> > really having a hard time understanding what is wrong.
> >
> >
> This patch fixes the problem. See below
>
Excellent! I know what is happening now. The 85xx controller doesn't
clear the "channel start" bit at the end of a transfer. Sure enough,
buried near the end of the chapter, the datasheet implies this in a
table very far away from the register definitions. The 83xx datasheet
explicitly states that it clears this bit automatically.
I'll post an updated patch series later today. Thank you so much for
being patient and trying out all of these patches.
Ira
^ permalink raw reply
* Re: [PATCH] powerpc/ptrace: remove BUG_ON when full register set not available
From: Michael Wolf @ 2011-03-02 15:44 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, mikey, anton
In-Reply-To: <1299035316.8833.806.camel@pasglop>
On Wed, 2011-03-02 at 14:08 +1100, Benjamin Herrenschmidt wrote:
> > --- ptracev2.orig/include/linux/regset.h 2011-02-20 12:15:57.000000000 -0600
> > +++ ptracev2/include/linux/regset.h 2011-02-28 13:33:36.685302349 -0600
> > @@ -240,6 +240,34 @@ static inline int user_regset_copyout(un
> > }
> > return 0;
> > }
> > +/* want the count to be the registers 14-31 inclusive */
> > +#define POISON_REG_CNT (PT_R31-PT_R14+1)
> > +static inline int user_regset_copyout_poison(unsigned int *pos,
> > + unsigned int *count,
> > + void **kbuf, void __user **ubuf,
> > + const int start_pos,
> > + const int end_pos)
> > +{
>
> I wouldn't put that in a generic location... especially something
> like POISON_REG_CNT is very specific to powerpc and our ABI.
Yeah I put it there thinking about readability but only use it in the
one place. If we go forward with this current strategy I will remove
the #define and just comment more.
>
> .../...
>
> > static inline int user_regset_copyin(unsigned int *pos, unsigned int *count,
> > const void **kbuf,
> > --- ptracev2.orig/arch/powerpc/kernel/ptrace.c 2011-02-20 12:15:57.000000000 -0600
> > +++ ptracev2/arch/powerpc/kernel/ptrace.c 2011-03-01 13:49:12.686354353 -0600
> > @@ -234,11 +234,29 @@ static int gpr_get(struct task_struct *t
> > if (target->thread.regs == NULL)
> > return -EIO;
> >
> > - CHECK_FULL_REGS(target->thread.regs);
>
> Wouldn't it be a simpler/cleaner approach to use a single function call
> here that checks if the reg set is full and if not, put poison values
> in the thread.regs structure itself ?
>
> The resulting code would be more palatable...
That was actually the way I had done the first patch while debugging the
problem but Paul Mackerras didn't like that I changed the thread struct.
It is not clear to me which is better. Reporting a poison value that
isn't actually there or to change the data. Hopefully a consensus can
be reached and then I can submit a new patch based on that.
>
> Cheers,
> Ben.
>
> > - ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> > - target->thread.regs,
> > - 0, offsetof(struct pt_regs, msr));
> > + if (!FULL_REGS(target->thread.regs)) {
> > + /* Don't have the full register set. Copy out register r0-r13 */
> > + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> > + target->thread.regs,
> > + 0, sizeof(long)*PT_R14);
> > +
> > + /* Dont want to change the actual register values so rather than read the */
> > + /* actual register copy a poison value into the buffer instead */
> > + if (!ret)
> > + ret = user_regset_copyout_poison(&pos, &count, &kbuf, &ubuf,
> > + sizeof(long)*PT_R14, offsetof(struct pt_regs, nip));
> > +
> > + /* Copy out the rest of the registers as usual */
> > + if (!ret)
> > + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> > + target->thread.regs,
> > + offsetof(struct pt_regs, nip), offsetof(struct pt_regs, msr));
> > +
> > + } else
> > + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> > + target->thread.regs,
> > + 0, offsetof(struct pt_regs, msr));
> > if (!ret) {
> > unsigned long msr = get_user_msr(target);
> > ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
> > @@ -645,11 +663,29 @@ static int gpr32_get(struct task_struct
> > if (target->thread.regs == NULL)
> > return -EIO;
> >
> > - CHECK_FULL_REGS(target->thread.regs);
> > -
> > pos /= sizeof(reg);
> > count /= sizeof(reg);
> >
> > + if(!FULL_REGS(target->thread.regs)) {
> > + if (kbuf) {
> > + /* Don't have the full register set. Copy out register r0-r13 */
> > + for (; count > 0 && pos < PT_R14; --count)
> > + *k++ = regs[pos++];
> > +
> > + /* Dont want to change the actual register values so rather than read the */
> > + /* actual register copy a poison value into the buffer instead */
> > + for (; count > 0 && pos <= PT_R31; --count,pos++)
> > + *k++ = 0xdeadbeef;
> > +
> > + } else {
> > + for (; count > 0 && pos < PT_R14; --count)
> > + if (__put_user((compat_ulong_t) regs[pos++], u++))
> > + return -EFAULT;
> > + for (; count > 0 && pos <= PT_R31; --count,pos++)
> > + if (__put_user((compat_ulong_t) 0xdeadbeef, u++))
> > + return -EFAULT;
> > + }
> > + }
> > if (kbuf)
> > for (; count > 0 && pos < PT_MSR; --count)
> > *k++ = regs[pos++];
> >
> >
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
>
>
^ permalink raw reply
* Re: [PATCH V2 1/6] powerpc: Move udbg_early_init() after early_init_devtree()
From: Dave Kleikamp @ 2011-03-02 13:03 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, David Gibson
In-Reply-To: <1299037037.8833.821.camel@pasglop>
On Wed, 2011-03-02 at 14:37 +1100, Benjamin Herrenschmidt wrote:
> On Mon, 2011-02-07 at 19:29 +1100, David Gibson wrote:
> > On Wed, Feb 02, 2011 at 06:00:25PM -0600, Dave Kleikamp wrote:
> > > On Thu, 2011-02-03 at 10:06 +1100, David Gibson wrote:
> > > > On Tue, Feb 01, 2011 at 12:48:41PM -0600, Dave Kleikamp wrote:
> > > > > so that it can use information from the device tree.
> > > >
> > > > Hrm. On the other hand this means that the early_init_devtree() code
> > > > can't benefit from hardcoded early debugging. Since you don't
> > > > actually appear to use devtree information in udbg_early_init() in the
> > > > latest series, I'd suggest dropping this patch.
> > >
> > > Patch 2 depends on early_init_devtree() being run. Until then, I don't
> > > know of a way to get at the bootargs.
> >
> > Ah, yes. Drat.
>
> Doesn't matter. _Early_ debug has (or should have) the address in
> the .config file anyways, so it really shouldn't have to care about the
> arguments.
>
> So I'll drop this patch.
>
> There are plenty of reasons why we want to be able to use the early
> debug stuff to debug what's happening inside early_init_devtree() :-)
Fair enough. I wasn't sure this was the right thing to do. It's either
turn off early debug for AMP, or build separate kernels with a different
address in .config.
Shaggy
^ permalink raw reply
* [PATCH] Remove unused is_iso from fsl_udc_core.c
From: huzaifas @ 2011-03-02 6:23 UTC (permalink / raw)
To: linux-usb; +Cc: dbrownell, linuxppc-dev, gregkh, Huzaifa Sidhpurwala
From: Huzaifa Sidhpurwala <huzaifas@redhat.com>
is_iso variable is not used anywhere, remove it
Signed-off-by: Huzaifa Sidhpurwala <huzaifas@redhat.com>
---
drivers/usb/gadget/fsl_udc_core.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 4c55eda..912cb8e 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -766,7 +766,6 @@ fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
struct fsl_req *req = container_of(_req, struct fsl_req, req);
struct fsl_udc *udc;
unsigned long flags;
- int is_iso = 0;
/* catch various bogus parameters */
if (!_req || !req->req.complete || !req->req.buf
@@ -781,7 +780,6 @@ fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
if (req->req.length > ep->ep.maxpacket)
return -EMSGSIZE;
- is_iso = 1;
}
udc = ep->udc;
--
1.7.3.4
^ permalink raw reply related
* Re: Per process DSCR + somefixes (try#3)
From: Alexey Kardashevskiy @ 2011-03-02 6:15 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1299044868.8833.832.camel@pasglop>
On 02/03/11 16:47, Benjamin Herrenschmidt wrote:
> BTW. I suppose it's an expected behaviour that thread created with a
> given default value will keep that value even when the default is later
> changed right ? And their descendents will use the same default as the
> original thread, not the new default, at least that's how I read your
> code :-) Maybe that should be documented somewhere...
>
That's right. The idea was to let one set of
processes-which-do-not-access-dscr-directly to work+fork with one value
and other set to work+fork with another value. I have no idea who and
how is going to use it though. Hope the HPC team tells me if something
is wrong :-)
--
Alexey Kardashevskiy
IBM OzLabs, LTC Team
e-mail/sametime: aik@au1.ibm.com
notes: Alexey Kardashevskiy/Australia/IBM
^ permalink raw reply
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Felix Radensky @ 2011-03-02 5:49 UTC (permalink / raw)
To: Ira W. Snyder; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <20110301195208.GC23403@ovro.caltech.edu>
Hi Ira,
On 03/01/2011 09:52 PM, Ira W. Snyder wrote:
> On Tue, Mar 01, 2011 at 08:55:15AM -0800, Ira W. Snyder wrote:
>
> [ big snip ]
>
>
> I'd still like the bisect if you have a chance. I've re-reviewed the
> patch series, and found the places that change register writes to the
> controller.
>
> The patch below changes the register operations back to the original
> order. It doesn't make any sense why this would be required, but it is
> worth a quick try.
>
> I've added an "XXX" mark where you can comment out a single line if this
> patch fails. It is highly unlikely to make any difference, but I'm
> really having a hard time understanding what is wrong.
>
>
This patch fixes the problem. See below
__dma_request_channel: success (dma0chan0)
dmatest: Started 1 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=8
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000140
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=8
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0x10a8 dst_off=0x1914
len=0x1dca
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=8
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=10
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000141
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=10
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #1: No errors with src_off=0xdb8 dst_off=0xc14 len=0x526
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=10
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=17
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000141
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=17
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #2: No errors with src_off=0xf48 dst_off=0x85d len=0x188f
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372360 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3723c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372420 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372480 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3724e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372540 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=17
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=32
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: 85xx, running workaround
of:fsl-elo-dma ffe0c300.dma: chan0: dma_halt mode=0x08000141
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=32
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3720c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3721e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3722a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372300 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372360 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3723c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372420 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372480 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3724e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef372540 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #3: No errors with src_off=0x4ff dst_off=0x453 len=0x395d
dma0chan0-copy0: terminating after 4 tests, 0 failures (status 0)
Felix.
^ permalink raw reply
* Re: Per process DSCR + somefixes (try#3)
From: Benjamin Herrenschmidt @ 2011-03-02 5:47 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: linuxppc-dev
In-Reply-To: <4D5B62F2.3020709@au1.ibm.com>
On Wed, 2011-02-16 at 16:38 +1100, Alexey Kardashevskiy wrote:
> step1: http://patchwork.ozlabs.org/patch/71489/
> step2: http://patchwork.ozlabs.org/patch/81423/
>
> In step2 I defined sysfs node as:
>
> static SYSDEV_ATTR(dscr_default, 0600, show_dscr_default,
> store_dscr_default);
>
> and it caused problems with rhel6.
> Now it is:
>
> static SYSDEV_CLASS_ATTR(dscr_default, 0600, show_dscr_default,
> store_dscr_default);
>
> It works now on both 2.6.32 and 2.6.36 but is that correct?
Ok, please resend with a proper changeset comment, something like that
would do:
<<
The DSCR (aka Data Stream Control Register) is supported on some
server PowerPC chips and allow some control over the prefetch
of data streams.
This patch allows the value to specified per thread by emulating
the corresponding mfspr and mtspr instructions. Children of such
threads inherit the value. Other threads use a default value that
can be specified in sysfs.
>>
And include your Signed-off-by: line.
BTW. I suppose it's an expected behaviour that thread created with a
given default value will keep that value even when the default is later
changed right ? And their descendents will use the same default as the
original thread, not the new default, at least that's how I read your
code :-) Maybe that should be documented somewhere...
Cheers,
Ben.
^ permalink raw reply
* RE: [PATCH][v2] driver/FSL SATA:Fix wrong Device Error Register usage
From: Kushwaha Prabhakar-B32579 @ 2011-03-02 5:22 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: meet2prabhu@gmail.com, Kalra Ashish-B00888,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1299036347.8833.819.camel@pasglop>
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ZW50cyBQTVAgZGV2aWNlIDEgZXRjLg0KPiANCj4gSXQgbWlnaHQgaGVscCB0byBzZW5kIHRob3Nl
IHBhdGNoZXMgdG8gdGhlIGxpbnV4LWlkZSBtYWlsaW5nIGxpc3QgYW5kDQo+IGFwcHJvcHJpYXRl
IGxpYmF0YSBtYWludGFpbmVycyBpbiBhZGRpdGlvbiB0byBDQydpbmcgbGludXhwcGMtZGV2Lg0K
PiANClRoYW5rcyBCZW5qYW1pbiEhDQpJIHdpbGwgdGFrZSBjYXJlIHlvdXIgcG9pbnQgaW4gbmVh
ciBmdXR1cmUuDQoNCi0tUHJhYmhha2FyDQoNCj4gPiBDdXJyZW50IGltcGxlbWVudGF0aW9uIHRy
ZWF0cyBEZXZpY2UgZXJyb3IgcmVnaXN0ZXIgdmFsdWUgYXMgZGV2aWNlDQo+ID4gbnVtYmVyIG5v
dCBzZXQgb2YgYml0cyByZXByZXNlbnRpbmcgbXVsdGlwbGUgZGV2aWNlIG9uIFBNUC4gSXQgaXMN
Cj4gPiBjaGFuZ2VkIHRvIGNvbnNpZGVyIGJpdCBsZXZlbC4NCj4gPiBObyBuZWVkIHRvIGNoZWNr
IGZvciBlYWNoIHNldCBiaXQgYXMgYWxsIGNvbW1hbmQgaXMgZ29pbmcgdG8gYmUNCj4gYWJvcnRl
ZC4NCj4gPg0KPiA+IFNpZ25lZC1vZmYtYnk6IFByYWJoYWthciBLdXNod2FoYSA8cHJhYmhha2Fy
QGZyZWVzY2FsZS5jb20+DQo+ID4gU2lnbmVkLW9mZi1ieTogQXNoaXNoIEthbHJhIDxCMDA4ODhA
ZnJlZXNjYWxlLmNvbT4NCj4gPiAtLS0NCj4gPiAgZ2l0Oi8vZ2l0Lmtlcm5lbC5vcmcvcHViL3Nj
bS9saW51eC9rZXJuZWwvZ2l0L3RvcnZhbGRzL2xpbnV4LTIuNi5naXQNCj4gPiAoYnJhbmNoIG1h
c3RlcikNCj4gPg0KPiA+ICBDaGFuZ2VzIGZvciB2MTogSW5jb3Jwb3JhdGVkIERhdmlkIExhaWdo
dCdzIGNvbW1lbnQNCj4gPiAgCS0gU2luZ2xlIHVzYWdlIG9mIGZmcygpDQo+ID4NCj4gPiAgQ2hh
bmdlcyBmb3IgdjI6IEluY29ycG9yYXRlZCBEYXZpZCBMYWlnaHQncyBjb21tZW50DQo+ID4gIAkt
IENoYW5nZWQgdHlwZSBvZiBkZXZfbnVtIHRvIHVuc2lnbmVkDQo+ID4NCj4gPiAgZHJpdmVycy9h
dGEvc2F0YV9mc2wuYyB8ICAgIDYgKysrKy0tDQo+ID4gIDEgZmlsZXMgY2hhbmdlZCwgNCBpbnNl
cnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQ0KPiA+DQo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv
YXRhL3NhdGFfZnNsLmMgYi9kcml2ZXJzL2F0YS9zYXRhX2ZzbC5jIGluZGV4DQo+ID4gYjAyMTRk
MC4uODk1NzcxYyAxMDA2NDQNCj4gPiAtLS0gYS9kcml2ZXJzL2F0YS9zYXRhX2ZzbC5jDQo+ID4g
KysrIGIvZHJpdmVycy9hdGEvc2F0YV9mc2wuYw0KPiA+IEBAIC0xMDQwLDEyICsxMDQwLDE0IEBA
IHN0YXRpYyB2b2lkIHNhdGFfZnNsX2Vycm9yX2ludHIoc3RydWN0DQo+ID4gYXRhX3BvcnQgKmFw
KQ0KPiA+DQo+ID4gIAkJLyogZmluZCBvdXQgdGhlIG9mZmVuZGluZyBsaW5rIGFuZCBxYyAqLw0K
PiA+ICAJCWlmIChhcC0+bnJfcG1wX2xpbmtzKSB7DQo+ID4gKwkJCXVuc2lnbmVkIGludCBkZXZf
bnVtOw0KPiA+ICAJCQlkZXJlZyA9IGlvcmVhZDMyKGhjcl9iYXNlICsgREUpOw0KPiA+ICAJCQlp
b3dyaXRlMzIoZGVyZWcsIGhjcl9iYXNlICsgREUpOw0KPiA+ICAJCQlpb3dyaXRlMzIoY2VyZWcs
IGhjcl9iYXNlICsgQ0UpOw0KPiA+DQo+ID4gLQkJCWlmIChkZXJlZyA8IGFwLT5ucl9wbXBfbGlu
a3MpIHsNCj4gPiAtCQkJCWxpbmsgPSAmYXAtPnBtcF9saW5rW2RlcmVnXTsNCj4gPiArCQkJZGV2
X251bSA9IGZmcyhkZXJlZyktMTsNCj4gPiArCQkJaWYgKGRldl9udW0gPCBhcC0+bnJfcG1wX2xp
bmtzKSB7DQo+ID4gKwkJCQlsaW5rID0gJmFwLT5wbXBfbGlua1tkZXZfbnVtXTsNCj4gPiAgCQkJ
CWVoaSA9ICZsaW5rLT5laF9pbmZvOw0KPiA+ICAJCQkJcWMgPSBhdGFfcWNfZnJvbV90YWcoYXAs
IGxpbmstPmFjdGl2ZV90YWcpOw0KPiA+ICAJCQkJLyoNCj4gDQo+IA0KDQo=
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2011-03-02 4:54 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev list, Andrew Morton, Linux Kernel list
Hi Linus !
Here are 3 patches for powerpc, one reverts an Anton mistake (such a thing
does exist indeed ! here goes my blind faith...) and a couple of fixes
that would be much welcome to have in .38
Cheers,
Ben.
The following changes since commit dd9c1549edef02290edced639f67b54a25abbe0e:
Linux 2.6.38-rc7 (2011-03-01 13:55:12 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
Anton Blanchard (1):
powerpc/kexec: Restore ppc_md.machine_kexec
K.Prasad (1):
powerpc: Fix call to flush_ptrace_hw_breakpoint()
Peter Zijlstra (1):
powerpc/mm: Make hpte_need_flush() safe for preemption
arch/powerpc/include/asm/machdep.h | 6 ++++++
arch/powerpc/kernel/machine_kexec.c | 5 ++++-
arch/powerpc/kernel/process.c | 8 +++++---
arch/powerpc/mm/tlb_hash64.c | 6 +++---
4 files changed, 18 insertions(+), 7 deletions(-)
^ permalink raw reply
* [PATCH] RTC driver(Linux) for PT7C4338 chip.
From: Priyanka Jain @ 2011-03-02 4:12 UTC (permalink / raw)
To: linuxppc-dev, rtc-linux; +Cc: a.zummo, akpm, Priyanka Jain, p_gortmaker
PT7C4338 chip is being manufactured by Pericom Technology Inc.
It is a serial real-time clock which provides:
1)Low-power clock/calendar.
2)Programmable square-wave output.
It has 56 bytes of nonvolatile RAM.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
---
PT7C4338 RTC driver is verified on Freescale P1010RDB.
Please pick this patch for 2.6.39
drivers/rtc/Kconfig | 9 ++
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-pt7c4338.c | 215 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 225 insertions(+), 0 deletions(-)
create mode 100644 drivers/rtc/rtc-pt7c4338.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 10ba12c..6ff0901 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -324,6 +324,15 @@ config RTC_DRV_RX8025
This driver can also be built as a module. If so, the module
will be called rtc-rx8025.
+config RTC_DRV_PT7C4338
+ tristate "Pericom Technology Inc. PT7C4338 RTC"
+ help
+ If you say yes here you get support for the Pericom Technology
+ Inc. PT7C4338 RTC chip.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-pt7c4338.
+
endif # I2C
comment "SPI RTC drivers"
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 5adbba7..4014607 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o
obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o
obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o
obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o
+obj-$(CONFIG_RTC_DRV_PT7C4338) += rtc-pt7c4338.o
obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o
obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o
obj-$(CONFIG_RTC_DRV_RP5C01) += rtc-rp5c01.o
diff --git a/drivers/rtc/rtc-pt7c4338.c b/drivers/rtc/rtc-pt7c4338.c
new file mode 100644
index 0000000..fca52cd
--- /dev/null
+++ b/drivers/rtc/rtc-pt7c4338.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file provides Date & Time support (no alarms) for PT7C4338 chip.
+ *
+ * This file is based on drivers/rtc/rtc-ds1307.c
+ *
+ * PT7C4338 chip is manufactured by Pericom Technology Inc.
+ * It is a serial real-time clock which provides
+ * 1)Low-power clock/calendar.
+ * 2)Programmable square-wave output.
+ * It has 56 bytes of nonvolatile RAM.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/rtc.h>
+#include <linux/bcd.h>
+
+/* RTC register addresses */
+#define PT7C4338_REG_SECONDS 0x00
+#define PT7C4338_REG_MINUTES 0x01
+#define PT7C4338_REG_HOURS 0x02
+#define PT7C4338_REG_AMPM 0x02
+#define PT7C4338_REG_DAY 0x03
+#define PT7C4338_REG_DATE 0x04
+#define PT7C4338_REG_MONTH 0x05
+#define PT7C4338_REG_YEAR 0x06
+#define PT7C4338_REG_CTRL_STAT 0x07
+
+/* RTC second register address bit */
+#define PT7C4338_SEC_BIT_CH 0x80 /*Clock Halt (in Register 0)*/
+
+/* RTC control and status register bits */
+#define PT7C4338_CTRL_STAT_BIT_RS0 0x1 /*Rate select 0*/
+#define PT7C4338_CTRL_STAT_BIT_RS1 0x2 /*Rate select 1*/
+#define PT7C4338_CTRL_STAT_BIT_SQWE 0x10 /*Square Wave Enable*/
+#define PT7C4338_CTRL_STAT_BIT_OSF 0x20 /*Oscillator Stop Flag*/
+#define PT7C4338_CTRL_STAT_BIT_OUT 0x80 /*Output Level Control*/
+
+static const struct i2c_device_id pt7c4338_id[] = {
+ { "pt7c4338", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, pt7c4338_id);
+
+struct pt7c4338{
+ struct i2c_client *client;
+ struct rtc_device *rtc;
+};
+
+static int pt7c4338_read_time(struct device *dev, struct rtc_time *time)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ int ret;
+ u8 buf[7];
+ u8 year, month, day, hour, minute, second;
+ u8 week, twelve_hr, am_pm;
+
+ ret = i2c_smbus_read_i2c_block_data(client,
+ PT7C4338_REG_SECONDS, 7, buf);
+ if (ret < 0)
+ return ret;
+ if (ret < 7)
+ return -EIO;
+
+ second = buf[0];
+ minute = buf[1];
+ hour = buf[2];
+ week = buf[3];
+ day = buf[4];
+ month = buf[5];
+ year = buf[6];
+
+ /* Extract additional information for AM/PM */
+ twelve_hr = hour & 0x40;
+ am_pm = hour & 0x20;
+
+ /* Write to rtc_time structure */
+ time->tm_sec = bcd2bin(second & 0x7f);
+ time->tm_min = bcd2bin(minute & 0x7f);
+ if (twelve_hr) {
+ /* Convert to 24 hr */
+ if (am_pm)
+ time->tm_hour = bcd2bin(hour & 0x10) + 12;
+ else
+ time->tm_hour = bcd2bin(hour & 0xBF);
+ } else {
+ time->tm_hour = bcd2bin(hour);
+ }
+
+ time->tm_wday = bcd2bin(week & 0x07) - 1;
+ time->tm_mday = bcd2bin(day & 0x3f);
+ time->tm_mon = bcd2bin(month & 0x1F) - 1;
+ /* assume 20YY not 19YY */
+ time->tm_year = bcd2bin(year) + 100;
+
+ return 0;
+}
+
+static int pt7c4338_set_time(struct device *dev, struct rtc_time *time)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ u8 buf[7];
+
+ /* Extract time from rtc_time and load into pt7c4338*/
+ buf[0] = bin2bcd(time->tm_sec);
+ buf[1] = bin2bcd(time->tm_min);
+ buf[2] = bin2bcd(time->tm_hour);
+ buf[3] = bin2bcd(time->tm_wday + 1); /* Day of the week */
+ buf[4] = bin2bcd(time->tm_mday); /* Date */
+ buf[5] = bin2bcd(time->tm_mon + 1);
+
+ /* assume 20YY not 19YY */
+ if (time->tm_year >= 100)
+ buf[6] = bin2bcd(time->tm_year - 100);
+ else
+ buf[6] = bin2bcd(time->tm_year);
+
+ return i2c_smbus_write_i2c_block_data(client,
+ PT7C4338_REG_SECONDS, 7, buf);
+}
+
+static const struct rtc_class_ops pt7c4338_rtc_ops = {
+ .read_time = pt7c4338_read_time,
+ .set_time = pt7c4338_set_time,
+};
+
+static int pt7c4338_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct pt7c4338 *pt7c4338;
+ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ int ret;
+
+ pt7c4338 = kzalloc(sizeof(struct pt7c4338), GFP_KERNEL);
+ if (!pt7c4338)
+ return -ENOMEM;
+
+ pt7c4338->client = client;
+ i2c_set_clientdata(client, pt7c4338);
+ pt7c4338->rtc = rtc_device_register(client->name, &client->dev,
+ &pt7c4338_rtc_ops, THIS_MODULE);
+ if (IS_ERR(pt7c4338->rtc)) {
+ ret = PTR_ERR(pt7c4338->rtc);
+ dev_err(&client->dev, "unable to register the class device\n");
+ goto out_free;
+ }
+
+ return 0;
+out_free:
+ i2c_set_clientdata(client, NULL);
+ kfree(pt7c4338);
+ return ret;
+}
+
+static int __devexit pt7c4338_remove(struct i2c_client *client)
+{
+ struct pt7c4338 *pt7c4338 = i2c_get_clientdata(client);
+
+ rtc_device_unregister(pt7c4338->rtc);
+ i2c_set_clientdata(client, NULL);
+ kfree(pt7c4338);
+ return 0;
+}
+
+static struct i2c_driver pt7c4338_driver = {
+ .driver = {
+ .name = "rtc-pt7c4338",
+ .owner = THIS_MODULE,
+ },
+ .probe = pt7c4338_probe,
+ .remove = __devexit_p(pt7c4338_remove),
+ .id_table = pt7c4338_id,
+};
+
+static int __init pt7c4338_init(void)
+{
+ return i2c_add_driver(&pt7c4338_driver);
+}
+
+static void __exit pt7c4338_exit(void)
+{
+ i2c_del_driver(&pt7c4338_driver);
+}
+
+module_init(pt7c4338_init);
+module_exit(pt7c4338_exit);
+
+MODULE_AUTHOR("Priyanka Jain <Priyanka.Jain@freescale.com>");
+MODULE_DESCRIPTION("pericom Technology Inc. PT7C4338 RTC Driver");
+MODULE_LICENSE("GPL");
--
1.6.5.6
^ permalink raw reply related
* Re: [PATCH V2 1/6] powerpc: Move udbg_early_init() after early_init_devtree()
From: Benjamin Herrenschmidt @ 2011-03-02 3:37 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <20110207082934.GA28943@yookeroo>
On Mon, 2011-02-07 at 19:29 +1100, David Gibson wrote:
> On Wed, Feb 02, 2011 at 06:00:25PM -0600, Dave Kleikamp wrote:
> > On Thu, 2011-02-03 at 10:06 +1100, David Gibson wrote:
> > > On Tue, Feb 01, 2011 at 12:48:41PM -0600, Dave Kleikamp wrote:
> > > > so that it can use information from the device tree.
> > >
> > > Hrm. On the other hand this means that the early_init_devtree() code
> > > can't benefit from hardcoded early debugging. Since you don't
> > > actually appear to use devtree information in udbg_early_init() in the
> > > latest series, I'd suggest dropping this patch.
> >
> > Patch 2 depends on early_init_devtree() being run. Until then, I don't
> > know of a way to get at the bootargs.
>
> Ah, yes. Drat.
Doesn't matter. _Early_ debug has (or should have) the address in
the .config file anyways, so it really shouldn't have to care about the
arguments.
So I'll drop this patch.
There are plenty of reasons why we want to be able to use the early
debug stuff to debug what's happening inside early_init_devtree() :-)
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH][v2] driver/FSL SATA:Fix wrong Device Error Register usage
From: Benjamin Herrenschmidt @ 2011-03-02 3:25 UTC (permalink / raw)
To: Prabhakar Kushwaha; +Cc: meet2prabhu, B00888, linuxppc-dev
In-Reply-To: <1298282264-1222-1-git-send-email-prabhakar@freescale.com>
On Mon, 2011-02-21 at 15:27 +0530, Prabhakar Kushwaha wrote:
> When a single device error is detected, the device under the error is indicated
> by the error bit set in the DER. There is a one to one mapping between register
> bit and devices on Port multiplier(PMP) i.e. bit 0 represents PMP device 0 and
> bit 1 represents PMP device 1 etc.
It might help to send those patches to the linux-ide mailing list and
appropriate libata maintainers in addition to CC'ing linuxppc-dev.
Cheers,
Ben.
> Current implementation treats Device error register value as device number not
> set of bits representing multiple device on PMP. It is changed to consider bit
> level.
> No need to check for each set bit as all command is going to be aborted.
>
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> Signed-off-by: Ashish Kalra <B00888@freescale.com>
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git (branch master)
>
> Changes for v1: Incorporated David Laight's comment
> - Single usage of ffs()
>
> Changes for v2: Incorporated David Laight's comment
> - Changed type of dev_num to unsigned
>
> drivers/ata/sata_fsl.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
> index b0214d0..895771c 100644
> --- a/drivers/ata/sata_fsl.c
> +++ b/drivers/ata/sata_fsl.c
> @@ -1040,12 +1040,14 @@ static void sata_fsl_error_intr(struct ata_port *ap)
>
> /* find out the offending link and qc */
> if (ap->nr_pmp_links) {
> + unsigned int dev_num;
> dereg = ioread32(hcr_base + DE);
> iowrite32(dereg, hcr_base + DE);
> iowrite32(cereg, hcr_base + CE);
>
> - if (dereg < ap->nr_pmp_links) {
> - link = &ap->pmp_link[dereg];
> + dev_num = ffs(dereg)-1;
> + if (dev_num < ap->nr_pmp_links) {
> + link = &ap->pmp_link[dev_num];
> ehi = &link->eh_info;
> qc = ata_qc_from_tag(ap, link->active_tag);
> /*
^ permalink raw reply
* Re: [PATCH v4 2/2] powerpc: make MPIC honor the "pic-no-reset" device tree property
From: Benjamin Herrenschmidt @ 2011-03-02 3:22 UTC (permalink / raw)
To: Meador Inge; +Cc: Hollis Blanchard, devicetree-discuss, linuxppc-dev
In-Reply-To: <1298671177-19572-3-git-send-email-meador_inge@mentor.com>
> diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
> index e000cce..7e1be12 100644
> --- a/arch/powerpc/include/asm/mpic.h
> +++ b/arch/powerpc/include/asm/mpic.h
> @@ -325,6 +325,8 @@ struct mpic
> #ifdef CONFIG_PM
> struct mpic_irq_save *save_data;
> #endif
> +
> + int cpu;
> };
Why ? The MPIC isn't specifically associated with a CPU and whatever we
pick as default during boot isn't relevant later on, so I don't see why
we should have global permanent state here.
>
> +static inline void mpic_init_vector(struct mpic *mpic, int source)
> +{
> + /* start with vector = source number, and masked */
> + u32 vecpri = MPIC_VECPRI_MASK | source | (8 << MPIC_VECPRI_PRIORITY_SHIFT);
> +
> + /* init hw */
> + mpic_irq_write(source, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
> + mpic_irq_write(source, MPIC_INFO(IRQ_DESTINATION), 1 << mpic->cpu);
> +}
Just pass the CPU as an argument... but better... just don't do that,
put the code back where it was and ... see below :-)
> /* Check if we have one of those nice broken MPICs with a flipped endian on
> @@ -622,6 +631,14 @@ static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq)
> return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]);
> }
>
> +/* Determine if the linux irq is a timer interrupt */
> +static unsigned int mpic_is_timer_interrupt(struct mpic *mpic, unsigned int irq)
> +{
> + unsigned int src = mpic_irq_to_hw(irq);
> +
> + return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[3]);
> +}
> +
>
> /* Convert a cpu mask from logical to physical cpu numbers. */
> static inline u32 mpic_physmask(u32 cpumask)
> @@ -967,6 +984,15 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
> if (hw >= mpic->irq_count)
> return -EINVAL;
>
> + /* If the MPIC was reset, then all vectors have already been
> + * initialized. Otherwise, the appropriate vector needs to be
> + * initialized here to ensure that only used sources are setup with
> + * a vector.
> + */
> + if (mpic->flags & MPIC_NO_RESET)
> + if (!(mpic_is_ipi(mpic, hw) || mpic_is_timer_interrupt(mpic, hw)))
> + mpic_init_vector(mpic, hw);
> +
The above isn't useful. Of those two registers you want to initialize,
afaik, one (the destination) will be initialized by the core calling
into set_affinity when the interrupt is requested, and the other one is
partially initialized in set_type, I'd say just modify set_type to
initialize the source as well, and problem solved, no ? Or is there a
chance that the interrupt was left unmasked ? I think it would be kosher
to mask it in set_type unconditionally, I don't think it's ever supposed
to be called for an enabled interrupt.
> mpic_msi_reserve_hwirq(mpic, hw);
>
> /* Default chip */
> @@ -1033,6 +1059,11 @@ static struct irq_host_ops mpic_host_ops = {
> .xlate = mpic_host_xlate,
> };
>
> +static int mpic_reset_prohibited(struct device_node *node)
> +{
> + return node && of_get_property(node, "pic-no-reset", NULL);
> +}
> +
> /*
> * Exported functions
> */
> @@ -1153,7 +1184,16 @@ struct mpic * __init mpic_alloc(struct device_node *node,
> mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
>
> /* Reset */
> - if (flags & MPIC_WANTS_RESET) {
> +
> + /* When using a device-node, reset requests are only honored if the MPIC
> + * is allowed to reset.
> + */
> + if (mpic_reset_prohibited(node)) {
> + mpic->flags |= MPIC_NO_RESET;
> + }
No { } for single line nested statements
> + if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) {
> + printk(KERN_DEBUG "mpic: Resetting\n");
> mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
> mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
> | MPIC_GREG_GCONF_RESET);
> @@ -1270,7 +1310,6 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
> void __init mpic_init(struct mpic *mpic)
> {
> int i;
> - int cpu;
>
> BUG_ON(mpic->num_sources == 0);
>
> @@ -1314,21 +1353,17 @@ void __init mpic_init(struct mpic *mpic)
> mpic_pasemi_msi_init(mpic);
>
> if (mpic->flags & MPIC_PRIMARY)
> - cpu = hard_smp_processor_id();
> + mpic->cpu = hard_smp_processor_id();
> else
> - cpu = 0;
> + mpic->cpu = 0;
Get rid of all that.
> - for (i = 0; i < mpic->num_sources; i++) {
> - /* start with vector = source number, and masked */
> - u32 vecpri = MPIC_VECPRI_MASK | i |
> - (8 << MPIC_VECPRI_PRIORITY_SHIFT);
> -
> - /* check if protected */
> - if (mpic->protected && test_bit(i, mpic->protected))
> - continue;
> - /* init hw */
> - mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
> - mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu);
> + if (!(mpic->flags & MPIC_NO_RESET)) {
> + for (i = 0; i < mpic->num_sources; i++) {
> + /* check if protected */
> + if (mpic->protected && test_bit(i, mpic->protected))
> + continue;
> + mpic_init_vector(mpic, i);
> + }
> }
>
> /* Init spurious vector */
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc/ptrace: remove BUG_ON when full register set not available
From: Benjamin Herrenschmidt @ 2011-03-02 3:08 UTC (permalink / raw)
To: mjw; +Cc: linuxppc-dev, mikey, anton
In-Reply-To: <1299011204.28753.8.camel@w500>
> --- ptracev2.orig/include/linux/regset.h 2011-02-20 12:15:57.000000000 -0600
> +++ ptracev2/include/linux/regset.h 2011-02-28 13:33:36.685302349 -0600
> @@ -240,6 +240,34 @@ static inline int user_regset_copyout(un
> }
> return 0;
> }
> +/* want the count to be the registers 14-31 inclusive */
> +#define POISON_REG_CNT (PT_R31-PT_R14+1)
> +static inline int user_regset_copyout_poison(unsigned int *pos,
> + unsigned int *count,
> + void **kbuf, void __user **ubuf,
> + const int start_pos,
> + const int end_pos)
> +{
I wouldn't put that in a generic location... especially something
like POISON_REG_CNT is very specific to powerpc and our ABI.
.../...
> static inline int user_regset_copyin(unsigned int *pos, unsigned int *count,
> const void **kbuf,
> --- ptracev2.orig/arch/powerpc/kernel/ptrace.c 2011-02-20 12:15:57.000000000 -0600
> +++ ptracev2/arch/powerpc/kernel/ptrace.c 2011-03-01 13:49:12.686354353 -0600
> @@ -234,11 +234,29 @@ static int gpr_get(struct task_struct *t
> if (target->thread.regs == NULL)
> return -EIO;
>
> - CHECK_FULL_REGS(target->thread.regs);
Wouldn't it be a simpler/cleaner approach to use a single function call
here that checks if the reg set is full and if not, put poison values
in the thread.regs structure itself ?
The resulting code would be more palatable...
Cheers,
Ben.
> - ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> - target->thread.regs,
> - 0, offsetof(struct pt_regs, msr));
> + if (!FULL_REGS(target->thread.regs)) {
> + /* Don't have the full register set. Copy out register r0-r13 */
> + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> + target->thread.regs,
> + 0, sizeof(long)*PT_R14);
> +
> + /* Dont want to change the actual register values so rather than read the */
> + /* actual register copy a poison value into the buffer instead */
> + if (!ret)
> + ret = user_regset_copyout_poison(&pos, &count, &kbuf, &ubuf,
> + sizeof(long)*PT_R14, offsetof(struct pt_regs, nip));
> +
> + /* Copy out the rest of the registers as usual */
> + if (!ret)
> + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> + target->thread.regs,
> + offsetof(struct pt_regs, nip), offsetof(struct pt_regs, msr));
> +
> + } else
> + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> + target->thread.regs,
> + 0, offsetof(struct pt_regs, msr));
> if (!ret) {
> unsigned long msr = get_user_msr(target);
> ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
> @@ -645,11 +663,29 @@ static int gpr32_get(struct task_struct
> if (target->thread.regs == NULL)
> return -EIO;
>
> - CHECK_FULL_REGS(target->thread.regs);
> -
> pos /= sizeof(reg);
> count /= sizeof(reg);
>
> + if(!FULL_REGS(target->thread.regs)) {
> + if (kbuf) {
> + /* Don't have the full register set. Copy out register r0-r13 */
> + for (; count > 0 && pos < PT_R14; --count)
> + *k++ = regs[pos++];
> +
> + /* Dont want to change the actual register values so rather than read the */
> + /* actual register copy a poison value into the buffer instead */
> + for (; count > 0 && pos <= PT_R31; --count,pos++)
> + *k++ = 0xdeadbeef;
> +
> + } else {
> + for (; count > 0 && pos < PT_R14; --count)
> + if (__put_user((compat_ulong_t) regs[pos++], u++))
> + return -EFAULT;
> + for (; count > 0 && pos <= PT_R31; --count,pos++)
> + if (__put_user((compat_ulong_t) 0xdeadbeef, u++))
> + return -EFAULT;
> + }
> + }
> if (kbuf)
> for (; count > 0 && pos < PT_MSR; --count)
> *k++ = regs[pos++];
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* [PATCH] powerpc/ptrace: remove BUG_ON when full register set not available
From: Michael Wolf @ 2011-03-01 20:26 UTC (permalink / raw)
To: linuxppc-dev; +Cc: mikey, anton
In some cases during a threaded core dump not all
the threads will have a full register set. This
will cause problems when the sigkill is sent to
the thread. To solve this problem a poison value
(0xdeadbeef) will be placed in the buffer in place
of the actual register values. This will affect
gpr14 to gpr31.
Signed-off-by: Mike Wolf <mjw@linux.vnet.ibm.com>
----------
--- ptracev2.orig/include/linux/regset.h 2011-02-20 12:15:57.000000000 -0600
+++ ptracev2/include/linux/regset.h 2011-02-28 13:33:36.685302349 -0600
@@ -240,6 +240,34 @@ static inline int user_regset_copyout(un
}
return 0;
}
+/* want the count to be the registers 14-31 inclusive */
+#define POISON_REG_CNT (PT_R31-PT_R14+1)
+static inline int user_regset_copyout_poison(unsigned int *pos,
+ unsigned int *count,
+ void **kbuf, void __user **ubuf,
+ const int start_pos,
+ const int end_pos)
+{
+ long poison_data[POISON_REG_CNT] = { [0 ... POISON_REG_CNT-1] = 0xdeadbeefdeadbeefUL };
+
+ if (*count == 0)
+ return 0;
+ BUG_ON(*pos < start_pos);
+ if (end_pos < 0 || *pos < end_pos) {
+ unsigned int copy = (end_pos < 0 ? *count
+ : min(*count, end_pos - *pos));
+ if (*kbuf) {
+ memset(*kbuf, 0xdeadbeef, copy);
+ *kbuf += copy;
+ } else if (__copy_to_user(*ubuf,poison_data, copy))
+ return -EFAULT;
+ else
+ *ubuf += copy;
+ *pos += copy;
+ *count -= copy;
+ }
+ return 0;
+}
static inline int user_regset_copyin(unsigned int *pos, unsigned int *count,
const void **kbuf,
--- ptracev2.orig/arch/powerpc/kernel/ptrace.c 2011-02-20 12:15:57.000000000 -0600
+++ ptracev2/arch/powerpc/kernel/ptrace.c 2011-03-01 13:49:12.686354353 -0600
@@ -234,11 +234,29 @@ static int gpr_get(struct task_struct *t
if (target->thread.regs == NULL)
return -EIO;
- CHECK_FULL_REGS(target->thread.regs);
- ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
- target->thread.regs,
- 0, offsetof(struct pt_regs, msr));
+ if (!FULL_REGS(target->thread.regs)) {
+ /* Don't have the full register set. Copy out register r0-r13 */
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ target->thread.regs,
+ 0, sizeof(long)*PT_R14);
+
+ /* Dont want to change the actual register values so rather than read the */
+ /* actual register copy a poison value into the buffer instead */
+ if (!ret)
+ ret = user_regset_copyout_poison(&pos, &count, &kbuf, &ubuf,
+ sizeof(long)*PT_R14, offsetof(struct pt_regs, nip));
+
+ /* Copy out the rest of the registers as usual */
+ if (!ret)
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ target->thread.regs,
+ offsetof(struct pt_regs, nip), offsetof(struct pt_regs, msr));
+
+ } else
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ target->thread.regs,
+ 0, offsetof(struct pt_regs, msr));
if (!ret) {
unsigned long msr = get_user_msr(target);
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
@@ -645,11 +663,29 @@ static int gpr32_get(struct task_struct
if (target->thread.regs == NULL)
return -EIO;
- CHECK_FULL_REGS(target->thread.regs);
-
pos /= sizeof(reg);
count /= sizeof(reg);
+ if(!FULL_REGS(target->thread.regs)) {
+ if (kbuf) {
+ /* Don't have the full register set. Copy out register r0-r13 */
+ for (; count > 0 && pos < PT_R14; --count)
+ *k++ = regs[pos++];
+
+ /* Dont want to change the actual register values so rather than read the */
+ /* actual register copy a poison value into the buffer instead */
+ for (; count > 0 && pos <= PT_R31; --count,pos++)
+ *k++ = 0xdeadbeef;
+
+ } else {
+ for (; count > 0 && pos < PT_R14; --count)
+ if (__put_user((compat_ulong_t) regs[pos++], u++))
+ return -EFAULT;
+ for (; count > 0 && pos <= PT_R31; --count,pos++)
+ if (__put_user((compat_ulong_t) 0xdeadbeef, u++))
+ return -EFAULT;
+ }
+ }
if (kbuf)
for (; count > 0 && pos < PT_MSR; --count)
*k++ = regs[pos++];
^ permalink raw reply
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Ira W. Snyder @ 2011-03-01 19:52 UTC (permalink / raw)
To: Felix Radensky, linuxppc-dev@ozlabs.org
In-Reply-To: <20110301165515.GA23403@ovro.caltech.edu>
On Tue, Mar 01, 2011 at 08:55:15AM -0800, Ira W. Snyder wrote:
[ big snip ]
>
> Thanks, this is exactly what I was going to ask for next. :)
>
> I really don't understand why the P2020 DMA controller isn't behaving
> nicely after my patches.
>
> Can you run a git bisect to figure out which patch in the series causes
> the problems. It should take three or four build + test cycles to narrow
> down which patch breaks the driver. When it is finished, send me the
> output of git bisect.
>
> Like this (assuming you have two branches: master and
> fsldma, where fsldma is master + my patches):
>
> # setup the bisect
> git bisect start
> git bisect bad fsldma
> git bisect good master
>
> # build and test the kernel using the same test as before:
> modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
>
> # if the test passes:
> git bisect good
>
> # if the test fails:
> git bisect bad
>
> # now build + test again, then mark that good or bad. Repeat until
> # finished.
>
>
> I really appreciate your help in testing this. You've been great at
> providing everything I've asked for.
>
I'd still like the bisect if you have a chance. I've re-reviewed the
patch series, and found the places that change register writes to the
controller.
The patch below changes the register operations back to the original
order. It doesn't make any sense why this would be required, but it is
worth a quick try.
I've added an "XXX" mark where you can comment out a single line if this
patch fails. It is highly unlikely to make any difference, but I'm
really having a hard time understanding what is wrong.
Ira
>From 9e479ce27f8c1819694d7082bb4a27772b4baf52 Mon Sep 17 00:00:00 2001
From: Ira W. Snyder <iws@ovro.caltech.edu>
Date: Tue, 1 Mar 2011 11:43:00 -0800
Subject: [PATCH] fsldma: try and fix 85xx DMA controller
This is just a random guess at what might be wrong. The datasheet
doesn't say that a completed transfer must be aborted before starting a
new transfer (nor does it make much sense). However, the old code did it
anyway.
NOT AT ALL Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
---
drivers/dma/fsldma.c | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index e4d9d17..d8eedbc 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -213,6 +213,7 @@ static void dma_halt(struct fsldma_chan *chan)
int i;
mode = DMA_IN(chan, &chan->regs->mr, 32);
+ dev_dbg(chan->dev, "%s: dma_halt mode=0x%.8x\n", chan->name, mode);
mode |= FSL_DMA_MR_CA;
DMA_OUT(chan, &chan->regs->mr, mode, 32);
@@ -921,10 +922,24 @@ static void fsl_chan_xfer_ld_queue(struct fsldma_chan *chan)
list_splice_tail_init(&chan->ld_pending, &chan->ld_running);
/*
+ * XXX: Guess at problems
+ *
+ * The 85xx requires that you run this routine before you try to start
+ * the next DMA for an as yet unknown reason. Maybe.
+ */
+ if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) {
+ dev_dbg(chan->dev, "%s: 85xx, running workaround\n", name);
+ dma_halt(chan);
+ }
+
+ /*
* Program the descriptor's address into the DMA controller,
* then start the DMA transaction
*/
set_cdar(chan, desc->async_tx.phys);
+
+
+ /* XXX: if that doesn't work, comment the "get_cdar()" line below */
get_cdar(chan);
dma_start(chan);
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Ira W. Snyder @ 2011-03-01 16:55 UTC (permalink / raw)
To: Felix Radensky; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4D6C89A7.8010803@embedded-sol.com>
On Tue, Mar 01, 2011 at 07:52:39AM +0200, Felix Radensky wrote:
> Hi Ira,
>
> On 03/01/2011 02:21 AM, Ira W. Snyder wrote:
> > On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
> >> Hi Ira,
> >>
> >> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
> >>> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
> >>>> Hi Ira,
> >>>>
> >>>>> Thank you very much Felix. The dmesg output shows that the controller
> >>>>> never got an interrupt for the second transaction. The patch below has
> >>>>> extra debugging information that may help determine why this happens.
> >>>>> Please apply it and re-run the test.
> >>>>>
> >>>>> The last section of dmesg (after "Freeing unused kernel memory") is all
> >>>>> I need.
> >>>>>
> >>>> Attached relevant dmesg portion.
> >>>>
> >>> Ok, try this patch on top of the last one.
> >>>
> >>> It looks like you used the dmatest module in multi-channel mode last
> >>> time. One channel makes it easier to debug:
> >>>
> >>> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
> >>>
> >>> Thanks for your help in debugging this. Hopefully this is the last
> >>> patch to test. :)
> >>>
> >>> Ira
> >>>
> >> Looks like this was not the last one. The test still fails, see below
> >>
> > From this log, it looks like the DMA controller is not generating an
> > interrupt after the second chain is started. The first chain is finished
> > before the second thread runs and starts its chain.
> >
> > The end-of-segments interrupt is completely missing. The part is not
> > behaving as the datasheet explains it should. Are you sure you applied
> > the patch and rebuilt the kernel? (Just checking to be sure. I'm very
> > appreciative of the amount of help you've given me debugging this!)
> >
> > Can you run this for me:
> >
> > modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
> >
> > Thanks again,
> > Ira
>
> Without your patches applied the output of the test above looks
> like this:
>
Thanks, this is exactly what I was going to ask for next. :)
I really don't understand why the P2020 DMA controller isn't behaving
nicely after my patches.
Can you run a git bisect to figure out which patch in the series causes
the problems. It should take three or four build + test cycles to narrow
down which patch breaks the driver. When it is finished, send me the
output of git bisect.
Like this (assuming you have two branches: master and
fsldma, where fsldma is master + my patches):
# setup the bisect
git bisect start
git bisect bad fsldma
git bisect good master
# build and test the kernel using the same test as before:
modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
# if the test passes:
git bisect good
# if the test fails:
git bisect bad
# now build + test again, then mark that good or bad. Repeat until
# finished.
I really appreciate your help in testing this. You've been great at
providing everything I've asked for.
Thanks,
Ira
^ permalink raw reply
* Zero-copy sockets
From: Guillaume Dargaud @ 2011-03-01 14:32 UTC (permalink / raw)
To: linuxppc-dev
Hello all,
I cannot find the option SO_SND_COPYAVOID in socket.h...
Is there another way to do zero-copy network transfers ?
I'm using the 2.6.35 xilinx patched-kernel.
Thanks
--
Guillaume Dargaud
http://www.gdargaud.net/Photo/
^ permalink raw reply
* [PATCH] powerpc: Add pgprot_writecombine
From: Anton Blanchard @ 2011-03-01 6:00 UTC (permalink / raw)
To: benh, linuxppc-dev
A number of drivers are using pgprot_writecombine() to enable write
combining on userspace mappings. Implement it on powerpc.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 89f1587..88b0bd9 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -170,6 +170,7 @@ extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addre
#define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
_PAGE_COHERENT | _PAGE_WRITETHRU))
+#define pgprot_writecombine pgprot_noncached_wc
struct file;
extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
^ permalink raw reply related
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Felix Radensky @ 2011-03-01 5:52 UTC (permalink / raw)
To: Ira W. Snyder; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <20110301002156.GC31428@ovro.caltech.edu>
Hi Ira,
On 03/01/2011 02:21 AM, Ira W. Snyder wrote:
> On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
>> Hi Ira,
>>
>> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
>>> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
>>>> Hi Ira,
>>>>
>>>>> Thank you very much Felix. The dmesg output shows that the controller
>>>>> never got an interrupt for the second transaction. The patch below has
>>>>> extra debugging information that may help determine why this happens.
>>>>> Please apply it and re-run the test.
>>>>>
>>>>> The last section of dmesg (after "Freeing unused kernel memory") is all
>>>>> I need.
>>>>>
>>>> Attached relevant dmesg portion.
>>>>
>>> Ok, try this patch on top of the last one.
>>>
>>> It looks like you used the dmatest module in multi-channel mode last
>>> time. One channel makes it easier to debug:
>>>
>>> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
>>>
>>> Thanks for your help in debugging this. Hopefully this is the last
>>> patch to test. :)
>>>
>>> Ira
>>>
>> Looks like this was not the last one. The test still fails, see below
>>
> From this log, it looks like the DMA controller is not generating an
> interrupt after the second chain is started. The first chain is finished
> before the second thread runs and starts its chain.
>
> The end-of-segments interrupt is completely missing. The part is not
> behaving as the datasheet explains it should. Are you sure you applied
> the patch and rebuilt the kernel? (Just checking to be sure. I'm very
> appreciative of the amount of help you've given me debugging this!)
>
> Can you run this for me:
>
> modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
>
> Thanks again,
> Ira
Without your patches applied the output of the test above looks
like this:
__dma_request_channel: success (dma0chan0)
dmatest: Started 1 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 1
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 1
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0xb90 dst_off=0x101c
len=0x2aea
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 2
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 2
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #1: No errors with src_off=0x74a dst_off=0x54d len=0x35f5
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 3
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 3
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #2: No errors with src_off=0x2ad dst_off=0x557 len=0x35e1
of:fsl-elo-dma ffe0c300.dma: irq: channel 0, stat = 0xa
of:fsl-elo-dma ffe0c300.dma: irq: End-of-segments INT
of:fsl-elo-dma ffe0c300.dma: irq: clndar 0x2f34d000, nlndar 0x100000000
of:fsl-elo-dma ffe0c300.dma: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: no pending LDs
of:fsl-elo-dma ffe0c300.dma: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 4
of:fsl-elo-dma ffe0c300.dma: LD ef34d000 callback
of:fsl-elo-dma ffe0c300.dma: chan completed_cookie = 4
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #3: No errors with src_off=0x0 dst_off=0x0 len=0x4000
dma0chan0-copy0: terminating after 4 tests, 0 failures (status 0)
Felix.
^ permalink raw reply
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Felix Radensky @ 2011-03-01 5:46 UTC (permalink / raw)
To: Ira W. Snyder; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <20110301002156.GC31428@ovro.caltech.edu>
Hi Ira,
On 03/01/2011 02:21 AM, Ira W. Snyder wrote:
> On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
>> Hi Ira,
>>
>> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
>>> On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
>>>> Hi Ira,
>>>>
>>>>> Thank you very much Felix. The dmesg output shows that the controller
>>>>> never got an interrupt for the second transaction. The patch below has
>>>>> extra debugging information that may help determine why this happens.
>>>>> Please apply it and re-run the test.
>>>>>
>>>>> The last section of dmesg (after "Freeing unused kernel memory") is all
>>>>> I need.
>>>>>
>>>> Attached relevant dmesg portion.
>>>>
>>> Ok, try this patch on top of the last one.
>>>
>>> It looks like you used the dmatest module in multi-channel mode last
>>> time. One channel makes it easier to debug:
>>>
>>> modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
>>>
>>> Thanks for your help in debugging this. Hopefully this is the last
>>> patch to test. :)
>>>
>>> Ira
>>>
>> Looks like this was not the last one. The test still fails, see below
>>
> From this log, it looks like the DMA controller is not generating an
> interrupt after the second chain is started. The first chain is finished
> before the second thread runs and starts its chain.
>
> The end-of-segments interrupt is completely missing. The part is not
> behaving as the datasheet explains it should. Are you sure you applied
> the patch and rebuilt the kernel? (Just checking to be sure. I'm very
> appreciative of the amount of help you've given me debugging this!)
I've double checked and I'm sure I've applied your patch and rebuilt
the kernel.
> Can you run this for me:
>
> modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
>
> Thanks again,
> Ira
See below.
__dma_request_channel: success (dma0chan0)
dmatest: Started 1 threads using dma0chan0
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7000 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a70c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a71e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a72a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7360 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a73c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7420 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7480 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a74e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=0
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=14
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
of:fsl-elo-dma ffe0c300.dma: chan0: irq: stat = 0x8
of:fsl-elo-dma ffe0c300.dma: chan0: irq: End-of-link INT
of:fsl-elo-dma ffe0c300.dma: chan0: irq: Exit
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet entry
of:fsl-elo-dma ffe0c300.dma: chan0: completed_cookie=14
of:fsl-elo-dma ffe0c300.dma: chan0: no pending LDs
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7000 callback
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7000 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7060 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a70c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7120 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7180 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a71e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7240 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a72a0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7300 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7360 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a73c0 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7420 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7480 free
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a74e0 free
of:fsl-elo-dma ffe0c300.dma: chan0: tasklet exit
dma0chan0-copy0: verifying source buffer...
dma0chan0-copy0: verifying dest buffer...
dma0chan0-copy0: #0: No errors with src_off=0x43e dst_off=0x3a5 len=0x3605
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a74e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7480 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=14
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=16
of:fsl-elo-dma ffe0c300.dma: chan0: idle, starting controller
dma0chan0-copy0: #1: test timed out
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7420 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a73c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7360 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7300 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=16
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=20
of:fsl-elo-dma ffe0c300.dma: chan0: DMA controller still busy
dma0chan0-copy0: #2: test timed out
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a72a0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7240 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a71e0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7180 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7120 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a70c0 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: LD ef3a7060 allocated
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: start=20
of:fsl-elo-dma ffe0c300.dma: chan0: assign cookies: end=27
of:fsl-elo-dma ffe0c300.dma: chan0: DMA controller still busy
dma0chan0-copy0: #3: test timed out
dma0chan0-copy0: terminating after 4 tests, 3 failures (status 0)
Felix.
^ permalink raw reply
* Re: [PATCH 0/8] fsldma: lockup fixes
From: Ira W. Snyder @ 2011-03-01 0:21 UTC (permalink / raw)
To: Felix Radensky; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4D6C134C.4070407@embedded-sol.com>
On Mon, Feb 28, 2011 at 11:27:40PM +0200, Felix Radensky wrote:
> Hi Ira,
>
> On 02/28/2011 11:11 PM, Ira W. Snyder wrote:
> > On Mon, Feb 28, 2011 at 10:15:49PM +0200, Felix Radensky wrote:
> >> Hi Ira,
> >>
> >>> Thank you very much Felix. The dmesg output shows that the controller
> >>> never got an interrupt for the second transaction. The patch below has
> >>> extra debugging information that may help determine why this happens.
> >>> Please apply it and re-run the test.
> >>>
> >>> The last section of dmesg (after "Freeing unused kernel memory") is all
> >>> I need.
> >>>
> >> Attached relevant dmesg portion.
> >>
> > Ok, try this patch on top of the last one.
> >
> > It looks like you used the dmatest module in multi-channel mode last
> > time. One channel makes it easier to debug:
> >
> > modprobe dmatest max_channels=1 threads_per_chan=2 iterations=1
> >
> > Thanks for your help in debugging this. Hopefully this is the last
> > patch to test. :)
> >
> > Ira
> >
>
> Looks like this was not the last one. The test still fails, see below
>
>From this log, it looks like the DMA controller is not generating an
interrupt after the second chain is started. The first chain is finished
before the second thread runs and starts its chain.
The end-of-segments interrupt is completely missing. The part is not
behaving as the datasheet explains it should. Are you sure you applied
the patch and rebuilt the kernel? (Just checking to be sure. I'm very
appreciative of the amount of help you've given me debugging this!)
Can you run this for me:
modprobe dmatest max_channels=1 threads_per_chan=1 iterations=4
Thanks again,
Ira
^ permalink raw reply
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