* Re: mmotm threatens ppc preemption again
From: Jeremy Fitzhardinge @ 2011-03-22 13:34 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Andrew Morton, Hugh Dickins, Peter Zijlstra
In-Reply-To: <1300747942.2402.262.camel@pasglop>
On 03/21/2011 10:52 PM, Benjamin Herrenschmidt wrote:
> On Mon, 2011-03-21 at 11:24 +0000, Jeremy Fitzhardinge wrote:
>> I'm very sorry about that, I didn't realize power was also using that
>> interface. Unfortunately, the "no preemption" definition was an error,
>> and had to be changed to match the pre-existing locking rules.
>>
>> Could you implement a similar "flush batched pte updates on context
>> switch" as x86?
> Well, we already do that for -rt & co.
>
> However, we have another issue which is the reason we used those
> lazy_mmu hooks to do our flushing.
>
> Our PTEs eventually get faulted into a hash table which is what the real
> MMU uses. We must never (ever) allow that hash table to contain a
> duplicate entry for a given virtual address.
>
> When we do a batch, we remove things from the linux PTE, and keep a
> reference in our batch structure, and only update the hash table at the
> end of the batch.
Wouldn't implicitly ending a batch on context switch get the same effect?
> That means that we must not allow a hash fault to populate the hash with
> a "new" PTE value prior to the old one having been flushed out (which is
> possible if they different in protection attributes for example). For
> that to happen, we must basically not allow a page fault to re-populate
> a PTE invalidated by a batch before that batch has completed.
Kernel ptes are not generally populated on fault though, unless there's
something in power? On x86 it can happen when syncing a process's
kernel pmd with the init_mm one, but that shouldn't happen in the middle
of an update since you'd deadlock anyway. If a particular kernel
subsystem has its own locks to manage the ptes for a kernel mapping,
then that should prevent any nested updates within a batch shouldn't it?
> That translates to batches must only happen within a PTE lock section.
Well, in that case, I guess your best bet is to disable batching for
kernel pagetable updates. These apply_to_page_range() changes are the
first time any attempt to batch kernel pagetable updates has been made
(otherwise you would have seen this problem earlier), so not batching
them will not be a regression for you.
But I'm not sure what the proper fix to get batching in your case will
be. But the assumption that there's a pte lock for kernel ptes is not
valid.
J
^ permalink raw reply
* (no subject)
From: segher @ 2011-03-23 7:41 UTC (permalink / raw)
To: linuxppc-dev
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^ permalink raw reply
* Re: [PATCH] crypto: caam - standardize device tree naming convention to utilize '-vX.Y'
From: Herbert Xu @ 2011-03-23 13:18 UTC (permalink / raw)
To: Kim Phillips
Cc: Kumar Gala, devicetree-discuss, linuxppc-dev, linux-crypto,
Steve Cornelius
In-Reply-To: <20110314174247.e5515448.kim.phillips@freescale.com>
On Mon, Mar 14, 2011 at 05:42:47PM -0500, Kim Phillips wrote:
> Help clarify that the number trailing in compatible nomenclature
> is the version number of the device, i.e., change:
>
> "fsl,p4080-sec4.0", "fsl,sec4.0";
>
> to:
>
> "fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
>
> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> Cc: Kumar Gala <kumar.gala@freescale.com>
> Cc: Steve Cornelius <sec@pobox.com>
Applied.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* Re: [PATCH] crypto: caam - de-CHIP-ify device tree compatibles
From: Herbert Xu @ 2011-03-23 13:24 UTC (permalink / raw)
To: Grant Likely
Cc: Steve Cornelius, devicetree-discuss, linux-crypto, Scott Wood,
linuxppc-dev, Kumar Gala
In-Reply-To: <20110316005951.GA18791@angua.secretlab.ca>
On Tue, Mar 15, 2011 at 06:59:51PM -0600, Grant Likely wrote:
> On Tue, Mar 15, 2011 at 04:52:20PM -0500, Kim Phillips wrote:
> > - all the integration parameters have been captured by the binding.
> > - the block name really uniquely identifies this hardware.
> >
> > Some advocate putting SoC names everywhere in case software needs
> > to work around some chip-specific bug, but more precise SoC
> > information already exists in SVR, and board information already
> > exists in the top-level device tree node.
> >
> > Note that sometimes the SoC name is a worse identifier than the
> > block version, as the block version can change between revisions
> > of the same SoC.
> >
> > As a matter of historical reference, neither SEC versions 2.x
> > nor 3.x (driven by talitos) ever needed CHIP references.
> >
> > Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
>
> <sigh> Very well. As long as some level of versioning is used on the
> compatible values, I guess I can live with it.
>
> Acked-off-by: Grant Likely <grant.likely@secretlab.ca>
Patch applied. Thanks!
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* mpc8250 kernel booting
From: suresh chandra @ 2011-03-23 20:44 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1.1: Type: text/plain, Size: 701 bytes --]
Hi All,
I am having a strange serial console issue while booting Linux 2.6.38 and
Linux 2.6.34.8
We are using customized board based on MPC8250 , Console on SCC 1 and root
file system on ramdisk.
We are using U-boot for loading Linux.
Soon after u-boot handles control over to kernel, nothing comes on serial
port until I hit <ENTER> key
Then once again kernel pauses at "NET:Registered protocol family 17" and
proceeds after hitting <ENTER> key.
One more time Kernel pauses at "Freeing unused kernel memory: 156k init"
until I hit <ENTER> key.
I attached serial capture for your reference.
I want my board to boot with out user intervention. Please help me in
finding a solution.
Thanks,
Suresh
[-- Attachment #1.2: Type: text/html, Size: 798 bytes --]
[-- Attachment #2: capture1.txt --]
[-- Type: text/plain, Size: 4815 bytes --]
U-Boot 2008.10 (Mar 22 2011 - 03:29:50)
MPC8250 Reset Status: External Soft, External Hard
MPC8250 Clock Configuration
- Bus-to-Core Mult 4x, VCO Div 2, 60x Bus Freq 25-75 , Core Freq 100-300
- dfbrg 0, corecnf 0x1a, busdf 3, cpmdf 1, plldf 0, pllmf 1, pcidf 3
- vco_out 266666664, scc_clk 66666666, brg_clk 66666666
- cpu_clk 266666664, cpm_clk 133333332, bus_clk 66666666
CPU: MPC8250 (HiP4 Rev 14, Mask C.0 5K25A) at 266.667 MHz
Board: Cornet IPGATE
DRAM: (60x:10COL) 128 MB
FLASH: 256 MB
In: serial
Out: serial
Err: serial
Net: FCC1 ETHERNET, FCC2 ETHERNET
Press any key to interrupt autoboot: 2 \b\b\b 1 \b\b\b 0
IPGATE=> boot
Using FCC1 ETHERNET device
TFTP from server 192.168.235.60; our IP address is 192.168.235.22
Filename 'uImage'.
Load address: 0x1000000
Loading: *\b#################################################################
###########################################
done
Bytes transferred = 1581380 (182144 hex)
Using FCC1 ETHERNET device
TFTP from server 192.168.235.60; our IP address is 192.168.235.22
Filename 'test'.
Load address: 0x2000000
Loading: *\b#################################################################
#################################################################
#################
done
Bytes transferred = 2148495 (20c88f hex)
Using FCC1 ETHERNET device
TFTP from server 192.168.235.60; our IP address is 192.168.235.22
Filename 'dtb'.
Load address: 0x3000000
Loading: *\b##
done
Bytes transferred = 20000 (4e20 hex)
## Booting kernel from Legacy Image at 01000000 ...
Image Name: Linux-2.6.34.8
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1581316 Bytes = 1.5 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 02000000 ...
Image Name: RAMDISK Image
Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
Data Size: 2148431 Bytes = 2 MB
Load Address: 05000000
Entry Point: 05000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 03000000
Booting using the fdt blob at 0x3000000
Uncompressing Kernel Image ... OK
Loading Ramdisk to 07d95000, end 07fa184f ... OK
Loading Device Tree to 007f8000, end 007ffe1f ... OK
<Have to press <ENTER> Serial console>
console [ttyCPM0] enabled, bootconsole disabled
\rMount-cache hash table entries: 512
\rNET: Registered protocol family 16
\rbio: create slab <bio-0> at 0
\rSwitching to clocksource timebase
\rNET: Registered protocol family 2
\rIP route cache hash table entries: 1024 (order: 0, 4096 bytes)
\rTCP established hash table entries: 4096 (order: 3, 32768 bytes)
\rTCP bind hash table entries: 4096 (order: 2, 16384 bytes)
\rTCP: Hash tables configured (established 4096 bind 4096)
\rTCP reno registered
\rUDP hash table entries: 256 (order: 0, 4096 bytes)
\rUDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
\rNET: Registered protocol family 1
\rRPC: Registered udp transport module.
\rRPC: Registered tcp transport module.
\rRPC: Registered tcp NFSv4.1 backchannel transport module.
\rTrying to unpack rootfs image as initramfs...
\rrootfs image is not initramfs (no cpio magic); looks like an initrd
\rFreeing initrd memory: 2098k freed
\rInstalling knfsd (copyright (C) 1996 okir@monad.swb.de).
\rmsgmni has been set to 247
\ralg: No test for stdrng (krng)
\rBlock layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
\rio scheduler noop registered
\rio scheduler deadline registered
\rio scheduler cfq registered (default)
\rf011a00.serial: ttyCPM0 at MMIO 0xc9008a00 (irq = 40) is a CPM UART
\rf011a20.serial: ttyCPM1 at MMIO 0xc900ca20 (irq = 41) is a CPM UART
\rf011a40.serial: ttyCPM2 at MMIO 0xc9014a40 (irq = 42) is a CPM UART
\rf011a60.serial: ttyCPM3 at MMIO 0xc901ca60 (irq = 43) is a CPM UART
\rf011a80.serial: ttyCPM4 at MMIO 0xc9024a80 (irq = 16) is a CPM UART
\rf011a90.serial: ttyCPM5 at MMIO 0xc902ca90 (irq = 17) is a CPM UART
\rbrd: module loaded
\rloop: module loaded
\rnbd: registered device at major 43
\rPPP generic driver version 2.4.2
\rPPP Deflate Compression module registered
\rtun: Universal TUN/TAP device driver, 1.6
\rtun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
\reth0: fs_enet: 08:00:08:15:ca:fe
\reth1: fs_enet: 08:00:08:15:ca:ce
\rCPM2 Bitbanged MII: probed
\rCPM2 Bitbanged MII: probed
\rmice: PS/2 mouse device common for all mice
\rTCP cubic registered
\rNET: Registered protocol family 10
\rIPv6 over IPv4 tunneling driver
\rNET: Registered protocol family 17
<Have to press <ENTER> Serial console>
\rRAMDISK: gzip image found at block 0
VFS: Mounted root (ext2 filesystem) on device 1:0.
\rFreeing unused kernel memory: 156k init
<Have to press <ENTER> Serial console>
ADDRCONF(NETDEV_UP): eth0: link is not ready
\r~ #
~ #
~ #
~ # ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
^ permalink raw reply
* Re: [PATCH V12 1/4] ptp: Added a brand new class driver for ptp clocks.
From: John Stultz @ 2011-03-23 21:19 UTC (permalink / raw)
To: Richard Cochran
Cc: Rodolfo Giometti, Arnd Bergmann, Peter Zijlstra, linux-api,
devicetree-discuss, linux-kernel, Russell King, Paul Mackerras,
Thomas Gleixner, Alan Cox, netdev, Mike Frysinger,
Christoph Lameter, linuxppc-dev, David Miller, linux-arm-kernel,
Krzysztof Halasa
In-Reply-To: <bf964489f4c6ee51bd8a2ab818cd6a5e2f544627.1298878618.git.richard.cochran@omicron.at>
On Mon, 2011-02-28 at 08:57 +0100, Richard Cochran wrote:
> This patch adds an infrastructure for hardware clocks that implement
> IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
> registration method to particular hardware clock drivers. Each clock is
> presented as a standard POSIX clock.
>
> The ancillary clock features are exposed in two different ways, via
> the sysfs and by a character device.
>
> Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
I think this looks mostly ok. I've got one concern on the locking and
there are a few minor nits that might need extra commenting below.
thanks
-john
> --- /dev/null
> +++ b/Documentation/ptp/testptp.c
[snip]
> + if (0x7fffffff != adjfreq) {
> + memset(&tx, 0, sizeof(tx));
> + tx.modes = ADJ_FREQUENCY;
> + tx.freq = (long) (adjfreq * 65.536);
So, 65.536... I understand you're converting ppb to ppm << 16 (which is
what adjtime takes), but I'm not sure if anyone else will. I'd either
wrap that in a commented conversion function/macro or just do the
conversion explicitly (freq = (adjfreq << 16)/1000; although this has
potential overflow risks with large ppb values) with a comment about
what is going on.
> --- /dev/null
> +++ b/drivers/ptp/ptp_clock.c
> @@ -0,0 +1,320 @@
[snip]
> +static void enqueue_external_timestamp(struct timestamp_event_queue *queue,
> + struct ptp_clock_event *src)
> +{
> + struct ptp_extts_event *dst;
> + unsigned long flags;
> + u32 remainder;
> +
> + dst = &queue->buf[queue->tail];
Doesn't the lock need to happen before you access the
queue->buf[queue->tail] ?
For example: What happens if two cpus enter the function at the same
time, both get the same tail index, one overwrite the other's data, then
both take turns bumping up the tail pointer?
> + dst->index = src->index;
> + dst->t.sec = div_u64_rem(src->timestamp, 1000000000, &remainder);
> + dst->t.nsec = remainder;
> +
> + spin_lock_irqsave(&queue->lock, flags);
> +
> + if (!queue_free(queue))
> + queue->head = (queue->head + 1) % PTP_MAX_TIMESTAMPS;
> +
> + queue->tail = (queue->tail + 1) % PTP_MAX_TIMESTAMPS;
> +
> + spin_unlock_irqrestore(&queue->lock, flags);
> +}
[snip]
> +static int ptp_clock_adjtime(struct posix_clock *pc, struct timex *tx)
> +{
> + struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);
> + struct ptp_clock_info *ops;
> + int err = -EOPNOTSUPP;
> +
> + ops = ptp->info;
> +
> + if (tx->modes & ADJ_SETOFFSET) {
> + struct timespec ts;
> + ktime_t kt;
> + s64 delta;
> +
> + ts.tv_sec = tx->time.tv_sec;
> + ts.tv_nsec = tx->time.tv_usec;
> +
> + if (!(tx->modes & ADJ_NANO))
> + ts.tv_nsec *= 1000;
> +
> + if ((unsigned long) ts.tv_nsec >= NSEC_PER_SEC)
> + return -EINVAL;
> +
> + kt = timespec_to_ktime(ts);
> + delta = ktime_to_ns(kt);
> + err = ops->adjtime(ops, delta);
> +
> + } else if (tx->modes & ADJ_FREQUENCY) {
> + s64 ppb = 1 + tx->freq;
> + ppb *= 125;
> + ppb >>= 13;
((1 + freq) *125)>>13 == magic :)
Needs a clear comment.
> + err = ops->adjfreq(ops, (s32)ppb);
> + }
> +
> + return err;
> +}
[snip]
> diff --git a/drivers/ptp/ptp_private.h b/drivers/ptp/ptp_private.h
> new file mode 100644
> index 0000000..2f76266
> --- /dev/null
> +++ b/drivers/ptp/ptp_private.h
> @@ -0,0 +1,86 @@
> +/*
> + * PTP 1588 clock support - private declarations for the core module.
> + *
> + * Copyright (C) 2010 OMICRON electronics GmbH
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +#ifndef _PTP_PRIVATE_H_
> +#define _PTP_PRIVATE_H_
> +
> +#include <linux/cdev.h>
> +#include <linux/device.h>
> +#include <linux/mutex.h>
> +#include <linux/posix-clock.h>
> +#include <linux/ptp_clock.h>
> +#include <linux/ptp_clock_kernel.h>
> +#include <linux/time.h>
> +
> +#define PTP_MAX_TIMESTAMPS 128
> +#define PTP_BUF_TIMESTAMPS 30
> +
> +struct timestamp_event_queue {
> + struct ptp_extts_event buf[PTP_MAX_TIMESTAMPS];
> + int head;
> + int tail;
> + spinlock_t lock;
> +};
> +
> +struct ptp_clock {
> + struct posix_clock clock;
> + struct device *dev;
> + struct ptp_clock_info *info;
> + dev_t devid;
> + int index; /* index into clocks.map */
> + struct pps_device *pps_source;
> + struct timestamp_event_queue tsevq; /* simple fifo for time stamps */
> + struct mutex tsevq_mux; /* one process at a time reading the fifo */
> + wait_queue_head_t tsev_wq;
> +};
> +
> +static inline int queue_cnt(struct timestamp_event_queue *q)
> +{
> + int cnt = q->tail - q->head;
> + return cnt < 0 ? PTP_MAX_TIMESTAMPS + cnt : cnt;
> +}
q->tail and head access probably need to happen only when locked.
So probably need a comment that queue_cnt must be called only when
holding the proper lock.
thanks
-john
^ permalink raw reply
* Re: [PATCH V12 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.
From: John Stultz @ 2011-03-23 21:30 UTC (permalink / raw)
To: Richard Cochran
Cc: Rodolfo Giometti, Arnd Bergmann, Peter Zijlstra, linux-api,
devicetree-discuss, linux-kernel, Russell King, Paul Mackerras,
Thomas Gleixner, Alan Cox, netdev, Mike Frysinger,
Christoph Lameter, linuxppc-dev, David Miller, linux-arm-kernel,
Krzysztof Halasa
In-Reply-To: <aa97e94c82ebd8953d83b53f64cbfef66c81b7be.1298878618.git.richard.cochran@omicron.at>
On Mon, 2011-02-28 at 08:57 +0100, Richard Cochran wrote:
> The eTSEC includes a PTP clock with quite a few features. This patch adds
> support for the basic clock adjustment functions, plus two external time
> stamps, one alarm, and the PPS callback.
Just a minor question on the locking, but otherwise looks ok.
> --- /dev/null
> +++ b/drivers/net/gianfar_ptp.c
> @@ -0,0 +1,579 @@
[snip]
> +/*
> + * Register access functions
> + */
So what are the locking rules on the functions below? I assume the
etsects->lock needs to be held prior to calling, so that should be made
explicit in a comment.
> +static u64 tmr_cnt_read(struct etsects *etsects)
> +{
> + u64 ns;
> + u32 lo, hi;
> +
> + lo = gfar_read(&etsects->regs->tmr_cnt_l);
> + hi = gfar_read(&etsects->regs->tmr_cnt_h);
> + ns = ((u64) hi) << 32;
> + ns |= lo;
> + return ns;
> +}
> +
> +static void tmr_cnt_write(struct etsects *etsects, u64 ns)
> +{
> + u32 hi = ns >> 32;
> + u32 lo = ns & 0xffffffff;
> +
> + gfar_write(&etsects->regs->tmr_cnt_l, lo);
> + gfar_write(&etsects->regs->tmr_cnt_h, hi);
> +}
> +
> +static void set_alarm(struct etsects *etsects)
> +{
> + u64 ns;
> + u32 lo, hi;
> +
> + ns = tmr_cnt_read(etsects) + 1500000000ULL;
> + ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
> + ns -= etsects->tclk_period;
> + hi = ns >> 32;
> + lo = ns & 0xffffffff;
> + gfar_write(&etsects->regs->tmr_alarm1_l, lo);
> + gfar_write(&etsects->regs->tmr_alarm1_h, hi);
> +}
> +
> +static void set_fipers(struct etsects *etsects)
> +{
> + u32 tmr_ctrl = gfar_read(&etsects->regs->tmr_ctrl);
> +
> + gfar_write(&etsects->regs->tmr_ctrl, tmr_ctrl & (~TE));
> + gfar_write(&etsects->regs->tmr_prsc, etsects->tmr_prsc);
> + gfar_write(&etsects->regs->tmr_fiper1, etsects->tmr_fiper1);
> + gfar_write(&etsects->regs->tmr_fiper2, etsects->tmr_fiper2);
> + set_alarm(etsects);
> + gfar_write(&etsects->regs->tmr_ctrl, tmr_ctrl|TE);
> +}
> +
[snip]
> +static int gianfar_ptp_probe(struct platform_device *dev)
> +{
> + struct device_node *node = dev->dev.of_node;
> + struct etsects *etsects;
> + struct timespec now;
> + int err = -ENOMEM;
> + u32 tmr_ctrl;
> +
> + etsects = kzalloc(sizeof(*etsects), GFP_KERNEL);
> + if (!etsects)
> + goto no_memory;
> +
> + err = -ENODEV;
> +
> + etsects->caps = ptp_gianfar_caps;
> + etsects->cksel = DEFAULT_CKSEL;
> +
> + if (get_of_u32(node, "fsl,tclk-period", &etsects->tclk_period) ||
> + get_of_u32(node, "fsl,tmr-prsc", &etsects->tmr_prsc) ||
> + get_of_u32(node, "fsl,tmr-add", &etsects->tmr_add) ||
> + get_of_u32(node, "fsl,tmr-fiper1", &etsects->tmr_fiper1) ||
> + get_of_u32(node, "fsl,tmr-fiper2", &etsects->tmr_fiper2) ||
> + get_of_u32(node, "fsl,max-adj", &etsects->caps.max_adj)) {
> + pr_err("device tree node missing required elements\n");
> + goto no_node;
> + }
> +
> + etsects->irq = platform_get_irq(dev, 0);
> +
> + if (etsects->irq == NO_IRQ) {
> + pr_err("irq not in device tree\n");
> + goto no_node;
> + }
> + if (request_irq(etsects->irq, isr, 0, DRIVER, etsects)) {
> + pr_err("request_irq failed\n");
> + goto no_node;
> + }
> +
> + etsects->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
> + if (!etsects->rsrc) {
> + pr_err("no resource\n");
> + goto no_resource;
> + }
> + if (request_resource(&ioport_resource, etsects->rsrc)) {
> + pr_err("resource busy\n");
> + goto no_resource;
> + }
> +
> + spin_lock_init(&etsects->lock);
> +
> + etsects->regs = ioremap(etsects->rsrc->start,
> + 1 + etsects->rsrc->end - etsects->rsrc->start);
> + if (!etsects->regs) {
> + pr_err("ioremap ptp registers failed\n");
> + goto no_ioremap;
> + }
> + getnstimeofday(&now);
> + ptp_gianfar_settime(&etsects->caps, &now);
> +
> + tmr_ctrl =
> + (etsects->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
> + (etsects->cksel & CKSEL_MASK) << CKSEL_SHIFT;
> +
> + gfar_write(&etsects->regs->tmr_ctrl, tmr_ctrl);
> + gfar_write(&etsects->regs->tmr_add, etsects->tmr_add);
> + gfar_write(&etsects->regs->tmr_prsc, etsects->tmr_prsc);
> + gfar_write(&etsects->regs->tmr_fiper1, etsects->tmr_fiper1);
> + gfar_write(&etsects->regs->tmr_fiper2, etsects->tmr_fiper2);
> + set_alarm(etsects);
> + gfar_write(&etsects->regs->tmr_ctrl, tmr_ctrl|FS|RTPE|TE);
Does any of the above need a lock should an irq land in the middle of
the writes?
thanks
-john
^ permalink raw reply
* Re: [PATCH V12 3/4] ptp: Added a clock driver for the IXP46x.
From: John Stultz @ 2011-03-23 21:43 UTC (permalink / raw)
To: Richard Cochran
Cc: Rodolfo Giometti, Arnd Bergmann, Peter Zijlstra, linux-api,
devicetree-discuss, linux-kernel, Russell King, Paul Mackerras,
Thomas Gleixner, Alan Cox, netdev, Mike Frysinger,
Christoph Lameter, linuxppc-dev, David Miller, linux-arm-kernel,
Krzysztof Halasa
In-Reply-To: <cd6ddff0dcca60ac88b35660505d7bf54ad32405.1298878618.git.richard.cochran@omicron.at>
On Mon, 2011-02-28 at 08:58 +0100, Richard Cochran wrote:
> This patch adds a driver for the hardware time stamping unit found on the
> IXP465. The basic clock operations and an external trigger are implemented.
>
> Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
> Acked-by: John Stultz <johnstul@us.ibm.com>
My ack is still fine, but found a few more nits to consider on another
pass...
> +static int match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seq)
[snip]
> +static void do_rx_timestamp(struct port *port, struct sk_buff *skb)
[snip]
> +static u64 sys_time_read(struct ixp46x_ts_regs *regs)
[snip]
> +static void sys_time_write(struct ixp46x_ts_regs *regs, u64 ns)
I know these are static, but these function names are sort of generic
names, and make grep/cscoping for similar sounding functions a little
noisy.
Maybe add a ipx_ prefix just to be more obvious?
thanks
-john
^ permalink raw reply
* Re: [PATCH V12 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.
From: John Stultz @ 2011-03-23 21:46 UTC (permalink / raw)
To: Richard Cochran
Cc: Rodolfo Giometti, Arnd Bergmann, Peter Zijlstra, linux-api,
devicetree-discuss, linux-kernel, Russell King, Paul Mackerras,
Thomas Gleixner, Alan Cox, netdev, Mike Frysinger,
Christoph Lameter, linuxppc-dev, David Miller, linux-arm-kernel,
Krzysztof Halasa
In-Reply-To: <f8af215ebe32a8c0f4b3a82b8ee7e8008b4feb1e.1298878618.git.richard.cochran@omicron.at>
On Mon, 2011-02-28 at 08:58 +0100, Richard Cochran wrote:
> This patch adds support for the PTP clock found on the DP83640.
> The basic clock operations and one external time stamp have
> been implemented.
Just locking rule comment nits here.
> +static int tdr_write(int bc, struct phy_device *dev,
> + const struct timespec *ts, u16 cmd)
> +{
> + ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_nsec & 0xffff);/* ns[15:0] */
> + ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_nsec >> 16); /* ns[31:16] */
> + ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_sec & 0xffff); /* sec[15:0] */
> + ext_write(bc, dev, PAGE4, PTP_TDR, ts->tv_sec >> 16); /* sec[31:16]*/
> +
> + ext_write(bc, dev, PAGE4, PTP_CTL, cmd);
> +
> + return 0;
> +}
The above needs to hold the extreg_lock, and should be commented as
such.
And again, the function names are sort of generic, and could use a
dp83640_ prefix or something.
thanks
-john
^ permalink raw reply
* Query: PCIe range entry at pcie@0 in dts files
From: Kushwaha Prabhakar-B32579 @ 2011-03-24 3:20 UTC (permalink / raw)
To: linuxppc-dev@lists.ozlabs.org
Hi all,
I have query about usage of range field at pcie@0 under PCIe controller. P=
lease find snap shot from mpc8536_36.dts..
pci3: pcie@fffe0b000 {
compatible =3D "fsl,mpc8548-pcie";
device_type =3D "pci";
#interrupt-cells =3D <1>;
#size-cells =3D <2>;
#address-cells =3D <3>;
reg =3D <0xf 0xffe0b000 0 0x1000>;
bus-range =3D <0 0xff>;
ranges =3D <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
clock-frequency =3D <33333333>;
interrupt-parent =3D <&mpic>;
interrupts =3D <27 0x2>;
interrupt-map-mask =3D <0xf800 0 0 7>;
interrupt-map =3D <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 8 1
0000 0 0 2 &mpic 9 1
0000 0 0 3 &mpic 10 1
0000 0 0 4 &mpic 11 1
>;
pcie@0 {
reg =3D <0 0 0 0 0>;
#size-cells =3D <2>;
#address-cells =3D <3>;
device_type =3D "pci";
ranges =3D <0x02000000 0 0xe0000000 --> child/port start address
0x02000000 0 0xe0000000 --> Parent bus address
0 0x20000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00100000>;
};
};
Question:
A) is ranges filed of pcie@0 really required?
I just went through the code and found scan_OF_for_pci_dev() called from =
pci_busdev_to_OF_node() touches pcie@0 node. But, It does not even uses ran=
ge filed.=20
static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,=
unsigned int devfn) {
---
---
for_each_child_of_node(parent, np) {
reg =3D of_get_property(np, "reg", &psize);=20
=20
---
---
if (!strcmp(np->name, "multifunc-device")) {=20
=20
}
I also checked "Power_ePAPR_APPROVED_v1.0.pdf". It never say range filed=
required for child bus.
B) if range field of pcie@0 required. why does child/port start address sam=
e as Parent bus address? Range property provides mapping of port address t=
o parent address space.
So the value should be 0x00000000. Means port's address starting from 0x000=
00000 to size 0x20000000 is mapped parent's 0xe0000000.
ranges =3D <0x02000000 0 0x00000000 --> Child/port's start address
0x02000000 0 0xe0000000 --> Parent bus address
0 0x20000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00100000>;
--Prabhakar
^ permalink raw reply
* Re: [PATCH 1/2] kdump: Allow shrinking of kdump region to be overridden
From: Benjamin Herrenschmidt @ 2011-03-24 4:33 UTC (permalink / raw)
To: Eric W. Biederman
Cc: linuxppc-dev, Anton Blanchard, kexec, linux-kernel, WANG Cong
In-Reply-To: <im6fj2$576$1@dough.gmane.org>
On Mon, 2011-03-21 at 03:10 +0000, WANG Cong wrote:
> On Tue, 15 Mar 2011 22:22:19 +0530, Mahesh J Salgaonkar wrote:
> >> Okay, but with this patch applied, we will just ignore rtas region,
> >> right?
> > Correct.
> >> Thus, when I echo 0 to free all the 128M crashkernel memory, the final
> >> result will be 32M left, which means crash_size will still show 32M.
> >> This looks odd.
> >>
> >> How about skipping the 32M as a whole? I mean once the region being
> >> freed has overlap with this rtas region, skip the whole rtas region,
> >> and let crash_size
> >> show 0?
> > The existing code from crash_shrink_memory() function reduces the crash
> > size to 0 when echo'ed 0. I did test this patchset and verified that
> > /sys/kernel/kexec_crash_size show 0 value.
>
> Oh, ok.
>
> Acked-by: WANG Cong <xiyou.wangcong@gmail.com>
So Eric, what's the right approach to get that merged ? This is a bug
gating an important delivery for us, and the patch doesn't appear
terribly invasive ? :-)
I can send it to Linus myself if you prefer and give me your Ack.
Cheers,
Ben.
^ permalink raw reply
* [PATCH] powerpc: wire up new syscalls
From: Stephen Rothwell @ 2011-03-24 4:40 UTC (permalink / raw)
To: ppc-dev; +Cc: paulus
These syscalls have been added recently:
name_to_handle_at
open_by_handle_at
clock_adjtime
syncfs
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/include/asm/systbl.h | 4 ++++
arch/powerpc/include/asm/unistd.h | 6 +++++-
2 files changed, 9 insertions(+), 1 deletions(-)
I have test built this for pseries_defconfig and pmac32_deconfig both
with and without CONFIG_FHANDLE.
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index aa0f1eb..60f64b1 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -348,3 +348,7 @@ COMPAT_SYS_SPU(sendmsg)
COMPAT_SYS_SPU(recvmsg)
COMPAT_SYS_SPU(recvmmsg)
SYSCALL_SPU(accept4)
+SYSCALL_SPU(name_to_handle_at)
+COMPAT_SYS_SPU(open_by_handle_at)
+COMPAT_SYS_SPU(clock_adjtime)
+SYSCALL_SPU(syncfs)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 6151937..3c21564 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -367,10 +367,14 @@
#define __NR_recvmsg 342
#define __NR_recvmmsg 343
#define __NR_accept4 344
+#define __NR_name_to_handle_at 345
+#define __NR_open_by_handle_at 346
+#define __NR_clock_adjtime 347
+#define __NR_syncfs 348
#ifdef __KERNEL__
-#define __NR_syscalls 345
+#define __NR_syscalls 349
#define __NR__exit __NR_exit
#define NR_syscalls __NR_syscalls
--
1.7.4.1
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
^ permalink raw reply related
* Autoupdate FIT image : wrong dtb load address
From: Andreas Friesen @ 2011-03-24 6:53 UTC (permalink / raw)
To: linuxppc-dev
Hello folks,
I'm trying to generate a autoupdate FIT-image.
I'm using u-boot 2010.12 / dtc 1.2.0. / Kernel 2.6.36.6 ;
Its work fine, but the load address of fdt-part is wrong.
Does anyone know what the problem is?
-------------- 8<--------------------
Auto-update from TFTP: trying update file 'mxa.itb'
Using FEC device
TFTP from server 192.168.1.10; our IP address is 192.168.1.58
Filename 'mxa.itb'.
Load address: 0x100000
Loading: #################################################################
#################################################################
#####################
done
Bytes transferred = 2210382 (21ba4e hex)
Processing update 'kernel@0' :sha1+
Erasing 0xff000000 - 0xff13ffff
.......... done
Erased 10 sectors
Copying to flash...done
Processing update 'rootfs@0' :sha1+
Erasing 0xff200000 - 0xff2bffff
...... done
Erased 6 sectors
Copying to flash...done
Processing update 'fpga@0' :sha1+
Erasing 0xfff60000 - 0xfff9ffff
.. done
Erased 2 sectors
Copying to flash...done
Processing update 'fdt@0' :sha1+
Error: end address (0x3c30c665) not in flash! <----------------- ??????????????
Error: can't flash update, aborting
Hit any key to stop autoboot: 0
-------------- 8<--------------------
Thanks in advance.
Andreas Friesen
PS : Hier is my its-source file and mkimage output :
-------------- 8<--------------------
/dts-v1/;
/ {
description = "Automatic Software Update: kernel, rootfs, FDT, FPGA ";
timestamp = <1300774787>;
#address-cells = <1>;
images {
kernel@0 {
description = "linux kernel image";
data = /incbin/("./uImage");
arch = "ppc";
type = "firmware";
load = <0xFF000000>;
compression = "none";
hash@1 {
algo = "sha1";
};
};
rootfs@0 {
description = "RootFS image";
data = /incbin/("./rootfs.img");
arch = "ppc";
type = "firmware";
load = <0xFF200000>;
compression = "none";
hash@1 {
algo = "sha1";
};
};
fpga@0 {
description = "FPGA Firmware";
data = /incbin/("./fpga.bin");
arch = "ppc";
compression = "none";
type = "firmware";
load = <0xFFF60000>;
hash@1 {
algo = "sha1";
};
};
fdt@0 {
description = "FDT binary";
data = /incbin/("./mxa.dtb");
arch = "ppc";
compression = "none";
type = "firmware";
load = "<0xFFFE0000>"; <----------- !!!!!!!!!!!!!!!!!!!!!!
hash@1 {
algo = "sha1";
};
};
};
};
------------------------8<--------------------------
$ mkimage -f mxa_autoupdate.its mxa.itb
Registered Kirkwood Boot Image support
Registered Freescale i.MX 51 Boot Image support
Registered FIT Image support
Registered Default Image support
FIT format handling
Trying to execute "dtc -I dts -O dtb -p 500 mxa_autoupdate.its >
mxa_autoupdate.itb.tmp"
DTC: dts->dtb on file "mxa_autoupdate.its"
Added timestamp successfully
FIT description: Automatic Software Update: kernel, rootfs, FDT, FPGA
Created: Tue Mar 22 07:19:47 2011
Image 0 (kernel@0)
Description: linux kernel image
Type: Firmware
Compression: uncompressed
Data Size: 1222870 Bytes = 1194.21 kB = 1.17 MB
Architecture: PowerPC
Load Address: 0xff000000
Hash node: 'hash@1'
Hash algo: sha1
Hash value: e619b777d20246fe5b4f5b6ed2ad6ebe44c54fdf
Hash len: 20
Image 1 (rootfs@0)
Description: RootFS image
Type: Firmware
Compression: uncompressed
Data Size: 753664 Bytes = 736.00 kB = 0.72 MB
Architecture: PowerPC
Load Address: 0xff200000
Hash node: 'hash@1'
Hash algo: sha1
Hash value: eaf7b46387c0a912b81cb1cd38f8af616ed746a6
Hash len: 20
Image 2 (fpga@0)
Description: FPGA Firmware
Type: Firmware
Compression: uncompressed
Data Size: 212392 Bytes = 207.41 kB = 0.20 MB
Architecture: PowerPC
Load Address: 0xfff60000
Hash node: 'hash@1'
Hash algo: sha1
Hash value: 65a54dc977a7287c499816108bc18eb19989aa0e
Hash len: 20
Image 3 (fdt@0)
Description: FDT binary
Type: Firmware
Compression: uncompressed
Data Size: 20000 Bytes = 19.53 kB = 0.02 MB
Architecture: PowerPC
Load Address: 0x3c307846 <----------------- ???????????????????????
Hash node: 'hash@1'
Hash algo: sha1
Hash value: 067d8484ef45bfb0efe9d3b1caf17e0f37748aa4
Hash len: 20
Can't get configurations parent node '/configurations' (FDT_ERR_NOTFOUND)
--------- >8 --------------
^ permalink raw reply
* [PATCH] hvc_console: Don't access hvc_task if not initialised
From: Amit Shah @ 2011-03-24 7:29 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Rusty Russell, linux-kernel, greg, Amit Shah, stable
hvc_open() can be called without having any backing device. This
results in a call to hvc_kick() which calls wake_up_process on a NULL
pointer. Ensure hvc is initialised by checking for a non-NULL hvc_task
before waking up the hvc thread.
This was found by an autotest run for virtio_console without having a
console backend.
CC: stable@kernel.org
Signed-off-by: Amit Shah <amit.shah@redhat.com>
---
drivers/tty/hvc/hvc_console.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index e9cba13..b2cb5cc 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -286,6 +286,9 @@ EXPORT_SYMBOL_GPL(hvc_instantiate);
/* Wake the sleeping khvcd */
void hvc_kick(void)
{
+ if (!hvc_task)
+ return;
+
hvc_kicked = 1;
wake_up_process(hvc_task);
}
--
1.7.4
^ permalink raw reply related
* Re: vmsplice bad address
From: Guillaume Dargaud @ 2011-03-24 14:34 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1299490544.9759.3.camel@pasglop>
On Monday 07 March 2011 10:35:44 Benjamin Herrenschmidt wrote:
> I'm not completely surprised ... I wouldn't expect vmsplice to work
> on /dev/mem ... No struct page backing the memory for example.
So how would that work to do zero-copy ?
Somebody gave me a hint of marking the memory regions as iomem, do a ioremap then mmap and vmsplice but that's a
mouthful...
--
Guillaume Dargaud
http://www.gdargaud.net/
^ permalink raw reply
* [PATCH] powerpc: add clock_adjtime for powerpc
From: Richard Cochran @ 2011-03-24 15:05 UTC (permalink / raw)
To: linux-kernel; +Cc: linux-api, linuxppc-dev, Paul Mackerras
This patch adds the clock_adjtime system call to the powerpc architecture.
The call was introduced in f1f1d5ebd10ffa4242bce7a90a56a222d6b7bc77
Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
---
arch/powerpc/include/asm/systbl.h | 1 +
arch/powerpc/include/asm/unistd.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index aa0f1eb..6a1152c 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -348,3 +348,4 @@ COMPAT_SYS_SPU(sendmsg)
COMPAT_SYS_SPU(recvmsg)
COMPAT_SYS_SPU(recvmmsg)
SYSCALL_SPU(accept4)
+COMPAT_SYS_SPU(clock_adjtime)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 6151937..386de07 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -367,10 +367,11 @@
#define __NR_recvmsg 342
#define __NR_recvmmsg 343
#define __NR_accept4 344
+#define __NR_clock_adjtime 345
#ifdef __KERNEL__
-#define __NR_syscalls 345
+#define __NR_syscalls 346
#define __NR__exit __NR_exit
#define NR_syscalls __NR_syscalls
--
1.7.0.4
^ permalink raw reply related
* Re: hvc_console: Don't access hvc_task if not initialised
From: Milton Miller @ 2011-03-24 14:58 UTC (permalink / raw)
To: Amit Shah; +Cc: Rusty Russell, linux-kernel, linuxppc-dev, greg, Amit Shah
In-Reply-To: <df8ea6d65c1ceeb25b0a3fdfc66995b8a8273ea5.1300951793.git.amit.shah@redhat.com>
[removed stable list from discussion]
On Thu, 24 Mar 2011 07:29:58 -0000, Amit Shah wrote:
> hvc_open() can be called without having any backing device. This
> results in a call to hvc_kick() which calls wake_up_process on a NULL
> pointer.
How is hvc_open called without a hvc_driver registered to the tty layer?
> Ensure hvc is initialised by checking for a non-NULL hvc_task
> before waking up the hvc thread.
No if the task is missing the subsystem is really stuck. Put a check
in open and refuse to open.
>
> This was found by an autotest run for virtio_console without having a
> console backend.
>
stack trace please
> CC: stable@kernel.org
> Signed-off-by: Amit Shah <amit.shah@redhat.com>
>
> ---
> drivers/tty/hvc/hvc_console.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
> index e9cba13..b2cb5cc 100644
> --- a/drivers/tty/hvc/hvc_console.c
> +++ b/drivers/tty/hvc/hvc_console.c
> @@ -286,6 +286,9 @@ EXPORT_SYMBOL_GPL(hvc_instantiate);
> /* Wake the sleeping khvcd */
> void hvc_kick(void)
> {
> + if (!hvc_task)
> + return;
> +
> hvc_kicked = 1;
> wake_up_process(hvc_task);
> }
^ permalink raw reply
* Re: [PATCH] powerpc: add clock_adjtime for powerpc
From: Richard Cochran @ 2011-03-24 15:17 UTC (permalink / raw)
To: linux-kernel; +Cc: linux-api, linuxppc-dev, Paul Mackerras
In-Reply-To: <20110324150517.GA6710@riccoc20.at.omicron.at>
On Thu, Mar 24, 2011 at 04:05:17PM +0100, Richard Cochran wrote:
> This patch adds the clock_adjtime system call to the powerpc architecture.
Never mind this patch.
Stephen Rothwell already posted a patch on linuxppc-dev adding this
syscall eariler today.
Thanks,
Richard
^ permalink raw reply
* High load average (~2.0) on an idle PowerPC 64 machine
From: Romain Goyet @ 2011-03-24 20:23 UTC (permalink / raw)
To: linuxppc-dev
I there,
I've this Quad G5 machine that's sitting pretty much idle with the
latest Debian stable installed, and yet it's got an abnormaly high
load average.
I've detailed the situation over here, maybe you guys will find it
interesting or have something to say :
http://serverfault.com/questions/251299/high-load-average-over-2-0-on-an-idle-machine
The machine doesn't seem to be actually slowed down, it looks more
like an incorrect measurement.
Thank you very much for any help !
- Romain
^ permalink raw reply
* [PATCH 1/4] powerpc: Add fsl mpic timer binding
From: Scott Wood @ 2011-03-24 21:43 UTC (permalink / raw)
To: galak; +Cc: devicetree-discuss, linuxppc-dev
Update the existing example in the general mpic binding to have a
separate TCRx region. Currently the example doesn't describe TCRx at
all. The one upstream device tree with an mpic timer node (p1022ds)
uses one large reg region to describe both, even though there are other
unrelated registers in between. That device tree also contains a bogus
interrupt specifier, and there's no upstream software that uses this yet,
so changing this shouldn't be a problem.
Add a full binding for the MPIC timer node, not just an example of
4-cell interrupts in the MPIC binding.
Add fsl,available-ranges, similar to msi-available-ranges.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
.../devicetree/bindings/powerpc/fsl/mpic-timer.txt | 38 ++++++++++++++++++++
.../devicetree/bindings/powerpc/fsl/mpic.txt | 2 +-
2 files changed, 39 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
new file mode 100644
index 0000000..df41958
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
@@ -0,0 +1,38 @@
+* Freescale MPIC timers
+
+Required properties:
+- compatible: "fsl,mpic-global-timer"
+
+- reg : Contains two regions. The first is the main timer register bank
+ (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The second is the timer control
+ register (TCRx) for the group.
+
+- fsl,available-ranges: use <start count> style section to define which
+ timer interrupts can be used. This property is optional; without this,
+ all timers within the group can be used.
+
+- interrupts: one interrupt per timer in the group, in order, starting
+ with timer zero. If timer-available-ranges is present, only the
+ interrupts that correspond to available timers shall be present.
+
+Example:
+ /* Note that this requires #interrupt-cells to be 4 */
+ timer0: timer@41100 {
+ compatible = "fsl,mpic-global-timer";
+ reg = <0x41100 0x100 0x41300 4>;
+
+ /* Another AMP partition is using timers 0 and 1 */
+ fsl,available-ranges = <2 2>;
+
+ interrupts = <2 0 3 0
+ 3 0 3 0>;
+ };
+
+ timer1: timer@42100 {
+ compatible = "fsl,mpic-global-timer";
+ reg = <0x42100 0x100 0x42300 4>;
+ interrupts = <4 0 3 0
+ 5 0 3 0
+ 6 0 3 0
+ 7 0 3 0>;
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index 8aa10f4..6af4b64 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -190,7 +190,7 @@ EXAMPLE 4
*/
timer0: timer@41100 {
compatible = "fsl,mpic-global-timer";
- reg = <0x41100 0x100>;
+ reg = <0x41100 0x100 0x41300 4>;
interrupts = <0 0 3 0
1 0 3 0
2 0 3 0
--
1.7.1
^ permalink raw reply related
* [PATCH 3/4] powerpc/mpic: parse 4-cell intspec types other than zero
From: Scott Wood @ 2011-03-24 21:43 UTC (permalink / raw)
To: galak; +Cc: devicetree-discuss, linuxppc-dev
In-Reply-To: <20110324214315.GA9502@schlenkerla.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/include/asm/mpic.h | 2 ++
arch/powerpc/sysdev/mpic.c | 37 ++++++++++++++++++++++++++++++++++++-
2 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 7005ee0..25a0cb3 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -371,6 +371,8 @@ struct mpic
* NOTE: This flag trumps MPIC_WANTS_RESET.
*/
#define MPIC_NO_RESET 0x00004000
+/* Freescale MPIC (compatible includes "fsl,mpic") */
+#define MPIC_FSL 0x00008000
/* MPIC HW modification ID */
#define MPIC_REGSET_MASK 0xf0000000
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0f7c671..69f96ec 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -6,6 +6,7 @@
* with various broken implementations of this HW.
*
* Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -1030,6 +1031,7 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
irq_hw_number_t *out_hwirq, unsigned int *out_flags)
{
+ struct mpic *mpic = h->host_data;
static unsigned char map_mpic_senses[4] = {
IRQ_TYPE_EDGE_RISING,
IRQ_TYPE_LEVEL_LOW,
@@ -1038,7 +1040,38 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
};
*out_hwirq = intspec[0];
- if (intsize > 1) {
+ if (intsize >= 4 && (mpic->flags & MPIC_FSL)) {
+ /*
+ * Freescale MPIC with extended intspec:
+ * First two cells are as usual. Third specifies
+ * an "interrupt type". Fourth is type-specific data.
+ *
+ * See Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+ */
+ switch (intspec[2]) {
+ case 0:
+ case 1: /* no EISR/EIMR support for now, treat as shared IRQ */
+ break;
+ case 2:
+ if (intspec[0] >= ARRAY_SIZE(mpic->ipi_vecs))
+ return -EINVAL;
+
+ *out_hwirq = mpic->ipi_vecs[intspec[0]];
+ break;
+ case 3:
+ if (intspec[0] >= ARRAY_SIZE(mpic->timer_vecs))
+ return -EINVAL;
+
+ *out_hwirq = mpic->timer_vecs[intspec[0]];
+ break;
+ default:
+ pr_debug("%s: unknown irq type %u\n",
+ __func__, intspec[2]);
+ return -EINVAL;
+ }
+
+ *out_flags = map_mpic_senses[intspec[1] & 3];
+ } else if (intsize > 1) {
u32 mask = 0x3;
/* Apple invented a new race of encoding on machines with
@@ -1137,6 +1170,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* Check for "big-endian" in device-tree */
if (node && of_get_property(node, "big-endian", NULL) != NULL)
mpic->flags |= MPIC_BIG_ENDIAN;
+ if (node && of_device_is_compatible(node, "fsl,mpic"))
+ mpic->flags |= MPIC_FSL;
/* Look for protected sources */
if (node) {
--
1.7.1
^ permalink raw reply related
* [PATCH 4/4] powerpc/mpic: add the mpic global timer support
From: Scott Wood @ 2011-03-24 21:43 UTC (permalink / raw)
To: galak; +Cc: devicetree-discuss, linuxppc-dev
In-Reply-To: <20110324214315.GA9502@schlenkerla.am.freescale.net>
Add support for MPIC timers as requestable interrupt sources.
Based on http://patchwork.ozlabs.org/patch/20941/ by Dave Liu.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/include/asm/mpic.h | 3 +-
arch/powerpc/sysdev/mpic.c | 92 ++++++++++++++++++++++++++++++++++++---
2 files changed, 88 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 25a0cb3..664bee6 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -263,6 +263,7 @@ struct mpic
#ifdef CONFIG_SMP
struct irq_chip hc_ipi;
#endif
+ struct irq_chip hc_tm;
const char *name;
/* Flags */
unsigned int flags;
@@ -281,7 +282,7 @@ struct mpic
/* vector numbers used for internal sources (ipi/timers) */
unsigned int ipi_vecs[4];
- unsigned int timer_vecs[4];
+ unsigned int timer_vecs[8];
/* Spurious vector to program into unused sources */
unsigned int spurious_vec;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 69f96ec..c173e67 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -219,6 +219,28 @@ static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 valu
_mpic_write(mpic->reg_type, &mpic->gregs, offset, value);
}
+static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ ((tm & 3) * MPIC_INFO(TIMER_STRIDE));
+
+ if (tm >= 4)
+ offset += 0x1000 / 4;
+
+ return _mpic_read(mpic->reg_type, &mpic->tmregs, offset);
+}
+
+static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32 value)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ ((tm & 3) * MPIC_INFO(TIMER_STRIDE));
+
+ if (tm >= 4)
+ offset += 0x1000 / 4;
+
+ _mpic_write(mpic->reg_type, &mpic->tmregs, offset, value);
+}
+
static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)
{
unsigned int cpu = mpic_processor_id(mpic);
@@ -269,6 +291,8 @@ static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
#define mpic_write(b,r,v) _mpic_write(mpic->reg_type,&(b),(r),(v))
#define mpic_ipi_read(i) _mpic_ipi_read(mpic,(i))
#define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v))
+#define mpic_tm_read(i) _mpic_tm_read(mpic,(i))
+#define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v))
#define mpic_cpu_read(i) _mpic_cpu_read(mpic,(i))
#define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v))
#define mpic_irq_read(s,r) _mpic_irq_read(mpic,(s),(r))
@@ -628,6 +652,13 @@ static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq)
return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]);
}
+/* Determine if the linux irq is a timer */
+static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq)
+{
+ unsigned int src = mpic_irq_to_hw(irq);
+
+ return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]);
+}
/* Convert a cpu mask from logical to physical cpu numbers. */
static inline u32 mpic_physmask(u32 cpumask)
@@ -814,6 +845,25 @@ static void mpic_end_ipi(struct irq_data *d)
#endif /* CONFIG_SMP */
+static void mpic_unmask_tm(struct irq_data *d)
+{
+ struct mpic *mpic = mpic_from_irq_data(d);
+ unsigned int src = mpic_irq_to_hw(d->irq) - mpic->timer_vecs[0];
+
+ DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, irq, src);
+ mpic_tm_write(src, mpic_tm_read(src) & ~MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
+static void mpic_mask_tm(struct irq_data *d)
+{
+ struct mpic *mpic = mpic_from_irq_data(d);
+ unsigned int src = mpic_irq_to_hw(d->irq) - mpic->timer_vecs[0];
+
+ mpic_tm_write(src, mpic_tm_read(src) | MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
bool force)
{
@@ -948,6 +998,12 @@ static struct irq_chip mpic_ipi_chip = {
};
#endif /* CONFIG_SMP */
+static struct irq_chip mpic_tm_chip = {
+ .irq_mask = mpic_mask_tm,
+ .irq_unmask = mpic_unmask_tm,
+ .irq_eoi = mpic_end_irq,
+};
+
#ifdef CONFIG_MPIC_U3_HT_IRQS
static struct irq_chip mpic_irq_ht_chip = {
.irq_startup = mpic_startup_ht_irq,
@@ -991,6 +1047,16 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
}
#endif /* CONFIG_SMP */
+ if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) {
+ WARN_ON(!(mpic->flags & MPIC_PRIMARY));
+
+ DBG("mpic: mapping as timer\n");
+ set_irq_chip_data(virq, mpic);
+ set_irq_chip_and_handler(virq, &mpic->hc_tm,
+ handle_fasteoi_irq);
+ return 0;
+ }
+
if (hw >= mpic->irq_count)
return -EINVAL;
@@ -1147,6 +1213,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic->hc_ipi.name = name;
#endif /* CONFIG_SMP */
+ mpic->hc_tm = mpic_tm_chip;
+ mpic->hc_tm.name = name;
+
mpic->flags = flags;
mpic->isu_size = isu_size;
mpic->irq_count = irq_count;
@@ -1157,10 +1226,14 @@ struct mpic * __init mpic_alloc(struct device_node *node,
else
intvec_top = 255;
- mpic->timer_vecs[0] = intvec_top - 8;
- mpic->timer_vecs[1] = intvec_top - 7;
- mpic->timer_vecs[2] = intvec_top - 6;
- mpic->timer_vecs[3] = intvec_top - 5;
+ mpic->timer_vecs[0] = intvec_top - 12;
+ mpic->timer_vecs[1] = intvec_top - 11;
+ mpic->timer_vecs[2] = intvec_top - 10;
+ mpic->timer_vecs[3] = intvec_top - 9;
+ mpic->timer_vecs[4] = intvec_top - 8;
+ mpic->timer_vecs[5] = intvec_top - 7;
+ mpic->timer_vecs[6] = intvec_top - 6;
+ mpic->timer_vecs[7] = intvec_top - 5;
mpic->ipi_vecs[0] = intvec_top - 4;
mpic->ipi_vecs[1] = intvec_top - 3;
mpic->ipi_vecs[2] = intvec_top - 2;
@@ -1363,15 +1436,17 @@ void __init mpic_init(struct mpic *mpic)
/* Set current processor priority to max */
mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf);
- /* Initialize timers: just disable them all */
+ /* Initialize timers to our reserved vectors and mask them for now */
for (i = 0; i < 4; i++) {
mpic_write(mpic->tmregs,
i * MPIC_INFO(TIMER_STRIDE) +
- MPIC_INFO(TIMER_DESTINATION), 0);
+ MPIC_INFO(TIMER_DESTINATION),
+ 1 << hard_smp_processor_id());
mpic_write(mpic->tmregs,
i * MPIC_INFO(TIMER_STRIDE) +
MPIC_INFO(TIMER_VECTOR_PRI),
MPIC_VECPRI_MASK |
+ (9 << MPIC_VECPRI_PRIORITY_SHIFT) |
(mpic->timer_vecs[0] + i));
}
@@ -1480,6 +1555,11 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
~MPIC_VECPRI_PRIORITY_MASK;
mpic_ipi_write(src - mpic->ipi_vecs[0],
reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
+ } else if (mpic_is_tm(mpic, irq)) {
+ reg = mpic_tm_read(src - mpic->timer_vecs[0]) &
+ ~MPIC_VECPRI_PRIORITY_MASK;
+ mpic_tm_write(src - mpic->timer_vecs[0],
+ reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
} else {
reg = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI))
& ~MPIC_VECPRI_PRIORITY_MASK;
--
1.7.1
^ permalink raw reply related
* [PATCH 2/4] powerpc/p1022ds: fix broken mpic timer node
From: Scott Wood @ 2011-03-24 21:43 UTC (permalink / raw)
To: galak; +Cc: devicetree-discuss, linuxppc-dev
In-Reply-To: <20110324214315.GA9502@schlenkerla.am.freescale.net>
There is no hardware interrupt 0xf7. But now we can express the timer
interrupt using 4-cell interrupts. This requires converting all of the
other interrupt specifiers in the tree as well.
Also add the second timer group, and fix the reg property to only
describe the timer registers.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/p1022ds.dts | 106 ++++++++++++++++++++----------------
1 files changed, 59 insertions(+), 47 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 59ef405..4f685a7 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -52,7 +52,7 @@
#size-cells = <1>;
compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
reg = <0 0xffe05000 0 0x1000>;
- interrupts = <19 2>;
+ interrupts = <19 2 0 0>;
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
0x1 0x0 0xf 0xe0000000 0x08000000
@@ -157,7 +157,7 @@
* IRQ8 is generated if the "EVENT" switch is pressed
* and PX_CTL[EVESEL] is set to 00.
*/
- interrupts = <8 8>;
+ interrupts = <8 8 0 0>;
};
};
@@ -178,13 +178,13 @@
ecm@1000 {
compatible = "fsl,p1022-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
- interrupts = <16 2>;
+ interrupts = <16 2 0 0>;
};
memory-controller@2000 {
compatible = "fsl,p1022-memory-controller";
reg = <0x2000 0x1000>;
- interrupts = <16 2>;
+ interrupts = <16 2 0 0>;
};
i2c@3000 {
@@ -193,7 +193,7 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <43 2>;
+ interrupts = <43 2 0 0>;
dfsrr;
};
@@ -203,7 +203,7 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <43 2>;
+ interrupts = <43 2 0 0>;
dfsrr;
wm8776:codec@1a {
@@ -220,7 +220,7 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <42 2>;
+ interrupts = <42 2 0 0>;
};
serial1: serial@4600 {
@@ -229,7 +229,7 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <42 2>;
+ interrupts = <42 2 0 0>;
};
spi@7000 {
@@ -238,7 +238,7 @@
#size-cells = <0>;
compatible = "fsl,espi";
reg = <0x7000 0x1000>;
- interrupts = <59 0x2>;
+ interrupts = <59 0x2 0 0>;
espi,num-ss-bits = <4>;
mode = "cpu";
@@ -275,7 +275,7 @@
compatible = "fsl,mpc8610-ssi";
cell-index = <0>;
reg = <0x15000 0x100>;
- interrupts = <75 2>;
+ interrupts = <75 2 0 0>;
fsl,mode = "i2s-slave";
codec-handle = <&wm8776>;
fsl,playback-dma = <&dma00>;
@@ -294,25 +294,25 @@
compatible = "fsl,ssi-dma-channel";
reg = <0x0 0x80>;
cell-index = <0>;
- interrupts = <76 2>;
+ interrupts = <76 2 0 0>;
};
dma01: dma-channel@80 {
compatible = "fsl,ssi-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
- interrupts = <77 2>;
+ interrupts = <77 2 0 0>;
};
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
- interrupts = <78 2>;
+ interrupts = <78 2 0 0>;
};
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
- interrupts = <79 2>;
+ interrupts = <79 2 0 0>;
};
};
@@ -320,7 +320,7 @@
#gpio-cells = <2>;
compatible = "fsl,mpc8572-gpio";
reg = <0xf000 0x100>;
- interrupts = <47 0x2>;
+ interrupts = <47 0x2 0 0>;
gpio-controller;
};
@@ -329,7 +329,7 @@
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
- interrupts = <16 2>;
+ interrupts = <16 2 0 0>;
};
dma@21300 {
@@ -343,25 +343,25 @@
compatible = "fsl,eloplus-dma-channel";
reg = <0x0 0x80>;
cell-index = <0>;
- interrupts = <20 2>;
+ interrupts = <20 2 0 0>;
};
dma-channel@80 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
- interrupts = <21 2>;
+ interrupts = <21 2 0 0>;
};
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
- interrupts = <22 2>;
+ interrupts = <22 2 0 0>;
};
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
- interrupts = <23 2>;
+ interrupts = <23 2 0 0>;
};
};
@@ -370,7 +370,7 @@
#size-cells = <0>;
compatible = "fsl-usb2-dr";
reg = <0x22000 0x1000>;
- interrupts = <28 0x2>;
+ interrupts = <28 0x2 0 0>;
phy_type = "ulpi";
};
@@ -381,11 +381,11 @@
reg = <0x24000 0x1000 0xb0030 0x4>;
phy0: ethernet-phy@0 {
- interrupts = <3 1>;
+ interrupts = <3 1 0 0>;
reg = <0x1>;
};
phy1: ethernet-phy@1 {
- interrupts = <9 1>;
+ interrupts = <9 1 0 0>;
reg = <0x2>;
};
};
@@ -416,13 +416,13 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0xB0000 0x1000>;
- interrupts = <29 2 30 2 34 2>;
+ interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
};
queue-group@1{
#address-cells = <1>;
#size-cells = <1>;
reg = <0xB4000 0x1000>;
- interrupts = <17 2 18 2 24 2>;
+ interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
};
};
@@ -443,20 +443,20 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0xB1000 0x1000>;
- interrupts = <35 2 36 2 40 2>;
+ interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
};
queue-group@1{
#address-cells = <1>;
#size-cells = <1>;
reg = <0xB5000 0x1000>;
- interrupts = <51 2 52 2 67 2>;
+ interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
};
};
sdhci@2e000 {
compatible = "fsl,p1022-esdhc", "fsl,esdhc";
reg = <0x2e000 0x1000>;
- interrupts = <72 0x2>;
+ interrupts = <72 0x2 0 0>;
fsl,sdhci-auto-cmd12;
/* Filled in by U-Boot */
clock-frequency = <0>;
@@ -467,7 +467,7 @@
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
"fsl,sec2.0";
reg = <0x30000 0x10000>;
- interrupts = <45 2 58 2>;
+ interrupts = <45 2 0 0 58 2 0 0>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x97c>;
@@ -478,14 +478,14 @@
compatible = "fsl,p1022-sata", "fsl,pq-sata-v2";
reg = <0x18000 0x1000>;
cell-index = <1>;
- interrupts = <74 0x2>;
+ interrupts = <74 0x2 0 0>;
};
sata@19000 {
compatible = "fsl,p1022-sata", "fsl,pq-sata-v2";
reg = <0x19000 0x1000>;
cell-index = <2>;
- interrupts = <41 0x2>;
+ interrupts = <41 0x2 0 0>;
};
power@e0070{
@@ -496,21 +496,33 @@
display@10000 {
compatible = "fsl,diu", "fsl,p1022-diu";
reg = <0x10000 1000>;
- interrupts = <64 2>;
+ interrupts = <64 2 0 0>;
};
timer@41100 {
compatible = "fsl,mpic-global-timer";
- reg = <0x41100 0x204>;
- interrupts = <0xf7 0x2>;
+ reg = <0x41100 0x100 0x41300 4>;
+ interrupts = <0 0 3 0
+ 1 0 3 0
+ 2 0 3 0
+ 3 0 3 0>;
+ };
+
+ timer@42100 {
+ compatible = "fsl,mpic-global-timer";
+ reg = <0x42100 0x100 0x42300 4>;
+ interrupts = <4 0 3 0
+ 5 0 3 0
+ 6 0 3 0
+ 7 0 3 0>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
- #interrupt-cells = <2>;
+ #interrupt-cells = <4>;
reg = <0x40000 0x40000>;
- compatible = "chrp,open-pic";
+ compatible = "fsl,mpic";
device_type = "open-pic";
};
@@ -519,14 +531,14 @@
reg = <0x41600 0x80>;
msi-available-ranges = <0 0x100>;
interrupts = <
- 0xe0 0
- 0xe1 0
- 0xe2 0
- 0xe3 0
- 0xe4 0
- 0xe5 0
- 0xe6 0
- 0xe7 0>;
+ 0xe0 0 0 0
+ 0xe1 0 0 0
+ 0xe2 0 0 0
+ 0xe3 0 0 0
+ 0xe4 0 0 0
+ 0xe5 0 0 0
+ 0xe6 0 0 0
+ 0xe7 0 0 0>;
};
global-utilities@e0000 { //global utilities block
@@ -547,7 +559,7 @@
ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
clock-frequency = <33333333>;
- interrupts = <16 2>;
+ interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
@@ -582,7 +594,7 @@
ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
clock-frequency = <33333333>;
- interrupts = <16 2>;
+ interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
@@ -618,7 +630,7 @@
ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
clock-frequency = <33333333>;
- interrupts = <16 2>;
+ interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
--
1.7.1
^ permalink raw reply related
* [PATCH] powerpc/booke: Correct the SPRN_MAS5 definition.
From: Scott Wood @ 2011-03-24 21:50 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
From: Varun Sethi <Varun.Sethi@freescale.com>
339 is the SPR number for MAS5 documented by Power ISA 2.06, and
implemented by e500mc. It is not yet used anywhere in the kernel,
so nothing should be relying on the wrong number.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/include/asm/reg_booke.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 86ad812..3b1a9b7 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -110,7 +110,7 @@
#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
-#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
+#define SPRN_MAS5 0x153 /* MMU Assist Register 5 */
#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
#define SPRN_PID1 0x279 /* Process ID Register 1 */
#define SPRN_PID2 0x27A /* Process ID Register 2 */
--
1.7.1
^ permalink raw reply related
* [PATCH] powerpc: ARCH_PFN_OFFSET should be unsigned long
From: Scott Wood @ 2011-03-24 21:51 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
pfns are unsigned long, but MEMORY_START is phys_addr_t. This leads
to page_to_pfn() returning phys_addr_t, and thus type mismatches in a few
print statements.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/include/asm/page.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index da4b200..2cd664e 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -100,7 +100,7 @@ extern phys_addr_t kernstart_addr;
#endif
#ifdef CONFIG_FLATMEM
-#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT)
+#define ARCH_PFN_OFFSET ((unsigned long)(MEMORY_START >> PAGE_SHIFT))
#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
#endif
--
1.7.1
^ permalink raw reply related
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