* Re: [PATCH]powerpc: Force page alignment for early reserved memory
From: Benjamin Herrenschmidt @ 2011-05-20 22:27 UTC (permalink / raw)
To: Dave Carroll; +Cc: LPPC (E-mail), Paul Mackerras (E-mail), LKML (E-mail)
In-Reply-To: <522F24EF533FC546962ECFA2054FF777373072AB71@MAILSERVER2.cos.astekcorp.com>
On Fri, 2011-05-20 at 15:26 -0600, Dave Carroll wrote:
> When using 64K pages with a separate cpio rootfs, U-Boot will align the rootfs on a 4K
> page boundary. When the memory is reserved, and subsequent early memblock_alloc
> is called, it will allocate memory between the 64K page alignment and reserved
> memory. When the reserved memory is subsequently freed, it is done so by pages,
> causing the early memblock_alloc requests to be re-used, which in my case, caused
> the device-tree to be clobbered.
>
> This patch forces all early reserved memory to be kernel page aligned, to match
> the mechanism used to free reserved memory.
Hrm...
Reserved memory isn't normally freed. The rootfs is a special case here,
shouldn't we special case it and thus align that specific reserve at the
call site ?
Not a huge deal either way now that I fixed memblock_reserve() to cope
with overlaps but could be a problem if we want to backport your patch.
Cheers,
Ben.
> Signed-off-by: Dave Carroll <dcarroll@astekcorp.com>
> ---
> arch/powerpc/kernel/prom.c | 21 +++++++++++++++++----
> 1 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
> index e74fa12..2744792 100644
> --- a/arch/powerpc/kernel/prom.c
> +++ b/arch/powerpc/kernel/prom.c
> @@ -534,6 +534,19 @@ void __init early_init_dt_setup_initrd_arch(unsigned long start,
> }
> #endif
>
> +static void __init reserve_mem(u64 base, u64 size)
> +{
> + u64 top = base + size;
> + if (size == 0)
> + return;
> +
> + base = _ALIGN_DOWN(base, PAGE_SIZE);
> + top = _ALIGN_UP(top, PAGE_SIZE);
> + size = top - base;
> + memblock_reserve(base, size);
> +
> +}
> +
> static void __init early_reserve_mem(void)
> {
> u64 base, size;
> @@ -547,12 +560,12 @@ static void __init early_reserve_mem(void)
> /* before we do anything, lets reserve the dt blob */
> self_base = __pa((unsigned long)initial_boot_params);
> self_size = initial_boot_params->totalsize;
> - memblock_reserve(self_base, self_size);
> + reserve_mem(self_base, self_size);
>
> #ifdef CONFIG_BLK_DEV_INITRD
> /* then reserve the initrd, if any */
> if (initrd_start && (initrd_end > initrd_start))
> - memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
> + reserve_mem(__pa(initrd_start), initrd_end - initrd_start);
> #endif /* CONFIG_BLK_DEV_INITRD */
>
> #ifdef CONFIG_PPC32
> @@ -573,7 +586,7 @@ static void __init early_reserve_mem(void)
> if (base_32 == self_base && size_32 == self_size)
> continue;
> DBG("reserving: %x -> %x\n", base_32, size_32);
> - memblock_reserve(base_32, size_32);
> + reserve_mem(base_32, size_32);
> }
> return;
> }
> @@ -584,7 +597,7 @@ static void __init early_reserve_mem(void)
> if (size == 0)
> break;
> DBG("reserving: %llx -> %llx\n", base, size);
> - memblock_reserve(base, size);
> + reserve_mem(base, size);
> }
> }
>
> --
> 1.7.4
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
* Re: [stable] [PATCH] powerpc: Fix 32-bit SMP build
From: Benjamin Herrenschmidt @ 2011-05-20 22:24 UTC (permalink / raw)
To: Greg KH; +Cc: linuxppc-dev, stable
In-Reply-To: <20110520215835.GA14918@kroah.com>
On Fri, 2011-05-20 at 14:58 -0700, Greg KH wrote:
> On Fri, May 20, 2011 at 04:22:25PM -0400, Josh Boyer wrote:
> > Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
> > however it uses a 64-bit instruction which is not valid on 32-bit
> > platforms. Use 'stw' instead.
> >
> > Reported-by: Richard Cochran <richardcochran@gmail.com>
> > Tested-by: Richard Cochran <richardcochran@gmail.com>
> > Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> >
> > ---
>
> <formletter>
>
> This is not the correct way to submit patches for inclusion in the
> stable kernel tree. Please read Documentation/stable_kernel_rules.txt
> for how to do this properly.
>
> </formletter>
The function is in a different place in 2.6.39 anyways. I'll do a proper
backport when Linus merges this one.
Cheers,
Ben.
^ permalink raw reply
* Re: [bg-linux] [PATCH 6/7] [RFC] enable early TLBs for BG/P
From: Benjamin Herrenschmidt @ 2011-05-20 22:20 UTC (permalink / raw)
To: Eric Van Hensbergen; +Cc: Kazutomo Yoshii, linuxppc-dev, linux-kernel, bg-linux
In-Reply-To: <BANLkTikG9mfzXM0WmWxPLhjGD-M6AVznkw@mail.gmail.com>
On Fri, 2011-05-20 at 08:01 -0500, Eric Van Hensbergen wrote:
> On Thu, May 19, 2011 at 10:52 PM, Benjamin Herrenschmidt
> <benh@kernel.crashing.org> wrote:
> >> Unfortunately, the firmware is also required:
> >> - to configure Blue Gene Interrupt Controller(BIC)
> >> - to configure Torus DMA unit. e.g. fifo
> >> - to configure global interrupt (even we don't use, we need to disable
> >> some channel correctly)
> >
> > Can't we just write bare metal code for that ?
> >
>
> The kittyhawk code has the bare-metal equivalents for all of these.
> When I get to the drivers, I'll favor the kittyhawk versions for
> submission and then we'll see if it would be possible to adapt the HPC
> extensions to use the bare-metal versions of the drivers versus the
> firmware interface.
Ok. We can also start with using the FW and then migrate to bare metal.
> >> - to access node personality information (node id, DDR size, HZ, etc) or
> >> maybe we can directly access SRAM?
> >
> > That should be turned into device-tree at boot, possibly from a
> > bootloader or from the zImage wrapper.
> >
>
> This is the approach is used by the kittyhawk u-boot approach.
> However, it would also be just as easy to construct an in-memory
> device-tree within Linux by mapping the personality page and copying
> the relevant bits out. This has the advantage of being able to boot
> Linux directly on the nodes without an intermediary boot loader (which
> kittyhawk uses just to allow us customize which kernel boots on a
> node-to-node basis whereas the stock system boots the same kernel on
> all the nodes within a partition allocation (64-40,000 nodes)).
We can do that from the zImage wrapper... that would be nicer than doing
it from the kernel itself unless there's good reasons to do so like
iSeries.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table
From: Benjamin Herrenschmidt @ 2011-05-20 22:15 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20110520155719.32e51635@schlenkerla.am.freescale.net>
On Fri, 2011-05-20 at 15:57 -0500, Scott Wood wrote:
> I see a 2% cost going from virtual pmd to full 4-level walk in the
> benchmark mentioned above (some type of sort), and just under 3% in
> page-stride lat_mem_rd from lmbench.
>
> OTOH, the virtual pmd approach still leaves the possibility of taking a
> bunch of virtual page table misses if non-localized accesses happen over a
> very large chunk of address space (tens of GiB), and we'd have one fewer
> type of TLB miss to worry about complexity-wise with a straight table walk.
>
> Let me know what you'd prefer.
I'm tempted to kill the virtual linear feature alltogether.. it didn't
buy us that much. Have you looked if you can snatch back some of those
cycles with hand tuning of the level walker ?
Would it work/help to have a simple cache of the last pmd & address and
compare just that ? Maybe in a SPRG or a known cache hot location like
the PACA in a line that we already load anyways ?
Cheers,
Ben.
^ permalink raw reply
* Re: [stable] [PATCH] powerpc: Fix 32-bit SMP build
From: Greg KH @ 2011-05-20 21:58 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev, stable
In-Reply-To: <20110520202225.GI25179@zod.rchland.ibm.com>
On Fri, May 20, 2011 at 04:22:25PM -0400, Josh Boyer wrote:
> Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
> however it uses a 64-bit instruction which is not valid on 32-bit
> platforms. Use 'stw' instead.
>
> Reported-by: Richard Cochran <richardcochran@gmail.com>
> Tested-by: Richard Cochran <richardcochran@gmail.com>
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
>
> ---
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read Documentation/stable_kernel_rules.txt
for how to do this properly.
</formletter>
^ permalink raw reply
* [PATCH]powerpc: Force page alignment for early reserved memory
From: Dave Carroll @ 2011-05-20 21:26 UTC (permalink / raw)
To: Benjamin Herrenschmidt (E-mail), Paul Mackerras (E-mail),
Grant Likely (E-mail)
Cc: LPPC (E-mail), LKML (E-mail)
When using 64K pages with a separate cpio rootfs, U-Boot will align the roo=
tfs on a 4K
page boundary. When the memory is reserved, and subsequent early memblock_a=
lloc
is called, it will allocate memory between the 64K page alignment and reser=
ved
memory. When the reserved memory is subsequently freed, it is done so by pa=
ges,
causing the early memblock_alloc requests to be re-used, which in my case, =
caused
the device-tree to be clobbered.
This patch forces all early reserved memory to be kernel page aligned, to m=
atch
the mechanism used to free reserved memory.
Signed-off-by: Dave Carroll <dcarroll@astekcorp.com>
---
arch/powerpc/kernel/prom.c | 21 +++++++++++++++++----
1 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index e74fa12..2744792 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -534,6 +534,19 @@ void __init early_init_dt_setup_initrd_arch(unsigned l=
ong start,
}
#endif
+static void __init reserve_mem(u64 base, u64 size)
+{
+ u64 top =3D base + size;
+ if (size =3D=3D 0)
+ return;
+
+ base =3D _ALIGN_DOWN(base, PAGE_SIZE);
+ top =3D _ALIGN_UP(top, PAGE_SIZE);
+ size =3D top - base;
+ memblock_reserve(base, size);
+
+}
+
static void __init early_reserve_mem(void)
{
u64 base, size;
@@ -547,12 +560,12 @@ static void __init early_reserve_mem(void)
/* before we do anything, lets reserve the dt blob */
self_base =3D __pa((unsigned long)initial_boot_params);
self_size =3D initial_boot_params->totalsize;
- memblock_reserve(self_base, self_size);
+ reserve_mem(self_base, self_size);
#ifdef CONFIG_BLK_DEV_INITRD
/* then reserve the initrd, if any */
if (initrd_start && (initrd_end > initrd_start))
- memblock_reserve(__pa(initrd_start), initrd_end - initrd_st=
art);
+ reserve_mem(__pa(initrd_start), initrd_end - initrd_start);
#endif /* CONFIG_BLK_DEV_INITRD */
#ifdef CONFIG_PPC32
@@ -573,7 +586,7 @@ static void __init early_reserve_mem(void)
if (base_32 =3D=3D self_base && size_32 =3D=3D self=
_size)
continue;
DBG("reserving: %x -> %x\n", base_32, size_32);
- memblock_reserve(base_32, size_32);
+ reserve_mem(base_32, size_32);
}
return;
}
@@ -584,7 +597,7 @@ static void __init early_reserve_mem(void)
if (size =3D=3D 0)
break;
DBG("reserving: %llx -> %llx\n", base, size);
- memblock_reserve(base, size);
+ reserve_mem(base, size);
}
}
--
1.7.4
^ permalink raw reply related
* Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table
From: Scott Wood @ 2011-05-20 20:57 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1305754435.7481.3.camel@pasglop>
On Thu, 19 May 2011 07:33:55 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote:
> > Loads with non-linear access patterns were producing a very high
> > ratio of recursive pt faults to regular tlb misses. Rather than
> > choose between a 4-level table walk or a 1-level virtual page table
> > lookup, use a hybrid scheme with a virtual linear pmd, followed by a
> > 2-level lookup in the normal handler.
> >
> > This adds about 5 cycles (assuming no cache misses, and e5500 timing)
> > to a normal TLB miss, but greatly reduces the recursive fault rate
> > for loads which don't have locality within 2 MiB regions but do have
> > significant locality within 1 GiB regions. Improvements of close to 50%
> > were seen on such benchmarks.
>
> Can you publish benchmarks that compare these two with no virtual at all
> (4 full loads) ?
I see a 2% cost going from virtual pmd to full 4-level walk in the
benchmark mentioned above (some type of sort), and just under 3% in
page-stride lat_mem_rd from lmbench.
OTOH, the virtual pmd approach still leaves the possibility of taking a
bunch of virtual page table misses if non-localized accesses happen over a
very large chunk of address space (tens of GiB), and we'd have one fewer
type of TLB miss to worry about complexity-wise with a straight table walk.
Let me know what you'd prefer.
-Scott
^ permalink raw reply
* Re: [PATCH 0/7] This patchset adds support for running Linux under the Freescale hypervisor,
From: Kumar Gala @ 2011-05-20 20:29 UTC (permalink / raw)
To: Timur Tabi; +Cc: linux-kernel, akpm, linux-console, greg, linuxppc-dev
In-Reply-To: <1305813272-31826-1-git-send-email-timur@freescale.com>
On May 19, 2011, at 8:54 AM, Timur Tabi wrote:
> have hypervisor extensions (e.g. the P4080 which has an e500mc core).
>=20
> I think it makes sense for this patchset to go through Kumar Gala's =
-next=20
> branch, but I still need ACKs from various people on the parts that =
are
> not e500-specific.
>=20
> 1. powerpc: make irq_choose_cpu() available to all PIC drivers
> 2. powerpc: introduce ePAPR embedded hypervisor hcall interface
> 3. powerpc: introduce the ePAPR embedded hypervisor vmpic driver
> 4. powerpc: add Freescale hypervisor partition control functions
> 5. powerpc/85xx: add board support for the Freescale hypervisor
> 6. tty/powerpc: introduce the ePAPR embedded hypervisor byte channel =
driver
> 7. drivers/misc: introduce Freescale hypervisor management driver
>=20
> Ben Herrenschmidt, please review/ack parts 1-3.
>=20
> Greg Kroah-Hartman, please review/ack part 6.
>=20
> Andrew Morton, please review/ack part 7.
>=20
> Thank you very much for looking at this patchset. I hope to have it =
included=20
> in 2.6.40.
Applied to 'test' branch. (grabbed 'v2' of tty patch). Fixed merged =
conflicts.
- k=
^ permalink raw reply
* Re: PATCH: powerpc: remove unused variable assignment
From: Stratos Psomadakis @ 2011-05-20 20:31 UTC (permalink / raw)
To: Marcus Meissner; +Cc: akpm, paulus, linuxppc-dev, linux-kernel
In-Reply-To: <20110520091346.GC29499@suse.de>
On 05/20/2011 12:13 PM, Marcus Meissner wrote:
> Hi,
>
> gcc 4.6 with -Werror does not like setting but not using variables
> anymore.
>
> So remove it, it does not seem necessary.
>
> Signed-off-by: Marcus Meissner <meissner@suse.de>
>
> Ciao, Marcus
> ---
> arch/powerpc/include/asm/pgtable-ppc64.h | 8 ++------
> 1 files changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
> index 2b09cd5..c3d39de 100644
> --- a/arch/powerpc/include/asm/pgtable-ppc64.h
> +++ b/arch/powerpc/include/asm/pgtable-ppc64.h
> @@ -257,21 +257,17 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
> static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
> pte_t *ptep)
> {
> - unsigned long old;
> -
> if ((pte_val(*ptep) & _PAGE_RW) == 0)
> return;
> - old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
> + pte_update(mm, addr, ptep, _PAGE_RW, 0);
> }
>
> static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
> unsigned long addr, pte_t *ptep)
> {
> - unsigned long old;
> -
> if ((pte_val(*ptep) & _PAGE_RW) == 0)
> return;
> - old = pte_update(mm, addr, ptep, _PAGE_RW, 1);
> + pte_update(mm, addr, ptep, _PAGE_RW, 1);
> }
>
> /*
It's already in the ppc repo [1]. And going to be merged in 2.6.40 I
think. :)
[1]
http://git.kernel.org/?p=linux/kernel/git/benh/powerpc.git;a=commit;h=2a2c29c1a581319f4485af55e8d628d89e8f2583
--
Stratos Psomadakis
<psomas@ece.ntua.gr>
^ permalink raw reply
* [PATCH] powerpc: Fix 32-bit SMP build
From: Josh Boyer @ 2011-05-20 20:22 UTC (permalink / raw)
To: benh, linuxppc-dev; +Cc: stable
Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
however it uses a 64-bit instruction which is not valid on 32-bit
platforms. Use 'stw' instead.
Reported-by: Richard Cochran <richardcochran@gmail.com>
Tested-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
---
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 402560e..998a100 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -700,7 +700,7 @@ _GLOBAL(start_secondary_resume)
rlwinm r1,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() */
addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
li r3,0
- std r3,0(r1) /* Zero the stack frame pointer */
+ stw r3,0(r1) /* Zero the stack frame pointer */
bl start_secondary
b .
#endif /* CONFIG_SMP */
^ permalink raw reply related
* Re: [git pull] Please pull powerpc.git merge branch
From: Kumar Gala @ 2011-05-20 20:13 UTC (permalink / raw)
To: Josh Boyer
Cc: Richard Cochran, Linux Kernel list, linuxppc-dev list,
Andrew Morton, Linus Torvalds
In-Reply-To: <20110520144653.GH25179@zod.rchland.ibm.com>
On May 20, 2011, at 9:46 AM, Josh Boyer wrote:
> On Fri, May 20, 2011 at 04:32:59PM +0200, Richard Cochran wrote:
>> On Fri, May 20, 2011 at 09:58:45AM -0400, Josh Boyer wrote:
>>> On Fri, May 20, 2011 at 03:23:29PM +0200, Richard Cochran wrote:
>>>> When I try to build 'next' (now at 208b3a4c), it does not compile =
due
>>>> to a change from the following commit.
>>>>=20
>>>>> Benjamin Herrenschmidt (1):
>>>>> powerpc/smp: Make start_secondary_resume available to all CPU =
variants
>>>>=20
>>>> I would appreciate your help in getting this fixed...
>>>=20
>>> Could you try the patch below?
>>=20
>> Yes, and it both compiles and boots.
>=20
> Thanks for testing!
>=20
> Ben, can you pull this patch in as-is (fixing up the Subject), or do =
you
> need me to resubmit it?
Yeah, we need this all so we can send it to stable for 2.6.39.1
- k=
^ permalink raw reply
* [PATCH v2] powerpc: Add a defconfig for 'corenet' 32-bit platforms
From: Kumar Gala @ 2011-05-20 20:02 UTC (permalink / raw)
To: linuxppc-dev
The e500mc and e5500 based cores are only available on corenet based
SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs
and any future processors in these families.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
* Removed MATH_EMU
* Added KEXEC
arch/powerpc/configs/corenet32_smp_defconfig | 183 ++++++++++++++++++++++++++
1 files changed, 183 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/configs/corenet32_smp_defconfig
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
new file mode 100644
index 0000000..53f3949
--- /dev/null
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -0,0 +1,183 @@
+CONFIG_PPC_85xx=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=8
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_AUDIT=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_RCU_TRACE=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_P3041_DS=y
+CONFIG_P4080_DS=y
+CONFIG_P5020_DS=y
+CONFIG_HIGHMEM=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_MISC=m
+CONFIG_KEXEC=y
+CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_FSL_LBC=y
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+# CONFIG_PCIEASPM is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_SUB_POLICY=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_ARPD=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_IP_SCTP=m
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_M25P80=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_FSL=y
+CONFIG_SATA_SIL24=y
+CONFIG_SATA_SIL=y
+CONFIG_PATA_SIL680=y
+CONFIG_NETDEVICES=y
+CONFIG_VITESSE_PHY=y
+CONFIG_FIXED_PHY=y
+CONFIG_NET_ETHERNET=y
+CONFIG_E1000=y
+CONFIG_E1000E=y
+CONFIG_FSL_PQ_MDIO=y
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_HW_RANDOM=y
+CONFIG_NVRAM=y
+CONFIG_I2C=y
+CONFIG_I2C_MPC=y
+CONFIG_SPI=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_FSL_SPI=y
+CONFIG_SPI_FSL_ESPI=y
+# CONFIG_HWMON is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_USB_HID=m
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_OF=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=y
+CONFIG_EDAC_MPC85XX=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_RTC_DRV_CMOS=y
+CONFIG_UIO=y
+CONFIG_STAGING=y
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=m
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH 1/2] powerpc/book3e-64: hv exceptions aren't MASKABLE
From: Scott Wood @ 2011-05-20 19:39 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <029E9D3E-D310-4DB6-9D0C-5E59705B2676@kernel.crashing.org>
On Fri, 20 May 2011 14:36:09 -0500
Kumar Gala <galak@kernel.crashing.org> wrote:
>
> On May 20, 2011, at 2:00 PM, Scott Wood wrote:
>
> > In general we will not have EE soft-disabled or be napping when
> > these exceptions happen, but still it is not correct.
> >
> > The guest doorbell exceptions can only be triggered with MSR[GS]=1,
> > and thus for host kernel nesting purposes are base-level exceptions.
> >
> > Note that ehpriv and hypercall are triggerable from normal userspace.
> > I tested that the process gets properly signalled in this case.
> >
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
> > ---
> > arch/powerpc/include/asm/reg_booke.h | 2 +
> > arch/powerpc/kernel/exceptions-64e.S | 67 ++++++++++++++++++++++++++--------
> > 2 files changed, 53 insertions(+), 16 deletions(-)
>
> Can you look at a similar patch for 32-bit fsl-booke so we handle HV exceptions if they happen to get generated, maybe something already exists for KVM.
Yes.
-Scott
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/book3e-64: hv exceptions aren't MASKABLE
From: Kumar Gala @ 2011-05-20 19:36 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20110520190030.GA7058@schlenkerla.am.freescale.net>
On May 20, 2011, at 2:00 PM, Scott Wood wrote:
> In general we will not have EE soft-disabled or be napping when
> these exceptions happen, but still it is not correct.
>=20
> The guest doorbell exceptions can only be triggered with MSR[GS]=3D1,
> and thus for host kernel nesting purposes are base-level exceptions.
>=20
> Note that ehpriv and hypercall are triggerable from normal userspace.
> I tested that the process gets properly signalled in this case.
>=20
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/include/asm/reg_booke.h | 2 +
> arch/powerpc/kernel/exceptions-64e.S | 67 =
++++++++++++++++++++++++++--------
> 2 files changed, 53 insertions(+), 16 deletions(-)
Can you look at a similar patch for 32-bit fsl-booke so we handle HV =
exceptions if they happen to get generated, maybe something already =
exists for KVM.
- k=
^ permalink raw reply
* Re: [PATCH 02/14] powerpc: Add a defconfig for 'corenet' 32-bit platforms
From: Scott Wood @ 2011-05-20 19:30 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4DD6C023.2080601@freescale.com>
On Fri, 20 May 2011 14:25:23 -0500
Timur Tabi <timur@freescale.com> wrote:
> Kumar Gala wrote:
> >> > This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
> >> > to 12 because the DIU driver needs to be able to allocate a contiguous
> >> > 5MB memory block. Setting it to 13 means a max of 16MB. Is there a
> >> > reason the default isn't good enough?
>
> > Is there some concern here? CONFIG_FORCE_MAX_ZONE_ORDER was set to 13 because of hugetlbfs
>
> No, I just wanted to make sure it wasn't something that you just set for no
> particular reason.
>
> Hmm... is 16MB big enough for hugetlbfs? I presume PAGE_SIZE is still 4KB, so a
> value of 13 is just 16MB.
I think there's a separate mechanism for reserving hugetlbfs space at boot
time. 16 MiB should be enough for fully dynamic allocations, and if you
push it too high fragmentation will likely be too much of a problem.
-Scott
^ permalink raw reply
* Re: [PATCH 02/14] powerpc: Add a defconfig for 'corenet' 32-bit platforms
From: Timur Tabi @ 2011-05-20 19:25 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <64A1571F-0AF7-4717-8D6F-4A980E09DFE0@kernel.crashing.org>
Kumar Gala wrote:
>> > This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
>> > to 12 because the DIU driver needs to be able to allocate a contiguous
>> > 5MB memory block. Setting it to 13 means a max of 16MB. Is there a
>> > reason the default isn't good enough?
> Is there some concern here? CONFIG_FORCE_MAX_ZONE_ORDER was set to 13 because of hugetlbfs
No, I just wanted to make sure it wasn't something that you just set for no
particular reason.
Hmm... is 16MB big enough for hugetlbfs? I presume PAGE_SIZE is still 4KB, so a
value of 13 is just 16MB.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 02/14] powerpc: Add a defconfig for 'corenet' 32-bit platforms
From: Kumar Gala @ 2011-05-20 19:20 UTC (permalink / raw)
To: Tabi Timur-B04825; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <BANLkTimzQ3PUpJQB_sF+PM9DAL+kAYgDYw@mail.gmail.com>
On May 20, 2011, at 9:45 AM, Tabi Timur-B04825 wrote:
> On Fri, May 20, 2011 at 1:09 AM, Kumar Gala =
<galak@kernel.crashing.org> wrote:
>=20
>> +CONFIG_MATH_EMULATION=3Dy
>=20
> Don't these chips have hardware floating point?
Darn, I thought I looked at that. Will fix.
>> +CONFIG_FORCE_MAX_ZONEORDER=3D13
>=20
> This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
> to 12 because the DIU driver needs to be able to allocate a contiguous
> 5MB memory block. Setting it to 13 means a max of 16MB. Is there a
> reason the default isn't good enough?
Is there some concern here? CONFIG_FORCE_MAX_ZONE_ORDER was set to 13 =
because of hugetlbfs=
^ permalink raw reply
* Re: [PATCH 05/14] powerpc/85xx: Updates to P4080DS device tree
From: Kumar Gala @ 2011-05-20 19:09 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20110520140411.75bdea77@schlenkerla.am.freescale.net>
On May 20, 2011, at 2:04 PM, Scott Wood wrote:
> On Fri, 20 May 2011 01:09:22 -0500
> Kumar Gala <galak@kernel.crashing.org> wrote:
>
>> * Added BSD dual-license
>> * Moved mpic-parent to root so we dont need to duplicate everywhere
>> * Added next level cache from L2 to CPC
>> * Moved to 4-cell MPIC interrupt properties
>> * Added 3 MSI banks
>> * Added numerous missing nodes: soc-sram-error, guts, pins, clockgen,
>> rcpm, sfp, serdes, etc.
>> * Reworked PCIe interrupts to be at virtual bridge level
>
> Have all the new device tree bits (e.g. guts) had bindings posted upstream
> yet?
probably not :(
Will look at our bindings dir and see which ones need upstream pushing.
- k
^ permalink raw reply
* Re: [PATCH 05/14] powerpc/85xx: Updates to P4080DS device tree
From: Scott Wood @ 2011-05-20 19:04 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1305871771-16334-5-git-send-email-galak@kernel.crashing.org>
On Fri, 20 May 2011 01:09:22 -0500
Kumar Gala <galak@kernel.crashing.org> wrote:
> * Added BSD dual-license
> * Moved mpic-parent to root so we dont need to duplicate everywhere
> * Added next level cache from L2 to CPC
> * Moved to 4-cell MPIC interrupt properties
> * Added 3 MSI banks
> * Added numerous missing nodes: soc-sram-error, guts, pins, clockgen,
> rcpm, sfp, serdes, etc.
> * Reworked PCIe interrupts to be at virtual bridge level
Have all the new device tree bits (e.g. guts) had bindings posted upstream
yet?
-Scott
^ permalink raw reply
* [PATCH 2/2] powerpc/book3e-64: reraise doorbell when masked by soft-irq-disable
From: Scott Wood @ 2011-05-20 19:00 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/kernel/exceptions-64e.S | 22 +++++++++++++++++++++-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index b60f49e..87ca569 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -123,6 +123,12 @@
std r14,PACA_EXMC+EX_R14(r13); \
std r15,PACA_EXMC+EX_R15(r13)
+#define PROLOG_ADDITION_DOORBELL_GEN \
+ lbz r11,PACASOFTIRQEN(r13); /* are irqs soft-disabled ? */ \
+ cmpwi cr0,r11,0; /* yes -> go out of line */ \
+ beq masked_doorbell_book3e;
+
+
/* Core exception code for all exceptions except TLB misses.
* XXX: Needs to make SPRN_SPRG_GEN depend on exception type
*/
@@ -466,7 +472,13 @@ kernel_dbg_exc:
MASKABLE_EXCEPTION(0x260, perfmon, .performance_monitor_exception, ACK_NONE)
/* Doorbell interrupt */
- MASKABLE_EXCEPTION(0x2070, doorbell, .doorbell_exception, ACK_NONE)
+ START_EXCEPTION(doorbell)
+ NORMAL_EXCEPTION_PROLOG(0x2070, PROLOG_ADDITION_DOORBELL)
+ EXCEPTION_COMMON(0x2070, PACA_EXGEN, INTS_DISABLE_ALL)
+ CHECK_NAPPING()
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .doorbell_exception
+ b .ret_from_except_lite;
/* Doorbell critical Interrupt */
START_EXCEPTION(doorbell_crit);
@@ -521,8 +533,16 @@ kernel_dbg_exc:
* An interrupt came in while soft-disabled; clear EE in SRR1,
* clear paca->hard_enabled and return.
*/
+masked_doorbell_book3e:
+ mtcr r10
+ /* Resend the doorbell to fire again when ints enabled */
+ mfspr r10,SPRN_PIR
+ PPC_MSGSND(r10)
+ b masked_interrupt_book3e_common
+
masked_interrupt_book3e:
mtcr r10
+masked_interrupt_book3e_common:
stb r11,PACAHARDIRQEN(r13)
mfspr r10,SPRN_SRR1
rldicl r11,r10,48,1 /* clear MSR_EE */
--
1.7.4.1
^ permalink raw reply related
* [PATCH 1/2] powerpc/book3e-64: hv exceptions aren't MASKABLE
From: Scott Wood @ 2011-05-20 19:00 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In general we will not have EE soft-disabled or be napping when
these exceptions happen, but still it is not correct.
The guest doorbell exceptions can only be triggered with MSR[GS]=1,
and thus for host kernel nesting purposes are base-level exceptions.
Note that ehpriv and hypercall are triggerable from normal userspace.
I tested that the process gets properly signalled in this case.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/include/asm/reg_booke.h | 2 +
arch/powerpc/kernel/exceptions-64e.S | 67 ++++++++++++++++++++++++++--------
2 files changed, 53 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 0f0ad9f..e438286 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -67,6 +67,8 @@
#define SPRN_EPTCFG 0x15e /* Embedded Page Table Config */
#define SPRN_MAS7_MAS3 0x174 /* MMU Assist Register 7 || 3 */
#define SPRN_MAS0_MAS1 0x175 /* MMU Assist Register 0 || 1 */
+#define SPRN_GSRR0 0x17a /* Guest Save and Restore Register 0 */
+#define SPRN_GSRR1 0x17b /* Guest Save and Restore Register 1 */
#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */
#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */
#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 69de473..b60f49e 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -34,17 +34,17 @@
#define SPECIAL_EXC_FRAME_SIZE INT_FRAME_SIZE
/* Exception prolog code for all exceptions */
-#define EXCEPTION_PROLOG(n, type, addition) \
- mtspr SPRN_SPRG_##type##_SCRATCH,r13; /* get spare registers */ \
+#define EXCEPTION_PROLOG(n, level, type, addition) \
+ mtspr SPRN_SPRG_##level##_SCRATCH,r13; /* get spare registers */ \
mfspr r13,SPRN_SPRG_PACA; /* get PACA */ \
- std r10,PACA_EX##type+EX_R10(r13); \
- std r11,PACA_EX##type+EX_R11(r13); \
+ std r10,PACA_EX##level+EX_R10(r13); \
+ std r11,PACA_EX##level+EX_R11(r13); \
mfcr r10; /* save CR */ \
addition; /* additional code for that exc. */ \
- std r1,PACA_EX##type+EX_R1(r13); /* save old r1 in the PACA */ \
- stw r10,PACA_EX##type+EX_CR(r13); /* save old CR in the PACA */ \
+ std r1,PACA_EX##level+EX_R1(r13); /* save old r1 in the PACA */ \
+ stw r10,PACA_EX##level+EX_CR(r13); /* save old CR in the PACA */\
mfspr r11,SPRN_##type##_SRR1;/* what are we coming from */ \
- type##_SET_KSTACK; /* get special stack if necessary */\
+ level##_SET_KSTACK; /* get special stack if necessary */\
andi. r10,r11,MSR_PR; /* save stack pointer */ \
beq 1f; /* branch around if supervisor */ \
ld r1,PACAKSAVE(r13); /* get kernel stack coming from usr */\
@@ -76,17 +76,20 @@
#define SPRN_MC_SRR0 SPRN_MCSRR0
#define SPRN_MC_SRR1 SPRN_MCSRR1
+#define SPRN_GUEST_SRR0 SPRN_GSRR0
+#define SPRN_GUEST_SRR1 SPRN_GSRR1
+
#define NORMAL_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, GEN, addition##_GEN)
+ EXCEPTION_PROLOG(n, GEN, GEN, addition##_GEN)
#define CRIT_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, CRIT, addition##_CRIT)
+ EXCEPTION_PROLOG(n, CRIT, CRIT, addition##_CRIT)
#define DBG_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, DBG, addition##_DBG)
+ EXCEPTION_PROLOG(n, DBG, DBG, addition##_DBG)
#define MC_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, MC, addition##_MC)
+ EXCEPTION_PROLOG(n, MC, MC, addition##_MC)
/* Variants of the "addition" argument for the prolog
@@ -228,7 +231,7 @@ exc_##n##_bad_stack: \
std r7,TI_LOCAL_FLAGS(r11); \
1:
-
+/* Use for interrupts that should be masked by soft-EE */
#define MASKABLE_EXCEPTION(trapnum, label, hdlr, ack) \
START_EXCEPTION(label); \
NORMAL_EXCEPTION_PROLOG(trapnum, PROLOG_ADDITION_MASKABLE) \
@@ -476,11 +479,43 @@ kernel_dbg_exc:
// b ret_from_crit_except
b .
- MASKABLE_EXCEPTION(0x2c0, guest_doorbell, .unknown_exception, ACK_NONE)
- MASKABLE_EXCEPTION(0x2e0, guest_doorbell_crit, .unknown_exception, ACK_NONE)
- MASKABLE_EXCEPTION(0x310, hypercall, .unknown_exception, ACK_NONE)
- MASKABLE_EXCEPTION(0x320, ehpriv, .unknown_exception, ACK_NONE)
+ START_EXCEPTION(guest_doorbell);
+ EXCEPTION_PROLOG(0x2c0, GEN, GUEST, PROLOG_ADDITION_NONE_GEN)
+ EXCEPTION_COMMON(0x2c0, PACA_EXGEN, INTS_DISABLE_ALL)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ bl .unknown_exception
+ b .ret_from_except
+
+ /*
+ * Not really critical as far as host kernel exception nesting is
+ * concerned, but uses crit registers.
+ */
+ START_EXCEPTION(guest_doorbell_crit);
+ EXCEPTION_PROLOG(0x2e0, GEN, CRIT, PROLOG_ADDITION_NONE_GEN)
+ EXCEPTION_COMMON(0x2e0, PACA_EXGEN, INTS_DISABLE_ALL)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ bl .unknown_exception
+ b .ret_from_except
+
+ START_EXCEPTION(hypercall);
+ NORMAL_EXCEPTION_PROLOG(0x310, PROLOG_ADDITION_NONE)
+ EXCEPTION_COMMON(0x310, PACA_EXGEN, INTS_KEEP)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ INTS_RESTORE_HARD
+ bl .unknown_exception
+ b .ret_from_except
+ START_EXCEPTION(ehpriv);
+ NORMAL_EXCEPTION_PROLOG(0x320, PROLOG_ADDITION_NONE)
+ EXCEPTION_COMMON(0x320, PACA_EXGEN, INTS_KEEP)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ INTS_RESTORE_HARD
+ bl .unknown_exception
+ b .ret_from_except
/*
* An interrupt came in while soft-disabled; clear EE in SRR1,
--
1.7.4.1
^ permalink raw reply related
* [PATCH v2 2/2] powerpc: add support for MPIC message register API
From: Meador Inge @ 2011-05-20 16:36 UTC (permalink / raw)
To: linuxppc-dev; +Cc: openmcapi-dev, devicetree-discuss, Hollis Blanchard
In-Reply-To: <1305909399-26969-1-git-send-email-meador_inge@mentor.com>
Some MPIC implementations contain one or more blocks of message registers
that are used to send messages between cores via IPIs. A simple API has
been added to access (get/put, read, write, etc ...) these message registers.
The available message registers are initially discovered via nodes in the
device tree. A separate commit contains a binding for the message register
nodes.
Signed-off-by: Meador Inge <meador_inge@mentor.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Hollis Blanchard <hollis_blanchard@mentor.com>
---
arch/powerpc/include/asm/mpic_msgr.h | 35 +++++
arch/powerpc/platforms/Kconfig | 8 +
arch/powerpc/sysdev/Makefile | 3 +-
arch/powerpc/sysdev/mpic_msgr.c | 279 ++++++++++++++++++++++++++++++++++
4 files changed, 324 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/include/asm/mpic_msgr.h
create mode 100644 arch/powerpc/sysdev/mpic_msgr.c
diff --git a/arch/powerpc/include/asm/mpic_msgr.h b/arch/powerpc/include/asm/mpic_msgr.h
new file mode 100644
index 0000000..370dcb4
--- /dev/null
+++ b/arch/powerpc/include/asm/mpic_msgr.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#ifndef _ASM_MPIC_MSGR_H
+#define _ASM_MPIC_MSGR_H
+
+#include <linux/types.h>
+
+struct mpic_msgr {
+ u32 __iomem *addr;
+ u32 __iomem *mer;
+ u32 __iomem *msr;
+ int irq;
+ atomic_t in_use;
+ int num;
+};
+
+extern struct mpic_msgr* mpic_msgr_get(unsigned int reg_num);
+extern void mpic_msgr_put(struct mpic_msgr* msgr);
+extern void mpic_msgr_enable(struct mpic_msgr *msgr);
+extern void mpic_msgr_disable(struct mpic_msgr *msgr);
+extern void mpic_msgr_write(struct mpic_msgr *msgr, u32 message);
+extern u32 mpic_msgr_read(struct mpic_msgr *msgr);
+extern void mpic_msgr_clear(struct mpic_msgr *msgr);
+extern void mpic_msgr_set_destination(struct mpic_msgr *msgr, u32 cpu_num);
+extern int mpic_msgr_get_irq(struct mpic_msgr *msgr);
+
+#endif
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index f7b0772..4d65593 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -78,6 +78,14 @@ config MPIC_WEIRD
bool
default n
+config MPIC_MSGR
+ bool "MPIC message register support"
+ depends on MPIC
+ default n
+ help
+ Enables support for the MPIC message registers. These
+ registers are used for inter-processor communication.
+
config PPC_I8259
bool
default n
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 1e0c933..6d40185 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -3,7 +3,8 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
ccflags-$(CONFIG_PPC64) := -mno-minimal-toc
mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
-obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
+mpic-msgr-obj-$(CONFIG_MPIC_MSGR) += mpic_msgr.o
+obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) $(mpic-msgr-obj-y)
fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o
diff --git a/arch/powerpc/sysdev/mpic_msgr.c b/arch/powerpc/sysdev/mpic_msgr.c
new file mode 100644
index 0000000..bfa0612
--- /dev/null
+++ b/arch/powerpc/sysdev/mpic_msgr.c
@@ -0,0 +1,279 @@
+/*
+ * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
+ *
+ * Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
+ * Mingkai Hu from Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#include <linux/list.h>
+#include <linux/of_platform.h>
+#include <linux/errno.h>
+#include <asm/prom.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+#include <asm/mpic_msgr.h>
+
+#define MPIC_MSGR_REGISTERS_PER_BLOCK 4
+#define MSGR_INUSE 0
+#define MSGR_FREE 1
+
+/* Internal structure used *only* for IO mapping register blocks. */
+struct mpic_msgr_block {
+ struct msgr {
+ u32 msgr;
+ u8 res[12];
+ } msgrs[MPIC_MSGR_REGISTERS_PER_BLOCK];
+ u8 res0[192];
+ u32 mer;
+ u8 res1[12];
+ u32 msr;
+};
+
+static struct mpic_msgr **mpic_msgrs = 0;
+static unsigned int mpic_msgr_count = 0;
+
+struct mpic_msgr* mpic_msgr_get(unsigned int reg_num)
+{
+ struct mpic_msgr* msgr;
+
+ if (reg_num >= mpic_msgr_count)
+ return ERR_PTR(-ENODEV);
+
+ msgr = mpic_msgrs[reg_num];
+
+ if (atomic_cmpxchg(&msgr->in_use, MSGR_FREE, MSGR_INUSE) == MSGR_FREE)
+ return msgr;
+
+ return ERR_PTR(-EBUSY);
+}
+EXPORT_SYMBOL(mpic_msgr_get);
+
+void mpic_msgr_put(struct mpic_msgr* msgr)
+{
+ atomic_set(&msgr->in_use, MSGR_FREE);
+}
+EXPORT_SYMBOL(mpic_msgr_put);
+
+void mpic_msgr_enable(struct mpic_msgr *msgr)
+{
+ out_be32(msgr->mer, in_be32(msgr->mer) | (1 << msgr->num));
+}
+EXPORT_SYMBOL(mpic_msgr_enable);
+
+void mpic_msgr_disable(struct mpic_msgr *msgr)
+{
+ out_be32(msgr->mer, in_be32(msgr->mer) & ~(1 << msgr->num));
+}
+EXPORT_SYMBOL(mpic_msgr_disable);
+
+void mpic_msgr_write(struct mpic_msgr *msgr, u32 message)
+{
+ out_be32(msgr->addr, message);
+}
+EXPORT_SYMBOL(mpic_msgr_write);
+
+u32 mpic_msgr_read(struct mpic_msgr *msgr)
+{
+ return in_be32(msgr->addr);
+}
+EXPORT_SYMBOL(mpic_msgr_read);
+
+void mpic_msgr_clear(struct mpic_msgr *msgr)
+{
+ (void) mpic_msgr_read(msgr);
+}
+EXPORT_SYMBOL(mpic_msgr_clear);
+
+void mpic_msgr_set_destination(struct mpic_msgr *msgr, u32 cpu_num)
+{
+ out_be32(msgr->addr, 1 << cpu_num);
+}
+EXPORT_SYMBOL(mpic_msgr_set_destination);
+
+int mpic_msgr_get_irq(struct mpic_msgr *msgr)
+{
+ return msgr->irq;
+}
+EXPORT_SYMBOL(mpic_msgr_get_irq);
+
+/* The following three functions are used to compute the order and number of
+ * the message register blocks. They are clearly very inefficent. However,
+ * they are called *only* a few times during device initialization.
+ */
+static unsigned int mpic_msgr_number_of_blocks(void)
+{
+ unsigned int count;
+ struct device_node *aliases;
+
+ count = 0;
+ aliases = of_find_node_by_name(NULL, "aliases");
+
+ if (aliases) {
+ char buf[32];
+
+ for (;;) {
+ snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
+ if (!of_find_property(aliases, buf, NULL))
+ break;
+
+ count += 1;
+ }
+ }
+
+ return count;
+}
+
+static unsigned int mpic_msgr_number_of_registers(void)
+{
+ return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
+}
+
+static int mpic_msgr_block_number(struct device_node *node)
+{
+ struct device_node *aliases;
+ unsigned int index, number_of_blocks;
+ char buf[64];
+
+ number_of_blocks = mpic_msgr_number_of_blocks();
+ aliases = of_find_node_by_name(NULL, "aliases");
+ if (!aliases)
+ return -1;
+
+ for (index = 0; index < number_of_blocks; ++index) {
+ struct property *prop;
+
+ snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
+ prop = of_find_property(aliases, buf, NULL);
+ if (node == of_find_node_by_path(prop->value))
+ break;
+ }
+
+ return index == number_of_blocks ? -1 : index;
+}
+
+/* The probe function for a single message register block.
+ */
+static __devinit int mpic_msgr_probe(struct platform_device *dev)
+{
+ struct mpic_msgr_block __iomem *msgr_block;
+ int block_number;
+ struct resource rsrc;
+ unsigned int i;
+ unsigned int irq_index;
+ struct device_node *np = dev->dev.of_node;
+ unsigned int receive_mask;
+ const unsigned int *prop;
+
+ if (!np) {
+ dev_err(&dev->dev, "Device OF-Node is NULL");
+ return -EFAULT;
+ }
+
+ /* Allocate the message register array upon the first device
+ * registered.
+ */
+ if (!mpic_msgrs) {
+ mpic_msgr_count = mpic_msgr_number_of_registers();
+ dev_info(&dev->dev, "Found %d message registers\n", mpic_msgr_count);
+
+ mpic_msgrs = kzalloc(sizeof(struct mpic_msgr) * mpic_msgr_count,
+ GFP_KERNEL);
+ if (!mpic_msgrs) {
+ dev_err(&dev->dev, "No memory for message register blocks\n");
+ return -ENOMEM;
+ }
+ }
+ dev_info(&dev->dev, "Of-device full name %s\n", np->full_name);
+
+ /* IO map the message register block. */
+ of_address_to_resource(np, 0, &rsrc);
+ msgr_block = ioremap(rsrc.start, rsrc.end - rsrc.start);
+ if (!msgr_block) {
+ dev_err(&dev->dev, "Failed to iomap MPIC message registers");
+ return -EFAULT;
+ }
+
+ /* Ensure the block has a defined order. */
+ block_number = mpic_msgr_block_number(np);
+ if (block_number < 0) {
+ dev_err(&dev->dev, "Failed to find message register block alias\n");
+ return -ENODEV;
+ }
+ dev_info(&dev->dev, "Setting up message register block %d\n", block_number);
+
+ /* Grab the receive mask which specifies what registers can receive
+ * interrupts.
+ */
+ prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
+ receive_mask = (prop) ? *prop : 0xF;
+
+ /* Build up the appropriate message register data structures. */
+ for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
+ struct mpic_msgr *msgr;
+ unsigned int reg_number;
+
+ msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
+ if (!msgr) {
+ dev_err(&dev->dev, "No memory for message register\n");
+ return -ENOMEM;
+ }
+
+ reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
+ msgr->addr = &msgr_block->msgrs[i].msgr;
+ msgr->mer = &msgr_block->mer;
+ msgr->msr = &msgr_block->msr;
+ atomic_set(&msgr->in_use, MSGR_FREE);
+ msgr->num = reg_number;
+
+ if (receive_mask & (1 << i)) {
+ struct resource irq;
+
+ if (of_irq_to_resource(np, irq_index, &irq) == NO_IRQ) {
+ dev_err(&dev->dev, "Missing interrupt specifier");
+ kfree(msgr);
+ return -EFAULT;
+ }
+ msgr->irq = irq.start;
+ irq_index += 1;
+ } else {
+ msgr->irq = NO_IRQ;
+ }
+
+ mpic_msgrs[reg_number] = msgr;
+ mpic_msgr_disable(msgr);
+ dev_info(&dev->dev, "Register %d initialized: irq %d\n",
+ msgr->num, msgr->irq);
+
+ }
+
+ return 0;
+}
+
+static const struct of_device_id mpic_msgr_ids[] = {
+ {
+ .compatible = "fsl,mpic-v3.1-msgr",
+ .data = NULL,
+ },
+ {}
+};
+
+static struct platform_driver mpic_msgr_driver = {
+ .driver = {
+ .name = "mpic-msgr",
+ .owner = THIS_MODULE,
+ .of_match_table = mpic_msgr_ids,
+ },
+ .probe = mpic_msgr_probe,
+};
+
+static __init int mpic_msgr_init(void)
+{
+ return platform_driver_register(&mpic_msgr_driver);
+}
+subsys_initcall(mpic_msgr_init);
--
1.6.3.3
^ permalink raw reply related
* [PATCH v2 1/2] powerpc: document the FSL MPIC message register binding
From: Meador Inge @ 2011-05-20 16:36 UTC (permalink / raw)
To: linuxppc-dev; +Cc: openmcapi-dev, devicetree-discuss, Hollis Blanchard
In-Reply-To: <1305909399-26969-1-git-send-email-meador_inge@mentor.com>
This binding documents how the message register blocks found in some FSL
MPIC implementations shall be represented in a device tree.
Signed-off-by: Meador Inge <meador_inge@mentor.com>
Cc: Hollis Blanchard <hollis_blanchard@mentor.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
.../devicetree/bindings/powerpc/fsl/mpic-msgr.txt | 62 ++++++++++++++++++++
1 files changed, 62 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
new file mode 100644
index 0000000..385dba6
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
@@ -0,0 +1,62 @@
+* FSL MPIC Message Registers
+
+This binding specifies what properties must be available in the device tree
+representation of the message register groups found in some FSL MPIC
+implementations.
+
+Required properties:
+
+ - compatible: Specifies the compatibility list for the message register
+ block. The type shall be <string> and the value shall be of the form
+ "fsl,mpic-v<version>-msgr", where <version> is the version number of
+ the MPIC containing the message registers.
+
+ - reg: Specifies the base physical address(s) and size(s) of the
+ message register block's addressable register space. The type shall be
+ <prop-encoded-array>.
+
+ - interrupts: Specifies a list of interrupt source and level-sense pairs.
+ The type shall be <prop-encoded-array>. The length shall be equal to
+ the number of bits set in the 'msg-receive-mask' property value.
+
+Optional properties:
+
+ - mpic-msgr-receive-mask: Specifies what registers in the containing block
+ are allowed to receive interrupts. The value is a bit mask where a set
+ bit at bit 'n' indicates that message register 'n' can receive interrupts.
+ The type shall be <prop-encoded-array>. If not present, then all of
+ the message registers in the block are available.
+
+Aliases:
+
+ An alias should be created for every message register block. They are not
+ required, though. However, are particular implementation of this binding
+ may require aliases to be present. Aliases are of the form
+ 'mpic-msgr-block<n>', where <n> is an integer specifying the block's number.
+ Numbers shall start at 0.
+
+Example:
+
+ aliases {
+ mpic-msgr-block0 = &mpic_msgr_block0;
+ mpic-msgr-block1 = &mpic_msgr_block1;
+ };
+
+ mpic_msgr_block0: mpic-msgr-block@41400 {
+ compatible = "fsl,mpic-v3.1-msgr";
+ reg = <0x41400 0x200>;
+ // Message registers 0 and 2 in this block can receive interrupts on
+ // sources 0xb0 and 0xb2, respectively.
+ interrupts = <0xb0 2 0xb2 2>;
+ mpic-msgr-receive-mask = <0x5>;
+ };
+
+ mpic_msgr_block1: mpic-msgr-block@42400 {
+ compatible = "fsl,mpic-v3.1-msgr";
+ reg = <0x42400 0x200>;
+ // Message registers 0 and 2 in this block can receive interrupts on
+ // sources 0xb4 and 0xb6, respectively.
+ interrupts = <0xb4 2 0xb6 2>;
+ mpic-msgr-receive-mask = <0x5>;
+ };
+
--
1.6.3.3
^ permalink raw reply related
* [PATCH v2 0/2] powerpc: define and implement MPIC message register support
From: Meador Inge @ 2011-05-20 16:36 UTC (permalink / raw)
To: linuxppc-dev; +Cc: openmcapi-dev, devicetree-discuss, Hollis Blanchard
This patch set defines a binding for FSL MPIC message registers and implements
an API for accessing those message registers. Testing was done on a MPC8572DS
in an Linux-Linux AMP setup using OpenMCAPI (www.openmcapi.org) to communicate
between OS instances. The message register API is used by the OpenMCAPI shared
memory driver to send notifications between cores.
* v2 - Incorporate feedback from Scott Wood
* Make binding less implementation specific.
* Add 'mpic-' prefix to message register node properties and aliases.
* Remove 'interrupt-parent' from binding.
* Fixed some example bugs with receive masks.
Signed-off-by: Meador Inge <meador_inge@mentor.com>
Cc: Hollis Blanchard <hollis_blanchard@mentor.com>
Meador Inge (2):
powerpc: document the FSL MPIC message register binding
powerpc: add support for MPIC message register API
.../devicetree/bindings/powerpc/fsl/mpic-msgr.txt | 62 +++++
arch/powerpc/include/asm/mpic_msgr.h | 35 +++
arch/powerpc/platforms/Kconfig | 8 +
arch/powerpc/sysdev/Makefile | 3 +-
arch/powerpc/sysdev/mpic_msgr.c | 279 ++++++++++++++++++++
5 files changed, 386 insertions(+), 1 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/mpic-msgr.txt
create mode 100644 arch/powerpc/include/asm/mpic_msgr.h
create mode 100644 arch/powerpc/sysdev/mpic_msgr.c
^ permalink raw reply
* Re: [PATCH 02/14] powerpc: Add a defconfig for 'corenet' 32-bit platforms
From: Tabi Timur-B04825 @ 2011-05-20 14:45 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1305871771-16334-2-git-send-email-galak@kernel.crashing.org>
On Fri, May 20, 2011 at 1:09 AM, Kumar Gala <galak@kernel.crashing.org> wro=
te:
> +CONFIG_MATH_EMULATION=3Dy
Don't these chips have hardware floating point?
> +CONFIG_FORCE_MAX_ZONEORDER=3D13
This may be unnecessary. I originally set CONFIG_FORCE_MAX_ZONEORDER
to 12 because the DIU driver needs to be able to allocate a contiguous
5MB memory block. Setting it to 13 means a max of 16MB. Is there a
reason the default isn't good enough?
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
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