* [PATCH 4/5] [powerpc] Add flexcan device support for p1010rdb.
From: Robin Holt @ 2011-08-09 14:43 UTC (permalink / raw)
To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger,
U Bhaskar-B22300
Cc: netdev, socketcan-core, Robin Holt, PPC list
In-Reply-To: <1312901031-29887-1-git-send-email-holt@sgi.com>
I added a simple clock source for the p1010rdb so the flexcan driver
could determine a clock frequency. The p1010 can device only has an
oscillator of system bus frequency divided by 2.
Signed-off-by: Robin Holt <holt@sgi.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>,
Acked-by: Wolfgang Grandegger <wg@grandegger.com>,
To: U Bhaskar-B22300 <B22300@freescale.com>
Cc: socketcan-core@lists.berlios.de,
Cc: netdev@vger.kernel.org,
Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/platforms/85xx/Kconfig | 2 +
arch/powerpc/platforms/85xx/Makefile | 2 +
arch/powerpc/platforms/85xx/clock.c | 53 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/p1010rdb.c | 8 +++++
4 files changed, 65 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/85xx/clock.c
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 498534c..c4304ae 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -70,6 +70,8 @@ config MPC85xx_RDB
config P1010_RDB
bool "Freescale P1010RDB"
select DEFAULT_UIMAGE
+ select HAVE_CAN_FLEXCAN if NET && CAN
+ select PPC_CLOCK if CAN_FLEXCAN
help
This option enables support for the MPC85xx RDB (P1010 RDB) board
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index a971b32..cc7f381 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -3,6 +3,8 @@
#
obj-$(CONFIG_SMP) += smp.o
+obj-$(CONFIG_PPC_CLOCK) += clock.o
+
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/clock.c b/arch/powerpc/platforms/85xx/clock.c
new file mode 100644
index 0000000..16fae04
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/clock.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2011 SGI, inc.
+ *
+ * This code is licensed for use under the GPL V2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/of.h>
+
+#include <asm/clk_interface.h>
+
+#include <sysdev/fsl_soc.h>
+
+/*
+ * p1010 needs to provide a clock source for the flexcan driver. The
+ * oscillator for the p1010 processor is only ever the system clock / 2.
+ */
+
+static struct clk *mpc85xx_clk_get(struct device *dev, const char *id)
+{
+ if (!dev)
+ return ERR_PTR(-ENOENT);
+
+ if (!dev->of_node ||
+ !of_device_is_compatible(dev->of_node, "fsl,flexcan"))
+ return ERR_PTR(-ENOENT);
+
+ return NULL;
+}
+
+static void mpc85xx_clk_put(struct clk *clk)
+{
+ return;
+}
+
+static unsigned long mpc85xx_clk_get_rate(struct clk *clk)
+{
+ return fsl_get_sys_freq() / 2;
+}
+
+static struct clk_interface mpc85xx_clk_functions = {
+ .clk_get = mpc85xx_clk_get,
+ .clk_get_rate = mpc85xx_clk_get_rate,
+ .clk_put = mpc85xx_clk_put,
+};
+
+void __init mpc85xx_clk_init(void)
+{
+ clk_functions = mpc85xx_clk_functions;
+}
+
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
index d7387fa..5e52122 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -81,6 +81,13 @@ static void __init p1010_rdb_setup_arch(void)
printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
}
+extern void mpc85xx_clk_init(void);
+
+static void __init p1010_rdb_init(void)
+{
+ mpc85xx_clk_init();
+}
+
static struct of_device_id __initdata p1010rdb_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
@@ -111,6 +118,7 @@ define_machine(p1010_rdb) {
.name = "P1010 RDB",
.probe = p1010_rdb_probe,
.setup_arch = p1010_rdb_setup_arch,
+ .init = p1010_rdb_init,
.init_IRQ = p1010_rdb_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
--
1.7.2.1
^ permalink raw reply related
* [PATCH 5/5] [powerpc] Fix up fsl-flexcan device tree binding.
From: Robin Holt @ 2011-08-09 14:43 UTC (permalink / raw)
To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger,
U Bhaskar-B22300
Cc: netdev, socketcan-core, Robin Holt, PPC list
In-Reply-To: <1312901031-29887-1-git-send-email-holt@sgi.com>
In working with the socketcan developers, we have come to the conclusion
the fsl-flexcan device tree bindings need to be cleaned up. The driver
does not depend upon any properties other than the required properties
so we are removing the file. Additionally, the p1010*dts files are not
following the standard for node naming in that they have a trailing -v1.0.
Signed-off-by: Robin Holt <holt@sgi.com>
To: Marc Kleine-Budde <mkl@pengutronix.de>,
To: Wolfgang Grandegger <wg@grandegger.com>,
To: U Bhaskar-B22300 <B22300@freescale.com>
Cc: socketcan-core@lists.berlios.de,
Cc: netdev@vger.kernel.org,
Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
---
.../devicetree/bindings/net/can/fsl-flexcan.txt | 61 --------------------
arch/powerpc/boot/dts/p1010rdb.dts | 8 ---
arch/powerpc/boot/dts/p1010si.dtsi | 6 +-
3 files changed, 2 insertions(+), 73 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
deleted file mode 100644
index 1a729f0..0000000
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ /dev/null
@@ -1,61 +0,0 @@
-CAN Device Tree Bindings
-------------------------
-2011 Freescale Semiconductor, Inc.
-
-fsl,flexcan-v1.0 nodes
------------------------
-In addition to the required compatible-, reg- and interrupt-properties, you can
-also specify which clock source shall be used for the controller.
-
-CPI Clock- Can Protocol Interface Clock
- This CLK_SRC bit of CTRL(control register) selects the clock source to
- the CAN Protocol Interface(CPI) to be either the peripheral clock
- (driven by the PLL) or the crystal oscillator clock. The selected clock
- is the one fed to the prescaler to generate the Serial Clock (Sclock).
- The PRESDIV field of CTRL(control register) controls a prescaler that
- generates the Serial Clock (Sclock), whose period defines the
- time quantum used to compose the CAN waveform.
-
-Can Engine Clock Source
- There are two sources for CAN clock
- - Platform Clock It represents the bus clock
- - Oscillator Clock
-
- Peripheral Clock (PLL)
- --------------
- |
- --------- -------------
- | |CPI Clock | Prescaler | Sclock
- | |---------------->| (1.. 256) |------------>
- --------- -------------
- | |
- -------------- ---------------------CLK_SRC
- Oscillator Clock
-
-- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
- the peripheral clock. PLL clock is fed to the
- prescaler to generate the Serial Clock (Sclock).
- Valid values are "oscillator" and "platform"
- "oscillator": CAN engine clock source is oscillator clock.
- "platform" The CAN engine clock source is the bus clock
- (platform clock).
-
-- fsl,flexcan-clock-divider : for the reference and system clock, an additional
- clock divider can be specified.
-- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
-
-Note:
- - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
- - P1010 does not have oscillator as the Clock Source.So the default
- Clock Source is platform clock.
-Examples:
-
- can0@1c000 {
- compatible = "fsl,flexcan-v1.0";
- reg = <0x1c000 0x1000>;
- interrupts = <48 0x2>;
- interrupt-parent = <&mpic>;
- fsl,flexcan-clock-source = "platform";
- fsl,flexcan-clock-divider = <2>;
- clock-frequency = <fixed by u-boot>;
- };
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
index 6b33b73..d6a0bb2 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -169,14 +169,6 @@
};
};
- can0@1c000 {
- fsl,flexcan-clock-source = "platform";
- };
-
- can1@1d000 {
- fsl,flexcan-clock-source = "platform";
- };
-
usb@22000 {
phy_type = "utmi";
};
diff --git a/arch/powerpc/boot/dts/p1010si.dtsi b/arch/powerpc/boot/dts/p1010si.dtsi
index 7f51104..37e47cd 100644
--- a/arch/powerpc/boot/dts/p1010si.dtsi
+++ b/arch/powerpc/boot/dts/p1010si.dtsi
@@ -141,19 +141,17 @@
};
can0@1c000 {
- compatible = "fsl,flexcan-v1.0";
+ compatible = "fsl,flexcan";
reg = <0x1c000 0x1000>;
interrupts = <48 0x2>;
interrupt-parent = <&mpic>;
- fsl,flexcan-clock-divider = <2>;
};
can1@1d000 {
- compatible = "fsl,flexcan-v1.0";
+ compatible = "fsl,flexcan";
reg = <0x1d000 0x1000>;
interrupts = <61 0x2>;
interrupt-parent = <&mpic>;
- fsl,flexcan-clock-divider = <2>;
};
L2: l2-cache-controller@20000 {
--
1.7.2.1
^ permalink raw reply related
* RE: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: U Bhaskar-B22300 @ 2011-08-09 14:45 UTC (permalink / raw)
To: Robin Holt, Marc Kleine-Budde, Wolfgang Grandegger
Cc: socketcan-core@lists.berlios.de, netdev@vger.kernel.org, PPC list
In-Reply-To: <1312892907-20419-5-git-send-email-holt@sgi.com>
Hi Robin,
Where are you doing the irq handling ie request_irq() for the powerpc base=
d P1010.
Or the existing code of ARM based FlexCAN will work for P1010 ??
--Bhaskar
> -----Original Message-----
> From: Robin Holt [mailto:holt@sgi.com]
> Sent: Tuesday, August 09, 2011 5:58 PM
> To: Robin Holt; Marc Kleine-Budde; Wolfgang Grandegger; U Bhaskar-B22300
> Cc: Robin Holt; socketcan-core@lists.berlios.de; netdev@vger.kernel.org;
> PPC list
> Subject: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
>=20
> I added a simple clock source for the p1010rdb so the flexcan driver
> could determine a clock frequency. The p1010 can device only has an
> oscillator of system bus frequency divided by 2.
>=20
> Signed-off-by: Robin Holt <holt@sgi.com>
> To: Marc Kleine-Budde <mkl@pengutronix.de>,
> To: Wolfgang Grandegger <wg@grandegger.com>,
> To: U Bhaskar-B22300 <B22300@freescale.com>
> Cc: socketcan-core@lists.berlios.de,
> Cc: netdev@vger.kernel.org,
> Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
> ---
> arch/powerpc/platforms/85xx/Kconfig | 2 +
> arch/powerpc/platforms/85xx/Makefile | 2 +
> arch/powerpc/platforms/85xx/clock.c | 42
> ++++++++++++++++++++++++++++++++
> arch/powerpc/platforms/85xx/p1010rdb.c | 8 ++++++
> 4 files changed, 54 insertions(+), 0 deletions(-) create mode 100644
> arch/powerpc/platforms/85xx/clock.c
>=20
> diff --git a/arch/powerpc/platforms/85xx/Kconfig
> b/arch/powerpc/platforms/85xx/Kconfig
> index 498534c..c4304ae 100644
> --- a/arch/powerpc/platforms/85xx/Kconfig
> +++ b/arch/powerpc/platforms/85xx/Kconfig
> @@ -70,6 +70,8 @@ config MPC85xx_RDB
> config P1010_RDB
> bool "Freescale P1010RDB"
> select DEFAULT_UIMAGE
> + select HAVE_CAN_FLEXCAN if NET && CAN
> + select PPC_CLOCK if CAN_FLEXCAN
> help
> This option enables support for the MPC85xx RDB (P1010 RDB) board
>=20
> diff --git a/arch/powerpc/platforms/85xx/Makefile
> b/arch/powerpc/platforms/85xx/Makefile
> index a971b32..cc7f381 100644
> --- a/arch/powerpc/platforms/85xx/Makefile
> +++ b/arch/powerpc/platforms/85xx/Makefile
> @@ -3,6 +3,8 @@
> #
> obj-$(CONFIG_SMP) +=3D smp.o
>=20
> +obj-$(CONFIG_PPC_CLOCK) +=3D clock.o
> +
> obj-$(CONFIG_MPC8540_ADS) +=3D mpc85xx_ads.o
> obj-$(CONFIG_MPC8560_ADS) +=3D mpc85xx_ads.o
> obj-$(CONFIG_MPC85xx_CDS) +=3D mpc85xx_cds.o diff --git
> a/arch/powerpc/platforms/85xx/clock.c
> b/arch/powerpc/platforms/85xx/clock.c
> new file mode 100644
> index 0000000..a6fd2c8
> --- /dev/null
> +++ b/arch/powerpc/platforms/85xx/clock.c
> @@ -0,0 +1,42 @@
> +
> +#include <linux/device.h>
> +#include <linux/err.h>
> +
> +#include <asm/clk_interface.h>
> +
> +#include <sysdev/fsl_soc.h>
> +
> +/*
> + * p1010 needs to provide a clock source for the flexcan driver. The
> + * oscillator for the p1010 processor is only ever the system clock / 2.
> + */
> +
> +static struct clk *mpc85xx_clk_get(struct device *dev, const char *id)
> +{
> + if (!dev)
> + return ERR_PTR(-ENOENT);
> +
> + return NULL;
> +}
> +
> +static void mpc85xx_clk_put(struct clk *clk) {
> + return;
> +}
> +
> +static unsigned long mpc85xx_clk_get_rate(struct clk *clk) {
> + return fsl_get_sys_freq() / 2;
> +}
> +
> +static struct clk_interface mpc85xx_clk_functions =3D {
> + .clk_get =3D mpc85xx_clk_get,
> + .clk_get_rate =3D mpc85xx_clk_get_rate,
> + .clk_put =3D mpc85xx_clk_put,
> +};
> +
> +void __init mpc85xx_clk_init(void)
> +{
> + clk_functions =3D mpc85xx_clk_functions; }
> +
> diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c
> b/arch/powerpc/platforms/85xx/p1010rdb.c
> index d7387fa..5e52122 100644
> --- a/arch/powerpc/platforms/85xx/p1010rdb.c
> +++ b/arch/powerpc/platforms/85xx/p1010rdb.c
> @@ -81,6 +81,13 @@ static void __init p1010_rdb_setup_arch(void)
> printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
> }
>=20
> +extern void mpc85xx_clk_init(void);
> +
> +static void __init p1010_rdb_init(void) {
> + mpc85xx_clk_init();
> +}
> +
> static struct of_device_id __initdata p1010rdb_ids[] =3D {
> { .type =3D "soc", },
> { .compatible =3D "soc", },
> @@ -111,6 +118,7 @@ define_machine(p1010_rdb) {
> .name =3D "P1010 RDB",
> .probe =3D p1010_rdb_probe,
> .setup_arch =3D p1010_rdb_setup_arch,
> + .init =3D p1010_rdb_init,
> .init_IRQ =3D p1010_rdb_pic_init,
> #ifdef CONFIG_PCI
> .pcibios_fixup_bus =3D fsl_pcibios_fixup_bus,
> --
> 1.7.2.1
>=20
^ permalink raw reply
* Re: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Robin Holt @ 2011-08-09 14:55 UTC (permalink / raw)
To: U Bhaskar-B22300
Cc: netdev@vger.kernel.org, socketcan-core@lists.berlios.de,
Robin Holt, PPC list
In-Reply-To: <9C64B7751C3BCA41B64A68E23005A7BE1C4A88@039-SN1MPN1-002.039d.mgd.msft.net>
On Tue, Aug 09, 2011 at 02:45:58PM +0000, U Bhaskar-B22300 wrote:
> Hi Robin,
> Where are you doing the irq handling ie request_irq() for the powerpc based P1010.
> Or the existing code of ARM based FlexCAN will work for P1010 ??
It appears that the of_device stuff got moved under the struct device
and that allows the request_irq() to just magically work.
Robin
^ permalink raw reply
* Re: [PATCH 3/3] powerpc: icswx: Simple ACOP fault handler for both book3e and book3s parts.
From: Jimi Xenidis @ 2011-08-09 15:00 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Ian Munsie, Anton Blanchard
In-Reply-To: <500B0F0F-658A-4B95-8BEC-978D738A926F@kernel.crashing.org>
On Aug 9, 2011, at 12:26 AM, Kumar Gala wrote:
>=20
> On Aug 8, 2011, at 5:26 PM, Jimi Xenidis wrote:
>=20
>> This patch adds a fault handler that responds to illegal Coprocessor
>> types. Currently all CTs are treated and illegal. There are two =
ways
>> to report the fault back to the application. If the application used
>> the record form ("icswx.") then the architected "reject" is emulated.
>> If the application did not used the record form ("icswx") then it is
>> selectable by config whether the failure is silent (as architected) =
or
>> a SIGILL is generated.
>>=20
>> In all cases pr_warn() is used to log the bad CT.
>>=20
>> Signed-off-by: Jimi Xenidis <jimix@pobox.com>
>> ---
>> arch/powerpc/mm/fault.c | 16 +++++
>> arch/powerpc/mm/icswx.c | 114 =
++++++++++++++++++++++++++++++++
>> arch/powerpc/mm/icswx.h | 34 ++++++++++
>> arch/powerpc/platforms/Kconfig.cputype | 11 +++
>> 4 files changed, 175 insertions(+), 0 deletions(-)
>>=20
>> diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
>> index 5efe8c9..88abe70 100644
>> --- a/arch/powerpc/mm/fault.c
>> +++ b/arch/powerpc/mm/fault.c
>> @@ -43,6 +43,7 @@
>> #include <asm/tlbflush.h>
>> #include <asm/siginfo.h>
>> #include <mm/mmu_decl.h>
>> +#include <mm/icswx.h>
>>=20
>> #ifdef CONFIG_KPROBES
>> static inline int notify_page_fault(struct pt_regs *regs)
>> @@ -143,6 +144,21 @@ int __kprobes do_page_fault(struct pt_regs =
*regs, unsigned long address,
>> is_write =3D error_code & ESR_DST;
>> #endif /* CONFIG_4xx || CONFIG_BOOKE */
>>=20
>> +#ifdef CONFIG_PPC_ICSWX
>> + /*
>> + * we need to do this early because this "data storage
>> + * interrupt" does not update the DAR/DEAR so we don't want to
>> + * look at it
>> + */
>> + if (error_code & ICSWX_DSI_UCT) {
>> + int ret;
>> +
>> + ret =3D acop_handle_fault(regs, address, error_code);
>> + if (ret)
>> + return ret;
>> + }
>> +#endif
>> +
>> if (notify_page_fault(regs))
>> return 0;
>>=20
>> diff --git a/arch/powerpc/mm/icswx.c b/arch/powerpc/mm/icswx.c
>> index 667330e..fbf71b4 100644
>> --- a/arch/powerpc/mm/icswx.c
>> +++ b/arch/powerpc/mm/icswx.c
>> @@ -17,6 +17,9 @@
>> #include <linux/mm.h>
>> #include <linux/spinlock.h>
>> #include <linux/module.h>
>> +
>> +#include <asm/uaccess.h>
>> +
>> #include "icswx.h"
>>=20
>>=20
>> @@ -161,3 +164,114 @@ void drop_cop(unsigned long acop, struct =
mm_struct *mm)
>> up_read(&mm->mmap_sem);
>> }
>> EXPORT_SYMBOL_GPL(drop_cop);
>> +
>> +static int acop_use_cop(int ct)
>> +{
>> + /* todo */
>> + return -1;
>> +}
>> +
>> +/*
>> + * Get the instruction word at the NIP
>> + */
>> +static u32 acop_get_inst(struct pt_regs *regs)
>> +{
>> + u32 inst;
>> + u32 __user *p;
>> +
>> + p =3D (u32 __user *)regs->nip;
>> + if (!access_ok(VERIFY_READ, p, sizeof(*p)))
>> + return 0;
>> +
>> + if (__get_user(inst, p))
>> + return 0;
>> +
>> + return inst;
>> +}
>> +
>> +/**
>> + * @regs: regsiters at time of interrupt
>> + * @address: storage address
>> + * @error_code: Fault code, usually the DSISR or ESR depending on
>> + * processor type
>> + *
>> + * Return 0 if we are able to resolve the data storage fault that
>> + * results from a CT miss in the ACOP register.
>> + */
>> +int acop_handle_fault(struct pt_regs *regs, unsigned long address,
>> + unsigned long error_code)
>> +{
>> + int ct;
>> + u32 inst =3D 0;
>> +
>> + if (!cpu_has_feature(CPU_FTR_ICSWX)) {
>> + pr_info("No coprocessors available");
>> + _exception(SIGILL, regs, ILL_ILLOPN, address);
>> + }
>> +
>> + if (!user_mode(regs)) {
>> + /* this could happen if the HV denies the
>> + * kernel access, for now we just die */
>> + die("ICSWX from kernel failed", regs, SIGSEGV);
>> + }
>> +
>> + /* Some implementations leave us a hint for the CT */
>> + ct =3D ICSWX_GET_CT_HINT(error_code);
>> + if (ct < 0) {
>> + /* we have to peek at the instruction work to figure out =
CT */
>> + union cop_ccw ccw;
>=20
> don't use a union, we don't do this for any other place we decode =
instructions (just use shift/mask). Utilize ppc-opcode.h
ack, union begone. I'll just do the single shift below to get the CT =
since its the only spot I need it.
>=20
>> + u32 rs;
>> +
>> + inst =3D acop_get_inst(regs);
>> + if (inst =3D=3D 0)
>> + return -1;
>> +
>> + rs =3D (inst >> (31 - 10)) & 0x1f;
>> + ccw._val =3D regs->gpr[rs];
>> + ct =3D ccw.ct;
>> + }
>> +
>> + if (!acop_use_cop(ct))
>> + return 0;
>> +
>> + /* at this point the CT is unknown to the system */
>> + pr_warn("%s[%d]: Coprocessor %d is unavailable",
>> + current->comm, current->pid, ct);
>> +
>> + /* get inst if we don't already have it */
>> + if (inst =3D=3D 0) {
>> + inst =3D acop_get_inst(regs);
>> + if (inst =3D=3D 0)
>> + return -1;
>> + }
>> +
>> + /* Check if the instruction is the "record form" */
>> + if (inst & 1) {
>> + /*=20
>> + * the instruction is "record" form so we can reject
>> + * using CR0
>> + */
>> + regs->ccr &=3D ~(0xful << 28);
>> + regs->ccr |=3D ICSWX_RC_NOT_FOUND << 28;
>> +
>> + /* Move on to the next instruction */
>> + regs->nip +=3D 4;
>> + } else {
>> + /*
>> + * There is no architected mechanism to report a bad
>> + * CT so we could either SIGILL or report nothing.
>> + * Since the non-record version should only bu used
>> + * for "hints" or "don't care" we should probably do
>> + * nothing. However, I could see how some people
>> + * might want an SIGILL so it here if you want it.
>> + */
>> +#ifdef CONFIG_ICSWX_USE_SIGILL
>> + _exception(SIGILL, regs, ILL_ILLOPN, address);
>=20
> Where is CONFIG_ICSWX_USE_SIGILL defined? You have =
PPC_ICSWX_USE_SIGILL
ack, they are the same just a typo.
>=20
>> +#else
>> + regs->nip +=3D 4;
>> +#endif
>> + }
>> +
>> + return 0;
>> +}
>> +EXPORT_SYMBOL_GPL(acop_handle_fault);
>> diff --git a/arch/powerpc/mm/icswx.h b/arch/powerpc/mm/icswx.h
>> index 5121ddd..920d9f3 100644
>> --- a/arch/powerpc/mm/icswx.h
>> +++ b/arch/powerpc/mm/icswx.h
>> @@ -32,3 +32,37 @@ extern void free_cop_pid(int free_pid);
>> #define disable_cop_pid(m) (COP_PID_NONE)
>> #define free_cop_pid(p)
>> #endif
>> +
>> +/*
>> + * These are implementation bits for architected registers. If this
>> + * ever becomes architecture the should be moved to reg.h et. al.
>> + */
>> +/* UCT is the same bit for Server and Embedded */
>> +#define ICSWX_DSI_UCT 0x00004000 /* Unavailable =
Coprocessor Type */
>> +
>> +#ifdef CONFIG_BOOKE
>> +/* Embedded implementation gives us no hits as to what the CT is */
>> +#define ICSWX_GET_CT_HINT(x) (-1)
>> +#else
>> +/* Server implementation contains the CT value in the DSISR */
>> +#define ICSWX_DSISR_CTMASK 0x00003f00
>> +#define ICSWX_GET_CT_HINT(x) (((x) & ICSWX_DSISR_CTMASK) >> =
8)
>> +#endif
>> +
>> +union cop_ccw {
>> + u32 _val;
>> + struct {
>> + u32 msb:8;
>> + u32 reserved:2;
>> + u32 ct:6;
>> + u32 cd:16;
>> + };
>> +};
>=20
> kill the union, move some of the opcode stuff into ppc-opcode.h
Union is gone.
Not sure what else you would like in ppc-opcode.h since everything else =
is register decode and not exactly architecture.
Can you be more specific?
-JX
>=20
>> +
>> +#define ICSWX_RC_STARTED 0x8 /* The request has been started =
*/
>> +#define ICSWX_RC_NOT_IDLE 0x4 /* No coprocessor found idle */
>> +#define ICSWX_RC_NOT_FOUND 0x2 /* No coprocessor found */
>> +#define ICSWX_RC_UNDEFINED 0x1 /* Reserved */
>> +
>> +extern int acop_handle_fault(struct pt_regs *regs, unsigned long =
address,
>> + unsigned long error_code);
>> diff --git a/arch/powerpc/platforms/Kconfig.cputype =
b/arch/powerpc/platforms/Kconfig.cputype
>> index 3cd22e5..817d723 100644
>> --- a/arch/powerpc/platforms/Kconfig.cputype
>> +++ b/arch/powerpc/platforms/Kconfig.cputype
>> @@ -258,6 +258,17 @@ config PPC_ICSWX_PID
>> PID register in server is used explicitly for ICSWX. In
>> embedded systems PID managment is done by the system.
>>=20
>> +config PPC_ICSWX_USE_SIGILL
>> + bool "Should a bad CT cause a SIGILL?"
>=20
> Is there some reason to even have this cfg option?
Fixed the mismatch you pointed out above.
-jx
>=20
>> + depends on PPC_ICSWX
>> + default n
>> + ---help---
>> + Should a bad CT used for "non-record form ICSWX" cause an
>> + illegal intruction signal or should it be silent as
>> + architected.
>> +
>> + If in doubt, say N here.
>> +
>> config SPE
>> bool "SPE Support"
>> depends on E200 || (E500 && !PPC_E500MC)
>> --=20
>> 1.7.0.4
>>=20
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@lists.ozlabs.org
>> https://lists.ozlabs.org/listinfo/linuxppc-dev
>=20
^ permalink raw reply
* Re: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Wolfgang Grandegger @ 2011-08-09 15:10 UTC (permalink / raw)
To: Robin Holt
Cc: socketcan-core@lists.berlios.de, U Bhaskar-B22300, PPC list,
netdev@vger.kernel.org
In-Reply-To: <20110809145507.GY4926@sgi.com>
On 08/09/2011 04:55 PM, Robin Holt wrote:
> On Tue, Aug 09, 2011 at 02:45:58PM +0000, U Bhaskar-B22300 wrote:
>> Hi Robin,
>> Where are you doing the irq handling ie request_irq() for the powerpc based P1010.
>> Or the existing code of ARM based FlexCAN will work for P1010 ??
>
> It appears that the of_device stuff got moved under the struct device
> and that allows the request_irq() to just magically work.
Cool! Actually I was also missing of_address_to_resource (or of_iomap)
and irq_of_parse_and_map(). But the resources seem to be filled in here:
http://lxr.linux.no/#linux+v3.0.1/drivers/of/platform.c#L121
Wolfgang.
^ permalink raw reply
* Re: [PATCH 4/4] [powerpc] Add flexcan device support for p1010rdb.
From: Marc Kleine-Budde @ 2011-08-09 15:11 UTC (permalink / raw)
To: Robin Holt
Cc: socketcan-core@lists.berlios.de, netdev@vger.kernel.org,
U Bhaskar-B22300, PPC list
In-Reply-To: <20110809145507.GY4926@sgi.com>
[-- Attachment #1: Type: text/plain, Size: 718 bytes --]
On 08/09/2011 04:55 PM, Robin Holt wrote:
> On Tue, Aug 09, 2011 at 02:45:58PM +0000, U Bhaskar-B22300 wrote:
>> Hi Robin,
>> Where are you doing the irq handling ie request_irq() for the powerpc based P1010.
>> Or the existing code of ARM based FlexCAN will work for P1010 ??
>
> It appears that the of_device stuff got moved under the struct device
> and that allows the request_irq() to just magically work.
cool :)
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 262 bytes --]
^ permalink raw reply
* Re: [PATCH 3/3] powerpc: icswx: Simple ACOP fault handler for both book3e and book3s parts.
From: Benjamin Herrenschmidt @ 2011-08-09 15:15 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Ian Munsie, Anton Blanchard
In-Reply-To: <500B0F0F-658A-4B95-8BEC-978D738A926F@kernel.crashing.org>
On Tue, 2011-08-09 at 00:26 -0500, Kumar Gala wrote:
> > + /* Some implementations leave us a hint for the CT */
> > + ct = ICSWX_GET_CT_HINT(error_code);
> > + if (ct < 0) {
> > + /* we have to peek at the instruction work to figure out CT */
> > + union cop_ccw ccw;
>
> don't use a union, we don't do this for any other place we decode instructions (just use shift/mask). Utilize ppc-opcode.h
Except that the union here is -not- the instruction, but the content of
the RS register :-)
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 3/3] powerpc: icswx: Simple ACOP fault handler for both book3e and book3s parts.
From: Jimi Xenidis @ 2011-08-09 15:24 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Anton Blanchard, Ian Munsie
In-Reply-To: <1312902929.29273.10.camel@pasglop>
On Aug 9, 2011, at 10:15 AM, Benjamin Herrenschmidt wrote:
> On Tue, 2011-08-09 at 00:26 -0500, Kumar Gala wrote:
>=20
>>> + /* Some implementations leave us a hint for the CT */
>>> + ct =3D ICSWX_GET_CT_HINT(error_code);
>>> + if (ct < 0) {
>>> + /* we have to peek at the instruction work to figure out =
CT */
>>> + union cop_ccw ccw;
>>=20
>> don't use a union, we don't do this for any other place we decode =
instructions (just use shift/mask). Utilize ppc-opcode.h
>=20
> Except that the union here is -not- the instruction, but the content =
of
> the RS register :-)
I agree, especially for when we need the kernel to build the =
struct/union.
However, that is a later patch (working on it now and if there are no =
objections) so I'll add it then.
-JX
>=20
> Cheers,
> Ben.
>=20
>=20
^ permalink raw reply
* [PATCH 05/10] KVM: PPC: Read out syscall instruction on trap
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
We have a few traps where we cache the instruction that cause the trap
for analysis later on. Since we now need to be able to distinguish
between SC 0 and SC 1 system calls and the only way to find out which
is which is by looking at the instruction, we also read out the instruction
causing the system call.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/kvm/book3s_segment.S | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
index aed32e5..678b6be 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -213,11 +213,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
beq ld_last_inst
cmpwi r12, BOOK3S_INTERRUPT_PROGRAM
beq ld_last_inst
+ cmpwi r12, BOOK3S_INTERRUPT_SYSCALL
+ beq ld_last_prev_inst
cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT
beq- ld_last_inst
b no_ld_last_inst
+ld_last_prev_inst:
+ addi r3, r3, -4
+
ld_last_inst:
/* Save off the guest instruction we're at */
--
1.6.0.2
^ permalink raw reply related
* [PATCH 01/10] KVM: PPC: move compute_tlbie_rb to book3s common header
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
We need the compute_tlbie_rb in _pr and _hv implementations for papr
soon, so let's move it over to a common header file that both
implementations can leverage.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm_book3s.h | 33 +++++++++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 33 ---------------------------------
2 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index 98da010..37dd748 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -382,6 +382,39 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
}
#endif
+static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
+ unsigned long pte_index)
+{
+ unsigned long rb, va_low;
+
+ rb = (v & ~0x7fUL) << 16; /* AVA field */
+ va_low = pte_index >> 3;
+ if (v & HPTE_V_SECONDARY)
+ va_low = ~va_low;
+ /* xor vsid from AVA */
+ if (!(v & HPTE_V_1TB_SEG))
+ va_low ^= v >> 12;
+ else
+ va_low ^= v >> 24;
+ va_low &= 0x7ff;
+ if (v & HPTE_V_LARGE) {
+ rb |= 1; /* L field */
+ if (cpu_has_feature(CPU_FTR_ARCH_206) &&
+ (r & 0xff000)) {
+ /* non-16MB large page, must be 64k */
+ /* (masks depend on page size) */
+ rb |= 0x1000; /* page encoding in LP field */
+ rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
+ rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
+ }
+ } else {
+ /* 4kB page */
+ rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
+ }
+ rb |= (v >> 54) & 0x300; /* B field */
+ return rb;
+}
+
/* Magic register values loaded into r3 and r4 before the 'sc' assembly
* instruction for the OSI hypercalls */
#define OSI_SC_MAGIC_R3 0x113724FA
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index fcfe6b0..bacb0cf 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -110,39 +110,6 @@ long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
return H_SUCCESS;
}
-static unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
- unsigned long pte_index)
-{
- unsigned long rb, va_low;
-
- rb = (v & ~0x7fUL) << 16; /* AVA field */
- va_low = pte_index >> 3;
- if (v & HPTE_V_SECONDARY)
- va_low = ~va_low;
- /* xor vsid from AVA */
- if (!(v & HPTE_V_1TB_SEG))
- va_low ^= v >> 12;
- else
- va_low ^= v >> 24;
- va_low &= 0x7ff;
- if (v & HPTE_V_LARGE) {
- rb |= 1; /* L field */
- if (cpu_has_feature(CPU_FTR_ARCH_206) &&
- (r & 0xff000)) {
- /* non-16MB large page, must be 64k */
- /* (masks depend on page size) */
- rb |= 0x1000; /* page encoding in LP field */
- rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
- rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
- }
- } else {
- /* 4kB page */
- rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
- }
- rb |= (v >> 54) & 0x300; /* B field */
- return rb;
-}
-
#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
static inline int try_lock_tlbie(unsigned int *lock)
--
1.6.0.2
^ permalink raw reply related
* [PATCH 02/10] KVM: PPC: Add papr_enabled flag
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
When running a PAPR guest, some things change. The privilege level drops
from hypervisor to supervisor, SDR1 gets treated differently and we interpret
hypercalls. For bisectability sake, add the flag now, but only enable it when
all the support code is there.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm_host.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index cc22b28..e681302 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -389,6 +389,7 @@ struct kvm_vcpu_arch {
u8 dcr_is_write;
u8 osi_needed;
u8 osi_enabled;
+ u8 papr_enabled;
u8 hcall_needed;
u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
--
1.6.0.2
^ permalink raw reply related
* [PATCH 04/10] KVM: PPC: Interpret SDR1 as HVA in PAPR mode
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
When running a PAPR guest, the guest is not allowed to set SDR1 - instead
the HTAB information is held in internal hypervisor structures. But all of
our current code relies on SDR1 and walking the HTAB like on real hardware.
So in order to not be too intrusive, we simply set SDR1 to the HTAB we hold
in host memory. That way we can keep the HTAB in user space, but use it from
kernel space to map the guest.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/kvm/book3s_64_mmu.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index c6d3e19..b871721 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -128,7 +128,13 @@ static hva_t kvmppc_mmu_book3s_64_get_pteg(
dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
page, vcpu_book3s->sdr1, pteg, slbe->vsid);
- r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
+ /* When running a PAPR guest, SDR1 contains a HVA address instead
+ of a GPA */
+ if (vcpu_book3s->vcpu.arch.papr_enabled)
+ r = pteg;
+ else
+ r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
+
if (kvm_is_error_hva(r))
return r;
return r | (pteg & ~PAGE_MASK);
--
1.6.0.2
^ permalink raw reply related
* [PATCH 00/10] PAPR virtualization on PR KVM
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In KVM for Book3S PPC we currently have 2 implementations. There
is the PR based implementation which works on any POWER system
you pass in and the super fast HV implementation which requires
libre firmware (so almost nobody can use it).
Currently, the two target two different machine types, with PR KVM
being used for bare metal system virtualization, while the HV KVM
is used to virtualize PAPR.
In an effort to make things more cozy and transparent to the user,
this patch set implements PAPR capabilities to the PR KVM side, so
a user doesn't have to worry what the respective kernel module
supports. Any machine he's virtualizing "just works".
Alex
Alexander Graf (10):
KVM: PPC: move compute_tlbie_rb to book3s common header
KVM: PPC: Add papr_enabled flag
KVM: PPC: Check privilege level on SPRs
KVM: PPC: Interpret SDR1 as HVA in PAPR mode
KVM: PPC: Read out syscall instruction on trap
KVM: PPC: Add support for explicit HIOR setting
KVM: PPC: Add PAPR hypercall code for PR mode
KVM: PPC: Stub emulate CFAR and PURR SPRs
KVM: PPC: Support SC1 hypercalls for PAPR in PR mode
KVM: PPC: Enable the PAPR CAP for Book3S
arch/powerpc/include/asm/kvm.h | 8 ++
arch/powerpc/include/asm/kvm_book3s.h | 36 ++++++++
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/kvm/Makefile | 1 +
arch/powerpc/kvm/book3s_64_mmu.c | 8 ++-
arch/powerpc/kvm/book3s_emulate.c | 29 ++++++
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 33 -------
arch/powerpc/kvm/book3s_pr.c | 36 +++++++-
arch/powerpc/kvm/book3s_pr_papr.c | 158 +++++++++++++++++++++++++++++++++
arch/powerpc/kvm/book3s_segment.S | 5 +
arch/powerpc/kvm/powerpc.c | 6 ++
include/linux/kvm.h | 2 +
12 files changed, 286 insertions(+), 37 deletions(-)
create mode 100644 arch/powerpc/kvm/book3s_pr_papr.c
^ permalink raw reply
* [PATCH 03/10] KVM: PPC: Check privilege level on SPRs
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
We have 3 privilege levels: problem state, supervisor state and hypervisor
state. Each of them can access different SPRs, so we need to check on every
SPR if it's accessible in the respective mode.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/kvm/book3s_emulate.c | 25 +++++++++++++++++++++++++
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index 4668465..bf0ddcd 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -63,6 +63,25 @@
* function pointers, so let's just disable the define. */
#undef mfsrin
+enum priv_level {
+ PRIV_PROBLEM = 0,
+ PRIV_SUPER = 1,
+ PRIV_HYPER = 2,
+};
+
+static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
+{
+ /* PAPR VMs only access supervisor SPRs */
+ if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
+ return false;
+
+ /* Limit user space to its own small SPR set */
+ if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM)
+ return false;
+
+ return true;
+}
+
int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
unsigned int inst, int *advance)
{
@@ -296,6 +315,8 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
switch (sprn) {
case SPRN_SDR1:
+ if (!spr_allowed(vcpu, PRIV_HYPER))
+ goto unprivileged;
to_book3s(vcpu)->sdr1 = spr_val;
break;
case SPRN_DSISR:
@@ -390,6 +411,7 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
case SPRN_PMC4_GEKKO:
case SPRN_WPAR_GEKKO:
break;
+unprivileged:
default:
printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
#ifndef DEBUG_SPR
@@ -421,6 +443,8 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
break;
}
case SPRN_SDR1:
+ if (!spr_allowed(vcpu, PRIV_HYPER))
+ goto unprivileged;
kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
break;
case SPRN_DSISR:
@@ -476,6 +500,7 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
kvmppc_set_gpr(vcpu, rt, 0);
break;
default:
+unprivileged:
printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
#ifndef DEBUG_SPR
emulated = EMULATE_FAIL;
--
1.6.0.2
^ permalink raw reply related
* [PATCH 08/10] KVM: PPC: Stub emulate CFAR and PURR SPRs
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
Recent Linux versions use the CFAR and PURR SPRs, but don't really care about
their contents (yet). So for now, we can simply return 0 when the guest wants
to read them.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/kvm/book3s_emulate.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index bf0ddcd..0c9dc62 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -473,6 +473,10 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
case SPRN_HID5:
kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
break;
+ case SPRN_CFAR:
+ case SPRN_PURR:
+ kvmppc_set_gpr(vcpu, rt, 0);
+ break;
case SPRN_GQR0:
case SPRN_GQR1:
case SPRN_GQR2:
--
1.6.0.2
^ permalink raw reply related
* [PATCH 09/10] KVM: PPC: Support SC1 hypercalls for PAPR in PR mode
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
PAPR defines hypercalls as SC1 instructions. Using these, the guest modifies
page tables and does other privileged operations that it wouldn't be allowed
to do in supervisor mode.
This patch adds support for PR KVM to trap these instructions and route them
through the same PAPR hypercall interface that we already use for HV style
KVM.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/kvm/book3s_pr.c | 22 +++++++++++++++++++++-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 78dcf65..48558f6 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -648,7 +648,27 @@ program_interrupt:
break;
}
case BOOK3S_INTERRUPT_SYSCALL:
- if (vcpu->arch.osi_enabled &&
+ if (vcpu->arch.papr_enabled &&
+ (kvmppc_get_last_inst(vcpu) == 0x44000022) &&
+ !(vcpu->arch.shared->msr & MSR_PR)) {
+ /* SC 1 papr hypercalls */
+ ulong cmd = kvmppc_get_gpr(vcpu, 3);
+ int i;
+
+ if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
+ r = RESUME_GUEST;
+ break;
+ }
+
+ run->papr_hcall.nr = cmd;
+ for (i = 0; i < 9; ++i) {
+ ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
+ run->papr_hcall.args[i] = gpr;
+ }
+ run->exit_reason = KVM_EXIT_PAPR_HCALL;
+ vcpu->arch.hcall_needed = 1;
+ r = RESUME_HOST;
+ } else if (vcpu->arch.osi_enabled &&
(((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
(((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
/* MOL hypercalls */
--
1.6.0.2
^ permalink raw reply related
* [PATCH 10/10] KVM: PPC: Enable the PAPR CAP for Book3S
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
Now that Book3S PV mode can also run PAPR guests, we can add a PAPR cap and
enable it for all Book3S targets. Enabling that CAP switches KVM into PAPR
mode.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/kvm/powerpc.c | 5 +++++
include/linux/kvm.h | 1 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 17a5c83..13bc798 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -189,6 +189,7 @@ int kvm_dev_ioctl_check_extension(long ext)
#else
case KVM_CAP_PPC_SEGSTATE:
case KVM_CAP_PPC_HIOR:
+ case KVM_CAP_PPC_PAPR:
#endif
case KVM_CAP_PPC_UNSET_IRQ:
case KVM_CAP_PPC_IRQ_LEVEL:
@@ -572,6 +573,10 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
r = 0;
vcpu->arch.osi_enabled = true;
break;
+ case KVM_CAP_PPC_PAPR:
+ r = 0;
+ vcpu->arch.papr_enabled = true;
+ break;
default:
r = -EINVAL;
break;
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index 4d33f78..2d7161c 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -555,6 +555,7 @@ struct kvm_ppc_pvinfo {
#define KVM_CAP_PPC_RMA 65
#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
#define KVM_CAP_PPC_HIOR 67
+#define KVM_CAP_PPC_PAPR 68
#ifdef KVM_CAP_IRQ_ROUTING
--
1.6.0.2
^ permalink raw reply related
* [PATCH 07/10] KVM: PPC: Add PAPR hypercall code for PR mode
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
When running a PAPR guest, we need to handle a few hypercalls in kernel space,
most prominently the page table invalidation (to sync the shadows).
So this patch adds handling for a few PAPR hypercalls to PR mode KVM. I tried
to share the code with HV mode, but it ended up being a lot easier this way
around, as the two differ too much in those details.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm_book3s.h | 1 +
arch/powerpc/kvm/Makefile | 1 +
arch/powerpc/kvm/book3s_pr_papr.c | 158 +++++++++++++++++++++++++++++++++
3 files changed, 160 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/kvm/book3s_pr_papr.c
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index 472437b..91d41fa 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -150,6 +150,7 @@ extern void kvmppc_load_up_altivec(void);
extern void kvmppc_load_up_vsx(void);
extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);
extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst);
+extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd);
static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
{
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index 08428e2..4c66d51 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -43,6 +43,7 @@ kvm-book3s_64-objs-$(CONFIG_KVM_BOOK3S_64_PR) := \
fpu.o \
book3s_paired_singles.o \
book3s_pr.o \
+ book3s_pr_papr.o \
book3s_emulate.o \
book3s_interrupts.o \
book3s_mmu_hpte.o \
diff --git a/arch/powerpc/kvm/book3s_pr_papr.c b/arch/powerpc/kvm/book3s_pr_papr.c
new file mode 100644
index 0000000..b8ec55f
--- /dev/null
+++ b/arch/powerpc/kvm/book3s_pr_papr.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2011. Freescale Inc. All rights reserved.
+ *
+ * Authors:
+ * Alexander Graf <agraf@suse.de>
+ * Paul Mackerras <paulus@samba.org>
+ *
+ * Description:
+ *
+ * Hypercall handling for running PAPR guests in PR KVM on Book 3S
+ * processors.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <asm/uaccess.h>
+#include <asm/kvm_ppc.h>
+#include <asm/kvm_book3s.h>
+
+static unsigned long get_pteg_addr(struct kvm_vcpu *vcpu, long pte_index)
+{
+ struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
+ unsigned long pteg_addr;
+
+ pte_index <<= 4;
+ pte_index &= ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1) << 7 | 0x70;
+ pteg_addr = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
+ pteg_addr |= pte_index;
+
+ return pteg_addr;
+}
+
+static int kvmppc_h_pr_enter(struct kvm_vcpu *vcpu)
+{
+ long flags = kvmppc_get_gpr(vcpu, 4);
+ long pte_index = kvmppc_get_gpr(vcpu, 5);
+ unsigned long pteg[2 * 8];
+ unsigned long pteg_addr, i, *hpte;
+
+ pte_index &= ~7UL;
+ pteg_addr = get_pteg_addr(vcpu, pte_index);
+
+ copy_from_user(pteg, (void __user *)pteg_addr, sizeof(pteg));
+ hpte = pteg;
+
+ if (likely((flags & H_EXACT) == 0)) {
+ pte_index &= ~7UL;
+ for (i = 0; ; ++i) {
+ if (i == 8)
+ return H_PTEG_FULL;
+ if ((*hpte & HPTE_V_VALID) == 0)
+ break;
+ hpte += 2;
+ }
+ } else {
+ i = kvmppc_get_gpr(vcpu, 5) & 7UL;
+ hpte += i * 2;
+ }
+
+ hpte[0] = kvmppc_get_gpr(vcpu, 6);
+ hpte[1] = kvmppc_get_gpr(vcpu, 7);
+ copy_to_user((void __user *)pteg_addr, pteg, sizeof(pteg));
+ kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
+ kvmppc_set_gpr(vcpu, 4, pte_index | i);
+
+ return EMULATE_DONE;
+}
+
+static int kvmppc_h_pr_remove(struct kvm_vcpu *vcpu)
+{
+ unsigned long flags= kvmppc_get_gpr(vcpu, 4);
+ unsigned long pte_index = kvmppc_get_gpr(vcpu, 5);
+ unsigned long avpn = kvmppc_get_gpr(vcpu, 6);
+ unsigned long v = 0, pteg, rb;
+ unsigned long pte[2];
+
+ pteg = get_pteg_addr(vcpu, pte_index);
+ copy_from_user(pte, (void __user *)pteg, sizeof(pte));
+
+ if ((pte[0] & HPTE_V_VALID) == 0 ||
+ ((flags & H_AVPN) && (pte[0] & ~0x7fUL) != avpn) ||
+ ((flags & H_ANDCOND) && (pte[0] & avpn) != 0)) {
+ kvmppc_set_gpr(vcpu, 3, H_NOT_FOUND);
+ return EMULATE_DONE;
+ }
+
+ copy_to_user((void __user *)pteg, &v, sizeof(v));
+
+ rb = compute_tlbie_rb(pte[0], pte[1], pte_index);
+ vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false);
+
+ kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
+ kvmppc_set_gpr(vcpu, 4, pte[0]);
+ kvmppc_set_gpr(vcpu, 5, pte[1]);
+
+ return EMULATE_DONE;
+}
+
+static int kvmppc_h_pr_protect(struct kvm_vcpu *vcpu)
+{
+ unsigned long flags = kvmppc_get_gpr(vcpu, 4);
+ unsigned long pte_index = kvmppc_get_gpr(vcpu, 5);
+ unsigned long avpn = kvmppc_get_gpr(vcpu, 6);
+ unsigned long rb, pteg, r, v;
+ unsigned long pte[2];
+
+ pteg = get_pteg_addr(vcpu, pte_index);
+ copy_from_user(pte, (void __user *)pteg, sizeof(pte));
+
+ if ((pte[0] & HPTE_V_VALID) == 0 ||
+ ((flags & H_AVPN) && (pte[0] & ~0x7fUL) != avpn)) {
+ kvmppc_set_gpr(vcpu, 3, H_NOT_FOUND);
+ return EMULATE_DONE;
+ }
+
+ v = pte[0];
+ r = pte[1];
+ r &= ~(HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_HI |
+ HPTE_R_KEY_LO);
+ r |= (flags << 55) & HPTE_R_PP0;
+ r |= (flags << 48) & HPTE_R_KEY_HI;
+ r |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
+
+ pte[1] = r;
+
+ rb = compute_tlbie_rb(v, r, pte_index);
+ vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false);
+ copy_to_user((void __user *)pteg, pte, sizeof(pte));
+
+ kvmppc_set_gpr(vcpu, 3, H_SUCCESS);
+
+ return EMULATE_DONE;
+}
+
+int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd)
+{
+ switch (cmd) {
+ case H_ENTER:
+ return kvmppc_h_pr_enter(vcpu);
+ case H_REMOVE:
+ return kvmppc_h_pr_remove(vcpu);
+ case H_PROTECT:
+ return kvmppc_h_pr_protect(vcpu);
+ case H_BULK_REMOVE:
+ /* We just flush all PTEs, so user space can
+ handle the HPT modifications */
+ kvmppc_mmu_pte_flush(vcpu, 0, 0);
+ break;
+ case H_CEDE:
+ kvm_vcpu_block(vcpu);
+ vcpu->stat.halt_wakeup++;
+ return EMULATE_DONE;
+ }
+
+ return EMULATE_FAIL;
+}
--
1.6.0.2
^ permalink raw reply related
* [PATCH 06/10] KVM: PPC: Add support for explicit HIOR setting
From: Alexander Graf @ 2011-08-09 16:31 UTC (permalink / raw)
To: kvm-ppc; +Cc: linuxppc-dev, paulus, kvm
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
Until now, we always set HIOR based on the PVR, but this is just wrong.
Instead, we should be setting HIOR explicitly, so user space can decide
what the initial HIOR value is - just like on real hardware.
We keep the old PVR based way around for backwards compatibility, but
once user space uses the SREGS based method, we drop the PVR logic.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm.h | 8 ++++++++
arch/powerpc/include/asm/kvm_book3s.h | 2 ++
arch/powerpc/kvm/book3s_pr.c | 14 ++++++++++++--
arch/powerpc/kvm/powerpc.c | 1 +
include/linux/kvm.h | 1 +
5 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index a4f6c85..a6a253e 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -149,6 +149,12 @@ struct kvm_regs {
#define KVM_SREGS_E_UPDATE_DBSR (1 << 3)
/*
+ * Book3S special bits to indicate contents in the struct by maintaining
+ * backwards compatibility with older structs. If adding a new field,
+ * please make sure to add a flag for that new field */
+#define KVM_SREGS_S_HIOR (1 << 0)
+
+/*
* In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
* previous KVM_GET_REGS.
*
@@ -173,6 +179,8 @@ struct kvm_sregs {
__u64 ibat[8];
__u64 dbat[8];
} ppc32;
+ __u64 flags; /* KVM_SREGS_S_ */
+ __u64 hior;
} s;
struct {
union {
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index 37dd748..472437b 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -90,6 +90,8 @@ struct kvmppc_vcpu_book3s {
#endif
int context_id[SID_CONTEXTS];
+ bool hior_sregs; /* HIOR is set by SREGS, not PVR */
+
struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 0c0d3f2..78dcf65 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -150,13 +150,15 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
#ifdef CONFIG_PPC_BOOK3S_64
if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
kvmppc_mmu_book3s_64_init(vcpu);
- to_book3s(vcpu)->hior = 0xfff00000;
+ if (!to_book3s(vcpu)->hior_sregs)
+ to_book3s(vcpu)->hior = 0xfff00000;
to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
} else
#endif
{
kvmppc_mmu_book3s_32_init(vcpu);
- to_book3s(vcpu)->hior = 0;
+ if (!to_book3s(vcpu)->hior_sregs)
+ to_book3s(vcpu)->hior = 0;
to_book3s(vcpu)->msr_mask = 0xffffffffULL;
}
@@ -770,6 +772,9 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
}
}
+ if (sregs->u.s.flags & KVM_SREGS_S_HIOR)
+ sregs->u.s.hior = to_book3s(vcpu)->hior;
+
return 0;
}
@@ -806,6 +811,11 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
/* Flush the MMU after messing with the segments */
kvmppc_mmu_pte_flush(vcpu, 0, 0);
+ if (sregs->u.s.flags & KVM_SREGS_S_HIOR) {
+ to_book3s(vcpu)->hior_sregs = true;
+ to_book3s(vcpu)->hior = sregs->u.s.hior;
+ }
+
return 0;
}
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index a107c9b..17a5c83 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -188,6 +188,7 @@ int kvm_dev_ioctl_check_extension(long ext)
case KVM_CAP_PPC_BOOKE_SREGS:
#else
case KVM_CAP_PPC_SEGSTATE:
+ case KVM_CAP_PPC_HIOR:
#endif
case KVM_CAP_PPC_UNSET_IRQ:
case KVM_CAP_PPC_IRQ_LEVEL:
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index 55f5afb..4d33f78 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -554,6 +554,7 @@ struct kvm_ppc_pvinfo {
#define KVM_CAP_PPC_SMT 64
#define KVM_CAP_PPC_RMA 65
#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
+#define KVM_CAP_PPC_HIOR 67
#ifdef KVM_CAP_IRQ_ROUTING
--
1.6.0.2
^ permalink raw reply related
* Re: [PATCH 07/10] KVM: PPC: Add PAPR hypercall code for PR mode
From: Avi Kivity @ 2011-08-09 16:40 UTC (permalink / raw)
To: Alexander Graf; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <1312907508-14599-8-git-send-email-agraf@suse.de>
On 08/09/2011 07:31 PM, Alexander Graf wrote:
> When running a PAPR guest, we need to handle a few hypercalls in kernel space,
> most prominently the page table invalidation (to sync the shadows).
>
> So this patch adds handling for a few PAPR hypercalls to PR mode KVM. I tried
> to share the code with HV mode, but it ended up being a lot easier this way
> around, as the two differ too much in those details.
>
>
> +++ b/arch/powerpc/kvm/book3s_pr_papr.c
> @@ -0,0 +1,158 @@
> +/*
> + * Copyright (C) 2011. Freescale Inc. All rights reserved.
> + *
> + * Authors:
> + * Alexander Graf<agraf@suse.de>
> + * Paul Mackerras<paulus@samba.org>
> + *
> + * Description:
> + *
> + * Hypercall handling for running PAPR guests in PR KVM on Book 3S
> + * processors.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License, version 2, as
> + * published by the Free Software Foundation.
> + */
Copyright freescale, authors Paul and yourself?
> +
> +static unsigned long get_pteg_addr(struct kvm_vcpu *vcpu, long pte_index)
> +{
> + struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
> + unsigned long pteg_addr;
> +
> + pte_index<<= 4;
> + pte_index&= ((1<< ((vcpu_book3s->sdr1& 0x1f) + 11)) - 1)<< 7 | 0x70;
> + pteg_addr = vcpu_book3s->sdr1& 0xfffffffffffc0000ULL;
> + pteg_addr |= pte_index;
> +
> + return pteg_addr;
> +}
Evil space crept in.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply
* Re: [PATCH 00/10] PAPR virtualization on PR KVM
From: Avi Kivity @ 2011-08-09 16:42 UTC (permalink / raw)
To: Alexander Graf; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <1312907508-14599-1-git-send-email-agraf@suse.de>
On 08/09/2011 07:31 PM, Alexander Graf wrote:
> In KVM for Book3S PPC we currently have 2 implementations. There
> is the PR based implementation which works on any POWER system
> you pass in and the super fast HV implementation which requires
> libre firmware (so almost nobody can use it).
Did you mean, non-libre?
>
> Currently, the two target two different machine types, with PR KVM
> being used for bare metal system virtualization, while the HV KVM
> is used to virtualize PAPR.
>
> In an effort to make things more cozy and transparent to the user,
> this patch set implements PAPR capabilities to the PR KVM side, so
> a user doesn't have to worry what the respective kernel module
> supports. Any machine he's virtualizing "just works".
>
Nice. I went though it and nothing shouted "I'm wrong, kill me please",
though I don't claim to understand more than 5% of it.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply
* Re: [PATCH 07/10] KVM: PPC: Add PAPR hypercall code for PR mode
From: Alexander Graf @ 2011-08-09 16:46 UTC (permalink / raw)
To: Avi Kivity; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <4E416315.2080800@redhat.com>
On 08/09/2011 06:40 PM, Avi Kivity wrote:
> On 08/09/2011 07:31 PM, Alexander Graf wrote:
>> When running a PAPR guest, we need to handle a few hypercalls in
>> kernel space,
>> most prominently the page table invalidation (to sync the shadows).
>>
>> So this patch adds handling for a few PAPR hypercalls to PR mode KVM.
>> I tried
>> to share the code with HV mode, but it ended up being a lot easier
>> this way
>> around, as the two differ too much in those details.
>>
>>
>> +++ b/arch/powerpc/kvm/book3s_pr_papr.c
>> @@ -0,0 +1,158 @@
>> +/*
>> + * Copyright (C) 2011. Freescale Inc. All rights reserved.
>> + *
>> + * Authors:
>> + * Alexander Graf<agraf@suse.de>
>> + * Paul Mackerras<paulus@samba.org>
>> + *
>> + * Description:
>> + *
>> + * Hypercall handling for running PAPR guests in PR KVM on Book 3S
>> + * processors.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License, version 2, as
>> + * published by the Free Software Foundation.
>> + */
>
> Copyright freescale, authors Paul and yourself?
Yeah, I'm reasonably clueless when it comes to legal stuff. This code is
inspired by Paul's, but is mostly rewritten since it's so tied into the
virtual MMU. What would the copyright be in that case?
>
>> +
>> +static unsigned long get_pteg_addr(struct kvm_vcpu *vcpu, long
>> pte_index)
>> +{
>> + struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
>> + unsigned long pteg_addr;
>> +
>> + pte_index<<= 4;
>> + pte_index&= ((1<< ((vcpu_book3s->sdr1& 0x1f) + 11)) - 1)<< 7
>> | 0x70;
>> + pteg_addr = vcpu_book3s->sdr1& 0xfffffffffffc0000ULL;
>> + pteg_addr |= pte_index;
>> +
>> + return pteg_addr;
>> +}
>
> Evil space crept in.
Oh noez! Fixed it :)
Alex
^ permalink raw reply
* Re: [PATCH 07/10] KVM: PPC: Add PAPR hypercall code for PR mode
From: Avi Kivity @ 2011-08-09 16:49 UTC (permalink / raw)
To: Alexander Graf; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <4E41646C.1070500@suse.de>
On 08/09/2011 07:46 PM, Alexander Graf wrote:
> On 08/09/2011 06:40 PM, Avi Kivity wrote:
>> On 08/09/2011 07:31 PM, Alexander Graf wrote:
>>> When running a PAPR guest, we need to handle a few hypercalls in
>>> kernel space,
>>> most prominently the page table invalidation (to sync the shadows).
>>>
>>> So this patch adds handling for a few PAPR hypercalls to PR mode
>>> KVM. I tried
>>> to share the code with HV mode, but it ended up being a lot easier
>>> this way
>>> around, as the two differ too much in those details.
>>>
>>>
>>> +++ b/arch/powerpc/kvm/book3s_pr_papr.c
>>> @@ -0,0 +1,158 @@
>>> +/*
>>> + * Copyright (C) 2011. Freescale Inc. All rights reserved.
>>> + *
>>> + * Authors:
>>> + * Alexander Graf<agraf@suse.de>
>>> + * Paul Mackerras<paulus@samba.org>
>>> + *
>>> + * Description:
>>> + *
>>> + * Hypercall handling for running PAPR guests in PR KVM on Book 3S
>>> + * processors.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify
>>> + * it under the terms of the GNU General Public License, version 2, as
>>> + * published by the Free Software Foundation.
>>> + */
>>
>> Copyright freescale, authors Paul and yourself?
>
> Yeah, I'm reasonably clueless when it comes to legal stuff. This code
> is inspired by Paul's, but is mostly rewritten since it's so tied into
> the virtual MMU. What would the copyright be in that case?
Just put your own (or your employers'). If someone contributed to the
code they can add their copyrights (or ask you do do it before inclusion).
It would be good to get Paul's or Ben's so that the unimportant
characters between the whitespace get some braintime.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply
* Re: [PATCH 00/10] PAPR virtualization on PR KVM
From: Alexander Graf @ 2011-08-09 16:49 UTC (permalink / raw)
To: Avi Kivity; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <4E41638A.2010707@redhat.com>
On 08/09/2011 06:42 PM, Avi Kivity wrote:
> On 08/09/2011 07:31 PM, Alexander Graf wrote:
>> In KVM for Book3S PPC we currently have 2 implementations. There
>> is the PR based implementation which works on any POWER system
>> you pass in and the super fast HV implementation which requires
>> libre firmware (so almost nobody can use it).
>
> Did you mean, non-libre?
No, I did mean libre :). Usually firmware on IBM POWER systems already
uses the hypervisor mode for itself, so we can't leverage it. The only
system that is publicly available and can run HV KVM is the YDL
PowerStation which is running SLOF, an open source firmware.
>
>>
>> Currently, the two target two different machine types, with PR KVM
>> being used for bare metal system virtualization, while the HV KVM
>> is used to virtualize PAPR.
>>
>> In an effort to make things more cozy and transparent to the user,
>> this patch set implements PAPR capabilities to the PR KVM side, so
>> a user doesn't have to worry what the respective kernel module
>> supports. Any machine he's virtualizing "just works".
>>
>
> Nice. I went though it and nothing shouted "I'm wrong, kill me
> please", though I don't claim to understand more than 5% of it.
Heh :). The thing giving me the most headaches here is the ENABLE_CAP
part on PAPR. I'd love to have a more flexible framework there that can
configure kvm into the right mode of operation completely, so we get the
chance of passing back "Sorry, that mode doesn't work for me" at the end
of the day.
But I guess we can just do that with the cap enablings too. It's just
slightly more icky.
Alex
^ permalink raw reply
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