* Re: [PATCH] powerpc: fix kernel log of oops/panic instruction dump
From: Ira W. Snyder @ 2012-01-06 23:26 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Paul Mackerras, linuxppc-dev
In-Reply-To: <1325890210.23910.29.camel@pasglop>
On Sat, Jan 07, 2012 at 09:50:10AM +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2012-01-06 at 14:34 -0800, Ira W. Snyder wrote:
> > A kernel oops/panic prints an instruction dump showing several
> > instructions before and after the instruction which caused the
> > oops/panic.
> >
> > The code intended that the faulting instruction be enclosed in angle
> > brackets, however a bug caused the faulting instruction to be
> > interpreted by printk() as the message log level.
> >
> > To fix this, the KERN_CONT log level is added before the actualy text of
If you could fix the text above to say 'actual' (instead of 'actualy')
when you commit this, that would be great. Darn typos. :)
> > the printed message.
>
> Nice one, thanks.
>
> Cheers,
> Ben.
>
> > === Before the patch ===
> >
> > [ 1081.587266] Instruction dump:
> > [ 1081.590236] 7c000110 7c0000f8 5400077c 552907f6 7d290378 992b0003 4e800020 38000001
> > [ 1081.598034] 3d20c03a 9009a114 7c0004ac 39200000
> > [ 1081.602500] 4e800020 3803ffd0 2b800009
> >
> > <4>[ 1081.587266] Instruction dump:
> > <4>[ 1081.590236] 7c000110 7c0000f8 5400077c 552907f6 7d290378 992b0003 4e800020 38000001
> > <4>[ 1081.598034] 3d20c03a 9009a114 7c0004ac 39200000
> > <98090000>[ 1081.602500] 4e800020 3803ffd0 2b800009
> >
> > === After the patch ===
> >
> > [ 51.385216] Instruction dump:
> > [ 51.388186] 7c000110 7c0000f8 5400077c 552907f6 7d290378 992b0003 4e800020 38000001
> > [ 51.395986] 3d20c03a 9009a114 7c0004ac 39200000 <98090000> 4e800020 3803ffd0 2b800009
> >
> > <4>[ 51.385216] Instruction dump:
> > <4>[ 51.388186] 7c000110 7c0000f8 5400077c 552907f6 7d290378 992b0003 4e800020 38000001
> > <4>[ 51.395986] 3d20c03a 9009a114 7c0004ac 39200000 <98090000> 4e800020 3803ffd0 2b800009
> >
> > Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
> > Cc: Paul Mackerras <paulus@samba.org>
> > Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > Cc: linuxppc-dev@lists.ozlabs.org
> > ---
> >
> > In the above examples, the first block is what is shown on the serial
> > console as the machine dies. The second block is the dump as captured by
> > mtdoops.
> >
> > arch/powerpc/kernel/process.c | 6 +++---
> > 1 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> > index 6457574..271f809 100644
> > --- a/arch/powerpc/kernel/process.c
> > +++ b/arch/powerpc/kernel/process.c
> > @@ -566,12 +566,12 @@ static void show_instructions(struct pt_regs *regs)
> > */
> > if (!__kernel_text_address(pc) ||
> > __get_user(instr, (unsigned int __user *)pc)) {
> > - printk("XXXXXXXX ");
> > + printk(KERN_CONT "XXXXXXXX ");
> > } else {
> > if (regs->nip == pc)
> > - printk("<%08x> ", instr);
> > + printk(KERN_CONT "<%08x> ", instr);
> > else
> > - printk("%08x ", instr);
> > + printk(KERN_CONT "%08x ", instr);
> > }
> >
> > pc += sizeof(int);
>
>
^ permalink raw reply
* Re: [PATCH v2] of: Change logic to overwrite cmd_line with CONFIG_CMDLINE
From: Doug Anderson @ 2012-01-07 0:48 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: devicetree-discuss, linuxppc-dev
In-Reply-To: <20110920045510.GA31886@ponder.secretlab.ca>
I know this is a long-dead thread, but I was a little curious about
the motivation here.
I'm looking at trying to support CONFIG_CMDLINE_EXTEND (an ARM
Kconfig) in this function and don't know in which cases I should look
at the CONFIG_CMDLINE and in which cases I should use whatever
happened to be in data before the function was called.
Here's the=A0definition in the KConfig:
<http://git.kernel.org/?p=3Dlinux/kernel/git/next/linux-next.git;a=3Dblob;f=
=3Darch/arm/Kconfig;h=3D24626b0419ee97e963e68329a8eb6769360b46ea;hb=3DHEAD#=
l1984>
Which case do you have=A0CONFIG_CMDLINE defined but not CMDLINE_FORCE?
In those cases, do you happen to have=A0CONFIG_CMDLINE_EXTEND or
CMDLINE_FROM_BOOTLOADER defined?
Thanks much!
-Doug
---
On Mon, Sep 19, 2011 at 9:55 PM, Grant Likely <grant.likely@secretlab.ca> w=
rote:
>
> On Tue, Sep 20, 2011 at 02:50:15PM +1000, Benjamin Herrenschmidt wrote:
> > We used to overwrite with CONFIG_CMDLINE if we found a chosen
> > node but failed to get bootargs out of it or they were empty,
> > unless CONFIG_CMDLINE_FORCE is set.
> >
> > Instead change that to overwrite if "data" is non empty after
> > the bootargs check. It allows arch code to have other mechanisms
> > to retrieve the command line prior to parsing the device-tree.
> >
> > Note: CONFIG_CMDLINE_FORCE case should ideally be handled elsewhere
> > as it won't work as it-is if the device-tree has no /chosen node
> >
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > CC: devicetree-discuss@lists-ozlabs.org
> > CC: Grant Likely <grant.likely@secretlab.ca>
>
> Looks okay to me.
>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
>
> > ---
> > =A0drivers/of/fdt.c | =A0 =A07 ++++++-
> > =A01 files changed, 6 insertions(+), 1 deletions(-)
> >
> > v2. Use "data" instead of "cmd_line" so it works on archs like
> > mips who don't pass cmd_line to that function to start with, also
> > add a comment explaining the mechanism.
> >
> > (resent with right list address as well while at it)
> >
> > diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
> > index 65200af..323b722 100644
> > --- a/drivers/of/fdt.c
> > +++ b/drivers/of/fdt.c
> > @@ -681,9 +681,14 @@ int __init early_init_dt_scan_chosen(unsigned long=
node, const char *uname,
> > =A0 =A0 =A0 if (p !=3D NULL && l > 0)
> > =A0 =A0 =A0 =A0 =A0 =A0 =A0 strlcpy(data, p, min((int)l, COMMAND_LINE_S=
IZE));
> >
> > + =A0 =A0 /*
> > + =A0 =A0 =A0* CONFIG_CMDLINE is meant to be a default in case nothing =
else
> > + =A0 =A0 =A0* managed to set the command line, unless CONFIG_CMDLINE_F=
ORCE
> > + =A0 =A0 =A0* is set in which case we override whatever was found earl=
ier.
> > + =A0 =A0 =A0*/
> > =A0#ifdef CONFIG_CMDLINE
> > =A0#ifndef CONFIG_CMDLINE_FORCE
> > - =A0 =A0 if (p =3D=3D NULL || l =3D=3D 0 || (l =3D=3D 1 && (*p) =3D=3D=
0))
> > + =A0 =A0 if (!data[0])
> > =A0#endif
> > =A0 =A0 =A0 =A0 =A0 =A0 =A0 strlcpy(data, CONFIG_CMDLINE, COMMAND_LINE_=
SIZE);
> > =A0#endif /* CONFIG_CMDLINE */
> > --
> > 1.7.4.1
> >
> >
> >
> >
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply
* Driver(s) for Synopsys' DesignWare USB OTG
From: Nikolai Zhubr @ 2012-01-07 17:30 UTC (permalink / raw)
To: linux-usb, openwrt-devel, linuxppc-dev, support
Hello developers,
I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
controller. This thing is USB 2.0 host/slave/otg capable and is used in
various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
There is some code floating around, partly usable, but all I could see
for now is really not perfect. I also saw commit logs on linuxppc-dev,
but failed to find out what repository they are related to. I'd like to
know if someone is currently developing/testing/maintaining the driver
or is planning to do so in the near future (in a FOSS-friendly manner -
making development results public immediately and with eventual goal of
inclusion into mainline) in order to avoid duplicate/uncoordinated work
and waste of effort.
I'm currently examining 2 versions (That is, 2 sets of files):
1. From android kernel for 8726m-based tablets (like the one I own).
Usable to some extent, but there are issues (e.g. it looks like certain
packets get corrupted, reproducibly, relevant dumps are available)
2. From openwrt kernel for RT305x-based routers. The code looks a bit
more tidy, but not quite well updated (slave-mode parts are unused in
openwrt and they can not even be compiled for modern kernels without
certain patching; have not tried host-mode on the hardware yet)
Quite obviously both versions originated from the same code initially,
but subsequently were apparently tested/corrected/updated by separate
teams. It is not quite clear if all bugfixes were cross-applied
carefully (if at all). I was initially hoping that compare and bisect
will just do the job, but the driver is quite huge... and some files
have diverged substantially in the 2 versions, so at the moment I'm a
bit fed up and will probably resume a bit later. Meanwhile, I'd be happy
to discuss the subject with whoever interested in order to plan my
further steps.
Please CC me, I'm not subscribed to the lists.
Thank you.
Nikolai.
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Peter Chen @ 2012-01-08 3:12 UTC (permalink / raw)
To: Nikolai Zhubr; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel
In-Reply-To: <4F088122.4080505@yandex.ru>
2012/1/8 Nikolai Zhubr <n-a-zhubr@yandex.ru>:
> Hello developers,
>
> I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
> controller. This thing is USB 2.0 host/slave/otg capable and is used in
> various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
>
> There is some code floating around, partly usable, but all I could see fo=
r
> now is really not perfect. I also saw commit logs on linuxppc-dev, but
> failed to find out what repository they are related to. I'd like to know =
if
> someone is currently developing/testing/maintaining the driver or is
> planning to do so in the near future (in a FOSS-friendly manner - making
> development results public immediately and with eventual goal of inclusio=
n
> into mainline) in order to avoid duplicate/uncoordinated work and waste o=
f
> effort.
>
> I'm currently examining 2 versions (That is, 2 sets of files):
>
> 1. From android kernel for 8726m-based tablets (like the one I own). Usab=
le
> to some extent, but there are issues (e.g. it looks like certain packets =
get
> corrupted, reproducibly, relevant dumps are available)
>
> 2. From openwrt kernel for RT305x-based routers. The code looks a bit mor=
e
> tidy, but not quite well updated (slave-mode parts are unused in openwrt =
and
> they can not even be compiled for modern kernels without certain patching=
;
> have not tried host-mode on the hardware yet)
>
> Quite obviously both versions originated from the same code initially, bu=
t
> subsequently were apparently tested/corrected/updated by separate teams. =
It
> is not quite clear if all bugfixes were cross-applied carefully (if at al=
l).
> I was initially hoping that compare and bisect will just do the job, but =
the
> driver is quite huge... and some files have diverged substantially in the=
2
> versions, so at the moment I'm a bit fed up and will probably resume a bi=
t
> later. Meanwhile, I'd be happy to discuss the subject with whoever
> interested in order to plan my further steps.
Please see:
http://marc.info/?l=3Dlinux-usb&m=3D129906859817430&w=3D2
I am not sure we can combine all Synopsys USB drivers to single file, but w=
e
can try combine similar IP versions to one file, this work may need all Syn=
opsys
USB IP driver maintainer work together.
> Thank you.
> Nikolai.
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at =A0http://vger.kernel.org/majordomo-info.html
--=20
BR,
Peter Chen
^ permalink raw reply
* Re: [PATCH v2 powerpc] fix unpaired __trace_hcall_entry and __trace_hcall_exit
From: Li Zhong @ 2012-01-08 3:54 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: PowerPC email list, Paul E. McKenney, Paul Mackerras, LKML,
Anton Blanchard
In-Reply-To: <1325552057.23910.5.camel@pasglop>
On Tue, 2012-01-03 at 11:54 +1100, Benjamin Herrenschmidt wrote:
> On Mon, 2011-12-19 at 10:06 +0800, Li Zhong wrote:
> > Unpaired calling of __trace_hcall_entry and __trace_hcall_exit could
> > cause incorrect preempt count. And it might happen as the global
> > variable hcall_tracepoint_refcount is checked separately before calling
> > them.
> >
> > I don't know much about the powerpc arch. But the idea here is to store
> > the hcall_tracepoint_refcount locally, so __trace_hcall_entry and
> > __trace_hcall_exit will be called or not called in pair by checking the
> > same value.
>
> Can you re-use an existing spot in the stack frame rather than adding
> this entry ? There's plenty of unused spots :-) For example the link
> editor doubleword is never going to be used in that function, we could
> hijack it safely. It would make the patch (and the code) simpler.
>
> Cheers,
> Ben.
Hi Ben,
Thank you for the suggestion. Below is the updated version, much less
code changes :) Would you please help review again to see whether my
understanding is correct?
Thanks,
Zhong
Reported-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Li Zhong <zhong@linux.vnet.ibm.com>
Tested-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/hvCall.S | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/hvCall.S
b/arch/powerpc/platforms/pseries/hvCall.S
index fd05fde..3ce73d0 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -36,6 +36,7 @@ BEGIN_FTR_SECTION; \
b 1f; \
END_FTR_SECTION(0, 1); \
ld r12,hcall_tracepoint_refcount@toc(r2); \
+ std r12,32(r1); \
cmpdi r12,0; \
beq+ 1f; \
mflr r0; \
@@ -74,7 +75,7 @@ END_FTR_SECTION(0, 1); \
BEGIN_FTR_SECTION; \
b 1f; \
END_FTR_SECTION(0, 1); \
- ld r12,hcall_tracepoint_refcount@toc(r2); \
+ ld r12,32(r1); \
cmpdi r12,0; \
beq+ 1f; \
mflr r0; \
--
1.7.5.4
^ permalink raw reply related
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Nikolai Zhubr @ 2012-01-08 12:56 UTC (permalink / raw)
To: Peter Chen; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel
In-Reply-To: <CAL411-riz_Cf1hYMYwEKrJKNHTV3EYup4u5DjmBhdpH+4xcd7g@mail.gmail.com>
Hello Piter,
08.01.2012 7:12, you wrote:
> 2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
>> Hello developers,
>>
>> I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
>> controller. This thing is USB 2.0 host/slave/otg capable and is used in
>> various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
>>
[...trim...]
>
> Please see:
> http://marc.info/?l=linux-usb&m=129906859817430&w=2
Ah, thanks. So sadly uncoordinated work in this area is quite common.
However, in case of Synopsys the situation is even more disappointing
because initially it _was_ a single driver! What probably lacked was
some shared repository and proper communication between developers to
stay in sync. Maybe there were also licensing issues at some point,
though currently file headers contain rather reasonable (imho)
permissive license from Synopsys.
> I am not sure we can combine all Synopsys USB drivers to single file, but we
Synopsys driver which I examine consists of 16 files (each of 2
versions), 200k lines total. I've already perpared some few smaller
files for version merging. So probably it is doable, but quite a lot of
work, therefore I wouldn't like it to be wasted.
> can try combine similar IP versions to one file, this work may need all Synopsys
> USB IP driver maintainer work together.
Exactly. This is why I'm now trying to find all relevant people to begin
with.
Thank you.
Nikolai.
Please CC me, I'm not subscribed to the lists.
>
>
>> Thank you.
>> Nikolai.
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
>
^ permalink raw reply
* [RFC PATCH v2 0/9] Remove useless on_each_cpu return value
From: Gilad Ben-Yossef @ 2012-01-08 13:32 UTC (permalink / raw)
To: linux-kernel
Cc: linux-ia64, David Airlie, Will Deacon, dri-devel, Paul Mackerras,
H. Peter Anvin, Russell King, x86, Ingo Molnar,
Arnaldo Carvalho de Melo, Matt Turner, Fenghua Yu, Peter Zijlstra,
devicetree-discuss, Michal Nazarewicz, Gilad Ben-Yossef,
Ivan Kokshaysky, Rob Herring, Thomas Gleixner, linux-arm-kernel,
Richard Henderson, Tony Luck, linux-alpha, linuxppc-dev
on_each_cpu() returns as its own return value the return value of
smp_call_function(). smp_call_function() in turn returns a hard
coded value of zero.
Some callers to on_each_cpu() waste cycles and bloat code space
by checking the return value to on_each_cpu(), probably for
historical reasons.
This patch set refactors callers to not test on_each_cpu()
(fixed) return value and then refactors on_each_cpu to
return void to avoid confusing future users.
In other words, this patch aims to delete 18 source code lines
while not changing any functionality :-)
I tested as best as I could the x86 changes and compiled some
of the others, but I don't have access to all the needed hardware
for testing. Reviewers and testers welcome!
The only change from the first version is the addition of a
proper Signed-off-by line.
This patch set is also available on branch on_each_cpu_ret_v2
at git://github.com/gby/linux.git
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Reviewed-by: Michal Nazarewicz <mina86@mina86.com>
CC: Michal Nazarewicz <mina86@mina86.com>
CC: David Airlie <airlied@linux.ie>
CC: dri-devel@lists.freedesktop.org
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: Rob Herring <rob.herring@calxeda.com>
CC: linuxppc-dev@lists.ozlabs.org
CC: devicetree-discuss@lists.ozlabs.org
CC: Richard Henderson <rth@twiddle.net>
CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
CC: Matt Turner <mattst88@gmail.com>
CC: linux-alpha@vger.kernel.org
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: x86@kernel.org
CC: Tony Luck <tony.luck@intel.com>
CC: Fenghua Yu <fenghua.yu@intel.com>
CC: linux-ia64@vger.kernel.org
CC: Will Deacon <will.deacon@arm.com>
CC: Peter Zijlstra <a.p.zijlstra@chello.nl>
CC: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
CC: Russell King <linux@arm.linux.org.uk>
CC: linux-arm-kernel@lists.infradead.org
Gilad Ben-Yossef (9):
arm: avoid using on_each_cpu hard coded ret value
ia64: avoid using on_each_cpu hard coded ret value
x86: avoid using on_each_cpu hard coded ret value
alpha: avoid using on_each_cpu hard coded ret value
ppc: avoid using on_each_cpu hard coded ret value
agp: avoid using on_each_cpu hard coded ret value
drm: avoid using on_each_cpu hard coded ret value
smp: refactor on_each_cpu to void returning func
x86: refactor wbinvd_on_all_cpus to void function
arch/alpha/kernel/smp.c | 7 ++-----
arch/arm/kernel/perf_event.c | 2 +-
arch/ia64/kernel/perfmon.c | 12 ++----------
arch/powerpc/kernel/rtas.c | 3 +--
arch/x86/include/asm/smp.h | 5 ++---
arch/x86/lib/cache-smp.c | 4 ++--
drivers/char/agp/generic.c | 3 +--
drivers/gpu/drm/drm_cache.c | 3 +--
include/linux/smp.h | 7 +++----
kernel/smp.c | 6 ++----
10 files changed, 17 insertions(+), 35 deletions(-)
^ permalink raw reply
* [RFC PATCH v2 5/9] ppc: avoid using on_each_cpu hard coded ret value
From: Gilad Ben-Yossef @ 2012-01-08 13:32 UTC (permalink / raw)
To: linux-kernel
Cc: devicetree-discuss, Rob Herring, Gilad Ben-Yossef, Paul Mackerras,
linuxppc-dev
In-Reply-To: <1326029549-2794-1-git-send-email-gilad@benyossef.com>
on_each_cpu always returns a hard coded return code of zero.
Removing all tests based on this return value saves run time
cycles for compares and code bloat for branches.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Reviewed-by: Michal Nazarewicz <mina86@mina86.com>
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: Rob Herring <rob.herring@calxeda.com>
CC: linuxppc-dev@lists.ozlabs.org
CC: devicetree-discuss@lists.ozlabs.org
---
arch/powerpc/kernel/rtas.c | 3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 517b1d8..829629e 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -850,8 +850,7 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
/* Call function on all CPUs. One of us will make the
* rtas call
*/
- if (on_each_cpu(rtas_percpu_suspend_me, &data, 0))
- atomic_set(&data.error, -EINVAL);
+ on_each_cpu(rtas_percpu_suspend_me, &data, 0);
wait_for_completion(&done);
--
1.7.0.4
^ permalink raw reply related
* [RFC PATCH v2 8/9] smp: refactor on_each_cpu to void returning func
From: Gilad Ben-Yossef @ 2012-01-08 13:32 UTC (permalink / raw)
To: linux-kernel
Cc: linux-ia64, David Airlie, Will Deacon, dri-devel, Paul Mackerras,
H. Peter Anvin, Russell King, x86, Ingo Molnar,
Arnaldo Carvalho de Melo, Matt Turner, Fenghua Yu, Peter Zijlstra,
devicetree-discuss, Rob Herring, Gilad Ben-Yossef,
Ivan Kokshaysky, Thomas Gleixner, linux-arm-kernel,
Richard Henderson, Tony Luck, linux-alpha, linuxppc-dev
In-Reply-To: <1326029549-2794-1-git-send-email-gilad@benyossef.com>
on_each_cpu returns the retunr value of smp_call_function
which is hard coded to 0.
Refactor on_each_cpu to a void function and the few callers
that check the return value to save compares and branches.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Reviewed-by: Michal Nazarewicz <mina86@mina86.com>
CC: David Airlie <airlied@linux.ie>
CC: dri-devel@lists.freedesktop.org
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: Rob Herring <rob.herring@calxeda.com>
CC: linuxppc-dev@lists.ozlabs.org
CC: devicetree-discuss@lists.ozlabs.org
CC: Richard Henderson <rth@twiddle.net>
CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
CC: Matt Turner <mattst88@gmail.com>
CC: linux-alpha@vger.kernel.org
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: x86@kernel.org
CC: Tony Luck <tony.luck@intel.com>
CC: Fenghua Yu <fenghua.yu@intel.com>
CC: linux-ia64@vger.kernel.org
CC: Will Deacon <will.deacon@arm.com>
CC: Peter Zijlstra <a.p.zijlstra@chello.nl>
CC: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
CC: Russell King <linux@arm.linux.org.uk>
CC: linux-arm-kernel@lists.infradead.org
---
include/linux/smp.h | 7 +++----
kernel/smp.c | 6 ++----
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 8cc38d3..050ddd4 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -99,7 +99,7 @@ static inline void call_function_init(void) { }
/*
* Call a function on all processors
*/
-int on_each_cpu(smp_call_func_t func, void *info, int wait);
+void on_each_cpu(smp_call_func_t func, void *info, int wait);
/*
* Mark the boot cpu "online" so that it can call console drivers in
@@ -126,12 +126,11 @@ static inline int up_smp_call_function(smp_call_func_t func, void *info)
#define smp_call_function(func, info, wait) \
(up_smp_call_function(func, info))
#define on_each_cpu(func,info,wait) \
- ({ \
+ { \
local_irq_disable(); \
func(info); \
local_irq_enable(); \
- 0; \
- })
+ }
static inline void smp_send_reschedule(int cpu) { }
#define num_booting_cpus() 1
#define smp_prepare_boot_cpu() do {} while (0)
diff --git a/kernel/smp.c b/kernel/smp.c
index db197d6..f66a1b2 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -687,17 +687,15 @@ void __init smp_init(void)
* early_boot_irqs_disabled is set. Use local_irq_save/restore() instead
* of local_irq_disable/enable().
*/
-int on_each_cpu(void (*func) (void *info), void *info, int wait)
+void on_each_cpu(void (*func) (void *info), void *info, int wait)
{
unsigned long flags;
- int ret = 0;
preempt_disable();
- ret = smp_call_function(func, info, wait);
+ smp_call_function(func, info, wait);
local_irq_save(flags);
func(info);
local_irq_restore(flags);
preempt_enable();
- return ret;
}
EXPORT_SYMBOL(on_each_cpu);
--
1.7.0.4
^ permalink raw reply related
* Re: [RFC PATCH 0/9] Remove useless on_each_cpu return value
From: Gilad Ben-Yossef @ 2012-01-08 16:10 UTC (permalink / raw)
To: Peter Zijlstra
Cc: linux-ia64, David Airlie, Will Deacon, dri-devel, Paul Mackerras,
H. Peter Anvin, Russell King, x86, Ingo Molnar,
Arnaldo Carvalho de Melo, Matt Turner, Fenghua Yu,
devicetree-discuss, Michal Nazarewicz, Ivan Kokshaysky,
Rob Herring, Thomas Gleixner, linux-arm-kernel, Richard Henderson,
Tony Luck, linux-kernel, linux-alpha, linuxppc-dev
In-Reply-To: <1325854981.2442.25.camel@twins>
On Fri, Jan 6, 2012 at 3:03 PM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> On Tue, 2012-01-03 at 16:19 +0200, Gilad Ben-Yossef wrote:
>> on_each_cpu() returns as its own return value the return value of
>> smp_call_function(). smp_call_function() in turn returns a hard
>> coded value of zero.
>>
>> Some callers to on_each_cpu() waste cycles and bloat code space
>> by checking the return value to on_each_cpu(), probably for
>> historical reasons.
>
> hysterical raisins,, yumm! :-)
>
>> This patch set refactors callers to not test on_each_cpu()
>> (fixed) return value and then refactors on_each_cpu to
>> return void to avoid confusing future users.
>>
>
> Seems sane enough, fwiw:
>
> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Thanks for the review :-)
I just sent out a V2. No changes except I've added the needed signed-off-by.
Gilad
--
Gilad Ben-Yossef
Chief Coffee Drinker
gilad@benyossef.com
Israel Cell: +972-52-8260388
US Cell: +1-973-8260388
http://benyossef.com
"Unfortunately, cache misses are an equal opportunity pain provider."
-- Mike Galbraith, LKML
^ permalink raw reply
* Re: [RFC PATCH v2 8/9] smp: refactor on_each_cpu to void returning func
From: Russell King - ARM Linux @ 2012-01-08 16:14 UTC (permalink / raw)
To: Gilad Ben-Yossef
Cc: linux-ia64, David Airlie, Will Deacon, dri-devel, Paul Mackerras,
H. Peter Anvin, x86, Ingo Molnar, Arnaldo Carvalho de Melo,
Matt Turner, Fenghua Yu, Peter Zijlstra, devicetree-discuss,
Rob Herring, Ivan Kokshaysky, Thomas Gleixner, linux-arm-kernel,
Richard Henderson, Tony Luck, linux-kernel, linux-alpha,
linuxppc-dev
In-Reply-To: <1326029549-2794-9-git-send-email-gilad@benyossef.com>
On Sun, Jan 08, 2012 at 03:32:28PM +0200, Gilad Ben-Yossef wrote:
> on_each_cpu returns the retunr value of smp_call_function
> which is hard coded to 0.
>
> Refactor on_each_cpu to a void function and the few callers
> that check the return value to save compares and branches.
>
> Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
> Reviewed-by: Michal Nazarewicz <mina86@mina86.com>
> CC: David Airlie <airlied@linux.ie>
> CC: dri-devel@lists.freedesktop.org
> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> CC: Paul Mackerras <paulus@samba.org>
> CC: Grant Likely <grant.likely@secretlab.ca>
> CC: Rob Herring <rob.herring@calxeda.com>
> CC: linuxppc-dev@lists.ozlabs.org
> CC: devicetree-discuss@lists.ozlabs.org
> CC: Richard Henderson <rth@twiddle.net>
> CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
> CC: Matt Turner <mattst88@gmail.com>
> CC: linux-alpha@vger.kernel.org
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Ingo Molnar <mingo@redhat.com>
> CC: "H. Peter Anvin" <hpa@zytor.com>
> CC: x86@kernel.org
> CC: Tony Luck <tony.luck@intel.com>
> CC: Fenghua Yu <fenghua.yu@intel.com>
> CC: linux-ia64@vger.kernel.org
> CC: Will Deacon <will.deacon@arm.com>
> CC: Peter Zijlstra <a.p.zijlstra@chello.nl>
> CC: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
> CC: Russell King <linux@arm.linux.org.uk>
As there's only one place in the ARM code where we look at the return
value, and you've patched that away in patch 1, this looks fine. I've
not checked for users outside of arch/arm, so:
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Thanks.
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git next branch
From: Michael Neuling @ 2012-01-08 23:58 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <alpine.LFD.2.00.1201041605230.15492@right.am.freescale.net>
Kumar,
Can you pick up this one too. Current Linus tree breaks compiling
mpc85xx_defconfig
powerpc: fix compile error with 85xx/p1022_ds.c
http://patchwork.ozlabs.org/patch/130620/
Mikey
In message <alpine.LFD.2.00.1201041605230.15492@right.am.freescale.net> you wro
te:
> The following changes since commit e4f387d8db3ba3c2dae4d8bdfe7bb5f4fe1bcb0d:
>
> powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit (2012-01-03 12:09:27 +1100)
>
> are available in the git repository at:
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next
>
> Andy Fleming (1):
> powerpc: Add TBI PHY node to first MDIO bus
>
> Julia Lawall (1):
> arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
>
> Kumar Gala (3):
> powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
> powerpc/fsl: Update defconfigs to enable some standard FSL HW features
> powerpc/fsl: update compatiable on fsl 16550 uart nodes
>
> Michael Neuling (1):
> powerpc: fix compile error with 85xx/p1023_rds.c
>
> Paul Gortmaker (1):
> sbc834x: put full compat string in board match check
>
> Prabhakar Kushwaha (1):
> powerpc/fsl: Add support for Integrated Flash Controller
>
> Timur Tabi (3):
> powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defc
onfig
> powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
> powerpc/fsl: add MSI support for the Freescale hypervisor
>
> Tony Breeds (1):
> powerpc: fix compile error with 85xx/p1010rdb.c
>
> arch/powerpc/Kconfig | 4 +
> arch/powerpc/boot/dts/asp834x-redboot.dts | 4 +-
> arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi | 4 +-
> arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi | 4 +-
> arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi | 4 +-
> arch/powerpc/boot/dts/gef_ppc9a.dts | 4 +-
> arch/powerpc/boot/dts/gef_sbc310.dts | 4 +-
> arch/powerpc/boot/dts/gef_sbc610.dts | 4 +-
> arch/powerpc/boot/dts/kmeter1.dts | 2 +-
> arch/powerpc/boot/dts/kuroboxHD.dts | 4 +-
> arch/powerpc/boot/dts/kuroboxHG.dts | 4 +-
> arch/powerpc/boot/dts/mpc8308_p1m.dts | 4 +-
> arch/powerpc/boot/dts/mpc8308rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8313erdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8315erdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc832x_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc832x_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8349emitx.dts | 4 +-
> arch/powerpc/boot/dts/mpc8349emitxgp.dts | 4 +-
> arch/powerpc/boot/dts/mpc834x_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc836x_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc836x_rdk.dts | 4 +-
> arch/powerpc/boot/dts/mpc8377_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8377_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8377_wlan.dts | 4 +-
> arch/powerpc/boot/dts/mpc8378_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8378_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8379_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8379_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8540ads.dts | 4 +-
> arch/powerpc/boot/dts/mpc8541cds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8555cds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8610_hpcd.dts | 4 +-
> arch/powerpc/boot/dts/mpc8641_hpcn.dts | 4 +-
> arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts | 4 +-
> arch/powerpc/boot/dts/p1010rdb.dtsi | 5 +
> arch/powerpc/boot/dts/p1020rdb.dtsi | 5 +
> arch/powerpc/boot/dts/p1021mds.dts | 4 +
> arch/powerpc/boot/dts/p1022ds.dts | 12 +-
> arch/powerpc/boot/dts/p2020rdb.dts | 8 +-
> arch/powerpc/boot/dts/sbc8349.dts | 4 +-
> arch/powerpc/boot/dts/sbc8548.dts | 4 +-
> arch/powerpc/boot/dts/sbc8641d.dts | 4 +-
> arch/powerpc/boot/dts/socrates.dts | 4 +-
> arch/powerpc/boot/dts/storcenter.dts | 4 +-
> arch/powerpc/boot/dts/stxssa8555.dts | 4 +-
> arch/powerpc/boot/dts/tqm8540.dts | 4 +-
> arch/powerpc/boot/dts/tqm8541.dts | 4 +-
> arch/powerpc/boot/dts/tqm8548-bigflash.dts | 4 +-
> arch/powerpc/boot/dts/tqm8548.dts | 4 +-
> arch/powerpc/boot/dts/tqm8555.dts | 4 +-
> arch/powerpc/boot/dts/xcalibur1501.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5200.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5200_xmon.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5301.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5330.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5370.dts | 4 +-
> arch/powerpc/configs/corenet32_smp_defconfig | 10 +-
> arch/powerpc/configs/corenet64_smp_defconfig | 3 +-
> arch/powerpc/configs/mpc85xx_defconfig | 16 +-
> arch/powerpc/configs/mpc85xx_smp_defconfig | 17 +-
> arch/powerpc/include/asm/fsl_ifc.h | 834 ++++++++++++++++++++++++
++
> arch/powerpc/platforms/83xx/sbc834x.c | 4 +-
> arch/powerpc/platforms/85xx/p1010rdb.c | 2 -
> arch/powerpc/platforms/85xx/p1023_rds.c | 1 -
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/fsl_ifc.c | 310 ++++++++++
> arch/powerpc/sysdev/fsl_msi.c | 68 ++-
> arch/powerpc/sysdev/fsl_msi.h | 7 +-
> arch/powerpc/sysdev/fsl_pci.c | 84 +++
> arch/powerpc/sysdev/fsl_rmu.c | 1 +
> 71 files changed, 1448 insertions(+), 150 deletions(-)
> create mode 100644 arch/powerpc/include/asm/fsl_ifc.h
> create mode 100644 arch/powerpc/sysdev/fsl_ifc.c
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Peter Chen @ 2012-01-09 2:12 UTC (permalink / raw)
To: Nikolai Zhubr; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <4F099291.6060803@yandex.ru>
On Sun, Jan 08, 2012 at 04:56:49PM +0400, Nikolai Zhubr wrote:
> Hello Piter,
>
> 08.01.2012 7:12, you wrote:
> >2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
> >
> >Please see:
> >http://marc.info/?l=linux-usb&m=129906859817430&w=2
> Ah, thanks. So sadly uncoordinated work in this area is quite
> common. However, in case of Synopsys the situation is even more
> disappointing because initially it _was_ a single driver! What
> probably lacked was some shared repository and proper communication
> between developers to stay in sync. Maybe there were also licensing
> issues at some point, though currently file headers contain rather
> reasonable (imho) permissive license from Synopsys.
>
> >I am not sure we can combine all Synopsys USB drivers to single file, but we
>
> Synopsys driver which I examine consists of 16 files (each of 2
> versions), 200k lines total. I've already perpared some few smaller
> files for version merging. So probably it is doable, but quite a lot
> of work, therefore I wouldn't like it to be wasted.
I mean one file is just a common udc driver for all Synopsys, not all usb file.
For ehci, I think it will be easier to use single file as well as
some specific SoC's quirks if needed.
For udc, as there is no standard spec for how usb device should be designed,
maybe different Synopsys IPs have a little different for work flow.
For otg, it should be not difficult after we split PHY's operation
from the otg, as common otg operation is the same.
>
> >can try combine similar IP versions to one file, this work may need all Synopsys
> >USB IP driver maintainer work together.
>
> Exactly. This is why I'm now trying to find all relevant people to
> begin with.
I know someone(@Pengutronix and @linux.intel.com) is doing that. I think first
we should find which driver file at current code base is most capable and
compatible. I would like to help it, and verify it at Freescale i.MX SoCs.
>
> Thank you.
> Nikolai.
>
> Please CC me, I'm not subscribed to the lists.
>
>
> >
> >
> >>Thank you.
> >>Nikolai.
> >>--
> >>To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> >>the body of a message to majordomo@vger.kernel.org
> >>More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
> >
> >
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Best Regards,
Peter Chen
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Leo Li @ 2012-01-09 5:17 UTC (permalink / raw)
To: Nikolai Zhubr; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <4F099291.6060803@yandex.ru>
On Sun, Jan 8, 2012 at 8:56 PM, Nikolai Zhubr <n-a-zhubr@yandex.ru> wrote:
> Hello Piter,
>
>
> 08.01.2012 7:12, you wrote:
>>
>> 2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
>>>
>>> Hello developers,
>>>
>>> I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
>>> controller. This thing is USB 2.0 host/slave/otg capable and is used in
>>> various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
>>>
> [...trim...]
>>
>>
>> Please see:
>> http://marc.info/?l=linux-usb&m=129906859817430&w=2
>
> Ah, thanks. So sadly uncoordinated work in this area is quite common.
> However, in case of Synopsys the situation is even more disappointing
> because initially it _was_ a single driver! What probably lacked was some
> shared repository and proper communication between developers to stay in
> sync. Maybe there were also licensing issues at some point, though currently
> file headers contain rather reasonable (imho) permissive license from
> Synopsys.
I think the challenge of cooperation in situation like this is that
most companies don't like to advertise the source of the licensed IP
block. Even the owner of the IP block doesn't list all users of the
block(maybe business requirement). It was really hard to find out if
the same IP has been used by anyone else. Also the owner of this USB
IP block has been changed for several times(ARC, TDI, ChipIdea, and
Synopsys) which made it even more difficult to tell.
>
>
>> I am not sure we can combine all Synopsys USB drivers to single file, but
>> we
>
>
> Synopsys driver which I examine consists of 16 files (each of 2 versions),
> 200k lines total. I've already perpared some few smaller files for version
> merging. So probably it is doable, but quite a lot of work, therefore I
> wouldn't like it to be wasted.
I didn't examine the Synopsys driver myself. But if it is so complex
as you described, it might be better to start with the in-tree drivers
IMO.
- Leo
^ permalink raw reply
* [PATCH] powerpc/85xx: check the return value of fsl_add_bridge
From: r66093 @ 2012-01-09 5:45 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jerry Huang
From: Jerry Huang <Chang-Ming.Huang@freescale.com>
For all mpc85xx DS/MDS boards, we should check the return value from
function "fsl_add_bridge", otherwise, when pcie node status is disabled,
the kernel will panic when perform the function "pci_find_hose_for_OF_device"
because the hose controller is NULL.
below is the call trace log:
NIP: c05bca80 LR: c05bca78 CTR: c000ec54
REGS: c0615eb0 TRAP: 0300 Not tainted (3.2.0-rc3-00090-gfa8cbaa-dirty)
MSR: 00021000 <CE,ME> CR: 84044022 XER: 20000000
DEAR: 00000110, ESR: 00000000
TASK = c05e8380[0] 'swapper' THREAD: c0614000
GPR00: c05bca70 c0615f60 c05e8380 00000000 c0550a08 ffffffff c0613140 c061314c
GPR08: 00000000 00000000 00000286 c0620000 84044022 1009d368 00000000 00000000
GPR16: c0000a00 00000014 3fffffff 03ff9000 00000015 7ff3a724 c0614000 00000000
GPR24: 00000000 00000000 00008000 c0550a08 c0534808 efbe3834 00000000 ffffffff
NIP [c05bca80] p1022_ds_setup_arch+0xa8/0x1ac
LR [c05bca78] p1022_ds_setup_arch+0xa0/0x1ac
Call Trace:
[c0615f60] [c05bca70] p1022_ds_setup_arch+0x98/0x1ac (unreliable)
[c0615fb0] [c05b88e0] setup_arch+0x1e8/0x224
[c0615fc0] [c05b4524] start_kernel+0x84/0x2d8
[c0615ff0] [c00003c4] skpinv+0x2b0/0x2ec
Instruction dump:
5400033e 7f80d000 7fa3eb78 40be0010 38800001 4bffedf1 48000008 4bffede9
7fa3eb78 4ba53119 7f64db78 7c691b78
81830114 7f85e378 8149010c
---[ end trace 31fd0ba7d8756001 ]---
Kernel panic - not syncing: Attempted to kill the idle task!
Call Trace:
[c0615d90] [c0007b74] show_stack+0x44/0x154 (unreliable)
[c0615dd0] [c04495b8] panic+0xa4/0x1d4
[c0615e20] [c003e7b8] do_exit+0x588/0x614
[c0615e70] [c000a00c] die+0xc8/0x198
[c0615e90] [c0011a1c] bad_page_fault+0xb4/0xfc
[c0615ea0] [c000e2e0] handle_page_fault+0x7c/0x80
--- Exception: 300 at p1022_ds_setup_arch+0xa8/0x1ac
LR = p1022_ds_setup_arch+0xa0/0x1ac
[c0615f60] [c05bca70] p1022_ds_setup_arch+0x98/0x1ac (unreliable)
[c0615fb0] [c05b88e0] setup_arch+0x1e8/0x224
[c0615fc0] [c05b4524] start_kernel+0x84/0x2d8
[c0615ff0] [c00003c4] skpinv+0x2b0/0x2ec
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
---
arch/powerpc/platforms/85xx/corenet_ds.c | 5 ++++-
arch/powerpc/platforms/85xx/mpc8536_ds.c | 13 +++++++++----
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 13 +++++++++----
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 13 +++++++++----
arch/powerpc/platforms/85xx/p1022_ds.c | 13 +++++++++----
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 14 ++++++++++----
6 files changed, 50 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index c48b661..9d72e3a 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -85,8 +85,11 @@ void __init corenet_ds_setup_arch(void)
for_each_node_by_type(np, "pci") {
if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2")) {
- fsl_add_bridge(np, 0);
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 9ee6455..ee2ebbb 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -82,12 +82,17 @@ static void __init mpc8536_ds_setup_arch(void)
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 2113120..5eba5f0 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -175,12 +175,17 @@ static void __init mpc85xx_ds_setup_arch(void)
of_device_is_compatible(np, "fsl,p2020-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == primary_phb_addr)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == primary_phb_addr) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 495cfd9..3a68122 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -351,12 +351,17 @@ static void __init mpc85xx_mds_setup_arch(void)
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 2bf4342..614768b 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -292,12 +292,17 @@ static void __init p1022_ds_setup_arch(void)
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 569262c..819f29b 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -83,11 +83,17 @@ mpc86xx_hpcn_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
+
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
--
1.7.5.4
^ permalink raw reply related
* [SDK v1.2][PATCH 2/2 v3] powerpc/85xx: Added P1021RDB-PC Platform support
From: Xu Jiucheng @ 2012-01-09 6:53 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Xu Jiucheng
In-Reply-To: <1326092022-10085-1-git-send-email-B37781@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 25 +++++++++++++++++++++++++
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 9feccbb..0c32668 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -113,6 +113,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -135,6 +136,15 @@ static int __init p1020_rdb_probe(void)
return 0;
}
+static int __init p1021_rdb_pc_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
+ return 1;
+ return 0;
+}
+
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.probe = p2020_rdb_probe,
@@ -162,3 +172,18 @@ define_machine(p1020_rdb) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+define_machine(p1021_rdb_pc) {
+ .name = "P1021 RDB-PC",
+ .probe = p1021_rdb_pc_probe,
+ .setup_arch = mpc85xx_rdb_setup_arch,
+ .init_IRQ = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
+
--
1.7.0.4
^ permalink raw reply related
* [SDK v1.2][PATCH 1/2 v3] powerpc/85xx: Add dts for P1021RDB-PC board
From: Xu Jiucheng @ 2012-01-09 6:53 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Matthew McClintock, Xu Jiucheng
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=E2=80=99=
s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 4 +
arch/powerpc/boot/dts/p1021rdb.dts | 96 +++++++++++
arch/powerpc/boot/dts/p1021rdb.dtsi | 236 +++++++++++++++++++++=
++++++
arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 +++++++++++
4 files changed, 432 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/b=
oot/dts/fsl/p1021si-post.dtsi
index 38ba54d..b7929c9 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -144,6 +144,10 @@
/include/ "pq3-usb2-dr-0.dtsi"
=20
/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ sdhci,auto-cmd12;
+ };
+
/include/ "pq3-sec3.3-0.dtsi"
=20
/include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p=
1021rdb.dts
new file mode 100644
index 0000000..90b6b4c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg =3D <0 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges =3D <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ reg =3D <0 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg =3D <0 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@ffe80000 {
+ ranges =3D <0x0 0x0 0xffe80000 0x40000>;
+ reg =3D <0 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/=
p1021rdb.dtsi
new file mode 100644
index 0000000..22ecb6e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dtsi
@@ -0,0 +1,236 @@
+/*
+ * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "cfi-flash";
+ reg =3D <0x0 0x0 0x1000000>;
+ bank-width =3D <2>;
+ device-width =3D <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg =3D <0x0 0x00040000>;
+ label =3D "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg =3D <0x00040000 0x00040000>;
+ label =3D "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg =3D <0x00080000 0x00380000>;
+ label =3D "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg =3D <0x00400000 0x00b00000>;
+ label =3D "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg =3D <0x00f00000 0x00100000>;
+ label =3D "NOR U-Boot Image";
+ };
+ };
+
+ nand@1,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg =3D <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00100000>;
+ label =3D "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg =3D <0x00100000 0x00100000>;
+ label =3D "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00200000 0x00400000>;
+ label =3D "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg =3D <0x00600000 0x00400000>;
+ label =3D "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg =3D <0x00a00000 0x00700000>;
+ label =3D "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for User Writable Area */
+ reg =3D <0x01100000 0x00f00000>;
+ label =3D "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "vitesse-7385";
+ reg =3D <0x2 0x0 0x20000>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible =3D "pericom,pt7c4338";
+ reg =3D <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "spansion,s25sl12801";
+ reg =3D <0>;
+ spi-max-frequency =3D <40000000>; /* input clock */
+
+ partition@u-boot {
+ /* 512KB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00080000>;
+ label =3D "SPI Flash U-Boot Image";
+ read-only;
+ };
+
+ partition@dtb {
+ /* 512KB for DTB Image */
+ reg =3D <0x00080000 0x00080000>;
+ label =3D "SPI Flash DTB Image";
+ };
+
+ partition@kernel {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00100000 0x00400000>;
+ label =3D "SPI Flash Linux Kernel Image";
+ };
+
+ partition@fs {
+ /* 4MB for Compressed RFS Image */
+ reg =3D <0x00500000 0x00400000>;
+ label =3D "SPI Flash Compressed RFSImage";
+ };
+
+ partition@jffs-fs {
+ /* 7MB for JFFS2 based RFS */
+ reg =3D <0x00900000 0x00700000>;
+ label =3D "SPI Flash JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type =3D "ulpi";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <3 1>;
+ reg =3D <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <2 1>;
+ reg =3D <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link =3D <1 1 1000 0 0>;
+ phy-connection-type =3D "rgmii-id";
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle =3D <&phy0>;
+ tbi-handle =3D <&tbi1>;
+ phy-connection-type =3D "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle =3D <&phy1>;
+ tbi-handle =3D <&tbi2>;
+ phy-connection-type =3D "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/d=
ts/p1021rdb_36b.dts
new file mode 100644
index 0000000..ea6d8b5
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg =3D <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges =3D <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ reg =3D <0xf 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg =3D <0xf 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@fffe80000 {
+ ranges =3D <0x0 0xf 0xffe80000 0x40000>;
+ reg =3D <0xf 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
--=20
1.7.0.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/85xx: Add dts for P1021RDB-PC board
From: Xu Jiucheng @ 2012-01-09 6:54 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Matthew McClintock, Xu Jiucheng
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=E2=80=99=
s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 4 +
arch/powerpc/boot/dts/p1021rdb.dts | 96 +++++++++++
arch/powerpc/boot/dts/p1021rdb.dtsi | 236 +++++++++++++++++++++=
++++++
arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 +++++++++++
4 files changed, 432 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/b=
oot/dts/fsl/p1021si-post.dtsi
index 38ba54d..b7929c9 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -144,6 +144,10 @@
/include/ "pq3-usb2-dr-0.dtsi"
=20
/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ sdhci,auto-cmd12;
+ };
+
/include/ "pq3-sec3.3-0.dtsi"
=20
/include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p=
1021rdb.dts
new file mode 100644
index 0000000..90b6b4c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg =3D <0 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges =3D <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ reg =3D <0 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg =3D <0 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@ffe80000 {
+ ranges =3D <0x0 0x0 0xffe80000 0x40000>;
+ reg =3D <0 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/=
p1021rdb.dtsi
new file mode 100644
index 0000000..22ecb6e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dtsi
@@ -0,0 +1,236 @@
+/*
+ * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "cfi-flash";
+ reg =3D <0x0 0x0 0x1000000>;
+ bank-width =3D <2>;
+ device-width =3D <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg =3D <0x0 0x00040000>;
+ label =3D "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg =3D <0x00040000 0x00040000>;
+ label =3D "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg =3D <0x00080000 0x00380000>;
+ label =3D "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg =3D <0x00400000 0x00b00000>;
+ label =3D "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg =3D <0x00f00000 0x00100000>;
+ label =3D "NOR U-Boot Image";
+ };
+ };
+
+ nand@1,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg =3D <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00100000>;
+ label =3D "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg =3D <0x00100000 0x00100000>;
+ label =3D "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00200000 0x00400000>;
+ label =3D "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg =3D <0x00600000 0x00400000>;
+ label =3D "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg =3D <0x00a00000 0x00700000>;
+ label =3D "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for User Writable Area */
+ reg =3D <0x01100000 0x00f00000>;
+ label =3D "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "vitesse-7385";
+ reg =3D <0x2 0x0 0x20000>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible =3D "pericom,pt7c4338";
+ reg =3D <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "spansion,s25sl12801";
+ reg =3D <0>;
+ spi-max-frequency =3D <40000000>; /* input clock */
+
+ partition@u-boot {
+ /* 512KB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00080000>;
+ label =3D "SPI Flash U-Boot Image";
+ read-only;
+ };
+
+ partition@dtb {
+ /* 512KB for DTB Image */
+ reg =3D <0x00080000 0x00080000>;
+ label =3D "SPI Flash DTB Image";
+ };
+
+ partition@kernel {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00100000 0x00400000>;
+ label =3D "SPI Flash Linux Kernel Image";
+ };
+
+ partition@fs {
+ /* 4MB for Compressed RFS Image */
+ reg =3D <0x00500000 0x00400000>;
+ label =3D "SPI Flash Compressed RFSImage";
+ };
+
+ partition@jffs-fs {
+ /* 7MB for JFFS2 based RFS */
+ reg =3D <0x00900000 0x00700000>;
+ label =3D "SPI Flash JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type =3D "ulpi";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <3 1>;
+ reg =3D <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <2 1>;
+ reg =3D <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link =3D <1 1 1000 0 0>;
+ phy-connection-type =3D "rgmii-id";
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle =3D <&phy0>;
+ tbi-handle =3D <&tbi1>;
+ phy-connection-type =3D "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle =3D <&phy1>;
+ tbi-handle =3D <&tbi2>;
+ phy-connection-type =3D "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/d=
ts/p1021rdb_36b.dts
new file mode 100644
index 0000000..ea6d8b5
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg =3D <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges =3D <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ reg =3D <0xf 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg =3D <0xf 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@fffe80000 {
+ ranges =3D <0x0 0xf 0xffe80000 0x40000>;
+ reg =3D <0xf 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
--=20
1.7.0.4
^ permalink raw reply related
* [PATCH 2/2] powerpc/85xx: Added P1021RDB-PC Platform support
From: Xu Jiucheng @ 2012-01-09 6:54 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Xu Jiucheng
In-Reply-To: <1326092084-10150-1-git-send-email-B37781@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 25 +++++++++++++++++++++++++
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 9feccbb..0c32668 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -113,6 +113,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -135,6 +136,15 @@ static int __init p1020_rdb_probe(void)
return 0;
}
+static int __init p1021_rdb_pc_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
+ return 1;
+ return 0;
+}
+
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.probe = p2020_rdb_probe,
@@ -162,3 +172,18 @@ define_machine(p1020_rdb) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+define_machine(p1021_rdb_pc) {
+ .name = "P1021 RDB-PC",
+ .probe = p1021_rdb_pc_probe,
+ .setup_arch = mpc85xx_rdb_setup_arch,
+ .init_IRQ = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
+
--
1.7.0.4
^ permalink raw reply related
* [PATCH] powerpc/85xx: Add p2020rdb-pc dts support
From: Yuantian.Tang @ 2012-01-09 7:43 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Tang Yuantian, Poonam Aggrwal, Prabhakar Kushwaha
From: Tang Yuantian <B29983@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
---
arch/powerpc/boot/dts/p2020rdb-pc.dts | 96 +++++++++
arch/powerpc/boot/dts/p2020rdb-pc.dtsi | 241 ++++++++++++++++++++++
arch/powerpc/boot/dts/p2020rdb-pc_36b.dts | 96 +++++++++
arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts | 90 ++++++++
arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts | 152 ++++++++++++++
5 files changed, 675 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc.dts
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc.dtsi
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dts b/arch/powerpc/boot/dts/p2020rdb-pc.dts
new file mode 100644
index 0000000..852e5b2
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc.dts
@@ -0,0 +1,96 @@
+/*
+ * P2020 RDB-PC 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p2020si-pre.dtsi"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0 0xffe05000 0 0x1000>;
+
+ /* NOR and NAND Flashes */
+ ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000
+ 0x3 0x0 0x0 0xffa00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe08000 {
+ reg = <0 0xffe08000 0 0x1000>;
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe09000 {
+ reg = <0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci2: pcie@ffe0a000 {
+ reg = <0 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p2020rdb-pc.dtsi"
+/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
new file mode 100644
index 0000000..c21d1c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
@@ -0,0 +1,241 @@
+/*
+ * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x1000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg = <0x00040000 0x00040000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg = <0x00080000 0x00380000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg = <0x00400000 0x00b00000>;
+ label = "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00200000 0x00400000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg = <0x00600000 0x00400000>;
+ label = "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg = <0x00a00000 0x00700000>;
+ label = "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = <0x01100000 0x00f00000>;
+ label = "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "vitesse-7385";
+ reg = <0x2 0x0 0x20000>;
+ };
+
+ cpld@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cpld";
+ reg = <0x3 0x0 0x20000>;
+ read-only;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,m25p80";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partition@0 {
+ /* 512KB for u-boot Bootloader Image */
+ reg = <0x0 0x00080000>;
+ label = "SPI U-Boot Image";
+ read-only;
+ };
+
+ partition@80000 {
+ /* 512KB for DTB Image */
+ reg = <0x00080000 0x00080000>;
+ label = "SPI DTB Image";
+ };
+
+ partition@100000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00100000 0x00400000>;
+ label = "SPI Linux Kernel Image";
+ };
+
+ partition@500000 {
+ /* 4MB for Compressed RFS Image */
+ reg = <0x00500000 0x00400000>;
+ label = "SPI Compressed RFS Image";
+ };
+
+ partition@900000 {
+ /* 7MB for JFFS2 based RFS */
+ reg = <0x00900000 0x00700000>;
+ label = "SPI JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ mdio@24520 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ };
+
+ mdio@25520 {
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26520 {
+ status = "disabled";
+ };
+
+ ptp_clock@24e00 {
+ fsl,tclk-period = <5>;
+ fsl,tmr-prsc = <200>;
+ fsl,tmr-add = <0xCCCCCCCD>;
+ fsl,tmr-fiper1 = <0x3B9AC9FB>;
+ fsl,tmr-fiper2 = <0x0001869B>;
+ fsl,max-adj = <249999999>;
+ };
+
+ enet0: ethernet@24000 {
+ fixed-link = <1 1 1000 0 0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@25000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@26000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
new file mode 100644
index 0000000..b5a56ca
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P2020 RDB-PC 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p2020si-pre.dtsi"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR and NAND Flashes */
+ ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000
+ 0x3 0x0 0xf 0xffa00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe08000 {
+ reg = <0xf 0xffe08000 0 0x1000>;
+ status = "disabled";
+ };
+
+ pci1: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci2: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p2020rdb-pc.dtsi"
+/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts
new file mode 100644
index 0000000..5f44fa2
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts
@@ -0,0 +1,90 @@
+/*
+ * P2020 RDB-PC P2020 RDB Core0 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ */
+
+/include/ "p2020rdb-pc.dts"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC", "fsl,MPC85XXRDB-CAMP";
+
+ cpus {
+ PowerPC,P2020@1 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ serial1: serial@4600 {
+ status = "disabled";
+ };
+
+ dma@c300 {
+ status = "disabled";
+ };
+
+ enet0: ethernet@24000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 42 76 77 78 79 /* serial1 , dma2 */
+ 29 30 34 26 /* enet0, pci1 */
+ 0xe0 0xe1 0xe2 0xe3 /* msi */
+ 0xe4 0xe5 0xe6 0xe7
+ >;
+ };
+
+ msi@41600 {
+ status = "disabled";
+ };
+ };
+
+ pci1: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci2: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts
new file mode 100644
index 0000000..2d3c8cf
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts
@@ -0,0 +1,152 @@
+/*
+ * P2020 RDB-PC P2020 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ */
+
+/include/ "p2020rdb-pc.dts"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC", "fsl,MPC85XXRDB-CAMP";
+
+ aliases {
+ ethernet0 = &enet0;
+ serial0 = &serial1;
+ };
+
+ cpus {
+ PowerPC,P2020@0 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ ecm-law@0 {
+ status = "disabled";
+ };
+
+ ecm@1000 {
+ status = "disabled";
+ };
+
+ memory-controller@2000 {
+ status = "disabled";
+ };
+
+ i2c@3000 {
+ status = "disabled";
+ };
+
+ i2c@3100 {
+ status = "disabled";
+ };
+
+ serial0: serial@4500 {
+ status = "disabled";
+ };
+
+ spi@7000 {
+ status = "disabled";
+ };
+
+ gpio-controller@f000 {
+ status = "disabled";
+ };
+
+ dma@21300 {
+ status = "disabled";
+ };
+
+ usb@22000 {
+ status = "disabled";
+ };
+
+ mdio@24520 {
+ status = "disabled";
+ };
+
+ mdio@25520 {
+ status = "disabled";
+ };
+
+ mdio@26520 {
+ status = "disabled";
+ };
+
+ enet1: ethernet@25000 {
+ status = "disabled";
+ };
+
+ enet2: ethernet@26000 {
+ status = "disabled";
+ };
+
+ sdhci@2e000 {
+ status = "disabled";
+ };
+
+ crypto@30000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */
+ 16 20 21 22 23 28 /* L2, dma1, USB */
+ 03 35 36 40 31 32 33 /* mdio, enet1, enet2 */
+ 72 45 58 25 /* sdhci, crypto , pci */
+ >;
+ };
+
+ global-utilities@e0000 { //global utilities block
+ status = "disabled";
+ };
+
+ };
+
+ pci1: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci2: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
--
1.6.4
^ permalink raw reply related
* [PATCH] powerpc/85xx: Add P1024rdb dts support
From: b29983 @ 2012-01-09 8:37 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Tang Yuantian, Jin Qing, Tang Yuantian
From: Tang Yuantian <B29983@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi | 68 ++++++++
arch/powerpc/boot/dts/p1024rdb.dts | 87 ++++++++++
arch/powerpc/boot/dts/p1024rdb.dtsi | 228 +++++++++++++++++++++++++
arch/powerpc/boot/dts/p1024rdb_36b.dts | 87 ++++++++++
arch/powerpc/boot/dts/p1024rdb_camp_core0.dts | 106 ++++++++++++
arch/powerpc/boot/dts/p1024rdb_camp_core1.dts | 161 +++++++++++++++++
6 files changed, 737 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi
create mode 100644 arch/powerpc/boot/dts/p1024rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1024rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1024rdb_36b.dts
create mode 100644 arch/powerpc/boot/dts/p1024rdb_camp_core0.dts
create mode 100644 arch/powerpc/boot/dts/p1024rdb_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi
new file mode 100644
index 0000000..4a0406b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi
@@ -0,0 +1,68 @@
+/*
+ * P1024 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+ compatible = "fsl,P1024";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,P1024@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ next-level-cache = <&L2>;
+ };
+
+ PowerPC,P1024@1 {
+ device_type = "cpu";
+ reg = <0x1>;
+ next-level-cache = <&L2>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb.dts b/arch/powerpc/boot/dts/p1024rdb.dts
new file mode 100644
index 0000000..1a89f9c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dts
@@ -0,0 +1,87 @@
+/*
+ * P1024 RDB 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1024si-pre.dtsi"
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0x0 0xffe05000 0 0x1000>;
+ ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ reg = <0x0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
new file mode 100644
index 0000000..eb3141d
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dtsi
@@ -0,0 +1,228 @@
+/*
+ * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x1000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg = <0x00040000 0x00040000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg = <0x00080000 0x00380000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg = <0x00400000 0x00b00000>;
+ label = "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00200000 0x00400000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg = <0x00600000 0x00400000>;
+ label = "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = <0x00a00000 0x00f00000>;
+ label = "NAND JFFS2 Root File System";
+ };
+
+ partition@1900000 {
+ /* 7MB for User Writable Area */
+ reg = <0x01900000 0x00700000>;
+ label = "NAND Writable User area";
+ };
+ };
+};
+
+&soc {
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,m25p80";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partition@0 {
+ /* 512KB for u-boot Bootloader Image */
+ reg = <0x0 0x00080000>;
+ label = "SPI U-Boot Image";
+ read-only;
+ };
+
+ partition@80000 {
+ /* 512KB for DTB Image */
+ reg = <0x00080000 0x00080000>;
+ label = "SPI DTB Image";
+ };
+
+ partition@100000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00100000 0x00400000>;
+ label = "SPI Linux Kernel Image";
+ };
+
+ partition@500000 {
+ /* 4MB for Compressed RFS Image */
+ reg = <0x00500000 0x00400000>;
+ label = "SPI Compressed RFS Image";
+ };
+
+ partition@900000 {
+ /* 7MB for JFFS2 based RFS */
+ reg = <0x00900000 0x00700000>;
+ label = "SPI JFFS2 RFS";
+ };
+ };
+ };
+
+ i2c@3000 {
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ usb@23000 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ phy2: ethernet-phy@2 {
+ interrupts = <1 1 0 0>;
+ reg = <0x2>;
+ };
+ };
+
+ mdio@25000 {
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ ethernet@b0000 {
+ phy-handle = <&phy2>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ ethernet@b1000 {
+ phy-handle = <&phy0>;
+ tbi-handle = <&tbi0>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@b2000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
new file mode 100644
index 0000000..abfa328
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
@@ -0,0 +1,87 @@
+/*
+ * P1024 RDB 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1024si-pre.dtsi"
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0 0x1000>;
+ ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_camp_core0.dts b/arch/powerpc/boot/dts/p1024rdb_camp_core0.dts
new file mode 100644
index 0000000..abab1b0
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_camp_core0.dts
@@ -0,0 +1,106 @@
+/*
+ * P1024 RDB Core0 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have all the devices except that USB, SDHCI
+ * enet0.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ */
+
+/include/ "p1024rdb.dts"
+
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB", "fsl,MPC85XXRDB-CAMP";
+
+ aliases {
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ serial0 = &serial0;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ PowerPC,P1024@1 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ serial1: serial@4600 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy2: ethernet-phy@2 {
+ status = "disabled";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ status = "disabled";
+ };
+
+ sdhci@2e000 {
+ status = "disabled";
+ };
+
+ usb@22000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 42 29 30 34 /* serial1, enet0-queue-group0 */
+ 17 18 24 45 /* enet0-queue-group1, crypto */
+ 1 28 46 72 /* phy2 usb sdhc */
+ >;
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_camp_core1.dts b/arch/powerpc/boot/dts/p1024rdb_camp_core1.dts
new file mode 100644
index 0000000..461af60
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_camp_core1.dts
@@ -0,0 +1,161 @@
+/*
+ * P1024 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have USB, SDHCI and enet0.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ */
+
+/include/ "p1024rdb.dts"
+
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB", "fsl,MPC85XXRDB-CAMP";
+
+ aliases {
+ ethernet0 = &enet0;
+ serial0 = &serial1;
+ };
+
+ cpus {
+ PowerPC,P1024@0 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ ecm-law@0 {
+ status = "disabled";
+ };
+
+ ecm@1000 {
+ status = "disabled";
+ };
+
+ memory-controller@2000 {
+ status = "disabled";
+ };
+
+ i2c@3000 {
+ status = "disabled";
+ };
+
+ i2c@3100 {
+ status = "disabled";
+ };
+
+ serial0: serial@4500 {
+ status = "disabled";
+ };
+
+ spi@7000 {
+ status = "disabled";
+ };
+
+ gpio: gpio-controller@f000 {
+ status = "disabled";
+ };
+
+ dma@c300 {
+ status = "disabled";
+ };
+
+ dma@21300 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ status = "disabled";
+ };
+ phy1: ethernet-phy@1 {
+ status = "disabled";
+ };
+ };
+
+ mdio@25000 {
+ status = "disabled";
+ };
+
+ enet1: ethernet@b1000 {
+ status = "disabled";
+ };
+
+ enet2: ethernet@b2000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 16 /* ecm, mem, L2, pci0, pci1 */
+ 43 42 59 /* i2c, serial0, spi */
+ 47 63 62 /* gpio, tdm */
+ 20 21 22 23 /* dma */
+ 03 02 58 /* mdio crypto */
+ 35 36 40 /* enet1-queue-group0 */
+ 51 52 67 /* enet1-queue-group1 */
+ 31 32 33 /* enet2-queue-group0 */
+ 25 26 27 /* enet2-queue-group1 */
+ 0xb0 0xb1 0xb2 /* message */
+ 0xb3 0xb4 0xb5
+ 0xb6 0xb7
+ 0xe0 0xe1 0xe2 /* msi */
+ 0xe3 0xe4 0xe5
+ 0xe6 0xe7
+ >;
+ };
+
+ msi@41600 {
+ status = "disabled";
+ };
+
+ global-utilities@e0000 { //global utilities block
+ status = "disabled";
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
--
1.6.4
^ permalink raw reply related
* [PATCH 1/2][v2] mtd/nand:Fix wrong address read in is_blank()
From: Prabhakar Kushwaha @ 2012-01-09 12:24 UTC (permalink / raw)
To: linuxppc-dev, linux-mtd; +Cc: scottwood, Poonam Aggrwal, Prabhakar Kushwaha
IFC NAND Machine calculates ECC on 512byte sector. Same is taken care in
fsl_ifc_run_command() while ECC status verification. Here buffer number is
calculated assuming 512byte sector and same is passed to is_blank.
However in is_blank() buffer address is calculated using mdt->writesize which is
wrong. It should be calculated on basis of ecc sector size.
Also, in fsl_ifc_run_command() bufferpage is calculated on the basis of ecc sector
size instead of hard coded value.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
This patch is created on top of IFC driver patch (already floated in mailing
list). Please find their link:
http://patchwork.ozlabs.org/patch/133315/
http://patchwork.ozlabs.org/patch/133316/
Tested on P1010RDB
Changes for v2: Incorporated Scott's comments
- Updated copyright
- is_blank - works on ecc buffer block
- check_read_ecc() - Calculate actual ecc buffer number
drivers/mtd/nand/fsl_ifc_nand.c | 14 ++++++++------
1 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 8475b88..c0529ea 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -1,7 +1,7 @@
/*
* Freescale Integrated Flash Controller NAND driver
*
- * Copyright 2011 Freescale Semiconductor, Inc
+ * Copyright 2011,2012 Freescale Semiconductor, Inc
*
* Author: Dipen Dudhat <Dipen.Dudhat@freescale.com>
*
@@ -191,12 +191,12 @@ static int is_blank(struct mtd_info *mtd, unsigned int bufnum)
{
struct nand_chip *chip = mtd->priv;
struct fsl_ifc_mtd *priv = chip->priv;
- u8 __iomem *addr = priv->vbase + bufnum * (mtd->writesize * 2);
+ u8 __iomem *addr = priv->vbase + bufnum * chip->ecc.size;
u32 __iomem *mainarea = (u32 *)addr;
u8 __iomem *oob = addr + mtd->writesize;
int i;
- for (i = 0; i < mtd->writesize / 4; i++) {
+ for (i = 0; i < chip->ecc.size / 4; i++) {
if (__raw_readl(&mainarea[i]) != 0xffffffff)
return 0;
}
@@ -215,12 +215,15 @@ static int is_blank(struct mtd_info *mtd, unsigned int bufnum)
static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
u32 *eccstat, unsigned int bufnum)
{
+ struct nand_chip *chip = mtd->priv;
+ int bufperpage = mtd->writesize / chip->ecc.size;
+ int eccbuf_num = bufnum + (bufnum / bufperpage) * bufperpage;
u32 reg = eccstat[bufnum / 4];
int errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
if (errors == 15) { /* uncorrectable */
/* Blank pages fail hw ECC checks */
- if (is_blank(mtd, bufnum))
+ if (is_blank(mtd, eccbuf_num))
return 1;
/*
@@ -273,7 +276,7 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
dev_err(priv->dev, "NAND Flash Write Protect Error\n");
if (nctrl->eccread) {
- int bufperpage = mtd->writesize / 512;
+ int bufperpage = mtd->writesize / chip->ecc.size;
int bufnum = (nctrl->page & priv->bufnum_mask) * bufperpage;
int bufnum_end = bufnum + bufperpage - 1;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/2][v2] mtd/nand: Fix IFC driver to support 2K NAND page
From: Prabhakar Kushwaha @ 2012-01-09 12:24 UTC (permalink / raw)
To: linuxppc-dev, linux-mtd; +Cc: scottwood, Poonam Aggrwal, Prabhakar Kushwaha
1) OOB area should be updated irrespective of NAND page size. Earlier it was
updated only for 512byte NAND page.
2) During OOB update fbcr should be equal to OOB size.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
This patch is created on top of IFC driver patch (already floated in mailing
list). Please find their link:
http://patchwork.ozlabs.org/patch/133315/
http://patchwork.ozlabs.org/patch/133316/
Tested on P1010RDB
Changes for v2: Incorporated Scott's comments
- Added missed NAND_CMD_READOOB
- Updated function as per Scott's advice
drivers/mtd/nand/fsl_ifc_nand.c | 21 +++++++++------------
1 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index c0529ea..52bd706d 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -440,22 +440,19 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
out_be32(&ifc->ifc_nand.nand_fir1,
(IFC_FIR_OP_CW1 << IFC_NAND_FIR1_OP5_SHIFT));
- if (column >= mtd->writesize) {
- /* OOB area --> READOOB */
- column -= mtd->writesize;
- nand_fcr0 |= NAND_CMD_READOOB <<
- IFC_NAND_FCR0_CMD0_SHIFT;
- ifc_nand_ctrl->oob = 1;
- } else if (column < 256)
- /* First 256 bytes --> READ0 */
+ if (column >= mtd->writesize)
nand_fcr0 |=
- NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT;
+ NAND_CMD_READOOB << IFC_NAND_FCR0_CMD0_SHIFT;
else
- /* Second 256 bytes --> READ1 */
nand_fcr0 |=
- NAND_CMD_READ1 << IFC_NAND_FCR0_CMD0_SHIFT;
+ NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT;
}
+ if (column >= mtd->writesize) {
+ /* OOB area --> READOOB */
+ column -= mtd->writesize;
+ ifc_nand_ctrl->oob = 1;
+ }
out_be32(&ifc->ifc_nand.nand_fcr0, nand_fcr0);
set_addr(mtd, column, page_addr, ifc_nand_ctrl->oob);
return;
@@ -466,7 +463,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
int full_page;
if (ifc_nand_ctrl->oob) {
out_be32(&ifc->ifc_nand.nand_fbcr,
- ifc_nand_ctrl->index);
+ ifc_nand_ctrl->index - ifc_nand_ctrl->column);
full_page = 0;
} else {
out_be32(&ifc->ifc_nand.nand_fbcr, 0);
--
1.7.5.4
^ permalink raw reply related
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Nikolai Zhubr @ 2012-01-09 12:41 UTC (permalink / raw)
To: Peter Chen; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <20120109021220.GA10198@nchen-desktop>
Hello Peter,
09.01.2012 6:12, Peter Chen:
>>> I am not sure we can combine all Synopsys USB drivers to single file, but we
>>
>> Synopsys driver which I examine consists of 16 files (each of 2
>> versions), 200k lines total. I've already perpared some few smaller
>> files for version merging. So probably it is doable, but quite a lot
>> of work, therefore I wouldn't like it to be wasted.
> I mean one file is just a common udc driver for all Synopsys, not all usb file.
> For ehci, I think it will be easier to use single file as well as
> some specific SoC's quirks if needed.
> For udc, as there is no standard spec for how usb device should be designed,
> maybe different Synopsys IPs have a little different for work flow.
> For otg, it should be not difficult after we split PHY's operation
> from the otg, as common otg operation is the same.
>>
>>> can try combine similar IP versions to one file, this work may need all Synopsys
>>> USB IP driver maintainer work together.
>>
>> Exactly. This is why I'm now trying to find all relevant people to
>> begin with.
> I know someone(@Pengutronix and @linux.intel.com) is doing that. I think first
> we should find which driver file at current code base is most capable and
> compatible. I would like to help it, and verify it at Freescale i.MX SoCs.
Ok. Because my resources are limited (and my knowledge is actually
limited too) I'll list what exactly I'm able (and willing) to do:
- split formatting/naming/uninteresting changes from algorythmical
changes, prepare clean diffs as necessary (boring work, but anyway);
- bisect changes which make the driver stop working on my tablet;
- try whichever driver parameters and see what happens to my tablet;
- connect the tablet to a regular linux PC with USB cable, do some
tests, capture traffic dumps as necessary;
- connect some devices to the tablet, do tests, report results;
and with some luck:
- prepare bufixes (depending very much on how simple is the bug).
So basically my effort would probably only be usefull in cooperation
with someone with more knowledge and understanding of the situation in
whole. Otherwise it would be more wasting of time.
If usb issues were solved, it might make some sense to try to create
e.g. a generic openwrt target for 8726m-based tablet. (Of course it
wouldn't allow to use the device for its intended purpose yet, but still
might be interesting as kind of devel/testing reference option)
Thank you.
Nikolai.
>>
>> Thank you.
>> Nikolai.
>>
>> Please CC me, I'm not subscribed to the lists.
>>
>>
>>>
>>>
>>>> Thank you.
>>>> Nikolai.
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
>>>> the body of a message to majordomo@vger.kernel.org
>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>
>>>
>>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Nikolai Zhubr @ 2012-01-09 12:44 UTC (permalink / raw)
To: Leo Li; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <CADRPPNRLKhDEU=mVDjbxaNtOD+665hQodhQzpVBc11120GpuJQ@mail.gmail.com>
Hello Leo,
09.01.2012 9:17, Leo Li:
> On Sun, Jan 8, 2012 at 8:56 PM, Nikolai Zhubr<n-a-zhubr@yandex.ru> wrote:
>>> 2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
>>>>
>>>> Hello developers,
>>>>
>>>> I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
>>>> controller. This thing is USB 2.0 host/slave/otg capable and is used in
>>>> various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
>>>>
[...trim...]
>
> I think the challenge of cooperation in situation like this is that
> most companies don't like to advertise the source of the licensed IP
> block. Even the owner of the IP block doesn't list all users of the
> block(maybe business requirement). It was really hard to find out if
> the same IP has been used by anyone else. Also the owner of this USB
> IP block has been changed for several times(ARC, TDI, ChipIdea, and
> Synopsys) which made it even more difficult to tell.
Ah, I see. It explains.
But communicating in private and keeping some public repository up to
date would still be allowed I suppose?
>
>>
>>
>>> I am not sure we can combine all Synopsys USB drivers to single file, but
>>> we
>>
>>
>> Synopsys driver which I examine consists of 16 files (each of 2 versions),
>> 200k lines total. I've already perpared some few smaller files for version
>> merging. So probably it is doable, but quite a lot of work, therefore I
>> wouldn't like it to be wasted.
>
> I didn't examine the Synopsys driver myself. But if it is so complex
> as you described, it might be better to start with the in-tree drivers
> IMO.
Unfortunately its far beyond my capabilities at the moment. Besides, it
looks like huge effort has already been invested into the existing
driver, so to me it seems fixing it rather than starting from scratch
would be more realistic anyway (unless a company with unlimited
resources step in...)
Thank you.
Nikolai.
>
> - Leo
>
>
^ permalink raw reply
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