* Re: [RFC PATCH v2 8/9] smp: refactor on_each_cpu to void returning func
From: Russell King - ARM Linux @ 2012-01-08 16:14 UTC (permalink / raw)
To: Gilad Ben-Yossef
Cc: linux-ia64, David Airlie, Will Deacon, dri-devel, Paul Mackerras,
H. Peter Anvin, x86, Ingo Molnar, Arnaldo Carvalho de Melo,
Matt Turner, Fenghua Yu, Peter Zijlstra, devicetree-discuss,
Rob Herring, Ivan Kokshaysky, Thomas Gleixner, linux-arm-kernel,
Richard Henderson, Tony Luck, linux-kernel, linux-alpha,
linuxppc-dev
In-Reply-To: <1326029549-2794-9-git-send-email-gilad@benyossef.com>
On Sun, Jan 08, 2012 at 03:32:28PM +0200, Gilad Ben-Yossef wrote:
> on_each_cpu returns the retunr value of smp_call_function
> which is hard coded to 0.
>
> Refactor on_each_cpu to a void function and the few callers
> that check the return value to save compares and branches.
>
> Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
> Reviewed-by: Michal Nazarewicz <mina86@mina86.com>
> CC: David Airlie <airlied@linux.ie>
> CC: dri-devel@lists.freedesktop.org
> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> CC: Paul Mackerras <paulus@samba.org>
> CC: Grant Likely <grant.likely@secretlab.ca>
> CC: Rob Herring <rob.herring@calxeda.com>
> CC: linuxppc-dev@lists.ozlabs.org
> CC: devicetree-discuss@lists.ozlabs.org
> CC: Richard Henderson <rth@twiddle.net>
> CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
> CC: Matt Turner <mattst88@gmail.com>
> CC: linux-alpha@vger.kernel.org
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Ingo Molnar <mingo@redhat.com>
> CC: "H. Peter Anvin" <hpa@zytor.com>
> CC: x86@kernel.org
> CC: Tony Luck <tony.luck@intel.com>
> CC: Fenghua Yu <fenghua.yu@intel.com>
> CC: linux-ia64@vger.kernel.org
> CC: Will Deacon <will.deacon@arm.com>
> CC: Peter Zijlstra <a.p.zijlstra@chello.nl>
> CC: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
> CC: Russell King <linux@arm.linux.org.uk>
As there's only one place in the ARM code where we look at the return
value, and you've patched that away in patch 1, this looks fine. I've
not checked for users outside of arch/arm, so:
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Thanks.
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git next branch
From: Michael Neuling @ 2012-01-08 23:58 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <alpine.LFD.2.00.1201041605230.15492@right.am.freescale.net>
Kumar,
Can you pick up this one too. Current Linus tree breaks compiling
mpc85xx_defconfig
powerpc: fix compile error with 85xx/p1022_ds.c
http://patchwork.ozlabs.org/patch/130620/
Mikey
In message <alpine.LFD.2.00.1201041605230.15492@right.am.freescale.net> you wro
te:
> The following changes since commit e4f387d8db3ba3c2dae4d8bdfe7bb5f4fe1bcb0d:
>
> powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit (2012-01-03 12:09:27 +1100)
>
> are available in the git repository at:
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next
>
> Andy Fleming (1):
> powerpc: Add TBI PHY node to first MDIO bus
>
> Julia Lawall (1):
> arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
>
> Kumar Gala (3):
> powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
> powerpc/fsl: Update defconfigs to enable some standard FSL HW features
> powerpc/fsl: update compatiable on fsl 16550 uart nodes
>
> Michael Neuling (1):
> powerpc: fix compile error with 85xx/p1023_rds.c
>
> Paul Gortmaker (1):
> sbc834x: put full compat string in board match check
>
> Prabhakar Kushwaha (1):
> powerpc/fsl: Add support for Integrated Flash Controller
>
> Timur Tabi (3):
> powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defc
onfig
> powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
> powerpc/fsl: add MSI support for the Freescale hypervisor
>
> Tony Breeds (1):
> powerpc: fix compile error with 85xx/p1010rdb.c
>
> arch/powerpc/Kconfig | 4 +
> arch/powerpc/boot/dts/asp834x-redboot.dts | 4 +-
> arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi | 4 +-
> arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi | 4 +-
> arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi | 4 +-
> arch/powerpc/boot/dts/gef_ppc9a.dts | 4 +-
> arch/powerpc/boot/dts/gef_sbc310.dts | 4 +-
> arch/powerpc/boot/dts/gef_sbc610.dts | 4 +-
> arch/powerpc/boot/dts/kmeter1.dts | 2 +-
> arch/powerpc/boot/dts/kuroboxHD.dts | 4 +-
> arch/powerpc/boot/dts/kuroboxHG.dts | 4 +-
> arch/powerpc/boot/dts/mpc8308_p1m.dts | 4 +-
> arch/powerpc/boot/dts/mpc8308rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8313erdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8315erdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc832x_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc832x_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8349emitx.dts | 4 +-
> arch/powerpc/boot/dts/mpc8349emitxgp.dts | 4 +-
> arch/powerpc/boot/dts/mpc834x_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc836x_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc836x_rdk.dts | 4 +-
> arch/powerpc/boot/dts/mpc8377_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8377_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8377_wlan.dts | 4 +-
> arch/powerpc/boot/dts/mpc8378_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8378_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8379_mds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8379_rdb.dts | 4 +-
> arch/powerpc/boot/dts/mpc8540ads.dts | 4 +-
> arch/powerpc/boot/dts/mpc8541cds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8555cds.dts | 4 +-
> arch/powerpc/boot/dts/mpc8610_hpcd.dts | 4 +-
> arch/powerpc/boot/dts/mpc8641_hpcn.dts | 4 +-
> arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts | 4 +-
> arch/powerpc/boot/dts/p1010rdb.dtsi | 5 +
> arch/powerpc/boot/dts/p1020rdb.dtsi | 5 +
> arch/powerpc/boot/dts/p1021mds.dts | 4 +
> arch/powerpc/boot/dts/p1022ds.dts | 12 +-
> arch/powerpc/boot/dts/p2020rdb.dts | 8 +-
> arch/powerpc/boot/dts/sbc8349.dts | 4 +-
> arch/powerpc/boot/dts/sbc8548.dts | 4 +-
> arch/powerpc/boot/dts/sbc8641d.dts | 4 +-
> arch/powerpc/boot/dts/socrates.dts | 4 +-
> arch/powerpc/boot/dts/storcenter.dts | 4 +-
> arch/powerpc/boot/dts/stxssa8555.dts | 4 +-
> arch/powerpc/boot/dts/tqm8540.dts | 4 +-
> arch/powerpc/boot/dts/tqm8541.dts | 4 +-
> arch/powerpc/boot/dts/tqm8548-bigflash.dts | 4 +-
> arch/powerpc/boot/dts/tqm8548.dts | 4 +-
> arch/powerpc/boot/dts/tqm8555.dts | 4 +-
> arch/powerpc/boot/dts/xcalibur1501.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5200.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5200_xmon.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5301.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5330.dts | 4 +-
> arch/powerpc/boot/dts/xpedite5370.dts | 4 +-
> arch/powerpc/configs/corenet32_smp_defconfig | 10 +-
> arch/powerpc/configs/corenet64_smp_defconfig | 3 +-
> arch/powerpc/configs/mpc85xx_defconfig | 16 +-
> arch/powerpc/configs/mpc85xx_smp_defconfig | 17 +-
> arch/powerpc/include/asm/fsl_ifc.h | 834 ++++++++++++++++++++++++
++
> arch/powerpc/platforms/83xx/sbc834x.c | 4 +-
> arch/powerpc/platforms/85xx/p1010rdb.c | 2 -
> arch/powerpc/platforms/85xx/p1023_rds.c | 1 -
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/fsl_ifc.c | 310 ++++++++++
> arch/powerpc/sysdev/fsl_msi.c | 68 ++-
> arch/powerpc/sysdev/fsl_msi.h | 7 +-
> arch/powerpc/sysdev/fsl_pci.c | 84 +++
> arch/powerpc/sysdev/fsl_rmu.c | 1 +
> 71 files changed, 1448 insertions(+), 150 deletions(-)
> create mode 100644 arch/powerpc/include/asm/fsl_ifc.h
> create mode 100644 arch/powerpc/sysdev/fsl_ifc.c
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Peter Chen @ 2012-01-09 2:12 UTC (permalink / raw)
To: Nikolai Zhubr; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <4F099291.6060803@yandex.ru>
On Sun, Jan 08, 2012 at 04:56:49PM +0400, Nikolai Zhubr wrote:
> Hello Piter,
>
> 08.01.2012 7:12, you wrote:
> >2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
> >
> >Please see:
> >http://marc.info/?l=linux-usb&m=129906859817430&w=2
> Ah, thanks. So sadly uncoordinated work in this area is quite
> common. However, in case of Synopsys the situation is even more
> disappointing because initially it _was_ a single driver! What
> probably lacked was some shared repository and proper communication
> between developers to stay in sync. Maybe there were also licensing
> issues at some point, though currently file headers contain rather
> reasonable (imho) permissive license from Synopsys.
>
> >I am not sure we can combine all Synopsys USB drivers to single file, but we
>
> Synopsys driver which I examine consists of 16 files (each of 2
> versions), 200k lines total. I've already perpared some few smaller
> files for version merging. So probably it is doable, but quite a lot
> of work, therefore I wouldn't like it to be wasted.
I mean one file is just a common udc driver for all Synopsys, not all usb file.
For ehci, I think it will be easier to use single file as well as
some specific SoC's quirks if needed.
For udc, as there is no standard spec for how usb device should be designed,
maybe different Synopsys IPs have a little different for work flow.
For otg, it should be not difficult after we split PHY's operation
from the otg, as common otg operation is the same.
>
> >can try combine similar IP versions to one file, this work may need all Synopsys
> >USB IP driver maintainer work together.
>
> Exactly. This is why I'm now trying to find all relevant people to
> begin with.
I know someone(@Pengutronix and @linux.intel.com) is doing that. I think first
we should find which driver file at current code base is most capable and
compatible. I would like to help it, and verify it at Freescale i.MX SoCs.
>
> Thank you.
> Nikolai.
>
> Please CC me, I'm not subscribed to the lists.
>
>
> >
> >
> >>Thank you.
> >>Nikolai.
> >>--
> >>To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> >>the body of a message to majordomo@vger.kernel.org
> >>More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
> >
> >
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Best Regards,
Peter Chen
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Leo Li @ 2012-01-09 5:17 UTC (permalink / raw)
To: Nikolai Zhubr; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <4F099291.6060803@yandex.ru>
On Sun, Jan 8, 2012 at 8:56 PM, Nikolai Zhubr <n-a-zhubr@yandex.ru> wrote:
> Hello Piter,
>
>
> 08.01.2012 7:12, you wrote:
>>
>> 2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
>>>
>>> Hello developers,
>>>
>>> I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
>>> controller. This thing is USB 2.0 host/slave/otg capable and is used in
>>> various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
>>>
> [...trim...]
>>
>>
>> Please see:
>> http://marc.info/?l=linux-usb&m=129906859817430&w=2
>
> Ah, thanks. So sadly uncoordinated work in this area is quite common.
> However, in case of Synopsys the situation is even more disappointing
> because initially it _was_ a single driver! What probably lacked was some
> shared repository and proper communication between developers to stay in
> sync. Maybe there were also licensing issues at some point, though currently
> file headers contain rather reasonable (imho) permissive license from
> Synopsys.
I think the challenge of cooperation in situation like this is that
most companies don't like to advertise the source of the licensed IP
block. Even the owner of the IP block doesn't list all users of the
block(maybe business requirement). It was really hard to find out if
the same IP has been used by anyone else. Also the owner of this USB
IP block has been changed for several times(ARC, TDI, ChipIdea, and
Synopsys) which made it even more difficult to tell.
>
>
>> I am not sure we can combine all Synopsys USB drivers to single file, but
>> we
>
>
> Synopsys driver which I examine consists of 16 files (each of 2 versions),
> 200k lines total. I've already perpared some few smaller files for version
> merging. So probably it is doable, but quite a lot of work, therefore I
> wouldn't like it to be wasted.
I didn't examine the Synopsys driver myself. But if it is so complex
as you described, it might be better to start with the in-tree drivers
IMO.
- Leo
^ permalink raw reply
* [PATCH] powerpc/85xx: check the return value of fsl_add_bridge
From: r66093 @ 2012-01-09 5:45 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jerry Huang
From: Jerry Huang <Chang-Ming.Huang@freescale.com>
For all mpc85xx DS/MDS boards, we should check the return value from
function "fsl_add_bridge", otherwise, when pcie node status is disabled,
the kernel will panic when perform the function "pci_find_hose_for_OF_device"
because the hose controller is NULL.
below is the call trace log:
NIP: c05bca80 LR: c05bca78 CTR: c000ec54
REGS: c0615eb0 TRAP: 0300 Not tainted (3.2.0-rc3-00090-gfa8cbaa-dirty)
MSR: 00021000 <CE,ME> CR: 84044022 XER: 20000000
DEAR: 00000110, ESR: 00000000
TASK = c05e8380[0] 'swapper' THREAD: c0614000
GPR00: c05bca70 c0615f60 c05e8380 00000000 c0550a08 ffffffff c0613140 c061314c
GPR08: 00000000 00000000 00000286 c0620000 84044022 1009d368 00000000 00000000
GPR16: c0000a00 00000014 3fffffff 03ff9000 00000015 7ff3a724 c0614000 00000000
GPR24: 00000000 00000000 00008000 c0550a08 c0534808 efbe3834 00000000 ffffffff
NIP [c05bca80] p1022_ds_setup_arch+0xa8/0x1ac
LR [c05bca78] p1022_ds_setup_arch+0xa0/0x1ac
Call Trace:
[c0615f60] [c05bca70] p1022_ds_setup_arch+0x98/0x1ac (unreliable)
[c0615fb0] [c05b88e0] setup_arch+0x1e8/0x224
[c0615fc0] [c05b4524] start_kernel+0x84/0x2d8
[c0615ff0] [c00003c4] skpinv+0x2b0/0x2ec
Instruction dump:
5400033e 7f80d000 7fa3eb78 40be0010 38800001 4bffedf1 48000008 4bffede9
7fa3eb78 4ba53119 7f64db78 7c691b78
81830114 7f85e378 8149010c
---[ end trace 31fd0ba7d8756001 ]---
Kernel panic - not syncing: Attempted to kill the idle task!
Call Trace:
[c0615d90] [c0007b74] show_stack+0x44/0x154 (unreliable)
[c0615dd0] [c04495b8] panic+0xa4/0x1d4
[c0615e20] [c003e7b8] do_exit+0x588/0x614
[c0615e70] [c000a00c] die+0xc8/0x198
[c0615e90] [c0011a1c] bad_page_fault+0xb4/0xfc
[c0615ea0] [c000e2e0] handle_page_fault+0x7c/0x80
--- Exception: 300 at p1022_ds_setup_arch+0xa8/0x1ac
LR = p1022_ds_setup_arch+0xa0/0x1ac
[c0615f60] [c05bca70] p1022_ds_setup_arch+0x98/0x1ac (unreliable)
[c0615fb0] [c05b88e0] setup_arch+0x1e8/0x224
[c0615fc0] [c05b4524] start_kernel+0x84/0x2d8
[c0615ff0] [c00003c4] skpinv+0x2b0/0x2ec
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
---
arch/powerpc/platforms/85xx/corenet_ds.c | 5 ++++-
arch/powerpc/platforms/85xx/mpc8536_ds.c | 13 +++++++++----
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 13 +++++++++----
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 13 +++++++++----
arch/powerpc/platforms/85xx/p1022_ds.c | 13 +++++++++----
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 14 ++++++++++----
6 files changed, 50 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index c48b661..9d72e3a 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -85,8 +85,11 @@ void __init corenet_ds_setup_arch(void)
for_each_node_by_type(np, "pci") {
if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2")) {
- fsl_add_bridge(np, 0);
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 9ee6455..ee2ebbb 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -82,12 +82,17 @@ static void __init mpc8536_ds_setup_arch(void)
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 2113120..5eba5f0 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -175,12 +175,17 @@ static void __init mpc85xx_ds_setup_arch(void)
of_device_is_compatible(np, "fsl,p2020-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == primary_phb_addr)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == primary_phb_addr) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 495cfd9..3a68122 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -351,12 +351,17 @@ static void __init mpc85xx_mds_setup_arch(void)
of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 2bf4342..614768b 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -292,12 +292,17 @@ static void __init p1022_ds_setup_arch(void)
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 569262c..819f29b 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -83,11 +83,17 @@ mpc86xx_hpcn_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
struct resource rsrc;
of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
+ if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (fsl_add_bridge(np, 1) < 0)
+ continue;
+ } else {
+ if (fsl_add_bridge(np, 0) < 0)
+ continue;
+ }
+
hose = pci_find_hose_for_OF_device(np);
+ if (!hose)
+ continue;
max = min(max, hose->dma_window_base_cur +
hose->dma_window_size);
}
--
1.7.5.4
^ permalink raw reply related
* [SDK v1.2][PATCH 2/2 v3] powerpc/85xx: Added P1021RDB-PC Platform support
From: Xu Jiucheng @ 2012-01-09 6:53 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Xu Jiucheng
In-Reply-To: <1326092022-10085-1-git-send-email-B37781@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 25 +++++++++++++++++++++++++
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 9feccbb..0c32668 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -113,6 +113,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -135,6 +136,15 @@ static int __init p1020_rdb_probe(void)
return 0;
}
+static int __init p1021_rdb_pc_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
+ return 1;
+ return 0;
+}
+
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.probe = p2020_rdb_probe,
@@ -162,3 +172,18 @@ define_machine(p1020_rdb) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+define_machine(p1021_rdb_pc) {
+ .name = "P1021 RDB-PC",
+ .probe = p1021_rdb_pc_probe,
+ .setup_arch = mpc85xx_rdb_setup_arch,
+ .init_IRQ = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
+
--
1.7.0.4
^ permalink raw reply related
* [SDK v1.2][PATCH 1/2 v3] powerpc/85xx: Add dts for P1021RDB-PC board
From: Xu Jiucheng @ 2012-01-09 6:53 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Matthew McClintock, Xu Jiucheng
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=E2=80=99=
s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 4 +
arch/powerpc/boot/dts/p1021rdb.dts | 96 +++++++++++
arch/powerpc/boot/dts/p1021rdb.dtsi | 236 +++++++++++++++++++++=
++++++
arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 +++++++++++
4 files changed, 432 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/b=
oot/dts/fsl/p1021si-post.dtsi
index 38ba54d..b7929c9 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -144,6 +144,10 @@
/include/ "pq3-usb2-dr-0.dtsi"
=20
/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ sdhci,auto-cmd12;
+ };
+
/include/ "pq3-sec3.3-0.dtsi"
=20
/include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p=
1021rdb.dts
new file mode 100644
index 0000000..90b6b4c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg =3D <0 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges =3D <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ reg =3D <0 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg =3D <0 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@ffe80000 {
+ ranges =3D <0x0 0x0 0xffe80000 0x40000>;
+ reg =3D <0 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/=
p1021rdb.dtsi
new file mode 100644
index 0000000..22ecb6e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dtsi
@@ -0,0 +1,236 @@
+/*
+ * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "cfi-flash";
+ reg =3D <0x0 0x0 0x1000000>;
+ bank-width =3D <2>;
+ device-width =3D <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg =3D <0x0 0x00040000>;
+ label =3D "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg =3D <0x00040000 0x00040000>;
+ label =3D "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg =3D <0x00080000 0x00380000>;
+ label =3D "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg =3D <0x00400000 0x00b00000>;
+ label =3D "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg =3D <0x00f00000 0x00100000>;
+ label =3D "NOR U-Boot Image";
+ };
+ };
+
+ nand@1,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg =3D <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00100000>;
+ label =3D "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg =3D <0x00100000 0x00100000>;
+ label =3D "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00200000 0x00400000>;
+ label =3D "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg =3D <0x00600000 0x00400000>;
+ label =3D "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg =3D <0x00a00000 0x00700000>;
+ label =3D "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for User Writable Area */
+ reg =3D <0x01100000 0x00f00000>;
+ label =3D "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "vitesse-7385";
+ reg =3D <0x2 0x0 0x20000>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible =3D "pericom,pt7c4338";
+ reg =3D <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "spansion,s25sl12801";
+ reg =3D <0>;
+ spi-max-frequency =3D <40000000>; /* input clock */
+
+ partition@u-boot {
+ /* 512KB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00080000>;
+ label =3D "SPI Flash U-Boot Image";
+ read-only;
+ };
+
+ partition@dtb {
+ /* 512KB for DTB Image */
+ reg =3D <0x00080000 0x00080000>;
+ label =3D "SPI Flash DTB Image";
+ };
+
+ partition@kernel {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00100000 0x00400000>;
+ label =3D "SPI Flash Linux Kernel Image";
+ };
+
+ partition@fs {
+ /* 4MB for Compressed RFS Image */
+ reg =3D <0x00500000 0x00400000>;
+ label =3D "SPI Flash Compressed RFSImage";
+ };
+
+ partition@jffs-fs {
+ /* 7MB for JFFS2 based RFS */
+ reg =3D <0x00900000 0x00700000>;
+ label =3D "SPI Flash JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type =3D "ulpi";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <3 1>;
+ reg =3D <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <2 1>;
+ reg =3D <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link =3D <1 1 1000 0 0>;
+ phy-connection-type =3D "rgmii-id";
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle =3D <&phy0>;
+ tbi-handle =3D <&tbi1>;
+ phy-connection-type =3D "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle =3D <&phy1>;
+ tbi-handle =3D <&tbi2>;
+ phy-connection-type =3D "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/d=
ts/p1021rdb_36b.dts
new file mode 100644
index 0000000..ea6d8b5
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg =3D <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges =3D <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ reg =3D <0xf 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg =3D <0xf 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@fffe80000 {
+ ranges =3D <0x0 0xf 0xffe80000 0x40000>;
+ reg =3D <0xf 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
--=20
1.7.0.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/85xx: Add dts for P1021RDB-PC board
From: Xu Jiucheng @ 2012-01-09 6:54 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Matthew McClintock, Xu Jiucheng
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=E2=80=99=
s GL850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 4 +
arch/powerpc/boot/dts/p1021rdb.dts | 96 +++++++++++
arch/powerpc/boot/dts/p1021rdb.dtsi | 236 +++++++++++++++++++++=
++++++
arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 +++++++++++
4 files changed, 432 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/b=
oot/dts/fsl/p1021si-post.dtsi
index 38ba54d..b7929c9 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -144,6 +144,10 @@
/include/ "pq3-usb2-dr-0.dtsi"
=20
/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ sdhci,auto-cmd12;
+ };
+
/include/ "pq3-sec3.3-0.dtsi"
=20
/include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p=
1021rdb.dts
new file mode 100644
index 0000000..90b6b4c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg =3D <0 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges =3D <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ reg =3D <0 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg =3D <0 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@ffe80000 {
+ ranges =3D <0x0 0x0 0xffe80000 0x40000>;
+ reg =3D <0 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/=
p1021rdb.dtsi
new file mode 100644
index 0000000..22ecb6e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dtsi
@@ -0,0 +1,236 @@
+/*
+ * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "cfi-flash";
+ reg =3D <0x0 0x0 0x1000000>;
+ bank-width =3D <2>;
+ device-width =3D <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg =3D <0x0 0x00040000>;
+ label =3D "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg =3D <0x00040000 0x00040000>;
+ label =3D "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg =3D <0x00080000 0x00380000>;
+ label =3D "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg =3D <0x00400000 0x00b00000>;
+ label =3D "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg =3D <0x00f00000 0x00100000>;
+ label =3D "NOR U-Boot Image";
+ };
+ };
+
+ nand@1,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg =3D <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00100000>;
+ label =3D "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg =3D <0x00100000 0x00100000>;
+ label =3D "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00200000 0x00400000>;
+ label =3D "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg =3D <0x00600000 0x00400000>;
+ label =3D "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg =3D <0x00a00000 0x00700000>;
+ label =3D "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for User Writable Area */
+ reg =3D <0x01100000 0x00f00000>;
+ label =3D "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "vitesse-7385";
+ reg =3D <0x2 0x0 0x20000>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible =3D "pericom,pt7c4338";
+ reg =3D <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "spansion,s25sl12801";
+ reg =3D <0>;
+ spi-max-frequency =3D <40000000>; /* input clock */
+
+ partition@u-boot {
+ /* 512KB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00080000>;
+ label =3D "SPI Flash U-Boot Image";
+ read-only;
+ };
+
+ partition@dtb {
+ /* 512KB for DTB Image */
+ reg =3D <0x00080000 0x00080000>;
+ label =3D "SPI Flash DTB Image";
+ };
+
+ partition@kernel {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00100000 0x00400000>;
+ label =3D "SPI Flash Linux Kernel Image";
+ };
+
+ partition@fs {
+ /* 4MB for Compressed RFS Image */
+ reg =3D <0x00500000 0x00400000>;
+ label =3D "SPI Flash Compressed RFSImage";
+ };
+
+ partition@jffs-fs {
+ /* 7MB for JFFS2 based RFS */
+ reg =3D <0x00900000 0x00700000>;
+ label =3D "SPI Flash JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type =3D "ulpi";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <3 1>;
+ reg =3D <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <2 1>;
+ reg =3D <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link =3D <1 1 1000 0 0>;
+ phy-connection-type =3D "rgmii-id";
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle =3D <&phy0>;
+ tbi-handle =3D <&tbi1>;
+ phy-connection-type =3D "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle =3D <&phy1>;
+ tbi-handle =3D <&tbi2>;
+ phy-connection-type =3D "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/d=
ts/p1021rdb_36b.dts
new file mode 100644
index 0000000..ea6d8b5
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg =3D <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges =3D <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ reg =3D <0xf 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg =3D <0xf 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@fffe80000 {
+ ranges =3D <0x0 0xf 0xffe80000 0x40000>;
+ reg =3D <0xf 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
--=20
1.7.0.4
^ permalink raw reply related
* [PATCH 2/2] powerpc/85xx: Added P1021RDB-PC Platform support
From: Xu Jiucheng @ 2012-01-09 6:54 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Xu Jiucheng
In-Reply-To: <1326092084-10150-1-git-send-email-B37781@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 25 +++++++++++++++++++++++++
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 9feccbb..0c32668 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -113,6 +113,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -135,6 +136,15 @@ static int __init p1020_rdb_probe(void)
return 0;
}
+static int __init p1021_rdb_pc_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
+ return 1;
+ return 0;
+}
+
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.probe = p2020_rdb_probe,
@@ -162,3 +172,18 @@ define_machine(p1020_rdb) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+define_machine(p1021_rdb_pc) {
+ .name = "P1021 RDB-PC",
+ .probe = p1021_rdb_pc_probe,
+ .setup_arch = mpc85xx_rdb_setup_arch,
+ .init_IRQ = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
+
--
1.7.0.4
^ permalink raw reply related
* [PATCH] powerpc/85xx: Add p2020rdb-pc dts support
From: Yuantian.Tang @ 2012-01-09 7:43 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Tang Yuantian, Poonam Aggrwal, Prabhakar Kushwaha
From: Tang Yuantian <B29983@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
---
arch/powerpc/boot/dts/p2020rdb-pc.dts | 96 +++++++++
arch/powerpc/boot/dts/p2020rdb-pc.dtsi | 241 ++++++++++++++++++++++
arch/powerpc/boot/dts/p2020rdb-pc_36b.dts | 96 +++++++++
arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts | 90 ++++++++
arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts | 152 ++++++++++++++
5 files changed, 675 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc.dts
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc.dtsi
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts
create mode 100644 arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dts b/arch/powerpc/boot/dts/p2020rdb-pc.dts
new file mode 100644
index 0000000..852e5b2
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc.dts
@@ -0,0 +1,96 @@
+/*
+ * P2020 RDB-PC 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p2020si-pre.dtsi"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0 0xffe05000 0 0x1000>;
+
+ /* NOR and NAND Flashes */
+ ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000
+ 0x3 0x0 0x0 0xffa00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe08000 {
+ reg = <0 0xffe08000 0 0x1000>;
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe09000 {
+ reg = <0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci2: pcie@ffe0a000 {
+ reg = <0 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p2020rdb-pc.dtsi"
+/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
new file mode 100644
index 0000000..c21d1c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
@@ -0,0 +1,241 @@
+/*
+ * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x1000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg = <0x00040000 0x00040000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg = <0x00080000 0x00380000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg = <0x00400000 0x00b00000>;
+ label = "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00200000 0x00400000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg = <0x00600000 0x00400000>;
+ label = "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg = <0x00a00000 0x00700000>;
+ label = "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = <0x01100000 0x00f00000>;
+ label = "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "vitesse-7385";
+ reg = <0x2 0x0 0x20000>;
+ };
+
+ cpld@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cpld";
+ reg = <0x3 0x0 0x20000>;
+ read-only;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,m25p80";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partition@0 {
+ /* 512KB for u-boot Bootloader Image */
+ reg = <0x0 0x00080000>;
+ label = "SPI U-Boot Image";
+ read-only;
+ };
+
+ partition@80000 {
+ /* 512KB for DTB Image */
+ reg = <0x00080000 0x00080000>;
+ label = "SPI DTB Image";
+ };
+
+ partition@100000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00100000 0x00400000>;
+ label = "SPI Linux Kernel Image";
+ };
+
+ partition@500000 {
+ /* 4MB for Compressed RFS Image */
+ reg = <0x00500000 0x00400000>;
+ label = "SPI Compressed RFS Image";
+ };
+
+ partition@900000 {
+ /* 7MB for JFFS2 based RFS */
+ reg = <0x00900000 0x00700000>;
+ label = "SPI JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ mdio@24520 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ };
+
+ mdio@25520 {
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26520 {
+ status = "disabled";
+ };
+
+ ptp_clock@24e00 {
+ fsl,tclk-period = <5>;
+ fsl,tmr-prsc = <200>;
+ fsl,tmr-add = <0xCCCCCCCD>;
+ fsl,tmr-fiper1 = <0x3B9AC9FB>;
+ fsl,tmr-fiper2 = <0x0001869B>;
+ fsl,max-adj = <249999999>;
+ };
+
+ enet0: ethernet@24000 {
+ fixed-link = <1 1 1000 0 0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@25000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@26000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
new file mode 100644
index 0000000..b5a56ca
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P2020 RDB-PC 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p2020si-pre.dtsi"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR and NAND Flashes */
+ ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000
+ 0x3 0x0 0xf 0xffa00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe08000 {
+ reg = <0xf 0xffe08000 0 0x1000>;
+ status = "disabled";
+ };
+
+ pci1: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci2: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p2020rdb-pc.dtsi"
+/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts
new file mode 100644
index 0000000..5f44fa2
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core0.dts
@@ -0,0 +1,90 @@
+/*
+ * P2020 RDB-PC P2020 RDB Core0 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ */
+
+/include/ "p2020rdb-pc.dts"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC", "fsl,MPC85XXRDB-CAMP";
+
+ cpus {
+ PowerPC,P2020@1 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ serial1: serial@4600 {
+ status = "disabled";
+ };
+
+ dma@c300 {
+ status = "disabled";
+ };
+
+ enet0: ethernet@24000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 42 76 77 78 79 /* serial1 , dma2 */
+ 29 30 34 26 /* enet0, pci1 */
+ 0xe0 0xe1 0xe2 0xe3 /* msi */
+ 0xe4 0xe5 0xe6 0xe7
+ >;
+ };
+
+ msi@41600 {
+ status = "disabled";
+ };
+ };
+
+ pci1: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci2: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts
new file mode 100644
index 0000000..2d3c8cf
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_camp_core1.dts
@@ -0,0 +1,152 @@
+/*
+ * P2020 RDB-PC P2020 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ */
+
+/include/ "p2020rdb-pc.dts"
+
+/ {
+ model = "fsl,P2020RDB";
+ compatible = "fsl,P2020RDB-PC", "fsl,MPC85XXRDB-CAMP";
+
+ aliases {
+ ethernet0 = &enet0;
+ serial0 = &serial1;
+ };
+
+ cpus {
+ PowerPC,P2020@0 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ ecm-law@0 {
+ status = "disabled";
+ };
+
+ ecm@1000 {
+ status = "disabled";
+ };
+
+ memory-controller@2000 {
+ status = "disabled";
+ };
+
+ i2c@3000 {
+ status = "disabled";
+ };
+
+ i2c@3100 {
+ status = "disabled";
+ };
+
+ serial0: serial@4500 {
+ status = "disabled";
+ };
+
+ spi@7000 {
+ status = "disabled";
+ };
+
+ gpio-controller@f000 {
+ status = "disabled";
+ };
+
+ dma@21300 {
+ status = "disabled";
+ };
+
+ usb@22000 {
+ status = "disabled";
+ };
+
+ mdio@24520 {
+ status = "disabled";
+ };
+
+ mdio@25520 {
+ status = "disabled";
+ };
+
+ mdio@26520 {
+ status = "disabled";
+ };
+
+ enet1: ethernet@25000 {
+ status = "disabled";
+ };
+
+ enet2: ethernet@26000 {
+ status = "disabled";
+ };
+
+ sdhci@2e000 {
+ status = "disabled";
+ };
+
+ crypto@30000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */
+ 16 20 21 22 23 28 /* L2, dma1, USB */
+ 03 35 36 40 31 32 33 /* mdio, enet1, enet2 */
+ 72 45 58 25 /* sdhci, crypto , pci */
+ >;
+ };
+
+ global-utilities@e0000 { //global utilities block
+ status = "disabled";
+ };
+
+ };
+
+ pci1: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci2: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
--
1.6.4
^ permalink raw reply related
* [PATCH] powerpc/85xx: Add P1024rdb dts support
From: b29983 @ 2012-01-09 8:37 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Tang Yuantian, Jin Qing, Tang Yuantian
From: Tang Yuantian <B29983@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi | 68 ++++++++
arch/powerpc/boot/dts/p1024rdb.dts | 87 ++++++++++
arch/powerpc/boot/dts/p1024rdb.dtsi | 228 +++++++++++++++++++++++++
arch/powerpc/boot/dts/p1024rdb_36b.dts | 87 ++++++++++
arch/powerpc/boot/dts/p1024rdb_camp_core0.dts | 106 ++++++++++++
arch/powerpc/boot/dts/p1024rdb_camp_core1.dts | 161 +++++++++++++++++
6 files changed, 737 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi
create mode 100644 arch/powerpc/boot/dts/p1024rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1024rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1024rdb_36b.dts
create mode 100644 arch/powerpc/boot/dts/p1024rdb_camp_core0.dts
create mode 100644 arch/powerpc/boot/dts/p1024rdb_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi
new file mode 100644
index 0000000..4a0406b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1024si-pre.dtsi
@@ -0,0 +1,68 @@
+/*
+ * P1024 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+ compatible = "fsl,P1024";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,P1024@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ next-level-cache = <&L2>;
+ };
+
+ PowerPC,P1024@1 {
+ device_type = "cpu";
+ reg = <0x1>;
+ next-level-cache = <&L2>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb.dts b/arch/powerpc/boot/dts/p1024rdb.dts
new file mode 100644
index 0000000..1a89f9c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dts
@@ -0,0 +1,87 @@
+/*
+ * P1024 RDB 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1024si-pre.dtsi"
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0x0 0xffe05000 0 0x1000>;
+ ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ reg = <0x0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
new file mode 100644
index 0000000..eb3141d
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dtsi
@@ -0,0 +1,228 @@
+/*
+ * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x1000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg = <0x00040000 0x00040000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg = <0x00080000 0x00380000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg = <0x00400000 0x00b00000>;
+ label = "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p1020-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00200000 0x00400000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg = <0x00600000 0x00400000>;
+ label = "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = <0x00a00000 0x00f00000>;
+ label = "NAND JFFS2 Root File System";
+ };
+
+ partition@1900000 {
+ /* 7MB for User Writable Area */
+ reg = <0x01900000 0x00700000>;
+ label = "NAND Writable User area";
+ };
+ };
+};
+
+&soc {
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,m25p80";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partition@0 {
+ /* 512KB for u-boot Bootloader Image */
+ reg = <0x0 0x00080000>;
+ label = "SPI U-Boot Image";
+ read-only;
+ };
+
+ partition@80000 {
+ /* 512KB for DTB Image */
+ reg = <0x00080000 0x00080000>;
+ label = "SPI DTB Image";
+ };
+
+ partition@100000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00100000 0x00400000>;
+ label = "SPI Linux Kernel Image";
+ };
+
+ partition@500000 {
+ /* 4MB for Compressed RFS Image */
+ reg = <0x00500000 0x00400000>;
+ label = "SPI Compressed RFS Image";
+ };
+
+ partition@900000 {
+ /* 7MB for JFFS2 based RFS */
+ reg = <0x00900000 0x00700000>;
+ label = "SPI JFFS2 RFS";
+ };
+ };
+ };
+
+ i2c@3000 {
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ usb@23000 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ phy2: ethernet-phy@2 {
+ interrupts = <1 1 0 0>;
+ reg = <0x2>;
+ };
+ };
+
+ mdio@25000 {
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ ethernet@b0000 {
+ phy-handle = <&phy2>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ ethernet@b1000 {
+ phy-handle = <&phy0>;
+ tbi-handle = <&tbi0>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@b2000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
new file mode 100644
index 0000000..abfa328
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
@@ -0,0 +1,87 @@
+/*
+ * P1024 RDB 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1024si-pre.dtsi"
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0 0x1000>;
+ ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_camp_core0.dts b/arch/powerpc/boot/dts/p1024rdb_camp_core0.dts
new file mode 100644
index 0000000..abab1b0
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_camp_core0.dts
@@ -0,0 +1,106 @@
+/*
+ * P1024 RDB Core0 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have all the devices except that USB, SDHCI
+ * enet0.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ */
+
+/include/ "p1024rdb.dts"
+
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB", "fsl,MPC85XXRDB-CAMP";
+
+ aliases {
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ serial0 = &serial0;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ PowerPC,P1024@1 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ serial1: serial@4600 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy2: ethernet-phy@2 {
+ status = "disabled";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ status = "disabled";
+ };
+
+ sdhci@2e000 {
+ status = "disabled";
+ };
+
+ usb@22000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 42 29 30 34 /* serial1, enet0-queue-group0 */
+ 17 18 24 45 /* enet0-queue-group1, crypto */
+ 1 28 46 72 /* phy2 usb sdhc */
+ >;
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_camp_core1.dts b/arch/powerpc/boot/dts/p1024rdb_camp_core1.dts
new file mode 100644
index 0000000..461af60
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_camp_core1.dts
@@ -0,0 +1,161 @@
+/*
+ * P1024 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have USB, SDHCI and enet0.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ */
+
+/include/ "p1024rdb.dts"
+
+/ {
+ model = "fsl,P1024RDB";
+ compatible = "fsl,P1024RDB", "fsl,MPC85XXRDB-CAMP";
+
+ aliases {
+ ethernet0 = &enet0;
+ serial0 = &serial1;
+ };
+
+ cpus {
+ PowerPC,P1024@0 {
+ status = "disabled";
+ };
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ ecm-law@0 {
+ status = "disabled";
+ };
+
+ ecm@1000 {
+ status = "disabled";
+ };
+
+ memory-controller@2000 {
+ status = "disabled";
+ };
+
+ i2c@3000 {
+ status = "disabled";
+ };
+
+ i2c@3100 {
+ status = "disabled";
+ };
+
+ serial0: serial@4500 {
+ status = "disabled";
+ };
+
+ spi@7000 {
+ status = "disabled";
+ };
+
+ gpio: gpio-controller@f000 {
+ status = "disabled";
+ };
+
+ dma@c300 {
+ status = "disabled";
+ };
+
+ dma@21300 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ status = "disabled";
+ };
+ phy1: ethernet-phy@1 {
+ status = "disabled";
+ };
+ };
+
+ mdio@25000 {
+ status = "disabled";
+ };
+
+ enet1: ethernet@b1000 {
+ status = "disabled";
+ };
+
+ enet2: ethernet@b2000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 16 /* ecm, mem, L2, pci0, pci1 */
+ 43 42 59 /* i2c, serial0, spi */
+ 47 63 62 /* gpio, tdm */
+ 20 21 22 23 /* dma */
+ 03 02 58 /* mdio crypto */
+ 35 36 40 /* enet1-queue-group0 */
+ 51 52 67 /* enet1-queue-group1 */
+ 31 32 33 /* enet2-queue-group0 */
+ 25 26 27 /* enet2-queue-group1 */
+ 0xb0 0xb1 0xb2 /* message */
+ 0xb3 0xb4 0xb5
+ 0xb6 0xb7
+ 0xe0 0xe1 0xe2 /* msi */
+ 0xe3 0xe4 0xe5
+ 0xe6 0xe7
+ >;
+ };
+
+ msi@41600 {
+ status = "disabled";
+ };
+
+ global-utilities@e0000 { //global utilities block
+ status = "disabled";
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
--
1.6.4
^ permalink raw reply related
* [PATCH 1/2][v2] mtd/nand:Fix wrong address read in is_blank()
From: Prabhakar Kushwaha @ 2012-01-09 12:24 UTC (permalink / raw)
To: linuxppc-dev, linux-mtd; +Cc: scottwood, Poonam Aggrwal, Prabhakar Kushwaha
IFC NAND Machine calculates ECC on 512byte sector. Same is taken care in
fsl_ifc_run_command() while ECC status verification. Here buffer number is
calculated assuming 512byte sector and same is passed to is_blank.
However in is_blank() buffer address is calculated using mdt->writesize which is
wrong. It should be calculated on basis of ecc sector size.
Also, in fsl_ifc_run_command() bufferpage is calculated on the basis of ecc sector
size instead of hard coded value.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
This patch is created on top of IFC driver patch (already floated in mailing
list). Please find their link:
http://patchwork.ozlabs.org/patch/133315/
http://patchwork.ozlabs.org/patch/133316/
Tested on P1010RDB
Changes for v2: Incorporated Scott's comments
- Updated copyright
- is_blank - works on ecc buffer block
- check_read_ecc() - Calculate actual ecc buffer number
drivers/mtd/nand/fsl_ifc_nand.c | 14 ++++++++------
1 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 8475b88..c0529ea 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -1,7 +1,7 @@
/*
* Freescale Integrated Flash Controller NAND driver
*
- * Copyright 2011 Freescale Semiconductor, Inc
+ * Copyright 2011,2012 Freescale Semiconductor, Inc
*
* Author: Dipen Dudhat <Dipen.Dudhat@freescale.com>
*
@@ -191,12 +191,12 @@ static int is_blank(struct mtd_info *mtd, unsigned int bufnum)
{
struct nand_chip *chip = mtd->priv;
struct fsl_ifc_mtd *priv = chip->priv;
- u8 __iomem *addr = priv->vbase + bufnum * (mtd->writesize * 2);
+ u8 __iomem *addr = priv->vbase + bufnum * chip->ecc.size;
u32 __iomem *mainarea = (u32 *)addr;
u8 __iomem *oob = addr + mtd->writesize;
int i;
- for (i = 0; i < mtd->writesize / 4; i++) {
+ for (i = 0; i < chip->ecc.size / 4; i++) {
if (__raw_readl(&mainarea[i]) != 0xffffffff)
return 0;
}
@@ -215,12 +215,15 @@ static int is_blank(struct mtd_info *mtd, unsigned int bufnum)
static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
u32 *eccstat, unsigned int bufnum)
{
+ struct nand_chip *chip = mtd->priv;
+ int bufperpage = mtd->writesize / chip->ecc.size;
+ int eccbuf_num = bufnum + (bufnum / bufperpage) * bufperpage;
u32 reg = eccstat[bufnum / 4];
int errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
if (errors == 15) { /* uncorrectable */
/* Blank pages fail hw ECC checks */
- if (is_blank(mtd, bufnum))
+ if (is_blank(mtd, eccbuf_num))
return 1;
/*
@@ -273,7 +276,7 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
dev_err(priv->dev, "NAND Flash Write Protect Error\n");
if (nctrl->eccread) {
- int bufperpage = mtd->writesize / 512;
+ int bufperpage = mtd->writesize / chip->ecc.size;
int bufnum = (nctrl->page & priv->bufnum_mask) * bufperpage;
int bufnum_end = bufnum + bufperpage - 1;
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/2][v2] mtd/nand: Fix IFC driver to support 2K NAND page
From: Prabhakar Kushwaha @ 2012-01-09 12:24 UTC (permalink / raw)
To: linuxppc-dev, linux-mtd; +Cc: scottwood, Poonam Aggrwal, Prabhakar Kushwaha
1) OOB area should be updated irrespective of NAND page size. Earlier it was
updated only for 512byte NAND page.
2) During OOB update fbcr should be equal to OOB size.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
This patch is created on top of IFC driver patch (already floated in mailing
list). Please find their link:
http://patchwork.ozlabs.org/patch/133315/
http://patchwork.ozlabs.org/patch/133316/
Tested on P1010RDB
Changes for v2: Incorporated Scott's comments
- Added missed NAND_CMD_READOOB
- Updated function as per Scott's advice
drivers/mtd/nand/fsl_ifc_nand.c | 21 +++++++++------------
1 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index c0529ea..52bd706d 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -440,22 +440,19 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
out_be32(&ifc->ifc_nand.nand_fir1,
(IFC_FIR_OP_CW1 << IFC_NAND_FIR1_OP5_SHIFT));
- if (column >= mtd->writesize) {
- /* OOB area --> READOOB */
- column -= mtd->writesize;
- nand_fcr0 |= NAND_CMD_READOOB <<
- IFC_NAND_FCR0_CMD0_SHIFT;
- ifc_nand_ctrl->oob = 1;
- } else if (column < 256)
- /* First 256 bytes --> READ0 */
+ if (column >= mtd->writesize)
nand_fcr0 |=
- NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT;
+ NAND_CMD_READOOB << IFC_NAND_FCR0_CMD0_SHIFT;
else
- /* Second 256 bytes --> READ1 */
nand_fcr0 |=
- NAND_CMD_READ1 << IFC_NAND_FCR0_CMD0_SHIFT;
+ NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT;
}
+ if (column >= mtd->writesize) {
+ /* OOB area --> READOOB */
+ column -= mtd->writesize;
+ ifc_nand_ctrl->oob = 1;
+ }
out_be32(&ifc->ifc_nand.nand_fcr0, nand_fcr0);
set_addr(mtd, column, page_addr, ifc_nand_ctrl->oob);
return;
@@ -466,7 +463,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
int full_page;
if (ifc_nand_ctrl->oob) {
out_be32(&ifc->ifc_nand.nand_fbcr,
- ifc_nand_ctrl->index);
+ ifc_nand_ctrl->index - ifc_nand_ctrl->column);
full_page = 0;
} else {
out_be32(&ifc->ifc_nand.nand_fbcr, 0);
--
1.7.5.4
^ permalink raw reply related
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Nikolai Zhubr @ 2012-01-09 12:41 UTC (permalink / raw)
To: Peter Chen; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <20120109021220.GA10198@nchen-desktop>
Hello Peter,
09.01.2012 6:12, Peter Chen:
>>> I am not sure we can combine all Synopsys USB drivers to single file, but we
>>
>> Synopsys driver which I examine consists of 16 files (each of 2
>> versions), 200k lines total. I've already perpared some few smaller
>> files for version merging. So probably it is doable, but quite a lot
>> of work, therefore I wouldn't like it to be wasted.
> I mean one file is just a common udc driver for all Synopsys, not all usb file.
> For ehci, I think it will be easier to use single file as well as
> some specific SoC's quirks if needed.
> For udc, as there is no standard spec for how usb device should be designed,
> maybe different Synopsys IPs have a little different for work flow.
> For otg, it should be not difficult after we split PHY's operation
> from the otg, as common otg operation is the same.
>>
>>> can try combine similar IP versions to one file, this work may need all Synopsys
>>> USB IP driver maintainer work together.
>>
>> Exactly. This is why I'm now trying to find all relevant people to
>> begin with.
> I know someone(@Pengutronix and @linux.intel.com) is doing that. I think first
> we should find which driver file at current code base is most capable and
> compatible. I would like to help it, and verify it at Freescale i.MX SoCs.
Ok. Because my resources are limited (and my knowledge is actually
limited too) I'll list what exactly I'm able (and willing) to do:
- split formatting/naming/uninteresting changes from algorythmical
changes, prepare clean diffs as necessary (boring work, but anyway);
- bisect changes which make the driver stop working on my tablet;
- try whichever driver parameters and see what happens to my tablet;
- connect the tablet to a regular linux PC with USB cable, do some
tests, capture traffic dumps as necessary;
- connect some devices to the tablet, do tests, report results;
and with some luck:
- prepare bufixes (depending very much on how simple is the bug).
So basically my effort would probably only be usefull in cooperation
with someone with more knowledge and understanding of the situation in
whole. Otherwise it would be more wasting of time.
If usb issues were solved, it might make some sense to try to create
e.g. a generic openwrt target for 8726m-based tablet. (Of course it
wouldn't allow to use the device for its intended purpose yet, but still
might be interesting as kind of devel/testing reference option)
Thank you.
Nikolai.
>>
>> Thank you.
>> Nikolai.
>>
>> Please CC me, I'm not subscribed to the lists.
>>
>>
>>>
>>>
>>>> Thank you.
>>>> Nikolai.
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
>>>> the body of a message to majordomo@vger.kernel.org
>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>
>>>
>>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>
^ permalink raw reply
* Re: Driver(s) for Synopsys' DesignWare USB OTG
From: Nikolai Zhubr @ 2012-01-09 12:44 UTC (permalink / raw)
To: Leo Li; +Cc: support, linux-usb, linuxppc-dev, openwrt-devel, Peter Chen
In-Reply-To: <CADRPPNRLKhDEU=mVDjbxaNtOD+665hQodhQzpVBc11120GpuJQ@mail.gmail.com>
Hello Leo,
09.01.2012 9:17, Leo Li:
> On Sun, Jan 8, 2012 at 8:56 PM, Nikolai Zhubr<n-a-zhubr@yandex.ru> wrote:
>>> 2012/1/8 Nikolai Zhubr<n-a-zhubr@yandex.ru>:
>>>>
>>>> Hello developers,
>>>>
>>>> I'm trying to find/combine/fix a driver for Synopsys' DesignWare USB
>>>> controller. This thing is USB 2.0 host/slave/otg capable and is used in
>>>> various SoCs including Amlogic 8726M, Ralink RT305x, and probably more.
>>>>
[...trim...]
>
> I think the challenge of cooperation in situation like this is that
> most companies don't like to advertise the source of the licensed IP
> block. Even the owner of the IP block doesn't list all users of the
> block(maybe business requirement). It was really hard to find out if
> the same IP has been used by anyone else. Also the owner of this USB
> IP block has been changed for several times(ARC, TDI, ChipIdea, and
> Synopsys) which made it even more difficult to tell.
Ah, I see. It explains.
But communicating in private and keeping some public repository up to
date would still be allowed I suppose?
>
>>
>>
>>> I am not sure we can combine all Synopsys USB drivers to single file, but
>>> we
>>
>>
>> Synopsys driver which I examine consists of 16 files (each of 2 versions),
>> 200k lines total. I've already perpared some few smaller files for version
>> merging. So probably it is doable, but quite a lot of work, therefore I
>> wouldn't like it to be wasted.
>
> I didn't examine the Synopsys driver myself. But if it is so complex
> as you described, it might be better to start with the in-tree drivers
> IMO.
Unfortunately its far beyond my capabilities at the moment. Besides, it
looks like huge effort has already been invested into the existing
driver, so to me it seems fixing it rather than starting from scratch
would be more realistic anyway (unless a company with unlimited
resources step in...)
Thank you.
Nikolai.
>
> - Leo
>
>
^ permalink raw reply
* Re: [PATCH 1/3] KVM: PPC: epapr: Factor out the epapr init
From: Alexander Graf @ 2012-01-09 13:50 UTC (permalink / raw)
To: Liu Yu; +Cc: kvm, kvm-ppc, linuxppc-dev, scottwood, timur
In-Reply-To: <1325754412-29963-1-git-send-email-yu.liu@freescale.com>
On 05.01.2012, at 10:06, Liu Yu wrote:
> from the kvm guest paravirt init code.
Your patch description could be slightly more ... verbose :)
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> ---
> arch/powerpc/include/asm/epapr_hcalls.h | 8 +++++
> arch/powerpc/kernel/Makefile | 1 +
> arch/powerpc/kernel/epapr_para.c | 45 =
+++++++++++++++++++++++++++++++
> arch/powerpc/kernel/kvm.c | 9 +++++-
> 4 files changed, 62 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/kernel/epapr_para.c
>=20
> diff --git a/arch/powerpc/include/asm/epapr_hcalls.h =
b/arch/powerpc/include/asm/epapr_hcalls.h
> index f3b0c2c..c4b86e4 100644
> --- a/arch/powerpc/include/asm/epapr_hcalls.h
> +++ b/arch/powerpc/include/asm/epapr_hcalls.h
> @@ -148,6 +148,14 @@
> #define EV_HCALL_CLOBBERS2 EV_HCALL_CLOBBERS3, "r5"
> #define EV_HCALL_CLOBBERS1 EV_HCALL_CLOBBERS2, "r4"
>=20
> +extern u32 *epapr_hcall_insts;
> +extern int epapr_hcall_insts_len;
> +
> +static inline void epapr_get_hcall_insts(u32 **instp, int *lenp)
> +{
> + *instp =3D epapr_hcall_insts;
> + *lenp =3D epapr_hcall_insts_len;
Why do we need this? Can't we just directly access the variables?
> +}
>=20
> /*
> * We use "uintptr_t" to define a register because it's guaranteed to =
be a
> diff --git a/arch/powerpc/kernel/Makefile =
b/arch/powerpc/kernel/Makefile
> index ce4f7f1..1052bbc 100644
> --- a/arch/powerpc/kernel/Makefile
> +++ b/arch/powerpc/kernel/Makefile
> @@ -134,6 +134,7 @@ ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC),)
> obj-y +=3D ppc_save_regs.o
> endif
>=20
> +obj-$(CONFIG_BOOKE) +=3D epapr_para.o
> obj-$(CONFIG_KVM_GUEST) +=3D kvm.o kvm_emul.o
>=20
> # Disable GCOV in odd or sensitive code
> diff --git a/arch/powerpc/kernel/epapr_para.c =
b/arch/powerpc/kernel/epapr_para.c
> new file mode 100644
> index 0000000..714dcb3
> --- /dev/null
> +++ b/arch/powerpc/kernel/epapr_para.c
> @@ -0,0 +1,45 @@
> +/*
> + * ePAPR para-virtualization support.
> + *
> + * This program is free software; you can redistribute it and/or =
modify
> + * it under the terms of the GNU General Public License, version 2, =
as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA =
02110-1301, USA.
> + *
> + * Copyright (C) 2012 Freescale Semiconductor, Inc.
> + */
> +
> +#include <linux/of.h>
> +#include <asm/epapr_hcalls.h>
> +
> +u32 *epapr_hcall_insts;
> +int epapr_hcall_insts_len;
> +
> +static int __init epapr_para_init(void)
> +{
> + struct device_node *hyper_node;
> + u32 *insts;
> + int len;
> +
> + hyper_node =3D of_find_node_by_path("/hypervisor");
> + if (!hyper_node)
> + return -ENODEV;
> +
> + insts =3D (u32*)of_get_property(hyper_node, =
"hcall-instructions", &len);
> + if (!(len % 4) && (len >=3D (4 * 4))) {
> + epapr_hcall_insts =3D insts;
> + epapr_hcall_insts_len =3D len;
> + }
else error()?
> +
> + return 0;
> +}
> +
> +early_initcall(epapr_para_init);
> diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
> index b06bdae..82a9137 100644
> --- a/arch/powerpc/kernel/kvm.c
> +++ b/arch/powerpc/kernel/kvm.c
> @@ -28,6 +28,7 @@
> #include <asm/sections.h>
> #include <asm/cacheflush.h>
> #include <asm/disassemble.h>
> +#include <asm/epapr_hcalls.h>
>=20
> #define KVM_MAGIC_PAGE (-4096L)
> #define magic_var(x) KVM_MAGIC_PAGE + offsetof(struct =
kvm_vcpu_arch_shared, x)
> @@ -535,9 +536,10 @@ EXPORT_SYMBOL_GPL(kvm_hypercall);
> static int kvm_para_setup(void)
> {
> extern u32 kvm_hypercall_start;
> - struct device_node *hyper_node;
> u32 *insts;
> int len, i;
> +#ifndef CONFIG_BOOKE
Ugh - now you're duplicating even more code. Why not completely unify it =
and always call epapr_get_hcall_insts() on all ppc platforms?
> + struct device_node *hyper_node;
>=20
> hyper_node =3D of_find_node_by_path("/hypervisor");
> if (!hyper_node)
> @@ -548,6 +550,11 @@ static int kvm_para_setup(void)
> return -1;
> if (len > (4 * 4))
> return -1;
> +#else
> + epapr_get_hcall_insts(&insts, &len);
> + if (insts =3D=3D NULL)
> + return -1;
> +#endif /* !BOOKE */
>=20
> for (i =3D 0; i < (len / 4); i++)
> kvm_patch_ins(&(&kvm_hypercall_start)[i], insts[i]);
> --=20
> 1.6.4
>=20
>=20
> --
> To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Mac address in the DT
From: smitha.vanga @ 2012-01-09 13:54 UTC (permalink / raw)
To: wd; +Cc: scottwood, linuxppc-dev
In-Reply-To: <20111230182806.21CF61931810@gemini.denx.de>
Hi Wolfgang,
I need to automate a sequence of commands. To do that I am setting a environ=
ment variable with the sequence of commands.
And using run command run the environment variable.
But one of the command uses " in the command. So how do I save the command w=
ith quotes.
Below is the command which I want to set in the environment variable.
setenv set_mac ""cp 0xffec0000 0x100000 1024;fdt addr 0x100000 8192;fdt set=
/soc8272@f0000000/ethernet@24000 mac-address "[00 22 00 33 00 55]""
But when I saveenv the command doesnot get save as fdt set /soc8272@f0000000=
/ethernet@24000 mac-address "[00 22 00 33 00 55]"
Thanks & Regards,
Smitha
Please do not print this email unless it is absolutely necessary. =0A=
=0A=
The information contained in this electronic message and any attachments to=
this message are intended for the exclusive use of the addressee(s) and may=
contain proprietary, confidential or privileged information. If you are not=
the intended recipient, you should not disseminate, distribute or copy this=
e-mail. Please notify the sender immediately and destroy all copies of this=
message and any attachments. =0A=
=0A=
WARNING: Computer viruses can be transmitted via email. The recipient should=
check this email and any attachments for the presence of viruses. The compa=
ny accepts no liability for any damage caused by any virus transmitted by th=
is email. =0A=
=0A=
www.wipro.com
^ permalink raw reply
* Re: [PATCH v2 3/3] KVM: PPC: epapr: install ev_idle hcall for e500 guest
From: Alexander Graf @ 2012-01-09 14:05 UTC (permalink / raw)
To: Liu Yu; +Cc: kvm, kvm-ppc, linuxppc-dev, scottwood, timur
In-Reply-To: <1325754412-29963-2-git-send-email-yu.liu@freescale.com>
On 05.01.2012, at 10:06, Liu Yu wrote:
> If the guest hypervisor node contains "has-idle" property.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> ---
> v2:
> 1. move the idle code into assembly.
> 2. move the part that check "has-idle" into epapr code.
>=20
> arch/powerpc/include/asm/epapr_hcalls.h | 1 +
> arch/powerpc/include/asm/machdep.h | 5 +++++
> arch/powerpc/kernel/epapr_para.c | 4 ++++
> arch/powerpc/kernel/idle_e500.S | 17 +++++++++++++++++
> arch/powerpc/kernel/kvm.c | 24 =
++++++++++++++++++++++++
> 5 files changed, 51 insertions(+), 0 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/epapr_hcalls.h =
b/arch/powerpc/include/asm/epapr_hcalls.h
> index c4b86e4..566805e 100644
> --- a/arch/powerpc/include/asm/epapr_hcalls.h
> +++ b/arch/powerpc/include/asm/epapr_hcalls.h
> @@ -150,6 +150,7 @@
>=20
> extern u32 *epapr_hcall_insts;
> extern int epapr_hcall_insts_len;
> +extern bool epapr_hcall_has_idle;
>=20
> static inline void epapr_get_hcall_insts(u32 **instp, int *lenp)
> {
> diff --git a/arch/powerpc/include/asm/machdep.h =
b/arch/powerpc/include/asm/machdep.h
> index 47cacdd..7e56abf 100644
> --- a/arch/powerpc/include/asm/machdep.h
> +++ b/arch/powerpc/include/asm/machdep.h
> @@ -255,6 +255,11 @@ extern void power4_idle(void);
> extern void power7_idle(void);
> extern void ppc6xx_idle(void);
> extern void book3e_idle(void);
> +#ifdef CONFIG_KVM_GUEST
> +extern void e500_ev_idle(unsigned long *, unsigned long *, unsigned =
long,
> + unsigned long (*)(unsigned long *, unsigned =
long *,
> + unsigned long));
> +#endif
>=20
> /*
> * ppc_md contains a copy of the machine description structure for the
> diff --git a/arch/powerpc/kernel/epapr_para.c =
b/arch/powerpc/kernel/epapr_para.c
> index 714dcb3..1f37ddf 100644
> --- a/arch/powerpc/kernel/epapr_para.c
> +++ b/arch/powerpc/kernel/epapr_para.c
> @@ -22,6 +22,7 @@
>=20
> u32 *epapr_hcall_insts;
> int epapr_hcall_insts_len;
> +bool epapr_hcall_has_idle;
>=20
> static int __init epapr_para_init(void)
> {
> @@ -39,6 +40,9 @@ static int __init epapr_para_init(void)
> epapr_hcall_insts_len =3D len;
> }
>=20
> + if (of_get_property(hyper_node, "has-idle", NULL))
> + epapr_hcall_has_idle =3D true;
> +
> return 0;
> }
>=20
> diff --git a/arch/powerpc/kernel/idle_e500.S =
b/arch/powerpc/kernel/idle_e500.S
> index 3e2b95c..6ea95f0 100644
> --- a/arch/powerpc/kernel/idle_e500.S
> +++ b/arch/powerpc/kernel/idle_e500.S
> @@ -85,6 +85,23 @@ =
END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
> 2: b 2b
> #endif /* !E500MC */
>=20
> +#ifdef CONFIG_KVM_GUEST
> +/*
> + * r3 contains the pointer to in[8]
> + * r4 contains the pointer to out[8]
> + * r5 contains the hcall vendor and nr
> + * r6 contains the handler which send hcall
> + */
> +_GLOBAL(e500_ev_idle)
How is that specific to e500? Isn't it just the generic epapr =
implementation?
> + rlwinm r7,r1,0,0,31-THREAD_SHIFT /* current thread_info =
*/
> + lwz r8,TI_LOCAL_FLAGS(r7) /* set napping bit */
> + ori r8,r8,_TLF_NAPPING /* so when we take an exception =
*/
> + stw r8,TI_LOCAL_FLAGS(r7) /* it will return to our caller =
*/
> + wrteei 1
Except for this part of course :). But I'm sure we can generalize this.
> + mtctr r6
> + bctr
> +#endif /* KVM_GUEST */
> +
> /*
> * Return from NAP/DOZE mode, restore some CPU specific registers,
> * r2 containing physical address of current.
> diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
> index 82a9137..8952e12 100644
> --- a/arch/powerpc/kernel/kvm.c
> +++ b/arch/powerpc/kernel/kvm.c
> @@ -29,6 +29,7 @@
> #include <asm/cacheflush.h>
> #include <asm/disassemble.h>
> #include <asm/epapr_hcalls.h>
> +#include <asm/machdep.h>
>=20
> #define KVM_MAGIC_PAGE (-4096L)
> #define magic_var(x) KVM_MAGIC_PAGE + offsetof(struct =
kvm_vcpu_arch_shared, x)
> @@ -578,6 +579,25 @@ static __init void kvm_free_tmp(void)
> }
> }
>=20
> +static void kvm_hcall_idle(void)
> +{
> +#ifdef CONFIG_KVM_E500
> + ulong in[8];
> + ulong out[8];
> +
> + e500_ev_idle(in, out, HC_VENDOR_EPAPR | HC_EV_IDLE, =
kvm_hypercall);
> +#endif
... because then the ifdef goes away here too
> +}
> +
> +static bool kvm_para_has_idle(void)
> +{
> +#ifdef CONFIG_BOOKE
> + return epapr_hcall_has_idle;
> +#else
> + return false;
> +#endif
... this also shouldn't be an ifdef
> +}
> +
> static int __init kvm_guest_init(void)
> {
> if (!kvm_para_available())
> @@ -594,6 +614,10 @@ static int __init kvm_guest_init(void)
> powersave_nap =3D 1;
> #endif
>=20
> + /* Install hcall based power_save for guest kernel */
> + if (kvm_para_has_idle())
> + ppc_md.power_save =3D kvm_hcall_idle;
The way it's now it would break kernels with this patch if we ever =
choose to implement hcall_idle for non-e500. Please make the code =
generic :)
Alex
^ permalink raw reply
* Re: Mac address in the DT
From: Joakim Tjernlund @ 2012-01-09 14:20 UTC (permalink / raw)
To: smitha.vanga; +Cc: scottwood, linuxppc-dev, wd
In-Reply-To: <40631E9A2581F14BA60888C87A76A1FE01D34F@HYD-MKD-MBX4.wipro.com>
>
> Hi Wolfgang,
>
> I need to automate a sequence of commands. To do that I am setting a environment variable with the sequence of commands.
> And using run command run the environment variable.
>
> But one of the command uses " in the command. So how do I save the command with quotes.
>
> Below is the command which I want to set in the environment variable.
>
> setenv set_mac ""cp 0xffec0000 0x100000 1024;fdt addr 0x100000 8192;fdt set /soc8272@f0000000/ethernet@24000 mac-address "[00 22 00 33 00 55]""
>
> But when I saveenv the command doesnot get save as fdt set /soc8272@f0000000/ethernet@24000 mac-address "[00 22 00 33 00 55]"
>
> Thanks & Regards,
> Smitha
Have you tried ...\"[00 22 00 33 00 55]\"" ?
Jocke
^ permalink raw reply
* RE: Mac address in the DT
From: smitha.vanga @ 2012-01-09 14:28 UTC (permalink / raw)
To: joakim.tjernlund; +Cc: scottwood, linuxppc-dev, wd
In-Reply-To: <OF5FE90C20.B5971F88-ONC1257980.004EAA90-C1257980.004EC4DA@transmode.se>
Hi Joakim,
I have tried it but it doesn't work.
Just now found that with single ' quotes the entire sequence it works.
>Setenv set_mac 'cp 0xffec0000 0x100000 1024;fdt addr 0xc00000 8192;fdt set=
/soc8272@f0000000/ethernet@24000 mac-address "[00 44 00 55 00 66]";erase 0x=
ffec0000 0xffec4000;cp 0xc00000 0xffec0000 1024;bootm 0xfe060000 - 0xffec000=
0'
> run set_mac
For the above command I want to replace the mac address with the ethaddr> Ho=
w do I do that. I tried $ethaddr but I get extra : characters.
>Setenv set_mac 'cp 0xffec0000 0x100000 1024;fdt addr 0xc00000 8192;fdt set=
/soc8272@f0000000/ethernet@24000 mac-address $ethaddr;erase 0xffec0000 0xff=
ec4000;cp 0xc00000 0xffec0000 1024;bootm 0xfe060000 - 0xffec0000'
Regards,
Smitha
Please do not print this email unless it is absolutely necessary. =0A=
=0A=
The information contained in this electronic message and any attachments to=
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contain proprietary, confidential or privileged information. If you are not=
the intended recipient, you should not disseminate, distribute or copy this=
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ny accepts no liability for any damage caused by any virus transmitted by th=
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www.wipro.com
^ permalink raw reply
* RE: Mac address in the DT
From: Joakim Tjernlund @ 2012-01-09 14:59 UTC (permalink / raw)
To: smitha.vanga; +Cc: scottwood, linuxppc-dev, wd
In-Reply-To: <40631E9A2581F14BA60888C87A76A1FE01D360@HYD-MKD-MBX4.wipro.com>
<smitha.vanga@wipro.com> wrote on 2012/01/09 15:28:54:
>
>
> Hi Joakim,
>
> I have tried it but it doesn't work.
>
> Just now found that with single ' quotes the entire sequence it works.
> >Setenv set_mac 'cp 0xffec0000 0x100000 1024;fdt addr 0xc00000 8192;fdt set /soc8272@f0000000/ethernet@24000 mac-address "[00 44 00 55 00 66]";erase 0xffec0000 0xffec4000;cp 0xc00000 0xffec0000 1024;bootm 0xfe060000 - 0xffec0000'
>
> > run set_mac
>
> For the above command I want to replace the mac address with the ethaddr> How do I do that. I tried $ethaddr but I get extra : characters.
>
> >Setenv set_mac 'cp 0xffec0000 0x100000 1024;fdt addr 0xc00000 8192;fdt set /soc8272@f0000000/ethernet@24000 mac-address $ethaddr;erase 0xffec0000 0xffec4000;cp 0xc00000 0xffec0000 1024;bootm 0xfe060000 - 0xffec0000'
Of course you do, ethaddr has a different syntax and contains :
Anyway you should not have to set mac address manually like you do, u-boot will do it for you if you
have configured u-boot correctly and have a proper dtb tree. Check the u-boot code and the many dts files in linux
under arch/powerpc/boot/dts
^ permalink raw reply
* Re: [RFC PATCH 01/16] powerpc/booke: Set CPU_FTR_DEBUG_LVL_EXC on 32-bit
From: Alexander Graf @ 2012-01-09 15:21 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <20111221013412.GA8378@schlenkerla.am.freescale.net>
On 21.12.2011, at 02:34, Scott Wood wrote:
> Currently 32-bit only cares about this for choice of exception
> vector, which is done in core-specific code. However, KVM will
> want to distinguish as well.
>=20
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/include/asm/cputable.h | 5 +++--
> 1 files changed, 3 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/cputable.h =
b/arch/powerpc/include/asm/cputable.h
> index e30442c..033ad30 100644
> --- a/arch/powerpc/include/asm/cputable.h
> +++ b/arch/powerpc/include/asm/cputable.h
> @@ -375,7 +375,8 @@ extern const char *powerpc_base_platform;
> #define CPU_FTRS_47X (CPU_FTRS_440x6)
> #define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
> CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
> - CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE)
> + CPU_FTR_UNIFIED_ID_CACHE | CPU_FTR_NOEXECUTE | \
> + CPU_FTR_DEBUG_LVL_EXC)
KVM on E200?
Alex
^ permalink raw reply
* Re: [RFC PATCH 04/16] KVM: PPC: factor out lpid allocator from book3s_64_mmu_hv
From: Alexander Graf @ 2012-01-09 15:35 UTC (permalink / raw)
To: Scott Wood; +Cc: Paul Mackerras, linuxppc-dev, KVM mailing list, kvm-ppc
In-Reply-To: <20111221013420.GD8378@schlenkerla.am.freescale.net>
On 21.12.2011, at 02:34, Scott Wood wrote:
> We'll use it on e500mc as well.
>=20
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/include/asm/kvm_book3s.h | 3 ++
> arch/powerpc/include/asm/kvm_booke.h | 3 ++
> arch/powerpc/include/asm/kvm_ppc.h | 5 ++++
> arch/powerpc/kvm/book3s_64_mmu_hv.c | 26 +++++++++---------------
> arch/powerpc/kvm/powerpc.c | 34 =
+++++++++++++++++++++++++++++++++
> 5 files changed, 55 insertions(+), 16 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/kvm_book3s.h =
b/arch/powerpc/include/asm/kvm_book3s.h
> index 60e069e..58c8bec 100644
> --- a/arch/powerpc/include/asm/kvm_book3s.h
> +++ b/arch/powerpc/include/asm/kvm_book3s.h
> @@ -448,4 +448,7 @@ static inline bool kvmppc_critical_section(struct =
kvm_vcpu *vcpu)
>=20
> #define INS_DCBZ 0x7c0007ec
>=20
> +/* LPIDs we support with this build -- runtime limit may be lower */
> +#define KVMPPC_NR_LPIDS (LPID_RSVD + 1)
> +
> #endif /* __ASM_KVM_BOOK3S_H__ */
> diff --git a/arch/powerpc/include/asm/kvm_booke.h =
b/arch/powerpc/include/asm/kvm_booke.h
> index e20c162..138118e 100644
> --- a/arch/powerpc/include/asm/kvm_booke.h
> +++ b/arch/powerpc/include/asm/kvm_booke.h
> @@ -23,6 +23,9 @@
> #include <linux/types.h>
> #include <linux/kvm_host.h>
>=20
> +/* LPIDs we support with this build -- runtime limit may be lower */
> +#define KVMPPC_NR_LPIDS 64
> +
> static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, =
ulong val)
> {
> vcpu->arch.regs.gpr[num] =3D val;
> diff --git a/arch/powerpc/include/asm/kvm_ppc.h =
b/arch/powerpc/include/asm/kvm_ppc.h
> index a61b5b5..5524f88 100644
> --- a/arch/powerpc/include/asm/kvm_ppc.h
> +++ b/arch/powerpc/include/asm/kvm_ppc.h
> @@ -202,4 +202,9 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu =
*vcpu,
> int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
> struct kvm_dirty_tlb *cfg);
>=20
> +long kvmppc_alloc_lpid(void);
> +void kvmppc_claim_lpid(long lpid);
> +void kvmppc_free_lpid(long lpid);
> +void kvmppc_init_lpid(unsigned long nr_lpids);
> +
> #endif /* __POWERPC_KVM_PPC_H__ */
> diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c =
b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> index 66d6452..45b6f0e 100644
> --- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
> +++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> @@ -36,13 +36,11 @@
>=20
> /* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */
> #define MAX_LPID_970 63
> -#define NR_LPIDS (LPID_RSVD + 1)
> -unsigned long lpid_inuse[BITS_TO_LONGS(NR_LPIDS)];
>=20
> long kvmppc_alloc_hpt(struct kvm *kvm)
> {
> unsigned long hpt;
> - unsigned long lpid;
> + long lpid;
> struct revmap_entry *rev;
>=20
> /* Allocate guest's hashed page table */
> @@ -62,14 +60,9 @@ long kvmppc_alloc_hpt(struct kvm *kvm)
> }
> kvm->arch.revmap =3D rev;
>=20
> - /* Allocate the guest's logical partition ID */
> - do {
> - lpid =3D find_first_zero_bit(lpid_inuse, NR_LPIDS);
> - if (lpid >=3D NR_LPIDS) {
> - pr_err("kvm_alloc_hpt: No LPIDs free\n");
> - goto out_freeboth;
> - }
> - } while (test_and_set_bit(lpid, lpid_inuse));
> + lpid =3D kvmppc_alloc_lpid();
> + if (lpid < 0)
> + goto out_freeboth;
>=20
> kvm->arch.sdr1 =3D __pa(hpt) | (HPT_ORDER - 18);
> kvm->arch.lpid =3D lpid;
> @@ -86,7 +79,7 @@ long kvmppc_alloc_hpt(struct kvm *kvm)
>=20
> void kvmppc_free_hpt(struct kvm *kvm)
> {
> - clear_bit(kvm->arch.lpid, lpid_inuse);
> + kvmppc_free_lpid(kvm->arch.lpid);
> vfree(kvm->arch.revmap);
> free_pages(kvm->arch.hpt_virt, HPT_ORDER - PAGE_SHIFT);
> }
> @@ -158,8 +151,7 @@ int kvmppc_mmu_hv_init(void)
> if (!cpu_has_feature(CPU_FTR_HVMODE))
> return -EINVAL;
>=20
> - memset(lpid_inuse, 0, sizeof(lpid_inuse));
> -
> + /* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs =
*/
> if (cpu_has_feature(CPU_FTR_ARCH_206)) {
> host_lpid =3D mfspr(SPRN_LPID); /* POWER7 */
> rsvd_lpid =3D LPID_RSVD;
> @@ -168,9 +160,11 @@ int kvmppc_mmu_hv_init(void)
> rsvd_lpid =3D MAX_LPID_970;
> }
>=20
> - set_bit(host_lpid, lpid_inuse);
> + kvmppc_init_lpid(rsvd_lpid + 1);
> +
> + kvmppc_claim_lpid(host_lpid);
> /* rsvd_lpid is reserved for use in partition switching */
> - set_bit(rsvd_lpid, lpid_inuse);
> + kvmppc_claim_lpid(rsvd_lpid);
>=20
> return 0;
> }
> diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
> index 64c738dc..42701e5 100644
> --- a/arch/powerpc/kvm/powerpc.c
> +++ b/arch/powerpc/kvm/powerpc.c
Paul, does this work for you? IIRC you need this code to be available =
from real mode, which powerpc.c isn't in, right?
Alex
> @@ -800,6 +800,40 @@ out:
> return r;
> }
>=20
> +static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)];
> +static unsigned long nr_lpids;
> +
> +long kvmppc_alloc_lpid(void)
> +{
> + long lpid;
> +
> + do {
> + lpid =3D find_first_zero_bit(lpid_inuse, =
KVMPPC_NR_LPIDS);
> + if (lpid >=3D nr_lpids) {
> + pr_err("%s: No LPIDs free\n", __func__);
> + return -ENOMEM;
> + }
> + } while (test_and_set_bit(lpid, lpid_inuse));
> +
> + return lpid;
> +}
> +
> +void kvmppc_claim_lpid(long lpid)
> +{
> + set_bit(lpid, lpid_inuse);
> +}
> +
> +void kvmppc_free_lpid(long lpid)
> +{
> + clear_bit(lpid, lpid_inuse);
> +}
> +
> +void kvmppc_init_lpid(unsigned long nr_lpids_param)
> +{
> + nr_lpids =3D min_t(unsigned long, KVMPPC_NR_LPIDS, =
nr_lpids_param);
> + memset(lpid_inuse, 0, sizeof(lpid_inuse));
> +}
> +
> int kvm_arch_init(void *opaque)
> {
> return 0;
> --=20
> 1.7.7.rc3.4.g8d714
>=20
>=20
^ permalink raw reply
* Re: [RFC PATCH 12/16] KVM: PPC: e500: emulate tlbilx
From: Alexander Graf @ 2012-01-09 16:23 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <20111221013438.GL8378@schlenkerla.am.freescale.net>
On 21.12.2011, at 02:34, Scott Wood wrote:
> tlbilx is the new, preferred invalidation instruction. It is not
> found on e500 prior to e500mc, but there should be no harm in
> supporting it on all e500.
>=20
> Based on code from Ashish Kalra <Ashish.Kalra@freescale.com>.
>=20
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/kvm/e500.h | 1 +
> arch/powerpc/kvm/e500_emulate.c | 9 ++++++
> arch/powerpc/kvm/e500_tlb.c | 52 =
+++++++++++++++++++++++++++++++++++++++
> 3 files changed, 62 insertions(+), 0 deletions(-)
>=20
> diff --git a/arch/powerpc/kvm/e500.h b/arch/powerpc/kvm/e500.h
> index f4dee55..ce3f163 100644
> --- a/arch/powerpc/kvm/e500.h
> +++ b/arch/powerpc/kvm/e500.h
> @@ -124,6 +124,7 @@ int kvmppc_e500_emul_mt_mmucsr0(struct =
kvmppc_vcpu_e500 *vcpu_e500,
> int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu);
> int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu);
> int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb);
> +int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, =
int rb);
> int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb);
> int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500);
> void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500);
> diff --git a/arch/powerpc/kvm/e500_emulate.c =
b/arch/powerpc/kvm/e500_emulate.c
> index c80794d..af02c18 100644
> --- a/arch/powerpc/kvm/e500_emulate.c
> +++ b/arch/powerpc/kvm/e500_emulate.c
> @@ -22,6 +22,7 @@
> #define XOP_TLBSX 914
> #define XOP_TLBRE 946
> #define XOP_TLBWE 978
> +#define XOP_TLBILX 18
>=20
> int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
> unsigned int inst, int *advance)
> @@ -29,6 +30,7 @@ int kvmppc_core_emulate_op(struct kvm_run *run, =
struct kvm_vcpu *vcpu,
> int emulated =3D EMULATE_DONE;
> int ra;
> int rb;
> + int rt;
>=20
> switch (get_op(inst)) {
> case 31:
> @@ -47,6 +49,13 @@ int kvmppc_core_emulate_op(struct kvm_run *run, =
struct kvm_vcpu *vcpu,
> emulated =3D kvmppc_e500_emul_tlbsx(vcpu,rb);
> break;
>=20
> + case XOP_TLBILX:
> + ra =3D get_ra(inst);
> + rb =3D get_rb(inst);
> + rt =3D get_rt(inst);
> + emulated =3D kvmppc_e500_emul_tlbilx(vcpu, rt, =
ra, rb);
> + break;
> +
> case XOP_TLBIVAX:
> ra =3D get_ra(inst);
> rb =3D get_rb(inst);
> diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
> index 031fd5b..121cd68 100644
> --- a/arch/powerpc/kvm/e500_tlb.c
> +++ b/arch/powerpc/kvm/e500_tlb.c
> @@ -631,6 +631,58 @@ int kvmppc_e500_emul_tlbivax(struct kvm_vcpu =
*vcpu, int ra, int rb)
> return EMULATE_DONE;
> }
>=20
> +static void tlbilx_all(struct kvmppc_vcpu_e500 *vcpu_e500, int =
tlbsel,
> + int pid, int rt)
> +{
> + struct kvm_book3e_206_tlb_entry *tlbe;
> + int tid, esel;
> +
> + /* invalidate all entries */
> + for (esel =3D 0; esel < vcpu_e500->gtlb_params[tlbsel].entries; =
esel++) {
By dereferencing the struct inside the loop you're creating a new load =
on every iteration. Please use a variable for entries.
> + tlbe =3D get_entry(vcpu_e500, tlbsel, esel);
> + tid =3D get_tlb_tid(tlbe);
> + if (rt =3D=3D 0 || tid =3D=3D pid) {
> + inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
> + kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, =
esel);
> + }
> + }
> +}
> +
> +static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500, int pid,
> + int ra, int rb)
> +{
> + int tlbsel, esel;
> + gva_t ea;
> +
> + ea =3D kvmppc_get_gpr(&vcpu_e500->vcpu, rb);
> + if (ra)
> + ea +=3D kvmppc_get_gpr(&vcpu_e500->vcpu, ra);
> +
> + for (tlbsel =3D 0; tlbsel < 2; tlbsel++) {
> + esel =3D kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, =
pid, -1);
> + if (esel >=3D 0) {
> + inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
> + kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, =
esel);
> + break;
> + }
> + }
> +}
> +
> +int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, =
int rb)
> +{
> + struct kvmppc_vcpu_e500 *vcpu_e500 =3D to_e500(vcpu);
> + int pid =3D get_cur_spid(vcpu);
> +
> + if (rt =3D=3D 0 || rt =3D=3D 1) {
> + tlbilx_all(vcpu_e500, 0, pid, rt);
> + tlbilx_all(vcpu_e500, 1, pid, rt);
> + } else if (rt =3D=3D 3) {
too many magic constants :)
Alex
^ permalink raw reply
* Re: [RFC PATCH 16/16] KVM: PPC: e500mc support
From: Avi Kivity @ 2012-01-09 16:33 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, agraf, kvm-ppc, kvm
In-Reply-To: <20111221013447.GP8378@schlenkerla.am.freescale.net>
On 12/21/2011 03:34 AM, Scott Wood wrote:
> Add processor support for e500mc, using hardware virtualization support
> (GS-mode).
>
> Current issues include:
> - No support for external proxy (coreint) interrupt mode in the guest.
>
> Includes work by Ashish Kalra <Ashish.Kalra@freescale.com>,
> Varun Sethi <Varun.Sethi@freescale.com>, and
> Liu Yu <yu.liu@freescale.com>.
>
Best to include their signoffs, if possible.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply
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