* Re: [SDK v1.2][PATCH 1/2 v3] powerpc/85xx: Add dts for P1021RDB-PC board
From: Xu Jiucheng @ 2012-01-10 7:17 UTC (permalink / raw)
To: Scott Wood; +Cc: Matthew McClintock, linuxppc-dev
In-Reply-To: <4F0B541C.1050001@freescale.com>
=E5=9C=A8 2012-01-09Mon=E7=9A=84 14:54 -0600=EF=BC=8CScott Wood=E5=86=99=E9=
=81=93=EF=BC=9A
> On 01/09/2012 12:53 AM, Xu Jiucheng wrote:
> > + nand@1,0 {
> > + #address-cells =3D <1>;
> > + #size-cells =3D <1>;
> > + compatible =3D "fsl,p1020-fcm-nand",
> > + "fsl,elbc-fcm-nand";
>=20
> s/p1020/p1021/
>=20
> -Scott
Ok.
Thanks & Best Regards
Jiucheng
^ permalink raw reply
* Re: [SDK v1.2][PATCH 1/2 v3] powerpc/85xx: Add dts for P1021RDB-PC board
From: Xu Jiucheng @ 2012-01-10 7:22 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: Matthew McClintock
In-Reply-To: <1326092022-10085-1-git-send-email-B37781@freescale.com>
I'm sorry, please ignore this email.
Thanks & Best Regards
Jiucheng
=E5=9C=A8 2012-01-09Mon=E7=9A=84 14:53 +0800=EF=BC=8CXu Jiucheng=E5=86=99=
=E9=81=93=EF=BC=9A
> P1021RDB-PC Overview
> -----------------
> 1Gbyte DDR3 (on board DDR)
> 16Mbyte NOR flash
> 32Mbyte eSLC NAND Flash
> 256 Kbit M24256 I2C EEPROM
> 128 Mbit SPI Flash memory
> Real-time clock on I2C bus
> SD/MMC connector to interface with the SD memory card
> PCIex
> - x1 PCIe slot or x1 PCIe to dual SATA controller
> - x1 mini-PCIe slot
> USB 2.0
> - ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=E2=80=99=
s GL850A
> - Two USB2.0 Type A receptacles
> - One USB2.0 signal to Mini PCIe slot
> eTSEC1: Connected to RGMII PHY VSC7385
> eTSEC2: Connected to SGMII PHY VSC8221
> eTSEC3: Connected to SGMII PHY AR8021
> DUART interface: supports two UARTs up to 115200 bps for console displa=
y
>=20
> Signed-off-by: Matthew McClintock <msm@freescale.com>
> Signed-off-by: Xu Jiucheng <B37781@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 4 +
> arch/powerpc/boot/dts/p1021rdb.dts | 96 +++++++++++
> arch/powerpc/boot/dts/p1021rdb.dtsi | 236 +++++++++++++++++++=
++++++++
> arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 +++++++++++
> 4 files changed, 432 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
> create mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
> create mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
>=20
> diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc=
/boot/dts/fsl/p1021si-post.dtsi
> index 38ba54d..b7929c9 100644
> --- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
> @@ -144,6 +144,10 @@
> /include/ "pq3-usb2-dr-0.dtsi"
> =20
> /include/ "pq3-esdhc-0.dtsi"
> + sdhc@2e000 {
> + sdhci,auto-cmd12;
> + };
> +
> /include/ "pq3-sec3.3-0.dtsi"
> =20
> /include/ "pq3-mpic.dtsi"
> diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts=
/p1021rdb.dts
> new file mode 100644
> index 0000000..90b6b4c
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/p1021rdb.dts
> @@ -0,0 +1,96 @@
> +/*
> + * P1021 RDB Device Tree Source
> + *
> + * Copyright 2011 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions =
are met:
> + * * Redistributions of source code must retain the above copyrigh=
t
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyr=
ight
> + * notice, this list of conditions and the following disclaimer =
in the
> + * documentation and/or other materials provided with the distri=
bution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote p=
roducts
> + * derived from this software without specific prior written per=
mission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of =
the
> + * GNU General Public License ("GPL") as published by the Free Softwar=
e
> + * Foundation, either version 2 of that License or (at your option) an=
y
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND AN=
Y
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE I=
MPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE =
ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR=
ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL =
DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR =
SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CA=
USED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, =
OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U=
SE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +/include/ "fsl/p1021si-pre.dtsi"
> +/ {
> + model =3D "fsl,P1021RDB";
> + compatible =3D "fsl,P1021RDB-PC";
> +
> + memory {
> + device_type =3D "memory";
> + };
> +
> + lbc: localbus@ffe05000 {
> + reg =3D <0 0xffe05000 0 0x1000>;
> +
> + /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
> + ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
> + 0x1 0x0 0x0 0xff800000 0x00040000
> + 0x2 0x0 0x0 0xffb00000 0x00020000>;
> + };
> +
> + soc: soc@ffe00000 {
> + ranges =3D <0x0 0x0 0xffe00000 0x100000>;
> + };
> +
> + pci0: pcie@ffe09000 {
> + ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
> + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
> + reg =3D <0 0xffe09000 0 0x1000>;
> + pcie@0 {
> + ranges =3D <0x2000000 0x0 0xa0000000
> + 0x2000000 0x0 0xa0000000
> + 0x0 0x20000000
> +
> + 0x1000000 0x0 0x0
> + 0x1000000 0x0 0x0
> + 0x0 0x100000>;
> + };
> + };
> +
> + pci1: pcie@ffe0a000 {
> + reg =3D <0 0xffe0a000 0 0x1000>;
> + ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
> + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
> + pcie@0 {
> + ranges =3D <0x2000000 0x0 0x80000000
> + 0x2000000 0x0 0x80000000
> + 0x0 0x20000000
> +
> + 0x1000000 0x0 0x0
> + 0x1000000 0x0 0x0
> + 0x0 0x100000>;
> + };
> + };
> +
> + qe: qe@ffe80000 {
> + ranges =3D <0x0 0x0 0xffe80000 0x40000>;
> + reg =3D <0 0xffe80000 0 0x480>;
> + brg-frequency =3D <0>;
> + bus-frequency =3D <0>;
> + };
> +};
> +
> +/include/ "p1021rdb.dtsi"
> +/include/ "fsl/p1021si-post.dtsi"
> diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dt=
s/p1021rdb.dtsi
> new file mode 100644
> index 0000000..22ecb6e
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/p1021rdb.dtsi
> @@ -0,0 +1,236 @@
> +/*
> + * P1021 RDB Device Tree Source stub (no addresses or top-level ranges=
)
> + *
> + * Copyright 2011 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions =
are met:
> + * * Redistributions of source code must retain the above copyrigh=
t
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyr=
ight
> + * notice, this list of conditions and the following disclaimer =
in the
> + * documentation and/or other materials provided with the distri=
bution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote p=
roducts
> + * derived from this software without specific prior written per=
mission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of =
the
> + * GNU General Public License ("GPL") as published by the Free Softwar=
e
> + * Foundation, either version 2 of that License or (at your option) an=
y
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND =
ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE I=
MPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE =
ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR=
ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL =
DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR =
SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CA=
USED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, =
OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U=
SE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +&lbc {
> + nor@0,0 {
> + #address-cells =3D <1>;
> + #size-cells =3D <1>;
> + compatible =3D "cfi-flash";
> + reg =3D <0x0 0x0 0x1000000>;
> + bank-width =3D <2>;
> + device-width =3D <1>;
> +
> + partition@0 {
> + /* This location must not be altered */
> + /* 256KB for Vitesse 7385 Switch firmware */
> + reg =3D <0x0 0x00040000>;
> + label =3D "NOR Vitesse-7385 Firmware";
> + read-only;
> + };
> +
> + partition@40000 {
> + /* 256KB for DTB Image */
> + reg =3D <0x00040000 0x00040000>;
> + label =3D "NOR DTB Image";
> + };
> +
> + partition@80000 {
> + /* 3.5 MB for Linux Kernel Image */
> + reg =3D <0x00080000 0x00380000>;
> + label =3D "NOR Linux Kernel Image";
> + };
> +
> + partition@400000 {
> + /* 11MB for JFFS2 based Root file System */
> + reg =3D <0x00400000 0x00b00000>;
> + label =3D "NOR JFFS2 Root File System";
> + };
> +
> + partition@f00000 {
> + /* This location must not be altered */
> + /* 512KB for u-boot Bootloader Image */
> + /* 512KB for u-boot Environment Variables */
> + reg =3D <0x00f00000 0x00100000>;
> + label =3D "NOR U-Boot Image";
> + };
> + };
> +
> + nand@1,0 {
> + #address-cells =3D <1>;
> + #size-cells =3D <1>;
> + compatible =3D "fsl,p1020-fcm-nand",
> + "fsl,elbc-fcm-nand";
> + reg =3D <0x1 0x0 0x40000>;
> +
> + partition@0 {
> + /* This location must not be altered */
> + /* 1MB for u-boot Bootloader Image */
> + reg =3D <0x0 0x00100000>;
> + label =3D "NAND U-Boot Image";
> + read-only;
> + };
> +
> + partition@100000 {
> + /* 1MB for DTB Image */
> + reg =3D <0x00100000 0x00100000>;
> + label =3D "NAND DTB Image";
> + };
> +
> + partition@200000 {
> + /* 4MB for Linux Kernel Image */
> + reg =3D <0x00200000 0x00400000>;
> + label =3D "NAND Linux Kernel Image";
> + };
> +
> + partition@600000 {
> + /* 4MB for Compressed Root file System Image */
> + reg =3D <0x00600000 0x00400000>;
> + label =3D "NAND Compressed RFS Image";
> + };
> +
> + partition@a00000 {
> + /* 7MB for JFFS2 based Root file System */
> + reg =3D <0x00a00000 0x00700000>;
> + label =3D "NAND JFFS2 Root File System";
> + };
> +
> + partition@1100000 {
> + /* 15MB for User Writable Area */
> + reg =3D <0x01100000 0x00f00000>;
> + label =3D "NAND Writable User area";
> + };
> + };
> +
> + L2switch@2,0 {
> + #address-cells =3D <1>;
> + #size-cells =3D <1>;
> + compatible =3D "vitesse-7385";
> + reg =3D <0x2 0x0 0x20000>;
> + };
> +};
> +
> +&soc {
> + i2c@3000 {
> + rtc@68 {
> + compatible =3D "pericom,pt7c4338";
> + reg =3D <0x68>;
> + };
> + };
> +
> + spi@7000 {
> + flash@0 {
> + #address-cells =3D <1>;
> + #size-cells =3D <1>;
> + compatible =3D "spansion,s25sl12801";
> + reg =3D <0>;
> + spi-max-frequency =3D <40000000>; /* input clock */
> +
> + partition@u-boot {
> + /* 512KB for u-boot Bootloader Image */
> + reg =3D <0x0 0x00080000>;
> + label =3D "SPI Flash U-Boot Image";
> + read-only;
> + };
> +
> + partition@dtb {
> + /* 512KB for DTB Image */
> + reg =3D <0x00080000 0x00080000>;
> + label =3D "SPI Flash DTB Image";
> + };
> +
> + partition@kernel {
> + /* 4MB for Linux Kernel Image */
> + reg =3D <0x00100000 0x00400000>;
> + label =3D "SPI Flash Linux Kernel Image";
> + };
> +
> + partition@fs {
> + /* 4MB for Compressed RFS Image */
> + reg =3D <0x00500000 0x00400000>;
> + label =3D "SPI Flash Compressed RFSImage";
> + };
> +
> + partition@jffs-fs {
> + /* 7MB for JFFS2 based RFS */
> + reg =3D <0x00900000 0x00700000>;
> + label =3D "SPI Flash JFFS2 RFS";
> + };
> + };
> + };
> +
> + usb@22000 {
> + phy_type =3D "ulpi";
> + };
> +
> + mdio@24000 {
> + phy0: ethernet-phy@0 {
> + interrupt-parent =3D <&mpic>;
> + interrupts =3D <3 1>;
> + reg =3D <0x0>;
> + };
> +
> + phy1: ethernet-phy@1 {
> + interrupt-parent =3D <&mpic>;
> + interrupts =3D <2 1>;
> + reg =3D <0x1>;
> + };
> +
> + tbi0: tbi-phy@11 {
> + reg =3D <0x11>;
> + device_type =3D "tbi-phy";
> + };
> + };
> +
> + mdio@25000 {
> + tbi1: tbi-phy@11 {
> + reg =3D <0x11>;
> + device_type =3D "tbi-phy";
> + };
> + };
> +
> + mdio@26000 {
> + tbi2: tbi-phy@11 {
> + reg =3D <0x11>;
> + device_type =3D "tbi-phy";
> + };
> + };
> +
> + enet0: ethernet@b0000 {
> + fixed-link =3D <1 1 1000 0 0>;
> + phy-connection-type =3D "rgmii-id";
> +
> + };
> +
> + enet1: ethernet@b1000 {
> + phy-handle =3D <&phy0>;
> + tbi-handle =3D <&tbi1>;
> + phy-connection-type =3D "sgmii";
> + };
> +
> + enet2: ethernet@b2000 {
> + phy-handle =3D <&phy1>;
> + tbi-handle =3D <&tbi2>;
> + phy-connection-type =3D "rgmii-id";
> + };
> +};
> diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot=
/dts/p1021rdb_36b.dts
> new file mode 100644
> index 0000000..ea6d8b5
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/p1021rdb_36b.dts
> @@ -0,0 +1,96 @@
> +/*
> + * P1021 RDB Device Tree Source (36-bit address map)
> + *
> + * Copyright 2011 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions =
are met:
> + * * Redistributions of source code must retain the above copyrigh=
t
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyr=
ight
> + * notice, this list of conditions and the following disclaimer =
in the
> + * documentation and/or other materials provided with the distri=
bution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote p=
roducts
> + * derived from this software without specific prior written per=
mission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of =
the
> + * GNU General Public License ("GPL") as published by the Free Softwar=
e
> + * Foundation, either version 2 of that License or (at your option) an=
y
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND AN=
Y
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE I=
MPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE =
ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR=
ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL =
DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR =
SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CA=
USED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, =
OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U=
SE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +/include/ "fsl/p1021si-pre.dtsi"
> +/ {
> + model =3D "fsl,P1021RDB";
> + compatible =3D "fsl,P1021RDB-PC";
> +
> + memory {
> + device_type =3D "memory";
> + };
> +
> + lbc: localbus@fffe05000 {
> + reg =3D <0xf 0xffe05000 0 0x1000>;
> +
> + /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
> + ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
> + 0x1 0x0 0xf 0xff800000 0x00040000
> + 0x2 0x0 0xf 0xffb00000 0x00020000>;
> + };
> +
> + soc: soc@fffe00000 {
> + ranges =3D <0x0 0xf 0xffe00000 0x100000>;
> + };
> +
> + pci0: pcie@fffe09000 {
> + ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
> + 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
> + reg =3D <0xf 0xffe09000 0 0x1000>;
> + pcie@0 {
> + ranges =3D <0x2000000 0x0 0xa0000000
> + 0x2000000 0x0 0xa0000000
> + 0x0 0x20000000
> +
> + 0x1000000 0x0 0x0
> + 0x1000000 0x0 0x0
> + 0x0 0x100000>;
> + };
> + };
> +
> + pci1: pcie@fffe0a000 {
> + reg =3D <0xf 0xffe0a000 0 0x1000>;
> + ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
> + 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
> + pcie@0 {
> + ranges =3D <0x2000000 0x0 0xc0000000
> + 0x2000000 0x0 0xc0000000
> + 0x0 0x20000000
> +
> + 0x1000000 0x0 0x0
> + 0x1000000 0x0 0x0
> + 0x0 0x100000>;
> + };
> + };
> +
> + qe: qe@fffe80000 {
> + ranges =3D <0x0 0xf 0xffe80000 0x40000>;
> + reg =3D <0xf 0xffe80000 0 0x480>;
> + brg-frequency =3D <0>;
> + bus-frequency =3D <0>;
> + };
> +};
> +
> +/include/ "p1021rdb.dtsi"
> +/include/ "fsl/p1021si-post.dtsi"
^ permalink raw reply
* Re: [SDK v1.2][PATCH 2/2 v3] powerpc/85xx: Added P1021RDB-PC Platform support
From: Xu Jiucheng @ 2012-01-10 7:23 UTC (permalink / raw)
To: galak, linuxppc-dev
In-Reply-To: <1326092022-10085-2-git-send-email-B37781@freescale.com>
I'm sorry, please ignore this email.
Thanks & Best Regards=20
Jiucheng
=E5=9C=A8 2012-01-09Mon=E7=9A=84 14:53 +0800=EF=BC=8CXu Jiucheng=E5=86=99=
=E9=81=93=EF=BC=9A
> Signed-off-by: Xu Jiucheng <B37781@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 25 +++++++++++++++++++++=
++++
> 1 files changed, 25 insertions(+), 0 deletions(-)
>=20
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/p=
latforms/85xx/mpc85xx_rdb.c
> index 9feccbb..0c32668 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> @@ -113,6 +113,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
> =20
> machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
> machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
> +machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
> =20
> /*
> * Called very early, device-tree isn't unflattened
> @@ -135,6 +136,15 @@ static int __init p1020_rdb_probe(void)
> return 0;
> }
> =20
> +static int __init p1021_rdb_pc_probe(void)
> +{
> + unsigned long root =3D of_get_flat_dt_root();
> +
> + if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
> + return 1;
> + return 0;
> +}
> +
> define_machine(p2020_rdb) {
> .name =3D "P2020 RDB",
> .probe =3D p2020_rdb_probe,
> @@ -162,3 +172,18 @@ define_machine(p1020_rdb) {
> .calibrate_decr =3D generic_calibrate_decr,
> .progress =3D udbg_progress,
> };
> +
> +define_machine(p1021_rdb_pc) {
> + .name =3D "P1021 RDB-PC",
> + .probe =3D p1021_rdb_pc_probe,
> + .setup_arch =3D mpc85xx_rdb_setup_arch,
> + .init_IRQ =3D mpc85xx_rdb_pic_init,
> +#ifdef CONFIG_PCI
> + .pcibios_fixup_bus =3D fsl_pcibios_fixup_bus,
> +#endif
> + .get_irq =3D mpic_get_irq,
> + .restart =3D fsl_rstcr_restart,
> + .calibrate_decr =3D generic_calibrate_decr,
> + .progress =3D udbg_progress,
> +};
> +
^ permalink raw reply
* RE: [PATCH SDK1.2 1/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-01-10 7:31 UTC (permalink / raw)
To: Gala Kumar-B11780
Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472, Jia Hongtao-B38951
In-Reply-To: <1324451458-4644-2-git-send-email-B38951@freescale.com>
Hi Kumar,
Do you have any idea on this series of patches?
Looking forward to your answer.
Thanks.
--Jia Hongtao.
-----Original Message-----
From: Jia Hongtao-B38951=20
Sent: Wednesday, December 21, 2011 3:11 PM
To: linuxppc-dev@lists.ozlabs.org
Cc: Li Yang-R58472; Gala Kumar-B11780; Jia Hongtao-B38951
Subject: [PATCH SDK1.2 1/3] powerpc/fsl-pci: Unify pci/pcie initialization =
code
We unified the Freescale pci/pcie initialization by changing the fsl_pci to=
a platform driver.
In previous version pci/pcie initialization is in platform code which Initi=
alize pci bridge base on EP/RC or host/agent settings.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/85xx/p1022_ds.c | 39 +++++++----------------
arch/powerpc/sysdev/fsl_pci.c | 53 ++++++++++++++++++++++++++++=
++++
2 files changed, 65 insertions(+), 27 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platform=
s/85xx/p1022_ds.c
index 2bf4342..41de2c1 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -277,32 +277,9 @@ void __init mpc85xx_smp_init(void);
*/
static void __init p1022_ds_setup_arch(void) { -#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
- dma_addr_t max =3D 0xffffffff;
-
if (ppc_md.progress)
ppc_md.progress("p1022_ds_setup_arch()", 0);
=20
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
- struct resource rsrc;
- struct pci_controller *hose;
-
- of_address_to_resource(np, 0, &rsrc);
-
- if ((rsrc.start & 0xfffff) =3D=3D 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
-
- hose =3D pci_find_hose_for_OF_device(np);
- max =3D min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
-#endif
-
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
diu_ops.get_pixel_format =3D p1022ds_get_pixel_format;
diu_ops.set_gamma_table =3D p1022ds_set_gamma_table;
@@ -316,11 +293,8 @@ static void __init p1022_ds_setup_arch(void) #endif
=20
#ifdef CONFIG_SWIOTLB
- if (memblock_end_of_DRAM() > max) {
+ if (memblock_end_of_DRAM() > 0xffffffff)
ppc_swiotlb_enable =3D 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
- }
#endif
=20
pr_info("Freescale P1022 DS reference board\n"); @@ -339,6 +313,17 @@ sta=
tic int __init p1022_ds_publish_devices(void) } machine_device_initcall(p=
1022_ds, p1022_ds_publish_devices);
=20
+static struct of_device_id __initdata p1022_pci_ids[] =3D {
+ { .compatible =3D "fsl,p1022-pcie", },
+ {},
+};
+
+static int __init p1022_ds_publish_pci_device(void) {
+ return of_platform_bus_probe(NULL, p1022_pci_ids, NULL); }=20
+machine_arch_initcall(p1022_ds, p1022_ds_publish_pci_device);
+
machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
=20
/*
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c =
index 4ce547e..a0f305d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -712,3 +712,56 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
=20
return 0;
}
+
+static const struct of_device_id pci_ids[] =3D {
+ { .compatible =3D "fsl,mpc8540-pci", },
+ { .compatible =3D "fsl,mpc8548-pcie", },
+ { .compatible =3D "fsl,p1022-pcie", },
+ {},
+};
+
+static int __devinit fsl_pci_probe(struct platform_device *pdev) {
+ struct pci_controller *hose;
+
+ if (of_match_node(pci_ids, pdev->dev.of_node)) {
+ struct resource rsrc;
+ of_address_to_resource(pdev->dev.of_node, 0, &rsrc);
+ if ((rsrc.start & 0xfffff) =3D=3D 8000)
+ fsl_add_bridge(pdev->dev.of_node, 1);
+ else
+ fsl_add_bridge(pdev->dev.of_node, 0);
+
+#ifdef CONFIG_SWIOTLB
+ hose =3D pci_find_hose_for_OF_device(pdev->dev.of_node);
+ /*
+ * if we couldn't map all of DRAM via the dma windows
+ * we need SWIOTLB to handle buffers located outside of
+ * dma capable memory region
+ */
+ if (memblock_end_of_DRAM() > hose->dma_window_base_cur
+ + hose->dma_window_size) {
+ ppc_swiotlb_enable =3D 1;
+ set_pci_dma_ops(&swiotlb_dma_ops);
+ ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
+ }
+#endif
+
+ }
+
+ return 0;
+}
+
+static struct platform_driver fsl_pci_driver =3D {
+ .driver =3D {
+ .name =3D "fsl-pci",
+ .of_match_table =3D pci_ids,
+ },
+ .probe =3D fsl_pci_probe,
+};
+
+static int __init fsl_pci_init(void)
+{
+ return platform_driver_register(&fsl_pci_driver);
+}
+arch_initcall(fsl_pci_init);
--
1.7.5.1
^ permalink raw reply related
* Re: [RFC PATCH 16/16] KVM: PPC: e500mc support
From: Avi Kivity @ 2012-01-10 8:37 UTC (permalink / raw)
To: Scott Wood; +Cc: Liu Yu, kvm, agraf, kvm-ppc, Varun Sethi, linuxppc-dev
In-Reply-To: <4F0B4002.4050407@freescale.com>
On 01/09/2012 09:29 PM, Scott Wood wrote:
> >
> > Best to include their signoffs, if possible.
>
> These patches are based in part on a bunch of different patches from
> these people (for which I did receive signoffs). I was reluctant to put
> their signoff directly on the new patches, since I didn't want to make
> it look like they had submitted the patch in anything resembling its
> current form. I wanted to give them credit for what they did, but not
> blame for what I did with their code.
>
Signoffs are for assigning neither credit nor blame, but for attributing
authorship and affirming that a contributor has the right to contribute
code or pass it along. Please read the DCO at
https://lwn.net/Articles/437739/.
It's okay to miss them from time to time, especially for established
contributors, but avoid it whenever possible.
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
^ permalink raw reply
* RE: [PATCH 00/14] DMA-mapping framework redesign preparation
From: Marek Szyprowski @ 2012-01-10 8:42 UTC (permalink / raw)
To: Marek Szyprowski, linux-kernel
Cc: linux-arch, 'Stephen Rothwell', linux-alpha, linux-ia64,
'Arnd Bergmann', linux-sh, x86, Andrzej Pietrasiewicz,
'Jonathan Corbet', linaro-mm-sig, linux-mm,
'Kyungmin Park', linux-mips, microblaze-uclinux,
sparclinux, 'Thomas Gleixner', linuxppc-dev,
'Andrew Morton', linux-arm-kernel, discuss
In-Reply-To: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com>
Hello,
To help everyone in testing and adapting our patches for his hardware
platform I've rebased our patches onto the latest v3.2 Linux kernel and
prepared a few GIT branches in our public repository. These branches
contain our memory management related patches posted in the following
threads:
"[PATCHv18 0/11] Contiguous Memory Allocator":
http://www.spinics.net/lists/linux-mm/msg28125.html
later called CMAv18,
"[PATCH 00/14] DMA-mapping framework redesign preparation":
http://www.spinics.net/lists/linux-sh/msg09777.html
and
"[PATCH 0/8 v4] ARM: DMA-mapping framework redesign":
http://www.spinics.net/lists/arm-kernel/msg151147.html
with the following update:
http://www.spinics.net/lists/arm-kernel/msg154889.html
later called DMAv5.
These branches are available in our public GIT repository:
git://git.infradead.org/users/kmpark/linux-samsung
http://git.infradead.org/users/kmpark/linux-samsung/
The following branches are available:
1) 3.2-cma-v18
Vanilla Linux v3.2 with fixed CMA v18 patches (first patch replaced
with the one from v17 to fix SMP issues, see the respective thread).
2) 3.2-dma-v5
Vanilla Linux v3.2 + iommu/next (IOMMU maintainer's patches) branch
with DMA-preparation and DMA-mapping framework redesign patches.
3) 3.2-cma-v18-dma-v5
Previous two branches merged together (DMA-mapping on top of CMA)
4) 3.2-cma-v18-dma-v5-exynos
Previous branch rebased on top of iommu/next + kgene/for-next (Samsung
SoC platform maintainer's patches) with new Exynos4 IOMMU driver by
KyongHo Cho and relevant glue code.
5) 3.2-dma-v5-exynos
Branch from point 2 rebased on top of iommu/next + kgene/for-next
(Samsung SoC maintainer's patches) with new Exynos4 IOMMU driver by
KyongHo Cho and relevant glue code.
I hope everyone will find a branch that suits his needs. :)
Best regards
--
Marek Szyprowski
Samsung Poland R&D Center
^ permalink raw reply
* RE: OpenPIC warnings on P1022RDK AMP configuration
From: Arshad, Farrukh @ 2012-01-10 8:43 UTC (permalink / raw)
To: linuxppc-dev@lists.ozlabs.org
[-- Attachment #1: Type: text/plain, Size: 2242 bytes --]
Change kernel configuration as per following to fix this warning.
Disable Kernel Options -> Support for enabling/disabling CPUs
Disable Kernel Options -> Distribute interrupts on all CPUs by default
Regards,
Farrukh Arshad
From: Arshad, Farrukh
Sent: Friday, December 23, 2011 11:18 AM
To: linuxppc-dev@lists.ozlabs.org
Subject: OpenPIC warnings on P1022RDK AMP configuration
Greetings All
I am running dual linux on P1022RDK in AMP configuration. My memory partitioning is as below
---------------------------------------------------------------------
Core | Base Address | Size |
--------------------------|---------------|-------------------------|
Core 0 (MEL RT Kernel) | 0x0000,0000 | 0x0C00,0000 - 192 (MB) |
Core 1 (LTIB Kernel) |0x0C00,0000 | 0x1000,0000 - 256 (MB) |
MCAPI - Shared Mem | 0x1C00,0000 | 0x0400,0000 - 64 (MB) |
---------------------------------------------------------------------
My kernel command lines are for both cores
setenv core0bootargs root=/dev/mmcblk0p3 rootdelay=5 rw mem=192M
setenv core1bootargs root=/dev/nfs nfsroot=<serverip>:/<rootfs> ip=dhcp mem=256M
I have also partitioned my hardware among both cores and supplied appropriate "protected-sources" in mpic node of both DTS files. The problem is, I receive following warning continuously only on Core 0 console, but Core 1 is running smooth. In following warnings source irqs are mostly which I have assigned to Core 1, but they are present in Core 0 mpic node "protected-sources" list, then why I am getting these messages.
[ 6.219204] __ratelimit: 5796 callbacks suppressed
[ 6.223996] OpenPIC : Got protected source 30 !
[ 7.005809] OpenPIC : Got protected source 30 !
[ 8.005906] OpenPIC : Got protected source 30 !
[ 8.433053] OpenPIC : Got protected source 29 !
[ 8.437942] OpenPIC : Got protected source 30 !
[ 8.443101] OpenPIC : Got protected source 30 !
[ 8.448428] OpenPIC : Got protected source 30 !
Any thoughts ?
Best Regards
Farrukh Arshad
Sr. Software Development Engineer
Mentor Graphics Pakistan
Ph: +92 - 423 - 609 - 92 - 09
Cell: +92 - 303 - 444 - 77 - 05
[-- Attachment #2: Type: text/html, Size: 8677 bytes --]
^ permalink raw reply
* Re: [PATCH v2] of: Change logic to overwrite cmd_line with CONFIG_CMDLINE
From: Benjamin Herrenschmidt @ 2012-01-10 9:10 UTC (permalink / raw)
To: Doug Anderson; +Cc: devicetree-discuss, linuxppc-dev
In-Reply-To: <CAD=FV=UVo-vCe-s9tdXq_Od3jJnJ58Nx=4f-S3XfWBfDhxoXMg@mail.gmail.com>
On Fri, 2012-01-06 at 16:48 -0800, Doug Anderson wrote:
> I know this is a long-dead thread, but I was a little curious about
> the motivation here.
Hi ! Sorry, I planned to reply earlier and then forgot about it...
> I'm looking at trying to support CONFIG_CMDLINE_EXTEND (an ARM
> Kconfig) in this function and don't know in which cases I should look
> at the CONFIG_CMDLINE and in which cases I should use whatever
> happened to be in data before the function was called.
I'll have a look later (gotta run soon) but basically, the reason I did
that logic change is that in some specific circumstances and firmware
version, I end up writing the user-specified command line in the global
prior to actually booting the kernel :-)
So in that case, I really don't want CONFIG_CMDLINE to take over because
there's nothing in the device-tree, the user -did- specify something but
not via the device-tree.
Now, that's a bit of an oddball scenario but I felt that the logic
change was harmless.
For those interested in gory details, it's when doing the OPAL takeover
on some machines with the version 1 of OPAL firmware. We basically boot
under pHyp normally (pSeries hypervisor) and do a magic hcall which
relocates the kernel to contiguous physical memory and re-starts it with
a flat device-tree.
The takeover mechanism didn't provide me with a way for passing a
command line in that fdt. So I had to do it from prom_init (still
running under pHyp context), change the kernel global before it gets
relocated.
Cheers,
Ben.
> Here's the definition in the KConfig:
> <http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=blob;f=arch/arm/Kconfig;h=24626b0419ee97e963e68329a8eb6769360b46ea;hb=HEAD#l1984>
>
> Which case do you have CONFIG_CMDLINE defined but not CMDLINE_FORCE?
> In those cases, do you happen to have CONFIG_CMDLINE_EXTEND or
> CMDLINE_FROM_BOOTLOADER defined?
>
> Thanks much!
>
> -Doug
>
> ---
>
> On Mon, Sep 19, 2011 at 9:55 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> >
> > On Tue, Sep 20, 2011 at 02:50:15PM +1000, Benjamin Herrenschmidt wrote:
> > > We used to overwrite with CONFIG_CMDLINE if we found a chosen
> > > node but failed to get bootargs out of it or they were empty,
> > > unless CONFIG_CMDLINE_FORCE is set.
> > >
> > > Instead change that to overwrite if "data" is non empty after
> > > the bootargs check. It allows arch code to have other mechanisms
> > > to retrieve the command line prior to parsing the device-tree.
> > >
> > > Note: CONFIG_CMDLINE_FORCE case should ideally be handled elsewhere
> > > as it won't work as it-is if the device-tree has no /chosen node
> > >
> > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > > CC: devicetree-discuss@lists-ozlabs.org
> > > CC: Grant Likely <grant.likely@secretlab.ca>
> >
> > Looks okay to me.
> >
> > Acked-by: Grant Likely <grant.likely@secretlab.ca>
> >
> > > ---
> > > drivers/of/fdt.c | 7 ++++++-
> > > 1 files changed, 6 insertions(+), 1 deletions(-)
> > >
> > > v2. Use "data" instead of "cmd_line" so it works on archs like
> > > mips who don't pass cmd_line to that function to start with, also
> > > add a comment explaining the mechanism.
> > >
> > > (resent with right list address as well while at it)
> > >
> > > diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
> > > index 65200af..323b722 100644
> > > --- a/drivers/of/fdt.c
> > > +++ b/drivers/of/fdt.c
> > > @@ -681,9 +681,14 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
> > > if (p != NULL && l > 0)
> > > strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE));
> > >
> > > + /*
> > > + * CONFIG_CMDLINE is meant to be a default in case nothing else
> > > + * managed to set the command line, unless CONFIG_CMDLINE_FORCE
> > > + * is set in which case we override whatever was found earlier.
> > > + */
> > > #ifdef CONFIG_CMDLINE
> > > #ifndef CONFIG_CMDLINE_FORCE
> > > - if (p == NULL || l == 0 || (l == 1 && (*p) == 0))
> > > + if (!data[0])
> > > #endif
> > > strlcpy(data, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
> > > #endif /* CONFIG_CMDLINE */
> > > --
> > > 1.7.4.1
> > >
> > >
> > >
> > >
> > _______________________________________________
> > devicetree-discuss mailing list
> > devicetree-discuss@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply
* Re: [PATCH v2 0/3] ppc32/kprobe: Fix a bug for kprobe stwu r1
From: tiejun.chen @ 2012-01-10 9:15 UTC (permalink / raw)
To: Tiejun Chen; +Cc: linuxppc-dev
In-Reply-To: <1323946810-4868-1-git-send-email-tiejun.chen@windriver.com>
Tiejun Chen wrote:
> Changes from V1:
>
> * use memcpy simply to withdraw copy_exc_stack
> * add !(regs->msr & MSR_PR)) and
> WARN_ON(test_thread_flag(TIF_EMULATE_STACK_STORE));
> to make sure we're in goot path.
> * move this migration process inside 'restore'
> * clear TIF flag atomically
Ben,
Is this series OK?
Thanks
Tiejun
>
> Tiejun Chen (3):
> powerpc/kprobe: introduce a new thread flag
> ppc32/kprobe: complete kprobe and migrate exception frame
> ppc32/kprobe: don't emulate store when kprobe stwu r1
>
> arch/powerpc/include/asm/thread_info.h | 3 ++
> arch/powerpc/kernel/entry_32.S | 35 ++++++++++++++++++++++++++++++++
> arch/powerpc/lib/sstep.c | 25 +++++++++++++++++++++-
> 3 files changed, 61 insertions(+), 2 deletions(-)
>
> Tiejun
^ permalink raw reply
* Mac address in the DT
From: smitha.vanga @ 2012-01-10 9:37 UTC (permalink / raw)
To: wd; +Cc: scottwood, linuxppc-dev
In-Reply-To: <20120109224027.A8B591167AA4@gemini.denx.de>
Hi,
The fdt_fixup_ethernet() is not supported in the older version of u-boot. So=
how to go about it in u-boot 1.3.0 version.
Regards,
Smitha
Please do not print this email unless it is absolutely necessary. =0A=
=0A=
The information contained in this electronic message and any attachments to=
this message are intended for the exclusive use of the addressee(s) and may=
contain proprietary, confidential or privileged information. If you are not=
the intended recipient, you should not disseminate, distribute or copy this=
e-mail. Please notify the sender immediately and destroy all copies of this=
message and any attachments. =0A=
=0A=
WARNING: Computer viruses can be transmitted via email. The recipient should=
check this email and any attachments for the presence of viruses. The compa=
ny accepts no liability for any damage caused by any virus transmitted by th=
is email. =0A=
=0A=
www.wipro.com
^ permalink raw reply
* Re: Mac address in the DT
From: Joakim Tjernlund @ 2012-01-10 9:47 UTC (permalink / raw)
To: smitha.vanga; +Cc: scottwood, linuxppc-dev, wd
In-Reply-To: <40631E9A2581F14BA60888C87A76A1FE01D3F2@HYD-MKD-MBX4.wipro.com>
<smitha.vanga@wipro.com> wrote on 2012/01/10 10:37:14:
>
>
> Hi,
>
> The fdt_fixup_ethernet() is not supported in the older version of u-boot. So how to go about it in u-boot 1.3.0 version.
Upgrade or find out how its done in your older version, I have no idea.
^ permalink raw reply
* [PATCH 2/3] driver/misc: Add Pulse Width Modulator (PWM) driver for freescale
From: Chunhe Lan @ 2012-01-10 10:26 UTC (permalink / raw)
To: linuxppc-dev; +Cc: kumar.gala, Chunhe Lan
In-Reply-To: <1326191203-11207-1-git-send-email-Chunhe.Lan@freescale.com>
The PSC913x PWM with the following features:
* 12-bit prescaler for division of clock
* Active-high or active-low configured output
* Interrupts at compare and roll-over
* Programmable pulse width (duty cycle) and interval (period cycle)
A sysfs interface is provided to control the PWM output:
* Set duty cycle and period cycle
echo 1000 > /sys/devices/soc.0/e500.2/ff713000.pwm/duty_ns
echo 5000 > /sys/devices/soc.0/e500.2/ff713000.pwm/period_ns
* Show duty cycle and period cycle
cat /sys/devices/soc.0/e500.2/ff713000.pwm/duty_ns
cat /sys/devices/soc.0/e500.2/ff713000.pwm/period_ns
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
---
arch/powerpc/include/asm/fsl_pwm.h | 111 +++++++++
drivers/misc/Kconfig | 11 +
drivers/misc/Makefile | 1 +
drivers/misc/fsl_pwm.c | 471 ++++++++++++++++++++++++++++++++++++
4 files changed, 594 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/fsl_pwm.h
create mode 100644 drivers/misc/fsl_pwm.c
diff --git a/arch/powerpc/include/asm/fsl_pwm.h b/arch/powerpc/include/asm/fsl_pwm.h
new file mode 100644
index 0000000..a6d3bf5
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_pwm.h
@@ -0,0 +1,111 @@
+/*
+ * Freescale PWM Register Definitions
+ *
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ARCH_FSL_PWM_H
+#define __ARCH_FSL_PWM_H
+
+#define FSL_PWMCR_STOPEN (1 << 25)
+#define FSL_PWMCR_DOZEEN (1 << 24)
+#define FSL_PWMCR_WAITEN (1 << 23)
+#define FSL_PWMCR_DEBUGEN (1 << 22)
+#define FSL_PWMCR_BCTR (1 << 21)
+#define FSL_PWMCR_HCTR (1 << 20)
+#define FSL_PWMCR_POUTC_HIGHT (0 << 18)
+#define FSL_PWMCR_POUTC_LOW (1 << 18)
+#define FSL_PWMCR_CLKSRC (1 << 16)
+#define FSL_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
+#define FSL_MAX_PRESCALER 0x00000FFF
+#define FSL_PWMCR_SWR (1 << 3)
+#define FSL_PWMCR_REPEAT_ONE (0 << 1)
+#define FSL_PWMCR_REPEAT_TWO (1 << 1)
+#define FSL_PWMCR_REPEAT_FOUR (2 << 1)
+#define FSL_PWMCR_REPEAT_EIGHT (3 << 1)
+#define FSL_PWMCR_EN (1 << 0)
+
+#define FSL_PWMSR_ALL_MASK 0x0000007F
+#define FSL_PWMSR_FWE_CMP_ROV_MASK 0x00000070
+#define FSL_PWMSR_FWE (1 << 6)
+#define FSL_PWMSR_CMP (1 << 5)
+#define FSL_PWMSR_ROV (1 << 4)
+#define FSL_PWMSR_FE (1 << 3)
+#define FSL_PWMSR_FIFOAV (7 << 0)
+
+#define FSL_PWMIR (7 << 0)
+#define FSL_PWMIR_CIE (1 << 2)
+#define FSL_PWMIR_RIE (1 << 1)
+#define FSL_PWMIR_FIE (1 << 0)
+
+#define FSL_PMUXCR1_SPI1_ANT_TCXO_PWM_GPIO (3 << 0)
+#define FSL_PMUXCR1_ANT_TCXO_PWM_GPIO (1 << 0)
+#define FSL_PMUXCR2_UART_PWM_GPIO (3 << 28)
+#define FSL_PMUXCR2_PWM_GPIO (1 << 28)
+
+#define FSL_DEVDISR2_PWM1 (1 << 23)
+#define FSL_DEVDISR2_PWM1_EN (0 << 23)
+#define FSL_DEVDISR2_PWM2 (1 << 22)
+#define FSL_DEVDISR2_PWM2_EN (0 << 22)
+
+#define FSL_DEFAULT_IPG_CLK 500000000 /* 500MHz */
+
+struct pwm_reg {
+ u32 pwmcr; /* PWM Control Register */
+ u32 pwmsr; /* PWM Status Register */
+ u32 pwmir; /* PWM Interrupt Register */
+ u32 pwmsar; /* PWM Sample Register */
+ u32 pwmpr; /* PWM Period Register */
+ u32 pwmcnr; /* PWM Counter Register */
+};
+
+struct pwm_device {
+ struct list_head node;
+ struct device dev;
+
+ const char *label;
+ struct clk *clk;
+ int clk_enabled;
+ struct pwm_reg __iomem *regs;
+ int irq;
+
+ unsigned int use_count;
+ unsigned int pwm_id;
+ int duty;
+ int period;
+ int pwmo_invert;
+ void (*enable_pwm_pad)(void);
+ void (*disable_pwm_pad)(void);
+};
+
+struct gubr {
+ u32 res24[0x18];
+ u32 pmuxcr1;
+ u32 pmuxcr2;
+ u32 res3[0x03];
+ u32 devdisr2;
+};
+
+extern int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns);
+extern int pwm_enable(struct pwm_device *pwm);
+extern void pwm_disable(struct pwm_device *pwm);
+extern struct pwm_device *pwm_request(int pwm_id, const char *label);
+extern void pwm_free(struct pwm_device *pwm);
+
+#endif /* __ARCH_FSL_PWM_H */
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 5664696..fbb72df 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -509,4 +509,15 @@ source "drivers/misc/lis3lv02d/Kconfig"
source "drivers/misc/carma/Kconfig"
source "drivers/misc/altera-stapl/Kconfig"
+ config FSL_PWM
+ bool "Freescale PWM support"
+ select PPC_CLOCK
+ default n
+ help
+ This option enables device driver support for the PWM channels
+ on certain Freescale processors(e.g. PSC9131RDB). Pulse Width
+ Modulation is used for purposes including software controlled
+ power-efficient backlights on LCD displays, motor control, and
+ waveform generation and so on.
+
endif # MISC_DEVICES
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b26495a..b3e0dd4 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o
obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o
obj-$(CONFIG_INTEL_MID_PTI) += pti.o
obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
+obj-$(CONFIG_FSL_PWM) += fsl_pwm.o
obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
obj-$(CONFIG_BMP085) += bmp085.o
diff --git a/drivers/misc/fsl_pwm.c b/drivers/misc/fsl_pwm.c
new file mode 100644
index 0000000..cfe2002
--- /dev/null
+++ b/drivers/misc/fsl_pwm.c
@@ -0,0 +1,471 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * PWM (Pulse Width Modulator) controller driver
+ *
+ * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/pwm.h>
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/fsl_pwm.h>
+#include <asm/clock.h>
+#include <asm/prom.h>
+
+static DEFINE_MUTEX(pwm_lock);
+static LIST_HEAD(pwm_list);
+
+static ssize_t show_duty_ns(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct pwm_device *pwm = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%u\n", pwm->duty);
+}
+
+static ssize_t show_period_ns(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct pwm_device *pwm = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%u\n", pwm->period);
+}
+
+static ssize_t store_duty_ns(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct pwm_device *pwm = dev_get_drvdata(dev);
+ unsigned long val;
+
+ if (kstrtoul(buf, 10, &val))
+ return -EINVAL;
+
+ mutex_lock(&pwm_lock);
+
+ pwm->duty = (int)val;
+ if ((pwm->duty < pwm->period) || (pwm->duty == pwm->period)) {
+ pwm_disable(pwm);
+ pwm_config(pwm, pwm->duty, pwm->period);
+ pwm_enable(pwm);
+ }
+
+ mutex_unlock(&pwm_lock);
+
+ return count;
+}
+
+static ssize_t store_period_ns(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct pwm_device *pwm = dev_get_drvdata(dev);
+ unsigned long val;
+
+ if (kstrtoul(buf, 10, &val))
+ return -EINVAL;
+
+ mutex_lock(&pwm_lock);
+
+ pwm->period = (int)val;
+ if ((pwm->duty < pwm->period) || (pwm->duty == pwm->period)) {
+ pwm_disable(pwm);
+ pwm_config(pwm, pwm->duty, pwm->period);
+ pwm_enable(pwm);
+ }
+
+ mutex_unlock(&pwm_lock);
+
+ return count;
+}
+
+static DEVICE_ATTR(duty_ns, S_IRUGO | S_IWUSR,
+ show_duty_ns, store_duty_ns);
+static DEVICE_ATTR(period_ns, S_IRUGO | S_IWUSR,
+ show_period_ns, store_period_ns);
+
+static struct attribute *pwm_attrs[] = {
+ &dev_attr_duty_ns.attr,
+ &dev_attr_period_ns.attr,
+ NULL
+};
+
+static const struct attribute_group pwm_group = {
+ .attrs = pwm_attrs,
+};
+
+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
+{
+ unsigned long long c;
+ unsigned long period_cycles, duty_cycles, prescale;
+ u32 cr;
+
+ if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
+ return -EINVAL;
+
+ if (pwm->pwmo_invert)
+ duty_ns = period_ns - duty_ns;
+
+ c = clk_get_rate(pwm->clk);
+ c = c * period_ns;
+ do_div(c, 1000000000);
+ period_cycles = c;
+
+ prescale = period_cycles / 0x10000 + 1;
+ if (prescale > FSL_MAX_PRESCALER)
+ return -EINVAL;
+
+ period_cycles /= prescale;
+ c = (unsigned long long)period_cycles * duty_ns;
+ do_div(c, period_ns);
+ duty_cycles = c;
+
+ out_be32(&pwm->regs->pwmsar, duty_cycles);
+ out_be32(&pwm->regs->pwmpr, period_cycles);
+
+ cr = FSL_PWMCR_POUTC_HIGHT | FSL_PWMCR_CLKSRC | FSL_PWMCR_DOZEEN |
+ FSL_PWMCR_WAITEN | FSL_PWMCR_DEBUGEN | FSL_PWMCR_STOPEN;
+ cr |= FSL_PWMCR_PRESCALER(prescale);
+ out_be32(&pwm->regs->pwmcr, cr);
+
+ return 0;
+}
+EXPORT_SYMBOL(pwm_config);
+
+int pwm_enable(struct pwm_device *pwm)
+{
+ unsigned int reg;
+ int rc = 0;
+
+ if (!pwm->clk_enabled) {
+ rc = clk_enable(pwm->clk);
+ if (!rc)
+ pwm->clk_enabled = 1;
+ }
+
+ reg = in_be32(&pwm->regs->pwmcr);
+ reg |= FSL_PWMCR_EN;
+ out_be32(&pwm->regs->pwmcr, reg);
+
+ if (pwm->enable_pwm_pad)
+ pwm->enable_pwm_pad();
+
+ return rc;
+}
+EXPORT_SYMBOL(pwm_enable);
+
+void pwm_disable(struct pwm_device *pwm)
+{
+ unsigned int reg;
+
+ if (pwm->disable_pwm_pad)
+ pwm->disable_pwm_pad();
+
+ reg = in_be32(&pwm->regs->pwmcr);
+ reg &= ~FSL_PWMCR_EN;
+ out_be32(&pwm->regs->pwmcr, reg);
+
+ if (pwm->clk_enabled) {
+ clk_disable(pwm->clk);
+ pwm->clk_enabled = 0;
+ }
+}
+EXPORT_SYMBOL(pwm_disable);
+
+struct pwm_device *pwm_request(int pwm_id, const char *label)
+{
+ struct pwm_device *pwm;
+ int found = 0;
+
+ mutex_lock(&pwm_lock);
+
+ list_for_each_entry(pwm, &pwm_list, node) {
+ if (pwm->pwm_id == pwm_id) {
+ found = 1;
+ break;
+ }
+ }
+
+ if (found) {
+ if (pwm->use_count == 0) {
+ pwm->use_count++;
+ pwm->label = label;
+ } else
+ pwm = ERR_PTR(-EBUSY);
+ } else
+ pwm = ERR_PTR(-ENOENT);
+
+ mutex_unlock(&pwm_lock);
+ return pwm;
+}
+EXPORT_SYMBOL(pwm_request);
+
+void pwm_free(struct pwm_device *pwm)
+{
+ mutex_lock(&pwm_lock);
+
+ if (pwm->use_count) {
+ pwm->use_count--;
+ pwm->label = NULL;
+ } else
+ pr_warning("PWM device already freed\n");
+
+ mutex_unlock(&pwm_lock);
+}
+EXPORT_SYMBOL(pwm_free);
+
+static irqreturn_t fsl_pwm_irq(int irq, void *context_data)
+{
+ struct pwm_device *fsl_pwm = context_data;
+ u32 status;
+
+ /* Get interrupt events */
+ status = in_be32(&fsl_pwm->regs->pwmsr);
+
+ if (status) {
+ if (status & FSL_PWMSR_FWE)
+ dev_err(&fsl_pwm->dev, "FIFO write error occurred: "
+ "PWMSR 0x%08X\n", status);
+ if (status & FSL_PWMSR_CMP)
+ dev_err(&fsl_pwm->dev, "Compare event occurred: "
+ "PWMSR 0x%08X\n", status);
+ if (status & FSL_PWMSR_ROV)
+ dev_err(&fsl_pwm->dev, "Roll-over event occurred: "
+ "PWMSR 0x%08X\n", status);
+
+ if (status & ~FSL_PWMSR_ALL_MASK)
+ dev_err(&fsl_pwm->dev, "Unknown error: "
+ "PWMSR 0x%08X\n", status);
+
+ /* Clear the events */
+ out_be32(&fsl_pwm->regs->pwmsr, status &
+ FSL_PWMSR_FWE_CMP_ROV_MASK);
+ return IRQ_HANDLED;
+ }
+
+ return IRQ_NONE;
+}
+
+static int __devinit fsl_pwm_probe(struct platform_device *dev)
+{
+ struct device_node *np;
+ struct gubr __iomem *gubr;
+ struct pwm_device *fsl_pwm;
+ struct resource res_mem;
+ struct resource res_irq;
+ struct resource *res = &res_mem;
+ struct resource *irq = &res_irq;
+ const u32 *id;
+ int ret = 0;
+ unsigned long rate;
+
+ fsl_pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
+ if (fsl_pwm == NULL) {
+ dev_err(&dev->dev, "failed to allocate memory\n");
+ return -ENOMEM;
+ }
+
+ ret = of_address_to_resource(dev->dev.of_node, 0, res);
+ if (ret) {
+ dev_err(&dev->dev, "invalid address\n");
+ goto err_free;
+ }
+
+ if (!request_mem_region(res->start,
+ res->end - res->start + 1, "fsl-pwm")) {
+ dev_err(&dev->dev, "memory request failure\n");
+ ret = -ENXIO;
+ goto err_free;
+ }
+
+ /* IOMAP the entire PWM region */
+ fsl_pwm->regs = ioremap(res->start, res->end - res->start + 1);
+ if (fsl_pwm->regs == NULL) {
+ dev_err(&dev->dev, "failed to ioremap memory region\n");
+ ret = -ENOMEM;
+ goto err_release;
+ }
+
+ fsl_pwm->clk = clk_get(&dev->dev, "pwm-clk");
+ if (IS_ERR(fsl_pwm->clk)) {
+ dev_err(&dev->dev, "failed to get clock\n");
+ ret = PTR_ERR(fsl_pwm->clk);
+ goto err_unmap;
+ }
+
+ rate = fsl_get_sys_freq();
+ if (rate)
+ fsl_pwm->clk->rate_hz = rate;
+ else
+ fsl_pwm->clk->rate_hz = FSL_DEFAULT_IPG_CLK;
+
+ /* Find the id of the pwm */
+ id = of_get_property(dev->dev.of_node, "cell-index", NULL);
+ if (!id) {
+ dev_err(&dev->dev, "failed to get cell-index\n");
+ goto err_unmap;
+ }
+
+ fsl_pwm->pwm_id = *id;
+ fsl_pwm->clk_enabled = 0;
+ fsl_pwm->use_count = 0;
+ fsl_pwm->duty = 0;
+ fsl_pwm->period = 0;
+ fsl_pwm->dev = dev->dev;
+
+ np = of_find_node_by_name(NULL, "global-utilities");
+ if (np) {
+ gubr = of_iomap(np, 0);
+
+ if (fsl_pwm->pwm_id) {
+ clrsetbits_be32(&gubr->pmuxcr2,
+ FSL_PMUXCR2_UART_PWM_GPIO,
+ FSL_PMUXCR2_PWM_GPIO);
+ clrsetbits_be32(&gubr->devdisr2, FSL_DEVDISR2_PWM2,
+ FSL_DEVDISR2_PWM2_EN);
+ } else {
+ clrsetbits_be32(&gubr->pmuxcr1,
+ FSL_PMUXCR1_SPI1_ANT_TCXO_PWM_GPIO,
+ FSL_PMUXCR1_ANT_TCXO_PWM_GPIO);
+ clrsetbits_be32(&gubr->devdisr2, FSL_DEVDISR2_PWM1,
+ FSL_DEVDISR2_PWM1_EN);
+ }
+
+ of_node_put(np);
+ } else {
+ printk(KERN_EMERG "Error: Global Utilities Block Register "
+ "node is not found!\n");
+ goto err_unmap;
+ }
+
+ ret = of_irq_to_resource(dev->dev.of_node, 0, irq);
+ if (ret == NO_IRQ) {
+ dev_warn(&dev->dev, "no IRQ found\n");
+ goto err_unmap;
+ }
+
+ fsl_pwm->irq = irq->start;
+ if (fsl_pwm->irq < 0) {
+ ret = -ENXIO;
+ goto err_unmap;
+ }
+
+ /* Register for PWM Interrupt */
+ ret = request_irq(fsl_pwm->irq, fsl_pwm_irq, 0, "fsl-pwm", fsl_pwm);
+ if (ret != 0)
+ goto err_unmap;
+ else
+ dev_info(&dev->dev,
+ "Freescale PWM Controller driver at 0x%p (irq = %d)\n",
+ fsl_pwm->regs, fsl_pwm->irq);
+
+ /* Register sysfs hooks */
+ ret = sysfs_create_group(&dev->dev.kobj, &pwm_group);
+ if (ret != 0)
+ goto err_unmap;
+
+ dev_set_drvdata(&dev->dev, fsl_pwm);
+
+ mutex_lock(&pwm_lock);
+ list_add_tail(&fsl_pwm->node, &pwm_list);
+ mutex_unlock(&pwm_lock);
+
+ return 0;
+
+err_unmap:
+ iounmap(fsl_pwm->regs);
+err_release:
+ release_mem_region(res->start, res->end - res->start + 1);
+err_free:
+ kfree(fsl_pwm);
+ return ret;
+}
+
+static int __devexit fsl_pwm_remove(struct platform_device *dev)
+{
+ struct pwm_device *fsl_pwm;
+
+ fsl_pwm = dev_get_drvdata(&dev->dev);
+ if (fsl_pwm == NULL)
+ return -ENODEV;
+
+ mutex_lock(&pwm_lock);
+ list_del(&fsl_pwm->node);
+ mutex_unlock(&pwm_lock);
+
+ if (fsl_pwm->regs)
+ iounmap(fsl_pwm->regs);
+
+ dev_set_drvdata(&dev->dev, NULL);
+ clk_put(fsl_pwm->clk);
+ sysfs_remove_group(&dev->dev.kobj, &pwm_group);
+ kfree(fsl_pwm);
+
+ return 0;
+}
+
+static const struct of_device_id fsl_pwm_match[] = {
+ {
+ .compatible = "fsl,psc9131-pwm",
+ },
+ {},
+};
+
+static struct platform_driver fsl_pwm_driver = {
+ .driver = {
+ .name = "fsl-pwm",
+ .of_match_table = fsl_pwm_match,
+ },
+ .probe = fsl_pwm_probe,
+ .remove = fsl_pwm_remove,
+};
+
+static int __init fsl_pwm_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(&fsl_pwm_driver);
+ if (ret)
+ printk(KERN_ERR "fsl-pwm: Failed to register platform "
+ "driver\n");
+
+ return ret;
+}
+
+static void __exit fsl_pwm_exit(void)
+{
+ platform_driver_unregister(&fsl_pwm_driver);
+}
+
+module_init(fsl_pwm_init);
+module_exit(fsl_pwm_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Chunhe Lan <Chunhe.Lan@freescale.com>");
+MODULE_DESCRIPTION("Freescale PWM Controller driver");
--
1.5.6.5
^ permalink raw reply related
* [PATCH 1/3] powerpc/85xx: Add clock driver for PWM
From: Chunhe Lan @ 2012-01-10 10:26 UTC (permalink / raw)
To: linuxppc-dev; +Cc: kumar.gala, Chunhe Lan
Plugs into the generic powerpc clock driver in
arch/powerpc/kernel/clock.c
The following subset of clk_interface is implemented:
clk_get: get clock via name
clk_put: stubbed
clk_enable: enable clock
clk_disable: disable clock
clk_get_rate: get clock rate in Hz
clk_set_rate: NULL
clk_round_rate: NULL
clk_set_parent: NULL
clk_get_parent: NULL
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
---
arch/powerpc/include/asm/clock.h | 33 +++++++
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/pwm-clock.c | 161 +++++++++++++++++++++++++++++++
3 files changed, 195 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/clock.h
create mode 100644 arch/powerpc/platforms/85xx/pwm-clock.c
diff --git a/arch/powerpc/include/asm/clock.h b/arch/powerpc/include/asm/clock.h
new file mode 100644
index 0000000..98447eb
--- /dev/null
+++ b/arch/powerpc/include/asm/clock.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+struct clk {
+ struct list_head node;
+ const char *name; /* unique clock name */
+ const char *function; /* function of the clock */
+ struct device *dev; /* device associated with function */
+ unsigned int id:2; /* clock identification */
+ unsigned long rate_hz;
+ struct clk *parent;
+ void (*mode)(struct clk *clk, int status);
+ u16 users;
+};
+
+extern int clk_register(struct clk *clk);
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index bc5acb9..ba0d0a9 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o
obj-$(CONFIG_P3060_QDS) += p3060_qds.o corenet_ds.o
obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o
obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o
+obj-$(CONFIG_FSL_PWM) += pwm-clock.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
obj-$(CONFIG_SBC8560) += sbc8560.o
diff --git a/arch/powerpc/platforms/85xx/pwm-clock.c b/arch/powerpc/platforms/85xx/pwm-clock.c
new file mode 100644
index 0000000..bba9872
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/pwm-clock.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * Implements the clk api defined in include/linux/clk.h
+ *
+ * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/export.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/of_platform.h>
+#include <asm/clk_interface.h>
+#include <asm/clock.h>
+
+static LIST_HEAD(clocks);
+static DEFINE_SPINLOCK(clk_lock);
+
+static struct clk pwm_clk = {
+ .name = "pwm-clk",
+ .rate_hz = 0,
+ .users = 1, /* always on */
+ .id = 0,
+};
+
+static struct clk *all_clocks[] __initdata = {
+ &pwm_clk,
+};
+
+/* clocks cannot be de-registered no refcounting necessary */
+static struct clk *fsl_clk_get(struct device *dev, const char *id)
+{
+ struct clk *clk;
+
+ list_for_each_entry(clk, &clocks, node) {
+ if (strcmp(id, clk->name) == 0)
+ return clk;
+ }
+
+ return ERR_PTR(-ENOENT);
+}
+
+static void fsl_clk_put(struct clk *clk)
+{
+}
+
+static void __clk_enable(struct clk *clk)
+{
+ if (clk->parent)
+ __clk_enable(clk->parent);
+ if (clk->users++ == 0 && clk->mode)
+ clk->mode(clk, 1);
+}
+
+static int fsl_clk_enable(struct clk *clk)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&clk_lock, flags);
+ __clk_enable(clk);
+ spin_unlock_irqrestore(&clk_lock, flags);
+
+ return 0;
+}
+
+static void __clk_disable(struct clk *clk)
+{
+ BUG_ON(clk->users == 0);
+
+ if (--clk->users == 0 && clk->mode)
+ clk->mode(clk, 0);
+ if (clk->parent)
+ __clk_disable(clk->parent);
+}
+
+static void fsl_clk_disable(struct clk *clk)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&clk_lock, flags);
+ __clk_disable(clk);
+ spin_unlock_irqrestore(&clk_lock, flags);
+}
+
+static unsigned long fsl_clk_get_rate(struct clk *clk)
+{
+ unsigned long flags;
+ unsigned long rate;
+
+ spin_lock_irqsave(&clk_lock, flags);
+ for (;;) {
+ rate = clk->rate_hz;
+ if (rate || !clk->parent)
+ break;
+ clk = clk->parent;
+ }
+ spin_unlock_irqrestore(&clk_lock, flags);
+
+ return rate;
+}
+
+static struct clk_interface fsl_clk_functions = {
+ .clk_get = fsl_clk_get,
+ .clk_put = fsl_clk_put,
+ .clk_enable = fsl_clk_enable,
+ .clk_disable = fsl_clk_disable,
+ .clk_get_rate = fsl_clk_get_rate,
+};
+
+/* Register a new clock */
+int clk_register(struct clk *clk)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&clk_lock, flags);
+ list_add(&clk->node, &clocks);
+ spin_unlock_irqrestore(&clk_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(clk_register);
+
+static int fsl_register_clocks(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(all_clocks); i++)
+ clk_register(all_clocks[i]);
+
+ return 0;
+}
+
+static int __init fsl_clk_init(void)
+{
+ fsl_register_clocks();
+ clk_functions = fsl_clk_functions;
+
+ return 0;
+}
+
+arch_initcall(fsl_clk_init);
--
1.5.6.5
^ permalink raw reply related
* [PATCH 3/3] powerpc/fsl: Document Pulse Width Modulator controller device tree binding
From: Chunhe Lan @ 2012-01-10 10:26 UTC (permalink / raw)
To: linuxppc-dev; +Cc: kumar.gala, Chunhe Lan
In-Reply-To: <1326191203-11207-1-git-send-email-Chunhe.Lan@freescale.com>
This document is created for freescale PWM node in dts file. In addition,
it explicates the properties and gives example about PWM node.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
---
.../devicetree/bindings/powerpc/fsl/pwm.txt | 27 ++++++++++++++++++++
1 files changed, 27 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/pwm.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pwm.txt b/Documentation/devicetree/bindings/powerpc/fsl/pwm.txt
new file mode 100644
index 0000000..92d68e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/pwm.txt
@@ -0,0 +1,27 @@
+=====================================================================
+Freescale Pulse Width Modulator Controller Node
+Copyright (C) 2012 Freescale Semiconductor Inc.
+=====================================================================
+
+Properties:
+
+- name : Should be pwm.
+- compatible : Should contain "fsl,psc9131-pwm".
+- cell-index : The cell index is the pwm controller serial number,
+ <0> = PWM1, <1> = PWM2, and so on.
+- #address-cells : Should be one.
+- #size-cells : Should be zero.
+- reg : Offset and length of the register set for the device.
+- interrupts : <interrupt mapping for PWM IRQ>
+
+Example:
+
+ pwm@13000 {
+ cell-index = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,psc9131-pwm";
+ reg = <0x13000 0x1000>;
+ interrupts = <44 2 0 0>;
+ interrupt-parent = <&mpic>;
+ };
--
1.5.6.5
^ permalink raw reply related
* Re: [PATCH] powerpc/85xx: Add P1024rdb dts support
From: Scott Wood @ 2012-01-10 17:45 UTC (permalink / raw)
To: Tang Yuantian-B29983; +Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <D07C73A334FF604B95B3CBD2A545D07B02444B@039-SN2MPN1-013.039d.mgd.msft.net>
On 01/09/2012 09:45 PM, Tang Yuantian-B29983 wrote:
>
>> On 01/09/2012 02:37 AM, b29983@freescale.com wrote:
>>> +/include/ "p1024rdb.dtsi"
>>> +/include/ "fsl/p1020si-post.dtsi"
>>
>> Is p1024 100% software-compatible with p1020?
>>
>> They have different manuals...
>>
>> -Scott
>
> P1020rdb has vitesse-7385 switch.
I'm talking about the SoC, not the board.
> fsl/p1020si-post.dtsi can be used for both boards.
What are you basing this on? Has someone looked over both manuals in
detail and concluded that every device described is 100% compatible?
-Scott
^ permalink raw reply
* Re: OpenPIC warnings on P1022RDK AMP configuration
From: Scott Wood @ 2012-01-10 21:02 UTC (permalink / raw)
To: Arshad, Farrukh; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <93CD5F41FDBC6042A6B449764F3B35CC050CD17A@EU-MBX-03.mgc.mentorg.com>
On 01/10/2012 02:43 AM, Arshad, Farrukh wrote:
> Change kernel configuration as per following to fix this warning.
>=20
> =20
>=20
> Disable Kernel Options -> Support for enabling/disabling CPUs
>=20
> Disable Kernel Options -> Distribute interrupts on all CPUs by default
>=20
> =20
>=20
> Regards,
>=20
> Farrukh Arshad
>=20
> =20
>=20
> *From:*Arshad, Farrukh
> *Sent:* Friday, December 23, 2011 11:18 AM
> *To:* linuxppc-dev@lists.ozlabs.org
> *Subject:* OpenPIC warnings on P1022RDK AMP configuration
>=20
> =20
>=20
> Greetings All
>=20
> =20
>=20
> I am running dual linux on P1022RDK in AMP configuration. My memory
> partitioning is as below
>=20
> =20
>=20
> ---------------------------------------------------------------------
>=20
> Core | Base Address | Size |
>=20
> --------------------------|---------------|-------------------------|
>=20
> Core 0 (MEL RT Kernel) | 0x0000,0000 | 0x0C00,0000 - 192 (MB) |
>=20
> Core 1 (LTIB Kernel) |0x0C00,0000 | 0x1000,0000 - 256 (MB) |
>=20
> MCAPI - Shared Mem | 0x1C00,0000 | 0x0400,0000 - 64=20
> (MB) | =20
>=20
> ---------------------------------------------------------------------
>=20
> =20
>=20
> My kernel command lines are for both cores
>=20
> =20
>=20
> setenv core0bootargs root=3D/dev/mmcblk0p3 rootdelay=3D5 rw mem=3D192M
>=20
> setenv core1bootargs root=3D/dev/nfs nfsroot=3D<serverip>:/<rootfs> ip=3D=
dhcp
> mem=3D256M
>=20
> =20
>=20
> I have also partitioned my hardware among both cores and supplied
> appropriate =93protected-sources=94 in mpic node of both DTS files. The
> problem is, I receive following warning continuously only on Core 0
> console, but Core 1 is running smooth. In following warnings source irq=
s
> are mostly which I have assigned to Core 1, but they are present in Cor=
e
> 0 mpic node =93protected-sources=94 list, then why I am getting these m=
essages.
>=20
> =20
>=20
> [ 6.219204] __ratelimit: 5796 callbacks suppressed
>=20
> [ 6.223996] OpenPIC : Got protected source 30 !
>=20
> [ 7.005809] OpenPIC : Got protected source 30 !
>=20
> [ 8.005906] OpenPIC : Got protected source 30 !
>=20
> [ 8.433053] OpenPIC : Got protected source 29 !
>=20
> [ 8.437942] OpenPIC : Got protected source 30 !
>=20
> [ 8.443101] OpenPIC : Got protected source 30 !
>=20
> [ 8.448428] OpenPIC : Got protected source 30 !
>=20
> =20
>=20
> Any thoughts ?
Does each dtb have the correct CPU number, both from the command line
boot cpu flag and in the CPU node?
Do both device trees have pic-no-reset in the mpic node?
If neither of those are the issue, start dumping the relevant MPIC
interrupt destination registers, and tracethe code where they're
supposed to be set up. Also make sure that no interrupts are enabled
when Linux receives control from U-Boot.
-Scott
^ permalink raw reply
* Re: Mac address in the DT
From: Wolfgang Denk @ 2012-01-10 21:55 UTC (permalink / raw)
To: smitha.vanga; +Cc: scottwood, linuxppc-dev
In-Reply-To: <40631E9A2581F14BA60888C87A76A1FE01D3F2@HYD-MKD-MBX4.wipro.com>
Dear smitha.vanga@wipro.com,
In message <40631E9A2581F14BA60888C87A76A1FE01D3F2@HYD-MKD-MBX4.wipro.com> you wrote:
>
> The fdt_fixup_ethernet() is not supported in the older version of u-boot. So
> how to go about it in u-boot 1.3.0 version.
U-Boot v1.3.0 is more than 4 years old.
Update, or restrict yourself to using 4 years old Linux kernel
versions as well, like v2.6.23 or so :-(
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Everyting looks interesting until you do it. Then you find it's just
another job. - Terry Pratchett, _Moving Pictures_
^ permalink raw reply
* Re: [RFC PATCH 14/16] KVM: PPC: booke: category E.HV (GS-mode) support
From: Scott Wood @ 2012-01-10 22:03 UTC (permalink / raw)
To: Alexander Graf; +Cc: linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <A1483A2E-FF86-4E25-93CC-9EA1BA4925D4@suse.de>
On 01/09/2012 09:11 PM, Alexander Graf wrote:
> On 10.01.2012, at 01:51, Scott Wood wrote:
>> On 01/09/2012 11:46 AM, Alexander Graf wrote:
>>> On 21.12.2011, at 02:34, Scott Wood wrote:
>>>> + /* For debugging, encode the failing instruction and
>>>> + * report it to userspace. */
>>>> + run->hw.hardware_exit_reason = ~0ULL << 32;
>>>> + run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
>>>
>>>
>>> I'm fairly sure you want to fix this :)
>>
>> Likewise, that's what booke.c already does. What should it do instead?
>
> This is what book3s does:
>
> case EMULATE_FAIL:
> printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
> __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
> kvmppc_core_queue_program(vcpu, flags);
> r = RESUME_GUEST;
>
> which also doesn't throttle the printk, but I think injecting a
> program fault into the guest is the most sensible thing to do if we
> don't know what the instruction is supposed to do. Best case we get
> an oops inside the guest telling us what broke :).
Ah, yes, it should send a program check.
>>> Ah, so that's what you want to use regs for. So is having a pt_regs
>>> struct that only contains useful register values in half its fields
>>> any useful here? Or could we keep control of the registers ourselves,
>>> enabling us to maybe one day optimize things more.
>>
>> I think it contains enough to be useful for debugging code such as sysrq
>> and tracers, and as noted in the comment we could copy the rest if we
>> care enough. MSR might be worth copying.
>>
>> It will eventually be used for machine checks as well, which I'd like to
>> hand reasonable register state to, at least for GPRs, LR, and PC.
>>
>> If there's a good enough performance reason, we could just copy
>> everything over for machine checks and pass NULL to do_IRQ (I think it
>> can take this -- a dummy regs struct if not), but it seems premature at
>> the moment unless the switch already causes measured performance loss
>> (cache utilization?).
>
> I'm definitely not concerned about performance, but complexity and uniqueness.
>
> With the pt_regs struct, we have a bunch of fields in the vcpu that are there, but unused. I find that situation pretty confusing.
I removed the registers from the vcpu, that are to be used in regs instead.
There are a few fields in regs that are not valid, though it is
explicitly pointed out via a comment.
> So yes, I would definitely prefer to copy registers during MC and keep the registers where they are today - unless there are SPRs for them of course.
>
> Imagine we'd one day want to share GPRs with user space through the
> kvm_run structure (see the s390 patches on the ML for this). I really
> wouldn't want to make pt_regs part of our userspace ABI.
Neither would I. If that's something that's reasonably likely to
happen, I guess that's a good enough reason to avoid this. We could
always add later a debug option to copy regs even on normal interrupts,
if needed.
>> We probably should defer the check until after we've disabled
>> interrupts, similar to signals -- even if we didn't exit for an
>> interrupt, we could have received one after enabling them.
>
> Yup. I just don't think you can call resched() with interrupts disabled, so a bit cleverness is probably required here.
I think it is actually allowed, but interrupts will be enabled on
return. We'll need to repeat prepare_to_enter if we do schedule. Since
we already need special handling for that, we might as well add a
local_irq_enable() once we know we are going to schedule, just in case.
>>>> diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
>>>> index 05d1d99..d53bcf2 100644
>>>> --- a/arch/powerpc/kvm/booke.h
>>>> +++ b/arch/powerpc/kvm/booke.h
>>>> @@ -48,7 +48,20 @@
>>>> #define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19
>>>> /* Internal pseudo-irqprio for level triggered externals */
>>>> #define BOOKE_IRQPRIO_EXTERNAL_LEVEL 20
>>>> -#define BOOKE_IRQPRIO_MAX 20
>>>> +#define BOOKE_IRQPRIO_DBELL 21
>>>> +#define BOOKE_IRQPRIO_DBELL_CRIT 22
>>>> +#define BOOKE_IRQPRIO_MAX 23
>>>
>>> So was MAX wrong before or is it too big now?
>>
>> MAX is just a marker for how many IRQPRIOs we have, not any sort of
>> external limit. This patch adds new IRQPRIOs, so MAX goes up.
>>
>> The actual limit is the number of bits in a long.
>
> Yes, and before the highest value was 20 with MAX being 20, now the
> highest value is 22 with MAX being 23. Either MAX == highest number
> or MAX == highest number + 1, but you're changing the semantics of
> MAX here. Maybe it was wrong before, I don't know, hence I'm asking
> :).
Oh, didn't notice that.
Actually, it looks like the two places that reference BOOKE_IRQPRIO_MAX
don't agree on what they're expecting. book3s uses "one greater than
the highest irqprio", so I guess we should resolve it that way (even
though I'd normally expect that to be phrased "num" rather than "max")
-- as a separate patch, of course.
-Scott
^ permalink raw reply
* Re: [RFC PATCH 16/16] KVM: PPC: e500mc support
From: Scott Wood @ 2012-01-10 22:20 UTC (permalink / raw)
To: Avi Kivity; +Cc: Liu Yu, kvm, agraf, kvm-ppc, Varun Sethi, linuxppc-dev
In-Reply-To: <4F0BF8BB.4080309@redhat.com>
On 01/10/2012 02:37 AM, Avi Kivity wrote:
> On 01/09/2012 09:29 PM, Scott Wood wrote:
>>>
>>> Best to include their signoffs, if possible.
>>
>> These patches are based in part on a bunch of different patches from
>> these people (for which I did receive signoffs). I was reluctant to put
>> their signoff directly on the new patches, since I didn't want to make
>> it look like they had submitted the patch in anything resembling its
>> current form. I wanted to give them credit for what they did, but not
>> blame for what I did with their code.
>>
>
> Signoffs are for assigning neither credit nor blame, but for
> attributing authorship and affirming that a contributor has
> the right to contribute code or pass it along.
That's its formal purpose, but some people draw other conclusions from
it regardless. From Documentation/SubmittingPatches: "Rule (b) allows
you to adjust the code, but then it is very impolite to change one
submitter's code and make him endorse your bugs."
Please read the DCO at
> https://lwn.net/Articles/437739/.
I've read it. My signoff here qualifies based on (a) and (b).
> (a) The contribution was created in whole or in part by me and I
> have the right to submit it under the open source license
> indicated in the file; or
Note "or in part". The contributions in this patch were all produced by
Freescale employees on a work for hire basis (other than the extent to
which the code is derived from code already in the Linux kernel, which
is covered by (b)), and I am authorized to submit this work on
Freescale's behalf for inclusion into the Linux kernel under GPLv2.
I'm not trying to be difficult, just to avoid looking like it was a
patch passed more-or-less as-is from person to person. When I resubmit,
I can put the sign-offs in with [scottwood@freescale.com: significant
rework] after them, or list them separately as part of the "based on..."
paragraph.
-Scott
^ permalink raw reply
* Re: [RFC PATCH 14/16] KVM: PPC: booke: category E.HV (GS-mode) support
From: Alexander Graf @ 2012-01-10 23:06 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <4F0CB5B1.6010601@freescale.com>
On 10.01.2012, at 23:03, Scott Wood wrote:
> On 01/09/2012 09:11 PM, Alexander Graf wrote:
>> On 10.01.2012, at 01:51, Scott Wood wrote:
>>> On 01/09/2012 11:46 AM, Alexander Graf wrote:
>>>> On 21.12.2011, at 02:34, Scott Wood wrote:
>>>>> + /* For debugging, encode the failing instruction and
>>>>> + * report it to userspace. */
>>>>> + run->hw.hardware_exit_reason =3D ~0ULL << 32;
>>>>> + run->hw.hardware_exit_reason |=3D vcpu->arch.last_inst;
>>>>=20
>>>>=20
>>>> I'm fairly sure you want to fix this :)
>>>=20
>>> Likewise, that's what booke.c already does. What should it do =
instead?
>>=20
>> This is what book3s does:
>>=20
>> case EMULATE_FAIL:
>> printk(KERN_CRIT "%s: emulation at %lx failed =
(%08x)\n",
>> __func__, kvmppc_get_pc(vcpu), =
kvmppc_get_last_inst(vcpu));
>> kvmppc_core_queue_program(vcpu, flags);
>> r =3D RESUME_GUEST;
>>=20
>> which also doesn't throttle the printk, but I think injecting a
>> program fault into the guest is the most sensible thing to do if we
>> don't know what the instruction is supposed to do. Best case we get
>> an oops inside the guest telling us what broke :).
>=20
> Ah, yes, it should send a program check.
>=20
>>>> Ah, so that's what you want to use regs for. So is having a pt_regs
>>>> struct that only contains useful register values in half its fields
>>>> any useful here? Or could we keep control of the registers =
ourselves,
>>>> enabling us to maybe one day optimize things more.
>>>=20
>>> I think it contains enough to be useful for debugging code such as =
sysrq
>>> and tracers, and as noted in the comment we could copy the rest if =
we
>>> care enough. MSR might be worth copying.
>>>=20
>>> It will eventually be used for machine checks as well, which I'd =
like to
>>> hand reasonable register state to, at least for GPRs, LR, and PC.
>>>=20
>>> If there's a good enough performance reason, we could just copy
>>> everything over for machine checks and pass NULL to do_IRQ (I think =
it
>>> can take this -- a dummy regs struct if not), but it seems premature =
at
>>> the moment unless the switch already causes measured performance =
loss
>>> (cache utilization?).
>>=20
>> I'm definitely not concerned about performance, but complexity and =
uniqueness.
>>=20
>> With the pt_regs struct, we have a bunch of fields in the vcpu that =
are there, but unused. I find that situation pretty confusing.
>=20
> I removed the registers from the vcpu, that are to be used in regs =
instead.
>=20
> There are a few fields in regs that are not valid, though it is
> explicitly pointed out via a comment.
Yes, and if there was real technical reason to do it this way I'd agree. =
But there isn't.
>=20
>> So yes, I would definitely prefer to copy registers during MC and =
keep the registers where they are today - unless there are SPRs for them =
of course.
>>=20
>> Imagine we'd one day want to share GPRs with user space through the
>> kvm_run structure (see the s390 patches on the ML for this). I really
>> wouldn't want to make pt_regs part of our userspace ABI.
>=20
> Neither would I. If that's something that's reasonably likely to
> happen, I guess that's a good enough reason to avoid this. We could
> always add later a debug option to copy regs even on normal =
interrupts,
> if needed.
Yup. I don't want to walk in the wrong direction basically. The overhead =
of copying
a couple fields to the stack on machine checks doesn't sound too bad =
compared
to the flexibility we maintain by keeping fields under our control.
Another imaginary case. I experimented with putting the GPRs into the =
PACA
back in the day. I don't remember why anymore, but it was for some =
speedup
of something.
That wouldn't be possible if we mandate everyone to use pt_regs.
>=20
>>> We probably should defer the check until after we've disabled
>>> interrupts, similar to signals -- even if we didn't exit for an
>>> interrupt, we could have received one after enabling them.
>>=20
>> Yup. I just don't think you can call resched() with interrupts =
disabled, so a bit cleverness is probably required here.
>=20
> I think it is actually allowed, but interrupts will be enabled on
> return. We'll need to repeat prepare_to_enter if we do schedule. =
Since
> we already need special handling for that, we might as well add a
> local_irq_enable() once we know we are going to schedule, just in =
case.
Yup :). And then check again.
>=20
>>>>> diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
>>>>> index 05d1d99..d53bcf2 100644
>>>>> --- a/arch/powerpc/kvm/booke.h
>>>>> +++ b/arch/powerpc/kvm/booke.h
>>>>> @@ -48,7 +48,20 @@
>>>>> #define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19
>>>>> /* Internal pseudo-irqprio for level triggered externals */
>>>>> #define BOOKE_IRQPRIO_EXTERNAL_LEVEL 20
>>>>> -#define BOOKE_IRQPRIO_MAX 20
>>>>> +#define BOOKE_IRQPRIO_DBELL 21
>>>>> +#define BOOKE_IRQPRIO_DBELL_CRIT 22
>>>>> +#define BOOKE_IRQPRIO_MAX 23
>>>>=20
>>>> So was MAX wrong before or is it too big now?
>>>=20
>>> MAX is just a marker for how many IRQPRIOs we have, not any sort of
>>> external limit. This patch adds new IRQPRIOs, so MAX goes up.
>>>=20
>>> The actual limit is the number of bits in a long.
>>=20
>=20
>> Yes, and before the highest value was 20 with MAX being 20, now the
>> highest value is 22 with MAX being 23. Either MAX =3D=3D highest =
number
>> or MAX =3D=3D highest number + 1, but you're changing the semantics =
of
>> MAX here. Maybe it was wrong before, I don't know, hence I'm asking
>> :).
>=20
> Oh, didn't notice that.
>=20
> Actually, it looks like the two places that reference =
BOOKE_IRQPRIO_MAX
> don't agree on what they're expecting. book3s uses "one greater than
> the highest irqprio", so I guess we should resolve it that way (even
> though I'd normally expect that to be phrased "num" rather than "max")
> -- as a separate patch, of course.
Yup. As long as it's consistent it's fine. I just really stumbled over =
this since the semantics of the define changed.
Alex=
^ permalink raw reply
* Re: [PATCH v2 0/3] ppc32/kprobe: Fix a bug for kprobe stwu r1
From: Benjamin Herrenschmidt @ 2012-01-11 0:53 UTC (permalink / raw)
To: tiejun.chen; +Cc: linuxppc-dev
In-Reply-To: <4F0C01BA.3040302@windriver.com>
On Tue, 2012-01-10 at 17:15 +0800, tiejun.chen wrote:
> Tiejun Chen wrote:
> > Changes from V1:
> >
> > * use memcpy simply to withdraw copy_exc_stack
> > * add !(regs->msr & MSR_PR)) and
> > WARN_ON(test_thread_flag(TIF_EMULATE_STACK_STORE));
> > to make sure we're in goot path.
> > * move this migration process inside 'restore'
> > * clear TIF flag atomically
>
> Ben,
>
> Is this series OK?
Not completely sorry. I was about to send you some comments a couple of
weeks ago then had to leave urgently and forgot about it, then started
rewriting your code and didn't finish :-)
I'll give you some more feedback asap, sorry about that. It's getting
there but there's a couple of things I'd like to see done a bit
differently.
Cheers,
Ben.
> Thanks
> Tiejun
>
> >
> > Tiejun Chen (3):
> > powerpc/kprobe: introduce a new thread flag
> > ppc32/kprobe: complete kprobe and migrate exception frame
> > ppc32/kprobe: don't emulate store when kprobe stwu r1
> >
> > arch/powerpc/include/asm/thread_info.h | 3 ++
> > arch/powerpc/kernel/entry_32.S | 35 ++++++++++++++++++++++++++++++++
> > arch/powerpc/lib/sstep.c | 25 +++++++++++++++++++++-
> > 3 files changed, 61 insertions(+), 2 deletions(-)
> >
> > Tiejun
^ permalink raw reply
* [PATCH] cpuidle: Default y for pseries
From: Benjamin Herrenschmidt @ 2012-01-11 1:05 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev, Shaohua Li, linux-pm, Venkatesh Pallipadi
We just replaced the pseries platform idle loops with a cpuidle backend,
however that means that you won't get any power saving and won't return
any unused idle time to the hypervisor unless cpuidle is enabled.
Thus is should default to y when pseries is enabled. I prefer that to
a select so we can still make it modular if we want to.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Linus, do you want to just pick that up or should I put it into powerpc.git
and ask you to pull ? I will have 2 or 3 other fixes there later today,
but I wanted to make sure you were ok with the approach with this
specific one.
diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig
index 7dbc4a8..62ca70d 100644
--- a/drivers/cpuidle/Kconfig
+++ b/drivers/cpuidle/Kconfig
@@ -1,7 +1,8 @@
config CPU_IDLE
bool "CPU idle PM support"
- default ACPI
+ default y if ACPI
+ default y if PPC_PSERIES
help
CPU idle is a generic framework for supporting software-controlled
idle processor power management. It includes modular cross-platform
^ permalink raw reply related
* RE: [PATCH] powerpc/85xx: Add P1024rdb dts support
From: Tang Yuantian-B29983 @ 2012-01-11 2:41 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <4F0C7928.1020803@freescale.com>
> >
> > P1020rdb has vitesse-7385 switch.
>=20
> I'm talking about the SoC, not the board.
>=20
> > fsl/p1020si-post.dtsi can be used for both boards.
>=20
> What are you basing this on? Has someone looked over both manuals in
> detail and concluded that every device described is 100% compatible?
>=20
I ported this from the dts in kernel 2.6.35.=20
I found they are 100% compatible from dts point of view.
Regards,
Yuantian
^ permalink raw reply
* RE: Mac address in the DT
From: smitha.vanga @ 2012-01-11 6:03 UTC (permalink / raw)
To: wd; +Cc: scottwood, linuxppc-dev
In-Reply-To: <20120110215509.2D08D1167AA4@gemini.denx.de>
Hi,
I am using 2.6.21 linux kernel with this bootloader.
The ethernet driver in the kernel reads the mac address from the .dtb file.
Regards,
Smitha
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^ permalink raw reply
* Re: [PATCH] cpuidle: Default y for pseries
From: Linus Torvalds @ 2012-01-11 6:08 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Shaohua Li, linux-pm, Venkatesh Pallipadi
In-Reply-To: <1326243935.23910.85.camel@pasglop>
On Tue, Jan 10, 2012 at 5:05 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
>
> Linus, do you want to just pick that up or should I put it into powerpc.git
> and ask you to pull ? I will have 2 or 3 other fixes there later today,
> but I wanted to make sure you were ok with the approach with this
> specific one.
It doesn't seem to be all that different from the "default y if ACPI"
case, so I guess it works ok.
That said, I wonder if the right approach wouldn't be
default y if SUPPORT_CPU_IDLE
or something along those lines. And then both ACPI and PPC_PSERIES
could just select that instead. Because I do hate having random
board-level knowledge in something like this. I dunno.
Linus
^ permalink raw reply
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