* Re: tlb flushing on Power
From: Seth Jennings @ 2012-02-10 19:14 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Brian King, Robert Jennings, linuxppc-dev, Nitin Gupta,
Dave Hansen
In-Reply-To: <1328735054.2903.29.camel@pasglop>
On 02/08/2012 03:04 PM, Benjamin Herrenschmidt wrote:
>
>> You can look at https://lkml.org/lkml/2012/1/9/389 in zsmalloc-main.c,
>> zs_[un]map_object() functions for the currently uses of set_pte() and
>> __flush_tlb_one().
>>
>>> set_pte() is long gone on all archs really (or if it's still there it's
>>> not meant to be used as is), use set_pte_at().
>>
>> Problem with set_pte_at() for us is that we don't have an mm_struct to pass
>> because the mapping is not for a userspace process but for the kernel itself.
>
> Then use init_mm
Thanks, that's what I was looking for.
>> However, I do think this is the portable function we need to be using. Just
>> need to figure out what to pass in for the mm_struct param.
>>
>>> __flush_tlb_one() doesn't mean anything as an arch independent
>>> functionality. We have a local_flush_tlb_page() that -might- do what you
>>> want but why in hell is that patch not using proper existing
>>> interfaces ?
>>
>> flush_tlb_page() is the portable function we should be using. However,
>> again, it requires a vma_area_struct. I'm not sure what we should be
>> passing there.
>
> Do you need this to be CPU local flush or global ? In the later,
> flush_tlb_kernel_range() is the right API.
>
> If you want per-cpu, we'll have to add a new arch hook.
We have interrupts disabled, due to the get_cpu_var() on the percpu variable
zs_map_area in zs_map_object(), while the allocation is mapped. So a CPU local
would be what we need.
--
Seth
^ permalink raw reply
* [PATCH 07/22] PCI, powerpc: Register busn_res for root buses
From: Yinghai Lu @ 2012-02-11 4:06 UTC (permalink / raw)
To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
Cc: linux-arch, Greg Kroah-Hartman, linuxppc-dev, linux-kernel,
Dominik Brodowski, Yinghai Lu, linux-pci, Bjorn Helgaas,
Paul Mackerras, Andrew Morton, Linus Torvalds
In-Reply-To: <1328933185-15154-1-git-send-email-yinghai@kernel.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/kernel/pci-common.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index cce98d7..501f29b 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1732,6 +1732,8 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
bus->secondary = hose->first_busno;
hose->bus = bus;
+ pci_bus_insert_busn_res(bus, hose->first_busno, hose->last_busno);
+
/* Get probe mode and perform scan */
mode = PCI_PROBE_NORMAL;
if (node && ppc_md.pci_probe_mode)
@@ -1742,8 +1744,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
of_scan_bus(node, bus);
}
- if (mode == PCI_PROBE_NORMAL)
+ if (mode == PCI_PROBE_NORMAL) {
+ pci_bus_update_busn_res_end(bus, 255);
hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+ pci_bus_update_busn_res_end(bus, bus->subordinate);
+ }
/* Platform gets a chance to do some global fixups before
* we proceed to resource allocation
--
1.7.7
^ permalink raw reply related
* Boot failure with next-20120208
From: Stephen Rothwell @ 2012-02-12 0:38 UTC (permalink / raw)
To: LKML; +Cc: gregkh, linux-next, ppc-dev
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Hi all,
Just a quick note to say I got a boot OOPs with next-20120208 and 9 on a
Power7 blade (my other PowerPC boot tests are ok. I'll investigate this
further on Monday.
The line referenced below is:
BUG_ON(!kobj || !kobj->sd || !attr);
in sysfs_create_file().
calling .topology_init+0x0/0x1ac @ 1
initcall 7_.async_cpu_up+0x0/0x40 returned 0 after 9765 usecs
async_continuing @ 20 after 9765 usec
------------[ cut here ]------------
kernel BUG at fs/sysfs/file.c:573!
Oops: Exception in kernel mode, sig: 5 [#1]
SMP NR_CPUS=32 NUMA pSeries
Modules linked in:
NIP: c00000000024a35c LR: c0000000004ee050 CTR: c00000000083ca24
REGS: c0000003fd9e7560 TRAP: 0700 Not tainted (3.3.0-rc2-autokern1)
MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI> CR: 88002082 XER: 0000000f
CFAR: c00000000024a370
TASK = c0000003fd9e8000[20] 'kworker/u:6' THREAD: c0000003fd9e4000 CPU: 0
GPR00: 0000000000000001 c0000003fd9e77e0 c000000000d19bb8 0000000000000000
GPR04: c000000000bf37a8 0000000000000008 8000000002096400 0000000000000000
GPR08: 0000000000000000 c000000000f80028 c000000000d52bd8 0000000000000000
GPR12: 0000000048002088 c00000000f33b000 0000000001affa78 00000000009aa000
GPR16: 0000000000e1f3c8 0000000002d517f0 0000000001aff984 0000000000000060
GPR20: 0000000000000000 ffffffffffffffff 0000000000000000 c000000000c45128
GPR24: 0000000000000000 0000000000000008 0000000000000000 c000000000c44200
GPR28: c000000000f80028 0000000000000008 c000000000c85038 0000000000000002
NIP [c00000000024a35c] .sysfs_create_file+0x1c/0x40
LR [c0000000004ee050] .device_create_file+0x20/0x40
Call Trace:
[c0000003fd9e77e0] [c0000003fd9e78a0] 0xc0000003fd9e78a0 (unreliable)
[c0000003fd9e7850] [c00000000083c9a4] .register_cpu_online+0x1d0/0x250
[c0000003fd9e7900] [c00000000083ca8c] .sysfs_cpu_notify+0x68/0x28c
[c0000003fd9e79b0] [c00000000083769c] .notifier_call_chain+0x9c/0x100
[c0000003fd9e7a50] [c0000000000a5878] .__cpu_notify+0x38/0x80
[c0000003fd9e7ad0] [c00000000083e124] ._cpu_up+0x10c/0x178
[c0000003fd9e7b90] [c00000000083e2c8] .cpu_up+0x138/0x164
[c0000003fd9e7c20] [c000000000ba46d0] .async_cpu_up+0x28/0x40
[c0000003fd9e7ca0] [c0000000000d81ec] .async_run_entry_fn+0xbc/0x1f0
[c0000003fd9e7d50] [c0000000000c7cbc] .process_one_work+0x19c/0x590
[c0000003fd9e7e10] [c0000000000c8618] .worker_thread+0x188/0x4b0
[c0000003fd9e7ed0] [c0000000000ce57c] .kthread+0xbc/0xd0
[c0000003fd9e7f90] [c000000000021448] .kernel_thread+0x54/0x70
Instruction dump:
7fa3eb78 ebe1fff8 eba1ffe8 7c0803a6 4e800020 2c230000 41820024 e8630030
7c800074 7800d182 2fa30000 419e0014 <0b000000> 38a00002 4bfffebc e8630030
---[ end trace 31fd0ba7d8756001 ]---
initcall .topology_init+0x0/0x1ac returned 0 after 0 usecs
calling .pcibios_init+0x0/0xe8 @ 1
PCI: Probing PCI hardware
PCI: Probing PCI hardware done
initcall .pcibios_init+0x0/0xe8 returned 0 after 0 usecs
calling .add_system_ram_resources+0x0/0x140 @ 1
initcall .add_system_ram_resources+0x0/0x140 returned 0 after 0 usecs
calling .__machine_initcall_powermac_pmac_i2c_create_platform_devices+0x0/0xc8 @ 1
initcall .__machine_initcall_powermac_pmac_i2c_create_platform_devices+0x0/0xc8 returned 0 after 0 usecs
calling .opal_init+0x0/0x1cc @ 1
opal: Node not found
initcall .opal_init+0x0/0x1cc returned -19 after 0 usecs
calling .__machine_initcall_pseries_ioei_init+0x0/0xa0 @ 1
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
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^ permalink raw reply
* Re: Build regressions/improvements in v3.3-rc3
From: Geert Uytterhoeven @ 2012-02-12 14:04 UTC (permalink / raw)
To: Linuxppc-dev
In-Reply-To: <1329055329-11897-1-git-send-email-geert@linux-m68k.org>
On Sun, Feb 12, 2012 at 15:02, Geert Uytterhoeven <geert@linux-m68k.org> wr=
ote:
> JFYI, when comparing v3.3-rc3 to v3.3-rc2[3], the summaries are:
> =C2=A0- build errors: +12/-8
> =C2=A0- build warnings: +53/-67
Of these 11 are powerpc-related:
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error:
'FSL_DIU_PORT_DVI' undeclared (first use in this function): =3D> 189:9
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error: 'enum
fsl_diu_monitor_port' declared inside parameter list: =3D> 70:9, 84:9,
88:36
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error: 'return' with
a value, in function returning void: =3D> 189:2
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error: function
declaration isn't a prototype: =3D> 69:5, 88:6, 83:6, 187:1
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error: its scope is
only this definition or declaration, which is probably not what you
want: =3D> 70:9
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error: parameter 1
('port') has incomplete type: =3D> 187:54, 83:56, 88:57, 69:56
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error: return type
is an incomplete type: =3D> 187:1
+ arch/powerpc/sysdev/mv64x60_dev.c: error: assignment makes pointer
from integer without a cast: =3D> 253:11
+ arch/powerpc/sysdev/mv64x60_dev.c: error: implicit declaration of
function 'of_get_mac_address': =3D> 253:2
+ arch/powerpc/sysdev/tsi108_dev.c: error: assignment makes pointer
from integer without a cast: =3D> 108:12
+ arch/powerpc/sysdev/tsi108_dev.c: error: implicit declaration of
function 'of_get_mac_address': =3D> 108:3
Gr{oetje,eeting}s,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k=
.org
In personal conversations with technical people, I call myself a hacker. Bu=
t
when I'm talking to journalists I just say "programmer" or something like t=
hat.
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0=C2=A0 =C2=A0=C2=A0 -- Linus Torvalds
^ permalink raw reply
* Re: [PULL REQUEST] DMA-mapping framework redesign preparation patches
From: Stephen Rothwell @ 2012-02-13 0:21 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
linux-arch, Jonathan Corbet, x86, linux-next, Arnd Bergmann,
microblaze-uclinux, linaro-mm-sig, Andrzej Pietrasiewicz,
Thomas Gleixner, linux-arm-kernel, discuss, linux-kernel,
FUJITA Tomonori, Kyungmin Park, linux-alpha, Andrew Morton,
linuxppc-dev
In-Reply-To: <1328898737-15854-1-git-send-email-m.szyprowski@samsung.com>
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Hi Marek,
On Fri, 10 Feb 2012 19:32:17 +0100 Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>
> Our patches with DMA-mapping framework redesign proposal have been
> hanging for over a month with just a few comments. We would like to go
> further in the development, but first I would like to ask You to give
> them a try in the linux-next kernel.
>
> For everyone interested in this patch series, here is the relevant
> thread: https://lkml.org/lkml/2011/12/23/97
>
> If there are any problems with our git tree, please contact Marek
> Szyprowski <m.szyprowski@samsung.com> or alternatively Kyungmin Park
> <kyungmin.park@samsung.com>.
>
> The following changes since commit 62aa2b537c6f5957afd98e29f96897419ed5ebab:
>
> Linux 3.3-rc2 (2012-01-31 13:31:54 -0800)
>
> are available in the git repository at:
> git://git.infradead.org/users/kmpark/linux-samsung dma-mapping-next
I have added this from today.
Thanks for adding your subsystem tree as a participant of linux-next. As
you may know, this is not a judgment of your code. The purpose of
linux-next is for integration testing and to lower the impact of
conflicts between subsystems in the next merge window.
You will need to ensure that the patches/commits in your tree/series have
been:
* submitted under GPL v2 (or later) and include the Contributor's
Signed-off-by,
* posted to the relevant mailing list,
* reviewed by you (or another maintainer of your subsystem tree),
* successfully unit tested, and
* destined for the current or next Linux merge window.
Basically, this should be just what you would send to Linus (or ask him
to fetch). It is allowed to be rebased if you deem it necessary.
--
Cheers,
Stephen Rothwell
sfr@canb.auug.org.au
Legal Stuff:
By participating in linux-next, your subsystem tree contributions are
public and will be included in the linux-next trees. You may be sent
e-mail messages indicating errors or other issues when the
patches/commits from your subsystem tree are merged and tested in
linux-next. These messages may also be cross-posted to the linux-next
mailing list, the linux-kernel mailing list, etc. The linux-next tree
project and IBM (my employer) make no warranties regarding the linux-next
project, the testing procedures, the results, the e-mails, etc. If you
don't agree to these ground rules, let me know and I'll remove your tree
from participation in linux-next.
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^ permalink raw reply
* [PATCH] powerpc/powernv: Disable interrupts while taking phb->lock
From: Michael Ellerman @ 2012-02-13 0:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
We need to disable interrupts when taking the phb->lock. Otherwise
we could deadlock with pci_lock taken from an interrupt.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
--
=========================================================
[ INFO: possible irq lock inversion dependency detected ]
3.2.0-rc5-mpe+ #17
---------------------------------------------------------
swapper/56/0 just changed the state of lock:
(pci_lock){-.....}, at: [<c000000000421824>] .pci_bus_read_config_word+0x84/0x110
but this lock took another, HARDIRQ-unsafe lock in the past:
(&(&phb->lock)->rlock){+.+...}
and interrupts could create inverse lock ordering between them.
other info that might help us debug this:
Possible interrupt unsafe locking scenario:
CPU0 CPU1
---- ----
lock(&(&phb->lock)->rlock);
local_irq_disable();
lock(pci_lock);
lock(&(&phb->lock)->rlock);
<Interrupt>
lock(pci_lock);
*** DEADLOCK ***
1 lock held by swapper/56/0:
#0: (&(shost->host_lock)->rlock){-.-...}, at: [<c0000000005ee84c>] .ipr_isr+0x4c/0x540
the shortest dependencies between 2nd lock and 1st lock:
-> (&(&phb->lock)->rlock){+.+...} ops: 622770257920 {
HARDIRQ-ON-W at:
[<c0000000000be848>] .lock_acquire+0xb8/0x190
[<c0000000008e1c24>] ._raw_spin_lock+0x34/0x60
[<c000000000047320>] .pnv_setup_msi_irqs+0xb0/0x320
[<c00000000002dfc4>] .arch_setup_msi_irqs+0x34/0x50
[<c000000000434160>] .pci_enable_msi_block+0x210/0x300
[<c00000000090ad90>] .ipr_probe+0x6a8/0x1560
[<c00000000042a9b0>] .pci_device_probe+0x1a0/0x1b0
[<c00000000048c7c0>] .driver_probe_device+0xb0/0x1e0
[<c00000000048c9fc>] .__driver_attach+0x10c/0x110
[<c00000000048b2f8>] .bus_for_each_dev+0x88/0xe0
[<c00000000048c2c8>] .driver_attach+0x28/0x40
[<c00000000048bd68>] .bus_add_driver+0x178/0x310
[<c00000000048cebc>] .driver_register+0x9c/0x1b0
[<c00000000042b040>] .__pci_register_driver+0x70/0x150
[<c000000000cddb80>] .ipr_init+0x4c/0x68
[<c00000000000a9f0>] .do_one_initcall+0x60/0x1e0
[<c000000000cb0b58>] .kernel_init+0x134/0x1c0
[<c0000000000215a8>] .kernel_thread+0x54/0x70
SOFTIRQ-ON-W at:
[<c0000000000be848>] .lock_acquire+0xb8/0x190
[<c0000000008e1c24>] ._raw_spin_lock+0x34/0x60
[<c000000000047320>] .pnv_setup_msi_irqs+0xb0/0x320
[<c00000000002dfc4>] .arch_setup_msi_irqs+0x34/0x50
[<c000000000434160>] .pci_enable_msi_block+0x210/0x300
[<c00000000090ad90>] .ipr_probe+0x6a8/0x1560
[<c00000000042a9b0>] .pci_device_probe+0x1a0/0x1b0
[<c00000000048c7c0>] .driver_probe_device+0xb0/0x1e0
[<c00000000048c9fc>] .__driver_attach+0x10c/0x110
[<c00000000048b2f8>] .bus_for_each_dev+0x88/0xe0
[<c00000000048c2c8>] .driver_attach+0x28/0x40
[<c00000000048bd68>] .bus_add_driver+0x178/0x310
[<c00000000048cebc>] .driver_register+0x9c/0x1b0
[<c00000000042b040>] .__pci_register_driver+0x70/0x150
[<c000000000cddb80>] .ipr_init+0x4c/0x68
[<c00000000000a9f0>] .do_one_initcall+0x60/0x1e0
[<c000000000cb0b58>] .kernel_init+0x134/0x1c0
[<c0000000000215a8>] .kernel_thread+0x54/0x70
INITIAL USE at:
[<c0000000000be848>] .lock_acquire+0xb8/0x190
[<c0000000008e1d64>] ._raw_spin_lock_irqsave+0x54/0x80
[<c000000000046a80>] .pnv_pci_config_check_eeh+0xe0/0x4d0
[<c000000000047044>] .pnv_pci_read_config+0xc4/0x150
[<c000000000421750>] .pci_bus_read_config_dword+0xc0/0x110
[<c0000000007a4764>] .pci_scan_single_device+0xa4/0x1d0
[<c000000000424730>] .pci_scan_slot+0x100/0x1f0
[<c000000000900990>] .pci_scan_child_bus+0x40/0x108
[<c000000000900bc0>] .pci_scan_bridge+0x168/0x4d0
[<c000000000900a0c>] .pci_scan_child_bus+0xbc/0x108
[<c0000000008fe0fc>] .pcibios_scan_phb+0xe8/0x18c
[<c000000000cbb98c>] .pcibios_init+0x80/0xe4
[<c00000000000a9f0>] .do_one_initcall+0x60/0x1e0
[<c000000000cb0b58>] .kernel_init+0x134/0x1c0
[<c0000000000215a8>] .kernel_thread+0x54/0x70
}
... key at: [<c00000000144934c>] __key.22640+0x0/0x8
... acquired at:
[<c0000000008e1d64>] ._raw_spin_lock_irqsave+0x54/0x80
[<c000000000046a80>] .pnv_pci_config_check_eeh+0xe0/0x4d0
[<c000000000047044>] .pnv_pci_read_config+0xc4/0x150
[<c000000000421750>] .pci_bus_read_config_dword+0xc0/0x110
[<c0000000007a4764>] .pci_scan_single_device+0xa4/0x1d0
[<c000000000424730>] .pci_scan_slot+0x100/0x1f0
[<c000000000900990>] .pci_scan_child_bus+0x40/0x108
[<c000000000900bc0>] .pci_scan_bridge+0x168/0x4d0
[<c000000000900a0c>] .pci_scan_child_bus+0xbc/0x108
[<c0000000008fe0fc>] .pcibios_scan_phb+0xe8/0x18c
[<c000000000cbb98c>] .pcibios_init+0x80/0xe4
[<c00000000000a9f0>] .do_one_initcall+0x60/0x1e0
[<c000000000cb0b58>] .kernel_init+0x134/0x1c0
[<c0000000000215a8>] .kernel_thread+0x54/0x70
-> (pci_lock){-.....} ops: 21178483736576 {
IN-HARDIRQ-W at:
[<c0000000000be848>] .lock_acquire+0xb8/0x190
[<c0000000008e1d64>] ._raw_spin_lock_irqsave+0x54/0x80
[<c000000000421824>] .pci_bus_read_config_word+0x84/0x110
[<c0000000005e8200>] .ipr_reset_alert+0x50/0x130
[<c0000000005e84cc>] .ipr_reset_ioa_job+0x8c/0xf0
[<c0000000005ee920>] .ipr_isr+0x120/0x540
[<c0000000000f26a8>] .handle_irq_event_percpu+0x98/0x350
[<c0000000000f29b8>] .handle_irq_event+0x58/0xa0
[<c0000000000f6be0>] .handle_fasteoi_irq+0xa0/0x1c0
[<c000000000021410>] .call_handle_irq+0x1c/0x2c
[<c00000000001005c>] .do_IRQ+0x29c/0x320
[<c00000000000500c>] hardware_interrupt_entry+0x1c/0x90
[<c0000000000177ec>] .cpu_idle+0x12c/0x220
[<c0000000008fcfa4>] .start_secondary+0x360/0x368
[<c000000000009368>] .start_secondary_prolog+0x10/0x14
INITIAL USE at:
[<c0000000000be848>] .lock_acquire+0xb8/0x190
[<c0000000008e1d64>] ._raw_spin_lock_irqsave+0x54/0x80
[<c000000000421714>] .pci_bus_read_config_dword+0x84/0x110
[<c0000000007a4764>] .pci_scan_single_device+0xa4/0x1d0
[<c0000000004246b8>] .pci_scan_slot+0x88/0x1f0
[<c000000000900990>] .pci_scan_child_bus+0x40/0x108
[<c0000000008fe0fc>] .pcibios_scan_phb+0xe8/0x18c
[<c000000000cbb98c>] .pcibios_init+0x80/0xe4
[<c00000000000a9f0>] .do_one_initcall+0x60/0x1e0
[<c000000000cb0b58>] .kernel_init+0x134/0x1c0
[<c0000000000215a8>] .kernel_thread+0x54/0x70
}
... key at: [<c0000000012b64b8>] pci_lock+0x18/0x38
... acquired at:
[<c0000000000bc1e4>] .mark_lock+0x244/0x740
[<c0000000000bcfcc>] .__lock_acquire+0x8ec/0x1b10
[<c0000000000be848>] .lock_acquire+0xb8/0x190
[<c0000000008e1d64>] ._raw_spin_lock_irqsave+0x54/0x80
[<c000000000421824>] .pci_bus_read_config_word+0x84/0x110
[<c0000000005e8200>] .ipr_reset_alert+0x50/0x130
[<c0000000005e84cc>] .ipr_reset_ioa_job+0x8c/0xf0
[<c0000000005ee920>] .ipr_isr+0x120/0x540
[<c0000000000f26a8>] .handle_irq_event_percpu+0x98/0x350
[<c0000000000f29b8>] .handle_irq_event+0x58/0xa0
[<c0000000000f6be0>] .handle_fasteoi_irq+0xa0/0x1c0
[<c000000000021410>] .call_handle_irq+0x1c/0x2c
[<c00000000001005c>] .do_IRQ+0x29c/0x320
[<c00000000000500c>] hardware_interrupt_entry+0x1c/0x90
[<c0000000000177ec>] .cpu_idle+0x12c/0x220
[<c0000000008fcfa4>] .start_secondary+0x360/0x368
[<c000000000009368>] .start_secondary_prolog+0x10/0x14
stack backtrace:
Call Trace:
[c000000ffbe1b490] [c000000000015838] .show_stack+0x78/0x1b0 (unreliable)
[c000000ffbe1b540] [c0000000000bb4b0] .print_irq_inversion_bug+0x270/0x2c0
[c000000ffbe1b5f0] [c0000000000bb5a4] .check_usage_forwards+0xa4/0x130
[c000000ffbe1b6f0] [c0000000000bc1e4] .mark_lock+0x244/0x740
[c000000ffbe1b7b0] [c0000000000bcfcc] .__lock_acquire+0x8ec/0x1b10
[c000000ffbe1b930] [c0000000000be848] .lock_acquire+0xb8/0x190
[c000000ffbe1ba10] [c0000000008e1d64] ._raw_spin_lock_irqsave+0x54/0x80
[c000000ffbe1bab0] [c000000000421824] .pci_bus_read_config_word+0x84/0x110
[c000000ffbe1bb70] [c0000000005e8200] .ipr_reset_alert+0x50/0x130
[c000000ffbe1bc10] [c0000000005e84cc] .ipr_reset_ioa_job+0x8c/0xf0
[c000000ffbe1bca0] [c0000000005ee920] .ipr_isr+0x120/0x540
[c000000ffbe1bd80] [c0000000000f26a8] .handle_irq_event_percpu+0x98/0x350
[c000000ffbe1be70] [c0000000000f29b8] .handle_irq_event+0x58/0xa0
[c000000ffbe1bf00] [c0000000000f6be0] .handle_fasteoi_irq+0xa0/0x1c0
[c000000ffbe1bf90] [c000000000021410] .call_handle_irq+0x1c/0x2c
[c0000007f2d47a70] [c00000000001005c] .do_IRQ+0x29c/0x320
[c0000007f2d47b30] [c00000000000500c] hardware_interrupt_entry+0x1c/0x90
--- Exception: 501 at .arch_local_irq_restore+0x50/0x60
LR = .cpu_idle+0x138/0x220
[c0000007f2d47e20] [c0000000000177ec] .cpu_idle+0x12c/0x220 (unreliable)
[c0000007f2d47ee0] [c0000000008fcfa4] .start_secondary+0x360/0x368
[c0000007f2d47f90] [c000000000009368] .start_secondary_prolog+0x10/0x14
---
arch/powerpc/platforms/powernv/pci.c | 22 ++++++++++++++--------
1 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index a70bc1e..f92b9ef 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -52,32 +52,38 @@ static int pnv_msi_check_device(struct pci_dev* pdev, int nvec, int type)
static unsigned int pnv_get_one_msi(struct pnv_phb *phb)
{
- unsigned int id;
+ unsigned long flags;
+ unsigned int id, rc;
+
+ spin_lock_irqsave(&phb->lock, flags);
- spin_lock(&phb->lock);
id = find_next_zero_bit(phb->msi_map, phb->msi_count, phb->msi_next);
if (id >= phb->msi_count && phb->msi_next)
id = find_next_zero_bit(phb->msi_map, phb->msi_count, 0);
if (id >= phb->msi_count) {
- spin_unlock(&phb->lock);
- return 0;
+ rc = 0;
+ goto out;
}
__set_bit(id, phb->msi_map);
- spin_unlock(&phb->lock);
- return id + phb->msi_base;
+ rc = id + phb->msi_base;
+out:
+ spin_unlock_irqrestore(&phb->lock, flags);
+ return rc;
}
static void pnv_put_msi(struct pnv_phb *phb, unsigned int hwirq)
{
+ unsigned long flags;
unsigned int id;
if (WARN_ON(hwirq < phb->msi_base ||
hwirq >= (phb->msi_base + phb->msi_count)))
return;
id = hwirq - phb->msi_base;
- spin_lock(&phb->lock);
+
+ spin_lock_irqsave(&phb->lock, flags);
__clear_bit(id, phb->msi_map);
- spin_unlock(&phb->lock);
+ spin_unlock_irqrestore(&phb->lock, flags);
}
static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
--
1.7.5.4
^ permalink raw reply related
* [PATCH stable-2.6.27] powerpc: Add more Power7 specific definitions
From: Michael Neuling @ 2012-02-13 0:52 UTC (permalink / raw)
To: stable; +Cc: Willy Tarreau, Eric B Munson, linuxppc-dev
stable-2.6.27.60 added c24cb8e5 which uses PV_POWER7 but it's not
defined. Following patch adds these definitions.
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
commit 50fb8ebe7c4ad60d147700d253f78bd1e615a526 upstream
powerpc: Add more Power7 specific definitions
This adds more SPR definitions used on newer processors when running
in hypervisor mode. Along with some other P7 specific bits and pieces
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
arch/powerpc/include/asm/ppc_asm.h | 1
arch/powerpc/include/asm/reg.h | 45 ++++++++++++++++++++++++++++++++++++-
2 files changed, 45 insertions(+), 1 deletion(-)
Index: clone1/arch/powerpc/include/asm/ppc_asm.h
===================================================================
--- clone1.orig/arch/powerpc/include/asm/ppc_asm.h
+++ clone1/arch/powerpc/include/asm/ppc_asm.h
@@ -166,6 +166,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);
#define HMT_MEDIUM or 2,2,2
#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority
#define HMT_HIGH or 3,3,3
+#define HMT_EXTRA_HIGH or 7,7,7 # power7 only
/* handle instructions that older assemblers may not know */
#define RFCI .long 0x4c000066 /* rfci instruction */
Index: clone1/arch/powerpc/include/asm/reg.h
===================================================================
--- clone1.orig/arch/powerpc/include/asm/reg.h
+++ clone1/arch/powerpc/include/asm/reg.h
@@ -172,8 +172,43 @@
#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */
#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */
#define SPRN_SPURR 0x134 /* Scaled PURR */
+#define SPRN_HSPRG0 0x130 /* Hypervisor Scratch 0 */
+#define SPRN_HSPRG1 0x131 /* Hypervisor Scratch 1 */
+#define SPRN_HDSISR 0x132
+#define SPRN_HDAR 0x133
+#define SPRN_HDEC 0x136 /* Hypervisor Decrementer */
#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
+#define SPRN_RMOR 0x138 /* Real mode offset register */
+#define SPRN_HRMOR 0x139 /* Real mode offset register */
+#define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */
+#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */
#define SPRN_LPCR 0x13E /* LPAR Control Register */
+#define LPCR_VPM0 (1ul << (63-0))
+#define LPCR_VPM1 (1ul << (63-1))
+#define LPCR_ISL (1ul << (63-2))
+#define LPCR_DPFD_SH (63-11)
+#define LPCR_VRMA_L (1ul << (63-12))
+#define LPCR_VRMA_LP0 (1ul << (63-15))
+#define LPCR_VRMA_LP1 (1ul << (63-16))
+#define LPCR_RMLS 0x1C000000 /* impl dependent rmo limit sel */
+#define LPCR_ILE 0x02000000 /* !HV irqs set MSR:LE */
+#define LPCR_PECE 0x00007000 /* powersave exit cause enable */
+#define LPCR_PECE0 0x00004000 /* ext. exceptions can cause exit */
+#define LPCR_PECE1 0x00002000 /* decrementer can cause exit */
+#define LPCR_PECE2 0x00001000 /* machine check etc can cause exit */
+#define LPCR_MER 0x00000800 /* Mediated External Exception */
+#define LPCR_LPES0 0x00000008 /* LPAR Env selector 0 */
+#define LPCR_LPES1 0x00000004 /* LPAR Env selector 1 */
+#define LPCR_RMI 0x00000002 /* real mode is cache inhibit */
+#define LPCR_HDICE 0x00000001 /* Hyp Decr enable (HV,PR,EE) */
+#define SPRN_LPID 0x13F /* Logical Partition Identifier */
+#define SPRN_HMER 0x150 /* Hardware m? error recovery */
+#define SPRN_HMEER 0x151 /* Hardware m? enable error recovery */
+#define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */
+#define SPRN_TLBINDEXR 0x154 /* P7 TLB control register */
+#define SPRN_TLBVPNR 0x155 /* P7 TLB control register */
+#define SPRN_TLBRPNR 0x156 /* P7 TLB control register */
+#define SPRN_TLBLPIDR 0x157 /* P7 TLB control register */
#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */
#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */
#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */
@@ -392,12 +427,18 @@
#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */
#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */
#define SRR1_WAKEMASK 0x00380000 /* reason for wakeup */
-#define SRR1_WAKERESET 0x00380000 /* System reset */
#define SRR1_WAKESYSERR 0x00300000 /* System error */
#define SRR1_WAKEEE 0x00200000 /* External interrupt */
#define SRR1_WAKEMT 0x00280000 /* mtctrl */
+#define SRR1_WAKEHMI 0x00280000 /* Hypervisor maintenance */
#define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */
#define SRR1_WAKETHERM 0x00100000 /* Thermal management interrupt */
+#define SRR1_WAKERESET 0x00100000 /* System reset */
+#define SRR1_WAKESTATE 0x00030000 /* Powersave exit mask [46:47] */
+#define SRR1_WS_DEEPEST 0x00030000 /* Some resources not maintained,
+ * may not be recoverable */
+#define SRR1_WS_DEEPER 0x00020000 /* Some resources not maintained */
+#define SRR1_WS_DEEP 0x00010000 /* All resources maintained */
#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */
#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */
@@ -698,6 +739,8 @@
#define PV_POWER5 0x003A
#define PV_POWER5p 0x003B
#define PV_970FX 0x003C
+#define PV_POWER6 0x003E
+#define PV_POWER7 0x003F
#define PV_630 0x0040
#define PV_630p 0x0041
#define PV_970MP 0x0044
^ permalink raw reply
* Re: [PATCH 1/2 V3] powerpc/85xx: Add P1024rdb dts support
From: Bob Cochran @ 2012-02-13 1:40 UTC (permalink / raw)
To: b29983, linuxppc-dev, Tang Yuantian, Jin Qing
In-Reply-To: <1328860851-392-1-git-send-email-b29983@freescale.com>
On 02/10/2012 03:00 AM, b29983@freescale.com wrote:
> From: Tang Yuantian<Yuantian.Tang@freescale.com>
>
> Signed-off-by: Jin Qing<b24347@freescale.com>
> Signed-off-by: Li Yang<leoli@freescale.com>
> Signed-off-by: Tang Yuantian<Yuantian.Tang@freescale.com>
> ---
> v3:
I'm curious how fsl_pq_mdio_probe returns successfully when probing the
phys on the first pass (mdio@24000). I don't have a P1024 to test with,
but I believe it has the same ETSEC configuration as the P1010 that I
work with.
Inside the fsl_pq_mdio_probe routine (fsl_pq_mdio.c), a successful
search of a tbi child node is required with a tbi->type of "tby-phy".
If it doesn't find this node, the probe routine will return an error of
EBUSY. The logic from the routine is provided below:
for_each_child_of_node(np, tbi) {
if (!strncmp(tbi->type, "tbi-phy", 8))
break;
}
if (tbi) {
const u32 *prop = of_get_property(tbi, "reg", NULL);
if (prop)
tbiaddr = *prop;
}
if (tbiaddr == -1) {
err = -EBUSY;
goto err_free_irqs;
} else {
out_be32(tbipa, tbiaddr);
}
If I look at the p1010rdb.dtsi file, I see that a tbi-phy child node was
added inside mdio@24000; however, I don't see this inside your
p1024rdb.dtsi.
On top of this, the current p1010rdb mdio@24000 node in p1024rdb.dtsi
doesn't yield a successful probe (as I reported on this mail list on
2/7/12).
So, it seems to me that a tbi child node needs to be added to your
mdio@24000 node similar to what was done with the p1010rdb,
but it also requires some additional tweaking or perhaps a fix inside
the fsl_pq_mdio_probe routine or of library (It's not clear to me how to
best produce a successful probe given the circumstances).
> +
> + mdio@24000 {
> + phy0: ethernet-phy@0 {
> + interrupts =<3 1 0 0>;
> + reg =<0x0>;
> + };
> + phy1: ethernet-phy@1 {
> + interrupts =<2 1 0 0>;
> + reg =<0x1>;
> + };
> + phy2: ethernet-phy@2 {
> + interrupts =<1 1 0 0>;
> + reg =<0x2>;
> + };
> + };
> +
> + mdio@25000 {
> + tbi0: tbi-phy@11 {
> + reg =<0x11>;
> + device_type = "tbi-phy";
> + };
> + };
> +
> + mdio@26000 {
> + tbi1: tbi-phy@11 {
> + reg =<0x11>;
> + device_type = "tbi-phy";
> + };
> + };
> +
> + ethernet@b0000 {
> + phy-handle =<&phy2>;
> + phy-connection-type = "rgmii-id";
> + };
> +
^ permalink raw reply
* Re: Boot failure with next-20120208
From: Michael Neuling @ 2012-02-13 3:04 UTC (permalink / raw)
To: Stephen Rothwell, Arjan van de Ven, Andrew Morton
Cc: gregkh, linux-next, ppc-dev, LKML, Milton Miller
In-Reply-To: <20120212113805.c7e5d902c95a9d0f4037e12c@canb.auug.org.au>
> Just a quick note to say I got a boot OOPs with next-20120208 and 9 on a
> Power7 blade (my other PowerPC boot tests are ok. I'll investigate this
> further on Monday.
>
> The line referenced below is:
>
> BUG_ON(!kobj || !kobj->sd || !attr);
>
> in sysfs_create_file().
>
> calling .topology_init+0x0/0x1ac @ 1
> initcall 7_.async_cpu_up+0x0/0x40 returned 0 after 9765 usecs
> async_continuing @ 20 after 9765 usec
> ------------[ cut here ]------------
> kernel BUG at fs/sysfs/file.c:573!
> Oops: Exception in kernel mode, sig: 5 [#1]
> SMP NR_CPUS=32 NUMA pSeries
> Modules linked in:
> NIP: c00000000024a35c LR: c0000000004ee050 CTR: c00000000083ca24
> REGS: c0000003fd9e7560 TRAP: 0700 Not tainted (3.3.0-rc2-autokern1)
> MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI> CR: 88002082 XER: 0000000f
> CFAR: c00000000024a370
> TASK = c0000003fd9e8000[20] 'kworker/u:6' THREAD: c0000003fd9e4000 CPU: 0
> GPR00: 0000000000000001 c0000003fd9e77e0 c000000000d19bb8 0000000000000000
> GPR04: c000000000bf37a8 0000000000000008 8000000002096400 0000000000000000
> GPR08: 0000000000000000 c000000000f80028 c000000000d52bd8 0000000000000000
> GPR12: 0000000048002088 c00000000f33b000 0000000001affa78 00000000009aa000
> GPR16: 0000000000e1f3c8 0000000002d517f0 0000000001aff984 0000000000000060
> GPR20: 0000000000000000 ffffffffffffffff 0000000000000000 c000000000c45128
> GPR24: 0000000000000000 0000000000000008 0000000000000000 c000000000c44200
> GPR28: c000000000f80028 0000000000000008 c000000000c85038 0000000000000002
> NIP [c00000000024a35c] .sysfs_create_file+0x1c/0x40
> LR [c0000000004ee050] .device_create_file+0x20/0x40
> Call Trace:
> [c0000003fd9e77e0] [c0000003fd9e78a0] 0xc0000003fd9e78a0 (unreliable)
> [c0000003fd9e7850] [c00000000083c9a4] .register_cpu_online+0x1d0/0x250
> [c0000003fd9e7900] [c00000000083ca8c] .sysfs_cpu_notify+0x68/0x28c
> [c0000003fd9e79b0] [c00000000083769c] .notifier_call_chain+0x9c/0x100
> [c0000003fd9e7a50] [c0000000000a5878] .__cpu_notify+0x38/0x80
> [c0000003fd9e7ad0] [c00000000083e124] ._cpu_up+0x10c/0x178
> [c0000003fd9e7b90] [c00000000083e2c8] .cpu_up+0x138/0x164
> [c0000003fd9e7c20] [c000000000ba46d0] .async_cpu_up+0x28/0x40
> [c0000003fd9e7ca0] [c0000000000d81ec] .async_run_entry_fn+0xbc/0x1f0
> [c0000003fd9e7d50] [c0000000000c7cbc] .process_one_work+0x19c/0x590
> [c0000003fd9e7e10] [c0000000000c8618] .worker_thread+0x188/0x4b0
> [c0000003fd9e7ed0] [c0000000000ce57c] .kthread+0xbc/0xd0
> [c0000003fd9e7f90] [c000000000021448] .kernel_thread+0x54/0x70
> Instruction dump:
> 7fa3eb78 ebe1fff8 eba1ffe8 7c0803a6 4e800020 2c230000 41820024 e8630030
> 7c800074 7800d182 2fa30000 419e0014 <0b000000> 38a00002 4bfffebc e8630030
> ---[ end trace 31fd0ba7d8756001 ]---
> initcall .topology_init+0x0/0x1ac returned 0 after 0 usecs
> calling .pcibios_init+0x0/0xe8 @ 1
> PCI: Probing PCI hardware
> PCI: Probing PCI hardware done
> initcall .pcibios_init+0x0/0xe8 returned 0 after 0 usecs
> calling .add_system_ram_resources+0x0/0x140 @ 1
> initcall .add_system_ram_resources+0x0/0x140 returned 0 after 0 usecs
> calling .__machine_initcall_powermac_pmac_i2c_create_platform_devices+0x0/0xc8 @ 1
> initcall .__machine_initcall_powermac_pmac_i2c_create_platform_devices+0x0/0xc8 returned 0 after 0 usecs
> calling .opal_init+0x0/0x1cc @ 1
> opal: Node not found
> initcall .opal_init+0x0/0x1cc returned -19 after 0 usecs
> calling .__machine_initcall_pseries_ioei_init+0x0/0xa0 @ 1
Reverting "smp: start up non-boot CPUs asynchronously" (8de7a96405 from
next-20120208) fixes this problem for me.
Only hit it when on a 32 thread (8 core 4 thread) POWER7 box. Smaller
configs didn't hit it.
Adding Arjan who owns this to the CC.
Mikey
^ permalink raw reply
* [PATCH 2/2 v3] powerpc/85xx: Abstract common define of signal multiplex control for qe
From: Zhicheng Fan @ 2012-02-13 5:33 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: Zhicheng Fan
In-Reply-To: <1329111208-5320-1-git-send-email-B32736@freescale.com>
From: Zhicheng Fan <b32736@freescale.com>
The mpc85xx_rdb and mpc85xx_mds have commom define of signal multiplex for qe ,so
they need to go in common header, the patch abstract them to fsl_guts.h
Signed-off-by: Zhicheng Fan <b32736@freescale.com>
---
arch/powerpc/include/asm/fsl_guts.h | 18 ++++++++++++++++++
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 21 ++++++++-------------
2 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index bebd124..8c78ee2 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -114,6 +114,24 @@ struct ccsr_guts_86xx {
__be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */
} __attribute__ ((packed));
+#ifdef CONFIG_PPC_85xx
+
+/* Alternate function signal multiplex control */
+#define MPC85xx_PMUXCR_QE0 0x00008000
+#define MPC85xx_PMUXCR_QE2 0x00002000
+#define MPC85xx_PMUXCR_QE3 0x00001000
+#define MPC85xx_PMUXCR_QE4 0x00000800
+#define MPC85xx_PMUXCR_QE5 0x00000400
+#define MPC85xx_PMUXCR_QE6 0x00000200
+#define MPC85xx_PMUXCR_QE7 0x00000100
+#define MPC85xx_PMUXCR_QE8 0x00000080
+#define MPC85xx_PMUXCR_QE9 0x00000040
+#define MPC85xx_PMUXCR_QE10 0x00000020
+#define MPC85xx_PMUXCR_QE11 0x00000010
+#define MPC85xx_PMUXCR_QE12 0x00000008
+
+#endif
+
#ifdef CONFIG_PPC_86xx
#define CCSR_GUTS_DMACR_DEV_SSI 0 /* DMA controller/channel set to SSI */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 1d15a0c..dc5421c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -51,6 +51,7 @@
#include <asm/qe_ic.h>
#include <asm/mpic.h>
#include <asm/swiotlb.h>
+#include <asm/fsl_guts.h>
#include "smp.h"
#include "mpc85xx.h"
@@ -268,22 +269,16 @@ static void __init mpc85xx_mds_qe_init(void)
mpc85xx_mds_reset_ucc_phys();
if (machine_is(p1021_mds)) {
-#define MPC85xx_PMUXCR_OFFSET 0x60
-#define MPC85xx_PMUXCR_QE0 0x00008000
-#define MPC85xx_PMUXCR_QE3 0x00001000
-#define MPC85xx_PMUXCR_QE9 0x00000040
-#define MPC85xx_PMUXCR_QE12 0x00000008
- static __be32 __iomem *pmuxcr;
+
+ struct ccsr_guts_85xx __iomem *guts;
np = of_find_node_by_name(NULL, "global-utilities");
if (np) {
- pmuxcr = of_iomap(np, 0) + MPC85xx_PMUXCR_OFFSET;
+ guts = of_iomap(np, 0);
- if (!pmuxcr)
- printk(KERN_EMERG "Error: Alternate function"
- " signal multiplex control register not"
- " mapped!\n");
+ if (!guts)
+ pr_err("mpc85xx-rdb: could not map global utilties register!\n");
else
/* P1021 has pins muxed for QE and other functions. To
* enable QE UEC mode, we need to set bit QE0 for UCC1
@@ -291,11 +286,11 @@ static void __init mpc85xx_mds_qe_init(void)
* and QE12 for QE MII management signals in PMUXCR
* register.
*/
- setbits32(pmuxcr, MPC85xx_PMUXCR_QE0 |
+ setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE0 |
MPC85xx_PMUXCR_QE3 |
MPC85xx_PMUXCR_QE9 |
MPC85xx_PMUXCR_QE12);
-
+ iounmap(guts);
of_node_put(np);
}
--
1.7.0.4
^ permalink raw reply related
* [PATCH 1/2 v3] powerpc/85xx: Add Quicc Engine support for p1025rdb
From: Zhicheng Fan @ 2012-02-13 5:33 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: Zhicheng Fan
From: Zhicheng Fan <b32736@freescale.com>
Signed-off-by: Zhicheng Fan <b32736@freescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 78 ++++++++++++++++++++++++++++-
1 files changed, 77 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index e95aef7..c9dfdcc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -26,6 +26,9 @@
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+#include <asm/fsl_guts.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
@@ -47,6 +50,10 @@ void __init mpc85xx_rdb_pic_init(void)
struct mpic *mpic;
unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_QUICC_ENGINE
+ struct device_node *np;
+#endif
+
if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
@@ -62,6 +69,18 @@ void __init mpc85xx_rdb_pic_init(void)
BUG_ON(mpic == NULL);
mpic_init(mpic);
+
+#ifdef CONFIG_QUICC_ENGINE
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ if (np) {
+ qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+ qe_ic_cascade_high_mpic);
+ of_node_put(np);
+
+ } else
+ pr_err("%s: Could not find qe-ic node\n", __func__);
+#endif
+
}
/*
@@ -69,7 +88,7 @@ void __init mpc85xx_rdb_pic_init(void)
*/
static void __init mpc85xx_rdb_setup_arch(void)
{
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
struct device_node *np;
#endif
@@ -85,6 +104,63 @@ static void __init mpc85xx_rdb_setup_arch(void)
#endif
mpc85xx_smp_init();
+
+#ifdef CONFIG_QUICC_ENGINE
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+ if (!np) {
+ pr_err("%s: Could not find Quicc Engine node\n", __func__);
+ goto qe_fail;
+ }
+
+ qe_reset();
+ of_node_put(np);
+
+ np = of_find_node_by_name(NULL, "par_io");
+ if (np) {
+ struct device_node *ucc;
+
+ par_io_init(np);
+ of_node_put(np);
+
+ for_each_node_by_name(ucc, "ucc")
+ par_io_of_config(ucc);
+
+ }
+ if (machine_is(p1025_rdb)) {
+
+ struct ccsr_guts_85xx __iomem *guts;
+
+ np = of_find_node_by_name(NULL, "global-utilities");
+ if (np) {
+
+ guts = of_iomap(np, 0);
+ if (!guts) {
+
+ pr_err("mpc85xx-rdb: could not map global utilties register!\n");
+
+ } else {
+#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
+ /* P1025 has pins muxed for QE and other functions. To
+ * enable QE UEC mode, we need to set bit QE0 for UCC1
+ * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
+ * and QE12 for QE MII management singals in PMUXCR
+ * register.
+ */
+ setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE0 |
+ MPC85xx_PMUXCR_QE3 |
+ MPC85xx_PMUXCR_QE9 |
+ MPC85xx_PMUXCR_QE12);
+#endif
+ }
+ iounmap(guts);
+ of_node_put(np);
+ }
+
+ }
+
+qe_fail:
+#endif /* CONFIG_QUICC_ENGINE */
+
printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
}
--
1.7.0.4
^ permalink raw reply related
* RE: [PATCH v3 1/3] KVM: PPC: epapr: Factor out the epapr init
From: Liu Yu-B13201 @ 2012-02-13 5:47 UTC (permalink / raw)
To: Wood Scott-B07421
Cc: linuxppc-dev@ozlabs.org, agraf@suse.de, kvm-ppc@vger.kernel.org,
kvm@vger.kernel.org
In-Reply-To: <4F356477.7010809@freescale.com>
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bnN0cyA9PSBOVUxMKQ0KPiA+ICAJCXJldHVybiAtMTsNCj4gPg0KPiA+ICAJZm9yIChpID0gMDsg
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bV9oeXBlcmNhbGxfc3RhcnQoKSBpbnRvIGVwYXByIGJpdD8NCg0KVGhhbmtzLA0KWXUNCg==
^ permalink raw reply
* Re: Boot failure with next-20120208
From: Stephen Rothwell @ 2012-02-13 5:47 UTC (permalink / raw)
To: Michael Neuling
Cc: gregkh, ppc-dev, LKML, Milton Miller, linux-next, Andrew Morton,
Arjan van de Ven
In-Reply-To: <16788.1329102254@neuling.org>
[-- Attachment #1: Type: text/plain, Size: 395 bytes --]
On Mon, 13 Feb 2012 14:04:14 +1100 Michael Neuling <mikey@neuling.org> wrote:
>
> Reverting "smp: start up non-boot CPUs asynchronously" (8de7a96405 from
> next-20120208) fixes this problem for me.
I have reverted that commit (and the following -fix commit) from -next
today.
Thanks for tracking it down, Mikey.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* Re: [PATCH stable-2.6.27] powerpc: Add more Power7 specific definitions
From: Willy Tarreau @ 2012-02-13 6:35 UTC (permalink / raw)
To: Michael Neuling; +Cc: linuxppc-dev, stable, Eric B Munson
In-Reply-To: <8849.1329094322@neuling.org>
On Mon, Feb 13, 2012 at 11:52:02AM +1100, Michael Neuling wrote:
> stable-2.6.27.60 added c24cb8e5 which uses PV_POWER7 but it's not
> defined. Following patch adds these definitions.
Thank you for the report Michael, I have no PPC toolchain so I have
not tested this one. Added now.
Just one question, with this release, no -rc patch was emitted. Do you
think you would have built it in time if I had provided a way to retrieve
the -rc patch ? I'm asking because it's much more difficult right now to
put it somewhere, but for instance it can be emitted with the announcement
mail.
Regards,
Willy
^ permalink raw reply
* Re: [PATCH stable-2.6.27] powerpc: Add more Power7 specific definitions
From: Michael Neuling @ 2012-02-13 9:15 UTC (permalink / raw)
To: Willy Tarreau; +Cc: linuxppc-dev, stable, Eric B Munson
In-Reply-To: <20120213063528.GU21225@1wt.eu>
Willy,
> > stable-2.6.27.60 added c24cb8e5 which uses PV_POWER7 but it's not
> > defined. Following patch adds these definitions.
>
> Thank you for the report Michael, I have no PPC toolchain so I have
> not tested this one. Added now.
No problem.
> Just one question, with this release, no -rc patch was emitted. Do you
> think you would have built it in time if I had provided a way to
> retrieve the -rc patch ? I'm asking because it's much more difficult
> right now to put it somewhere, but for instance it can be emitted with
> the announcement mail.
I would test it but to fit with my work flow I'd really like the rc in a
git tree. I've asked gregkh to do this in the past, but he's not been
able to. Hence I only test the final releases.
Thanks,
Mikey
^ permalink raw reply
* RE: [PATCH V2] fsl-sata: I/O load balancing
From: Liu Qiang-B32616 @ 2012-02-13 10:02 UTC (permalink / raw)
To: Jeff Garzik
Cc: linux-ide@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
In-Reply-To: <4F356139.9000609@pobox.com>
> -----Original Message-----
> From: linux-ide-owner@vger.kernel.org [mailto:linux-ide-
> owner@vger.kernel.org] On Behalf Of Jeff Garzik
> Sent: Saturday, February 11, 2012 2:26 AM
> To: Liu Qiang-B32616
> Cc: linux-ide@vger.kernel.org; linux-kernel@vger.kernel.org; linuxppc-
> dev@lists.ozlabs.org
> Subject: Re: [PATCH V2] fsl-sata: I/O load balancing
>=20
> On 01/19/2012 09:19 PM, qiang.liu@freescale.com wrote:
> > From: Qiang Liu<qiang.liu@freescale.com>
> >
> > Reduce interrupt signals through reset Interrupt Coalescing Control Reg=
.
> > Provide dynamic method to adjust interrupt signals and timer ticks by
> sysfs.
> > It is a tradeoff for different applications.
> >
> > Signed-off-by: Qiang Liu<qiang.liu@freescale.com>
> > ---
> >
> > change for V2
> > support dynamic config interrupt coalescing register by /sysfs
> > test random small file with iometer
> > Description:
> > 1. fsl-sata interrupt will be raised 130 thousand times when write
> 8G file
> > (dd if=3D/dev/zero of=3D/dev/sda2 bs=3D128K count=3D65536);
> > 2. most of interrupts raised because of only 1-4 commands completed;
> > 3. only 30 thousand times will be raised after set max interrupt
> threshold,
> > more interrupts are coalesced as the description of ICC;
> >
> > Test methods and results:
> > 1. test sequential large file performance,
> > [root@p2020ds root]# echo 31 524287> \
> > /sys/devices/soc.0/ffe18000.sata/intr_coalescing
> > [root@p2020ds root]# dd if=3D/dev/zero of=3D/dev/sda2 bs=3D128K
> count=3D65536&
> > [root@p2020ds root]# top
> >
> > CPU % | dd | flush-8:0 | softirq
> > ---------------------------------------
> > before | 20-22 | 17-19 | 7
> > ---------------------------------------
> > after | 18-21 | 15-16 | 5
> > ---------------------------------------
> > 2. test random small file with iometer,
> > iometer paramters:
> > 4 I/Os burst length, 1MB transfer request size, 100% write, 2MB
> file size
> > as default configuration of interrupt coalescing register, 1
> interrupts and
> > no timeout config, total write performance is 119MB per second,
> > after config with the maximum value, write performance is 110MB per
> second.
> >
> > After compare the test results, a configuable interrupt coalescing
> should be
> > better when cope with flexible context.
> >
> > drivers/ata/sata_fsl.c | 111
> ++++++++++++++++++++++++++++++++++++++++++++++--
> > 1 files changed, 107 insertions(+), 4 deletions(-)
>=20
> Doesn't seem to apply to upstream, or another less recent -rc...
Thanks, I will resend it latterly.
>=20
> Jeff
>=20
>=20
>=20
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ide" in
> the body of a message to majordomo@vger.kernel.org More majordomo info at
> http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH 03/14 v2] MIPS: adapt for dma_map_ops changes
From: Marek Szyprowski @ 2012-02-13 10:35 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
Marek Szyprowski, linux-arch, Stephen Rothwell, Jonathan Corbet,
x86, Arnd Bergmann, microblaze-uclinux, linaro-mm-sig,
Andrzej Pietrasiewicz, Thomas Gleixner, linux-arm-kernel, discuss,
FUJITA Tomonori, Kyungmin Park, linux-alpha, Andrew Morton,
linuxppc-dev
In-Reply-To: <1324643253-3024-4-git-send-email-m.szyprowski@samsung.com>
From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Adapt core MIPS architecture code for dma_map_ops changes: replace
alloc/free_coherent with generic alloc/free methods.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
[added missing changes to arch/mips/cavium-octeon/dma-octeon.c]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/mips/cavium-octeon/dma-octeon.c | 16 ++++++++--------
arch/mips/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/mips/mm/dma-default.c | 8 ++++----
3 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index b6bb92c..df70600 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -157,7 +157,7 @@ static void octeon_dma_sync_sg_for_device(struct device *dev,
}
static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t gfp)
+ dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
{
void *ret;
@@ -184,7 +184,7 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
/* Don't invoke OOM killer */
gfp |= __GFP_NORETRY;
- ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
+ ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp, attrs);
mb();
@@ -192,14 +192,14 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
}
static void octeon_dma_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+ void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs)
{
int order = get_order(size);
if (dma_release_from_coherent(dev, order, vaddr))
return;
- swiotlb_free_coherent(dev, size, vaddr, dma_handle);
+ swiotlb_free_coherent(dev, size, vaddr, dma_handle, attrs);
}
static dma_addr_t octeon_unity_phys_to_dma(struct device *dev, phys_addr_t paddr)
@@ -240,8 +240,8 @@ EXPORT_SYMBOL(dma_to_phys);
static struct octeon_dma_map_ops octeon_linear_dma_map_ops = {
.dma_map_ops = {
- .alloc_coherent = octeon_dma_alloc_coherent,
- .free_coherent = octeon_dma_free_coherent,
+ .alloc = octeon_dma_alloc_coherent,
+ .free = octeon_dma_free_coherent,
.map_page = octeon_dma_map_page,
.unmap_page = swiotlb_unmap_page,
.map_sg = octeon_dma_map_sg,
@@ -325,8 +325,8 @@ void __init plat_swiotlb_setup(void)
#ifdef CONFIG_PCI
static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = {
.dma_map_ops = {
- .alloc_coherent = octeon_dma_alloc_coherent,
- .free_coherent = octeon_dma_free_coherent,
+ .alloc = octeon_dma_alloc_coherent,
+ .free = octeon_dma_free_coherent,
.map_page = octeon_dma_map_page,
.unmap_page = swiotlb_unmap_page,
.map_sg = octeon_dma_map_sg,
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 7aa37dd..cbd41f5 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -57,25 +57,31 @@ dma_set_mask(struct device *dev, u64 mask)
extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction);
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t gfp)
+#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
+
+static inline void *dma_alloc_attrs(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, gfp_t gfp,
+ struct dma_attrs *attrs)
{
void *ret;
struct dma_map_ops *ops = get_dma_ops(dev);
- ret = ops->alloc_coherent(dev, size, dma_handle, gfp);
+ ret = ops->alloc(dev, size, dma_handle, gfp, NULL);
debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
return ret;
}
-static inline void dma_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
+
+static inline void dma_free_attrs(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
struct dma_map_ops *ops = get_dma_ops(dev);
- ops->free_coherent(dev, size, vaddr, dma_handle);
+ ops->free(dev, size, vaddr, dma_handle, NULL);
debug_dma_free_coherent(dev, size, vaddr, dma_handle);
}
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 4608491..3fab204 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -98,7 +98,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,
EXPORT_SYMBOL(dma_alloc_noncoherent);
static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t * dma_handle, gfp_t gfp)
+ dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
{
void *ret;
@@ -132,7 +132,7 @@ void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
EXPORT_SYMBOL(dma_free_noncoherent);
static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
- dma_addr_t dma_handle)
+ dma_addr_t dma_handle, struct dma_attrs *attrs)
{
unsigned long addr = (unsigned long) vaddr;
int order = get_order(size);
@@ -323,8 +323,8 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
EXPORT_SYMBOL(dma_cache_sync);
static struct dma_map_ops mips_default_dma_map_ops = {
- .alloc_coherent = mips_dma_alloc_coherent,
- .free_coherent = mips_dma_free_coherent,
+ .alloc = mips_dma_alloc_coherent,
+ .free = mips_dma_free_coherent,
.map_page = mips_dma_map_page,
.unmap_page = mips_dma_unmap_page,
.map_sg = mips_dma_map_sg,
--
1.7.1.569.g6f426
^ permalink raw reply related
* [PATCH 04/14 v2] PowerPC: adapt for dma_map_ops changes
From: Marek Szyprowski @ 2012-02-13 10:36 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
Marek Szyprowski, linux-arch, Stephen Rothwell, Jonathan Corbet,
x86, Arnd Bergmann, microblaze-uclinux, linaro-mm-sig,
Andrzej Pietrasiewicz, Thomas Gleixner, linux-arm-kernel, discuss,
FUJITA Tomonori, Kyungmin Park, linux-alpha, Andrew Morton,
linuxppc-dev
In-Reply-To: <1324643253-3024-5-git-send-email-m.szyprowski@samsung.com>
From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Adapt core PowerPC architecture code for dma_map_ops changes: replace
alloc/free_coherent with generic alloc/free methods.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[added missing changes to arch/powerpc/kernel/vio.c]
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
arch/powerpc/include/asm/dma-mapping.h | 24 ++++++++++++++++--------
arch/powerpc/kernel/dma-iommu.c | 10 ++++++----
arch/powerpc/kernel/dma-swiotlb.c | 4 ++--
arch/powerpc/kernel/dma.c | 10 ++++++----
arch/powerpc/kernel/ibmebus.c | 10 ++++++----
arch/powerpc/kernel/vio.c | 14 ++++++++------
arch/powerpc/platforms/cell/iommu.c | 16 +++++++++-------
arch/powerpc/platforms/ps3/system-bus.c | 13 +++++++------
8 files changed, 60 insertions(+), 41 deletions(-)
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index dd70fac..62678e3 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -22,9 +22,11 @@
/* Some dma direct funcs must be visible for use in other dma_ops */
extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag);
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs);
extern void dma_direct_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle);
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs);
#ifdef CONFIG_NOT_COHERENT_CACHE
@@ -130,23 +132,29 @@ static inline int dma_supported(struct device *dev, u64 mask)
extern int dma_set_mask(struct device *dev, u64 dma_mask);
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
+
+static inline void *dma_alloc_attrs(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
struct dma_map_ops *dma_ops = get_dma_ops(dev);
void *cpu_addr;
BUG_ON(!dma_ops);
- cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag);
+ cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
return cpu_addr;
}
-static inline void dma_free_coherent(struct device *dev, size_t size,
- void *cpu_addr, dma_addr_t dma_handle)
+#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
+
+static inline void dma_free_attrs(struct device *dev, size_t size,
+ void *cpu_addr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
struct dma_map_ops *dma_ops = get_dma_ops(dev);
@@ -154,7 +162,7 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
- dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
+ dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
}
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index 3f6464b..bcfdcd2 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -17,7 +17,8 @@
* to the dma address (mapping) of the first page.
*/
static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
dma_handle, dev->coherent_dma_mask, flag,
@@ -25,7 +26,8 @@ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
}
static void dma_iommu_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle);
}
@@ -105,8 +107,8 @@ static u64 dma_iommu_get_required_mask(struct device *dev)
}
struct dma_map_ops dma_iommu_ops = {
- .alloc_coherent = dma_iommu_alloc_coherent,
- .free_coherent = dma_iommu_free_coherent,
+ .alloc = dma_iommu_alloc_coherent,
+ .free = dma_iommu_free_coherent,
.map_sg = dma_iommu_map_sg,
.unmap_sg = dma_iommu_unmap_sg,
.dma_supported = dma_iommu_dma_supported,
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 1ebc918..4ab88da 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -47,8 +47,8 @@ static u64 swiotlb_powerpc_get_required(struct device *dev)
* for everything else.
*/
struct dma_map_ops swiotlb_dma_ops = {
- .alloc_coherent = dma_direct_alloc_coherent,
- .free_coherent = dma_direct_free_coherent,
+ .alloc = dma_direct_alloc_coherent,
+ .free = dma_direct_free_coherent,
.map_sg = swiotlb_map_sg_attrs,
.unmap_sg = swiotlb_unmap_sg_attrs,
.dma_supported = swiotlb_dma_supported,
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 7d0233c..b1ec983 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -26,7 +26,8 @@
void *dma_direct_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
void *ret;
#ifdef CONFIG_NOT_COHERENT_CACHE
@@ -54,7 +55,8 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size,
}
void dma_direct_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
#ifdef CONFIG_NOT_COHERENT_CACHE
__dma_free_coherent(size, vaddr);
@@ -150,8 +152,8 @@ static inline void dma_direct_sync_single(struct device *dev,
#endif
struct dma_map_ops dma_direct_ops = {
- .alloc_coherent = dma_direct_alloc_coherent,
- .free_coherent = dma_direct_free_coherent,
+ .alloc = dma_direct_alloc_coherent,
+ .free = dma_direct_free_coherent,
.map_sg = dma_direct_map_sg,
.unmap_sg = dma_direct_unmap_sg,
.dma_supported = dma_direct_dma_supported,
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index d39ae60..716d918 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -65,7 +65,8 @@ static struct of_device_id __initdata ibmebus_matches[] = {
static void *ibmebus_alloc_coherent(struct device *dev,
size_t size,
dma_addr_t *dma_handle,
- gfp_t flag)
+ gfp_t flag,
+ struct dma_attrs *attrs)
{
void *mem;
@@ -77,7 +78,8 @@ static void *ibmebus_alloc_coherent(struct device *dev,
static void ibmebus_free_coherent(struct device *dev,
size_t size, void *vaddr,
- dma_addr_t dma_handle)
+ dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
kfree(vaddr);
}
@@ -136,8 +138,8 @@ static u64 ibmebus_dma_get_required_mask(struct device *dev)
}
static struct dma_map_ops ibmebus_dma_ops = {
- .alloc_coherent = ibmebus_alloc_coherent,
- .free_coherent = ibmebus_free_coherent,
+ .alloc = ibmebus_alloc_coherent,
+ .free = ibmebus_free_coherent,
.map_sg = ibmebus_map_sg,
.unmap_sg = ibmebus_unmap_sg,
.dma_supported = ibmebus_dma_supported,
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 8b08629..2d49c32 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -487,7 +487,8 @@ static void vio_cmo_balance(struct work_struct *work)
}
static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
struct vio_dev *viodev = to_vio_dev(dev);
void *ret;
@@ -497,7 +498,7 @@ static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size,
return NULL;
}
- ret = dma_iommu_ops.alloc_coherent(dev, size, dma_handle, flag);
+ ret = dma_iommu_ops.alloc(dev, size, dma_handle, flag, attrs);
if (unlikely(ret == NULL)) {
vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE));
atomic_inc(&viodev->cmo.allocs_failed);
@@ -507,11 +508,12 @@ static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size,
}
static void vio_dma_iommu_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
struct vio_dev *viodev = to_vio_dev(dev);
- dma_iommu_ops.free_coherent(dev, size, vaddr, dma_handle);
+ dma_iommu_ops.free(dev, size, vaddr, dma_handle, attrs);
vio_cmo_dealloc(viodev, roundup(size, PAGE_SIZE));
}
@@ -612,8 +614,8 @@ static u64 vio_dma_get_required_mask(struct device *dev)
}
struct dma_map_ops vio_dma_mapping_ops = {
- .alloc_coherent = vio_dma_iommu_alloc_coherent,
- .free_coherent = vio_dma_iommu_free_coherent,
+ .alloc = vio_dma_iommu_alloc_coherent,
+ .free = vio_dma_iommu_free_coherent,
.map_sg = vio_dma_iommu_map_sg,
.unmap_sg = vio_dma_iommu_unmap_sg,
.map_page = vio_dma_iommu_map_page,
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index ae9fc7b..b9f509a 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -564,7 +564,8 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev)
/* A coherent allocation implies strong ordering */
static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
if (iommu_fixed_is_weak)
return iommu_alloc_coherent(dev, cell_get_iommu_table(dev),
@@ -572,18 +573,19 @@ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
device_to_mask(dev), flag,
dev_to_node(dev));
else
- return dma_direct_ops.alloc_coherent(dev, size, dma_handle,
- flag);
+ return dma_direct_ops.alloc(dev, size, dma_handle, flag,
+ attrs);
}
static void dma_fixed_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
if (iommu_fixed_is_weak)
iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr,
dma_handle);
else
- dma_direct_ops.free_coherent(dev, size, vaddr, dma_handle);
+ dma_direct_ops.free(dev, size, vaddr, dma_handle, attrs);
}
static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page,
@@ -642,8 +644,8 @@ static int dma_fixed_dma_supported(struct device *dev, u64 mask)
static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask);
struct dma_map_ops dma_iommu_fixed_ops = {
- .alloc_coherent = dma_fixed_alloc_coherent,
- .free_coherent = dma_fixed_free_coherent,
+ .alloc = dma_fixed_alloc_coherent,
+ .free = dma_fixed_free_coherent,
.map_sg = dma_fixed_map_sg,
.unmap_sg = dma_fixed_unmap_sg,
.dma_supported = dma_fixed_dma_supported,
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 880eb9c..5606fe3 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -515,7 +515,8 @@ core_initcall(ps3_system_bus_init);
* to the dma address (mapping) of the first page.
*/
static void * ps3_alloc_coherent(struct device *_dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
int result;
struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
@@ -552,7 +553,7 @@ clean_none:
}
static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr,
- dma_addr_t dma_handle)
+ dma_addr_t dma_handle, struct dma_attrs *attrs)
{
struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
@@ -701,8 +702,8 @@ static u64 ps3_dma_get_required_mask(struct device *_dev)
}
static struct dma_map_ops ps3_sb_dma_ops = {
- .alloc_coherent = ps3_alloc_coherent,
- .free_coherent = ps3_free_coherent,
+ .alloc = ps3_alloc_coherent,
+ .free = ps3_free_coherent,
.map_sg = ps3_sb_map_sg,
.unmap_sg = ps3_sb_unmap_sg,
.dma_supported = ps3_dma_supported,
@@ -712,8 +713,8 @@ static struct dma_map_ops ps3_sb_dma_ops = {
};
static struct dma_map_ops ps3_ioc0_dma_ops = {
- .alloc_coherent = ps3_alloc_coherent,
- .free_coherent = ps3_free_coherent,
+ .alloc = ps3_alloc_coherent,
+ .free = ps3_free_coherent,
.map_sg = ps3_ioc0_map_sg,
.unmap_sg = ps3_ioc0_unmap_sg,
.dma_supported = ps3_dma_supported,
--
1.7.1.569.g6f426
^ permalink raw reply related
* [PATCH] Hexagon: adapt for dma_map_ops changes
From: Marek Szyprowski @ 2012-02-13 10:40 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
Marek Szyprowski, linux-arch, Stephen Rothwell, Jonathan Corbet,
linux-hexagon, x86, Arnd Bergmann, microblaze-uclinux,
linaro-mm-sig, Andrzej Pietrasiewicz, Thomas Gleixner,
linux-arm-kernel, discuss, FUJITA Tomonori, Kyungmin Park,
linux-alpha, Andrew Morton, linuxppc-dev
In-Reply-To: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com>
Adapt core Hexagon architecture code for dma_map_ops changes: replace
alloc/free_coherent with generic alloc/free methods.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
Hello,
This patch adds Hexagon architecture to the DMA-mapping framework
redesign preparation patches. For more information please refer to the
following thread:
https://lkml.org/lkml/2011/12/23/97
Best regards
Marek Szyprowski
Samsung Poland R&D Center
---
arch/hexagon/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/hexagon/kernel/dma.c | 9 +++++----
2 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/arch/hexagon/include/asm/dma-mapping.h b/arch/hexagon/include/asm/dma-mapping.h
index 448b224..233ed3d 100644
--- a/arch/hexagon/include/asm/dma-mapping.h
+++ b/arch/hexagon/include/asm/dma-mapping.h
@@ -71,29 +71,35 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
return (dma_addr == bad_dma_address);
}
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t flag)
+#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
+
+static inline void *dma_alloc_attrs(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, gfp_t flag,
+ struct dma_attrs *attrs)
{
void *ret;
struct dma_map_ops *ops = get_dma_ops(dev);
BUG_ON(!dma_ops);
- ret = ops->alloc_coherent(dev, size, dma_handle, flag);
+ ret = ops->alloc(dev, size, dma_handle, flag, attrs);
debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
return ret;
}
-static inline void dma_free_coherent(struct device *dev, size_t size,
- void *cpu_addr, dma_addr_t dma_handle)
+#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
+
+static inline void dma_free_attrs(struct device *dev, size_t size,
+ void *cpu_addr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
struct dma_map_ops *dma_ops = get_dma_ops(dev);
BUG_ON(!dma_ops);
- dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
+ dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
}
diff --git a/arch/hexagon/kernel/dma.c b/arch/hexagon/kernel/dma.c
index e711ace..3730221 100644
--- a/arch/hexagon/kernel/dma.c
+++ b/arch/hexagon/kernel/dma.c
@@ -54,7 +54,8 @@ static struct gen_pool *coherent_pool;
/* Allocates from a pool of uncached memory that was reserved at boot time */
void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_addr, gfp_t flag)
+ dma_addr_t *dma_addr, gfp_t flag,
+ struct dma_attrs *attrs)
{
void *ret;
@@ -81,7 +82,7 @@ void *hexagon_dma_alloc_coherent(struct device *dev, size_t size,
}
static void hexagon_free_coherent(struct device *dev, size_t size, void *vaddr,
- dma_addr_t dma_addr)
+ dma_addr_t dma_addr, struct dma_attrs *attrs)
{
gen_pool_free(coherent_pool, (unsigned long) vaddr, size);
}
@@ -202,8 +203,8 @@ static void hexagon_sync_single_for_device(struct device *dev,
}
struct dma_map_ops hexagon_dma_ops = {
- .alloc_coherent = hexagon_dma_alloc_coherent,
- .free_coherent = hexagon_free_coherent,
+ .alloc = hexagon_dma_alloc_coherent,
+ .free = hexagon_free_coherent,
.map_sg = hexagon_map_sg,
.map_page = hexagon_map_page,
.sync_single_for_cpu = hexagon_sync_single_for_cpu,
--
1.7.1.569.g6f426
^ permalink raw reply related
* Re: [PATCH 03/14 v2] MIPS: adapt for dma_map_ops changes
From: Sergei Shtylyov @ 2012-02-13 10:41 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
linux-arch, Stephen Rothwell, Jonathan Corbet, x86, Arnd Bergmann,
microblaze-uclinux, linaro-mm-sig, Andrzej Pietrasiewicz,
Thomas Gleixner, linux-arm-kernel, discuss, linux-kernel,
FUJITA Tomonori, Kyungmin Park, linux-alpha, Andrew Morton,
linuxppc-dev
In-Reply-To: <1329129329-25205-1-git-send-email-m.szyprowski@samsung.com>
Hello.
On 13-02-2012 14:35, Marek Szyprowski wrote:
> From: Andrzej Pietrasiewicz<andrzej.p@samsung.com>
> Adapt core MIPS architecture code for dma_map_ops changes: replace
> alloc/free_coherent with generic alloc/free methods.
> Signed-off-by: Andrzej Pietrasiewicz<andrzej.p@samsung.com>
> [added missing changes to arch/mips/cavium-octeon/dma-octeon.c]
> Signed-off-by: Marek Szyprowski<m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park<kyungmin.park@samsung.com>
[...]
> diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
> index 7aa37dd..cbd41f5 100644
> --- a/arch/mips/include/asm/dma-mapping.h
> +++ b/arch/mips/include/asm/dma-mapping.h
> @@ -57,25 +57,31 @@ dma_set_mask(struct device *dev, u64 mask)
> extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
> enum dma_data_direction direction);
>
> -static inline void *dma_alloc_coherent(struct device *dev, size_t size,
> - dma_addr_t *dma_handle, gfp_t gfp)
> +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
> +
> +static inline void *dma_alloc_attrs(struct device *dev, size_t size,
> + dma_addr_t *dma_handle, gfp_t gfp,
> + struct dma_attrs *attrs)
> {
> void *ret;
> struct dma_map_ops *ops = get_dma_ops(dev);
>
> - ret = ops->alloc_coherent(dev, size, dma_handle, gfp);
> + ret = ops->alloc(dev, size, dma_handle, gfp, NULL);
Not 'attrs' instead of NULL?
>
> debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
>
> return ret;
> }
>
> -static inline void dma_free_coherent(struct device *dev, size_t size,
> - void *vaddr, dma_addr_t dma_handle)
> +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
> +
> +static inline void dma_free_attrs(struct device *dev, size_t size,
> + void *vaddr, dma_addr_t dma_handle,
> + struct dma_attrs *attrs)
> {
> struct dma_map_ops *ops = get_dma_ops(dev);
>
> - ops->free_coherent(dev, size, vaddr, dma_handle);
> + ops->free(dev, size, vaddr, dma_handle, NULL);
Same here...
WBR, Sergei
^ permalink raw reply
* [PATCH 03/14 v3] MIPS: adapt for dma_map_ops changes
From: Marek Szyprowski @ 2012-02-13 12:41 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
Marek Szyprowski, linux-arch, Stephen Rothwell, Jonathan Corbet,
x86, Arnd Bergmann, microblaze-uclinux, linaro-mm-sig,
Andrzej Pietrasiewicz, Thomas Gleixner, linux-arm-kernel, discuss,
FUJITA Tomonori, Kyungmin Park, linux-alpha, Andrew Morton,
linuxppc-dev
In-Reply-To: <4F38E8E1.3070004@mvista.com>
From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Adapt core MIPS architecture code for dma_map_ops changes: replace
alloc/free_coherent with generic alloc/free methods.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
[added missing changes to arch/mips/cavium-octeon/dma-octeon.c,
fixed attrs argument in dma-mapping.h]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/mips/cavium-octeon/dma-octeon.c | 16 ++++++++--------
arch/mips/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/mips/mm/dma-default.c | 8 ++++----
3 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index b6bb92c..df70600 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -157,7 +157,7 @@ static void octeon_dma_sync_sg_for_device(struct device *dev,
}
static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t gfp)
+ dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)
{
void *ret;
@@ -184,7 +184,7 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
/* Don't invoke OOM killer */
gfp |= __GFP_NORETRY;
- ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
+ ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp, attrs);
mb();
@@ -192,14 +192,14 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
}
static void octeon_dma_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+ void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs)
{
int order = get_order(size);
if (dma_release_from_coherent(dev, order, vaddr))
return;
- swiotlb_free_coherent(dev, size, vaddr, dma_handle);
+ swiotlb_free_coherent(dev, size, vaddr, dma_handle, attrs);
}
static dma_addr_t octeon_unity_phys_to_dma(struct device *dev, phys_addr_t paddr)
@@ -240,8 +240,8 @@ EXPORT_SYMBOL(dma_to_phys);
static struct octeon_dma_map_ops octeon_linear_dma_map_ops = {
.dma_map_ops = {
- .alloc_coherent = octeon_dma_alloc_coherent,
- .free_coherent = octeon_dma_free_coherent,
+ .alloc = octeon_dma_alloc_coherent,
+ .free = octeon_dma_free_coherent,
.map_page = octeon_dma_map_page,
.unmap_page = swiotlb_unmap_page,
.map_sg = octeon_dma_map_sg,
@@ -325,8 +325,8 @@ void __init plat_swiotlb_setup(void)
#ifdef CONFIG_PCI
static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = {
.dma_map_ops = {
- .alloc_coherent = octeon_dma_alloc_coherent,
- .free_coherent = octeon_dma_free_coherent,
+ .alloc = octeon_dma_alloc_coherent,
+ .free = octeon_dma_free_coherent,
.map_page = octeon_dma_map_page,
.unmap_page = swiotlb_unmap_page,
.map_sg = octeon_dma_map_sg,
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 7aa37dd..be39a12 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -57,25 +57,31 @@ dma_set_mask(struct device *dev, u64 mask)
extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction);
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t *dma_handle, gfp_t gfp)
+#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
+
+static inline void *dma_alloc_attrs(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, gfp_t gfp,
+ struct dma_attrs *attrs)
{
void *ret;
struct dma_map_ops *ops = get_dma_ops(dev);
- ret = ops->alloc_coherent(dev, size, dma_handle, gfp);
+ ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
return ret;
}
-static inline void dma_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
+#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
+
+static inline void dma_free_attrs(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle,
+ struct dma_attrs *attrs)
{
struct dma_map_ops *ops = get_dma_ops(dev);
- ops->free_coherent(dev, size, vaddr, dma_handle);
+ ops->free(dev, size, vaddr, dma_handle, attrs);
debug_dma_free_coherent(dev, size, vaddr, dma_handle);
}
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 4608491..3fab204 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -98,7 +98,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size,
EXPORT_SYMBOL(dma_alloc_noncoherent);
static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t * dma_handle, gfp_t gfp)
+ dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
{
void *ret;
@@ -132,7 +132,7 @@ void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
EXPORT_SYMBOL(dma_free_noncoherent);
static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
- dma_addr_t dma_handle)
+ dma_addr_t dma_handle, struct dma_attrs *attrs)
{
unsigned long addr = (unsigned long) vaddr;
int order = get_order(size);
@@ -323,8 +323,8 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
EXPORT_SYMBOL(dma_cache_sync);
static struct dma_map_ops mips_default_dma_map_ops = {
- .alloc_coherent = mips_dma_alloc_coherent,
- .free_coherent = mips_dma_free_coherent,
+ .alloc = mips_dma_alloc_coherent,
+ .free = mips_dma_free_coherent,
.map_page = mips_dma_map_page,
.unmap_page = mips_dma_unmap_page,
.map_sg = mips_dma_map_sg,
--
1.7.1.569.g6f426
^ permalink raw reply related
* Re: Boot failure with next-20120208
From: Arjan van de Ven @ 2012-02-13 14:18 UTC (permalink / raw)
To: Michael Neuling
Cc: Stephen Rothwell, gregkh, LKML, Milton Miller, linux-next,
Andrew Morton, ppc-dev
In-Reply-To: <16788.1329102254@neuling.org>
On 2/12/2012 7:04 PM, Michael Neuling wrote:
>> Just a quick note to say I got a boot OOPs with next-20120208 and 9 on a
>> Power7 blade (my other PowerPC boot tests are ok. I'll investigate this
>> further on Monday.
>>
>> The line referenced below is:
>>
>> BUG_ON(!kobj || !kobj->sd || !attr);
>>
>> in sysfs_create_file().
>>
>> calling .topology_init+0x0/0x1ac @ 1
>> initcall 7_.async_cpu_up+0x0/0x40 returned 0 after 9765 usecs
>> async_continuing @ 20 after 9765 usec
>> ------------[ cut here ]------------
>> kernel BUG at fs/sysfs/file.c:573!
>> Oops: Exception in kernel mode, sig: 5 [#1]
>> SMP NR_CPUS=32 NUMA pSeries
>> Modules linked in:
>> NIP: c00000000024a35c LR: c0000000004ee050 CTR: c00000000083ca24
>> REGS: c0000003fd9e7560 TRAP: 0700 Not tainted (3.3.0-rc2-autokern1)
>> MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI> CR: 88002082 XER: 0000000f
>> CFAR: c00000000024a370
>> TASK = c0000003fd9e8000[20] 'kworker/u:6' THREAD: c0000003fd9e4000 CPU: 0
>> GPR00: 0000000000000001 c0000003fd9e77e0 c000000000d19bb8 0000000000000000
>> GPR04: c000000000bf37a8 0000000000000008 8000000002096400 0000000000000000
>> GPR08: 0000000000000000 c000000000f80028 c000000000d52bd8 0000000000000000
>> GPR12: 0000000048002088 c00000000f33b000 0000000001affa78 00000000009aa000
>> GPR16: 0000000000e1f3c8 0000000002d517f0 0000000001aff984 0000000000000060
>> GPR20: 0000000000000000 ffffffffffffffff 0000000000000000 c000000000c45128
>> GPR24: 0000000000000000 0000000000000008 0000000000000000 c000000000c44200
>> GPR28: c000000000f80028 0000000000000008 c000000000c85038 0000000000000002
>> NIP [c00000000024a35c] .sysfs_create_file+0x1c/0x40
>> LR [c0000000004ee050] .device_create_file+0x20/0x40
>> Call Trace:
>> [c0000003fd9e77e0] [c0000003fd9e78a0] 0xc0000003fd9e78a0 (unreliable)
>> [c0000003fd9e7850] [c00000000083c9a4] .register_cpu_online+0x1d0/0x250
>> [c0000003fd9e7900] [c00000000083ca8c] .sysfs_cpu_notify+0x68/0x28c
>> [c0000003fd9e79b0] [c00000000083769c] .notifier_call_chain+0x9c/0x100
>> [c0000003fd9e7a50] [c0000000000a5878] .__cpu_notify+0x38/0x80
>> [c0000003fd9e7ad0] [c00000000083e124] ._cpu_up+0x10c/0x178
>> [c0000003fd9e7b90] [c00000000083e2c8] .cpu_up+0x138/0x164
>> [c0000003fd9e7c20] [c000000000ba46d0] .async_cpu_up+0x28/0x40
>> [c0000003fd9e7ca0] [c0000000000d81ec] .async_run_entry_fn+0xbc/0x1f0
>> [c0000003fd9e7d50] [c0000000000c7cbc] .process_one_work+0x19c/0x590
>> [c0000003fd9e7e10] [c0000000000c8618] .worker_thread+0x188/0x4b0
>> [c0000003fd9e7ed0] [c0000000000ce57c] .kthread+0xbc/0xd0
>> [c0000003fd9e7f90] [c000000000021448] .kernel_thread+0x54/0x70
>> Instruction dump:
>> 7fa3eb78 ebe1fff8 eba1ffe8 7c0803a6 4e800020 2c230000 41820024 e8630030
>> 7c800074 7800d182 2fa30000 419e0014 <0b000000> 38a00002 4bfffebc e8630030
>> ---[ end trace 31fd0ba7d8756001 ]---
>> initcall .topology_init+0x0/0x1ac returned 0 after 0 usecs
>> calling .pcibios_init+0x0/0xe8 @ 1
>> PCI: Probing PCI hardware
>> PCI: Probing PCI hardware done
>> initcall .pcibios_init+0x0/0xe8 returned 0 after 0 usecs
>> calling .add_system_ram_resources+0x0/0x140 @ 1
>> initcall .add_system_ram_resources+0x0/0x140 returned 0 after 0 usecs
>> calling .__machine_initcall_powermac_pmac_i2c_create_platform_devices+0x0/0xc8 @ 1
>> initcall .__machine_initcall_powermac_pmac_i2c_create_platform_devices+0x0/0xc8 returned 0 after 0 usecs
>> calling .opal_init+0x0/0x1cc @ 1
>> opal: Node not found
>> initcall .opal_init+0x0/0x1cc returned -19 after 0 usecs
>> calling .__machine_initcall_pseries_ioei_init+0x0/0xa0 @ 1
>
> Reverting "smp: start up non-boot CPUs asynchronously" (8de7a96405 from
> next-20120208) fixes this problem for me.
>
if that fixes it, it means PPC has a race somewhere in the cpu hotplug
code, since all the patch does is hotplug the cpus one by one (which the
normal kernel also does, just not in parallel with other work)
^ permalink raw reply
* Re: [PATCH 1/2 v3] powerpc/85xx: Add Quicc Engine support for p1025rdb
From: Tabi Timur-B04825 @ 2012-02-13 16:22 UTC (permalink / raw)
To: Fan Zhicheng-B32736; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1329111208-5320-1-git-send-email-B32736@freescale.com>
On Sun, Feb 12, 2012 at 11:33 PM, Zhicheng Fan <B32736@freescale.com> wrote=
:
> From: Zhicheng Fan <b32736@freescale.com>
>
> Signed-off-by: Zhicheng Fan <b32736@freescale.com>
> ---
> =A0arch/powerpc/platforms/85xx/mpc85xx_rdb.c | =A0 78 +++++++++++++++++++=
+++++++++-
> =A01 files changed, 77 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/pla=
tforms/85xx/mpc85xx_rdb.c
> index e95aef7..c9dfdcc 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> @@ -26,6 +26,9 @@
> =A0#include <asm/prom.h>
> =A0#include <asm/udbg.h>
> =A0#include <asm/mpic.h>
> +#include <asm/qe.h>
> +#include <asm/qe_ic.h>
> +#include <asm/fsl_guts.h>
>
> =A0#include <sysdev/fsl_soc.h>
> =A0#include <sysdev/fsl_pci.h>
> @@ -47,6 +50,10 @@ void __init mpc85xx_rdb_pic_init(void)
> =A0 =A0 =A0 =A0struct mpic *mpic;
> =A0 =A0 =A0 =A0unsigned long root =3D of_get_flat_dt_root();
>
> +#ifdef CONFIG_QUICC_ENGINE
> + =A0 =A0 =A0 struct device_node *np;
> +#endif
> +
> =A0 =A0 =A0 =A0if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP"))=
{
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mpic =3D mpic_alloc(NULL, 0,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0MPIC_BIG_ENDIAN | MPIC_BRO=
KEN_FRR_NIRQS |
> @@ -62,6 +69,18 @@ void __init mpc85xx_rdb_pic_init(void)
>
> =A0 =A0 =A0 =A0BUG_ON(mpic =3D=3D NULL);
> =A0 =A0 =A0 =A0mpic_init(mpic);
> +
> +#ifdef CONFIG_QUICC_ENGINE
> + =A0 =A0 =A0 np =3D of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> + =A0 =A0 =A0 if (np) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 qe_ic_casca=
de_high_mpic);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 of_node_put(np);
> +
> + =A0 =A0 =A0 } else
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("%s: Could not find qe-ic node\n", _=
_func__);
> +#endif
> +
> =A0}
>
> =A0/*
> @@ -69,7 +88,7 @@ void __init mpc85xx_rdb_pic_init(void)
> =A0*/
> =A0static void __init mpc85xx_rdb_setup_arch(void)
> =A0{
> -#ifdef CONFIG_PCI
> +#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
> =A0 =A0 =A0 =A0struct device_node *np;
> =A0#endif
>
> @@ -85,6 +104,63 @@ static void __init mpc85xx_rdb_setup_arch(void)
> =A0#endif
>
> =A0 =A0 =A0 =A0mpc85xx_smp_init();
> +
> +#ifdef CONFIG_QUICC_ENGINE
> + =A0 =A0 =A0 np =3D of_find_compatible_node(NULL, NULL, "fsl,qe");
> + =A0 =A0 =A0 if (!np) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("%s: Could not find Quicc Engine nod=
e\n", __func__);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 goto qe_fail;
> + =A0 =A0 =A0 }
> +
> + =A0 =A0 =A0 qe_reset();
> + =A0 =A0 =A0 of_node_put(np);
> +
> + =A0 =A0 =A0 np =3D of_find_node_by_name(NULL, "par_io");
> + =A0 =A0 =A0 if (np) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct device_node *ucc;
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 par_io_init(np);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 of_node_put(np);
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 for_each_node_by_name(ucc, "ucc")
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 par_io_of_config(ucc);
> +
> + =A0 =A0 =A0 }
> + =A0 =A0 =A0 if (machine_is(p1025_rdb)) {
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct ccsr_guts_85xx __iomem *guts;
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 np =3D of_find_node_by_name(NULL, "global-u=
tilities");
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (np) {
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 guts =3D of_iomap(np, 0);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!guts) {
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("mpc=
85xx-rdb: could not map global utilties register!\n");
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else {
> +#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
This #if should be above the " if (machine_is(p1025_rdb)) {" line.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* P1025 has pins muxed for=
QE and other functions. To
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * enable QE UEC mode, we ne=
ed to set bit QE0 for UCC1
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * in Eth mode, QE0 and QE3 =
for UCC5 in Eth mode, QE9
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * and QE12 for QE MII manag=
ement singals in PMUXCR
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * register.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 */
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 setbits32(&=
guts->pmuxcr, MPC85xx_PMUXCR_QE0 |
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 MPC85xx_PMUXCR_QE3 |
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 MPC85xx_PMUXCR_QE9 |
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 MPC85xx_PMUXCR_QE12);
> +#endif
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(guts);
Put the iounmap() call inside the "else" bracket:
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE0 =
|
MPC85xx_PMUXCR_QE3 |
MPC85xx_PMUXCR_QE9 |
MPC85xx_PMUXCR_QE12);
iounmap(guts);
}
You're not really paying attention to the code that you're writing.
Please take a good look at your code before you paste it.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH 2/2 v3] powerpc/85xx: Abstract common define of signal multiplex control for qe
From: Tabi Timur-B04825 @ 2012-02-13 16:24 UTC (permalink / raw)
To: Fan Zhicheng-B32736; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1329111208-5320-2-git-send-email-B32736@freescale.com>
On Sun, Feb 12, 2012 at 11:33 PM, Zhicheng Fan <B32736@freescale.com> wrote=
:=0A=
=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (np) {=0A=
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 pmuxcr =3D of_iomap(np, 0) =
+ MPC85xx_PMUXCR_OFFSET;=0A=
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 guts =3D of_iomap(np, 0);=
=0A=
>=0A=
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!pmuxcr)=0A=
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 printk(KERN=
_EMERG "Error: Alternate function"=0A=
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 " signal multiplex control register not"=0A=
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 " mapped!\n");=0A=
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!guts)=0A=
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 pr_err("mpc=
85xx-rdb: could not map global utilties register!\n");=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0else=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* P1021 has pins muxed fo=
r QE and other functions. To=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * enable QE UEC mode, we =
need to set bit QE0 for UCC1=0A=
> @@ -291,11 +286,11 @@ static void __init mpc85xx_mds_qe_init(void)=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * and QE12 for QE MII man=
agement signals in PMUXCR=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 * register.=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 */=0A=
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 setbits32(p=
muxcr, MPC85xx_PMUXCR_QE0 |=0A=
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 setbits32(&=
guts->pmuxcr, MPC85xx_PMUXCR_QE0 |=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0 =A0MPC85xx_PMUXCR_QE3 |=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0 =A0MPC85xx_PMUXCR_QE9 |=0A=
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0 =A0 =A0 =A0 =A0 =A0MPC85xx_PMUXCR_QE12);=0A=
> -=0A=
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(guts);=0A=
=0A=
This needs to move into the "else" statement:=0A=
=0A=
else {=0A=
setbits(...=0A=
iounmap( ...)=0A=
}=0A=
=0A=
=0A=
-- =0A=
Timur Tabi=0A=
Linux kernel developer at Freescale=0A=
^ permalink raw reply
* Re: [PATCH 2/2 v3] powerpc/dts: Add dts for p1025rdb board
From: Tabi Timur-B04825 @ 2012-02-13 16:40 UTC (permalink / raw)
To: Fan Zhicheng-B32736; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1328869096-23994-2-git-send-email-B32736@freescale.com>
On Fri, Feb 10, 2012 at 4:18 AM, Zhicheng Fan <B32736@freescale.com> wrote:
>
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 local-mac-address =3D [ 00 =
00 00 00 00 00 ];
This doesn't belong in the DTS.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
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