* [PATCH 7/9] powerpc/mpc8548cds: fix alias in mpc8548si-pre.dtsi
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
Correct ethernet1 and add ethernet2 and ethernet3.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
index 289f121..720422d 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
@@ -43,7 +43,9 @@
serial0 = &serial0;
serial1 = &serial1;
ethernet0 = &enet0;
- ethernet1 = &enet2;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
--
1.6.4.1
^ permalink raw reply related
* [PATCH 5/9] powerpc/mpc8548cds: Add RapidIO node to dts
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Enable RapidIO and add rapidio and rmu nodes to dts.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi | 16 ++++++++++++++++
arch/powerpc/boot/dts/mpc8548cds.dts | 7 +++++++
arch/powerpc/platforms/85xx/Kconfig | 1 +
3 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
index 9d8023a..579d76c 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
@@ -89,6 +89,21 @@
};
};
+&rio {
+ compatible = "fsl,srio";
+ interrupts = <48 2 0 0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ fsl,srio-rmu-handle = <&rmu>;
+ ranges;
+
+ port1 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ cell-index = <1>;
+ };
+};
+
&soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -134,6 +149,7 @@
/include/ "pq3-sec2.1-0.dtsi"
/include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
global-utilities@e0000 {
compatible = "fsl,mpc8548-guts";
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index c3c8741..8d4df8e 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -339,6 +339,13 @@
0x0 0x100000>;
};
};
+
+ rio: rapidio@e00c0000 {
+ reg = <0x0 0xe00c0000 0x0 0x20000>;
+ port1 {
+ ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+ };
+ };
};
/include/ "fsl/mpc8548si-post.dtsi"
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index d7946be..631dfd8 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -30,6 +30,7 @@ config MPC85xx_CDS
bool "Freescale MPC85xx CDS"
select DEFAULT_UIMAGE
select PPC_I8259
+ select HAS_RAPIDIO
help
This option enables support for the MPC85xx CDS board
--
1.6.4.1
^ permalink raw reply related
* [PATCH 4/9] powerpc/mpc8548cds: Add NOR flash node to dts
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/mpc8548cds.dts | 40 +++++++++++++++++++++++++++++++++-
1 files changed, 39 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 07b8dae..c3c8741 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -1,7 +1,7 @@
/*
* MPC8548 CDS Device Tree Source
*
- * Copyright 2006, 2008 Freescale Semiconductor Inc.
+ * Copyright 2006, 2008, 2011 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -34,6 +34,44 @@
lbc: localbus@e0005000 {
reg = <0 0xe0005000 0 0x1000>;
+
+ ranges = <0x0 0x0 0x0 0xff000000 0x01000000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x01000000>;
+ bank-width = <2>;
+ device-width = <2>;
+
+ partition@0 {
+ reg = <0x0 0x0b00000>;
+ label = "ramdisk-nor";
+ };
+
+ partition@300000 {
+ reg = <0x0b00000 0x0400000>;
+ label = "kernel-nor";
+ };
+
+ partition@700000 {
+ reg = <0x0f00000 0x060000>;
+ label = "dtb-nor";
+ };
+
+ partition@760000 {
+ reg = <0x0f60000 0x020000>;
+ label = "env-nor";
+ read-only;
+ };
+
+ partition@780000 {
+ reg = <0x0f80000 0x080000>;
+ label = "u-boot-nor";
+ read-only;
+ };
+ };
};
soc: soc8548@e0000000 {
--
1.6.4.1
^ permalink raw reply related
* [PATCH 6/9] powerpc/mpc8548cds: Add FPGA node to dts
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Remove FPGA(CADMUS) macros in code. Move it to dts.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/mpc8548cds.dts | 8 ++++-
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 50 +++++++++++++++++++---------
2 files changed, 41 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 8d4df8e..0683983 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -35,7 +35,8 @@
lbc: localbus@e0005000 {
reg = <0 0xe0005000 0 0x1000>;
- ranges = <0x0 0x0 0x0 0xff000000 0x01000000>;
+ ranges = <0x0 0x0 0x0 0xff000000 0x01000000
+ 0x1 0x0 0x0 0xf8004000 0x00001000>;
nor@0,0 {
#address-cells = <1>;
@@ -72,6 +73,11 @@
read-only;
};
};
+
+ board-control@1,0 {
+ compatible = "fsl,mpc8548cds-fpga";
+ reg = <0x1 0x0 0x1000>;
+ };
};
soc: soc8548@e0000000 {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index c009c5b..a600dd0 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -48,17 +48,24 @@
#include "mpc85xx.h"
-/* CADMUS info */
-/* xxx - galak, move into device tree */
-#define CADMUS_BASE (0xf8004000)
-#define CADMUS_SIZE (256)
-#define CM_VER (0)
-#define CM_CSR (1)
-#define CM_RST (2)
-
+/*
+ * The CDS board contains an FPGA/CPLD called "Cadmus", which collects
+ * various logic and performs system control functions.
+ * Here is the FPGA/CPLD register map.
+ */
+struct cadmus_reg {
+ u8 cm_ver; /* Board version */
+ u8 cm_csr; /* General control/status */
+ u8 cm_rst; /* Reset control */
+ u8 cm_hsclk; /* High speed clock */
+ u8 cm_hsxclk; /* High speed clock extended */
+ u8 cm_led; /* LED data */
+ u8 cm_pci; /* PCI control/status */
+ u8 cm_dma; /* DMA control */
+ u8 res[248]; /* Total 256 bytes */
+};
-static int cds_pci_slot = 2;
-static volatile u8 *cadmus;
+static struct cadmus_reg *cadmus;
#ifdef CONFIG_PCI
@@ -274,20 +281,30 @@ machine_device_initcall(mpc85xx_cds, mpc85xx_cds_8259_attach);
*/
static void __init mpc85xx_cds_setup_arch(void)
{
-#ifdef CONFIG_PCI
struct device_node *np;
-#endif
+ int cds_pci_slot;
if (ppc_md.progress)
ppc_md.progress("mpc85xx_cds_setup_arch()", 0);
- cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
- cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc8548cds-fpga");
+ if (!np) {
+ pr_err("Could not find FPGA node.\n");
+ return;
+ }
+
+ cadmus = of_iomap(np, 0);
+ of_node_put(np);
+ if (!cadmus) {
+ pr_err("Fail to map FPGA area.\n");
+ return;
+ }
if (ppc_md.progress) {
char buf[40];
+ cds_pci_slot = ((in_8(&cadmus->cm_csr) >> 6) & 0x3) + 1;
snprintf(buf, 40, "CDS Version = 0x%x in slot %d\n",
- cadmus[CM_VER], cds_pci_slot);
+ in_8(&cadmus->cm_ver), cds_pci_slot);
ppc_md.progress(buf, 0);
}
@@ -317,7 +334,8 @@ static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
svid = mfspr(SPRN_SVR);
seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
- seq_printf(m, "Machine\t\t: MPC85xx CDS (0x%x)\n", cadmus[CM_VER]);
+ seq_printf(m, "Machine\t\t: MPC85xx CDS (0x%x)\n",
+ in_8(&cadmus->cm_ver));
seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
seq_printf(m, "SVR\t\t: 0x%x\n", svid);
--
1.6.4.1
^ permalink raw reply related
* [PATCH 3/9] l2sram: Add compatible entry for mpc8548
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
index 5f88797..2503cef 100644
--- a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
+++ b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
@@ -200,6 +200,9 @@ static struct of_device_id mpc85xx_l2ctlr_of_match[] = {
{
.compatible = "fsl,p1022-l2-cache-controller",
},
+ {
+ .compatible = "fsl,mpc8548-l2-cache-controller",
+ },
{},
};
--
1.6.4.1
^ permalink raw reply related
* [PATCH 2/9] powerpc/mpc85xxcds: Fix PCI I/O space resource of PCI bridge
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
From: chenhui zhao <chenhui.zhao@freescale.com>
There is a PCI bridge(Tsi310) between the MPC8548 and a VIA
southbridge chip.
The bootloader sets the PCI bridge to open a window from 0x0000
to 0x1fff on the PCI I/O space. But the kernel can't set the I/O
resource. In the routine pci_read_bridge_io(), if the base which
is read from PCI_IO_BASE is equal to zero, the routine don't set
the I/O resource of the child bus.
To allow the legacy I/O space on the VIA southbridge to be accessed,
use the fixup to fix the PCI I/O space of the PCI bridge.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 29 +++++++++++++++++++++++++++--
1 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 40f03da..c009c5b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -3,7 +3,7 @@
*
* Maintained by Kumar Gala (see MAINTAINERS for contact information)
*
- * Copyright 2005 Freescale Semiconductor Inc.
+ * Copyright 2005, 2011-2012 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -158,6 +158,31 @@ DECLARE_PCI_FIXUP_EARLY(0x1957, 0x3fff, skip_fake_bridge);
DECLARE_PCI_FIXUP_EARLY(0x3fff, 0x1957, skip_fake_bridge);
DECLARE_PCI_FIXUP_EARLY(0xff3f, 0x5719, skip_fake_bridge);
+/*
+ * Fix Tsi310 PCI-X bridge resource.
+ * Force the bridge to open a window from 0x0000-0x1fff in PCI I/O space.
+ * This allows legacy I/O(i8259, etc) on the VIA southbridge to be accessed.
+ */
+void mpc85xx_cds_fixup_bus(struct pci_bus *bus)
+{
+ struct pci_dev *dev = bus->self;
+ struct resource *res = bus->resource[0];
+
+ if (dev != NULL &&
+ dev->vendor == PCI_VENDOR_ID_IBM &&
+ dev->device == PCI_DEVICE_ID_IBM_PCIX_BRIDGE) {
+ if (res) {
+ res->start = 0;
+ res->end = 0x1fff;
+ res->flags = IORESOURCE_IO;
+ pr_info("mpc85xx_cds: PCI bridge resource fixup applied\n");
+ pr_info("mpc85xx_cds: %pR\n", res);
+ }
+ }
+
+ fsl_pcibios_fixup_bus(bus);
+}
+
#ifdef CONFIG_PPC_I8259
static void mpc85xx_8259_cascade_handler(unsigned int irq,
struct irq_desc *desc)
@@ -323,7 +348,7 @@ define_machine(mpc85xx_cds) {
.get_irq = mpic_get_irq,
#ifdef CONFIG_PCI
.restart = mpc85xx_cds_restart,
- .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+ .pcibios_fixup_bus = mpc85xx_cds_fixup_bus,
#else
.restart = fsl_rstcr_restart,
#endif
--
1.6.4.1
^ permalink raw reply related
* [PATCH 1/9] pci_ids: Add device ID for IBM PCI-X bridge
From: Zhao Chenhui @ 2012-03-06 9:05 UTC (permalink / raw)
To: linuxppc-dev, linux-pci
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
---
include/linux/pci_ids.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 31d77af..8f026c0 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -484,6 +484,7 @@
#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251
#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE 0x0361
#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252
+#define PCI_DEVICE_ID_IBM_PCIX_BRIDGE 0x01a7
#define PCI_SUBVENDOR_ID_IBM 0x1014
#define PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT 0x03d4
--
1.6.4.1
^ permalink raw reply related
* Re: [PATCH 6/9] dmaengine: consolidate tx_status functions
From: Russell King - ARM Linux @ 2012-03-06 8:59 UTC (permalink / raw)
To: H Hartley Sweeten
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Vinod Koul, Zhang Wei, Barry Song, Dan Williams,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <ADE657CA350FB648AAC2C43247A983F001F41FF555BD@AUSP01VMBX24.collaborationhost.net>
On Mon, Mar 05, 2012 at 06:12:50PM -0600, H Hartley Sweeten wrote:
> On Monday, March 05, 2012 1:17 PM, Russell King wrote:
> > diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h
> > index 47e0997..244a2c5 100644
> > --- a/drivers/dma/dmaengine.h
> > +++ b/drivers/dma/dmaengine.h
> > @@ -45,4 +45,35 @@ static inline void dma_cookie_complete(struct dma_async_tx_descriptor *tx)
> > tx->cookie = 0;
> > }
> >
> > +/**
> > + * dma_cookie_status - report cookie status
> > + * @chan: dma channel
> > + * @cookie: cookie we are interested in
> > + * @state: dma_tx_state structure to return last/used cookies
> > + *
> > + * Report the status of the cookie, filling in the state structure if
> > + * non-NULL. No locking is required.
> > + */
> > +static inline enum dma_status dma_cookie_status(struct dma_chan *chan,
> > + dma_cookie_t cookie, struct dma_tx_state *state)
> > +{
> > + dma_cookie_t used, complete;
> > +
> > + used = chan->cookie;
> > + complete = chan->complete;
> > + barrier();
> > + if (state) {
> > + state->last = complete;
> > + state->used = used;
> > + state->residue = 0;
> > + }
>
> Isn't this dma_set_tx_state()?
It's more than dma_set_tx_state(). It is my intention to get rid of
dma_set_tx_state() in favour of these implementations.
> > + return dma_async_is_complete(cookie, complete, used);
> > +}
>
> Regards,
> Hartley
>
^ permalink raw reply
* [PATCH] powerpc/dts: fix the compatible string of sec 4.0
From: Shengzhou Liu @ 2012-03-06 7:21 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Liu Shuo, Shengzhou Liu
From: Liu Shuo <shuo.liu@freescale.com>
Fix the compatible string of sec 4.0 to match with CAMM driver according
to the documentation file Documentation/devicetree/bindings/crypto/fsl-sec4.txt.
Signed-off-by: Liu Shuo <shuo.liu@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
against master branch of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
index bf957a7..d4c9d5d 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
@@ -33,32 +33,32 @@
*/
crypto@30000 {
- compatible = "fsl,sec4.4", "fsl,sec4.0";
+ compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x30000 0x10000>;
interrupts = <58 2 0 0>;
sec_jr0: jr@1000 {
- compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+ compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x1000 0x1000>;
interrupts = <45 2 0 0>;
};
sec_jr1: jr@2000 {
- compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+ compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x2000 0x1000>;
interrupts = <45 2 0 0>;
};
sec_jr2: jr@3000 {
- compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+ compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x3000 0x1000>;
interrupts = <45 2 0 0>;
};
sec_jr3: jr@4000 {
- compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+ compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring";
reg = <0x4000 0x1000>;
interrupts = <45 2 0 0>;
};
--
1.7.0.4
^ permalink raw reply related
* Re: [1/2] powerpc/44x: Fix PCI MSI support for APM821xx SoC and Bluestone board
From: Benjamin Herrenschmidt @ 2012-03-06 7:11 UTC (permalink / raw)
To: Milton Miller
Cc: Michael Neuling, open-source-review, Tirumala R Marri,
linux-kernel, Josh Boyer, Anton Blanchard, Mai La, Paul Mackerras,
linuxppc-dev
In-Reply-To: <bluehawk-msi-use-upper-lower-32@mdm.bga.com>
On Mon, 2012-03-05 at 22:37 -0600, Milton Miller wrote:
> On Mon, 05 Mar 2012 about 17:29:41 -0000, Mai La wrote:
> >
> > @@ -43,7 +43,12 @@
> > #define PEIH_FLUSH0 0x30
> > #define PEIH_FLUSH1 0x38
> > #define PEIH_CNTRST 0x48
> > +
> > +#ifdef CONFIG_APM821xx
> > +#define NR_MSI_IRQS 8
> > +#else
> > #define NR_MSI_IRQS 4
> > +#endif
> >
>
> does this need to go into the dts binding?
A compile time #define is definitely not acceptable as it would break a
multiplatform kernel.
Ben.
> > struct ppc4xx_msi {
> > u32 msi_addr_lo;
> > @@ -150,12 +155,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
> > if (!sdr_addr)
> > return -1;
> >
> > - SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> > - SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
> > -
> > + mtdcri(SDR0, *sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> > + mtdcri(SDR0, *sdr_addr + 1, res.start & 0xFFFFFFFF);/* Low addr */
>
> Please use upper_32_bits and lower_32_bits from linux/kernel.h
>
> > msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
> > - if (msi->msi_dev)
> > + if (!msi->msi_dev)
> > return -ENODEV;
> >
> > msi->msi_regs = of_iomap(msi->msi_dev, 0);
> > @@ -167,9 +171,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
> > (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
> >
> > msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
> > - msi->msi_addr_hi = 0x0;
> > - msi->msi_addr_lo = (u32) msi_phys;
> > - dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
> > + if (!msi_virt)
> > + return -ENOMEM;
> > + msi->msi_addr_hi = (u32)(msi_phys >> 32);
> > + msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);
>
> ditto
>
>
> milton
^ permalink raw reply
* Re: [1/2] powerpc/44x: Fix PCI MSI support for APM821xx SoC and Bluestone board
From: Milton Miller @ 2012-03-06 4:37 UTC (permalink / raw)
To: Mai La
Cc: Michael Neuling, open-source-review, Tirumala R Marri,
linux-kernel, Josh Boyer, Anton Blanchard, Paul Mackerras,
linuxppc-dev
In-Reply-To: <1331004581-23795-1-git-send-email-mla@apm.com>
On Mon, 05 Mar 2012 about 17:29:41 -0000, Mai La wrote:
>
> @@ -43,7 +43,12 @@
> #define PEIH_FLUSH0 0x30
> #define PEIH_FLUSH1 0x38
> #define PEIH_CNTRST 0x48
> +
> +#ifdef CONFIG_APM821xx
> +#define NR_MSI_IRQS 8
> +#else
> #define NR_MSI_IRQS 4
> +#endif
>
does this need to go into the dts binding?
> struct ppc4xx_msi {
> u32 msi_addr_lo;
> @@ -150,12 +155,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
> if (!sdr_addr)
> return -1;
>
> - SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> - SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
> -
> + mtdcri(SDR0, *sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> + mtdcri(SDR0, *sdr_addr + 1, res.start & 0xFFFFFFFF);/* Low addr */
Please use upper_32_bits and lower_32_bits from linux/kernel.h
> msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
> - if (msi->msi_dev)
> + if (!msi->msi_dev)
> return -ENODEV;
>
> msi->msi_regs = of_iomap(msi->msi_dev, 0);
> @@ -167,9 +171,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
> (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
>
> msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
> - msi->msi_addr_hi = 0x0;
> - msi->msi_addr_lo = (u32) msi_phys;
> - dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
> + if (!msi_virt)
> + return -ENOMEM;
> + msi->msi_addr_hi = (u32)(msi_phys >> 32);
> + msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);
ditto
milton
^ permalink raw reply
* [PATCH 2/2] powerpc/44x: Add PCI MSI node for APM821xx SoC and Bluestone board in DTS
From: Mai La @ 2012-03-06 3:30 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Josh Boyer, Matt Porter,
Tirumala R Marri, Grant Likely, Michael Neuling, Kumar Gala,
Anton Blanchard, linuxppc-dev, linux-kernel
Cc: open-source-review, Mai La
Signed-off-by: Mai La <mla@apm.com>
---
arch/powerpc/boot/dts/bluestone.dts | 24 ++++++++++++++++++++++++
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
index 2a56a0d..8ea6325 100644
--- a/arch/powerpc/boot/dts/bluestone.dts
+++ b/arch/powerpc/boot/dts/bluestone.dts
@@ -250,5 +250,29 @@
};
};
+ MSI: ppc4xx-msi@C10000000 {
+ compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+ reg = < 0xC 0x10000000 0x100
+ 0xC 0x10000000 0x100>;
+ sdr-base = <0x36C>;
+ msi-data = <0x00004440>;
+ msi-mask = <0x0000ffe0>;
+ interrupts =<0 1 2 3 4 5 6 7>;
+ interrupt-parent = <&MSI>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ msi-available-ranges = <0x0 0x100>;
+ interrupt-map = <
+ 0 &UIC3 0x18 1
+ 1 &UIC3 0x19 1
+ 2 &UIC3 0x1A 1
+ 3 &UIC3 0x1B 1
+ 4 &UIC3 0x1C 1
+ 5 &UIC3 0x1D 1
+ 6 &UIC3 0x1E 1
+ 7 &UIC3 0x1F 1
+ >;
+ };
};
};
--
1.7.3.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/44x: Fix PCI MSI support for APM821xx SoC and Bluestone board
From: Mai La @ 2012-03-06 3:29 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Josh Boyer, Matt Porter,
Tirumala R Marri, Grant Likely, Michael Neuling, Kumar Gala,
Anton Blanchard, linuxppc-dev, linux-kernel
Cc: open-source-review, Mai La
This patch consists of:
- Enable PCI MSI as default for Bluestone board
- Define number of MSI interrupt for Maui APM821xx SoC using in Bluestone board
- Fix returning ENODEV as finding MSI node
- Fix MSI physical high and low address
- Keep MSI data logically
Signed-off-by: Mai La <mla@apm.com>
---
arch/powerpc/platforms/44x/Kconfig | 2 ++
arch/powerpc/sysdev/ppc4xx_msi.c | 28 ++++++++++++++++++----------
2 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index fcf6bf2..9f04ce3 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -23,6 +23,8 @@ config BLUESTONE
default n
select PPC44x_SIMPLE
select APM821xx
+ select PCI_MSI
+ select PPC4xx_MSI
select IBM_EMAC_RGMII
help
This option enables support for the APM APM821xx Evaluation board.
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
index 1c2d7af..6103908 100644
--- a/arch/powerpc/sysdev/ppc4xx_msi.c
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -31,7 +31,7 @@
#include <asm/prom.h>
#include <asm/hw_irq.h>
#include <asm/ppc-pci.h>
-#include <boot/dcr.h>
+#include <asm/dcr.h>
#include <asm/dcr-regs.h>
#include <asm/msi_bitmap.h>
@@ -43,7 +43,12 @@
#define PEIH_FLUSH0 0x30
#define PEIH_FLUSH1 0x38
#define PEIH_CNTRST 0x48
+
+#ifdef CONFIG_APM821xx
+#define NR_MSI_IRQS 8
+#else
#define NR_MSI_IRQS 4
+#endif
struct ppc4xx_msi {
u32 msi_addr_lo;
@@ -150,12 +155,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
if (!sdr_addr)
return -1;
- SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
- SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
-
+ mtdcri(SDR0, *sdr_addr, (u64)res.start >> 32); /*HIGH addr */
+ mtdcri(SDR0, *sdr_addr + 1, res.start & 0xFFFFFFFF);/* Low addr */
msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
- if (msi->msi_dev)
+ if (!msi->msi_dev)
return -ENODEV;
msi->msi_regs = of_iomap(msi->msi_dev, 0);
@@ -167,9 +171,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
(u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
- msi->msi_addr_hi = 0x0;
- msi->msi_addr_lo = (u32) msi_phys;
- dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
+ if (!msi_virt)
+ return -ENOMEM;
+ msi->msi_addr_hi = (u32)(msi_phys >> 32);
+ msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);
+ dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
+ msi->msi_addr_hi, msi->msi_addr_lo);
/* Progam the Interrupt handler Termination addr registers */
out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
@@ -185,6 +192,8 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
+ dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
+
return 0;
}
@@ -215,8 +224,6 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
struct resource res;
int err = 0;
- msi = &ppc4xx_msi;/*keep the msi data for further use*/
-
dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
@@ -242,6 +249,7 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
dev_err(&dev->dev, "Error allocating MSI bitmap\n");
goto error_out;
}
+ ppc4xx_msi = *msi;
ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
--
1.7.3.4
^ permalink raw reply related
* [PATCH] powerpc/srio: Fix the relocation errors when building with 64bit
From: Liu Gang @ 2012-03-06 2:58 UTC (permalink / raw)
To: linuxppc-dev, Alexandre.Bounine
Cc: r58472, linux-kernel, r61911, paul.gortmaker, Liu Gang, scottwood,
akpm
For the file "arch/powerpc/sysdev/fsl_rio.c", there will be some relocation
errors while using the corenet64_smp_defconfig:
WARNING: modpost: Found 6 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
GEN .version
CHK include/generated/compile.h
UPD include/generated/compile.h
CC init/version.o
LD init/built-in.o
LD .tmp_vmlinux1
arch/powerpc/sysdev/built-in.o:(__ex_table+0x0):
relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3208
arch/powerpc/sysdev/built-in.o:(__ex_table+0x2):
relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'
arch/powerpc/sysdev/built-in.o:(__ex_table+0x4):
relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3230
arch/powerpc/sysdev/built-in.o:(__ex_table+0x6):
relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+c
arch/powerpc/sysdev/built-in.o:(__ex_table+0x8):
relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3250
arch/powerpc/sysdev/built-in.o:(__ex_table+0xa):
relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+18
Rewrote the corresponding code with the support of 64bit building.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
arch/powerpc/sysdev/fsl_rio.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index a4c4f4a..5b6f556 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -66,8 +66,8 @@
" li %0,%3\n" \
" b 2b\n" \
".section __ex_table,\"a\"\n" \
- " .align 2\n" \
- " .long 1b,3b\n" \
+ PPC_LONG_ALIGN "\n" \
+ PPC_LONG "1b,3b\n" \
".text" \
: "=r" (err), "=r" (x) \
: "b" (addr), "i" (-EFAULT), "0" (err))
--
1.7.0.4
^ permalink raw reply related
* Re: [PATCH 1/2] powerpc/44x: Fix PCI MSI support for APM821xx SoC and Bluestone board
From: Mai La @ 2012-03-06 2:56 UTC (permalink / raw)
To: Josh Boyer
Cc: open-source-review, Tirumala R Marri, linux-kernel,
Paul Mackerras, linuxppc-dev
In-Reply-To: <CA+5PVA4UAztYrJPqCqC9=T9brojOg2g=T--+BbMP8Br=xBrxfw@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 4425 bytes --]
Please see my in-line reply.
On Wed, Feb 29, 2012 at 9:18 PM, Josh Boyer <jwboyer@gmail.com> wrote:
> On Wed, Feb 29, 2012 at 3:47 AM, Mai La <mla@apm.com> wrote:
> > This patch consists of:
> > - Enable PCI MSI as default for Bluestone board
> > - Define number of MSI interrupt for Maui APM821xx
>
> What is Maui? Is that the same thing as Bluestone?
>
=> Bluestone board uses Maui APM821xx SoC. I would make the description
clearer like:
This patch consists of:
- Enable PCI MSI as default for Bluestone board
- Define number of MSI interrupt for Maui APM821xxx SoC using in Bluestone
board
> > - Fix returning ENODEV as finding MSI node
> > - Fix MSI physical high and low address
> > - Keep MSI data logically
> >
> > Signed-off-by: Mai La <mla@apm.com>
>
> Wow. So there are a lot of bugfixes here. I'm surprised this ever worked
> at
> all with some of the things you're fixing. Nice to see.
>
> ---
> > arch/powerpc/platforms/44x/Kconfig | 2 ++
> > arch/powerpc/sysdev/ppc4xx_msi.c | 28 ++++++++++++++++++----------
> > 2 files changed, 20 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/powerpc/platforms/44x/Kconfig
> b/arch/powerpc/platforms/44x/Kconfig
> > index fcf6bf2..9f04ce3 100644
> > --- a/arch/powerpc/platforms/44x/Kconfig
> > +++ b/arch/powerpc/platforms/44x/Kconfig
> > @@ -23,6 +23,8 @@ config BLUESTONE
> > default n
> > select PPC44x_SIMPLE
> > select APM821xx
> > + select PCI_MSI
> > + select PPC4xx_MSI
> > select IBM_EMAC_RGMII
> > help
> > This option enables support for the APM APM821xx Evaluation
> board.
> > diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c
> b/arch/powerpc/sysdev/ppc4xx_msi.c
> > index 1c2d7af..6103908 100644
> > --- a/arch/powerpc/sysdev/ppc4xx_msi.c
> > +++ b/arch/powerpc/sysdev/ppc4xx_msi.c
> > @@ -31,7 +31,7 @@
> > #include <asm/prom.h>
> > #include <asm/hw_irq.h>
> > #include <asm/ppc-pci.h>
> > -#include <boot/dcr.h>
> > +#include <asm/dcr.h>
> > #include <asm/dcr-regs.h>
> > #include <asm/msi_bitmap.h>
> >
> > @@ -43,7 +43,12 @@
> > #define PEIH_FLUSH0 0x30
> > #define PEIH_FLUSH1 0x38
> > #define PEIH_CNTRST 0x48
> > +
> > +#ifdef CONFIG_APM821xx
> > +#define NR_MSI_IRQS 8
> > +#else
> > #define NR_MSI_IRQS 4
> > +#endif
>
> Hm. Do you think this is going to change quite a bit depending on which
> SoC
> is being used? If so, it might be better to introduce a Kconfig variable
> that just defines this instead. Something like:
>
> config 4xx_MSI_IRQS
> int "Number of MSI IRQs"
> depends on 4xx
> default "8" if APM821xx
> default "4" if !APM821xx
>
> If there aren't going to be a wide variety of numbers, then the simple
> ifdef
> you have is probably sufficient.
>
=> So far we don't have a wide variety of numbers. So I think just keep
ifdef is fine.
> > struct ppc4xx_msi {
> > u32 msi_addr_lo;
> > @@ -150,12 +155,11 @@ static int ppc4xx_setup_pcieh_hw(struct
> platform_device *dev,
> > if (!sdr_addr)
> > return -1;
> >
> > - SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> > - SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
> > -
> > + mtdcri(SDR0, *sdr_addr, res.start >> 32); /*HIGH addr */
> > + mtdcri(SDR0, *sdr_addr + 1, res.start & 0xFFFFFFFF);/* Low addr
> */
>
> Don't you still want the (u64) cast on res.start?
>
=> Keep (u64) is OK. So I would keep it like:
mtdcri(SDR0, *sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> > CONFIDENTIALITY NOTICE: This e-mail message, including any attachments,
> > is for the sole use of the intended recipient(s) and contains information
> > that is confidential and proprietary to AppliedMicro Corporation or its
> subsidiaries.
> > It is to be used solely for the purpose of furthering the parties'
> business relationship.
> > All unauthorized review, use, disclosure or distribution is prohibited.
> > If you are not the intended recipient, please contact the sender by
> reply e-mail
> > and destroy all copies of the original message.
>
> Is there a way you can drop this? Others from APM seem to have figured out
> how to do that, so hopefully it won't be a big problem.
>
> => Our IT guy help me to remove this!
Thank you! Do you have any further comment? I would send another patch with
the above fix soon.
josh
>
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^ permalink raw reply
* RE: [PATCH 6/9] dmaengine: consolidate tx_status functions
From: H Hartley Sweeten @ 2012-03-06 0:12 UTC (permalink / raw)
To: Russell King - ARM Linux, Dan Williams, Vinod Koul
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Zhang Wei, Barry Song, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <E1S4eKz-0000tE-FB@rmk-PC.arm.linux.org.uk>
On Monday, March 05, 2012 1:17 PM, Russell King wrote:
>=20
> Now that we have the completed cookie in the dma_chan structure, we
> can consolidate the tx_status functions by providing a function to set
> the txstate structure and returning the DMA status. We also provide
> a separate helper to set the residue for cookies which are still in
> progress.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
<snip>
> diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h
> index 47e0997..244a2c5 100644
> --- a/drivers/dma/dmaengine.h
> +++ b/drivers/dma/dmaengine.h
> @@ -45,4 +45,35 @@ static inline void dma_cookie_complete(struct dma_asyn=
c_tx_descriptor *tx)
> tx->cookie =3D 0;
> }
> =20
> +/**
> + * dma_cookie_status - report cookie status
> + * @chan: dma channel
> + * @cookie: cookie we are interested in
> + * @state: dma_tx_state structure to return last/used cookies
> + *
> + * Report the status of the cookie, filling in the state structure if
> + * non-NULL. No locking is required.
> + */
> +static inline enum dma_status dma_cookie_status(struct dma_chan *chan,
> + dma_cookie_t cookie, struct dma_tx_state *state)
> +{
> + dma_cookie_t used, complete;
> +
> + used =3D chan->cookie;
> + complete =3D chan->complete;
> + barrier();
> + if (state) {
> + state->last =3D complete;
> + state->used =3D used;
> + state->residue =3D 0;
> + }
Isn't this dma_set_tx_state()?
> + return dma_async_is_complete(cookie, complete, used);
> +}
Regards,
Hartley
^ permalink raw reply
* Re: [PATCH 0/9] DMA engine cookie handling cleanups
From: Russell King - ARM Linux @ 2012-03-05 23:54 UTC (permalink / raw)
To: Dan Williams, Vinod Koul
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Zhang Wei, Barry Song, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120305201411.GA17791@n2100.arm.linux.org.uk>
On Mon, Mar 05, 2012 at 08:14:11PM +0000, Russell King - ARM Linux wrote:
> This patch series cleans up the handling of cookies in DMA engine drivers.
> This is done by providing a set of inline library functions for common
> tasks:
>
> - moving the 'last completed cookie' into struct dma_chan - everyone
> has this in their driver private channel data structure
>
> - consolidate allocation of cookies to DMA descriptors
>
> - common way to update 'last completed cookie' value
>
> - standard way to implement tx_status callback and update the residue
>
> - consolidate initialization of cookies
>
> - update implementations differing from the majority of DMA engine drivers
> to behave the same as the majority implementation in respect of cookies
>
> What this means is that we get to the point where all DMA engine drivers
> will hand out cookie value '2' as the first, and incrementing cookie
> values up to INT_MAX, returning to cookie '1' as the next cookie.
>
> Think of this patch series as round 1... I am hoping over time that more
> code can be consolidated between the DMA engine drivers and end up with a
> consistent way to handle various common themes in DMA engine hardware
> (like physical channel<->peripheral request signal selection.)
>
> I've only build-tested this stuff on a few ARM configs, and my ability
> to run-test this stuff is even more limited by all the broken useless DMA
> engine hardware I have access to (mostly pl08x based) so having some
> tested-bys would be a great advantage.
Seems I'd misremembered what I'd done with this series. I'll leave it
as-is for the time being if people want to provide review comments instead,
and I'll post v2 in the next couple of days. (Quite a bit of this series
dates from August 2011...)
^ permalink raw reply
* RE: [PATCH 0/9] DMA engine cookie handling cleanups
From: H Hartley Sweeten @ 2012-03-05 23:44 UTC (permalink / raw)
To: Linus Walleij, Russell King - ARM Linux
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Vinod Koul, Zhang Wei, Barry Song, Dan Williams,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <CACRpkda9R3c0dt95w0N7Fe5es16CqbWtsCKMaFq-nwSYV4bk-w@mail.gmail.com>
On Monday, March 05, 2012 1:51 PM, Linus Walleij wrote:
> On Mon, Mar 5, 2012 at 9:14 PM, Russell King - ARM Linux wrote:
>
>> This patch series cleans up the handling of cookies in DMA engine driver=
s.
>> This is done by providing a set of inline library functions for common
>> tasks:
>
> Overall this looks good, but I have a problem:
> patch [1/9] does not appear in any subscribed accounts (it may be on
> my @stericsson.com address, will check tomorrow)
Patch 8/9 also doesn't appear to be on the mailing list.
> One I get hold of an ungmangled copy I can test the series on
> ux500 and U300.
>
> Is it just stuck in moderation because of size or something like that?
I'm also trying to test the series on ep93xx but have some compile issues
with patches [3/9] and [6/9].
Regards,
Hartley
^ permalink raw reply
* RE: [PATCH 6/9] dmaengine: consolidate tx_status functions
From: H Hartley Sweeten @ 2012-03-05 23:35 UTC (permalink / raw)
To: Russell King - ARM Linux, Dan Williams, Vinod Koul
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Zhang Wei, Barry Song, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <E1S4eKz-0000tE-FB@rmk-PC.arm.linux.org.uk>
On Monday, March 05, 2012 1:17 PM, Russell King wrote:
>
> Now that we have the completed cookie in the dma_chan structure, we
> can consolidate the tx_status functions by providing a function to set
> the txstate structure and returning the DMA status. We also provide
> a separate helper to set the residue for cookies which are still in
> progress.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
<snip>
> diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h
> index 47e0997..244a2c5 100644
> --- a/drivers/dma/dmaengine.h
> +++ b/drivers/dma/dmaengine.h
> @@ -45,4 +45,35 @@ static inline void dma_cookie_complete(struct dma_asyn=
c_tx_descriptor *tx)
> tx->cookie =3D 0;
> }
> =20
> +/**
> + * dma_cookie_status - report cookie status
> + * @chan: dma channel
> + * @cookie: cookie we are interested in
> + * @state: dma_tx_state structure to return last/used cookies
> + *
> + * Report the status of the cookie, filling in the state structure if
> + * non-NULL. No locking is required.
> + */
> +static inline enum dma_status dma_cookie_status(struct dma_chan *chan,
> + dma_cookie_t cookie, struct dma_tx_state *state)
> +{
> + dma_cookie_t used, complete;
> +
> + used =3D chan->cookie;
> + complete =3D chan->complete;
Is this supposed to be:
complete =3D chan->completed_cookie;
Regards,
Hartley
^ permalink raw reply
* RE: [PATCH 3/9] dmaengine: add private header file
From: H Hartley Sweeten @ 2012-03-05 23:28 UTC (permalink / raw)
To: Russell King - ARM Linux, Dan Williams, Vinod Koul
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Zhang Wei, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <E1S4eK0-0000sv-87@rmk-PC.arm.linux.org.uk>
On Monday, March 05, 2012 1:16 PM, Russell King wrote:
>
> Add a local private header file to contain definitions and declarations
> which should only be used by DMA engine drivers.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> drivers/dma/amba-pl08x.c | 2 ++
> drivers/dma/at_hdmac.c | 1 +
> drivers/dma/coh901318.c | 1 +
> drivers/dma/dmaengine.h | 10 ++++++++++
> drivers/dma/dw_dmac.c | 1 +
> drivers/dma/ep93xx_dma.c | 2 ++
> drivers/dma/fsldma.c | 1 +
> drivers/dma/imx-dma.c | 2 ++
> drivers/dma/imx-sdma.c | 2 ++
> drivers/dma/intel_mid_dma.c | 2 ++
> drivers/dma/ioat/dma.c | 2 ++
> drivers/dma/ioat/dma_v2.c | 2 ++
> drivers/dma/iop-adma.c | 2 ++
> drivers/dma/ipu/ipu_idmac.c | 1 +
> drivers/dma/mpc512x_dma.c | 2 ++
> drivers/dma/mv_xor.c | 2 ++
> drivers/dma/mxs-dma.c | 2 ++
> drivers/dma/pch_dma.c | 2 ++
> drivers/dma/pl330.c | 2 ++
> drivers/dma/ppc4xx/adma.c | 1 +
> drivers/dma/shdma.c | 2 ++
> drivers/dma/ste_dma40.c | 1 +
> drivers/dma/timb_dma.c | 2 ++
> drivers/dma/txx9dmac.c | 2 ++
> 24 files changed, 49 insertions(+), 0 deletions(-)
> create mode 100644 drivers/dma/dmaengine.h
>
> diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
> index 2b5121f..87475cb 100644
> --- a/drivers/dma/amba-pl08x.c
> +++ b/drivers/dma/amba-pl08x.c
> @@ -85,6 +85,8 @@
> #include <linux/slab.h>
> #include <asm/hardware/pl080.h>
> =20
> +#include "dmaengine.h"
> +
> #define DRIVER_NAME "pl08xdmac"
> =20
> static struct amba_driver pl08x_amba_driver;
> diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
> index 6baf5d7..ce26ba3 100644
> --- a/drivers/dma/at_hdmac.c
> +++ b/drivers/dma/at_hdmac.c
> @@ -27,6 +27,7 @@
> #include <linux/of_device.h>
> =20
> #include "at_hdmac_regs.h"
> +#include "dmaengine.h"
> =20
> /*
> * Glossary
> diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
> index 521434b..fb0d124 100644
> --- a/drivers/dma/coh901318.c
> +++ b/drivers/dma/coh901318.c
> @@ -24,6 +24,7 @@
> #include <mach/coh901318.h>
> =20
> #include "coh901318_lli.h"
> +#include "dmaengine.h"
> =20
> #define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
> =20
> diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h
> new file mode 100644
> index 0000000..968570d
> --- /dev/null
> +++ b/drivers/dma/dmaengine.h
> @@ -0,0 +1,10 @@
> +/*
> + * The contents of this file are private to DMA engine drivers, and is n=
ot
> + * part of the API to be used by DMA engine users.
> + */
> +#ifndef DMAENGINE_H
> +#define DMAENGINE_H
> +
> +#include <linux/dmaengine.h>
> +
> +#endif
Russell,
You have an include issue here.
All the dmaengine drivers have:
#include <linux/dmaengine.h>
Which is guarded with
#ifndef DMAENGINE_H
#define DMAENGINE_H
...
#endif
This is the same guard you are using in the private "dmaengine.h". And it
also includes <linux/dmaengine.h> again...
This doesn't compile as-is because the "dmaengine.h" file is not used due
to the #ifndef...
Regards,
Hartley
^ permalink raw reply
* Re: [PATCH 0/9] DMA engine cookie handling cleanups
From: Russell King - ARM Linux @ 2012-03-05 20:58 UTC (permalink / raw)
To: Linus Walleij
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Vinod Koul, Zhang Wei, Barry Song, Dan Williams, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <CACRpkda9R3c0dt95w0N7Fe5es16CqbWtsCKMaFq-nwSYV4bk-w@mail.gmail.com>
On Mon, Mar 05, 2012 at 09:50:51PM +0100, Linus Walleij wrote:
> On Mon, Mar 5, 2012 at 9:14 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
>
> > This patch series cleans up the handling of cookies in DMA engine drivers.
> > This is done by providing a set of inline library functions for common
> > tasks:
>
> Overall this looks good, but I have a problem:
> patch [1/9] does not appear in any subscribed accounts (it may be on
> my @stericsson.com address, will check tomorrow)
Patch 1 is just a couple of line changes to mv_xor.[ch]
^ permalink raw reply
* RE: [PATCH] rapidio/tsi721: fix bug in inbound doorbell handler
From: Bounine, Alexandre @ 2012-03-05 20:53 UTC (permalink / raw)
To: Andrew Morton
Cc: Kim, Chul, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20120305123714.0750129e.akpm@linux-foundation.org>
On Mon, March 05, 2012 3:37 PM Andrew Morton wrote:
> Alexandre Bounine <alexandre.bounine@idt.com> wrote:
>=20
> > Fixes queue wrapping bug in Inbound Doorbell handling routine.
>=20
> The changelog doesn't describe the user-visible impact of the bug.
> Please always include this so that people know whether to backport the
> fix into their kernels, and so they can determine whether the patch
> will fix a problem which they are observing.
This patch fixes the bug that causes kernel panic when number of received
doorbells is larger than number of entries in the inbound doorbell
queue (current default value =3D 512).
Another possible indication for this bug is large number of spurious
doorbells reported by tsi721 driver after reaching the queue size maximum.
^ permalink raw reply
* [PATCH 9/9] dmaengine: ensure all DMA engine drivers initialize their cookies
From: Russell King - ARM Linux @ 2012-03-05 20:17 UTC (permalink / raw)
To: Dan Williams, Vinod Koul; +Cc: Zhang Wei, Stephen Warren, linuxppc-dev
In-Reply-To: <20120305201411.GA17791@n2100.arm.linux.org.uk>
Ensure all DMA engine drivers initialize their cookies in the same way,
so that they all behave in a similar fashion. This means their first
issued cookie will be 2 rather than 1, and will increment to INT_MAX
before returning 1 and starting over.
In connection with this, Dan Williams said:
> Russell King wrote:
> > Secondly, some DMA engine drivers initialize the dma_chan cookie to 0,
> > others to 1. Is there a reason for this, or are these all buggy?
>
> I know that ioat and iop-adma expect 0 to mean "I have cleaned up this
> descriptor and it is idle", and would break if zero was an in-flight
> cookie value. The reserved usage of zero is an driver internal
> concern, but I have no problem formalizing it as a reserved value.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
drivers/dma/fsldma.c | 1 +
drivers/dma/imx-dma.c | 1 +
drivers/dma/imx-sdma.c | 1 +
drivers/dma/ioat/dma.c | 1 +
drivers/dma/iop-adma.c | 1 +
drivers/dma/mv_xor.c | 1 +
drivers/dma/mxs-dma.c | 1 +
drivers/dma/ppc4xx/adma.c | 1 +
drivers/dma/shdma.c | 1 +
9 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 2f6c806..7d7384b 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1292,6 +1292,7 @@ static int __devinit fsl_dma_chan_probe(struct fsldma_device *fdev,
chan->idle = true;
chan->common.device = &fdev->common;
+ dma_cookie_init(&chan->common);
/* find the IRQ line, if it exists in the device tree */
chan->irq = irq_of_parse_and_map(node, 0);
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index ba317e6..4e14f51 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -348,6 +348,7 @@ static int __init imxdma_probe(struct platform_device *pdev)
spin_lock_init(&imxdmac->lock);
imxdmac->chan.device = &imxdma->dma_device;
+ dma_cookie_init(&imxdmac->chan);
imxdmac->channel = i;
/* Add the channel to the DMAC list */
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 4406be2..0be36a4 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -1356,6 +1356,7 @@ static int __init sdma_probe(struct platform_device *pdev)
spin_lock_init(&sdmac->lock);
sdmac->chan.device = &sdma->dma_device;
+ dma_cookie_init(&sdmac->chan);
sdmac->channel = i;
/*
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index 97e100c..31493d8 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -109,6 +109,7 @@ void ioat_init_channel(struct ioatdma_device *device, struct ioat_chan_common *c
chan->reg_base = device->reg_base + (0x80 * (idx + 1));
spin_lock_init(&chan->cleanup_lock);
chan->common.device = dma;
+ dma_cookie_init(&chan->common);
list_add_tail(&chan->common.device_node, &dma->channels);
device->idx[idx] = chan;
init_timer(&chan->timer);
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 4370b10..1f3a703 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -1545,6 +1545,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&iop_chan->chain);
INIT_LIST_HEAD(&iop_chan->all_slots);
iop_chan->common.device = dma_dev;
+ dma_cookie_init(&iop_chan->common);
list_add_tail(&iop_chan->common.device_node, &dma_dev->channels);
if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 486353e..fa5d55f 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1193,6 +1193,7 @@ static int __devinit mv_xor_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&mv_chan->completed_slots);
INIT_LIST_HEAD(&mv_chan->all_slots);
mv_chan->common.device = dma_dev;
+ dma_cookie_init(&mv_chan->common);
list_add_tail(&mv_chan->common.device_node, &dma_dev->channels);
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index 5f3492e..a2267f9 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -618,6 +618,7 @@ static int __init mxs_dma_probe(struct platform_device *pdev)
mxs_chan->mxs_dma = mxs_dma;
mxs_chan->chan.device = &mxs_dma->dma_device;
+ dma_cookie_init(&mxs_chan->chan);
tasklet_init(&mxs_chan->tasklet, mxs_dma_tasklet,
(unsigned long) mxs_chan);
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
index 9752062..ced9882 100644
--- a/drivers/dma/ppc4xx/adma.c
+++ b/drivers/dma/ppc4xx/adma.c
@@ -4497,6 +4497,7 @@ static int __devinit ppc440spe_adma_probe(struct platform_device *ofdev)
INIT_LIST_HEAD(&chan->all_slots);
chan->device = adev;
chan->common.device = &adev->common;
+ dma_cookie_init(&chan->common);
list_add_tail(&chan->common.device_node, &adev->common.channels);
tasklet_init(&chan->irq_tasklet, ppc440spe_adma_tasklet,
(unsigned long)chan);
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 50510ef..5c40886 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -1089,6 +1089,7 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
/* reference struct dma_device */
new_sh_chan->common.device = &shdev->common;
+ dma_cookie_init(&new_sh_chan->common);
new_sh_chan->dev = shdev->common.dev;
new_sh_chan->id = id;
--
1.7.4.4
^ permalink raw reply related
* [PATCH] rapidio/tsi721: fix bug in inbound doorbell handler
From: Alexandre Bounine @ 2012-03-05 20:33 UTC (permalink / raw)
To: akpm, linux-kernel, linuxppc-dev; +Cc: Alexandre Bounine, Chul Kim
Fixes queue wrapping bug in Inbound Doorbell handling routine.
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Cc: Chul Kim <chul.kim@idt.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
---
This patch is applicable to kernel version 3.2 and after.
drivers/rapidio/devices/tsi721.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
index babbede..c746e26 100644
--- a/drivers/rapidio/devices/tsi721.c
+++ b/drivers/rapidio/devices/tsi721.c
@@ -406,13 +406,14 @@ static void tsi721_db_dpc(struct work_struct *work)
*/
mport = priv->mport;
- wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE));
- rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE));
+ wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
+ rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE)) % IDB_QSIZE;
while (wr_ptr != rd_ptr) {
idb_entry = (u64 *)(priv->idb_base +
(TSI721_IDB_ENTRY_SIZE * rd_ptr));
rd_ptr++;
+ rd_ptr %= IDB_QSIZE;
idb.msg = *idb_entry;
*idb_entry = 0;
--
1.7.8.4
^ permalink raw reply related
* Re: [PATCH 0/9] DMA engine cookie handling cleanups
From: Linus Walleij @ 2012-03-05 20:50 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Vinod Koul, Zhang Wei, Barry Song, Dan Williams, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <20120305201411.GA17791@n2100.arm.linux.org.uk>
On Mon, Mar 5, 2012 at 9:14 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> This patch series cleans up the handling of cookies in DMA engine drivers.
> This is done by providing a set of inline library functions for common
> tasks:
Overall this looks good, but I have a problem:
patch [1/9] does not appear in any subscribed accounts (it may be on
my @stericsson.com address, will check tomorrow)
One I get hold of an ungmangled copy I can test the series on
ux500 and U300.
Is it just stuck in moderation because of size or something like that?
Yours,
Linus Walleij
^ permalink raw reply
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