* Re: [PATCH v2 0/9] DMA engine cookie handling cleanups
From: Vinod Koul @ 2012-03-13 8:40 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Warren, Linus Walleij, Srinidhi Kasagar, Barry Song,
Dan Williams, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1331569438.1727.3.camel@vkoul-udesk3>
On Mon, 2012-03-12 at 21:53 +0530, Vinod Koul wrote:
> > > I applied the v2 on a branch and also rebased on top of
> slave-dma.next.
> > > There were few conflicts in imx-dma.c. Sacha, Javier, pls see that
> merge
> > > is right.
> > >
> > > This branch (rmk_cookie_fixes2_rebased) is not yet pushed, as I am
> not
> > > able to connect to infradead.org, should be done when server is
> back.
> >
> > Are you going to pick up Shawn Guo's tested-by for these patches, or
> are
> > we saying its too late for that now?
> Sure, his and others we have received on this series.
> Also, IIRC there was one fixup from Jassi on pl330?
>
> I should be able to merge this tomorrow, if thats fine with you.
I have merged this to my next, but haven't pushed out yet. This is
available on branch next_cookie2_merge.
Also I got few (more than expected build failures) and a merge issue on
imx driver. Sascha, Russell can you see if fix on imx is right
Please see if the below patch is the right fix for build failures in
addition to one suggested by Jassi.
-------------------x-------------------------x----------------------
>From 949ff5b8d46b5e3435d21b2651ce3a2599208d44 Mon Sep 17 00:00:00 2001
From: Vinod Koul <vinod.koul@linux.intel.com>
Date: Tue, 13 Mar 2012 11:58:12 +0530
Subject: [PATCH] dmaengine: fix for cookie changes and merge
Fixed trivial issues in drivers:
drivers/dma/imx-sdma.c
drivers/dma/intel_mid_dma.c
drivers/dma/ioat/dma_v3.c
drivers/dma/iop-adma.c
drivers/dma/sirf-dma.c
drivers/dma/timb_dma.c
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
---
drivers/dma/imx-sdma.c | 1 +
drivers/dma/intel_mid_dma.c | 1 +
drivers/dma/ioat/dma_v3.c | 1 +
drivers/dma/iop-adma.c | 1 +
drivers/dma/sirf-dma.c | 2 ++
drivers/dma/timb_dma.c | 6 +-----
6 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index ccfc7c4..81f9d57 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -1127,6 +1127,7 @@ static void sdma_issue_pending(struct dma_chan *chan)
struct sdma_engine *sdma = sdmac->sdma;
if (sdmac->status == DMA_IN_PROGRESS)
+ sdma_enable_channel(sdma, sdmac->channel);
}
#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c
index d599d96..2449812 100644
--- a/drivers/dma/intel_mid_dma.c
+++ b/drivers/dma/intel_mid_dma.c
@@ -477,6 +477,7 @@ static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
+ struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
enum dma_status ret;
ret = dma_cookie_status(chan, cookie, txstate);
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index 145eda2..2c4476c 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -61,6 +61,7 @@
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/prefetch.h>
+#include "../dmaengine.h"
#include "registers.h"
#include "hw.h"
#include "dma.h"
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 1f3a703..4499f88 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -894,6 +894,7 @@ static enum dma_status iop_adma_status(struct dma_chan *chan,
struct dma_tx_state *txstate)
{
struct iop_adma_chan *iop_chan = to_iop_adma_chan(chan);
+ int ret;
ret = dma_cookie_status(chan, cookie, txstate);
if (ret == DMA_SUCCESS)
diff --git a/drivers/dma/sirf-dma.c b/drivers/dma/sirf-dma.c
index a2cde85..45ba352 100644
--- a/drivers/dma/sirf-dma.c
+++ b/drivers/dma/sirf-dma.c
@@ -18,6 +18,8 @@
#include <linux/of_platform.h>
#include <linux/sirfsoc_dma.h>
+#include "dmaengine.h"
+
#define SIRFSOC_DMA_DESCRIPTORS 16
#define SIRFSOC_DMA_CHANNELS 16
diff --git a/drivers/dma/timb_dma.c b/drivers/dma/timb_dma.c
index 7805996..d408c22 100644
--- a/drivers/dma/timb_dma.c
+++ b/drivers/dma/timb_dma.c
@@ -510,17 +510,13 @@ static void td_free_chan_resources(struct dma_chan *chan)
static enum dma_status td_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
- struct timb_dma_chan *td_chan =
- container_of(chan, struct timb_dma_chan, chan);
enum dma_status ret;
dev_dbg(chan2dev(chan), "%s: Entry\n", __func__);
ret = dma_cookie_status(chan, cookie, txstate);
- dev_dbg(chan2dev(chan),
- "%s: exit, ret: %d, last_complete: %d, last_used: %d\n",
- __func__, ret, last_complete, last_used);
+ dev_dbg(chan2dev(chan), "%s: exit, ret: %d\n", __func__, ret);
return ret;
}
--
1.7.0.4
--
~Vinod
^ permalink raw reply related
* [PATCH][v2] powerpc/85xx:Add PSC9131 RDB Support
From: Prabhakar Kushwaha @ 2012-03-13 5:04 UTC (permalink / raw)
To: linuxppc-dev
Cc: Poonam Aggrwal, Priyanka Jain, Ramneek Mehresh, Rajan Srivastava,
Akhil Goyal, Prabhakar Kushwaha
PSC9131RDB is a Freescale reference design board for PSC9131 SoC.The PSC9131 is
integrated SoC that targets Femto base station market. It combines Power
Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F
baseband acceleration processing elements.
The PSC9131 SoC includes the following function and features:
. Power Architecture subsystem including a e500 processor with 256-Kbyte shared
L2 cache
. StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
. The Multi Accelerator Platform Engine for Femto BaseStation Baseband
Processing (MAPLE-B2F)
. A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding,
Fourier Transforms, UMTS chip rate processing, LTE UP/DL Channel processing,
and CRC algorithms
. Consists of accelerators for Convolution, Filtering, Turbo Encoding,
Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix Inversion
operations
. DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with
ECC, up to 400-MHz clock/800 MHz data rate
. Dedicated security engine featuring trusted boot
. DMA controller
. OCNDMA with four bidirectional channels
. Interfaces
. Two triple-speed Gigabit Ethernet controllers featuring network acceleration
including IEEE 1588. v2 hardware support and virtualization (eTSEC)
. eTSEC 1 supports RGMII/RMII
. eTSEC 2 supports RGMII
. High-speed USB 2.0 host and device controller with ULPI interface
. Enhanced secure digital (SD/MMC) host controller (eSDHC)
. Antenna interface controller (AIC), supporting three industry standard
JESD207/three custom ADI RF interfaces (two dual port and one single port)
and three MAXIM's MaxPHY serial interfaces
. ADI lanes support both full duplex FDD support and half duplex TDD support
. Universal Subscriber Identity Module (USIM) interface that facilitates
communication to SIM cards or Eurochip pre-paid phone cards
. TDM with one TDM port
. Two DUART, four eSPI, and two I2C controllers
. Integrated Flash memory controller (IFC)
. TDM with 256 channels
. GPIO
. Sixteen 32-bit timers
The DSP portion of the SoC consists of DSP core (SC3850) and various
accelerators pertaining to DSP operations.
PSC9131RDB Overview
----------------------
PSC9131 SoC
1Gbyte DDR3 (on board DDR)
128Mbyte 2K page size NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
USB-ULPI
eTSEC1: Connected to RGMII PHY
eTSEC2: Connected to RGMII PHY
DUART interface: supports one UARTs up to 115200 bps for console display
Linux runs on e500v2 core and access some DSP peripherals like AIC
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
Developed on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
Branch master
Changes for v2:
- Used "fsl/qoriq-dma-0.dtsi"
- Removed BUG_ON()
- used pr_err instead of printk
- removed all printk
- updated dts for ifc and ethernet
- removed unwanted node properties
arch/powerpc/boot/dts/fsl/psc9131si-post.dtsi | 172 +++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/psc9131si-pre.dtsi | 59 ++++++++
arch/powerpc/boot/dts/psc9131rdb.dts | 34 +++++
arch/powerpc/boot/dts/psc9131rdb.dtsi | 186 +++++++++++++++++++++++++
arch/powerpc/platforms/85xx/Kconfig | 14 ++
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/psc913x_board.c | 96 +++++++++++++
7 files changed, 562 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/psc9131si-post.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/psc9131si-pre.dtsi
create mode 100644 arch/powerpc/boot/dts/psc9131rdb.dts
create mode 100644 arch/powerpc/boot/dts/psc9131rdb.dtsi
create mode 100644 arch/powerpc/platforms/85xx/psc913x_board.c
diff --git a/arch/powerpc/boot/dts/fsl/psc9131si-post.dtsi b/arch/powerpc/boot/dts/fsl/psc9131si-post.dtsi
new file mode 100644
index 0000000..777da97
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/psc9131si-post.dtsi
@@ -0,0 +1,172 @@
+/*
+ * PSC9131 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc", "simple-bus";
+ interrupts = <16 2 0 0 20 2 0 0>;
+};
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,psc9131-immr", "simple-bus";
+ bus-frequency = <0>; // Filled out by uboot.
+
+ ecm-law@0 {
+ compatible = "fsl,ecm-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <12>;
+ };
+
+ ecm@1000 {
+ compatible = "fsl,psc9131-ecm", "fsl,ecm";
+ reg = <0x1000 0x1000>;
+ interrupts = <16 2 0 0>;
+ };
+
+ memory-controller@2000 {
+ compatible = "fsl,psc9131-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupts = <16 2 0 0>;
+ };
+
+/include/ "pq3-i2c-0.dtsi"
+ i2c@3000 {
+ interrupts = <17 2 0 0>;
+ };
+
+/include/ "pq3-i2c-1.dtsi"
+ i2c@3100 {
+ interrupts = <17 2 0 0>;
+ };
+
+/include/ "pq3-duart-0.dtsi"
+ serial0: serial@4500 {
+ interrupts = <18 2 0 0>;
+ };
+
+ serial1: serial@4600 {
+ interrupts = <18 2 0 0 >;
+ };
+/include/ "pq3-espi-0.dtsi"
+ spi0: spi@7000 {
+ fsl,espi-num-chipselects = <1>;
+ interrupts = <22 0x2 0 0>;
+ };
+
+/include/ "pq3-gpio-0.dtsi"
+ gpio-controller@f000 {
+ interrupts = <19 0x2 0 0>;
+ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,psc9131-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x40000>; // L2,256K
+ interrupts = <16 2 0 0>;
+ };
+
+/include/ "pq3-dma-0.dtsi"
+
+dma@21300 {
+
+ dma-channel@0 {
+ interrupts = <62 2 0 0>;
+ };
+
+ dma-channel@80 {
+ interrupts = <63 2 0 0>;
+ };
+
+ dma-channel@100 {
+ interrupts = <64 2 0 0>;
+ };
+
+ dma-channel@180 {
+ interrupts = <65 2 0 0>;
+ };
+};
+
+/include/ "pq3-usb2-dr-0.dtsi"
+usb@22000 {
+ compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
+ interrupts = <40 0x2 0 0>;
+};
+
+/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ fsl,sdhci-auto-cmd12;
+ interrupts = <41 0x2 0 0>;
+ };
+
+/include/ "pq3-mpic.dtsi"
+
+timer@41100 {
+ compatible = "fsl,mpic-v1.2-msgr", "fsl,mpic-msg";
+ reg = <0x41400 0x200>;
+ interrupts = <
+ 0xb0 2
+ 0xb1 2
+ 0xb2 2
+ 0xb3 2>;
+};
+
+/include/ "pq3-etsec2-0.dtsi"
+enet0: ethernet@b0000 {
+ queue-group@b0000 {
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
+ };
+};
+
+/include/ "pq3-etsec2-1.dtsi"
+enet1: ethernet@b1000 {
+ queue-group@b1000 {
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
+ };
+};
+
+global-utilities@e0000 {
+ compatible = "fsl,psc9131-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/psc9131si-pre.dtsi b/arch/powerpc/boot/dts/fsl/psc9131si-pre.dtsi
new file mode 100644
index 0000000..43c29cf
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/psc9131si-pre.dtsi
@@ -0,0 +1,59 @@
+/*
+ * PSC9131 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+ compatible = "fsl,PSC9131";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ serial0 = &serial0;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,PSC9131@0 {
+ device_type = "cpu";
+ compatible = "fsl,e500v2";
+ reg = <0x0>;
+ next-level-cache = <&L2>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/psc9131rdb.dts b/arch/powerpc/boot/dts/psc9131rdb.dts
new file mode 100644
index 0000000..23a35ed
--- /dev/null
+++ b/arch/powerpc/boot/dts/psc9131rdb.dts
@@ -0,0 +1,34 @@
+/*
+ * PSC9131 RDB Device Tree Source
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/psc9131si-pre.dtsi"
+
+/ {
+ model = "fsl,psc9131rdb";
+ compatible = "fsl,psc9131rdb";
+
+ memory {
+ device_type = "memory";
+ };
+
+ board_ifc: ifc: ifc@ff71e000 {
+ /* NAND Flash on board */
+ ranges = <0x0 0x0 0x0 0xff800000 0x00010000>;
+ reg = <0x0 0xff71e000 0x0 0x2000>;
+ };
+
+ board_soc: soc: soc@ff700000 {
+ ranges = <0x0 0x0 0xff700000 0x100000>;
+ };
+};
+
+/include/ "psc9131rdb.dtsi"
+/include/ "fsl/psc9131si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/psc9131rdb.dtsi b/arch/powerpc/boot/dts/psc9131rdb.dtsi
new file mode 100644
index 0000000..1354e32
--- /dev/null
+++ b/arch/powerpc/boot/dts/psc9131rdb.dtsi
@@ -0,0 +1,186 @@
+/*
+ * PSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_ifc {
+
+ nand@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x0 0x0 0x10000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 3MB for u-boot Bootloader Image */
+ reg = <0x0 0x00300000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@300000 {
+ /* 1MB for DTB Image */
+ reg = <0x00300000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@400000 {
+ /* 8MB for Linux Kernel Image */
+ reg = <0x00400000 0x00800000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@c00000 {
+ /* Rest space for Root file System Image */
+ reg = <0x00c00000 0x07400000>;
+ label = " NAND RFS Image";
+ };
+ };
+};
+
+&board_soc {
+ i2c@3000 {
+ gpio3: gpio@21 {
+ compatible = "nxp,pca9555";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ polarity = <0x00>;
+ };
+ gpio4: gpio@23 {
+ compatible = "nxp,pca9555";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ polarity = <0x00>;
+ };
+ gpio5: gpio@27 {
+ compatible = "nxp,pca9555";
+ reg = <0x27>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ polarity = <0x00>;
+ };
+ hwmon@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ eeprom@52 {
+ compatible = "st-micro,24c02";
+ reg = <0x52>;
+ };
+ };
+
+ /* PSC9131RDB does not have any device on i2c@3100 */
+ i2c@3100 {
+ status = "disabled";
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25sl12801";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ /* 512KB for u-boot Bootloader Image */
+ partition@0 {
+ reg = <0x0 0x00080000>;
+ label = "SPI (RO) U-Boot Image";
+ read-only;
+ };
+
+ /* 512KB for DTB Image */
+ partition@80000 {
+ reg = <0x00080000 0x00080000>;
+ label = "SPI DTB Image";
+ read-only;
+ };
+
+ /* 4MB for Linux Kernel Image */
+ partition@100000 {
+ reg = <0x00100000 0x00400000>;
+ label = "SPI Kernel Image";
+ read-only;
+ };
+
+ /* 4MB for Compressed RFS Image */
+ partition@500000 {
+ reg = <0x00500000 0x00400000>;
+ label = "SPI RFS";
+ read-only;
+ };
+
+ /* 7MB for RFS */
+ partition@900000 {
+ reg = <0x00900000 0x00700000>;
+ label = "SPI RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x3>;
+ };
+ };
+
+ sdhci@2e000 {
+ status = "disabled";
+ };
+
+ crypto: crypto@30000 {
+ status = "ok";
+ };
+
+ enet0: ethernet@b0000 {
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index d7946be..1d685bd 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -91,6 +91,20 @@ config P1023_RDS
help
This option enables support for the P1023 RDS board
+config PSC9131_RDB
+ bool "Freescale PSC9131RDB"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the PSC9131 RDB board
+ Board has hetrogeneous SoC PSC9131. It combines Power Architecture
+ e500v2 and DSP StarCore SC3850 core technologies. Power Architecture
+ subsystem includes 1GByte DDR, 128MB NAND flash, 256Kbit EEPROM,
+ 128MB spi flash, USB-ULPI, eTSEC1, eTSEC2 connected on RGMII PHY,
+ UART. The DSP portion of the chip consists of DSP core (SC3850) and
+ various accelerators pertaining to DSP operations.
+ PSC9131 is integrated device that targets Femto base station market.
+ Manufacturer : Freescale Semiconductor, Inc
+
config SOCRATES
bool "Socrates"
select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 9cb2d43..d1ffdca 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o
obj-$(CONFIG_P3060_QDS) += p3060_qds.o corenet_ds.o
obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o
obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o
+obj-$(CONFIG_PSC9131_RDB) += psc913x_board.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
obj-$(CONFIG_SBC8560) += sbc8560.o
diff --git a/arch/powerpc/platforms/85xx/psc913x_board.c b/arch/powerpc/platforms/85xx/psc913x_board.c
new file mode 100644
index 0000000..a995e70
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/psc913x_board.c
@@ -0,0 +1,96 @@
+/*
+ * PSC9131RDB Board Setup
+ *
+ * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <asm/mpic.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/udbg.h>
+
+void __init psc913x_board_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (!np) {
+ pr_err("psc913x: Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ pr_err("psc913x: Failed to map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start, MPIC_WANTS_RESET |
+ MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
+ 0, 256, " OpenPIC ");
+
+ of_node_put(np);
+
+ if (!mpic)
+ pr_err("psc913x: Failed to allocate MPIC structure\n");
+ else
+ mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init psc913x_board_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("psc913x_board_setup_arch()", 0);
+
+ pr_info("psc913x board from Freescale Semiconductor\n");
+}
+
+static struct of_device_id __initdata psc913x_board_ids[] = {
+ { .type = "soc", },
+ { .type = "dsp", },
+ { .compatible = "soc", },
+ { .compatible = "simple-bus", },
+ { .compatible = "gianfar", },
+ {},
+};
+
+static int __init psc913x_board_publish_devices(void)
+{
+ return of_platform_bus_probe(NULL, psc913x_board_ids, NULL);
+}
+machine_device_initcall(psc9131_rdb, psc913x_board_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+
+static int __init psc9131_rdb_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,psc9131rdb");
+}
+
+define_machine(psc9131_rdb) {
+ .name = "PSC9131 RDB",
+ .probe = psc9131_rdb_probe,
+ .setup_arch = psc913x_board_setup_arch,
+ .init_IRQ = psc913x_board_pic_init,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.7.5.4
^ permalink raw reply related
* linux-next: manual merge of the devicetree tree with the powerpc tree
From: Stephen Rothwell @ 2012-03-13 5:01 UTC (permalink / raw)
To: Grant Likely
Cc: Gavin Shan, linux-kernel, linux-next, Paul Mackerras,
linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1209 bytes --]
Hi Grant,
Today's linux-next merge of the devicetree tree got a conflict in
include/linux/of.h between commit eb740b5f3e65 ("powerpc/eeh: Introduce
EEH device") from the powerpc tree and commit 0f22dd395fc4 ("of: Only
compile OF_DYNAMIC on PowerPC pseries and iseries") from the devicetree
tree.
Just context changes. I fixed it up (see below) and can carry the fix as
necessary.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --cc include/linux/of.h
index bdb1c07,533603e..0000000
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@@ -75,14 -72,10 +75,17 @@@ struct of_phandle_args
uint32_t args[MAX_PHANDLE_ARGS];
};
+#if defined(CONFIG_EEH)
+static inline struct eeh_dev *of_node_to_eeh_dev(struct device_node *dn)
+{
+ return dn->edev;
+}
+#endif
+
- #if defined(CONFIG_SPARC) || !defined(CONFIG_OF)
+ #ifdef CONFIG_OF_DYNAMIC
+ extern struct device_node *of_node_get(struct device_node *node);
+ extern void of_node_put(struct device_node *node);
+ #else /* CONFIG_OF_DYNAMIC */
/* Dummy ref counting routines - to be implemented later */
static inline struct device_node *of_node_get(struct device_node *node)
{
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* linux-next: manual merge of the pci tree with the powerpc tree
From: Stephen Rothwell @ 2012-03-13 1:43 UTC (permalink / raw)
To: Jesse Barnes; +Cc: Gavin Shan, linux-kernel, linux-next, Bjorn Helgaas, ppc-dev
[-- Attachment #1: Type: text/plain, Size: 4556 bytes --]
Hi Jesse,
Today's linux-next merge of the pci tree got a conflict in
arch/powerpc/include/asm/ppc-pci.h between commit cb3bc9d0de1e
("powerpc/eeh: Cleanup comments in the EEH core") from the powerpc tree
and commit 673c97562489 ("powerpc/PCI: replace pci_probe_only with
pci_flags") from the pci tree.
Just context changes. I fixed it up (see below) and can carry the fix as
necessary.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --cc arch/powerpc/include/asm/ppc-pci.h
index e660b37,f4f7ad8..0000000
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@@ -45,23 -45,92 +45,21 @@@ extern void init_pci_config_tokens (voi
extern unsigned long get_phb_buid (struct device_node *);
extern int rtas_setup_phb(struct pci_controller *phb);
- extern unsigned long pci_probe_only;
-
-/* ---- EEH internal-use-only related routines ---- */
#ifdef CONFIG_EEH
+void pci_addr_cache_build(void);
void pci_addr_cache_insert_device(struct pci_dev *dev);
void pci_addr_cache_remove_device(struct pci_dev *dev);
-void pci_addr_cache_build(void);
-struct pci_dev *pci_get_device_by_addr(unsigned long addr);
-
-/**
- * eeh_slot_error_detail -- record and EEH error condition to the log
- * @pdn: pci device node
- * @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE
- *
- * Obtains the EEH error details from the RTAS subsystem,
- * and then logs these details with the RTAS error log system.
- */
-#define EEH_LOG_TEMP_FAILURE 1
-#define EEH_LOG_PERM_FAILURE 2
-void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
-
-/**
- * rtas_pci_enable - enable IO transfers for this slot
- * @pdn: pci device node
- * @function: either EEH_THAW_MMIO or EEH_THAW_DMA
- *
- * Enable I/O transfers to this slot
- */
-#define EEH_THAW_MMIO 2
-#define EEH_THAW_DMA 3
-int rtas_pci_enable(struct pci_dn *pdn, int function);
-
-/**
- * rtas_set_slot_reset -- unfreeze a frozen slot
- * @pdn: pci device node
- *
- * Clear the EEH-frozen condition on a slot. This routine
- * does this by asserting the PCI #RST line for 1/8th of
- * a second; this routine will sleep while the adapter is
- * being reset.
- *
- * Returns a non-zero value if the reset failed.
- */
-int rtas_set_slot_reset (struct pci_dn *);
-int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
-
-/**
- * eeh_restore_bars - Restore device configuration info.
- * @pdn: pci device node
- *
- * A reset of a PCI device will clear out its config space.
- * This routines will restore the config space for this
- * device, and is children, to values previously obtained
- * from the firmware.
- */
-void eeh_restore_bars(struct pci_dn *);
-
-/**
- * rtas_configure_bridge -- firmware initialization of pci bridge
- * @pdn: pci device node
- *
- * Ask the firmware to configure all PCI bridges devices
- * located behind the indicated node. Required after a
- * pci device reset. Does essentially the same hing as
- * eeh_restore_bars, but for brdges, and lets firmware
- * do the work.
- */
-void rtas_configure_bridge(struct pci_dn *);
-
+struct pci_dev *pci_addr_cache_get_device(unsigned long addr);
+void eeh_slot_error_detail(struct eeh_dev *edev, int severity);
+int eeh_pci_enable(struct eeh_dev *edev, int function);
+int eeh_reset_pe(struct eeh_dev *);
+void eeh_restore_bars(struct eeh_dev *);
int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
-
-/**
- * eeh_mark_slot -- set mode flags for pertition endpoint
- * @pdn: pci device node
- *
- * mark and clear slots: find "partition endpoint" PE and set or
- * clear the flags for each subnode of the PE.
- */
-void eeh_mark_slot (struct device_node *dn, int mode_flag);
-void eeh_clear_slot (struct device_node *dn, int mode_flag);
-
-/**
- * find_device_pe -- Find the associated "Partiationable Endpoint" PE
- * @pdn: pci device node
- */
-struct device_node * find_device_pe(struct device_node *dn);
+void eeh_mark_slot(struct device_node *dn, int mode_flag);
+void eeh_clear_slot(struct device_node *dn, int mode_flag);
+struct device_node *eeh_find_device_pe(struct device_node *dn);
void eeh_sysfs_add_device(struct pci_dev *pdev);
void eeh_sysfs_remove_device(struct pci_dev *pdev);
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* [PATCH 24/35] Disintegrate asm/system.h for PowerPC [ver #2]
From: David Howells @ 2012-03-12 23:40 UTC (permalink / raw)
To: paul.gortmaker, hpa
Cc: linux-arch, arnd, torvalds, linux-kernel, David Howells,
linuxppc-dev
In-Reply-To: <20120312233602.13888.27659.stgit@warthog.procyon.org.uk>
Disintegrate asm/system.h for PowerPC.
Signed-off-by: David Howells <dhowells@redhat.com>
cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/include/asm/atomic.h | 8
arch/powerpc/include/asm/auxvec.h | 2
arch/powerpc/include/asm/barrier.h | 68 +++
arch/powerpc/include/asm/bug.h | 11
arch/powerpc/include/asm/cache.h | 16 +
arch/powerpc/include/asm/cmpxchg.h | 309 ++++++++++++
arch/powerpc/include/asm/debug.h | 56 ++
arch/powerpc/include/asm/dma.h | 1
arch/powerpc/include/asm/exec.h | 9
arch/powerpc/include/asm/hw_breakpoint.h | 2
arch/powerpc/include/asm/irq.h | 1
arch/powerpc/include/asm/processor.h | 30 +
arch/powerpc/include/asm/reg_booke.h | 5
arch/powerpc/include/asm/rtas.h | 2
arch/powerpc/include/asm/setup.h | 24 +
arch/powerpc/include/asm/switch_to.h | 65 ++
arch/powerpc/include/asm/system.h | 560 ---------------------
arch/powerpc/kernel/align.c | 2
arch/powerpc/kernel/cputable.c | 1
arch/powerpc/kernel/crash.c | 2
arch/powerpc/kernel/idle.c | 1
arch/powerpc/kernel/irq.c | 1
arch/powerpc/kernel/kprobes.c | 1
arch/powerpc/kernel/lparcfg.c | 1
arch/powerpc/kernel/ppc_ksyms.c | 2
arch/powerpc/kernel/process.c | 3
arch/powerpc/kernel/prom.c | 1
arch/powerpc/kernel/prom_init.c | 1
arch/powerpc/kernel/ptrace.c | 2
arch/powerpc/kernel/ptrace32.c | 2
arch/powerpc/kernel/rtas.c | 1
arch/powerpc/kernel/setup-common.c | 1
arch/powerpc/kernel/setup_32.c | 1
arch/powerpc/kernel/setup_64.c | 1
arch/powerpc/kernel/signal.c | 1
arch/powerpc/kernel/signal_32.c | 1
arch/powerpc/kernel/signal_64.c | 1
arch/powerpc/kernel/smp.c | 2
arch/powerpc/kernel/softemu8xx.c | 1
arch/powerpc/kernel/swsusp.c | 2
arch/powerpc/kernel/swsusp_64.c | 1
arch/powerpc/kernel/sys_ppc32.c | 1
arch/powerpc/kernel/sysfs.c | 1
arch/powerpc/kernel/traps.c | 3
arch/powerpc/kernel/vdso.c | 1
arch/powerpc/kvm/book3s_hv.c | 1
arch/powerpc/lib/alloc.c | 2
arch/powerpc/lib/copyuser_power7_vmx.c | 1
arch/powerpc/mm/44x_mmu.c | 1
arch/powerpc/mm/fault.c | 2
arch/powerpc/mm/hash_utils_64.c | 1
arch/powerpc/mm/init_32.c | 1
arch/powerpc/mm/init_64.c | 1
arch/powerpc/mm/numa.c | 2
arch/powerpc/mm/pgtable_32.c | 1
arch/powerpc/mm/pgtable_64.c | 1
arch/powerpc/oprofile/common.c | 1
arch/powerpc/oprofile/op_model_7450.c | 1
arch/powerpc/oprofile/op_model_cell.c | 1
arch/powerpc/oprofile/op_model_fsl_emb.c | 1
arch/powerpc/oprofile/op_model_power4.c | 1
arch/powerpc/oprofile/op_model_rs64.c | 1
arch/powerpc/platforms/82xx/pq2.c | 1
arch/powerpc/platforms/83xx/km83xx.c | 1
arch/powerpc/platforms/83xx/mpc832x_mds.c | 1
arch/powerpc/platforms/83xx/mpc834x_itx.c | 1
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1
arch/powerpc/platforms/83xx/mpc836x_mds.c | 1
arch/powerpc/platforms/83xx/sbc834x.c | 1
arch/powerpc/platforms/85xx/corenet_ds.c | 1
arch/powerpc/platforms/85xx/ksi8560.c | 1
arch/powerpc/platforms/85xx/mpc8536_ds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 1
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 1
arch/powerpc/platforms/85xx/p1010rdb.c | 1
arch/powerpc/platforms/85xx/p1023_rds.c | 1
arch/powerpc/platforms/85xx/p2041_rdb.c | 1
arch/powerpc/platforms/85xx/p3041_ds.c | 1
arch/powerpc/platforms/85xx/p4080_ds.c | 1
arch/powerpc/platforms/85xx/p5020_ds.c | 1
arch/powerpc/platforms/85xx/sbc8548.c | 1
arch/powerpc/platforms/85xx/sbc8560.c | 1
arch/powerpc/platforms/85xx/socrates.c | 1
arch/powerpc/platforms/85xx/stx_gp3.c | 1
arch/powerpc/platforms/85xx/tqm85xx.c | 1
arch/powerpc/platforms/85xx/xes_mpc85xx.c | 1
arch/powerpc/platforms/86xx/gef_ppc9a.c | 1
arch/powerpc/platforms/86xx/gef_sbc310.c | 1
arch/powerpc/platforms/86xx/gef_sbc610.c | 1
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 1
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 1
arch/powerpc/platforms/86xx/pic.c | 1
arch/powerpc/platforms/86xx/sbc8641d.c | 1
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 1
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 1
arch/powerpc/platforms/8xx/tqm8xx_setup.c | 1
arch/powerpc/platforms/cell/smp.c | 1
arch/powerpc/platforms/embedded6xx/c2k.c | 1
arch/powerpc/platforms/embedded6xx/holly.c | 1
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 1
arch/powerpc/platforms/embedded6xx/prpmc2800.c | 1
arch/powerpc/platforms/embedded6xx/storcenter.c | 1
arch/powerpc/platforms/fsl_uli1575.c | 1
arch/powerpc/platforms/iseries/dt.c | 1
arch/powerpc/platforms/iseries/lpevents.c | 1
arch/powerpc/platforms/iseries/setup.c | 1
arch/powerpc/platforms/iseries/smp.c | 1
arch/powerpc/platforms/iseries/viopath.c | 1
arch/powerpc/platforms/maple/setup.c | 1
arch/powerpc/platforms/maple/time.c | 1
arch/powerpc/platforms/pasemi/setup.c | 2
arch/powerpc/platforms/powermac/bootx_init.c | 1
arch/powerpc/platforms/powermac/cpufreq_32.c | 2
arch/powerpc/platforms/powermac/nvram.c | 1
arch/powerpc/platforms/powermac/setup.c | 1
arch/powerpc/platforms/powermac/time.c | 1
arch/powerpc/platforms/powernv/smp.c | 1
arch/powerpc/platforms/ps3/mm.c | 1
arch/powerpc/platforms/pseries/dtl.c | 2
arch/powerpc/platforms/pseries/hotplug-cpu.c | 1
arch/powerpc/platforms/pseries/processor_idle.c | 1
arch/powerpc/platforms/pseries/ras.c | 1
arch/powerpc/platforms/pseries/smp.c | 1
arch/powerpc/platforms/wsp/chroma.c | 1
arch/powerpc/platforms/wsp/psr2.c | 1
arch/powerpc/sysdev/cpm_common.c | 1
arch/powerpc/sysdev/fsl_soc.c | 1
arch/powerpc/sysdev/msi_bitmap.c | 1
arch/powerpc/sysdev/tsi108_dev.c | 1
arch/powerpc/xmon/xmon.c | 1
133 files changed, 635 insertions(+), 667 deletions(-)
create mode 100644 arch/powerpc/include/asm/barrier.h
create mode 100644 arch/powerpc/include/asm/cmpxchg.h
create mode 100644 arch/powerpc/include/asm/debug.h
create mode 100644 arch/powerpc/include/asm/exec.h
create mode 100644 arch/powerpc/include/asm/switch_to.h
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 02e41b5..801aaaf 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -5,13 +5,9 @@
* PowerPC atomic operations
*/
-#include <linux/types.h>
-
#ifdef __KERNEL__
-#include <linux/compiler.h>
-#include <asm/synch.h>
-#include <asm/asm-compat.h>
-#include <asm/system.h>
+#include <linux/types.h>
+#include <asm/cmpxchg.h>
#define ATOMIC_INIT(i) { (i) }
diff --git a/arch/powerpc/include/asm/auxvec.h b/arch/powerpc/include/asm/auxvec.h
index 19a099b..ce17d2c 100644
--- a/arch/powerpc/include/asm/auxvec.h
+++ b/arch/powerpc/include/asm/auxvec.h
@@ -16,4 +16,6 @@
*/
#define AT_SYSINFO_EHDR 33
+#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
+
#endif
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
new file mode 100644
index 0000000..ae78225
--- /dev/null
+++ b/arch/powerpc/include/asm/barrier.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
+ */
+#ifndef _ASM_POWERPC_BARRIER_H
+#define _ASM_POWERPC_BARRIER_H
+
+/*
+ * Memory barrier.
+ * The sync instruction guarantees that all memory accesses initiated
+ * by this processor have been performed (with respect to all other
+ * mechanisms that access memory). The eieio instruction is a barrier
+ * providing an ordering (separately) for (a) cacheable stores and (b)
+ * loads and stores to non-cacheable memory (e.g. I/O devices).
+ *
+ * mb() prevents loads and stores being reordered across this point.
+ * rmb() prevents loads being reordered across this point.
+ * wmb() prevents stores being reordered across this point.
+ * read_barrier_depends() prevents data-dependent loads being reordered
+ * across this point (nop on PPC).
+ *
+ * *mb() variants without smp_ prefix must order all types of memory
+ * operations with one another. sync is the only instruction sufficient
+ * to do this.
+ *
+ * For the smp_ barriers, ordering is for cacheable memory operations
+ * only. We have to use the sync instruction for smp_mb(), since lwsync
+ * doesn't order loads with respect to previous stores. Lwsync can be
+ * used for smp_rmb() and smp_wmb().
+ *
+ * However, on CPUs that don't support lwsync, lwsync actually maps to a
+ * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
+ */
+#define mb() __asm__ __volatile__ ("sync" : : : "memory")
+#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
+#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
+#define read_barrier_depends() do { } while(0)
+
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+
+#ifdef CONFIG_SMP
+
+#ifdef __SUBARCH_HAS_LWSYNC
+# define SMPWMB LWSYNC
+#else
+# define SMPWMB eieio
+#endif
+
+#define smp_mb() mb()
+#define smp_rmb() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
+#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
+#define smp_read_barrier_depends() read_barrier_depends()
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do { } while(0)
+#endif /* CONFIG_SMP */
+
+/*
+ * This is a barrier which prevents following instructions from being
+ * started until the value of the argument x is known. For example, if
+ * x is a variable loaded from memory, this prevents following
+ * instructions from being executed until the load has been performed.
+ */
+#define data_barrier(x) \
+ asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
+
+#endif /* _ASM_POWERPC_BARRIER_H */
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index 065c590..3eb53d7 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -126,5 +126,16 @@
#include <asm-generic/bug.h>
+#ifndef __ASSEMBLY__
+
+struct pt_regs;
+extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
+extern void bad_page_fault(struct pt_regs *, unsigned long, int);
+extern void _exception(int, struct pt_regs *, int, unsigned long);
+extern void die(const char *, struct pt_regs *, long);
+extern void print_backtrace(unsigned long *);
+
+#endif /* !__ASSEMBLY__ */
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_BUG_H */
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 4b50941..9e495c9 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -42,8 +42,24 @@ extern struct ppc64_caches ppc64_caches;
#endif /* __powerpc64__ && ! __ASSEMBLY__ */
#if !defined(__ASSEMBLY__)
+
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
+
+#ifdef CONFIG_6xx
+extern long _get_L2CR(void);
+extern long _get_L3CR(void);
+extern void _set_L2CR(unsigned long);
+extern void _set_L3CR(unsigned long);
+#else
+#define _get_L2CR() 0L
+#define _get_L3CR() 0L
+#define _set_L2CR(val) do { } while(0)
+#define _set_L3CR(val) do { } while(0)
#endif
+extern void cacheable_memzero(void *p, unsigned int nb);
+extern void *cacheable_memcpy(void *, const void *, unsigned int);
+
+#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_CACHE_H */
diff --git a/arch/powerpc/include/asm/cmpxchg.h b/arch/powerpc/include/asm/cmpxchg.h
new file mode 100644
index 0000000..e245aab
--- /dev/null
+++ b/arch/powerpc/include/asm/cmpxchg.h
@@ -0,0 +1,309 @@
+#ifndef _ASM_POWERPC_CMPXCHG_H_
+#define _ASM_POWERPC_CMPXCHG_H_
+
+#ifdef __KERNEL__
+#include <linux/compiler.h>
+#include <asm/synch.h>
+#include <asm/asm-compat.h>
+
+/*
+ * Atomic exchange
+ *
+ * Changes the memory location '*ptr' to be val and returns
+ * the previous value stored there.
+ */
+static __always_inline unsigned long
+__xchg_u32(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+ PPC_RELEASE_BARRIER
+"1: lwarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stwcx. %3,0,%2 \n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+
+/*
+ * Atomic exchange
+ *
+ * Changes the memory location '*ptr' to be val and returns
+ * the previous value stored there.
+ */
+static __always_inline unsigned long
+__xchg_u32_local(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+"1: lwarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stwcx. %3,0,%2 \n\
+ bne- 1b"
+ : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+
+#ifdef CONFIG_PPC64
+static __always_inline unsigned long
+__xchg_u64(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+ PPC_RELEASE_BARRIER
+"1: ldarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stdcx. %3,0,%2 \n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+
+static __always_inline unsigned long
+__xchg_u64_local(volatile void *p, unsigned long val)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__(
+"1: ldarx %0,0,%2 \n"
+ PPC405_ERR77(0,%2)
+" stdcx. %3,0,%2 \n\
+ bne- 1b"
+ : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
+ : "r" (p), "r" (val)
+ : "cc", "memory");
+
+ return prev;
+}
+#endif
+
+/*
+ * This function doesn't exist, so you'll get a linker error
+ * if something tries to do an invalid xchg().
+ */
+extern void __xchg_called_with_bad_pointer(void);
+
+static __always_inline unsigned long
+__xchg(volatile void *ptr, unsigned long x, unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __xchg_u32(ptr, x);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __xchg_u64(ptr, x);
+#endif
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+
+static __always_inline unsigned long
+__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __xchg_u32_local(ptr, x);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __xchg_u64_local(ptr, x);
+#endif
+ }
+ __xchg_called_with_bad_pointer();
+ return x;
+}
+#define xchg(ptr,x) \
+ ({ \
+ __typeof__(*(ptr)) _x_ = (x); \
+ (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
+ })
+
+#define xchg_local(ptr,x) \
+ ({ \
+ __typeof__(*(ptr)) _x_ = (x); \
+ (__typeof__(*(ptr))) __xchg_local((ptr), \
+ (unsigned long)_x_, sizeof(*(ptr))); \
+ })
+
+/*
+ * Compare and exchange - if *p == old, set it to new,
+ * and return the old value of *p.
+ */
+#define __HAVE_ARCH_CMPXCHG 1
+
+static __always_inline unsigned long
+__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
+{
+ unsigned int prev;
+
+ __asm__ __volatile__ (
+ PPC_RELEASE_BARRIER
+"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
+ cmpw 0,%0,%3\n\
+ bne- 2f\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %4,0,%2\n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+
+static __always_inline unsigned long
+__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
+ unsigned long new)
+{
+ unsigned int prev;
+
+ __asm__ __volatile__ (
+"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
+ cmpw 0,%0,%3\n\
+ bne- 2f\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %4,0,%2\n\
+ bne- 1b"
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+
+#ifdef CONFIG_PPC64
+static __always_inline unsigned long
+__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__ (
+ PPC_RELEASE_BARRIER
+"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
+ cmpd 0,%0,%3\n\
+ bne- 2f\n\
+ stdcx. %4,0,%2\n\
+ bne- 1b"
+ PPC_ACQUIRE_BARRIER
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+
+static __always_inline unsigned long
+__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
+ unsigned long new)
+{
+ unsigned long prev;
+
+ __asm__ __volatile__ (
+"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
+ cmpd 0,%0,%3\n\
+ bne- 2f\n\
+ stdcx. %4,0,%2\n\
+ bne- 1b"
+ "\n\
+2:"
+ : "=&r" (prev), "+m" (*p)
+ : "r" (p), "r" (old), "r" (new)
+ : "cc", "memory");
+
+ return prev;
+}
+#endif
+
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static __always_inline unsigned long
+__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
+ unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __cmpxchg_u64(ptr, old, new);
+#endif
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+static __always_inline unsigned long
+__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
+ unsigned int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32_local(ptr, old, new);
+#ifdef CONFIG_PPC64
+ case 8:
+ return __cmpxchg_u64_local(ptr, old, new);
+#endif
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr, o, n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+ })
+
+
+#define cmpxchg_local(ptr, o, n) \
+ ({ \
+ __typeof__(*(ptr)) _o_ = (o); \
+ __typeof__(*(ptr)) _n_ = (n); \
+ (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
+ (unsigned long)_n_, sizeof(*(ptr))); \
+ })
+
+#ifdef CONFIG_PPC64
+#define cmpxchg64(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg((ptr), (o), (n)); \
+ })
+#define cmpxchg64_local(ptr, o, n) \
+ ({ \
+ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
+ cmpxchg_local((ptr), (o), (n)); \
+ })
+#else
+#include <asm-generic/cmpxchg-local.h>
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_CMPXCHG_H_ */
diff --git a/arch/powerpc/include/asm/debug.h b/arch/powerpc/include/asm/debug.h
new file mode 100644
index 0000000..716d2f0
--- /dev/null
+++ b/arch/powerpc/include/asm/debug.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
+ */
+#ifndef _ASM_POWERPC_DEBUG_H
+#define _ASM_POWERPC_DEBUG_H
+
+struct pt_regs;
+
+extern struct dentry *powerpc_debugfs_root;
+
+#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
+
+extern int (*__debugger)(struct pt_regs *regs);
+extern int (*__debugger_ipi)(struct pt_regs *regs);
+extern int (*__debugger_bpt)(struct pt_regs *regs);
+extern int (*__debugger_sstep)(struct pt_regs *regs);
+extern int (*__debugger_iabr_match)(struct pt_regs *regs);
+extern int (*__debugger_dabr_match)(struct pt_regs *regs);
+extern int (*__debugger_fault_handler)(struct pt_regs *regs);
+
+#define DEBUGGER_BOILERPLATE(__NAME) \
+static inline int __NAME(struct pt_regs *regs) \
+{ \
+ if (unlikely(__ ## __NAME)) \
+ return __ ## __NAME(regs); \
+ return 0; \
+}
+
+DEBUGGER_BOILERPLATE(debugger)
+DEBUGGER_BOILERPLATE(debugger_ipi)
+DEBUGGER_BOILERPLATE(debugger_bpt)
+DEBUGGER_BOILERPLATE(debugger_sstep)
+DEBUGGER_BOILERPLATE(debugger_iabr_match)
+DEBUGGER_BOILERPLATE(debugger_dabr_match)
+DEBUGGER_BOILERPLATE(debugger_fault_handler)
+
+#else
+static inline int debugger(struct pt_regs *regs) { return 0; }
+static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
+static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
+static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
+static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
+static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
+static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
+#endif
+
+extern int set_dabr(unsigned long dabr);
+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
+extern void do_send_trap(struct pt_regs *regs, unsigned long address,
+ unsigned long error_code, int signal_code, int brkpt);
+#else
+extern void do_dabr(struct pt_regs *regs, unsigned long address,
+ unsigned long error_code);
+#endif
+
+#endif /* _ASM_POWERPC_DEBUG_H */
diff --git a/arch/powerpc/include/asm/dma.h b/arch/powerpc/include/asm/dma.h
index a7e06e2..2f3511a 100644
--- a/arch/powerpc/include/asm/dma.h
+++ b/arch/powerpc/include/asm/dma.h
@@ -24,7 +24,6 @@
#include <asm/io.h>
#include <linux/spinlock.h>
-#include <asm/system.h>
#ifndef MAX_DMA_CHANNELS
#define MAX_DMA_CHANNELS 8
diff --git a/arch/powerpc/include/asm/exec.h b/arch/powerpc/include/asm/exec.h
new file mode 100644
index 0000000..8196e9c
--- /dev/null
+++ b/arch/powerpc/include/asm/exec.h
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
+ */
+#ifndef _ASM_POWERPC_EXEC_H
+#define _ASM_POWERPC_EXEC_H
+
+extern unsigned long arch_align_stack(unsigned long sp);
+
+#endif /* _ASM_POWERPC_EXEC_H */
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index 80fd4d2..be04330 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -35,7 +35,7 @@ struct arch_hw_breakpoint {
#include <linux/kdebug.h>
#include <asm/reg.h>
-#include <asm/system.h>
+#include <asm/debug.h>
struct perf_event;
struct pmu;
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index c0e1bc3..034c5ca 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -68,6 +68,7 @@ typedef unsigned long irq_hw_number_t;
*/
struct irq_host;
struct radix_tree_root;
+struct device_node;
/* Functions below are provided by the host and called whenever a new mapping
* is created or an old mapping is disposed. The host can then proceed to
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index b585bff..8e2d037 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -385,6 +385,36 @@ static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
extern unsigned long cpuidle_disable;
enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
+extern int powersave_nap; /* set if nap mode can be used in idle loop */
+void cpu_idle_wait(void);
+
+#ifdef CONFIG_PSERIES_IDLE
+extern void update_smt_snooze_delay(int snooze);
+extern int pseries_notify_cpuidle_add_cpu(int cpu);
+#else
+static inline void update_smt_snooze_delay(int snooze) {}
+static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
+#endif
+
+extern void flush_instruction_cache(void);
+extern void hard_reset_now(void);
+extern void poweroff_now(void);
+extern int fix_alignment(struct pt_regs *);
+extern void cvt_fd(float *from, double *to);
+extern void cvt_df(double *from, float *to);
+extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
+
+#ifdef CONFIG_PPC64
+/*
+ * We handle most unaligned accesses in hardware. On the other hand
+ * unaligned DMA can be very expensive on some ppc64 IO chips (it does
+ * powers of 2 writes until it reaches sufficient alignment).
+ *
+ * Based on this we disable the IP header alignment in network drivers.
+ */
+#define NET_IP_ALIGN 0
+#endif
+
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_PROCESSOR_H */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 500fe1d..0e94450 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -15,6 +15,11 @@
#ifndef __ASM_POWERPC_REG_BOOKE_H__
#define __ASM_POWERPC_REG_BOOKE_H__
+#ifdef CONFIG_BOOKE_WDT
+extern u32 booke_wdt_enabled;
+extern u32 booke_wdt_period;
+#endif /* CONFIG_BOOKE_WDT */
+
/* Machine State Register (MSR) Fields */
#define MSR_GS (1<<28) /* Guest state */
#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 01c143b..9d6c37a 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -325,5 +325,7 @@ static inline int page_is_rtas_user_buf(unsigned long pfn)
static inline int page_is_rtas_user_buf(unsigned long pfn) { return 0;}
#endif
+extern int call_rtas(const char *, int, int, unsigned long *, ...);
+
#endif /* __KERNEL__ */
#endif /* _POWERPC_RTAS_H */
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 186e0fb..d084ce1 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -5,6 +5,28 @@
#ifndef __ASSEMBLY__
extern void ppc_printk_progress(char *s, unsigned short hex);
-#endif
+
+extern unsigned int rtas_data;
+extern int mem_init_done; /* set on boot once kmalloc can be called */
+extern int init_bootmem_done; /* set once bootmem is available */
+extern phys_addr_t memory_limit;
+extern unsigned long klimit;
+extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
+
+extern void via_cuda_init(void);
+extern void read_rtc_time(void);
+extern void pmac_find_display(void);
+
+struct device_node;
+extern void note_scsi_host(struct device_node *, void *);
+
+/* Used in very early kernel initialization. */
+extern unsigned long reloc_offset(void);
+extern unsigned long add_reloc_offset(unsigned long);
+extern void reloc_got2(unsigned long);
+
+#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
+
+#endif /* !__ASSEMBLY__ */
#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
new file mode 100644
index 0000000..caf82d0
--- /dev/null
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
+ */
+#ifndef _ASM_POWERPC_SWITCH_TO_H
+#define _ASM_POWERPC_SWITCH_TO_H
+
+struct thread_struct;
+struct task_struct;
+struct pt_regs;
+
+extern struct task_struct *__switch_to(struct task_struct *,
+ struct task_struct *);
+#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
+
+struct thread_struct;
+extern struct task_struct *_switch(struct thread_struct *prev,
+ struct thread_struct *next);
+
+extern void giveup_fpu(struct task_struct *);
+extern void disable_kernel_fp(void);
+extern void enable_kernel_fp(void);
+extern void flush_fp_to_thread(struct task_struct *);
+extern void enable_kernel_altivec(void);
+extern void giveup_altivec(struct task_struct *);
+extern void load_up_altivec(struct task_struct *);
+extern int emulate_altivec(struct pt_regs *);
+extern void __giveup_vsx(struct task_struct *);
+extern void giveup_vsx(struct task_struct *);
+extern void enable_kernel_spe(void);
+extern void giveup_spe(struct task_struct *);
+extern void load_up_spe(struct task_struct *);
+
+#ifndef CONFIG_SMP
+extern void discard_lazy_cpu_state(void);
+#else
+static inline void discard_lazy_cpu_state(void)
+{
+}
+#endif
+
+#ifdef CONFIG_ALTIVEC
+extern void flush_altivec_to_thread(struct task_struct *);
+#else
+static inline void flush_altivec_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#ifdef CONFIG_VSX
+extern void flush_vsx_to_thread(struct task_struct *);
+#else
+static inline void flush_vsx_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#ifdef CONFIG_SPE
+extern void flush_spe_to_thread(struct task_struct *);
+#else
+static inline void flush_spe_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#endif /* _ASM_POWERPC_SWITCH_TO_H */
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index c377457..502c1e0 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -1,554 +1,6 @@
-/*
- * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- */
-#ifndef _ASM_POWERPC_SYSTEM_H
-#define _ASM_POWERPC_SYSTEM_H
-
-#include <linux/kernel.h>
-#include <linux/irqflags.h>
-
-#include <asm/hw_irq.h>
-
-/*
- * Memory barrier.
- * The sync instruction guarantees that all memory accesses initiated
- * by this processor have been performed (with respect to all other
- * mechanisms that access memory). The eieio instruction is a barrier
- * providing an ordering (separately) for (a) cacheable stores and (b)
- * loads and stores to non-cacheable memory (e.g. I/O devices).
- *
- * mb() prevents loads and stores being reordered across this point.
- * rmb() prevents loads being reordered across this point.
- * wmb() prevents stores being reordered across this point.
- * read_barrier_depends() prevents data-dependent loads being reordered
- * across this point (nop on PPC).
- *
- * *mb() variants without smp_ prefix must order all types of memory
- * operations with one another. sync is the only instruction sufficient
- * to do this.
- *
- * For the smp_ barriers, ordering is for cacheable memory operations
- * only. We have to use the sync instruction for smp_mb(), since lwsync
- * doesn't order loads with respect to previous stores. Lwsync can be
- * used for smp_rmb() and smp_wmb().
- *
- * However, on CPUs that don't support lwsync, lwsync actually maps to a
- * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
- */
-#define mb() __asm__ __volatile__ ("sync" : : : "memory")
-#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
-#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
-#define read_barrier_depends() do { } while(0)
-
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#ifdef __KERNEL__
-#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
-#ifdef CONFIG_SMP
-
-#ifdef __SUBARCH_HAS_LWSYNC
-# define SMPWMB LWSYNC
-#else
-# define SMPWMB eieio
-#endif
-
-#define smp_mb() mb()
-#define smp_rmb() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
-#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif /* CONFIG_SMP */
-
-/*
- * This is a barrier which prevents following instructions from being
- * started until the value of the argument x is known. For example, if
- * x is a variable loaded from memory, this prevents following
- * instructions from being executed until the load has been performed.
- */
-#define data_barrier(x) \
- asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
-
-struct task_struct;
-struct pt_regs;
-
-#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
-
-extern int (*__debugger)(struct pt_regs *regs);
-extern int (*__debugger_ipi)(struct pt_regs *regs);
-extern int (*__debugger_bpt)(struct pt_regs *regs);
-extern int (*__debugger_sstep)(struct pt_regs *regs);
-extern int (*__debugger_iabr_match)(struct pt_regs *regs);
-extern int (*__debugger_dabr_match)(struct pt_regs *regs);
-extern int (*__debugger_fault_handler)(struct pt_regs *regs);
-
-#define DEBUGGER_BOILERPLATE(__NAME) \
-static inline int __NAME(struct pt_regs *regs) \
-{ \
- if (unlikely(__ ## __NAME)) \
- return __ ## __NAME(regs); \
- return 0; \
-}
-
-DEBUGGER_BOILERPLATE(debugger)
-DEBUGGER_BOILERPLATE(debugger_ipi)
-DEBUGGER_BOILERPLATE(debugger_bpt)
-DEBUGGER_BOILERPLATE(debugger_sstep)
-DEBUGGER_BOILERPLATE(debugger_iabr_match)
-DEBUGGER_BOILERPLATE(debugger_dabr_match)
-DEBUGGER_BOILERPLATE(debugger_fault_handler)
-
-#else
-static inline int debugger(struct pt_regs *regs) { return 0; }
-static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
-static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
-static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
-static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
-static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
-static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
-#endif
-
-extern int set_dabr(unsigned long dabr);
-#ifdef CONFIG_PPC_ADV_DEBUG_REGS
-extern void do_send_trap(struct pt_regs *regs, unsigned long address,
- unsigned long error_code, int signal_code, int brkpt);
-#else
-extern void do_dabr(struct pt_regs *regs, unsigned long address,
- unsigned long error_code);
-#endif
-extern void print_backtrace(unsigned long *);
-extern void flush_instruction_cache(void);
-extern void hard_reset_now(void);
-extern void poweroff_now(void);
-
-#ifdef CONFIG_6xx
-extern long _get_L2CR(void);
-extern long _get_L3CR(void);
-extern void _set_L2CR(unsigned long);
-extern void _set_L3CR(unsigned long);
-#else
-#define _get_L2CR() 0L
-#define _get_L3CR() 0L
-#define _set_L2CR(val) do { } while(0)
-#define _set_L3CR(val) do { } while(0)
-#endif
-
-extern void via_cuda_init(void);
-extern void read_rtc_time(void);
-extern void pmac_find_display(void);
-extern void giveup_fpu(struct task_struct *);
-extern void disable_kernel_fp(void);
-extern void enable_kernel_fp(void);
-extern void flush_fp_to_thread(struct task_struct *);
-extern void enable_kernel_altivec(void);
-extern void giveup_altivec(struct task_struct *);
-extern void load_up_altivec(struct task_struct *);
-extern int emulate_altivec(struct pt_regs *);
-extern void __giveup_vsx(struct task_struct *);
-extern void giveup_vsx(struct task_struct *);
-extern void enable_kernel_spe(void);
-extern void giveup_spe(struct task_struct *);
-extern void load_up_spe(struct task_struct *);
-extern int fix_alignment(struct pt_regs *);
-extern void cvt_fd(float *from, double *to);
-extern void cvt_df(double *from, float *to);
-
-#ifndef CONFIG_SMP
-extern void discard_lazy_cpu_state(void);
-#else
-static inline void discard_lazy_cpu_state(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ALTIVEC
-extern void flush_altivec_to_thread(struct task_struct *);
-#else
-static inline void flush_altivec_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-#ifdef CONFIG_VSX
-extern void flush_vsx_to_thread(struct task_struct *);
-#else
-static inline void flush_vsx_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-#ifdef CONFIG_SPE
-extern void flush_spe_to_thread(struct task_struct *);
-#else
-static inline void flush_spe_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-extern int call_rtas(const char *, int, int, unsigned long *, ...);
-extern void cacheable_memzero(void *p, unsigned int nb);
-extern void *cacheable_memcpy(void *, const void *, unsigned int);
-extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
-extern void bad_page_fault(struct pt_regs *, unsigned long, int);
-extern void _exception(int, struct pt_regs *, int, unsigned long);
-extern void die(const char *, struct pt_regs *, long);
-extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
-
-#ifdef CONFIG_BOOKE_WDT
-extern u32 booke_wdt_enabled;
-extern u32 booke_wdt_period;
-#endif /* CONFIG_BOOKE_WDT */
-
-struct device_node;
-extern void note_scsi_host(struct device_node *, void *);
-
-extern struct task_struct *__switch_to(struct task_struct *,
- struct task_struct *);
-#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
-
-struct thread_struct;
-extern struct task_struct *_switch(struct thread_struct *prev,
- struct thread_struct *next);
-
-extern unsigned int rtas_data;
-extern int mem_init_done; /* set on boot once kmalloc can be called */
-extern int init_bootmem_done; /* set once bootmem is available */
-extern phys_addr_t memory_limit;
-extern unsigned long klimit;
-extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
-
-extern int powersave_nap; /* set if nap mode can be used in idle loop */
-void cpu_idle_wait(void);
-
-#ifdef CONFIG_PSERIES_IDLE
-extern void update_smt_snooze_delay(int snooze);
-extern int pseries_notify_cpuidle_add_cpu(int cpu);
-#else
-static inline void update_smt_snooze_delay(int snooze) {}
-static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
-#endif
-
-/*
- * Atomic exchange
- *
- * Changes the memory location '*ptr' to be val and returns
- * the previous value stored there.
- */
-static __always_inline unsigned long
-__xchg_u32(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
- PPC_RELEASE_BARRIER
-"1: lwarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stwcx. %3,0,%2 \n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-/*
- * Atomic exchange
- *
- * Changes the memory location '*ptr' to be val and returns
- * the previous value stored there.
- */
-static __always_inline unsigned long
-__xchg_u32_local(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stwcx. %3,0,%2 \n\
- bne- 1b"
- : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-#ifdef CONFIG_PPC64
-static __always_inline unsigned long
-__xchg_u64(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
- PPC_RELEASE_BARRIER
-"1: ldarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stdcx. %3,0,%2 \n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
-__xchg_u64_local(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__(
-"1: ldarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stdcx. %3,0,%2 \n\
- bne- 1b"
- : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val)
- : "cc", "memory");
-
- return prev;
-}
-#endif
-
-/*
- * This function doesn't exist, so you'll get a linker error
- * if something tries to do an invalid xchg().
- */
-extern void __xchg_called_with_bad_pointer(void);
-
-static __always_inline unsigned long
-__xchg(volatile void *ptr, unsigned long x, unsigned int size)
-{
- switch (size) {
- case 4:
- return __xchg_u32(ptr, x);
-#ifdef CONFIG_PPC64
- case 8:
- return __xchg_u64(ptr, x);
-#endif
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-
-static __always_inline unsigned long
-__xchg_local(volatile void *ptr, unsigned long x, unsigned int size)
-{
- switch (size) {
- case 4:
- return __xchg_u32_local(ptr, x);
-#ifdef CONFIG_PPC64
- case 8:
- return __xchg_u64_local(ptr, x);
-#endif
- }
- __xchg_called_with_bad_pointer();
- return x;
-}
-#define xchg(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
- })
-
-#define xchg_local(ptr,x) \
- ({ \
- __typeof__(*(ptr)) _x_ = (x); \
- (__typeof__(*(ptr))) __xchg_local((ptr), \
- (unsigned long)_x_, sizeof(*(ptr))); \
- })
-
-/*
- * Compare and exchange - if *p == old, set it to new,
- * and return the old value of *p.
- */
-#define __HAVE_ARCH_CMPXCHG 1
-
-static __always_inline unsigned long
-__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
-{
- unsigned int prev;
-
- __asm__ __volatile__ (
- PPC_RELEASE_BARRIER
-"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
- cmpw 0,%0,%3\n\
- bne- 2f\n"
- PPC405_ERR77(0,%2)
-" stwcx. %4,0,%2\n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
-__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old,
- unsigned long new)
-{
- unsigned int prev;
-
- __asm__ __volatile__ (
-"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
- cmpw 0,%0,%3\n\
- bne- 2f\n"
- PPC405_ERR77(0,%2)
-" stwcx. %4,0,%2\n\
- bne- 1b"
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-
-#ifdef CONFIG_PPC64
-static __always_inline unsigned long
-__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
-{
- unsigned long prev;
-
- __asm__ __volatile__ (
- PPC_RELEASE_BARRIER
-"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
- cmpd 0,%0,%3\n\
- bne- 2f\n\
- stdcx. %4,0,%2\n\
- bne- 1b"
- PPC_ACQUIRE_BARRIER
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-
-static __always_inline unsigned long
-__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old,
- unsigned long new)
-{
- unsigned long prev;
-
- __asm__ __volatile__ (
-"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
- cmpd 0,%0,%3\n\
- bne- 2f\n\
- stdcx. %4,0,%2\n\
- bne- 1b"
- "\n\
-2:"
- : "=&r" (prev), "+m" (*p)
- : "r" (p), "r" (old), "r" (new)
- : "cc", "memory");
-
- return prev;
-}
-#endif
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static __always_inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
- unsigned int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
-#ifdef CONFIG_PPC64
- case 8:
- return __cmpxchg_u64(ptr, old, new);
-#endif
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-static __always_inline unsigned long
-__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
- unsigned int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32_local(ptr, old, new);
-#ifdef CONFIG_PPC64
- case 8:
- return __cmpxchg_u64_local(ptr, old, new);
-#endif
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-
-#define cmpxchg_local(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-#ifdef CONFIG_PPC64
-/*
- * We handle most unaligned accesses in hardware. On the other hand
- * unaligned DMA can be very expensive on some ppc64 IO chips (it does
- * powers of 2 writes until it reaches sufficient alignment).
- *
- * Based on this we disable the IP header alignment in network drivers.
- */
-#define NET_IP_ALIGN 0
-
-#define cmpxchg64(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg((ptr), (o), (n)); \
- })
-#define cmpxchg64_local(ptr, o, n) \
- ({ \
- BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
- cmpxchg_local((ptr), (o), (n)); \
- })
-#else
-#include <asm-generic/cmpxchg-local.h>
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-#endif
-
-extern unsigned long arch_align_stack(unsigned long sp);
-
-/* Used in very early kernel initialization. */
-extern unsigned long reloc_offset(void);
-extern unsigned long add_reloc_offset(unsigned long);
-extern void reloc_got2(unsigned long);
-
-#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
-
-extern struct dentry *powerpc_debugfs_root;
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_POWERPC_SYSTEM_H */
+/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
+#include <asm/barrier.h>
+#include <asm/cmpxchg.h>
+#include <asm/debug.h>
+#include <asm/exec.h>
+#include <asm/switch_to.h>
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 8184ee9..ee5b690 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -21,10 +21,10 @@
#include <linux/mm.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/cache.h>
#include <asm/cputable.h>
#include <asm/emulated_ops.h>
+#include <asm/switch_to.h>
struct aligninfo {
unsigned char len;
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 81db9e2..ff381f4 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -20,6 +20,7 @@
#include <asm/cputable.h>
#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
#include <asm/mmu.h>
+#include <asm/setup.h>
struct cpu_spec* cur_cpu_spec = NULL;
EXPORT_SYMBOL(cur_cpu_spec);
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index abef751..fdcd8f5 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -27,8 +27,8 @@
#include <asm/kdump.h>
#include <asm/prom.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/setjmp.h>
+#include <asm/debug.h>
/*
* The primary CPU waits a while for all secondary CPUs to enter. This is to
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 0a48bf5..b84d0a4 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -26,7 +26,6 @@
#include <linux/sysctl.h>
#include <linux/tick.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/time.h>
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 01e2877..422d87c 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -57,7 +57,6 @@
#include <linux/of_irq.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index bc47352..e88c643 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -35,7 +35,6 @@
#include <asm/cacheflush.h>
#include <asm/sstep.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
#define MSR_SINGLESTEP (MSR_DE)
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 578f35f..4190e80 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -31,7 +31,6 @@
#include <asm/hvcall.h>
#include <asm/firmware.h>
#include <asm/rtas.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/prom.h>
#include <asm/vdso_datapage.h>
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index d3114a7..786a270 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -26,7 +26,6 @@
#include <linux/cuda.h>
#include <linux/pmu.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/pci-bridge.h>
#include <asm/irq.h>
#include <asm/pmac_feature.h>
@@ -43,6 +42,7 @@
#include <asm/signal.h>
#include <asm/dcr.h>
#include <asm/ftrace.h>
+#include <asm/switch_to.h>
#ifdef CONFIG_PPC32
extern void transfer_to_handler(void);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index d817ab0..bb67db0 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -41,7 +41,6 @@
#include <asm/pgtable.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/mmu.h>
@@ -49,6 +48,8 @@
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/syscalls.h>
+#include <asm/switch_to.h>
+#include <asm/debug.h>
#ifdef CONFIG_PPC64
#include <asm/firmware.h>
#endif
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index abe405d..7f4eb14 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -41,7 +41,6 @@
#include <asm/io.h>
#include <asm/kdump.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/paca.h>
#include <asm/pgtable.h>
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index eca626e..ba30059 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -35,7 +35,6 @@
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/pci.h>
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 5b43325..8d8e028 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -36,7 +36,7 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
+#include <asm/switch_to.h>
#define CREATE_TRACE_POINTS
#include <trace/events/syscalls.h>
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 69c4be9..469349d 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -32,7 +32,7 @@
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
+#include <asm/switch_to.h>
/*
* does not yet catch signals sent when the child dies.
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 9f843cd..3dc6799 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -33,7 +33,6 @@
#include <asm/firmware.h>
#include <asm/page.h>
#include <asm/param.h>
-#include <asm/system.h>
#include <asm/delay.h>
#include <asm/uaccess.h>
#include <asm/udbg.h>
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 77bb77d..9a25543 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -51,7 +51,6 @@
#include <asm/btext.h>
#include <asm/nvram.h>
#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/iommu.h>
#include <asm/serial.h>
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index ac76108..9825f29 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -30,7 +30,6 @@
#include <asm/btext.h>
#include <asm/machdep.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/pmac_feature.h>
#include <asm/sections.h>
#include <asm/nvram.h>
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 4cb8f1e..6d639b2 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -52,7 +52,6 @@
#include <asm/btext.h>
#include <asm/nvram.h>
#include <asm/setup.h>
-#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/iommu.h>
#include <asm/serial.h>
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index ac6e437..d9e9ca9 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -15,6 +15,7 @@
#include <asm/hw_breakpoint.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
+#include <asm/debug.h>
#include "signal.h"
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 836a5a1..6d10f8c 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -43,6 +43,7 @@
#include <asm/syscalls.h>
#include <asm/sigcontext.h>
#include <asm/vdso.h>
+#include <asm/switch_to.h>
#ifdef CONFIG_PPC64
#include "ppc32.h"
#include <asm/unistd.h>
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index a50b5ec..2692efd 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -33,6 +33,7 @@
#include <asm/cacheflush.h>
#include <asm/syscalls.h>
#include <asm/vdso.h>
+#include <asm/switch_to.h>
#include "signal.h"
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 46695fe..d9f9441 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -43,12 +43,12 @@
#include <asm/machdep.h>
#include <asm/cputhreads.h>
#include <asm/cputable.h>
-#include <asm/system.h>
#include <asm/mpic.h>
#include <asm/vdso_datapage.h>
#ifdef CONFIG_PPC64
#include <asm/paca.h>
#endif
+#include <asm/debug.h>
#ifdef DEBUG
#include <asm/udbg.h>
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
index af0e829..29b2f81 100644
--- a/arch/powerpc/kernel/softemu8xx.c
+++ b/arch/powerpc/kernel/softemu8xx.c
@@ -26,7 +26,6 @@
#include <asm/pgtable.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
/* Eventually we may need a look-up table, but this works for now.
diff --git a/arch/powerpc/kernel/swsusp.c b/arch/powerpc/kernel/swsusp.c
index 641f9ad..eae33e1 100644
--- a/arch/powerpc/kernel/swsusp.c
+++ b/arch/powerpc/kernel/swsusp.c
@@ -10,9 +10,9 @@
*/
#include <linux/sched.h>
-#include <asm/system.h>
#include <asm/current.h>
#include <asm/mmu_context.h>
+#include <asm/switch_to.h>
void save_processor_state(void)
{
diff --git a/arch/powerpc/kernel/swsusp_64.c b/arch/powerpc/kernel/swsusp_64.c
index 168e884..0e899e4 100644
--- a/arch/powerpc/kernel/swsusp_64.c
+++ b/arch/powerpc/kernel/swsusp_64.c
@@ -6,7 +6,6 @@
* GPLv2
*/
-#include <asm/system.h>
#include <asm/iommu.h>
#include <linux/irq.h>
#include <linux/sched.h>
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index 4e5bf1e..81c5706 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -50,6 +50,7 @@
#include <asm/mmu_context.h>
#include <asm/ppc-pci.h>
#include <asm/syscalls.h>
+#include <asm/switch_to.h>
asmlinkage long ppc32_select(u32 n, compat_ulong_t __user *inp,
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 883e74c..bf6af0d 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -18,7 +18,6 @@
#include <asm/machdep.h>
#include <asm/smp.h>
#include <asm/pmc.h>
-#include <asm/system.h>
#include "cacheinfo.h"
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index c091527..db1ede7 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -39,7 +39,6 @@
#include <asm/emulated_ops.h>
#include <asm/pgtable.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/rtas.h>
@@ -57,6 +56,8 @@
#include <asm/kexec.h>
#include <asm/ppc-opcode.h>
#include <asm/rio.h>
+#include <asm/switch_to.h>
+#include <asm/debug.h>
#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
int (*__debugger)(struct pt_regs *regs) __read_mostly;
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 7d14bb6..1ce1ec4 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -24,7 +24,6 @@
#include <linux/memblock.h>
#include <asm/pgtable.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 336983d..6efde9c 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -45,6 +45,7 @@
#include <asm/cputhreads.h>
#include <asm/page.h>
#include <asm/hvcall.h>
+#include <asm/switch_to.h>
#include <linux/gfp.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
diff --git a/arch/powerpc/lib/alloc.c b/arch/powerpc/lib/alloc.c
index 13b676c..da22c84 100644
--- a/arch/powerpc/lib/alloc.c
+++ b/arch/powerpc/lib/alloc.c
@@ -3,8 +3,8 @@
#include <linux/slab.h>
#include <linux/bootmem.h>
#include <linux/string.h>
+#include <asm/setup.h>
-#include <asm/system.h>
void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
{
diff --git a/arch/powerpc/lib/copyuser_power7_vmx.c b/arch/powerpc/lib/copyuser_power7_vmx.c
index 6e1efad..bf2654f 100644
--- a/arch/powerpc/lib/copyuser_power7_vmx.c
+++ b/arch/powerpc/lib/copyuser_power7_vmx.c
@@ -20,6 +20,7 @@
*/
#include <linux/uaccess.h>
#include <linux/hardirq.h>
+#include <asm/switch_to.h>
int enter_vmx_copy(void)
{
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 388b95e..2c9441e 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -27,7 +27,6 @@
#include <linux/memblock.h>
#include <asm/mmu.h>
-#include <asm/system.h>
#include <asm/page.h>
#include <asm/cacheflush.h>
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 2f0d1b0..253e6f5 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -38,10 +38,10 @@
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/tlbflush.h>
#include <asm/siginfo.h>
+#include <asm/debug.h>
#include <mm/mmu_decl.h>
#include "icswx.h"
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 2d28218..e43a231 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -40,7 +40,6 @@
#include <asm/mmu_context.h>
#include <asm/page.h>
#include <asm/types.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
#include <asm/prom.h>
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 6157be2..01e2db9 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -45,7 +45,6 @@
#include <asm/btext.h>
#include <asm/tlb.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/hugetlb.h>
#include "mmu_decl.h"
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index e94b57f..620b7ac 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -61,7 +61,6 @@
#include <asm/mmzone.h>
#include <asm/cputable.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/iommu.h>
#include <asm/abs_addr.h>
#include <asm/vdso.h>
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 3feefc3..b6edbb3 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -24,11 +24,11 @@
#include <linux/node.h>
#include <asm/sparsemem.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/smp.h>
#include <asm/firmware.h>
#include <asm/paca.h>
#include <asm/hvcall.h>
+#include <asm/setup.h>
static int numa_enabled = 1;
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 51f8795..e9c513a 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -33,6 +33,7 @@
#include <asm/pgalloc.h>
#include <asm/fixmap.h>
#include <asm/io.h>
+#include <asm/setup.h>
#include "mmu_decl.h"
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index ad36ede..249a063 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -51,7 +51,6 @@
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/sections.h>
-#include <asm/system.h>
#include <asm/abs_addr.h>
#include <asm/firmware.h>
diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c
index d65e68f..7056dc9 100644
--- a/arch/powerpc/oprofile/common.c
+++ b/arch/powerpc/oprofile/common.c
@@ -18,7 +18,6 @@
#include <linux/smp.h>
#include <linux/errno.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/pmc.h>
#include <asm/cputable.h>
#include <asm/oprofile_impl.h>
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index f8d36f9..ff61724 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -19,7 +19,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/page.h>
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index cb515cf..b9589c1 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -34,7 +34,6 @@
#include <asm/ptrace.h>
#include <asm/reg.h>
#include <asm/rtas.h>
-#include <asm/system.h>
#include <asm/cell-regs.h>
#include "../platforms/cell/interrupt.h"
diff --git a/arch/powerpc/oprofile/op_model_fsl_emb.c b/arch/powerpc/oprofile/op_model_fsl_emb.c
index d4e6507..ccc1daa 100644
--- a/arch/powerpc/oprofile/op_model_fsl_emb.c
+++ b/arch/powerpc/oprofile/op_model_fsl_emb.c
@@ -17,7 +17,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/reg_fsl_emb.h>
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index e6bec74..95ae77d 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -14,7 +14,6 @@
#include <linux/smp.h>
#include <asm/firmware.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/rtas.h>
diff --git a/arch/powerpc/oprofile/op_model_rs64.c b/arch/powerpc/oprofile/op_model_rs64.c
index a20afe4..9b801b8 100644
--- a/arch/powerpc/oprofile/op_model_rs64.c
+++ b/arch/powerpc/oprofile/op_model_rs64.c
@@ -11,7 +11,6 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
-#include <asm/system.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/oprofile_impl.h>
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index d111b02..fb94d10 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -17,7 +17,6 @@
#include <asm/cpm2.h>
#include <asm/io.h>
#include <asm/pci-bridge.h>
-#include <asm/system.h>
#include <platforms/82xx/pq2.h>
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c
index 65eb792..a266ba8 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -27,7 +27,6 @@
#include <linux/of_platform.h>
#include <linux/of_device.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index e36bc61..d440435 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -26,7 +26,6 @@
#include <linux/of_platform.h>
#include <linux/of_device.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 39849dd..a494fa5 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -25,7 +25,6 @@
#include <linux/root_dev.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index 5828d8e..553e793 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -25,7 +25,6 @@
#include <linux/root_dev.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index ad8e4bc..1b1f6c8 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -33,7 +33,6 @@
#include <linux/of_platform.h>
#include <linux/of_device.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c
index 8a81d76..26cb3e9 100644
--- a/arch/powerpc/platforms/83xx/sbc834x.c
+++ b/arch/powerpc/platforms/83xx/sbc834x.c
@@ -27,7 +27,6 @@
#include <linux/root_dev.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 07e3e6c..d517d9e 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -18,7 +18,6 @@
#include <linux/interrupt.h>
#include <linux/memblock.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index 20f75d7..8bc1be1 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -20,7 +20,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index cf26682..77b84d9 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -19,7 +19,6 @@
#include <linux/of_platform.h>
#include <linux/memblock.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3bebb51..f26aae2 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -19,7 +19,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 40f03da..b43c45b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -27,7 +27,6 @@
#include <linux/fsl_devices.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/atomic.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index eefbb91..4fc46b4 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -22,7 +22,6 @@
#include <linux/of_platform.h>
#include <linux/memblock.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 1d15a0c..53f102c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -34,7 +34,6 @@
#include <linux/phy.h>
#include <linux/memblock.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index ccf520e..fcf3317 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -18,7 +18,6 @@
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
index 538bc3f..462066a 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -16,7 +16,6 @@
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c
index d951e70..01e8da5 100644
--- a/arch/powerpc/platforms/85xx/p1023_rds.c
+++ b/arch/powerpc/platforms/85xx/p1023_rds.c
@@ -22,7 +22,6 @@
#include <linux/of_platform.h>
#include <linux/of_device.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c
index eda6ed5..6541fa2 100644
--- a/arch/powerpc/platforms/85xx/p2041_rdb.c
+++ b/arch/powerpc/platforms/85xx/p2041_rdb.c
@@ -16,7 +16,6 @@
#include <linux/interrupt.h>
#include <linux/phy.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c
index 96d99a3..f238efa 100644
--- a/arch/powerpc/platforms/85xx/p3041_ds.c
+++ b/arch/powerpc/platforms/85xx/p3041_ds.c
@@ -18,7 +18,6 @@
#include <linux/interrupt.h>
#include <linux/phy.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c
index d1b21d7..c92417d 100644
--- a/arch/powerpc/platforms/85xx/p4080_ds.c
+++ b/arch/powerpc/platforms/85xx/p4080_ds.c
@@ -17,7 +17,6 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c
index e8cba50..17bef15 100644
--- a/arch/powerpc/platforms/85xx/p5020_ds.c
+++ b/arch/powerpc/platforms/85xx/p5020_ds.c
@@ -18,7 +18,6 @@
#include <linux/interrupt.h>
#include <linux/phy.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c
index 184a507..3f6b3dc 100644
--- a/arch/powerpc/platforms/85xx/sbc8548.c
+++ b/arch/powerpc/platforms/85xx/sbc8548.c
@@ -30,7 +30,6 @@
#include <linux/fsl_devices.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/atomic.h>
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index 940752e..f863c35 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -21,7 +21,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c
index 18f6359..278022a 100644
--- a/arch/powerpc/platforms/85xx/socrates.c
+++ b/arch/powerpc/platforms/85xx/socrates.c
@@ -29,7 +29,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index e9e5234..cc681dc 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -28,7 +28,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index bf7c89f..b451f54 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -26,7 +26,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
index 3a69f8b..8085d34 100644
--- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -21,7 +21,6 @@
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index 60ce07e..09e56c3 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -24,7 +24,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 3ecee25..e49365a 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -24,7 +24,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index 5090d60..4b34bee 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -24,7 +24,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 13fa9a6..bbc6152 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -25,7 +25,6 @@
#include <linux/seq_file.h>
#include <linux/of.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 569262c..3755e61 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -21,7 +21,6 @@
#include <linux/of_platform.h>
#include <linux/memblock.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
index 52bbfa0..962e6b7 100644
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -12,7 +12,6 @@
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/mpic.h>
#include <asm/i8259.h>
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index 51c8f33..e7007d0 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -21,7 +21,6 @@
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index caaec29..866feff 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -19,7 +19,6 @@
#include <asm/io.h>
#include <asm/machdep.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/8xx_immap.h>
#include <asm/cpm1.h>
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 45ed6cd..5d98398 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -32,7 +32,6 @@
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/mpc8xx.h>
#include <asm/8xx_immap.h>
diff --git a/arch/powerpc/platforms/8xx/tqm8xx_setup.c b/arch/powerpc/platforms/8xx/tqm8xx_setup.c
index 528e00d..8d21ab7 100644
--- a/arch/powerpc/platforms/8xx/tqm8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/tqm8xx_setup.c
@@ -35,7 +35,6 @@
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/processor.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/mpc8xx.h>
#include <asm/8xx_immap.h>
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index 4a255cf..49a65e2 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -38,7 +38,6 @@
#include <asm/machdep.h>
#include <asm/cputable.h>
#include <asm/firmware.h>
-#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/cputhreads.h>
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c
index 8cab573..ebd3963 100644
--- a/arch/powerpc/platforms/embedded6xx/c2k.c
+++ b/arch/powerpc/platforms/embedded6xx/c2k.c
@@ -23,7 +23,6 @@
#include <asm/machdep.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <mm/mmu_decl.h>
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index 9cfcf20..a7cd6a2 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -28,7 +28,6 @@
#include <linux/of_platform.h>
#include <linux/module.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/prom.h>
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index f3350d7..916c6d2 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -32,7 +32,6 @@
#include <linux/tty.h>
#include <linux/serial_core.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/prom.h>
diff --git a/arch/powerpc/platforms/embedded6xx/prpmc2800.c b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
index 670035f..d455f08 100644
--- a/arch/powerpc/platforms/embedded6xx/prpmc2800.c
+++ b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
@@ -17,7 +17,6 @@
#include <asm/machdep.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <mm/mmu_decl.h>
diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c
index afa6388..999b0ea 100644
--- a/arch/powerpc/platforms/embedded6xx/storcenter.c
+++ b/arch/powerpc/platforms/embedded6xx/storcenter.c
@@ -16,7 +16,6 @@
#include <linux/initrd.h>
#include <linux/of_platform.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/prom.h>
#include <asm/mpic.h>
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 8b0c208..64fde05 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -15,7 +15,6 @@
#include <linux/interrupt.h>
#include <linux/mc146818rtc.h>
-#include <asm/system.h>
#include <asm/pci-bridge.h>
#define ULI_PIRQA 0x08
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c
index f0491cc..75adf10 100644
--- a/arch/powerpc/platforms/iseries/dt.c
+++ b/arch/powerpc/platforms/iseries/dt.c
@@ -30,7 +30,6 @@
#include <asm/lppaca.h>
#include <asm/cputable.h>
#include <asm/abs_addr.h>
-#include <asm/system.h>
#include <asm/iseries/hv_types.h>
#include <asm/iseries/hv_lp_config.h>
#include <asm/iseries/hv_call_xm.h>
diff --git a/arch/powerpc/platforms/iseries/lpevents.c b/arch/powerpc/platforms/iseries/lpevents.c
index 202e227..e305d62 100644
--- a/arch/powerpc/platforms/iseries/lpevents.c
+++ b/arch/powerpc/platforms/iseries/lpevents.c
@@ -15,7 +15,6 @@
#include <linux/proc_fs.h>
#include <linux/export.h>
-#include <asm/system.h>
#include <asm/paca.h>
#include <asm/firmware.h>
#include <asm/iseries/it_lp_queue.h>
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index 8fc6258..3799f2f 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -41,7 +41,6 @@
#include <asm/sections.h>
#include <asm/iommu.h>
#include <asm/firmware.h>
-#include <asm/system.h>
#include <asm/time.h>
#include <asm/paca.h>
#include <asm/cache.h>
diff --git a/arch/powerpc/platforms/iseries/smp.c b/arch/powerpc/platforms/iseries/smp.c
index 02df49f..5100bc7 100644
--- a/arch/powerpc/platforms/iseries/smp.c
+++ b/arch/powerpc/platforms/iseries/smp.c
@@ -39,7 +39,6 @@
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/cputable.h>
-#include <asm/system.h>
static void smp_iSeries_cause_ipi(int cpu, unsigned long data)
{
diff --git a/arch/powerpc/platforms/iseries/viopath.c b/arch/powerpc/platforms/iseries/viopath.c
index 40dad08..51c38b0 100644
--- a/arch/powerpc/platforms/iseries/viopath.c
+++ b/arch/powerpc/platforms/iseries/viopath.c
@@ -40,7 +40,6 @@
#include <linux/interrupt.h>
#include <linux/completion.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/prom.h>
#include <asm/firmware.h>
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 0bcbfe7..0d05f09 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -47,7 +47,6 @@
#include <asm/processor.h>
#include <asm/sections.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c
index eac569d..b4a369d 100644
--- a/arch/powerpc/platforms/maple/time.c
+++ b/arch/powerpc/platforms/maple/time.c
@@ -27,7 +27,6 @@
#include <asm/sections.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 98b7a7c..dd981728 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -32,13 +32,13 @@
#include <linux/gfp.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/iommu.h>
#include <asm/machdep.h>
#include <asm/mpic.h>
#include <asm/smp.h>
#include <asm/time.h>
#include <asm/mmu.h>
+#include <asm/debug.h>
#include <pcmcia/ss.h>
#include <pcmcia/cistpl.h>
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index 84d7fd9..3e91ef5 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -19,6 +19,7 @@
#include <asm/bootx.h>
#include <asm/btext.h>
#include <asm/io.h>
+#include <asm/setup.h>
#undef DEBUG
#define SET_BOOT_BAT
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 1fc386a..6417119 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -33,9 +33,9 @@
#include <asm/sections.h>
#include <asm/cputable.h>
#include <asm/time.h>
-#include <asm/system.h>
#include <asm/mpic.h>
#include <asm/keylargo.h>
+#include <asm/switch_to.h>
/* WARNING !!! This will cause calibrate_delay() to be called,
* but this is an __init function ! So you MUST go edit
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index 54d2271..bf0a2cc 100644
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -23,7 +23,6 @@
#include <linux/spinlock.h>
#include <asm/sections.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/nvram.h>
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 970ea1d..141f889 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -57,7 +57,6 @@
#include <asm/reg.h>
#include <asm/sections.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/pci-bridge.h>
diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c
index 11c9fce..8680bb6 100644
--- a/arch/powerpc/platforms/powermac/time.c
+++ b/arch/powerpc/platforms/powermac/time.c
@@ -26,7 +26,6 @@
#include <asm/sections.h>
#include <asm/prom.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 17210c5..3ef4625 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -25,7 +25,6 @@
#include <asm/machdep.h>
#include <asm/cputable.h>
#include <asm/firmware.h>
-#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/vdso_datapage.h>
#include <asm/cputhreads.h>
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index 8bd6ba5..de2aea4 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -29,6 +29,7 @@
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/lv1call.h>
+#include <asm/setup.h>
#include "platform.h"
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index 0e86563..a764854 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -25,10 +25,10 @@
#include <linux/debugfs.h>
#include <linux/spinlock.h>
#include <asm/smp.h>
-#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/firmware.h>
#include <asm/lppaca.h>
+#include <asm/debug.h>
#include "plpar_wrappers.h"
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index c986d08..64c97d8 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -23,7 +23,6 @@
#include <linux/delay.h>
#include <linux/sched.h> /* for idle_task_exit */
#include <linux/cpu.h>
-#include <asm/system.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/firmware.h>
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index 085fd3f..f4cf675 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -14,7 +14,6 @@
#include <asm/paca.h>
#include <asm/reg.h>
-#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/firmware.h>
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 086d2ae..9e248ef 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -37,7 +37,6 @@
#include <linux/bitops.h>
#include <asm/uaccess.h>
-#include <asm/system.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index eadba95..e16bb8d 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -37,7 +37,6 @@
#include <asm/machdep.h>
#include <asm/cputable.h>
#include <asm/firmware.h>
-#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/pSeries_reconfig.h>
#include <asm/mpic.h>
diff --git a/arch/powerpc/platforms/wsp/chroma.c b/arch/powerpc/platforms/wsp/chroma.c
index ca6fa26..8ef53bc 100644
--- a/arch/powerpc/platforms/wsp/chroma.c
+++ b/arch/powerpc/platforms/wsp/chroma.c
@@ -17,7 +17,6 @@
#include <linux/time.h>
#include <asm/machdep.h>
-#include <asm/system.h>
#include <asm/udbg.h>
#include "ics.h"
diff --git a/arch/powerpc/platforms/wsp/psr2.c b/arch/powerpc/platforms/wsp/psr2.c
index 0c1ae06..508ec82 100644
--- a/arch/powerpc/platforms/wsp/psr2.c
+++ b/arch/powerpc/platforms/wsp/psr2.c
@@ -17,7 +17,6 @@
#include <linux/time.h>
#include <asm/machdep.h>
-#include <asm/system.h>
#include <asm/udbg.h>
#include "ics.h"
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index bf6c7cc..4dd5341 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -26,7 +26,6 @@
#include <asm/udbg.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/rheap.h>
#include <asm/cpm.h>
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index e8f385f..c449dbd 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -31,7 +31,6 @@
#include <linux/fs_enet_pd.h>
#include <linux/fs_uart_pd.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/io.h>
#include <asm/irq.h>
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 5287e95..0968b66 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/bitmap.h>
#include <asm/msi_bitmap.h>
+#include <asm/setup.h>
int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num)
{
diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c
index 2370e1c..1fd0717 100644
--- a/arch/powerpc/sysdev/tsi108_dev.c
+++ b/arch/powerpc/sysdev/tsi108_dev.c
@@ -22,7 +22,6 @@
#include <linux/of_net.h>
#include <asm/tsi108.h>
-#include <asm/system.h>
#include <linux/atomic.h>
#include <asm/io.h>
#include <asm/irq.h>
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index cb95eea..d240f0c 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -42,6 +42,7 @@
#include <asm/firmware.h>
#include <asm/setjmp.h>
#include <asm/reg.h>
+#include <asm/debug.h>
#ifdef CONFIG_PPC64
#include <asm/hvcall.h>
^ permalink raw reply related
* [PATCH 19/38] KVM: PPC: e500mc: add load inst fixup
From: Alexander Graf @ 2012-03-12 19:39 UTC (permalink / raw)
To: kvm-ppc; +Cc: Scott Wood, Marcelo Tosatti, linuxppc-dev, kvm
In-Reply-To: <1330474206-14794-20-git-send-email-agraf@suse.de>
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add fixup code that keeps guest code from potentially crashing our host kernel.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v1 -> v2:
- fix whitespace
- use explicit preempt counts
v2 -> v3:
- fix whitespace (for real)
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 63023ae..e9e7350 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -28,6 +28,7 @@
#include <asm/asm-compat.h>
#include <asm/asm-offsets.h>
#include <asm/bitsperlong.h>
+#include <asm/thread_info.h>
#include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */
@@ -171,9 +172,36 @@
PPC_STL r30, VCPU_GPR(r30)(r4)
PPC_STL r31, VCPU_GPR(r31)(r4)
mtspr SPRN_EPLC, r8
+
+ /* disable preemption, so we are sure we hit the fixup handler */
+#ifdef CONFIG_PPC64
+ clrrdi r8,r1,THREAD_SHIFT
+#else
+ rlwinm r8,r1,0,0,31-THREAD_SHIFT /* current thread_info */
+#endif
+ li r7, 1
+ stw r7, TI_PREEMPT(r8)
+
isync
- lwepx r9, 0, r5
+
+ /*
+ * In case the read goes wrong, we catch it and write an invalid value
+ * in LAST_INST instead.
+ */
+1: lwepx r9, 0, r5
+2:
+.section .fixup, "ax"
+3: li r9, KVM_INST_FETCH_FAILED
+ b 2b
+.previous
+.section __ex_table,"a"
+ PPC_LONG_ALIGN
+ PPC_LONG 1b,3b
+.previous
+
mtspr SPRN_EPLC, r3
+ li r7, 0
+ stw r7, TI_PREEMPT(r8)
stw r9, VCPU_LAST_INST(r4)
.endif
^ permalink raw reply related
* Re: [PATCH v2 1/2] powerpc/e500: make load_up_spe a normal fuction
From: Alexander Graf @ 2012-03-12 19:29 UTC (permalink / raw)
To: Kumar Gala
Cc: kvm@vger.kernel.org list, Olivia Yin, Tabi Timur-B04825, kvm-ppc,
Scott Wood, linuxppc-dev
In-Reply-To: <4F5795FC.4000803@freescale.com>
On 07.03.2012, at 18:08, Scott Wood wrote:
> On 03/07/2012 07:56 AM, Alexander Graf wrote:
>> On 03/01/2012 02:20 AM, Olivia Yin wrote:
>>> From: Liu Yu<yu.liu@freescale.com>
>>>
>>> So that we can call it when improving SPE switch like book3e did for
>>> fp switch.
>>
>> Timur / Scott, can you please (n)ack this one?
>
> ACK, though as it touches non-KVM code it'd be nice to get an ack from
> Kumar.
Kumar, ping?
^ permalink raw reply
* Re: [PATCH V2 0/2] powerpc: Add support for GE IMP3A
From: Martyn Welch @ 2012-03-12 17:16 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Wim Van Sebroeck, Linus Walleij, linux-kernel
In-Reply-To: <1331572380-1064-1-git-send-email-martyn.welch@ge.com>
Whoops, forgot to correct the subject. This is v3 of the patches. I got it
right in the actual patches, just the cover letter I missed.
Martyn
On 12/03/12 17:12, Martyn Welch wrote:
> These patches add support for the GE IMP3A. This board (based on a Freescale
> P2020) uses some support for FPGA logic common with the PPC9A and other 86xx
> based boards, so this support has been moved out of the 86xx directory. A
> config option (GE_FPGA) has been added to reduce churn on dependant drivers
> (such as the watchdog timer) when further boards are added.
--
Martyn Welch (Lead Software Engineer) | Registered in England and Wales
GE Intelligent Platforms | (3828642) at 100 Barbirolli Square
T +44(0)1327322748 | Manchester, M2 3AB
E martyn.welch@ge.com | VAT:GB 927559189
^ permalink raw reply
* [PATCH v3 4/4] powerpc: Board support for GE IMP3A
From: Martyn Welch @ 2012-03-12 17:13 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Linus Walleij, linux-kernel, Martyn Welch, Wim Van Sebroeck
In-Reply-To: <1331572380-1064-1-git-send-email-martyn.welch@ge.com>
Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020
processor.
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
---
v2: Rebase patch onto powerpc/next, taking work by Kyle Moffett into
account.
v3: Correct detection of interrupt controller.
arch/powerpc/boot/dts/ge_imp3a.dts | 255 ++++++++++++++++++++++++++++++
arch/powerpc/configs/ge_imp3a_defconfig | 257 +++++++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/Kconfig | 15 ++
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/ge_imp3a.c | 246 +++++++++++++++++++++++++++++
drivers/gpio/gpio-ge.c | 28 ++++
6 files changed, 802 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/ge_imp3a.dts
create mode 100644 arch/powerpc/configs/ge_imp3a_defconfig
create mode 100644 arch/powerpc/platforms/85xx/ge_imp3a.c
diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts b/arch/powerpc/boot/dts/ge_imp3a.dts
new file mode 100644
index 0000000..fefae41
--- /dev/null
+++ b/arch/powerpc/boot/dts/ge_imp3a.dts
@@ -0,0 +1,255 @@
+/*
+ * GE IMP3A Device Tree Source
+ *
+ * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Based on: P2020 DS Device Tree Source
+ * Copyright 2009 Freescale Semiconductor Inc.
+ */
+
+/include/ "fsl/p2020si-pre.dtsi"
+
+/ {
+ model = "GE_IMP3A";
+ compatible = "ge,imp3a";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fef05000 {
+ reg = <0 0xfef05000 0 0x1000>;
+
+ ranges = <0x0 0x0 0x0 0xff000000 0x01000000
+ 0x1 0x0 0x0 0xe0000000 0x08000000
+ 0x2 0x0 0x0 0xe8000000 0x08000000
+ 0x3 0x0 0x0 0xfc100000 0x00020000
+ 0x4 0x0 0x0 0xfc000000 0x00008000
+ 0x5 0x0 0x0 0xfc008000 0x00008000
+ 0x6 0x0 0x0 0xfee00000 0x00040000
+ 0x7 0x0 0x0 0xfee80000 0x00040000>;
+
+ /* nor@0,0 is a mirror of part of the memory in nor@1,0
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
+ reg = <0x0 0x0 0x1000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ label = "firmware";
+ reg = <0x0 0x1000000>;
+ read-only;
+ };
+ };
+ */
+
+ nor@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ge,imp3a-paged-flash", "cfi-flash";
+ reg = <0x1 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ label = "user";
+ reg = <0x0 0x7800000>;
+ };
+
+ partition@7800000 {
+ label = "firmware";
+ reg = <0x7800000 0x800000>;
+ read-only;
+ };
+ };
+
+ nvram@3,0 {
+ device_type = "nvram";
+ compatible = "simtek,stk14ca8";
+ reg = <0x3 0x0 0x20000>;
+ };
+
+ fpga@4,0 {
+ compatible = "ge,imp3a-fpga-regs";
+ reg = <0x4 0x0 0x20>;
+ };
+
+ gef_pic: pic@4,20 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00";
+ reg = <0x4 0x20 0x20>;
+ interrupts = <6 7 0 0>;
+ };
+
+ gef_gpio: gpio@4,400 {
+ #gpio-cells = <2>;
+ compatible = "ge,imp3a-gpio";
+ reg = <0x4 0x400 0x24>;
+ gpio-controller;
+ };
+
+ wdt@4,800 {
+ compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
+ "gef,fpga-wdt";
+ reg = <0x4 0x800 0x8>;
+ interrupts = <10 4>;
+ interrupt-parent = <&gef_pic>;
+ };
+
+ /* Second watchdog available, driver currently supports one.
+ wdt@4,808 {
+ compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
+ "gef,fpga-wdt";
+ reg = <0x4 0x808 0x8>;
+ interrupts = <9 4>;
+ interrupt-parent = <&gef_pic>;
+ };
+ */
+
+ nand@6,0 {
+ compatible = "fsl,elbc-fcm-nand";
+ reg = <0x6 0x0 0x40000>;
+ };
+
+ nand@7,0 {
+ compatible = "fsl,elbc-fcm-nand";
+ reg = <0x7 0x0 0x40000>;
+ };
+ };
+
+ soc: soc@fef00000 {
+ ranges = <0x0 0 0xfef00000 0x100000>;
+
+ i2c@3000 {
+ hwmon@48 {
+ compatible = "national,lm92";
+ reg = <0x48>;
+ };
+
+ hwmon@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ rtc@51 {
+ compatible = "epson,rx8581";
+ reg = <0x51>;
+ };
+
+ eti@6b {
+ compatible = "dallas,ds1682";
+ reg = <0x6b>;
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ dr_mode = "host";
+ };
+
+ mdio@24520 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&gef_pic>;
+ interrupts = <0xc 0x4>;
+ reg = <0x1>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&gef_pic>;
+ interrupts = <0xb 0x4>;
+ reg = <0x2>;
+ };
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@25520 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26520 {
+ status = "disabled";
+ };
+
+ enet0: ethernet@24000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "gmii";
+ };
+
+ enet1: ethernet@25000 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy1>;
+ phy-connection-type = "gmii";
+ };
+
+ enet2: ethernet@26000 {
+ status = "disabled";
+ };
+ };
+
+ pci0: pcie@fef08000 {
+ ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>;
+ reg = <0 0xfef08000 0 0x1000>;
+
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ };
+ };
+
+ pci1: pcie@fef09000 {
+ reg = <0 0xfef09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>;
+
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ };
+
+ };
+
+ pci2: pcie@fef0a000 {
+ reg = <0 0xfef0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>;
+
+ pcie@0 {
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x10000>;
+ };
+ };
+};
+
+/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/configs/ge_imp3a_defconfig b/arch/powerpc/configs/ge_imp3a_defconfig
new file mode 100644
index 0000000..f8c51a4
--- /dev/null
+++ b/arch/powerpc/configs/ge_imp3a_defconfig
@@ -0,0 +1,257 @@
+CONFIG_PPC_85xx=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_PERF_EVENTS=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_GE_IMP3A=y
+CONFIG_QUICC_ENGINE=y
+CONFIG_QE_GPIO=y
+CONFIG_CPM2=y
+CONFIG_HIGHMEM=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_HZ_1000=y
+CONFIG_PREEMPT=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_MISC=m
+CONFIG_MATH_EMULATION=y
+CONFIG_IRQ_ALL_CPUS=y
+CONFIG_FORCE_MAX_ZONEORDER=17
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_MSI=y
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_LOAD_CIS is not set
+CONFIG_YENTA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=m
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_NET_PKTGEN=m
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSL_ELBC=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
+CONFIG_DS1682=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_SIL24=y
+# CONFIG_ATA_SFF is not set
+CONFIG_NETDEVICES=y
+CONFIG_BONDING=m
+CONFIG_DUMMY=m
+CONFIG_NETCONSOLE=y
+CONFIG_NETPOLL_TRAP=y
+CONFIG_TUN=m
+# CONFIG_NET_VENDOR_3COM is not set
+CONFIG_FS_ENET=y
+CONFIG_UCC_GETH=y
+CONFIG_GIANFAR=y
+CONFIG_PPP=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=m
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_QE=m
+CONFIG_NVRAM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_CPM=m
+CONFIG_I2C_MPC=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GE_FPGA=y
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_LM92=y
+CONFIG_WATCHDOG=y
+CONFIG_GEF_WDT=y
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_HID_DRAGONRISE=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_TWINHAN=y
+CONFIG_HID_ORTEK=y
+CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+CONFIG_HID_GREENASIA=y
+CONFIG_HID_SMARTJOYPLUS=y
+CONFIG_HID_TOPSEED=y
+CONFIG_HID_THRUSTMASTER=y
+CONFIG_HID_ZEROPLUS=y
+CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+CONFIG_USB_STORAGE=y
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=y
+CONFIG_EDAC_MPC85XX=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_DRV_RX8581=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_DMA=y
+# CONFIG_NET_DMA is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
+CONFIG_NTFS_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V4=y
+CONFIG_CIFS=m
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_T10DIF=y
+CONFIG_LIBCRC32C=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_TALITOS=y
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index d7946be..db29803 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -171,6 +171,21 @@ config SBC8560
help
This option enables support for the Wind River SBC8560 board
+config GE_IMP3A
+ bool "GE Intelligent Platforms IMP3A"
+ select DEFAULT_UIMAGE
+ select SWIOTLB
+ select MMIO_NVRAM
+ select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
+ select GE_FPGA
+ help
+ This option enables support for the GE Intelligent Platforms IMP3A
+ board.
+
+ This board is a 3U CompactPCI Single Board Computer with a Freescale
+ P2020 processor.
+
config P2041_RDB
bool "Freescale P2041 RDB"
select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 9cb2d43..2125d4c 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -27,3 +27,4 @@ obj-$(CONFIG_SBC8548) += sbc8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
obj-$(CONFIG_KSI8560) += ksi8560.o
obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
+obj-$(CONFIG_GE_IMP3A) += ge_imp3a.o
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c
new file mode 100644
index 0000000..d50056f
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/ge_imp3a.c
@@ -0,0 +1,246 @@
+/*
+ * GE IMP3A Board Setup
+ *
+ * Author Martyn Welch <martyn.welch@ge.com>
+ *
+ * Copyright 2010 GE Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Based on: mpc85xx_ds.c (MPC85xx DS Board Setup)
+ * Copyright 2007 Freescale Semiconductor Inc.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+#include <linux/memblock.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+#include <asm/swiotlb.h>
+#include <asm/nvram.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+#include <sysdev/ge/ge_pic.h>
+
+void __iomem *imp3a_regs;
+
+void __init ge_imp3a_pic_init(void)
+{
+ struct mpic *mpic;
+ struct device_node *np;
+ struct device_node *cascade_node = NULL;
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
+ mpic = mpic_alloc(NULL, 0,
+ MPIC_NO_RESET |
+ MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU,
+ 0, 256, " OpenPIC ");
+ } else {
+ mpic = mpic_alloc(NULL, 0,
+ MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU,
+ 0, 256, " OpenPIC ");
+ }
+
+ BUG_ON(mpic == NULL);
+ mpic_init(mpic);
+ /*
+ * There is a simple interrupt handler in the main FPGA, this needs
+ * to be cascaded into the MPIC
+ */
+ for_each_node_by_type(np, "interrupt-controller")
+ if (of_device_is_compatible(np, "gef,fpga-pic-1.00")) {
+ cascade_node = np;
+ break;
+ }
+
+ if (cascade_node == NULL) {
+ printk(KERN_WARNING "IMP3A: No FPGA PIC\n");
+ return;
+ }
+
+ gef_pic_init(cascade_node);
+ of_node_put(cascade_node);
+}
+
+#ifdef CONFIG_PCI
+static int primary_phb_addr;
+#endif /* CONFIG_PCI */
+
+/*
+ * Setup the architecture
+ */
+static void __init ge_imp3a_setup_arch(void)
+{
+ struct device_node *regs;
+#ifdef CONFIG_PCI
+ struct device_node *np;
+ struct pci_controller *hose;
+#endif
+ dma_addr_t max = 0xffffffff;
+
+ if (ppc_md.progress)
+ ppc_md.progress("ge_imp3a_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_node_by_type(np, "pci") {
+ if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+ of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
+ of_device_is_compatible(np, "fsl,p2020-pcie")) {
+ struct resource rsrc;
+ of_address_to_resource(np, 0, &rsrc);
+ if ((rsrc.start & 0xfffff) == primary_phb_addr)
+ fsl_add_bridge(np, 1);
+ else
+ fsl_add_bridge(np, 0);
+
+ hose = pci_find_hose_for_OF_device(np);
+ max = min(max, hose->dma_window_base_cur +
+ hose->dma_window_size);
+ }
+ }
+#endif
+
+ mpc85xx_smp_init();
+
+#ifdef CONFIG_SWIOTLB
+ if (memblock_end_of_DRAM() > max) {
+ ppc_swiotlb_enable = 1;
+ set_pci_dma_ops(&swiotlb_dma_ops);
+ ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+ }
+#endif
+
+ /* Remap basic board registers */
+ regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs");
+ if (regs) {
+ imp3a_regs = of_iomap(regs, 0);
+ if (imp3a_regs == NULL)
+ printk(KERN_WARNING "Unable to map board registers\n");
+ of_node_put(regs);
+ }
+
+#if defined(CONFIG_MMIO_NVRAM)
+ mmio_nvram_init();
+#endif
+
+ printk(KERN_INFO "GE Intelligent Platforms IMP3A 3U cPCI SBC\n");
+}
+
+/* Return the PCB revision */
+static unsigned int ge_imp3a_get_pcb_rev(void)
+{
+ unsigned int reg;
+
+ reg = ioread16(imp3a_regs);
+ return (reg >> 8) & 0xff;
+}
+
+/* Return the board (software) revision */
+static unsigned int ge_imp3a_get_board_rev(void)
+{
+ unsigned int reg;
+
+ reg = ioread16(imp3a_regs + 0x2);
+ return reg & 0xff;
+}
+
+/* Return the FPGA revision */
+static unsigned int ge_imp3a_get_fpga_rev(void)
+{
+ unsigned int reg;
+
+ reg = ioread16(imp3a_regs + 0x2);
+ return (reg >> 8) & 0xff;
+}
+
+/* Return compactPCI Geographical Address */
+static unsigned int ge_imp3a_get_cpci_geo_addr(void)
+{
+ unsigned int reg;
+
+ reg = ioread16(imp3a_regs + 0x6);
+ return (reg & 0x0f00) >> 8;
+}
+
+/* Return compactPCI System Controller Status */
+static unsigned int ge_imp3a_get_cpci_is_syscon(void)
+{
+ unsigned int reg;
+
+ reg = ioread16(imp3a_regs + 0x6);
+ return reg & (1 << 12);
+}
+
+static void ge_imp3a_show_cpuinfo(struct seq_file *m)
+{
+ seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
+
+ seq_printf(m, "Revision\t: %u%c\n", ge_imp3a_get_pcb_rev(),
+ ('A' + ge_imp3a_get_board_rev() - 1));
+
+ seq_printf(m, "FPGA Revision\t: %u\n", ge_imp3a_get_fpga_rev());
+
+ seq_printf(m, "cPCI geo. addr\t: %u\n", ge_imp3a_get_cpci_geo_addr());
+
+ seq_printf(m, "cPCI syscon\t: %s\n",
+ ge_imp3a_get_cpci_is_syscon() ? "yes" : "no");
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init ge_imp3a_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "ge,IMP3A")) {
+#ifdef CONFIG_PCI
+ primary_phb_addr = 0x9000;
+#endif
+ return 1;
+ }
+
+ return 0;
+}
+
+machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices);
+
+machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier);
+
+define_machine(ge_imp3a) {
+ .name = "GE_IMP3A",
+ .probe = ge_imp3a_probe,
+ .setup_arch = ge_imp3a_setup_arch,
+ .init_IRQ = ge_imp3a_pic_init,
+ .show_cpuinfo = ge_imp3a_show_cpuinfo,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c
index f8e6289..7b95a4a 100644
--- a/drivers/gpio/gpio-ge.c
+++ b/drivers/gpio/gpio-ge.c
@@ -162,6 +162,34 @@ static int __init gef_gpio_init(void)
}
}
+ for_each_compatible_node(np, NULL, "ge,imp3a-gpio") {
+
+ pr_debug("%s: Initialising GE GPIO\n", np->full_name);
+
+ /* Allocate chip structure */
+ gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
+ if (!gef_gpio_chip) {
+ pr_err("%s: Unable to allocate structure\n",
+ np->full_name);
+ continue;
+ }
+
+ /* Setup pointers to chip functions */
+ gef_gpio_chip->gc.of_gpio_n_cells = 2;
+ gef_gpio_chip->gc.ngpio = 16;
+ gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
+ gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
+ gef_gpio_chip->gc.get = gef_gpio_get;
+ gef_gpio_chip->gc.set = gef_gpio_set;
+
+ /* This function adds a memory mapped GPIO chip */
+ retval = of_mm_gpiochip_add(np, gef_gpio_chip);
+ if (retval) {
+ kfree(gef_gpio_chip);
+ pr_err("%s: Unable to add GPIO\n", np->full_name);
+ }
+ }
+
return 0;
};
arch_initcall(gef_gpio_init);
--
1.7.0.4
^ permalink raw reply related
* [PATCH v3 3/4] powerpc: Move GE PIC drivers
From: Martyn Welch @ 2012-03-12 17:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Linus Walleij, linux-kernel, Martyn Welch, Wim Van Sebroeck
In-Reply-To: <1331572380-1064-1-git-send-email-martyn.welch@ge.com>
Move the GE PIC drivers to allow these to be used by non-86xx boards.
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
---
v2: Move GPIO and PIC drivers to sysdev/ge/ rather than platforms/.
v3: Now just PIC driver. GPIO driver going to drivers/gpio.
arch/powerpc/platforms/86xx/Kconfig | 4 ----
arch/powerpc/platforms/86xx/Makefile | 1 -
arch/powerpc/platforms/86xx/gef_ppc9a.c | 2 +-
arch/powerpc/platforms/86xx/gef_sbc310.c | 2 +-
arch/powerpc/platforms/86xx/gef_sbc610.c | 2 +-
arch/powerpc/sysdev/Kconfig | 4 ++++
arch/powerpc/sysdev/Makefile | 2 ++
arch/powerpc/sysdev/ge/Makefile | 1 +
.../86xx/gef_pic.c => sysdev/ge/ge_pic.c} | 2 +-
.../86xx/gef_pic.h => sysdev/ge/ge_pic.h} | 0
10 files changed, 11 insertions(+), 9 deletions(-)
create mode 100644 arch/powerpc/sysdev/ge/Makefile
rename arch/powerpc/{platforms/86xx/gef_pic.c => sysdev/ge/ge_pic.c} (99%)
rename arch/powerpc/{platforms/86xx/gef_pic.h => sysdev/ge/ge_pic.h} (100%)
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index abe2c4f..7a6279e 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -64,10 +64,6 @@ config GEF_SBC610
help
This option enables support for the GE SBC610.
-config GE_FPGA
- bool
- default n
-
endif
config MPC8641
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 1ee6ca8..ede815d 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -7,7 +7,6 @@ obj-$(CONFIG_SMP) += mpc86xx_smp.o
obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
obj-$(CONFIG_SBC8641D) += sbc8641d.o
obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
-obj-$(CONFIG_GE_FPGA) += gef_pic.o
obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o
obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o
obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index 60ce07e..ed58b6c 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -37,9 +37,9 @@
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+#include <sysdev/ge/ge_pic.h>
#include "mpc86xx.h"
-#include "gef_pic.h"
#undef DEBUG
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 3ecee25..710db69 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -37,9 +37,9 @@
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+#include <sysdev/ge/ge_pic.h>
#include "mpc86xx.h"
-#include "gef_pic.h"
#undef DEBUG
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index 5090d60..4a13d2f 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -37,9 +37,9 @@
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+#include <sysdev/ge/ge_pic.h>
#include "mpc86xx.h"
-#include "gef_pic.h"
#undef DEBUG
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 7b4df37..a84fecf 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -29,3 +29,7 @@ config SCOM_DEBUGFS
bool "Expose SCOM controllers via debugfs"
depends on PPC_SCOM
default n
+
+config GE_FPGA
+ bool
+ default n
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 5e37b47..f80ff9f 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -65,3 +65,5 @@ obj-$(CONFIG_PPC_SCOM) += scom.o
subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
obj-$(CONFIG_PPC_XICS) += xics/
+
+obj-$(CONFIG_GE_FPGA) += ge/
diff --git a/arch/powerpc/sysdev/ge/Makefile b/arch/powerpc/sysdev/ge/Makefile
new file mode 100644
index 0000000..8731ffc
--- /dev/null
+++ b/arch/powerpc/sysdev/ge/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_GE_FPGA) += ge_pic.o
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/sysdev/ge/ge_pic.c
similarity index 99%
rename from arch/powerpc/platforms/86xx/gef_pic.c
rename to arch/powerpc/sysdev/ge/ge_pic.c
index 94594e5..002a562 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/sysdev/ge/ge_pic.c
@@ -22,7 +22,7 @@
#include <asm/prom.h>
#include <asm/irq.h>
-#include "gef_pic.h"
+#include "ge_pic.h"
#define DEBUG
#undef DEBUG
diff --git a/arch/powerpc/platforms/86xx/gef_pic.h b/arch/powerpc/sysdev/ge/ge_pic.h
similarity index 100%
rename from arch/powerpc/platforms/86xx/gef_pic.h
rename to arch/powerpc/sysdev/ge/ge_pic.h
--
1.7.0.4
^ permalink raw reply related
* [PATCH v3 2/4] gpio: Move GE GPIO driver to reside within GPIO subsystem
From: Martyn Welch @ 2012-03-12 17:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Linus Walleij, linux-kernel, Martyn Welch, Wim Van Sebroeck
In-Reply-To: <1331572380-1064-1-git-send-email-martyn.welch@ge.com>
The GE GPIO driver provides basic support (set direction, read/write state)
for the GPIO provided on some GE single board computers. This patch moves
the driver from the 86xx specific platform directrory to the GPIO subsystem
so that it can be used on non-86xx boards.
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
---
v3: Split out from patch moving PIC and GPIO driver. Moving to gpio subsystem
instead of sysdev.
arch/powerpc/configs/86xx/gef_ppc9a_defconfig | 1 +
arch/powerpc/configs/86xx/gef_sbc310_defconfig | 1 +
arch/powerpc/configs/86xx/gef_sbc610_defconfig | 2 ++
arch/powerpc/platforms/86xx/Makefile | 3 +--
drivers/gpio/Kconfig | 11 +++++++++++
drivers/gpio/Makefile | 1 +
.../86xx/gef_gpio.c => drivers/gpio/gpio-ge.c | 2 +-
7 files changed, 18 insertions(+), 3 deletions(-)
rename arch/powerpc/platforms/86xx/gef_gpio.c => drivers/gpio/gpio-ge.c (98%)
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index d41857a..da731c2 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -131,6 +131,7 @@ CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GE_FPGA=y
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_LM92=y
CONFIG_WATCHDOG=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index 38303ec..2149360 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -132,6 +132,7 @@ CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GE_FPGA=y
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_LM92=y
CONFIG_WATCHDOG=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 9853397..af2e8e1 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -183,6 +183,8 @@ CONFIG_NVRAM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GE_FPGA=y
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_LM92=y
CONFIG_WATCHDOG=y
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index ac6a50f..1ee6ca8 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -7,8 +7,7 @@ obj-$(CONFIG_SMP) += mpc86xx_smp.o
obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
obj-$(CONFIG_SBC8641D) += sbc8641d.o
obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
-gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
-obj-$(CONFIG_GE_FPGA) += gef_pic.o $(gef-gpio-y)
+obj-$(CONFIG_GE_FPGA) += gef_pic.o
obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o
obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o
obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index d0c4118..0409cf3 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -190,6 +190,17 @@ config GPIO_VX855
additional drivers must be enabled in order to use the
functionality of the device.
+config GPIO_GE_FPGA
+ bool "GE FPGA based GPIO"
+ depends on GE_FPGA
+ help
+ Support for common GPIO functionality provided on some GE Single Board
+ Computers.
+
+ This driver provides basic support (configure as input or output, read
+ and write pin state) for GPIO implemented in a number of GE single
+ board computers.
+
comment "I2C GPIO expanders:"
config GPIO_MAX7300
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index fa10df6..9a8fb54 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o
obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o
obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o
obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
+obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o
obj-$(CONFIG_GPIO_IT8761E) += gpio-it8761e.o
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/drivers/gpio/gpio-ge.c
similarity index 98%
rename from arch/powerpc/platforms/86xx/gef_gpio.c
rename to drivers/gpio/gpio-ge.c
index 2a70336..f8e6289 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/drivers/gpio/gpio-ge.c
@@ -14,7 +14,7 @@
*
* Configuration of output modes (totem-pole/open-drain)
* Interrupt configuration - interrupts are always generated the FPGA relies on
- * the I/O interrupt controllers mask to stop them propergating
+ * the I/O interrupt controllers mask to stop them propergating
*/
#include <linux/kernel.h>
--
1.7.0.4
^ permalink raw reply related
* [PATCH v3 1/4] powerpc: Add GE FPGA config option
From: Martyn Welch @ 2012-03-12 17:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Linus Walleij, linux-kernel, Martyn Welch, Wim Van Sebroeck
In-Reply-To: <1331572380-1064-1-git-send-email-martyn.welch@ge.com>
This patch adds the GE_FPGA configuration option. This is being carried
out as ground work to allow the PIC and GPIO drivers to be move from the
powerpc 86xx platform directory to more general locations to allow them to
be used on non-86xx boards and to reduce churn when further boards using
these drivers are added.
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
---
v3: Broken out from patch moving PIC and GPIO drivers
arch/powerpc/platforms/86xx/Kconfig | 7 +++++++
arch/powerpc/platforms/86xx/Makefile | 7 ++++---
drivers/watchdog/Kconfig | 2 +-
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 8d6599d..abe2c4f 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -39,6 +39,7 @@ config GEF_PPC9A
select MMIO_NVRAM
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
+ select GE_FPGA
help
This option enables support for the GE PPC9A.
@@ -48,6 +49,7 @@ config GEF_SBC310
select MMIO_NVRAM
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
+ select GE_FPGA
help
This option enables support for the GE SBC310.
@@ -57,10 +59,15 @@ config GEF_SBC610
select MMIO_NVRAM
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
+ select GE_FPGA
select HAS_RAPIDIO
help
This option enables support for the GE SBC610.
+config GE_FPGA
+ bool
+ default n
+
endif
config MPC8641
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 4b0d7b1..ac6a50f 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
obj-$(CONFIG_SBC8641D) += sbc8641d.o
obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o
-obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y)
-obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y)
-obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o gef_pic.o $(gef-gpio-y)
+obj-$(CONFIG_GE_FPGA) += gef_pic.o $(gef-gpio-y)
+obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o
+obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o
+obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 877b107..2955c3f 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1039,7 +1039,7 @@ config LANTIQ_WDT
config GEF_WDT
tristate "GE Watchdog Timer"
- depends on GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
+ depends on GE_FPGA
---help---
Watchdog timer found in a number of GE single board computers.
--
1.7.0.4
^ permalink raw reply related
* [PATCH V2 0/2] powerpc: Add support for GE IMP3A
From: Martyn Welch @ 2012-03-12 17:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Wim Van Sebroeck, Linus Walleij, linux-kernel
These patches add support for the GE IMP3A. This board (based on a Freescale
P2020) uses some support for FPGA logic common with the PPC9A and other 86xx
based boards, so this support has been moved out of the 86xx directory. A
config option (GE_FPGA) has been added to reduce churn on dependant drivers
(such as the watchdog timer) when further boards are added.
^ permalink raw reply
* Re: [PATCH v2 0/9] DMA engine cookie handling cleanups
From: Vinod Koul @ 2012-03-12 16:23 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Warren, Linus Walleij, Srinidhi Kasagar, Barry Song,
Dan Williams, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120312161143.GA10830@n2100.arm.linux.org.uk>
On Mon, 2012-03-12 at 16:11 +0000, Russell King - ARM Linux wrote:
> On Wed, Mar 07, 2012 at 07:24:26PM +0530, Vinod Koul wrote:
> > On Tue, 2012-03-06 at 22:33 +0000, Russell King - ARM Linux wrote:
> > > [v2 - more or less same description. Including lakml in cc for the full
> > > set]
> > >
> > > This patch series cleans up the handling of cookies in DMA engine drivers.
> > > This is done by providing a set of inline library functions for common
> > > tasks:
> > >
> > > - moving the 'last completed cookie' into struct dma_chan - everyone
> > > has this in their driver private channel data structure
> > >
> > > - consolidate allocation of cookies to DMA descriptors
> > >
> > > - common way to update 'last completed cookie' value
> > >
> > > - standard way to implement tx_status callback and update the residue
> > >
> > > - consolidate initialization of cookies
> > >
> > > - update implementations differing from the majority of DMA engine drivers
> > > to behave the same as the majority implementation in respect of cookies
> > >
> > > What this means is that we get to the point where all DMA engine drivers
> > > will hand out cookie value '2' as the first, and incrementing cookie
> > > values up to INT_MAX, returning to cookie '1' as the next cookie.
> > >
> > > Think of this patch series as round 1... I am hoping over time that more
> > > code can be consolidated between the DMA engine drivers and end up with a
> > > consistent way to handle various common themes in DMA engine hardware
> > > (like physical channel<->peripheral request signal selection.)
> > Thanks Russell,
> >
> > I have tested this on atom today, and as expected works flawlessly :)
> > After all acks, I can merge or these can go thru your tree with my Ack.
> > Either way is okay.
> >
> > I applied the v2 on a branch and also rebased on top of slave-dma.next.
> > There were few conflicts in imx-dma.c. Sacha, Javier, pls see that merge
> > is right.
> >
> > This branch (rmk_cookie_fixes2_rebased) is not yet pushed, as I am not
> > able to connect to infradead.org, should be done when server is back.
>
> Are you going to pick up Shawn Guo's tested-by for these patches, or are
> we saying its too late for that now?
Sure, his and others we have received on this series.
Also, IIRC there was one fixup from Jassi on pl330?
I should be able to merge this tomorrow, if thats fine with you.
--
~Vinod
^ permalink raw reply
* Re: [PATCH v2 0/9] DMA engine cookie handling cleanups
From: Russell King - ARM Linux @ 2012-03-12 16:11 UTC (permalink / raw)
To: Vinod Koul
Cc: Stephen Warren, Linus Walleij, Srinidhi Kasagar, Barry Song,
Dan Williams, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1331128466.24656.421.camel@vkoul-udesk3>
On Wed, Mar 07, 2012 at 07:24:26PM +0530, Vinod Koul wrote:
> On Tue, 2012-03-06 at 22:33 +0000, Russell King - ARM Linux wrote:
> > [v2 - more or less same description. Including lakml in cc for the full
> > set]
> >
> > This patch series cleans up the handling of cookies in DMA engine drivers.
> > This is done by providing a set of inline library functions for common
> > tasks:
> >
> > - moving the 'last completed cookie' into struct dma_chan - everyone
> > has this in their driver private channel data structure
> >
> > - consolidate allocation of cookies to DMA descriptors
> >
> > - common way to update 'last completed cookie' value
> >
> > - standard way to implement tx_status callback and update the residue
> >
> > - consolidate initialization of cookies
> >
> > - update implementations differing from the majority of DMA engine drivers
> > to behave the same as the majority implementation in respect of cookies
> >
> > What this means is that we get to the point where all DMA engine drivers
> > will hand out cookie value '2' as the first, and incrementing cookie
> > values up to INT_MAX, returning to cookie '1' as the next cookie.
> >
> > Think of this patch series as round 1... I am hoping over time that more
> > code can be consolidated between the DMA engine drivers and end up with a
> > consistent way to handle various common themes in DMA engine hardware
> > (like physical channel<->peripheral request signal selection.)
> Thanks Russell,
>
> I have tested this on atom today, and as expected works flawlessly :)
> After all acks, I can merge or these can go thru your tree with my Ack.
> Either way is okay.
>
> I applied the v2 on a branch and also rebased on top of slave-dma.next.
> There were few conflicts in imx-dma.c. Sacha, Javier, pls see that merge
> is right.
>
> This branch (rmk_cookie_fixes2_rebased) is not yet pushed, as I am not
> able to connect to infradead.org, should be done when server is back.
Are you going to pick up Shawn Guo's tested-by for these patches, or are
we saying its too late for that now?
^ permalink raw reply
* Re: [PATCH] powerpc/fsl_msi : return proper error value when ioremap failed.
From: Timur Tabi @ 2012-03-12 16:09 UTC (permalink / raw)
To: soniccat.liu; +Cc: linuxppc-dev
In-Reply-To: <1331246857-5622-1-git-send-email-soniccat.liu@gmail.com>
soniccat.liu@gmail.com wrote:
> From: Liu Shuo <soniccat.liu@gmail.com>
>
> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
Acked-by: Timur Tabi <timur@freescale.com>
This is not a critical fix for 3.3, but it should probably be applied to
3.3-stable.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* [PATCH] powerpc/fsl_msi : return proper error value when ioremap failed.
From: soniccat.liu @ 2012-03-08 22:47 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Liu Shuo, timur
From: Liu Shuo <soniccat.liu@gmail.com>
Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
---
arch/powerpc/sysdev/fsl_msi.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index ecb5c19..0bab156 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -410,6 +410,7 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
msi->msi_regs = ioremap(res.start, resource_size(&res));
if (!msi->msi_regs) {
+ err = -ENOMEM;
dev_err(&dev->dev, "could not map node %s\n",
dev->dev.of_node->full_name);
goto error_out;
--
1.7.4.1
^ permalink raw reply related
* [PATCH 1/2] [v3] powerpc/44x: Fix PCI MSI support for Maui APM821xx SoC and Bluestone board
From: Mai La @ 2012-03-12 8:07 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Josh Boyer, Matt Porter,
Tirumala R Marri, Grant Likely, Michael Neuling, Kumar Gala,
Anton Blanchard, linuxppc-dev, linux-kernel
Cc: open-source-review, Mai La
This patch consists of:
- Enable PCI MSI as default for Bluestone board
- Change definition of number of MSI interrupt as it depends on SoC
- Fix returning ENODEV as finding MSI node
- Fix MSI physical high and low address
- Keep MSI data logically
Signed-off-by: Mai La <mla@apm.com>
---
v3:
* Use upper_32_bits() / lower_32_bits() consistently as Wolfgang Denk recomments
v2:
* Change definition of number of MSI interrupt from config to count interrupts in device tree
---
arch/powerpc/platforms/44x/Kconfig | 2 +
arch/powerpc/sysdev/ppc4xx_msi.c | 40 +++++++++++++++++++++++------------
2 files changed, 28 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index fcf6bf2..9f04ce3 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -23,6 +23,8 @@ config BLUESTONE
default n
select PPC44x_SIMPLE
select APM821xx
+ select PCI_MSI
+ select PPC4xx_MSI
select IBM_EMAC_RGMII
help
This option enables support for the APM APM821xx Evaluation board.
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
index 1c2d7af..63989d0 100644
--- a/arch/powerpc/sysdev/ppc4xx_msi.c
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -28,10 +28,11 @@
#include <linux/of_platform.h>
#include <linux/interrupt.h>
#include <linux/export.h>
+#include <linux/kernel.h>
#include <asm/prom.h>
#include <asm/hw_irq.h>
#include <asm/ppc-pci.h>
-#include <boot/dcr.h>
+#include <asm/dcr.h>
#include <asm/dcr-regs.h>
#include <asm/msi_bitmap.h>
@@ -43,13 +44,14 @@
#define PEIH_FLUSH0 0x30
#define PEIH_FLUSH1 0x38
#define PEIH_CNTRST 0x48
-#define NR_MSI_IRQS 4
+
+int msi_irqs;
struct ppc4xx_msi {
u32 msi_addr_lo;
u32 msi_addr_hi;
void __iomem *msi_regs;
- int msi_virqs[NR_MSI_IRQS];
+ int *msi_virqs;
struct msi_bitmap bitmap;
struct device_node *msi_dev;
};
@@ -61,7 +63,7 @@ static int ppc4xx_msi_init_allocator(struct platform_device *dev,
{
int err;
- err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
+ err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
dev->dev.of_node);
if (err)
return err;
@@ -83,6 +85,9 @@ static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
struct msi_desc *entry;
struct ppc4xx_msi *msi_data = &ppc4xx_msi;
+ msi_data->msi_virqs = kmalloc((msi_irqs) * sizeof(int),
+ GFP_KERNEL);
+
list_for_each_entry(entry, &dev->msi_list, list) {
int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
if (int_no >= 0)
@@ -150,12 +155,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
if (!sdr_addr)
return -1;
- SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
- SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
-
+ mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
+ mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
- if (msi->msi_dev)
+ if (!msi->msi_dev)
return -ENODEV;
msi->msi_regs = of_iomap(msi->msi_dev, 0);
@@ -167,9 +171,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
(u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
- msi->msi_addr_hi = 0x0;
- msi->msi_addr_lo = (u32) msi_phys;
- dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
+ if (!msi_virt)
+ return -ENOMEM;
+ msi->msi_addr_hi = upper_32_bits(msi_phys);
+ msi->msi_addr_lo = lower_32_bits(msi_phys);
+ dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
+ msi->msi_addr_hi, msi->msi_addr_lo);
/* Progam the Interrupt handler Termination addr registers */
out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
@@ -185,6 +192,8 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
+ dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
+
return 0;
}
@@ -194,7 +203,7 @@ static int ppc4xx_of_msi_remove(struct platform_device *dev)
int i;
int virq;
- for (i = 0; i < NR_MSI_IRQS; i++) {
+ for (i = 0; i < msi_irqs; i++) {
virq = msi->msi_virqs[i];
if (virq != NO_IRQ)
irq_dispose_mapping(virq);
@@ -215,8 +224,6 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
struct resource res;
int err = 0;
- msi = &ppc4xx_msi;/*keep the msi data for further use*/
-
dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
@@ -234,6 +241,10 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
goto error_out;
}
+ msi_irqs = of_irq_count(dev->dev.of_node);
+ if (!msi_irqs)
+ return -1;
+
if (ppc4xx_setup_pcieh_hw(dev, res, msi))
goto error_out;
@@ -242,6 +253,7 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
dev_err(&dev->dev, "Error allocating MSI bitmap\n");
goto error_out;
}
+ ppc4xx_msi = *msi;
ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH 1/2] powerpc/44x: Fix PCI MSI support for Maui APM821xx SoC and Bluestone board
From: Wolfgang Denk @ 2012-03-12 5:31 UTC (permalink / raw)
To: Mai La
Cc: Michael Neuling, open-source-review, Tirumala R Marri,
linux-kernel, Josh Boyer, Anton Blanchard, Paul Mackerras,
linuxppc-dev
In-Reply-To: <1331524918-22515-1-git-send-email-mla@apm.com>
Dear Mai La,
In message <1331524918-22515-1-git-send-email-mla@apm.com> you wrote:
> This patch consists of:
> - Enable PCI MSI as default for Bluestone board
> - Change definition of number of MSI interrupt as it depends on SoC
> - Fix returning ENODEV as finding MSI node
> - Fix MSI physical high and low address
> - Keep MSI data logically
>
> Signed-off-by: Mai La <mla@apm.com>
This is an updated version of your patch of March 09, right -
http://article.gmane.org/gmane.linux.kernel/1264255 ??
If so, you should mark ot as patch V2 in the Subject:, and add a
description of what you changed.
> - SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
> - SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
> -
> + mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
> + mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
...
> + msi->msi_addr_hi = (u32)(msi_phys >> 32);
> + msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);
Is there any reason for not using upper_32_bits() / lower_32_bits()
consistently?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Real computer scientists despise the idea of actual hardware. Hard-
ware has limitations, software doesn't. It's a real shame that Turing
machines are so poor at I/O.
^ permalink raw reply
* [PATCH 1/2] powerpc/44x: Fix PCI MSI support for Maui APM821xx SoC and Bluestone board
From: Mai La @ 2012-03-12 4:01 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Josh Boyer, Matt Porter,
Tirumala R Marri, Grant Likely, Michael Neuling, Kumar Gala,
Anton Blanchard, linuxppc-dev, linux-kernel
Cc: open-source-review, Mai La
This patch consists of:
- Enable PCI MSI as default for Bluestone board
- Change definition of number of MSI interrupt as it depends on SoC
- Fix returning ENODEV as finding MSI node
- Fix MSI physical high and low address
- Keep MSI data logically
Signed-off-by: Mai La <mla@apm.com>
---
arch/powerpc/platforms/44x/Kconfig | 2 +
arch/powerpc/sysdev/ppc4xx_msi.c | 40 +++++++++++++++++++++++------------
2 files changed, 28 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index fcf6bf2..9f04ce3 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -23,6 +23,8 @@ config BLUESTONE
default n
select PPC44x_SIMPLE
select APM821xx
+ select PCI_MSI
+ select PPC4xx_MSI
select IBM_EMAC_RGMII
help
This option enables support for the APM APM821xx Evaluation board.
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
index 1c2d7af..63989d0 100644
--- a/arch/powerpc/sysdev/ppc4xx_msi.c
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -28,10 +28,11 @@
#include <linux/of_platform.h>
#include <linux/interrupt.h>
#include <linux/export.h>
+#include <linux/kernel.h>
#include <asm/prom.h>
#include <asm/hw_irq.h>
#include <asm/ppc-pci.h>
-#include <boot/dcr.h>
+#include <asm/dcr.h>
#include <asm/dcr-regs.h>
#include <asm/msi_bitmap.h>
@@ -43,13 +44,14 @@
#define PEIH_FLUSH0 0x30
#define PEIH_FLUSH1 0x38
#define PEIH_CNTRST 0x48
-#define NR_MSI_IRQS 4
+
+int msi_irqs;
struct ppc4xx_msi {
u32 msi_addr_lo;
u32 msi_addr_hi;
void __iomem *msi_regs;
- int msi_virqs[NR_MSI_IRQS];
+ int *msi_virqs;
struct msi_bitmap bitmap;
struct device_node *msi_dev;
};
@@ -61,7 +63,7 @@ static int ppc4xx_msi_init_allocator(struct platform_device *dev,
{
int err;
- err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
+ err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
dev->dev.of_node);
if (err)
return err;
@@ -83,6 +85,9 @@ static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
struct msi_desc *entry;
struct ppc4xx_msi *msi_data = &ppc4xx_msi;
+ msi_data->msi_virqs = kmalloc((msi_irqs) * sizeof(int),
+ GFP_KERNEL);
+
list_for_each_entry(entry, &dev->msi_list, list) {
int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
if (int_no >= 0)
@@ -150,12 +155,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
if (!sdr_addr)
return -1;
- SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
- SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
-
+ mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
+ mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
- if (msi->msi_dev)
+ if (!msi->msi_dev)
return -ENODEV;
msi->msi_regs = of_iomap(msi->msi_dev, 0);
@@ -167,9 +171,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
(u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
- msi->msi_addr_hi = 0x0;
- msi->msi_addr_lo = (u32) msi_phys;
- dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
+ if (!msi_virt)
+ return -ENOMEM;
+ msi->msi_addr_hi = (u32)(msi_phys >> 32);
+ msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);
+ dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
+ msi->msi_addr_hi, msi->msi_addr_lo);
/* Progam the Interrupt handler Termination addr registers */
out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
@@ -185,6 +192,8 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
+ dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
+
return 0;
}
@@ -194,7 +203,7 @@ static int ppc4xx_of_msi_remove(struct platform_device *dev)
int i;
int virq;
- for (i = 0; i < NR_MSI_IRQS; i++) {
+ for (i = 0; i < msi_irqs; i++) {
virq = msi->msi_virqs[i];
if (virq != NO_IRQ)
irq_dispose_mapping(virq);
@@ -215,8 +224,6 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
struct resource res;
int err = 0;
- msi = &ppc4xx_msi;/*keep the msi data for further use*/
-
dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
@@ -234,6 +241,10 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
goto error_out;
}
+ msi_irqs = of_irq_count(dev->dev.of_node);
+ if (!msi_irqs)
+ return -1;
+
if (ppc4xx_setup_pcieh_hw(dev, res, msi))
goto error_out;
@@ -242,6 +253,7 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
dev_err(&dev->dev, "Error allocating MSI bitmap\n");
goto error_out;
}
+ ppc4xx_msi = *msi;
ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
--
1.7.3.4
^ permalink raw reply related
* Re: linux-next: manual merge of the powerpc tree with the arm tree
From: Paul Mundt @ 2012-03-12 1:12 UTC (permalink / raw)
To: Rob Herring
Cc: Stephen Rothwell, Michael Neuling, linux-sh, linux-kernel,
linux-next, Paul Mackerras, linuxppc-dev, Russell King
In-Reply-To: <4F5A350F.3090905@calxeda.com>
On Fri, Mar 09, 2012 at 10:51:27AM -0600, Rob Herring wrote:
> On 03/08/2012 09:13 PM, Benjamin Herrenschmidt wrote:
> > On Fri, 2012-03-09 at 00:39 +0000, Russell King wrote:
> >> On Fri, Mar 09, 2012 at 10:35:46AM +1100, Benjamin Herrenschmidt wrote:
> >>> Actually, I didn't keep MAY_HAVE_SPARSE_IRQ, I kept HAVE_SPARSE_IRQ. If
> >>> I remove it, then I get Kconfig warnings:
> >>>
> >>> warning: (PPC) selects SPARSE_IRQ which has unmet direct dependencies
> >>> (HAVE_GENERIC_HARDIRQS && HAVE_SPARSE_IRQ)
> >>
> >> Do you have commit 2ed86b16eabe4efbf80cc725a8cbb5310746a2fc ?
> >
> > Nope, Grant patch didn't mention a dependency.
>
> My opinion is that SPARSE_IRQ shouldn't be user visible option, and the
> simple solution was to just make it hidden. It wasn't clear if this was
> desired or not for other arches at the time. There is a mixture of
> settings in powerpc defconfigs. SuperH selects it for 32-bit and leaves
> it user selectable for 64-bit.
>
> I'm happy to revert adding MAY_HAVE_SPARSE_IRQ and just make SPARSE_IRQ
> a hidden option. It really just needs the okay from SuperH folks.
>
We basically want it always-enabled for 32-bit and it doesn't matter much
about 64-bit. In the future I'll probably fix up the 64-bit stuff to use
it too and then we'll just leave it on all the time, but it's not such a
big deal if it's not visible for enabling on 64-bit at the moment given
that it's probably broken there at the moment.
^ permalink raw reply
* Re: linux-next: manual merge of the net-next tree with the powerpc tree
From: David Miller @ 2012-03-11 22:56 UTC (permalink / raw)
To: sfr; +Cc: netdev, linux-kernel, linux-next, paulus, joe, linuxppc-dev
In-Reply-To: <20120309174416.2b936c5a4a116d56f9a25502@canb.auug.org.au>
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Fri, 9 Mar 2012 17:44:16 +1100
> On Thu, 08 Mar 2012 22:15:34 -0800 (PST) David Miller <davem@davemloft.net> wrote:
>>
>> From: Stephen Rothwell <sfr@canb.auug.org.au>
>> Date: Fri, 9 Mar 2012 13:36:46 +1100
>>
>> > Today's linux-next merge of the net-next tree got a conflict in
>> > drivers/net/ethernet/ibm/iseries_veth.c between commit e92a665949f6
>> > ("net: powerpc: remove the legacy iSeries ethernet driver") from the
>> > powerpc tree and commit 41de8d4cff21 ("drivers/net: Remove alloc_etherdev
>> > error messages") from the net-next tree.
>> >
>> > I just removed the file.
>>
>> If it makes life easier for anyone I can put the driver removal patch
>> into net-next.
>
> In this case, I think it will actually help, thanks. Note that it won;t
> apply cleanly to your tree, but the fixup is easy :-)
>
> And I discovered that "git am" doesn't like the style of patch I did
> (without the body of the deleted file). If you just delete
> drivers/net/ethernet/ibm/iseries_veth.c before trying to apply the patch
> it will probably work.
I took care of this the other night.
^ permalink raw reply
* [PATCH][3/3][RFC] TDM device Support & driver for Freescale TDM controller
From: Poonam Aggrwal @ 2012-03-10 12:57 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Sandeep Singh, Poonam Aggrwal
From: Sandeep Singh <Sandeep@freescale.com>
Freescale TDM controller consists of a TDM module supporting 128 channels
running at up to 50 Mbps with 8-bit and 16-bit word size. The TDM bus connects
gluelessly to most T1/E1frames as well as to common buses such as the H.110,
SCAS, and MVIP. The TDM also supports an I2S mode. The TDM module operates in
independent or shared mode when receiving or transmitting data
This controller is available on MPC8315, P1010, P1020 Freescale SOCs.
The driver registers itself with the TDM Framework & provides TDM functionality
to the client modules.
As of now the driver supports only channelised mode.
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
drivers/tdm/Kconfig | 1 +
drivers/tdm/Makefile | 10 +
drivers/tdm/device/Kconfig | 15 +
drivers/tdm/device/Makefile | 9 +
drivers/tdm/device/tdm_fsl.c | 892 ++++++++++++++++++++++++++++++++++++++++++
drivers/tdm/device/tdm_fsl.h | 456 +++++++++++++++++++++
6 files changed, 1383 insertions(+), 0 deletions(-)
create mode 100644 drivers/tdm/Makefile
create mode 100644 drivers/tdm/device/Kconfig
create mode 100644 drivers/tdm/device/Makefile
create mode 100644 drivers/tdm/device/tdm_fsl.c
create mode 100644 drivers/tdm/device/tdm_fsl.h
diff --git a/drivers/tdm/Kconfig b/drivers/tdm/Kconfig
index 8db2b05..87d6929 100644
--- a/drivers/tdm/Kconfig
+++ b/drivers/tdm/Kconfig
@@ -22,4 +22,5 @@ config TDM_DEBUG_CORE
messages to the system log. Select this if you are having a
problem with TDM support and want to see more of what is going on.
+source drivers/tdm/device/Kconfig
endif # TDM
diff --git a/drivers/tdm/Makefile b/drivers/tdm/Makefile
new file mode 100644
index 0000000..fd2464b
--- /dev/null
+++ b/drivers/tdm/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for the TDM core.
+#
+
+obj-$(CONFIG_TDM) += tdm-core.o
+
+obj-y += device/
+ifeq ($(CONFIG_TDM_DEBUG_CORE),y)
+EXTRA_CFLAGS += -DDEBUG
+endif
diff --git a/drivers/tdm/device/Kconfig b/drivers/tdm/device/Kconfig
new file mode 100644
index 0000000..db5d741
--- /dev/null
+++ b/drivers/tdm/device/Kconfig
@@ -0,0 +1,15 @@
+#
+# Sensor device configuration
+#
+
+menu "TDM Device support"
+
+config TDM_FSL
+ tristate "Driver for Freescale TDM controller"
+ depends on FSL_SOC
+ ---help---
+ This is a driver for Freescale TDM controller. The controller
+ is found in various Freescale SOCs viz MPC8315, P1020. The TDM driver
+ basically multiplexes and demultiplexes data from different channels.
+ The TDM can interface SLIC kind of devices.
+endmenu
diff --git a/drivers/tdm/device/Makefile b/drivers/tdm/device/Makefile
new file mode 100644
index 0000000..e671a66
--- /dev/null
+++ b/drivers/tdm/device/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for the TDM bus drivers.
+#
+
+obj-$(CONFIG_TDM_FSL) += tdm_fsl.o
+
+#ifeq ($(CONFIG_TDM_DEBUG_BUS),y)
+#EXTRA_CFLAGS += -DDEBUG
+#endif
diff --git a/drivers/tdm/device/tdm_fsl.c b/drivers/tdm/device/tdm_fsl.c
new file mode 100644
index 0000000..99ee4d7
--- /dev/null
+++ b/drivers/tdm/device/tdm_fsl.c
@@ -0,0 +1,892 @@
+/*
+ * drivers/tdm/tdm_fsl.c
+ *
+ * Copyright (C) 2007-2012 Freescale Semiconductor, Inc, All rights reserved.
+ *
+ * TDM driver for Freescale TDM controller.
+ * This driver can interface with SLIC device to run VOIP kind of
+ * applications.
+ *
+ * Author: P. V. Suresh <pala@freescale.com>
+ * Hemant Agrawal <hemant@freescale.com>
+ * Rajesh Gumasta <rajesh.gumasta@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ /* Note that this is a complete rewrite of P.V. Suresh's driver code.
+ But we have used so much of his original code and ideas that it seems
+ only fair to recognize him as co-author -- Rajesh & Hemant */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+#include <linux/tdm.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/dma-mapping.h>
+#include <linux/spinlock.h>
+#include <sysdev/fsl_soc.h>
+
+#include "tdm_fsl.h"
+
+#define DRV_DESC "Freescale TDM Driver Adapter"
+#define DRV_NAME "fsl_tdm"
+
+static int tdmen = 1;
+
+module_param(tdmen, int, S_IRUSR);
+MODULE_PARM_DESC(tdmen, "Enable TDM: Enable=1, Disable=0(default)");
+
+/* Initialize the Tx Transmit Control Discriptor parameters*/
+static void tx_tcd_init(struct tdm_priv *priv)
+{
+ int i;
+ u32 iter;
+ u32 offset;
+ dma_addr_t physaddr;
+ struct tdm_adapter *adap;
+ int bytes_in_fifo_per_frame;
+ adap = priv->adap;
+ if (!adap) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return;
+ }
+ bytes_in_fifo_per_frame =
+ ALIGN_SIZE(adap->adapt_cfg.num_ch * adap->adapt_cfg.slot_width, 8);
+
+ iter = (bytes_in_fifo_per_frame / NBYTES) * adap->adapt_cfg.num_frames;
+
+ for (i = 0; i < NUM_OF_TDM_BUF; i++) {
+ offset = i * adap->adapt_cfg.num_frames *
+ bytes_in_fifo_per_frame;
+ /* saddr */
+ priv->dma_tx_tcd[i]->tcd[0] = (u32)priv->dma_output_paddr
+ + offset;
+
+ /* ssize=dsize=64bit, soff=8, smod=dmod=0 */
+ priv->dma_tx_tcd[i]->tcd[1] =
+ DMA_TCD1_SOFF(SOFF_VAL) | DMA_TCD1_SSIZE(SSIZE_64BITS) |
+ DMA_TCD1_DSIZE(SSIZE_64BITS);
+
+ /* number of bytes for minor loop, wide fifo 8bytes for dma */
+ priv->dma_tx_tcd[i]->tcd[2] = NBYTES;
+
+ /* slast = 0 */
+ priv->dma_tx_tcd[i]->tcd[3] = SLAST;
+
+ /* dadr = TX FIFO */
+ priv->dma_tx_tcd[i]->tcd[4] = TDM_TDR_OFFSET + priv->ptdm_base;
+
+ /* channel to channel linking is disabled ,
+ * destination offset is inc destination adr by 8,
+ * current iteration(citer) = number of transfers for frame
+ */
+ priv->dma_tx_tcd[i]->tcd[5] = DMA_TCD5_CITER_DISABLE_LINK(iter);
+
+ /* enable scater gather, interrupt on 1 Frame, */
+ priv->dma_tx_tcd[i]->tcd[7] =
+ DMA_TCD7_BITER_DISABLE_LINK(iter) | DMA_TCD7_E_SG;
+ priv->dma_tx_tcd[i]->tcd[6] = SLAST_SGA;
+ }
+
+ /* Next TCD for SG operation */
+ physaddr = priv->dma_tx_tcd_paddr;
+ priv->dma_tx_tcd[2]->tcd[6] =
+ ALIGN_SIZE(physaddr, ALIGNED_32_BYTES);
+ physaddr += TCD_BUFFER_SIZE;
+ priv->dma_tx_tcd[0]->tcd[6] =
+ ALIGN_SIZE(physaddr, ALIGNED_32_BYTES);
+ physaddr += TCD_BUFFER_SIZE;
+ priv->dma_tx_tcd[1]->tcd[6] =
+ ALIGN_SIZE(physaddr, ALIGNED_32_BYTES);
+}
+
+/* Initialize the Rx Transmit Control Discriptor parameters*/
+static void rx_tcd_init(struct tdm_priv *priv)
+{
+ int i;
+ u32 iter;
+ u32 offset;
+ dma_addr_t physaddr;
+ struct tdm_adapter *adap;
+ int bytes_in_fifo_per_frame;
+ adap = priv->adap;
+ if (!adap) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return;
+ }
+ bytes_in_fifo_per_frame =
+ ALIGN_SIZE(adap->adapt_cfg.num_ch * adap->adapt_cfg.slot_width, 8);
+
+ iter = (bytes_in_fifo_per_frame / NBYTES) * adap->adapt_cfg.num_frames;
+
+ for (i = 0; i < NUM_OF_TDM_BUF; i++) {
+ /* TDM RX fifo address */
+ priv->dma_rx_tcd[i]->tcd[0] = TDM_RDR_OFFSET + priv->ptdm_base;
+
+ /* ssize=dsize=64bit, soff=smod=dmod=0 */
+ priv->dma_rx_tcd[i]->tcd[1] =
+ DMA_TCD1_SSIZE(SSIZE_64BITS) | DMA_TCD1_DSIZE(SSIZE_64BITS);
+
+ /* number of bytes for minor loop, wide fifo 8bytes for dma */
+ priv->dma_rx_tcd[i]->tcd[2] = NBYTES;
+
+ /* slast = 0 */
+ priv->dma_rx_tcd[i]->tcd[3] = SLAST;
+
+ offset = i * adap->adapt_cfg.num_frames *
+ bytes_in_fifo_per_frame;
+
+ /* dadr = rx buffer address */
+ priv->dma_rx_tcd[i]->tcd[4] = (u32)priv->dma_input_paddr
+ + offset;
+
+ /* channel to channel linking is disabled ,
+ * destination offset is inc destination adr by 8,
+ * current iteration(citer) = number of transfers for frame
+ */
+ priv->dma_rx_tcd[i]->tcd[5] =
+ DMA_TCD5_DOFF(DOFF_VAL) | DMA_TCD5_CITER_DISABLE_LINK(iter);
+
+ /* enable scater gather, interrupt on 1 Frame, */
+ priv->dma_rx_tcd[i]->tcd[7] =
+ DMA_TCD7_BITER_DISABLE_LINK(iter) | DMA_TCD7_E_SG |
+ DMA_TCD7_INT_MAJ;
+ priv->dma_rx_tcd[i]->tcd[6] = DLAST_SGA;
+ }
+
+ /* Next TCD for SG operation */
+ physaddr = priv->dma_rx_tcd_paddr;
+ priv->dma_rx_tcd[2]->tcd[6] =
+ ALIGN_SIZE(physaddr, ALIGNED_32_BYTES);
+ physaddr += TCD_BUFFER_SIZE;
+ priv->dma_rx_tcd[0]->tcd[6] =
+ ALIGN_SIZE(physaddr, ALIGNED_32_BYTES);
+ physaddr += TCD_BUFFER_SIZE;
+ priv->dma_rx_tcd[1]->tcd[6] =
+ ALIGN_SIZE(physaddr, ALIGNED_32_BYTES);
+}
+
+static irqreturn_t tdm_err_isr(int irq, void *p)
+{
+ int ret = IRQ_NONE;
+ u32 status, mask, val;
+ u32 dmac_err;
+ struct tdm_priv *priv;
+ u32 ch;
+ priv = p;
+
+ if (!priv) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ /* transmit errors */
+ status = in_be32(&priv->tdm_regs->ter);
+ mask = in_be32(&priv->tdm_regs->tier);
+ val = status & mask;
+ out_be32(&priv->tdm_regs->ter, val);
+
+ /* Transmit under Run error */
+ if (val & TIER_TUEE)
+ dev_err(priv->device, "TDM::Transmit Under Run error\n");
+
+ /* Transmit Sync Error */
+ if (val & TIER_TSEEE)
+ dev_err(priv->device, "TDM::Transmit Sync error\n");
+
+ if (val)
+ ret = IRQ_HANDLED;
+
+ /* receive errors */
+ status = in_be32(&priv->tdm_regs->rer);
+ mask = in_be32(&priv->tdm_regs->rier);
+ val = status & mask;
+ out_be32(&priv->tdm_regs->rer, val);
+
+ /* Receiver Over run error */
+ if (val & RIER_ROEE)
+ dev_err(priv->device, "TDM::Receive Over Run error\n");
+
+ /* Receive Sync Error */
+ if (val & RIER_RSEEE)
+ dev_err(priv->device, "TDM::Receive Sync error\n");
+
+ if (val)
+ ret = IRQ_HANDLED;
+
+ /* Handling of DMA Errors */
+ dmac_err = in_be32(&priv->dmac_regs->dmaes);
+ if (!(dmac_err & DMAES_VLD))
+ return ret;
+
+ ch = DMAES_ERRCHN(dmac_err);
+
+ if (dmac_err & DMAES_CPE)
+ dev_err(priv->device, "TDM::Channel priority error\n");
+ if (dmac_err & DMAES_GPE)
+ dev_err(priv->device, "TDM::Group priority error\n");
+ if (dmac_err & DMAES_SAE)
+ dev_err(priv->device, "TDM::Source address error\n");
+ if (dmac_err & DMAES_SOE)
+ dev_err(priv->device, "TDM::Source offset error\n");
+ if (dmac_err & DMAES_DAE)
+ dev_err(priv->device, "TDM::Destination address error\n");
+ if (dmac_err & DMAES_DOE)
+ dev_err(priv->device, "TDM::Destination offset error\n");
+ if (dmac_err & DMAES_NCE)
+ dev_err(priv->device, "TDM::Nbytes citer error\n");
+ if (dmac_err & DMAES_SGE)
+ dev_err(priv->device, "TDM::Scatter gather error\n");
+ if (dmac_err & DMAES_DBE)
+ dev_err(priv->device, "TDM::Destination bus error\n");
+ if (dmac_err & DMAES_SBE)
+ dev_err(priv->device, "TDM::Source bus error\n");
+
+ /* Clear the error */
+ out_8(&priv->dmac_regs->dmacerr, (u8)ch);
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t dmac_done_isr(int irq, void *p)
+{
+ u32 ch;
+ int ret = IRQ_NONE;
+ struct tdm_priv *priv;
+
+ priv = p;
+ if (!priv) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ ch = in_be32(&priv->dmac_regs->dmaintl);
+
+ /* clear interrupt */
+ if (ch & DMAC_RX_INT) {
+ out_8(&priv->dmac_regs->dmacint, TDMRX_DMA_CH);
+ ret = IRQ_HANDLED;
+ /* track phases for Rx/Tx */
+ priv->phase_rx += 1;
+ if (priv->phase_rx == NUM_OF_TDM_BUF)
+ priv->phase_rx = 0;
+ }
+ if (ch & DMAC_TX_INT) {
+ out_8(&priv->dmac_regs->dmacint, TDMTX_DMA_CH);
+ ret = IRQ_HANDLED;
+ }
+
+ if (ret == IRQ_HANDLED) {
+ /* set the flag and wake up the thread */
+ priv->adap->tdm_rx_flag = 1;
+
+ /* schedule the tasklet */
+ if (priv->adap->tasklet_conf)
+ tasklet_schedule(&priv->adap->tdm_data_tasklet);
+ }
+ return ret;
+}
+
+static int init_tdm(struct tdm_priv *priv)
+{
+ u8 *buf;
+ int i;
+ int buf_size;
+ dma_addr_t physaddr = 0;
+ int ret = 0;
+ struct tdm_adapter *adap;
+
+ if (!priv) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ adap = priv->adap;
+
+ /*
+ Allocate memory for Rx/Tx buffer according to active time slots
+ BufferSize = NUM_OF_TDM_BUF * NUM_SAMPLES_PER_FRAME * slot_width *
+ num_ch
+ */
+ /*Allocating Rx Buffer*/
+ buf_size = TDM_BUF_SIZE(adap->adapt_cfg.num_ch,
+ adap->adapt_cfg.slot_width,
+ adap->adapt_cfg.num_frames);
+ buf = dma_alloc_coherent(priv->device, buf_size, &physaddr, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto err_alloc_ip;
+ }
+ priv->dma_input_paddr = physaddr;
+ priv->dma_input_vaddr = buf;
+ priv->tdm_input_data = ALIGN_ADDRESS(buf, ALIGNED_8_BYTES);
+
+ /*Allocating Tx Buffer*/
+ buf = dma_alloc_coherent(priv->device, buf_size, &physaddr, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto err_alloc_op;
+ }
+ priv->dma_output_paddr = physaddr;
+ priv->dma_output_vaddr = buf;
+ priv->tdm_output_data = ALIGN_ADDRESS(buf, ALIGNED_8_BYTES);
+
+ /* allocate memory for TCD buffer discriptors */
+ buf = dma_alloc_coherent(priv->device, NUM_OF_TDM_BUF * TCD_BUFFER_SIZE,
+ &physaddr, GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto err_alloc_rx;
+ }
+
+ memset(buf, 0, NUM_OF_TDM_BUF * TCD_BUFFER_SIZE);
+ priv->dma_rx_tcd_paddr = physaddr;
+ priv->dma_rx_tcd_vaddr = buf;
+ for (i = 0; i < NUM_OF_TDM_BUF; i++) {
+ priv->dma_rx_tcd[i] = ALIGN_ADDRESS(buf, ALIGNED_32_BYTES);
+ buf += TCD_BUFFER_SIZE;
+ }
+
+ buf = dma_alloc_coherent(priv->device, 3 * TCD_BUFFER_SIZE, &physaddr,
+ GFP_KERNEL);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto err_alloc_tx;
+ }
+ memset(buf, 0, NUM_OF_TDM_BUF * TCD_BUFFER_SIZE);
+ priv->dma_tx_tcd_paddr = physaddr;
+ priv->dma_tx_tcd_vaddr = buf;
+ for (i = 0; i < NUM_OF_TDM_BUF; i++) {
+ priv->dma_tx_tcd[i] = ALIGN_ADDRESS(buf, ALIGNED_32_BYTES);
+ buf += TCD_BUFFER_SIZE;
+ }
+
+ priv->phase_rx = 0;
+ priv->phase_tx = 0;
+ return 0;
+
+err_alloc_tx:
+ dma_free_coherent(priv->device, NUM_OF_TDM_BUF * TCD_BUFFER_SIZE,
+ priv->dma_rx_tcd_vaddr, priv->dma_rx_tcd_paddr);
+err_alloc_rx:
+ dma_free_coherent(priv->device, buf_size, priv->dma_output_vaddr,
+ priv->dma_output_paddr);
+err_alloc_op:
+ dma_free_coherent(priv->device, buf_size, priv->dma_input_vaddr,
+ priv->dma_input_paddr);
+err_alloc_ip:
+ return ret;
+}
+
+/* TDM register programming */
+static int tdm_fsl_reg_init(struct tdm_priv *priv)
+{
+ int i;
+ int ch_size_type;
+ phys_addr_t base = get_immrbase();
+ __be32 __iomem *pmuxcr;
+ struct tdm_adapter *adap;
+ if (!priv) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+ adap = priv->adap;
+
+ pmuxcr = ioremap(base + PMUXCR_OFFSET, 4);
+ if (!pmuxcr)
+ return -1;
+
+ out_be32(pmuxcr, in_be32(pmuxcr) | PMUXCR_TDM_ENABLE);
+ iounmap(pmuxcr);
+
+ /* channel/group round robin */
+ out_be32(&priv->dmac_regs->dmacr, DMACR_ERGA | DMACR_ERCA);
+ /* Enable error Interrupts for TDM Rx &Tx */
+ out_8(&priv->dmac_regs->dmaseei, TDMTX_DMA_CH);
+ out_8(&priv->dmac_regs->dmaseei, TDMRX_DMA_CH);
+ out_be32(&priv->dmac_regs->dmagpor, DMAGPOR_SNOOP);
+
+ tx_tcd_init(priv);
+ rx_tcd_init(priv);
+
+ /* TDM RD->TD loopback, Share T/R Fsync,Clock */
+ if (adap->adapt_cfg.loopback)
+ out_be32(&priv->tdm_regs->gir, GIR_LPBK | GIR_RTS);
+ else
+ out_be32(&priv->tdm_regs->gir, GIR_RTS);
+
+ /*
+ Rx Water mark 0, FIFO enable, Wide fifo, DMA enable for RX,
+ Receive Sync out, syncwidth = ch width, Rx clk out,zero sync,
+ falling edge , data order
+ */
+
+ out_be32(&priv->tdm_regs->rir,
+ RIR_RFWM(RIR_RFWM_VAL) | RIR_RFEN | RIR_RWEN | RIR_RDMA |
+ RIR_RSL | RIR_RSO | RIR_RCOE | RIR_RRDO |
+ RIR_RFSD(RIR_RFSD_VAL));
+ out_be32(&priv->tdm_regs->tir,
+ TIR_TFWM(TIR_RFWM_VAL) | TIR_TWEN | TIR_TDMA | TIR_TSL |
+ TIR_TSO | TIR_TRDO | TIR_TFSD(TIR_RFSD_VAL));
+
+ /* no of channels ,Channel size-coading */
+ switch (adap->adapt_cfg.ch_size_type) {
+ case CHANNEL_8BIT_LIN:
+ ch_size_type = CHANNEL_8BIT_LIN;
+ break;
+ case CHANNEL_8BIT_ULAW:
+ ch_size_type = CHANNEL_8BIT_ULAW;
+ break;
+ case CHANNEL_8BIT_ALAW:
+ ch_size_type = CHANNEL_8BIT_ALAW;
+ break;
+ case CHANNEL_16BIT_LIN:
+ ch_size_type = CHANNEL_16BIT_LIN;
+ break;
+ default:
+ pr_err("%s:Invalid channel_size_type.\n"
+ "Setting channel to default size: 16 bits", __func__);
+ ch_size_type = CHANNEL_16BIT_LIN;
+
+ }
+ out_be32(&priv->tdm_regs->rfp,
+ RFP_RNCF(adap->adapt_cfg.num_ch) | RFP_RCS(ch_size_type));
+ out_be32(&priv->tdm_regs->tfp,
+ TFP_TNCF(adap->adapt_cfg.num_ch) | TFP_TCS(ch_size_type));
+
+ out_be32(&priv->tdm_regs->rier, 0);
+ out_be32(&priv->tdm_regs->tier, 0);
+
+ /* clear all receive and transmit chs */
+ for (i = 0; i < 4; i++) {
+ out_be32(&priv->tdm_regs->tcma[i], 0);
+ out_be32(&priv->tdm_regs->tcen[i], 0);
+ out_be32(&priv->tdm_regs->rcen[i], 0);
+ }
+
+ return 0;
+
+}
+
+static void tdm_fsl_stop(struct tdm_priv *priv)
+{
+ /* stop the Tx & Rx */
+ out_be32(&priv->tdm_regs->tcr, 0);
+ out_be32(&priv->tdm_regs->rcr, 0);
+
+ /* Clear DMA error Enable Request DMAEEIH/L */
+ out_8(&priv->dmac_regs->dmaceei, TDMTX_DMA_CH);
+ out_8(&priv->dmac_regs->dmaceei, TDMRX_DMA_CH);
+ out_8(&priv->dmac_regs->dmacint, TDMRX_DMA_CH);
+ out_8(&priv->dmac_regs->dmacint, TDMTX_DMA_CH);
+
+ /* disable the dma request */
+ out_8(&priv->dmac_regs->dmacerq, TDMRX_DMA_CH);
+ out_8(&priv->dmac_regs->dmacerq, TDMTX_DMA_CH);
+}
+
+static int tdm_fsl_disable(struct tdm_adapter *adap)
+{
+ struct tdm_priv *priv;
+ if (!adap) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+ priv = tdm_get_adapdata(adap);
+ if (priv->tdm_active == 0) {
+ dev_warn(priv->device, "already Disabled");
+ return 0;
+ }
+
+ priv->tdm_active = 0;
+
+ return 0;
+}
+
+static int tdm_fsl_enable(struct tdm_adapter *adap)
+{
+ int i;
+ u32 ch_enab[4];
+ unsigned long timeout;
+ struct tdm_priv *priv;
+ u32 ph;
+ if (!adap) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+ priv = tdm_get_adapdata(adap);
+ ph = priv->phase_tx;
+
+ if (priv->tdm_active == 1) {
+ dev_warn(priv->device, "already Enabled");
+ return 0;
+ }
+
+ /* enable the Channels required 0 to number of ch -1 */
+ for (i = 0; i < NUM_TDMTCEN_REG; i++)
+ ch_enab[i] = 0;
+
+ for (i = 0; i < adap->adapt_cfg.num_ch; i++)
+ ch_enab[i / TDMTCEN_REG_LEN] |= (1 << (i & 0x1F));
+
+ for (i = 0; i < NUM_TDMTCEN_REG; i++) {
+ out_be32(&priv->tdm_regs->rcen[i], ch_enab[i]);
+ out_be32(&priv->tdm_regs->tcen[i], ch_enab[i]);
+ }
+
+ /* Clear the DONE bit */
+ out_8(&priv->dmac_regs->dmacdne, TDMRX_DMA_CH);
+ out_8(&priv->dmac_regs->dmacdne, TDMTX_DMA_CH);
+
+ /* Load the Tx transfer control descriptors */
+ for (i = 0; i < DMA_MAX_TCD; i++)
+ out_be32(&priv->dmac_regs->tcd[TDMTX_DMA_CH].tcd[i],
+ priv->dma_tx_tcd[ph]->tcd[i]);
+
+ /* Load the Rx transfer control descriptors */
+ for (i = 0; i < DMA_MAX_TCD; i++)
+ out_be32(&priv->dmac_regs->tcd[TDMRX_DMA_CH].tcd[i],
+ priv->dma_rx_tcd[ph]->tcd[i]);
+
+ /* enable the dma request */
+ out_8(&priv->dmac_regs->dmaserq, TDMRX_DMA_CH);
+ out_8(&priv->dmac_regs->dmaserq, TDMTX_DMA_CH);
+
+ /* Enable Receiver, transmitter */
+ timeout = jiffies + TDM_ENABLE_TIMEOUT;
+ out_be32(&priv->tdm_regs->tcr, TCR_TEN);
+ while (!(in_be32(&priv->tdm_regs->tsr) & TSR_TENS)) {
+ if (time_after(jiffies, timeout)) {
+ dev_err(priv->device, "timeout to enable TDM Tx\n");
+ return -ETIMEDOUT;
+ }
+ cpu_relax();
+ }
+
+ timeout = jiffies + TDM_ENABLE_TIMEOUT;
+ out_be32(&priv->tdm_regs->rcr, RCR_REN);
+ while (!(in_be32(&priv->tdm_regs->rsr) & RSR_RENS)) {
+ if (time_after(jiffies, timeout)) {
+ dev_err(priv->device, "timeout to enable TDM Rx\n");
+ return -ETIMEDOUT;
+ }
+ cpu_relax();
+
+ }
+
+ priv->tdm_active = 1;
+ return 1;
+}
+static u32 tdm_fsl_read(struct tdm_adapter *adap,
+ u16 **input_tdm_buffer)
+{
+ struct tdm_priv *priv;
+ u32 phase_rx;
+ u32 buf_addr, buf_size;
+ int bytes_in_fifo_per_frame;
+ if (!adap) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+ /* point to where to start for the current phase data processing */
+ bytes_in_fifo_per_frame =
+ ALIGN_SIZE(adap->adapt_cfg.num_ch * adap->adapt_cfg.slot_width, 8);
+
+ priv = tdm_get_adapdata(adap);
+ if (!priv) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ if (priv->tdm_active == 0) {
+ dev_warn(priv->device, "TDM is not ready");
+ return 0;
+ }
+
+ if (priv->phase_rx == 0)
+ phase_rx = NUM_OF_TDM_BUF - 1;
+ else
+ phase_rx = priv->phase_rx - 1;
+
+ buf_size = bytes_in_fifo_per_frame * adap->adapt_cfg.num_frames;
+ buf_addr = buf_size * phase_rx;
+ *input_tdm_buffer = (u16 *)(priv->tdm_input_data + buf_addr);
+
+ return buf_size;
+}
+
+static u32 tdm_fsl_get_write_buf(struct tdm_adapter *adap,
+ u16 **output_tdm_buffer)
+{
+ struct tdm_priv *priv;
+ u32 tmp;
+ u32 phase_tx;
+ u32 buf_addr, buf_size;
+ int bytes_in_fifo_per_frame;
+
+ if (!adap) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+ /* point to where to start for the current phase data processing */
+ bytes_in_fifo_per_frame =
+ ALIGN_SIZE(adap->adapt_cfg.num_ch * adap->adapt_cfg.slot_width, 8);
+
+ priv = tdm_get_adapdata(adap);
+ if (!priv) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ if (priv->tdm_active == 0) {
+ dev_warn(priv->device, "TDM is not ready");
+ return 0;
+ }
+
+ tmp = in_be32(&priv->dmac_regs->tcd[TDMTX_DMA_CH].tcd[0]);
+
+ tmp -= priv->dma_tx_tcd[0]->tcd[0];
+
+ priv->phase_tx = tmp/(bytes_in_fifo_per_frame *
+ adap->adapt_cfg.num_frames);
+
+ if (priv->phase_tx == 0)
+ phase_tx = NUM_OF_TDM_BUF - 1;
+ else
+ phase_tx = priv->phase_tx - 1;
+
+ buf_size = bytes_in_fifo_per_frame * adap->adapt_cfg.num_frames;
+ buf_addr = buf_size * phase_tx;
+ *output_tdm_buffer = (u16 *)(priv->tdm_output_data + buf_addr);
+
+ return buf_size;
+}
+
+static const struct tdm_adapt_algorithm tdm_algo = {
+ .tdm_read = tdm_fsl_read,
+ .tdm_get_write_buf = tdm_fsl_get_write_buf,
+ .tdm_enable = tdm_fsl_enable,
+ .tdm_disable = tdm_fsl_disable,
+};
+
+static struct tdm_adapter tdm_fsl_ops = {
+ .owner = THIS_MODULE,
+ .name = "fsl_tdm",
+ .algo = &tdm_algo,
+};
+
+static int __devinit tdm_fsl_probe(struct platform_device *ofdev)
+{
+ int ret = 0;
+ struct tdm_priv *priv;
+ struct resource res;
+
+ priv = kzalloc(sizeof(struct tdm_priv), GFP_KERNEL);
+ if (!priv) {
+ ret = -ENOMEM;
+ goto err_alloc;
+ }
+
+ dev_set_drvdata(&ofdev->dev, priv);
+ priv->device = &ofdev->dev;
+ ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
+ if (ret) {
+ ret = -EINVAL;
+ goto err_resource;
+ }
+
+ priv->ptdm_base = (u32)res.start;
+ priv->tdm_regs = of_iomap(ofdev->dev.of_node, 0);
+ if (!priv->tdm_regs) {
+ ret = -ENOMEM;
+ goto err_tdmregs;
+ }
+
+ priv->dmac_regs = of_iomap(ofdev->dev.of_node, 1);
+ if (!priv->dmac_regs) {
+ ret = -ENOMEM;
+ goto err_dmacreg;
+ }
+
+ /* tdmrd tmdtd at immrbar+0x16100 */
+ priv->data_regs =
+ (struct tdm_data *)(TDM_DATAREG_OFFSET + (u8 *)priv->tdm_regs);
+ /* TDMCLK_DIV_VAL_RX/TX at TDMBASE+0x180 */
+ priv->clk_regs =
+ (struct tdm_clock *)(TDM_CLKREG_OFFSET + (u8 *)priv->tdm_regs);
+
+ priv->dmac_done_intr = irq_of_parse_and_map(ofdev->dev.of_node, 0);
+ if (priv->dmac_done_intr == NO_IRQ) {
+ ret = -EINVAL;
+ goto err_dmacdone_irqmap;
+ }
+ ret =
+ request_irq(priv->dmac_done_intr, dmac_done_isr, 0, "dmac_done_isr",
+ priv);
+ if (ret)
+ goto err_dmacdoneisr;
+
+
+ priv->adap = &tdm_fsl_ops;
+
+ /* Wait q initilization */
+ priv->adap->tdm_rx_flag = 0;
+ /* todo - these should be configured by dts or init time */
+ tdm_set_adapdata(priv->adap, priv);
+ priv->adap->parent = &ofdev->dev;
+
+ ret = tdm_add_adapter(priv->adap);
+ if (ret < 0) {
+ dev_err(priv->device, "failed to add adapter\n");
+ goto fail_adapter;
+ }
+
+
+ ret = init_tdm(priv);
+ if (ret)
+ goto err_tdminit;
+
+ ret = tdm_fsl_reg_init(priv);
+ if (ret)
+ goto err_tdminit;
+
+ spin_lock_init(&priv->tdmlock);
+ spin_lock(&priv->tdmlock);
+ priv->tdm_active = 0;
+ spin_unlock(&priv->tdmlock);
+
+ if (tdmen) {
+ ret = tdm_fsl_enable(priv->adap);
+ if (!ret)
+ goto err_tdminit;
+ }
+
+ return 0;
+
+err_tdminit:
+fail_adapter:
+ free_irq(priv->dmac_done_intr, priv);
+err_dmacdoneisr:
+ free_irq(priv->tdm_err_intr, priv);
+err_dmacdone_irqmap:
+ irq_dispose_mapping(priv->dmac_done_intr);
+err_dmacreg:
+ iounmap(priv->dmac_regs);
+err_tdmregs:
+err_resource:
+ dev_set_drvdata(&ofdev->dev, NULL);
+ kfree(priv);
+err_alloc:
+ return ret;
+}
+
+static int __devexit tdm_fsl_remove(struct platform_device *ofdev)
+{
+ struct tdm_priv *priv;
+ int buf_size;
+ struct tdm_adapter *adap;
+
+ if (!ofdev) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ priv = dev_get_drvdata(&ofdev->dev);
+ adap = priv->adap;
+
+ tdm_fsl_disable(priv->adap);
+
+ tdm_fsl_stop(priv);
+
+ tdm_del_adapter(priv->adap);
+ dev_set_drvdata(&ofdev->dev, NULL);
+
+ /* free the irqs and dispose their mapping */
+ free_irq(priv->tdm_err_intr, priv);
+ free_irq(priv->dmac_done_intr, priv);
+ irq_dispose_mapping(priv->tdm_err_intr);
+ irq_dispose_mapping(priv->dmac_done_intr);
+ iounmap(priv->tdm_regs);
+ iounmap(priv->dmac_regs);
+
+ /* free the buffers */
+ buf_size =
+ TDM_BUF_SIZE(adap->adapt_cfg.num_ch, adap->adapt_cfg.slot_width,
+ adap->adapt_cfg.num_frames);
+ dma_free_coherent(priv->device, buf_size, priv->dma_input_vaddr,
+ priv->dma_input_paddr);
+ dma_free_coherent(priv->device, buf_size, priv->dma_output_vaddr,
+ priv->dma_output_paddr);
+
+ /* free the TCDs */
+ dma_free_coherent(priv->device, NUM_OF_TDM_BUF * TCD_BUFFER_SIZE,
+ priv->dma_rx_tcd_vaddr, priv->dma_rx_tcd_paddr);
+ dma_free_coherent(priv->device, NUM_OF_TDM_BUF * TCD_BUFFER_SIZE,
+ priv->dma_tx_tcd_vaddr, priv->dma_tx_tcd_paddr);
+ dev_set_drvdata(&ofdev->dev, NULL);
+ kfree(priv);
+ return 0;
+}
+
+static const struct of_device_id fsl_tdm_match[] = {
+ {
+ .compatible = "fsl,tdm",
+ },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, fsl_tdm_match);
+
+static struct platform_driver tdm_fsl_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = DRV_NAME,
+ .of_match_table = fsl_tdm_match,
+
+ },
+ .probe = tdm_fsl_probe,
+ .remove = __devexit_p(tdm_fsl_remove),
+};
+
+static int __init tdm_fsl_init(void)
+{
+ int ret;
+ pr_info(DRV_NAME ": " DRV_DESC ":Init\n");
+ ret = platform_driver_register(&tdm_fsl_driver);
+ if (ret)
+ pr_err(DRV_NAME
+ "of_register_platform_driver failed (%i)\n", ret);
+ return ret;
+}
+
+static void __exit tdm_fsl_exit(void)
+{
+ pr_info(DRV_NAME ": " DRV_DESC ":Exit\n");
+ platform_driver_unregister(&tdm_fsl_driver);
+}
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("P.V.Suresh, Freescale Semiconductor");
+MODULE_DESCRIPTION("Driver For Freescale TDM controller");
+MODULE_VERSION("1.1");
+
+module_init(tdm_fsl_init);
+module_exit(tdm_fsl_exit);
diff --git a/drivers/tdm/device/tdm_fsl.h b/drivers/tdm/device/tdm_fsl.h
new file mode 100644
index 0000000..4fa3032
--- /dev/null
+++ b/drivers/tdm/device/tdm_fsl.h
@@ -0,0 +1,456 @@
+/*
+ * drivers/device/fsl_tdm.h
+ *
+ * Copyright (C) 2007-2012 Freescale Semiconductor, Inc, All rights reserved.
+ *
+ * Created by P. V. Suresh <pala@freescale.com>
+ *
+ * Modified by Rajesh Gumasta <rajesh.gumasta@freescale.com>
+ * 1. Modified to support MPC85xx based devices
+ * 2. Modified the priv structure to support Adapter Registeration
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef FSL_TDM_H
+#define FSL_TDM_H
+
+/* enable clock to TDM */
+#ifdef CONFIG_MPC831x_RDB
+
+#define SCCR_OFFSET 0x0A08
+#define SCCR_TDM_MASK 0x000000C0
+#define TDM_CM_01 (0x01<<6)
+
+/* enable tdm in SICR */
+#define SICRL_OFFSET 0x0114
+#define SICRL_TDM_MASK 0xF00F0000
+
+#endif
+
+#ifdef CONFIG_MPC85xx_RDB
+
+#define PMUXCR_OFFSET 0xE0060
+#define PMUXCR_TDM_ENABLE 0x00800000
+
+#endif
+
+#ifdef CONFIG_P1022_DS
+#define PMUXCR_OFFSET 0xE0060
+#define PMUXCR_TDM_ENABLE 0x00014800
+
+#endif
+/* TDM data register offset */
+#define TDM_TDR_OFFSET 0x108
+#define TDM_RDR_OFFSET 0x100
+#define TDM_DATAREG_OFFSET 0x100
+#define TDM_CLKREG_OFFSET 0x180
+
+/* max number of TDM-DMA channels */
+#define DMA_MAX_CHANNELS 4
+
+/* TCD params */
+#define SOFF_VAL 0x08
+#define DOFF_VAL 0x08
+#define NBYTES 0x08 /*Minor Bytes transfer count*/
+#define SLAST 0x00 /* last source addr adjustment*/
+#define SLAST_SGA 0x00
+#define DLAST_SGA 0x00
+
+/* RIR Params*/
+#define RIR_RFSD_VAL 0x01
+#define RIR_RFWM_VAL 0x00
+
+/* TIR Params*/
+#define TIR_RFSD_VAL 0x01
+#define TIR_RFWM_VAL 0x00
+
+/* TDMTCEN */
+#define NUM_TDMTCEN_REG 0x04
+#define TDMTCEN_REG_LEN 32
+
+/* each DMA-ch contains 8 Transfer Control Discriptors */
+#define DMA_MAX_TCD 8
+
+#define DMAC_TX_INT 1
+#define DMAC_RX_INT 2
+
+#define TDM_CHANNEL_8BIT_LIN 0x00000000 /* 8 bit linear */
+#define TDM_CHANNEL_8BIT_ULAW 0x00000001 /* 8 bit Mu-law */
+#define TDM_CHANNEL_8BIT_ALAW 0x00000002 /* 8 bit A-law */
+#define TDM_CHANNEL_16BIT_LIN 0x00000003 /* 16 bit Linear */
+
+/* DMAC TCD structure */
+struct tcd {
+ u32 tcd[DMA_MAX_TCD];
+};
+
+/* DMA Controllor */
+struct dmac_regs {
+ u32 dmacr; /* DMA Control Register */
+ u32 dmaes; /* DMA Error Status Register */
+ u32 dmaerqh; /* DMA Enable Request */
+ u32 dmaerql; /* DMA Enable Request */
+ u32 dmaeeih; /* DMA Enable Error Interrupt */
+ u32 dmaeeil; /* DMA Enable Error Interrupt */
+
+ u8 dmaserq; /* DMA Set Enable Request */
+ u8 dmacerq; /* DMA Clear Enable Request */
+ u8 dmaseei; /* DMA Set Enable Error Interrupt */
+ u8 dmaceei; /* DMA Clear Enable Error Interrupt */
+
+ u8 dmacint; /* DMA Clear Interrupt Request */
+ u8 dmacerr; /* DMA Clear Error */
+ u8 dmassrt; /* DMA Set Start Bit */
+ u8 dmacdne; /* DMA Clear Done Bit */
+
+ u32 dmainth; /* DMA Interrupt Request High */
+ u32 dmaintl; /* DMA Interrupt Request */
+ u32 dmaerrh; /* DMA Error */
+ u32 dmaerrl; /* DMA Error */
+ u32 dmahrsh; /* DMA Hardware Request status */
+ u32 dmahrsl; /* DMA HardWired Request status */
+ u32 dmagpor; /* DMA General Purpose Register */
+ u8 reserved0[0xC4];
+ u8 dchpri[DMA_MAX_CHANNELS]; /* DMA Port Priority */
+ u8 reserved1[0xEFC];
+ struct tcd tcd[DMA_MAX_CHANNELS]; /*Transfer Control Descriptor */
+};
+
+/* DMA GPOR */
+#define DMAGPOR_SNOOP 0x00000040 /* Enable Snooping */
+
+/* DMA Control Register (DMACR) */
+#define DMACR_EMLM 0x00000080 /* Enable Minor loop Mapping */
+#define DMACR_CLM 0x00000040 /* Continuous link mode */
+#define DMACR_HALT 0x00000020 /* Halt DMA */
+#define DMACR_HOE 0x00000010 /* Halt on Error */
+#define DMACR_ERGA 0x00000008 /* Round robin among the groups */
+#define DMACR_ERCA 0x00000004 /* Round robin Port Arbitration */
+#define DMACR_EDBG 0x00000002 /* Debug */
+#define DMACR_EBW 0x00000001 /* Enable Buffer */
+
+/* DMA Error Status DMAES */
+#define DMAES_VLD 0x80000000 /* Logical OR of all DMA errors. */
+#define DMAES_ECX 0x00010000 /* Transfer cancelled */
+#define DMAES_GPE 0x00008000 /* Group priority error */
+#define DMAES_CPE 0x00004000 /* Channel priority error */
+/* errored/cancelled channel */
+#define DMAES_ERRCHN(ERRCH) (((ERRCH) & 0x1F00) >> 8)
+#define DMAES_SAE 0x00000080 /* Source address error */
+#define DMAES_SOE 0x00000040 /* Source offset error */
+#define DMAES_DAE 0x00000020 /* Destination address error */
+#define DMAES_DOE 0x00000010 /* Destination offset error */
+#define DMAES_NCE 0x00000008 /* Nbytes citer error */
+#define DMAES_SGE 0x00000004 /* Scatter gather error */
+#define DMAES_SBE 0x00000002 /* Source bus error */
+#define DMAES_DBE 0x00000001 /* Destination bus error */
+
+/* DMA Enable Request (DMAERQH, DMAERQL) Enable/disable device
+ request for the channel */
+#define DMA_SET_ENABLE_REQUEST(REGS, CH) out_8(((REGS)->dmasreq), CH)
+#define DMA_CLEAR_ENABLE_REQUEST(REGS, CH) out_8(((REGS)->dmacerq), CH)
+
+/* DMA Enable Error Interrupt (DMAEEIH, DMAEEIL) Enable/disable
+ error interrupt for the channel */
+#define DMA_SET_ENABLE_ERROR_INT(REGS, CH) out_8(((REGS)->dmaseei), CH)
+#define DMA_CLEAR_ENABLE_ERROR_INT(REGS, CH) out_8(((REGS)->dmaceei), CH)
+
+/* Clear interrupt/error for the channel */
+#define DMA_CLEAR_INTT_REQUEST(REGS, CH) out_8(((REGS)->dmacint), CH)
+#define DMA_CLEAR_ERROR(REGS, CH) out_8(((REGS)->dmacerr), CH)
+
+/* Clear done bit for the channel */
+#define DMA_CLEAR_DONE_BIT(REGS, CH) out_8(((REGS)->dmacdne), CH)
+/* Set start bit for the channel */
+#define DMA_SET_START_BIT(REGS, CH) out_8(((REGS)->dmassrt), CH)
+
+#define TDMTX_DMA_CH 0 /* TDM Tx uses DMA 0 HardWired */
+#define TDMRX_DMA_CH 1 /* TDM Rx uses DMA 1 Hardwired */
+#define TCD_SIZE 32 /* 32 byte TCD for channel */
+#define TCD_BUFFER_SIZE 64 /* 64 byte buffer for TCD */
+
+/* Source address modulo */
+#define DMA_TCD1_SMOD(SMOD) (((SMOD) & 0x1F) << 27)
+/* Source data transfer size */
+#define DMA_TCD1_SSIZE(SSIZE) (((SSIZE) & 0x7) << 24)
+
+/* Destination address modulo */
+#define DMA_TCD1_DMOD(DMOD) (((DMOD) & 0x1F) << 19)
+/* data transfer size */
+#define DMA_TCD1_DSIZE(DSIZE) (((DSIZE) & 0x7) << 16)
+
+/* Source address signed offset */
+#define DMA_TCD1_SOFF(SOFF) ((SOFF) & 0xFFFF)
+
+/* Enable link to another channel on minor iteration completion. */
+#define DMA_TCD5_E_MINOR_LINK 0x80000000
+/* Link to this channel. */
+#define DMA_TCD5_LINK_CH(CH) (((CH) & 0x3F) << 25)
+/* Current iteration count when linking disnabled */
+#define DMA_TCD5_CITER_DISABLE_LINK(CITER) (((CITER) & 0x7FFF) << 16)
+/* Current iteration count when linking enabled */
+#define DMA_TCD5_CITER_ENABLE_LINK(CITER) (((CITER) & 0x00FF) << 16)
+/* Destination address signed offset */
+#define DMA_TCD5_DOFF(DOFF) ((DOFF) & 0xFFFF)
+
+/* Beginning iteration count when linking disnabled */
+#define DMA_TCD7_BITER_DISABLE_LINK(CITER) (((CITER) & 0x7FFF) << 16)
+/* Beginning iteration count when linking enabled */
+#define DMA_TCD7_BITER_ENABLE_LINK(CITER) (((CITER) & 0x00FF) << 16)
+#define DMA_TCD7_BWC(BW) (((BW)&0x3)<<14) /* BandWidth Control. */
+/* Link channel number */
+#define DMA_TCD7_LINKCH(CH) (((CH) & 0x1F) << 8)
+#define DMA_TCD7_DONE 0x00000080 /* Channel done */
+#define DMA_TCD7_ACTIVE 0x00000040 /* Channel active */
+#define DMA_TCD7_E_MAJOR_LINK 0x00000020 /* channel to channel linking */
+#define DMA_TCD7_E_SG 0x00000010 /* Enable scatter gather */
+#define DMA_TCD7_D_REQ 0x00000008 /* Disable request */
+/* interrupt on half major counter */
+#define DMA_TCD7_INT_HALF 0x00000004
+#define DMA_TCD7_INT_MAJ 0x00000002 /* interrupt on major counter */
+#define DMA_TCD7_START 0x00000001 /* Channel start */
+
+#define SSIZE_08BITS 0x00 /* port 1 byte */
+#define SSIZE_16BITS 0x01
+#define SSIZE_32BITS 0x02
+#define SSIZE_64BITS 0x03
+
+/* TDM Control Registers. */
+struct tdm_regs {
+ u32 gir; /* General Interface Register */
+ u32 rir; /* Receive Interface Register */
+ u32 tir; /* Transmit Interface Register */
+ u32 rfp; /* Receive Frame Parameters */
+ u32 tfp; /* Transmit Frame Parameters */
+ u8 reserved0[0xC];
+ u32 rcen[4]; /* Recieve Channel Enabled */
+ u8 reserved1[0x10];
+ u32 tcen[4]; /* Transmit Channel Enabled */
+ u8 reservedd2[0x10];
+ u32 tcma[4]; /* Transmit Channel Mask */
+ u8 reservederved3[0x10];
+ u32 rcr; /* Receiver Control Register */
+ u32 tcr; /* Transmitter Control Register */
+ u32 rier; /* Receive Interrupt Enable Register */
+ u32 tier; /* Transmit Interrupt Enable Register */
+ u8 reserved4[0x10];
+ u32 rer; /* Receive Event Register */
+ u32 ter; /* Transmit Event Register */
+ u32 rsr; /* Receive Status Register */
+ u32 tsr; /* Transmit Status Register */
+};
+
+struct tdm_data {
+ u64 rdr; /* Receive Data Register */
+ u64 tdr; /* Transmit Dataa Register */
+};
+
+struct tdm_clock {
+ u32 rx; /* Transmit Dataa Register */
+ u32 tx; /* Receive Data Register */
+};
+
+/* TDMGIR General Interface Register */
+#define GIR_LPBK 0x00000004 /* loopback mode */
+#define GIR_CTS 0x00000002 /* Common TDM signals */
+#define GIR_RTS 0x00000001 /* Rx & Tx sharing */
+
+/* TDMRIR Recieve Interface Rgister */
+#define RIR_RFWM_MASK 0x00000003 /* Recieve FIFO Watermark */
+#define RIR_RFWM_SHIFT 16
+#define RIR_RFWM(x) ((x & RIR_RFWM_MASK) << RIR_RFWM_SHIFT)
+#define RIR_RFEN 0x00008000 /* Recieve FIFO Enable */
+#define RIR_RWEN 0x00004000 /* Recieve Wide FIFO Enable */
+#define RIR_RDMA 0x00000040 /* Recieve DMA Enable */
+#define RIR_RFSD_SHIFT 0x00000004 /* Recieve Frame Sync Delay */
+#define RIR_RFSD_MASK 0x00000003
+#define RIR_RFSD(x) ((x & RIR_RFSD_MASK) << RIR_RFSD_SHIFT)
+#define RIR_RSO 0x00002000 /* Recieve sync Out */
+#define RIR_RSL 0x00000800 /* Recieve sync Out Length */
+#define RIR_RSOE 0x00000400 /* Recieve sync Out Edge */
+#define RIR_RCOE 0x00000200 /* Recieve Clock Output Enable */
+#define RIR_RSA 0x00000008 /* Recieve Sync Active */
+#define RIR_RDE 0x00000004 /* Recieve Data Edge */
+#define RIR_RFSE 0x00000002 /* Recieve Frame Sync Edge */
+#define RIR_RRDO 0x00000001 /* Revieve Reversed Data Order */
+
+/* TDMTIR Transmit Interface Rgister */
+#define TIR_TFWM_MASK 0x00000003 /* Transmit FIFO Watermark */
+#define TIR_TFWM_SHIFT 16
+#define TIR_TFWM(x) ((x & TIR_TFWM_MASK) << TIR_TFWM_SHIFT)
+#define TIR_TFEN 0x00008000 /* Transmit FIFO Enable */
+#define TIR_TWEN 0x00004000 /* Transmit Wide FIFO Enable */
+#define TIR_TDMA 0x00000040 /* Transmit DMA Enable */
+#define TIR_TFSD_SHIFT 0x00000004 /* Transmit Frame Sync Delay */
+#define TIR_TFSD_MASK 0x00000003
+#define TIR_TFSD(x) ((x & TIR_TFSD_MASK) << TIR_TFSD_SHIFT)
+#define TIR_TSO 0x00002000 /* Transmit Sync Output */
+#define TIR_TSL 0x00000800 /* Transmit sync Out Length */
+#define TIR_TSOE 0x00000400 /* Transmit sync Out Edge */
+#define TIR_TCOE 0x00000200 /* Transmit Clock Output Enable */
+#define TIR_TSA 0x00000008 /* Transmit Sync Active */
+#define TIR_TDE 0x00000004 /* Transmit Data Edge */
+#define TIR_TFSE 0x00000002 /* Transmit Frame Sync Edge */
+#define TIR_TRDO 0x00000001 /* Transmit Reversed Data Order */
+
+/*TDMRFP Revieve Frame Parameters */
+#define RFP_RNCF_SHIFT 0x00000010 /* Number of Channels in TDM Frame */
+#define RFP_RNCF_MASK 0x000000FF
+#define RFP_RNCF(x) (((x - 1) & RFP_RNCF_MASK) << RFP_RNCF_SHIFT)
+#define RFP_RCS_SHIFT 0x00000004 /* Recieve Channel Size */
+#define RFP_RCS_MASK 0x00000003
+#define RFP_RCS(x) ((x & RFP_RCS_MASK) << RFP_RCS_SHIFT)
+#define RFP_RT1 0x00000002 /* Recieve T1 Frame */
+
+/*TDMTFP Transmit Frame Parameters */
+#define TFP_TNCF_SHIFT 0x00000010 /* Number of Channels in TDM Frame */
+#define TFP_TNCF_MASK 0x000000FF
+#define TFP_TNCF(x) (((x - 1) & TFP_TNCF_MASK) << TFP_TNCF_SHIFT)
+#define TFP_TCS_SHIFT 0x00000004 /* Transmit Channel Size */
+#define TFP_TCS_MASK 0x00000003
+#define TFP_TCS(x) ((x & RFP_RCS_MASK) << RFP_RCS_SHIFT)
+#define TFP_TT1 0x00000002 /* Transmit T1 Frame */
+
+
+/* TDMRCR Recieve Control Register */
+#define RCR_REN 0x00000001 /* Recieve Enable */
+/* TDMTCR Transmit Control Register */
+#define TCR_TEN 0x00000001 /* Transmit Enable */
+
+/* TDMRIER receive interrupt enable register */
+#define RIER_RCEUE 0x00000100 /* Channel Enable Update Enable */
+#define RIER_RLCEE 0x00000080 /* Recieve Last Channel Event Enable */
+#define RIER_RFSEE 0x00000040 /* Recieve Frame Sync Event Enable */
+#define RIER_RFFEE 0x00000020 /* Recieve FIFO Full Event Enable */
+#define RIER_RDREE 0x00000010 /* Recieve Data Ready Event Enable */
+#define RIER_RSEEE 0x00000008 /* Recieve Sync Error Event Enable */
+#define RIER_ROEE 0x00000004 /* Recieve Overrun Event Enable */
+
+/* TDMTIER transmit interrupt enable register */
+#define TIER_TCEUE 0x00000100 /* Channel Enable Update Enable */
+#define TIER_TLCEE 0x00000080 /* Transmit Last Channel Event */
+#define TIER_TFSEE 0x00000040 /* Transmit Frame Sync Event Enable */
+#define TIER_TFFEE 0x00000020 /* Transmit FIFO Full Event Enable */
+#define TIER_TDREE 0x00000010 /* Transmit Data Ready Event Enable */
+#define TIER_TSEEE 0x00000008 /* Transmit Sync Error Event Enable */
+#define TIER_TUEE 0x00000004 /* Transmit Overrun Event Enable */
+
+/* TDMRER Recieve Event Register */
+#define RER_RCEU 0x00000100 /* Recieve Channel Enable Update */
+#define RER_RLCE 0x00000080 /* Recieve Last Channel Event */
+#define RER_RFSE 0x00000040 /* Recieve Frame Sync Event */
+#define RER_RFFE 0x00000020 /* Recieve FIFO Full Event */
+#define RER_RDRE 0x00000010 /* Recieve Data Ready Event */
+#define RER_RSEE 0x00000008 /* Recieve Sync Error Event */
+#define RER_ROE 0x00000004 /* Recieve Overrun Event */
+
+/* TDMTER Transmit Event Register */
+#define TER_TCEU 0x00000100 /* Transmit Channel Enable Update */
+#define TER_TLCE 0x00000080 /* Transmit Last Channel Event */
+#define TER_TFSE 0x00000040 /* Transmit Frame Sync Event */
+#define TER_TFEE 0x00000020 /* Transmit FIFO Full Event */
+#define TER_TDRE 0x00000010 /* Transmit Data Ready Event */
+#define TER_TSEE 0x00000008 /* Transmit Sync Error Event */
+#define TER_TUE 0x00000004 /* Transmit Overrun Event */
+
+/* TDMRSR Recieve Status Register */
+#define RSR_RFCNT 0x00000038 /* Recieve FIFO counter */
+#define RSSS_MASK 0x00000003 /* Recieve SYNC Status */
+#define RSR_RSSS_SHIFT 1
+#define RSR_RSSS(SSS) (((SSS) >> (RSR_RSSS_SHIFT)) & (RSR_RSSS_MASK))
+#define RSR_RENS 0x00000001 /* Recieve Enable Status */
+
+/* TDMTSR Transmit Status Register */
+#define TSR_TFCNT 0x00000038 /* Transmit FIFO counter */
+#define TSR_TSSS_MASK 0x00000003 /* Transmit SYNC Status */
+#define TSR_TSSS_SHIFT 1
+#define TSR_TSSS(SSS) (((SSS) >> (TSR_TSSS_SHIFT)) & TSR_TSSS_MASK)
+#define TSR_TENS 0x00000001 /* Transmit Enable Status */
+
+/* channel width */
+#define CHANNEL_SIZE_1BYTE 1 /* 1 byte channel 8-bit linear */
+#define CHANNEL_SIZE_2BYTE 2 /* 2 bytes */
+
+/* channel parameters */
+#define TDM_ENABLE_TIMEOUT 1000 /* time out for TDM rx, tx enable */
+#define NUM_OF_TDM_BUF 3 /* Number of tdm buffers for startlite
+ DMA */
+#define ALIGNED_2_BYTES 0x02 /* 2-bytes alignment */
+#define ALIGNED_4_BYTES 0x04 /* 4-bytes alignment */
+#define ALIGNED_8_BYTES 0x08 /* 8-bytes alignment */
+#define ALIGNED_16_BYTES 0x10 /* 16-bytes alignment */
+#define ALIGNED_32_BYTES 0x20 /* 32-bytes alignment */
+#define ALIGNED_64_BYTES 0x40 /* 64-bytes alignment */
+
+/* Extend a given size to make it alignable */
+static inline int ALIGNABLE_SIZE(u32 size, u32 alignment)
+{
+ return size + alignment - 1;
+}
+
+/* Align a given address */
+static inline void *ALIGN_ADDRESS(void *address, u32 alignment)
+{
+ return (void *)(((u32) address + alignment - 1) & (~(alignment - 1)));
+}
+
+/* Size of the buffer */
+static inline int TDM_1BUF_SIZE(u32 num_ch, u32 channel_size, u32 frame_size)
+{
+ return frame_size *
+ ALIGN_SIZE(channel_size * num_ch, ALIGNED_8_BYTES);
+}
+
+/* Alignable size of the 3 buffers */
+static inline int TDM_BUF_SIZE(u32 num_ch, u32 channel_size, u32 frame_size)
+{
+ return
+ ALIGNABLE_SIZE((TDM_1BUF_SIZE(num_ch, channel_size, frame_size) *
+ NUM_OF_TDM_BUF), ALIGNED_8_BYTES);
+}
+
+
+struct tdm_priv {
+ struct tdm_regs __iomem *tdm_regs;
+ struct tdm_data __iomem *data_regs;
+ struct dmac_regs __iomem *dmac_regs;
+ struct tdm_clock __iomem *clk_regs;
+ u32 ptdm_base;
+ u8 *tdm_input_data;
+ u8 *tdm_output_data;
+ dma_addr_t dma_input_paddr; /* dma mapped buffer for TDM Rx */
+ dma_addr_t dma_output_paddr; /* dma mapped buffer for TDM Tx */
+ void *dma_input_vaddr;
+ void *dma_output_vaddr;
+ u32 phase_rx;
+ u32 phase_tx;
+ struct tcd *dma_rx_tcd[NUM_OF_TDM_BUF];
+ struct tcd *dma_tx_tcd[NUM_OF_TDM_BUF];
+ dma_addr_t dma_rx_tcd_paddr;
+ dma_addr_t dma_tx_tcd_paddr;
+ void *dma_rx_tcd_vaddr;
+ void *dma_tx_tcd_vaddr;
+ u32 tdm_buffer_size;
+ u32 tdm_err_intr;
+ u32 dmac_err_intr;
+ u32 dmac_done_intr;
+ int tdm_active;
+ struct device *device;
+ spinlock_t tdmlock;
+ struct tdm_adapter *adap;
+};
+
+#endif
--
1.6.5.6
^ permalink raw reply related
* [PATCH][2/3][RFC] TDM Framework
From: Poonam Aggrwal @ 2012-03-10 12:57 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Sandeep Singh, Poonam Aggrwal
From: Sandeep Singh <Sandeep@freescale.com>
TDM Framework is an attempt to provide a platform independent layer which
can offer a standard interface for TDM access to different client modules.
Beneath, the framework layer can house different types of TDM drivers to handle
various TDM devices, the hardware intricacies of the devices being completely
taken care by TDM drivers.
This framework layer will allow any type of TDM device to hook with it.
For example Freescale controller as on MPC8315, UCC based TDM controller, or
any other controller.
The main functions of this Framework are:
- provides interface to TDM clients to access TDM functionalities.
- provides standard interface for TDM drivers to hook with the framework.
- handles various data handling stuff and buffer management.
In future this Framework will be extended to provide Interface for Line control
devices also. For example SLIC, E1/T1 Framers etc.
Limitations/Future Work
---------------------------
1. Presently the framework supports only Single Port channelised mode.
2. Also the configurability options are limited which will be extended later on.
3. Only kernel mode TDM clients are supported currently. Support for User mode
clients will be added later.
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
A couple of todos' are left in the patch, we are working on it and will be
addressed in the updated patch set.
drivers/Kconfig | 1 +
drivers/Makefile | 1 +
drivers/tdm/Kconfig | 25 +
drivers/tdm/tdm-core.c | 1146 +++++++++++++++++++++++++++++++++++++++
include/linux/mod_devicetable.h | 11 +
include/linux/tdm.h | 347 ++++++++++++
6 files changed, 1531 insertions(+), 0 deletions(-)
create mode 100644 drivers/tdm/Kconfig
create mode 100644 drivers/tdm/tdm-core.c
create mode 100644 include/linux/tdm.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index ad6c1eb..25f7f5b 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -130,4 +130,5 @@ source "drivers/virt/Kconfig"
source "drivers/net/dpa/NetCommSw/Kconfig"
+source "drivers/tdm/Kconfig"
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index cd546eb..362b5ed 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -102,6 +102,7 @@ obj-$(CONFIG_INFINIBAND) += infiniband/
obj-$(CONFIG_SGI_SN) += sn/
obj-y += firmware/
obj-$(CONFIG_CRYPTO) += crypto/
+obj-$(CONFIG_TDM) += tdm/
obj-$(CONFIG_SUPERH) += sh/
obj-$(CONFIG_ARCH_SHMOBILE) += sh/
ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
diff --git a/drivers/tdm/Kconfig b/drivers/tdm/Kconfig
new file mode 100644
index 0000000..8db2b05
--- /dev/null
+++ b/drivers/tdm/Kconfig
@@ -0,0 +1,25 @@
+#
+# TDM subsystem configuration
+#
+
+menuconfig TDM
+ tristate "TDM support"
+ ---help---
+ More information is contained in the directory <file:Documentation/tdm/>,
+ especially in the file called "summary" there.
+ If you want TDM support, you should say Y here and also to the
+ specific driver for your bus adapter(s) below.
+
+ This TDM support can also be built as a module. If so, the module
+ will be called tdm-core.
+
+if TDM
+
+config TDM_DEBUG_CORE
+ bool "TDM Core debugging messages"
+ help
+ Say Y here if you want the TDM core to produce a bunch of debug
+ messages to the system log. Select this if you are having a
+ problem with TDM support and want to see more of what is going on.
+
+endif # TDM
diff --git a/drivers/tdm/tdm-core.c b/drivers/tdm/tdm-core.c
new file mode 100644
index 0000000..cdda260
--- /dev/null
+++ b/drivers/tdm/tdm-core.c
@@ -0,0 +1,1146 @@
+/* driver/tdm/tdm-core.c
+ *
+ * Copyright (C) 2012 Freescale Semiconductor, Inc, All rights reserved.
+ *
+ * TDM core is the interface between TDM clients and TDM devices.
+ * It is also intended to serve as an interface for line controld
+ * devices later on.
+ *
+ * Author:Hemant Agrawal <hemant@freescale.com>
+ * Rajesh Gumasta <rajesh.gumasta@freescale.com>
+ *
+ * Modified by Sandeep Kr Singh <sandeep@freescale.com>
+ * Poonam Aggarwal <poonam.aggarwal@freescale.com>
+ * 1. Added framework based initialization of device.
+ * 2. All the init/run time configuration is now done by framework.
+ * 3. Added channel level operations.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* if read write debug required */
+#undef TDM_CORE_DEBUG
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/tdm.h>
+#include <linux/init.h>
+#include <linux/idr.h>
+#include <linux/mutex.h>
+#include <linux/completion.h>
+#include <linux/hardirq.h>
+#include <linux/irqflags.h>
+#include <linux/list.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include "device/tdm_fsl.h"
+
+
+static DEFINE_MUTEX(tdm_core_lock);
+static DEFINE_IDR(tdm_adapter_idr);
+/* List of TDM adapters registered with TDM framework */
+LIST_HEAD(adapter_list);
+
+/* List of TDM clients registered with TDM framework */
+LIST_HEAD(driver_list);
+
+/* In case the previous data is not fetched by the client driver, the
+ * de-interleaving function will discard the old data and rewrite the
+ * new data */
+static int use_latest_tdm_data = 1;
+
+/* this tasklet is created for each adapter instance */
+static void tdm_data_tasklet_fn(unsigned long);
+
+/* tries to match client driver with the adapter */
+static int tdm_device_match(struct tdm_driver *driver, struct tdm_adapter *adap)
+{
+ /* match on an id table if there is one */
+ if (driver->id_table && driver->id_table->name[0]) {
+ if (!(strcmp(driver->id_table->name, adap->name)))
+ return (int)driver->id_table;
+ }
+ return TDM_E_OK;
+}
+
+static int tdm_attach_driver_adap(struct tdm_driver *driver,
+ struct tdm_adapter *adap)
+{
+ /* if driver is already attached to any other adapter, return*/
+ if (driver->adapter && (driver->adapter != adap))
+ return TDM_E_OK;
+
+ driver->adapter = adap;
+
+ if (driver->attach_adapter) {
+ if (driver->attach_adapter(adap) < 0)
+ /* We ignore the return code; if it fails, too bad */
+ pr_err("attach_adapter failed for driver [%s]\n",
+ driver->name);
+ }
+ adap->drv_count++;
+
+ if (!adap->tasklet_conf) {
+ tasklet_init(&adap->tdm_data_tasklet, tdm_data_tasklet_fn,
+ (unsigned long)adap);
+ adap->tasklet_conf = 1;
+ }
+
+ return TDM_E_OK;
+}
+
+/* Detach client driver and adapter */
+static int tdm_detach_driver_adap(struct tdm_driver *driver,
+ struct tdm_adapter *adap)
+{
+ int res = TDM_E_OK;
+
+ if (!driver->adapter || (driver->adapter != adap))
+ return TDM_E_OK;
+
+ if (!driver->detach_adapter)
+ return TDM_E_OK;
+
+ adap->drv_count--;
+
+ /* If no more driver is registed with the adapter*/
+ if (!adap->drv_count && adap->tasklet_conf) {
+ tasklet_disable(&adap->tdm_data_tasklet);
+ tasklet_kill(&adap->tdm_data_tasklet);
+ adap->tasklet_conf = 0;
+ }
+
+ if (driver->detach_adapter) {
+ if (driver->detach_adapter(adap))
+ pr_err("detach_adapter failed for driver [%s]\n",
+ driver->name);
+ }
+
+ driver->adapter = NULL;
+ return res;
+}
+
+/* TDM adapter Registration/De-registration with TDM framework */
+
+static int tdm_register_adapter(struct tdm_adapter *adap)
+{
+ int res = TDM_E_OK;
+ struct tdm_driver *driver, *next;
+
+ if (!adap) {
+ pr_err("%s:Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ mutex_init(&adap->adap_lock);
+ INIT_LIST_HEAD(&adap->myports);
+ spin_lock_init(&adap->portlist_lock);
+
+ adap->drv_count = 0;
+ adap->tasklet_conf = 0;
+
+ list_add_tail(&adap->list, &adapter_list);
+
+ /* initialization of driver by framework in default configuration */
+ init_config_adapter(adap);
+
+ /* Notify drivers */
+ pr_info("adapter [%s] registered\n", adap->name);
+ mutex_lock(&tdm_core_lock);
+ list_for_each_entry_safe(driver, next, &driver_list, list) {
+ if (tdm_device_match(driver, adap)) {
+ res = tdm_attach_driver_adap(driver, adap);
+ pr_info(
+ "Driver(ID=%d) is attached with Adapter %s(ID = %d)\n",
+ driver->id, adap->name, adap->id);
+ }
+ }
+ mutex_unlock(&tdm_core_lock);
+
+ return res;
+}
+
+/*
+ * tdm_add_adapter - declare tdm adapter, use dynamic device number
+ * @adapter: the adapter to add
+ * Context: can sleep
+ *
+ * This routine is used to declare a TDM adapter
+ * When this returns zero, a new device number will be allocated and stored
+ * in adap->id, and the specified adapter became available for the clients.
+ * Otherwise, a negative errno value is returned.
+ */
+int tdm_add_adapter(struct tdm_adapter *adapter)
+{
+ int id, res = TDM_E_OK;
+ if (!adapter) {
+ pr_err("%s:Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+retry:
+ if (idr_pre_get(&tdm_adapter_idr, GFP_KERNEL) == 0)
+ return -ENOMEM;
+
+ mutex_lock(&tdm_core_lock);
+ res = idr_get_new(&tdm_adapter_idr, adapter, &id);
+ mutex_unlock(&tdm_core_lock);
+
+ if (res < 0) {
+ if (res == -EAGAIN)
+ goto retry;
+ return res;
+ }
+
+ adapter->id = id;
+ return tdm_register_adapter(adapter);
+}
+EXPORT_SYMBOL(tdm_add_adapter);
+
+
+/**
+ * tdm_del_adapter - unregister TDM adapter
+ * @adap: the adapter being unregistered
+ *
+ * This unregisters an TDM adapter which was previously registered
+ * by @tdm_add_adapter.
+ */
+int tdm_del_adapter(struct tdm_adapter *adap)
+{
+ int res = TDM_E_OK;
+ struct tdm_adapter *found;
+ struct tdm_driver *driver, *next;
+
+ if (!adap) {
+ pr_err("%s:Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ /* First make sure that this adapter was ever added */
+ mutex_lock(&tdm_core_lock);
+ found = idr_find(&tdm_adapter_idr, adap->id);
+ mutex_unlock(&tdm_core_lock);
+ if (found != adap) {
+ pr_err("tdm-core: attempting to delete unregistered "
+ "adapter [%s]\n", adap->name);
+ return -EINVAL;
+ }
+
+ /*disable and kill the data processing tasklet */
+ if (adap->tasklet_conf) {
+ tasklet_disable(&adap->tdm_data_tasklet);
+ tasklet_kill(&adap->tdm_data_tasklet);
+ adap->tasklet_conf = 0;
+ }
+
+ /* Detach any active ports. This can't fail, thus we do not
+ checking the returned value. */
+ mutex_lock(&tdm_core_lock);
+ list_for_each_entry_safe(driver, next, &driver_list, list) {
+ if (tdm_device_match(driver, adap)) {
+ tdm_detach_driver_adap(driver, adap);
+ pr_info(
+ "Driver(ID=%d) is detached from Adapter %s(ID = %d)\n",
+ driver->id, adap->name, adap->id);
+ }
+ }
+ mutex_unlock(&tdm_core_lock);
+
+ mutex_lock(&tdm_core_lock);
+ idr_remove(&tdm_adapter_idr, adap->id);
+ mutex_unlock(&tdm_core_lock);
+
+ pr_debug("adapter [%s] unregistered\n", adap->name);
+
+ list_del(&adap->list);
+ /* Clear the device structure in case this adapter is ever going to be
+ added again */
+ adap->parent = NULL;
+
+ return res;
+}
+EXPORT_SYMBOL(tdm_del_adapter);
+
+/* TDM Client Drivers Registration/De-registration Functions */
+int tdm_register_driver(struct tdm_driver *driver)
+{
+ int res = TDM_E_OK;
+ struct tdm_adapter *adap, *next;
+
+ list_add_tail(&driver->list, &driver_list);
+
+ mutex_lock(&tdm_core_lock);
+ /* Walk the adapters that are already present */
+ list_for_each_entry_safe(adap, next, &adapter_list, list) {
+ if (tdm_device_match(driver, adap)) {
+ res = tdm_attach_driver_adap(driver, adap);
+ pr_info("TDM Driver(ID=%d)is attached with Adapter"
+ "%s(ID = %d) drv_count=%d", driver->id,
+ adap->name, adap->id, adap->drv_count);
+ break;
+ }
+ }
+ mutex_unlock(&tdm_core_lock);
+
+ return res;
+}
+EXPORT_SYMBOL(tdm_register_driver);
+
+/*
+ * tdm_unregister_driver - unregister TDM client driver from TDM framework
+ * @driver: the driver being unregistered
+ */
+void tdm_unregister_driver(struct tdm_driver *driver)
+{
+ if (!driver) {
+ pr_err("%s:Invalid handle\n", __func__);
+ return;
+ }
+ /* A driver can register to only one adapter,
+ * so no need to browse the list */
+ mutex_lock(&tdm_core_lock);
+ tdm_detach_driver_adap(driver, driver->adapter);
+ mutex_unlock(&tdm_core_lock);
+
+ list_del(&driver->list);
+
+ pr_debug("tdm-core: driver [%s] unregistered\n", driver->name);
+}
+EXPORT_SYMBOL(tdm_unregister_driver);
+
+/* TDM Framework init and exit */
+static int __init tdm_init(void)
+{
+ pr_info("%s\n", __func__);
+ return TDM_E_OK;
+}
+
+static void __exit tdm_exit(void)
+{
+ pr_info("%s\n", __func__);
+ return;
+}
+
+/* We must initialize early, because some subsystems register tdm drivers
+ * in subsys_initcall() code, but are linked (and initialized) before tdm.
+ */
+postcore_initcall(tdm_init);
+module_exit(tdm_exit);
+
+
+/* Interface to the tdm device/adapter */
+
+/* tdm_adap_send - issue a TDM write
+ * @adap: Handle to TDM device
+ * @buf: Data that will be written to the TDM device
+ * @count: How many bytes to write
+ *
+ * Returns negative errno, or else the number of bytes written.
+ */
+int tdm_adap_send(struct tdm_adapter *adap, void **buf, int count)
+{
+ int res;
+
+ if ((adap == NULL) || (buf == NULL)) { /* invalid handle*/
+ pr_err("%s: Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+
+ if (adap->algo->tdm_write)
+ res = adap->algo->tdm_write(adap, buf, count);
+ else {
+ pr_err("TDM level write not supported\n");
+ return -EOPNOTSUPP;
+ }
+
+ /* If everything went ok (i.e. frame transmitted), return #bytes
+ transmitted, else error code. */
+ return (res == 1) ? count : res;
+}
+EXPORT_SYMBOL(tdm_adap_send);
+
+/**
+ * tdm_adap_recv - issue a TDM read
+ * @adap: Handle to TDM device
+ * @buf: Where to store data read from TDM device
+ *
+ * Returns negative errno, or else the number of bytes read.
+ */
+int tdm_adap_recv(struct tdm_adapter *adap, void **buf)
+{
+ int res;
+
+ if (adap->algo->tdm_read)
+ res = adap->algo->tdm_read(adap, (u16 **)buf);
+ else {
+ pr_err("TDM level read not supported\n");
+ return -EOPNOTSUPP;
+ }
+ /* If everything went ok (i.e. frame received), return #bytes
+ transmitted, else error code. */
+ return res;
+}
+
+/**
+ * tdm_adap_get_write_buf - get next write TDM device buffer
+ * @adap: Handle to TDM device
+ * @buf: pointer to TDM device buffer
+ *
+ * Returns negative errno, or else size of the write buffer.
+ */
+int tdm_adap_get_write_buf(struct tdm_adapter *adap, void **buf)
+{
+ int res;
+
+ if (adap->algo->tdm_get_write_buf) {
+ res = adap->algo->tdm_get_write_buf(adap, (u16 **)buf);
+ } else {
+ pr_err("TDM level write buf get not supported\n");
+ return -EOPNOTSUPP;
+ }
+ /* If everything went ok (i.e. 1 msg received), return #bytes
+ transmitted, else error code. */
+ return res;
+}
+EXPORT_SYMBOL(tdm_adap_get_write_buf);
+
+int tdm_adap_enable(struct tdm_driver *drv)
+{
+ int res;
+ struct tdm_adapter *adap;
+ if (drv == NULL) { /* invalid handle*/
+ pr_err("%s: Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+ adap = drv->adapter;
+
+ if (adap->algo->tdm_enable) {
+ res = adap->algo->tdm_enable(adap);
+ } else {
+ pr_err("TDM level enable not supported\n");
+ return -EOPNOTSUPP;
+ }
+ return res;
+}
+EXPORT_SYMBOL(tdm_adap_enable);
+
+int tdm_adap_disable(struct tdm_driver *drv)
+{
+ int res;
+ struct tdm_adapter *adap;
+ if (drv == NULL) { /* invalid handle*/
+ pr_err("%s: Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+ adap = drv->adapter;
+
+ if (adap->algo->tdm_disable) {
+ res = adap->algo->tdm_disable(adap);
+ } else {
+ pr_err("TDM level enable not supported\n");
+ return -EOPNOTSUPP;
+ }
+ return res;
+}
+EXPORT_SYMBOL(tdm_adap_disable);
+
+struct tdm_adapter *tdm_get_adapter(int id)
+{
+ struct tdm_adapter *adapter;
+
+ mutex_lock(&tdm_core_lock);
+ adapter = idr_find(&tdm_adapter_idr, id);
+ if (adapter && !try_module_get(adapter->owner))
+ adapter = NULL;
+
+ mutex_unlock(&tdm_core_lock);
+
+ return adapter;
+}
+EXPORT_SYMBOL(tdm_get_adapter);
+
+void tdm_put_adapter(struct tdm_adapter *adap)
+{
+ module_put(adap->owner);
+}
+EXPORT_SYMBOL(tdm_put_adapter);
+
+
+/* Port Level APIs of TDM Framework */
+unsigned int tdm_port_open(struct tdm_driver *driver, void **h_port)
+{
+ struct tdm_port *port;
+ struct tdm_adapter *adap;
+ unsigned long flags;
+ int res = TDM_E_OK;
+
+ if (driver == NULL) {
+ pr_err("driver NULL\n");
+ return -ENODEV;
+ }
+ if (driver->adapter == NULL) {
+ pr_err("adapter NULL\n");
+ return -ENODEV;
+ }
+
+ adap = tdm_get_adapter(driver->adapter->id);
+ if (!adap)
+ return -ENODEV;
+
+ /* This creates an anonymous tdm_port, which may later be
+ * pointed to some slot.
+ *
+ */
+ port = kzalloc(sizeof(*port), GFP_KERNEL);
+ if (!port) {
+ res = -ENOMEM;
+ goto out;
+ }
+
+ init_waitqueue_head(&port->ch_wait_queue);
+
+
+ port->rx_max_frames = NUM_SAMPLES_PER_FRAME;
+ port->port_cfg.port_mode = e_TDM_PORT_CHANNELIZED;
+
+ port->in_use = 1;
+
+ snprintf(driver->name, TDM_NAME_SIZE, "tdm-dev");
+ port->driver = driver;
+ port->adapter = adap;
+
+ spin_lock_irqsave(&adap->portlist_lock, flags);
+ list_add_tail(&port->list, &adap->myports);
+ spin_unlock_irqrestore(&adap->portlist_lock, flags);
+
+ INIT_LIST_HEAD(&port->mychannels);
+
+ *h_port = port;
+
+out:
+ return res;
+}
+EXPORT_SYMBOL(tdm_port_open);
+
+unsigned int tdm_port_close(void *h_port)
+{
+ struct tdm_adapter *adap;
+ struct tdm_driver *driver;
+ struct tdm_port *port;
+ struct tdm_channel *temp, *channel;
+ unsigned long flags;
+ int res = TDM_E_OK;
+ port = (struct tdm_port *)h_port;
+
+ if (port == NULL) { /* invalid handle*/
+ pr_err("Invalid Handle");
+ return -ENXIO;
+ }
+
+ driver = port->driver;
+
+ if (driver == NULL) {
+ pr_err("driver NULL\n");
+ res = -ENODEV;
+ goto out;
+ }
+ if (driver->adapter == NULL) {
+ pr_err("adapter NULL\n");
+ res = -ENODEV;
+ goto out;
+ }
+
+ list_for_each_entry_safe(channel, temp, &port->mychannels, list) {
+ if (channel)
+ if (channel->in_use) {
+ pr_err("%s: Cannot close port. Channel in use\n",
+ __func__);
+ res = -ENXIO;
+ goto out;
+ }
+ }
+ adap = driver->adapter;
+
+ spin_lock_irqsave(&adap->portlist_lock, flags);
+ list_del(&port->list);
+ spin_unlock_irqrestore(&adap->portlist_lock, flags);
+
+ if (port->p_port_data != NULL) {
+ int i;
+ struct tdm_bd *ch_bd;
+
+ /* If the tdm is in channelised mode,
+ de-allocate the channelised buffer */
+ ch_bd = &(port->p_port_data->rx_data_fifo[0]);
+ for (i = 0; ch_bd && i < TDM_CH_RX_BD_RING_SIZE; i++) {
+ ch_bd->flag = 0;
+ ch_bd++;
+ }
+ ch_bd = &(port->p_port_data->tx_data_fifo[0]);
+ for (i = 0; ch_bd && i < TDM_CH_TX_BD_RING_SIZE; i++) {
+ ch_bd->flag = 0;
+ ch_bd++;
+ }
+ kfree(port->p_port_data);
+ }
+ kfree(port);
+ return res;
+out:
+ if (port)
+ kfree(port->p_port_data);
+ kfree(port);
+ return res;
+}
+EXPORT_SYMBOL(tdm_port_close);
+
+unsigned int tdm_channel_read(void *h_port, void *h_channel,
+ void *p_data, u16 *size)
+{
+ struct tdm_port *port;
+ struct tdm_channel *channel;
+ struct tdm_bd *rx_bd;
+ unsigned long flags;
+ int i, res = TDM_E_OK;
+ unsigned short *buf, *buf1;
+ port = (struct tdm_port *)h_port;
+ channel = (struct tdm_channel *)h_channel;
+
+ if ((port && channel) == 0) { /* invalid handle*/
+ pr_err("%s:Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+
+ if (!port->in_use)
+ return -EIO;
+ if (!channel->p_ch_data || !channel->in_use)
+ return -EIO;
+
+ spin_lock_irqsave(&channel->p_ch_data->rx_channel_lock, flags);
+ rx_bd = channel->p_ch_data->rx_out_data;
+
+ if (rx_bd->flag) {
+ *size = rx_bd->length;
+ buf = (u16 *) p_data;
+ buf1 = (u16 *)rx_bd->p_data;
+ for (i = 0; i < NUM_SAMPLES_PER_FRAME; i++)
+ buf[i] = buf1[i];
+ rx_bd->flag = 0;
+ rx_bd->offset = 0;
+ channel->p_ch_data->rx_out_data = (rx_bd->wrap) ?
+ channel->p_ch_data->rx_data_fifo : rx_bd + 1;
+
+ } else {
+ spin_unlock_irqrestore(&channel->p_ch_data->rx_channel_lock,
+ flags);
+ pr_info("No Data Available");
+ return -EAGAIN;
+ }
+ spin_unlock_irqrestore(&channel->p_ch_data->rx_channel_lock, flags);
+
+ return res;
+}
+EXPORT_SYMBOL(tdm_channel_read);
+
+
+unsigned int tdm_channel_write(void *h_port, void *h_channel,
+ void *p_data, u16 size)
+{
+ struct tdm_port *port;
+ struct tdm_channel *channel;
+ struct tdm_bd *tx_bd;
+ unsigned long flags;
+ int err = TDM_E_OK;
+ port = (struct tdm_port *)h_port;
+ channel = (struct tdm_channel *)h_channel;
+#ifdef TDM_CORE_DEBUG
+ bool data_flag = 0;
+#endif
+
+ if ((port && channel) == 0) { /* invalid handle*/
+ pr_err("Invalid Handle");
+ return -ENXIO;
+ }
+
+ if (p_data == NULL) { /* invalid data*/
+ pr_err("Invalid Data");
+ return -EFAULT;
+ }
+
+ if (!port->in_use)
+ return -EIO;
+ if (!channel->p_ch_data || !channel->in_use)
+ return -EIO;
+
+ spin_lock_irqsave(&channel->p_ch_data->tx_channel_lock, flags);
+ tx_bd = channel->p_ch_data->tx_in_data;
+
+ if (!tx_bd->flag) {
+ tx_bd->length = size;
+ memcpy(tx_bd->p_data, p_data,
+ size * port->adapter->adapt_cfg.slot_width);
+ tx_bd->flag = 1;
+ tx_bd->offset = 0;
+ channel->p_ch_data->tx_in_data = (tx_bd->wrap) ?
+ channel->p_ch_data->tx_data_fifo : tx_bd+1;
+ port->port_stat.tx_pkt_count++;
+#ifdef TDM_CORE_DEBUG
+ data_flag = 1;
+#endif
+ } else {
+ spin_unlock_irqrestore(&channel->p_ch_data->tx_channel_lock,
+ flags);
+ port->port_stat.tx_pkt_drop_count++;
+ pr_err("E_NO_MEMORY -Failed Transmit");
+ return -ENOMEM;
+ }
+ spin_unlock_irqrestore(&channel->p_ch_data->tx_channel_lock, flags);
+
+#ifdef TDM_CORE_DEBUG
+ if (data_flag) {
+ int k;
+ pr_info("\nTX port:%d - Write - Port TX-%d\n",
+ port->port_id, size);
+ for (k = 0; k < size; k++)
+ pr_info("%x", p_data[k]);
+ pr_info("\n");
+ }
+#endif
+ return err;
+}
+EXPORT_SYMBOL(tdm_channel_write);
+
+wait_queue_head_t *tdm_port_get_wait_queue(void *h_port)
+{
+ struct tdm_port *port;
+ port = (struct tdm_port *)h_port;
+
+ if (port == NULL) { /* invalid handle*/
+ pr_err("Invalid Handle");
+ return NULL;
+ }
+
+ return &port->ch_wait_queue;
+
+}
+EXPORT_SYMBOL(tdm_port_get_wait_queue);
+
+/* Driver Function for select and poll. Based on Port no, it sleeps on
+ * waitqueue */
+unsigned int tdm_port_poll(void *h_port, unsigned int wait_time)
+{
+ struct tdm_port *port;
+ unsigned long timeout = msecs_to_jiffies(wait_time);
+ port = (struct tdm_port *)h_port;
+
+ if (port == NULL) { /* invalid handle*/
+ pr_err("%s: Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+ if (!port->p_port_data || !port->in_use)
+ return -EIO;
+
+ if (port->p_port_data->rx_out_data->flag) {
+ pr_debug("Data Available");
+ return TDM_E_OK;
+ }
+ if (timeout) {
+ wait_event_interruptible_timeout(port->ch_wait_queue,
+ port->p_port_data->rx_out_data->flag,
+ timeout);
+
+ if (port->p_port_data->rx_out_data->flag) {
+ pr_debug("Data Available");
+ return TDM_E_OK;
+ }
+ }
+ return -EAGAIN;
+}
+EXPORT_SYMBOL(tdm_port_poll);
+
+unsigned int tdm_port_get_stats(void *h_port, struct tdm_port_stats *portStat)
+{
+ struct tdm_port *port;
+ int port_num;
+ port = (struct tdm_port *)h_port;
+
+ if (port == NULL || portStat == NULL) { /* invalid handle*/
+ pr_err("Invalid Handle");
+ return -ENXIO;
+ }
+ port_num = port->port_id;
+
+ memcpy(portStat, &port->port_stat, sizeof(struct tdm_port_stats));
+
+ pr_info("TDM Port %d Get Stats", port_num);
+
+ return TDM_E_OK;
+}
+EXPORT_SYMBOL(tdm_port_get_stats);
+
+/* Data handling functions */
+
+static int tdm_data_rx_deinterleave(struct tdm_adapter *adap)
+{
+ struct tdm_port *port, *next;
+ struct tdm_channel *channel, *temp;
+ struct tdm_bd *ch_bd;
+
+ int i, buf_size, ch_data_len;
+ u16 *input_tdm_buffer;
+ u16 *pcm_buffer;
+ int slot_width;
+ int frame_ch_data_size;
+ bool ch_data;
+ int bytes_in_fifo_per_frame;
+ int bytes_slot_offset;
+
+ ch_data_len = NUM_SAMPLES_PER_FRAME;
+ frame_ch_data_size = NUM_SAMPLES_PER_FRAME;
+ ch_data = 0;
+
+ if (!adap) { /* invalid handle*/
+ pr_err("%s: Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+
+ slot_width = adap->adapt_cfg.slot_width;
+ buf_size = tdm_adap_recv(adap, (void **)&input_tdm_buffer);
+ if (buf_size <= 0 || !input_tdm_buffer)
+ return -EINVAL;
+
+ bytes_in_fifo_per_frame = buf_size/frame_ch_data_size;
+ bytes_slot_offset = bytes_in_fifo_per_frame/slot_width;
+
+ /* de-interleaving for all ports*/
+ list_for_each_entry_safe(port, next, &adap->myports, list) {
+
+ /* if the port is not open */
+ if (!port->in_use)
+ continue;
+
+ list_for_each_entry_safe(channel, temp, &port->mychannels,
+ list) {
+ /* if the channel is not open */
+ if (!channel->in_use || !channel->p_ch_data)
+ continue;
+ ch_bd = channel->p_ch_data->rx_in_data;
+ spin_lock(&channel->p_ch_data->rx_channel_lock);
+ /*if old data is to be discarded */
+ if (use_latest_tdm_data)
+ if (ch_bd->flag) {
+ ch_bd->flag = 0;
+ ch_bd->offset = 0;
+ if (ch_bd == channel->p_ch_data->rx_out_data)
+ channel->p_ch_data->rx_out_data =
+ ch_bd->wrap ?
+ channel->p_ch_data->rx_data_fifo
+ : ch_bd+1;
+ port->port_stat.rx_pkt_drop_count++;
+ }
+ /* if the bd is empty */
+ if (!ch_bd->flag) {
+ if (ch_bd->offset == 0)
+ ch_bd->length = port->rx_max_frames;
+
+ pcm_buffer = ch_bd->p_data + ch_bd->offset;
+ /* De-interleaving the data */
+ for (i = 0; i < ch_data_len; i++) {
+ pcm_buffer[i]
+ = input_tdm_buffer[i*bytes_slot_offset +
+ channel->ch_id];
+ }
+ ch_bd->offset += ch_data_len * slot_width;
+
+ if (ch_bd->offset >=
+ (ch_bd->length - frame_ch_data_size)*
+ (adap->adapt_cfg.slot_width)) {
+ ch_bd->flag = 1;
+ ch_bd->offset = 0;
+ channel->p_ch_data->rx_in_data =
+ ch_bd->wrap ?
+ channel->p_ch_data->rx_data_fifo
+ : ch_bd+1;
+ ch_data = 1;
+ }
+ } else {
+ port->port_stat.rx_pkt_drop_count++;
+ }
+ spin_unlock(&channel->p_ch_data->rx_channel_lock);
+ }
+
+ if (ch_data) {
+ /* Wake up the Port Data Poll event */
+ wake_up_interruptible(&port->ch_wait_queue);
+#ifdef TDM_CORE_DEBUG
+ pr_info("Port RX-%d-%d\n", channel->ch_id, ch_data_len);
+ for (i = 0; i < ch_data_len; i++)
+ pr_info("%x", pcm_buffer[i]);
+ pr_info("\n");
+#endif
+ port->port_stat.rx_pkt_count++;
+ ch_data = 0;
+ }
+ }
+ return TDM_E_OK;
+}
+
+static int tdm_data_tx_interleave(struct tdm_adapter *adap)
+{
+ struct tdm_port *port, *next;
+ struct tdm_channel *channel, *temp;
+ struct tdm_bd *ch_bd;
+ int i, buf_size, ch_data_len = NUM_SAMPLES_PER_FRAME;
+ bool last_data = 0;
+ u16 *output_tdm_buffer;
+ u16 *pcm_buffer;
+ int frame_ch_data_size = NUM_SAMPLES_PER_FRAME;
+ int bytes_in_fifo_per_frame;
+ int bytes_slot_offset;
+
+#ifdef TDM_CORE_DEBUG
+ u8 data_flag = 0;
+#endif
+
+ if (adap == NULL) { /* invalid handle*/
+ pr_err("%s: Invalid Handle\n", __func__);
+ return -ENXIO;
+ }
+
+ buf_size = tdm_adap_get_write_buf(adap, (void **)&output_tdm_buffer);
+ if (buf_size <= 0 || !output_tdm_buffer)
+ return -EINVAL;
+
+ bytes_in_fifo_per_frame = buf_size/frame_ch_data_size;
+ bytes_slot_offset = bytes_in_fifo_per_frame/adap->adapt_cfg.slot_width;
+
+
+ memset(output_tdm_buffer, 0, sizeof(buf_size));
+
+ list_for_each_entry_safe(port, next, &adap->myports, list) {
+
+ /* check if the port is open */
+ if (!port->in_use)
+ continue;
+
+ list_for_each_entry_safe(channel, temp, &port->mychannels,
+ list) {
+ pr_debug("TX-Tdm %d (slots-)", channel->ch_id);
+
+
+ /* if the channel is open */
+ if (!channel->in_use || !channel->p_ch_data)
+ continue;
+
+ spin_lock(&channel->p_ch_data->tx_channel_lock);
+ if (!channel->in_use || !channel->p_ch_data)
+ continue;
+ ch_bd = channel->p_ch_data->tx_out_data;
+ if (ch_bd->flag) {
+ pcm_buffer = (u16 *)((uint8_t *)ch_bd->p_data +
+ ch_bd->offset);
+ /*if the buffer has less frames than required */
+ if (frame_ch_data_size >=
+ ((ch_bd->length) - (ch_bd->offset/
+ adap->adapt_cfg.slot_width))) {
+ ch_data_len =
+ (ch_bd->length) - (ch_bd->offset/
+ adap->adapt_cfg.slot_width);
+ last_data = 1;
+ } else {
+ ch_data_len = frame_ch_data_size;
+ }
+ /* Interleaving the data */
+ for (i = 0; i < ch_data_len; i++) {
+ /* TODO- need to be generic for any size
+ assignment*/
+ output_tdm_buffer[channel->ch_id +
+ bytes_slot_offset * i] =
+ pcm_buffer[i];
+ }
+ /* If all the data of this buffer is
+ transmitted */
+ if (last_data) {
+ ch_bd->flag = 0;
+ ch_bd->offset = 0;
+ channel->p_ch_data->tx_out_data =
+ ch_bd->wrap ?
+ channel->p_ch_data->tx_data_fifo
+ : ch_bd+1;
+ port->port_stat.tx_pkt_conf_count++;
+ } else {
+ ch_bd->offset += ch_data_len *
+ (adap->adapt_cfg.slot_width);
+ }
+#ifdef TDM_CORE_DEBUG
+ data_flag = 1;
+#endif
+ }
+ spin_unlock(&channel->p_ch_data->tx_channel_lock);
+ }
+ }
+
+#ifdef TDM_CORE_DEBUG
+ if (data_flag) {
+ pr_info("TX-TDM Interleaved Data-\n");
+ for (i = 0; i < 64; i++)
+ pr_info("%x", output_tdm_buffer[i]);
+ pr_info("\n");
+ }
+#endif
+ return TDM_E_OK;
+}
+
+/* Channel Level APIs of TDM Framework */
+int tdm_channel_open(u16 chanid, u16 ch_width, struct tdm_port *port,
+ void **h_channel)
+{
+ struct tdm_channel *channel, *temp;
+ unsigned long flags;
+ struct tdm_ch_data *p_ch_data;
+ int res = TDM_E_OK;
+
+ if (!(port && h_channel)) {
+ pr_err("%s: Invalid handle\n", __func__);
+ return -EINVAL;
+ }
+
+ if (ch_width != 1) {
+ pr_err("%s: Mode not supported\n", __func__);
+ return -EINVAL;
+ }
+
+ list_for_each_entry_safe(channel, temp, &port->mychannels, list) {
+ if (channel->ch_id == chanid) {
+ pr_err("%s: Channel %d already open\n",
+ __func__, chanid);
+ return -EINVAL;
+ }
+ }
+
+ channel = kzalloc(sizeof(*channel), GFP_KERNEL);
+ if (!channel) {
+ res = -ENOMEM;
+ goto out;
+ }
+
+ p_ch_data = kzalloc(sizeof(struct tdm_port_data), GFP_KERNEL);
+ if (!p_ch_data) {
+ res = -ENOMEM;
+ goto outdata;
+ }
+
+ p_ch_data->rx_data_fifo[TDM_CH_RX_BD_RING_SIZE-1].wrap = 1;
+ p_ch_data->tx_data_fifo[TDM_CH_TX_BD_RING_SIZE-1].wrap = 1;
+
+ p_ch_data->rx_in_data = p_ch_data->rx_data_fifo;
+ p_ch_data->rx_out_data = p_ch_data->rx_data_fifo;
+ p_ch_data->tx_in_data = p_ch_data->tx_data_fifo;
+ p_ch_data->tx_out_data = p_ch_data->tx_data_fifo;
+ spin_lock_init(&p_ch_data->rx_channel_lock);
+ spin_lock_init(&p_ch_data->tx_channel_lock);
+
+ channel->p_ch_data = p_ch_data;
+
+ channel->ch_id = chanid;
+ channel->ch_cfg.first_slot = chanid;
+ channel->ch_cfg.num_slots = 1; /* This is 1 for channelized mode and
+ configurable for other modes */
+ channel->port = port;
+ channel->in_use = 1;
+
+ spin_lock_irqsave(&port->ch_list_lock, flags);
+ list_add_tail(&channel->list, &port->mychannels);
+ spin_unlock_irqrestore(&port->ch_list_lock, flags);
+
+ *h_channel = channel;
+
+ return res;
+
+outdata:
+ kfree(channel);
+out:
+ return res;
+}
+EXPORT_SYMBOL(tdm_channel_open);
+
+int tdm_channel_close(u16 chanid, u16 ch_width, struct tdm_port *port,
+ struct tdm_channel *h_channel)
+{
+ struct tdm_channel *channel;
+ unsigned long flags;
+ int res = TDM_E_OK;
+ channel = h_channel;
+
+ if (!(port && channel)) {
+ pr_err("%s: Invalid handle\n", __func__);
+ res = -EINVAL;
+ goto out;
+ }
+
+ if (ch_width != 1) {
+ pr_err("%s: Mode not supported\n", __func__);
+ res = -EINVAL;
+ goto out;
+ }
+
+ spin_lock_irqsave(&port->ch_list_lock, flags);
+ list_del(&channel->list);
+ spin_unlock_irqrestore(&port->ch_list_lock, flags);
+
+out:
+ if (channel)
+ kfree(channel->p_ch_data);
+ kfree(channel);
+ return res;
+}
+EXPORT_SYMBOL(tdm_channel_close);
+
+void init_config_adapter(struct tdm_adapter *adap)
+{
+ struct fsl_tdm_adapt_cfg default_adapt_cfg = {
+ .loopback = e_TDM_PROCESS_NORMAL,
+ .num_ch = NUM_CHANNELS,
+ .ch_size_type = CHANNEL_16BIT_LIN,
+ .frame_len = NUM_SAMPLES_PER_FRAME,
+ .num_frames = NUM_SAMPLES_PER_FRAME,
+ .adap_mode = e_TDM_ADAPTER_MODE_NONE
+ };
+
+ default_adapt_cfg.slot_width = default_adapt_cfg.ch_size_type/3 + 1;
+
+ memcpy(&adap->adapt_cfg, &default_adapt_cfg,
+ sizeof(struct fsl_tdm_adapt_cfg));
+
+ return;
+}
+EXPORT_SYMBOL(init_config_adapter);
+
+static void tdm_data_tasklet_fn(unsigned long data)
+{
+ struct tdm_adapter *adapter;
+ adapter = (struct tdm_adapter *)data;
+ if (adapter != NULL) {
+ tdm_data_tx_interleave(adapter);
+ tdm_data_rx_deinterleave(adapter);
+ }
+}
+
+
+MODULE_AUTHOR("Hemant Agrawal <hemant@freescale.com> and "
+ "Rajesh Gumasta <rajesh.gumasta@freescale.com>");
+MODULE_DESCRIPTION("TDM Driver Framework Core");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index ae28e93..dc1a655 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -416,6 +416,17 @@ struct i2c_device_id {
__attribute__((aligned(sizeof(kernel_ulong_t))));
};
+/* tdm */
+
+#define TDM_NAME_SIZE 20
+#define TDM_MODULE_PREFIX "tdm:"
+
+struct tdm_device_id {
+ char name[TDM_NAME_SIZE];
+ kernel_ulong_t driver_data /* Data private to the driver */
+ __attribute__((aligned(sizeof(kernel_ulong_t))));
+};
+
/* spi */
#define SPI_NAME_SIZE 32
diff --git a/include/linux/tdm.h b/include/linux/tdm.h
new file mode 100644
index 0000000..8cf4ef5
--- /dev/null
+++ b/include/linux/tdm.h
@@ -0,0 +1,347 @@
+/* include/linux/tdm.h
+ *
+ * Copyright (C) 2012 Freescale Semiconductor, Inc, All rights reserved.
+ *
+ * tdm.h - definitions for the tdm-device framework interface
+ *
+ * Author:Hemant Agrawal <hemant@freescale.com>
+ * Rajesh Gumasta <rajesh.gumasta@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#ifndef _LINUX_TDM_H
+#define _LINUX_TDM_H
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/mod_devicetable.h>
+#include <linux/device.h> /* for struct device */
+#include <linux/sched.h> /* for completion */
+#include <linux/mutex.h>
+#include <linux/interrupt.h>
+
+#define CHANNEL_8BIT_LIN 0 /* 8 bit linear */
+#define CHANNEL_8BIT_ULAW 1 /* 8 bit Mu-law */
+#define CHANNEL_8BIT_ALAW 2 /* 8 bit A-law */
+#define CHANNEL_16BIT_LIN 3 /* 16 bit Linear */
+
+#define NUM_CHANNELS 16
+#define NUM_SAMPLES_PER_MS 8 /* 8 samples per milli sec per
+ channel. Req for voice data */
+#define NUM_MS 10
+#define NUM_SAMPLES_PER_FRAME (NUM_MS * NUM_SAMPLES_PER_MS) /* Number of
+ samples for 1 client buffer */
+#define NUM_OF_TDM_BUF 3
+
+/* General options */
+
+struct tdm_adapt_algorithm;
+struct tdm_adapter;
+struct tdm_port;
+struct tdm_driver;
+
+/* Align addr on a size boundary - adjust address up if needed */
+/* returns min value greater than size which is multiple of alignment */
+static inline int ALIGN_SIZE(u64 size, u32 alignment)
+{
+ return (size + alignment - 1) & (~(alignment - 1));
+}
+
+/**
+ * struct tdm_driver - represent an TDM device driver
+ * @class: What kind of tdm device we instantiate (for detect)
+ * @id:Driver id
+ * @name: Name of the driver
+ * @attach_adapter: Callback for device addition (for legacy drivers)
+ * @detach_adapter: Callback for device removal (for legacy drivers)
+ * @probe: Callback for device binding
+ * @remove: Callback for device unbinding
+ * @shutdown: Callback for device shutdown
+ * @suspend: Callback for device suspend
+ * @resume: Callback for device resume
+ * @command: Callback for sending commands to device
+ * @id_table: List of TDM devices supported by this driver
+ * @list: List of drivers created (for tdm-core use only)
+ */
+struct tdm_driver {
+ unsigned int class;
+ unsigned int id;
+ char name[TDM_NAME_SIZE];
+
+ int (*attach_adapter)(struct tdm_adapter *);
+ int (*detach_adapter)(struct tdm_adapter *);
+
+ /* Standard driver model interfaces */
+ int (*probe)(const struct tdm_device_id *);
+ int (*remove)(void);
+
+ /* driver model interfaces that don't relate to enumeration */
+ void (*shutdown)(void);
+ int (*suspend)(pm_message_t mesg);
+ int (*resume)(void);
+
+ /* a ioctl like command that can be used to perform specific functions
+ * with the device.
+ */
+ int (*command)(unsigned int cmd, void *arg);
+
+ const struct tdm_device_id *id_table;
+
+ /* The associated adapter for this driver */
+ struct tdm_adapter *adapter;
+ struct list_head list;
+};
+
+/* tdm per port statistics structure, used for providing and storing tdm port
+ * statistics.
+ */
+struct tdm_port_stats {
+ unsigned int rx_pkt_count; /* Rx frame count per channel */
+ unsigned int rx_pkt_drop_count; /* Rx drop count per channel to
+ clean space for new buffer */
+ unsigned int tx_pkt_count; /* Tx frame count per channel */
+ unsigned int tx_pkt_conf_count; /* Tx frame confirmation count per
+ channel */
+ unsigned int tx_pkt_drop_count; /* Tx drop count per channel due to
+ queue full */
+};
+
+
+/* tdm Buffer Descriptor, used for Creating Interleaved and De-interleaved
+ * FIFOs
+ */
+struct tdm_bd {
+ unsigned char flag; /* BD is full or empty */
+ unsigned char wrap; /* BD is last in the queue */
+ unsigned short length; /* Length of Data in BD */
+ /*TODO: use dyanmic memory */
+ unsigned short p_data[NUM_SAMPLES_PER_FRAME]; /* Data Pointer */
+ unsigned long offset; /* Offset of the Data Pointer to be used */
+};
+
+#define TDM_CH_RX_BD_RING_SIZE 3
+#define TDM_CH_TX_BD_RING_SIZE 3
+
+/* tdm RX-TX Channelised Data */
+struct tdm_port_data {
+ struct tdm_bd rx_data_fifo[TDM_CH_RX_BD_RING_SIZE]; /* Rx Channel Data
+ BD Ring */
+ struct tdm_bd *rx_in_data; /* Current Channel Rx BD to be filled by
+ de-interleave function */
+ struct tdm_bd *rx_out_data; /* Current Channel Rx BD to be
+ read by App */
+ struct tdm_bd tx_data_fifo[TDM_CH_TX_BD_RING_SIZE]; /* Tx Channel Data
+ BD Ring */
+ struct tdm_bd *tx_in_data; /* Current Channel Tx BD to be
+ filled by App */
+ struct tdm_bd *tx_out_data; /* Current Channel Tx BD to be read by
+ interleave function */
+ spinlock_t rx_channel_lock; /* Spin Lock for Rx Channel */
+ spinlock_t tx_channel_lock; /* Spin Lock for Tx Channel */
+};
+
+/* structure tdm_port_cfg - contains configuration params for a port */
+struct tdm_port_cfg {
+ unsigned short port_mode;
+};
+
+/* struct tdm_port - represent an TDM ports for a device */
+struct tdm_port {
+ unsigned short port_id;
+ unsigned short in_use; /* Port is enabled? */
+ uint16_t rx_max_frames; /* Received Port frames
+ before allowing Read Operation in
+ Port Mode */
+
+ struct tdm_port_stats port_stat;/* A structure parameters defining
+ TDM port statistics. */
+ struct tdm_port_data *p_port_data; /* a structure parameters
+ defining tdm channelised data */
+ wait_queue_head_t ch_wait_queue; /* waitQueue for RX Port Data */
+
+ struct tdm_driver *driver; /* driver for this port */
+ struct tdm_adapter *adapter; /* adapter for this port */
+ struct list_head list; /* list of ports */
+ struct list_head mychannels; /* list of channels, created on this
+ port*/
+ spinlock_t ch_list_lock; /* Spin Lock for channel_list */
+ struct tdm_port_cfg port_cfg;/* A structure parameters defining
+ TDM port configuration. */
+};
+
+/* tdm RX-TX Channelised Data */
+struct tdm_ch_data {
+ struct tdm_bd rx_data_fifo[TDM_CH_RX_BD_RING_SIZE]; /* Rx Port Data BD
+ Ring */
+ struct tdm_bd *rx_in_data; /* Current Port Rx BD to be filled by
+ de-interleave function */
+ struct tdm_bd *rx_out_data; /* Current Port Rx BD to be read by App */
+ struct tdm_bd tx_data_fifo[TDM_CH_TX_BD_RING_SIZE]; /* Tx Port Data BD
+ Ring */
+ struct tdm_bd *tx_in_data; /* Current Port Tx BD to be filled by
+ App */
+ struct tdm_bd *tx_out_data; /* Current Port Tx BD to be read by
+ interleave function */
+ spinlock_t rx_channel_lock; /* Spin Lock for Rx Port */
+ spinlock_t tx_channel_lock; /* Spin Lock for Tx Port */
+};
+
+/* Channel config params */
+struct tdm_ch_cfg {
+ unsigned short num_slots;
+ unsigned short first_slot;
+};
+
+/* struct tdm_channel- represent a TDM channel for a port */
+struct tdm_channel {
+ u16 ch_id; /* logical channel number */
+ struct list_head list; /* list of channels in a port*/
+ struct tdm_port *port; /* port for this channel */
+ u16 in_use; /* channel is enabled? */
+ struct tdm_ch_cfg ch_cfg; /* channel configuration */
+ struct tdm_ch_data *p_ch_data; /* data storage space for channel */
+};
+
+/* tdm_adapt_algorithm is for accessing the routines of device */
+struct tdm_adapt_algorithm {
+ u32 (*tdm_read)(struct tdm_adapter *, u16 **);
+ u32 (*tdm_get_write_buf)(struct tdm_adapter *, u16 **);
+ u32 (*tdm_write)(struct tdm_adapter *, void * , unsigned int len);
+ int (*tdm_enable)(struct tdm_adapter *);
+ int (*tdm_disable)(struct tdm_adapter *);
+};
+
+/* tdm_adapter_mode is to define in mode of the device */
+enum tdm_adapter_mode {
+ e_TDM_ADAPTER_MODE_NONE = 0x00,
+ e_TDM_ADAPTER_MODE_T1 = 0x01,
+ e_TDM_ADAPTER_MODE_E1 = 0x02,
+ e_TDM_ADAPTER_MODE_T1_RAW = 0x10,
+ e_TDM_ADAPTER_MODE_E1_RAW = 0x20,
+};
+
+/* tdm_port_mode defines the mode in which the port is configured to operate
+ * It can be channelized/full/fractional.
+ */
+enum tdm_port_mode {
+ e_TDM_PORT_CHANNELIZED = 0 /* Channelized mode */
+ , e_TDM_PORT_FULL = 1 /* Full mode */
+ , e_TDM_PORT_FRACTIONAL = 2 /* Fractional mode */
+};
+
+/* tdm_process_mode used for testing the tdm device in normal mode or internal
+ * loopback or external loopback
+ */
+enum tdm_process_mode {
+ e_TDM_PROCESS_NORMAL = 0 /* Normal mode */
+ , e_TDM_PROCESS_INT_LPB = 1 /* Internal loop mode */
+ , e_TDM_PROCESS_EXT_LPB = 2 /* External Loopback mode */
+};
+
+
+/* TDM configuration parameters */
+struct fsl_tdm_adapt_cfg {
+ u8 num_ch; /* Number of channels in this adpater */
+ u8 ch_size_type; /* reciever/transmit channel
+ size for all channels */
+ u8 slot_width; /* 1 or 2 Is defined by channel type */
+ u8 frame_len; /* Length of frame in samples */
+ u32 num_frames;
+ u8 loopback; /* loopback or normal */
+ u8 adap_mode; /* 0=None, 1= T1, 2= T1-FULL, 3=E1,
+ 4 = E1-FULL */
+ int max_num_ports; /* Not Used: Max Number of ports that
+ can be created on this adapter */
+ int max_timeslots; /* Max Number of timeslots that are
+ supported on this adapter */
+};
+
+/*
+ * tdm_adapter is the structure used to identify a physical tdm device along
+ * with the access algorithms necessary to access it.
+ */
+struct tdm_adapter {
+ struct module *owner; /* owner of the adapter module */
+ unsigned int id; /* Adapter Id */
+ unsigned int class; /* classes to allow probing for */
+ unsigned int drv_count; /* Number of drivers associated with the
+ adapter */
+
+ const struct tdm_adapt_algorithm *algo; /* the algorithm to access the
+ adapter*/
+
+ char name[TDM_NAME_SIZE]; /* Name of Adapter */
+ struct mutex adap_lock;
+ struct device *parent; /*Not Used*/
+
+ struct tasklet_struct tdm_data_tasklet; /* tasklet handle to perform
+ data processing*/
+ int tasklet_conf; /* flag for tasklet configuration */
+ int tdm_rx_flag;
+
+ struct list_head myports; /* list of ports, created on this
+ adapter */
+ struct list_head list;
+ spinlock_t portlist_lock; /* Spin Lock for port_list */
+ void *data;
+ struct fsl_tdm_adapt_cfg adapt_cfg;
+};
+
+static inline void *tdm_get_adapdata(const struct tdm_adapter *dev)
+{
+ return dev->data;
+}
+
+static inline void tdm_set_adapdata(struct tdm_adapter *dev, void *data)
+{
+ dev->data = data;
+}
+
+/* functions exported by tdm.o */
+
+extern int tdm_add_adapter(struct tdm_adapter *);
+extern int tdm_del_adapter(struct tdm_adapter *);
+extern int tdm_register_driver(struct tdm_driver *);
+extern void tdm_del_driver(struct tdm_driver *);
+extern void tdm_unregister_driver(struct tdm_driver *);
+extern void init_config_adapter(struct tdm_adapter *);
+
+extern unsigned int tdm_port_open(struct tdm_driver *, void **);
+extern unsigned int tdm_port_close(void *);
+extern unsigned int tdm_port_ioctl(void *, unsigned int, unsigned long);
+extern unsigned int tdm_channel_read(void *, void *, void *, u16 *);
+extern unsigned int tdm_channel_write(void *, void * , void *, u16);
+extern unsigned int tdm_port_poll(void *, unsigned int);
+
+extern int tdm_channel_open(u16, u16, struct tdm_port *, void **);
+extern int tdm_channel_close(u16, u16, struct tdm_port *,
+ struct tdm_channel *);
+
+static inline int tdm_add_driver(struct tdm_driver *driver)
+{
+ return tdm_register_driver(driver);
+}
+
+extern struct tdm_adapter *tdm_get_adapter(int id);
+extern void tdm_put_adapter(struct tdm_adapter *adap);
+
+#endif /* __KERNEL__ */
+
+#define TDM_E_OK 0
+
+#endif /* _LINUX_TDM_H */
--
1.6.5.6
^ permalink raw reply related
* [PATCH][1/3][RFC] Adding documentation for TDM
From: Poonam Aggrwal @ 2012-03-10 12:56 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Sandeep Singh, Poonam Aggrwal
From: Sandeep Singh <Sandeep@freescale.com>
tdm-summary.txt contains general description about TDM.
tdm-framework.txt contains specific description of TDM framework.
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
Added the documentation to so that reviwers get the context.
Documentation/tdm/tdm-framework.txt | 257 +++++++++++++++++++++++++++++++++++
Documentation/tdm/tdm-summary.txt | 103 ++++++++++++++
2 files changed, 360 insertions(+), 0 deletions(-)
create mode 100644 Documentation/tdm/tdm-framework.txt
create mode 100644 Documentation/tdm/tdm-summary.txt
diff --git a/Documentation/tdm/tdm-framework.txt b/Documentation/tdm/tdm-framework.txt
new file mode 100644
index 0000000..9f0ca36
--- /dev/null
+++ b/Documentation/tdm/tdm-framework.txt
@@ -0,0 +1,257 @@
+This document gives an overview of TDM framework and its interface with
+low level drivers and upper level users/clients.
+
+Terminology:
+============
+1. Adapter or TDM adapter: Refers to an instance of TDM controller/device on
+ the system.
+2. TDM channel: The channel is the smallest entity on which all the TDM
+ read/write operations will occur.
+ Technically all channels map to a set of consecutive time slots on the
+ physical TDM frame.
+ The channels will be dynamically created and destroyed using
+ tdm_open_channel and tdm_close_channel.
+3. TDM frame: Is a set of TDM channels which is transmitted sequentially over
+ time. The frame start is identified by a frame sync signal that is briefly
+ asserted at the beginning of each frame.
+
+X----------TDM Frame 0-------------X------TDM Frame 1-----------------X
+|----|----|----|----|----|----|----|----|----|----|----|----|----|----|
+| 0 | 1 | 2 | 3 | 4 | ...| n | 0 | 1 | 2 | 3 | 4 | ...| n |...
+|----|----|----|----|----|----|----|----|----|----|----|----|----|----|
+<----> <---->
+ch 0 ch 0
+
+4. TDM client: Application/driver which registers with TDM framework to use TDM
+ device.
+5. TDM port: It can be seen as a virtual device exposed to a client. At a time
+ TDM port can work in one of the follwing configurations
+ full/fractional/E1/T1/raw.
+
+TDM modes
+========
+A TDM device can operate in one of the following modes:
+1. Single port full mode - Single user/no interleaving 2. Single port
+channelised mode (raw, E1, T1)- many users using different
+ channels
+3. Single port fractional mode -
+4. Multi port mode - multiple users using different ports in different
+ configurations.
+
+All the above configurations differ in number of TDM client they
+support, number of TDM channels and number of TDM ports.
+
+Currently we are supporting only single port channelised mode. Hence
+all the explanations below refer to channelised mode of TDM. This
+framework can be easily extended to support other modes.
+
+Single port Channelised Mode
+==============================
+In single port channelised mode there can be only one port and each
+channel can have only one time slot.The number of active channels can
+be less than the maximum supported channels/slots.
+
+X----------TDM Frame 0-------------X------TDM Frame 1-----------------X
+|----|----|----|----|----|----|----|----|----|----|----|----|----|----|
+| 0 | 1 | 2 | 3 | 4 | ...| n | 0 | 1 | 2 | 3 | 4 | ...| n |...
+|----|----|----|----|----|----|----|----|----|----|----|----|----|----|
+<----><---> <----><--->
+ch0 ch1 ch0 ch1
+client0 client1
+
+TDM Subsystem Overview
+========================
+
+ |-----------------------|
+ |user mode TDM clients |
+ |-----------------------|
+ ||
+-------------------------------------------------------------------
+ tdm-dev.c ||
+ ||
+ || |------------------------|
+ client register | kernel mode TDM clients|
+ || |------------------------|
+ || ||
+ || ||
+ || client register
+ || ||
+ \/ \/
+ ______________________________________________________________
+ | |
+ | client interface |
+ |------------------------------------------------------------|
+ | TDM Subsystem Framework |
+ | (tdm-core.c) |
+ | |
+ | ->buffer handling |
+ | ->interleaving/de-interleaving |
+ | |
+ |------------------------------------------------------------|
+ | TDM interface Line control interface |
+ |____________________________________________________________|
+ /\ /\
+ || ||
+ device register device register
+ || ||
+ || ||
+
+ fsl_tdm.c ucc_tdm.c slic_zarlink.c framer.c
+--------------------------------------------------------------------------
+_______________________ _____________________ ________ ________
+| | | | | | | |
+|[h/w] TDM controller | |UCC TDM controller | | SLIC | |Framer|
+|_____________________| |___________________| |______| |______|
+
+
+
+TDM Adapter Registration:
+=========================
+All the TDM adapter drivers will get registered as platform drivers to Linux.
+For every instance of the TDM adapter the relevant driver will be probed.
+As part of probe the driver will
+1. Do the basic initialization in terms of memory allocation for various
+ driver specific data structures, interrupts registration, etc.
+2. Initialize the TDM adapter and configure it in default configuration.
+ like operating mode, number of channels, channel type, etc.
+3. Add the TDM adapter to the TDM Framework via tdm_add_adapter() API.
+ As a result TDM framework will add this adapter to it's queue of
+ available adapters. As part of this adapter registration TDM framework
+ is also supplied a list of access algorithms for the particular TDM
+ adapter.
+4. Notifies the clients
+
+TDM Client Registration:
+========================
+Every TDM client gets itself registered with the TDM framework layer as
+a TDM driver using the API tdm_add_driver(). As part of this the TDM
+client supplies to the TDM framework the adapter with which it wants to
+hook and the function pointers of attach and detach functions which
+must be called as soon as the requested adapter is available.
+
+As a result the TDM framework keeps association of TDM adapters and TDM
+client drivers.
+As soon as this association gets established a tasklet is created for
+the adapter which is handled by tdm_data_tasklet_fn. The primary
+function of this tasklet acts as an interface to transfer the TDM data
+between the TDM adapter and the TDM client drivers.
+
+
+Currently TDM adaper can only be used in the default configuration.
+ie the configuration cannot be modified by TDM clients. This will be
+enhanced in future.
+
+Data handling:
+==============
+Some basic assumptions about data handling:
+
+1. As per standard voice rate of 8Khz or 8192Hz. Which means 8192
+samples must be sent every second. So if there are multiple clients
+sending voice data over TDM interface the rate should be such that the
+individual samples sent by them must be transmitted at 8Kz.
+
+This is defined in the driver as
+
+#define CH_1_MS_FRAMES 8
+
+2. Number of milliseconds at which TDM Rx interrupts occur This is
+basically the time for which the TDM data is sent in one Tx or Rx cycle
+of TDM controller hardware. In one DMA we send the data for 10ms.
+This gives enough time so that no buffer overflow or under-run occurs
+for transmit and receive respectively.
+
+#define NUM_MS 10
+
+3. TDM has programmable slot length (8 bits or 16 bits). This can be
+configured by depending on the type of sample. For example the sample
+could be 16 bit linear or 8bit u-law encoded etc. Presently only word
+length of 16 is supported which is the default configuration.
+
+4. Number of channels means the total number of channels per TDM port.
+For example for E1 mode it will be 24, for T1 it will be 32, etc.
+There can also be raw mode, where the use case is not E1 or T1.
+Here the number of channels can be any number as per the use case.
+
+The whole framework follows a triple buffer approach to make sure that
+TDM data is played continuously at the desired rate.
+
+Buffers Involved:
+=================
+
+1.TDM driver or device buffers:
+These buffers are the device level buffers. They contain the TDM data
+which is transmitted/received on the TDM physical signals. As such
+these buffers must be allocated from driver layer so that all the hardware requirements are met.
+As an optimized design to remove extra memcopies, the client can pass
+the data in the same buffers. But this is only true for full mode of
+TDM. Where the user data can be straightaway passed to the hardware for transmission.
+Although in other cases memcopy cannot be avoided, because the
+framework layer will have to interleave the individual channels data to
+create the TDM frame data buffer.For channelised mode size of this buffer will be governed by:
+
+-number of channels
+-number of slots per channel
+-number of bytes per slot
+-number of frames per ms
+-number of ms
+
+For a channelised mode with single port the size of the device level
+buffer will be:
+
+channels * slots per channel * bytes per slot * frames per ms * number of ms
+
+There will be 3 such buffers.
+
+2.Channel level buffers:
+In case the TDM device is configured for multiport/multichannel the
+Framework layer needs to maintain the data for each channel. Hence for
+each channel opened a Buffer Descriptor ring of 3 BDs(see note below)
+is allocated both for transmit and receive. The client reads
+from/writes to the buffers pointed by these BD rings.
+
+The framework layer maintains a Data Process Tasklet per TDM device
+which is scheduled from every Rx interrupt. The interrupt handling
+periodicity is governed by the TDM data buffer size configured in the
+above section. The data tasklet when scheduled, will do Rx and Tx
+processing to copy the data from/to the channel specific interleaved
+buffers. The TDM controller will DMA the data which is copied in the interleaved buffers or device level buffers.
+
+TDM framework provides the port level APIs and channel level APIs to
+the TDM client drivers to send and receive the respective data on different TDM slots.
+
+
+num of buffers = 3
+
+TDM client1 TDM Client2
+
+buf0------->buf1 buf0------->buf1
+^ | ^ |
+| V | V
+----buf2------ ------buf2----
+ | |
+ | |
+ | |
+ V V
+-----------------------------------------
+| |
+| DATA Tasklet |
+| |
+-----------------------------------------
+ |
+ |
+ V
+-----------------------------------------
+| TDM buffer interleaved * 3 |
+-----------------------------------------
+
+
+Not Implemented/Future work:
+============================
+1. TDM client will use the default configuration which is done at init time
+ and is not configurable. In future this should be made configurable as per
+ the needs of client.
+2. The TDM framework still needs to be enhanced to configure the ports and
+ their attributes. Currently only single port channelised mode is supported.
+3. Line control interface is not available in the framework presently.
+ Presently it offer very minimal kind of interface.
+4. SLIC interface will be enhanced as per Zarlink Open source APIs in future.
diff --git a/Documentation/tdm/tdm-summary.txt b/Documentation/tdm/tdm-summary.txt
new file mode 100644
index 0000000..d2e6eca
--- /dev/null
+++ b/Documentation/tdm/tdm-summary.txt
@@ -0,0 +1,103 @@
+Time-Division Multiplexing (TDM)
+=================================
+
+TDM is a type of digital or analog multiplexing in which two or more
+bit streams or signals are transferred apparently simultaneously as
+sub-channels in one communication channel, but are physically taking turns on the channel.
+
+The time domain is divided into several recurrent timeslots of fixed duration.
+These timeslot are grouped together to form a channel. A sample byte or
+data block of channel 1 is transmitted during timeslots allocated to
+channel 1, channel 2 during timeslot for channel 2, etc.
+
+One TDM frame consists of multiple channels. After the last channel the
+cycle starts all over again with a new frame, starting with the second
+sample, byte or data block from channel 1, and so on.
+
+X----------TDM Frame 0-------------X------TDM Frame 1-----------------X
+|----|----|----|----|----|----|----|----|----|----|----|----|----|----|
+| 0 | 1 | 2 | 3 | 4 | ...| n | 0 | 1 | 2 | 3 | 4 | ...| n |...
+|----|----|----|----|----|----|----|----|----|----|----|----|----|----|
+<----> <---->
+channel 0 channel 0
+-------------------------------------------------------------------->
+ Increasing Time
+
+Physical TDM interface
+=======================
+
+Physically TDM interface is a serial full duplex interface designed to
+communicate with variety of serial devices like industry standard
+framers, codecs, other DSPs, and microprocessors. It is typically used
+to transfer samples in a periodic manner. The TDM consists of
+independent transmitter and receiver sections with independent clock generation and frame synchronization.
+
+External TDM signals are:
+1. TDM_TCK: TDM Transmit clock
+2. TDM_RCK: TDM Receive clock
+3. TDM_TFS: TDM Tx frame sync to identify frame boundary 4. TDM_RFS:
+TDM Rx Frame sync to identify frame boundary 5. TDM_TD: TDM Tx data 6.
+TDM_RD: TDM Rx data
+
+TDM is generally used to simultaneously transmit periodic data for
+multiple users. Common use cases would be to carry voice for various
+telephone subscribers in the telephone networks. It is widely used to
+carry telephonic data of various industry standards like E1/T1 data, etc.
+
+T1 Details
+==========
+T1 frame consists of 24 channels of 8 bits each plus one frame alignment bit.
+So a T1 frame has a total of 24x8 + 1 = 193 bits. Since each T1 frame
+contains one byte of voice data for each of 24 channels and the system
+needs to maintain a data rate of 8000 samples/sec. This would require
+8000 frames/sec to be sent, yielding a data rate of 8000x193 bit/sec = 1.544 Mbps.
+
+E1 Details
+===========
+E1 frame consists of 32 channels each of 8 bits. Thus having a total
+frame length of 32x8 = 256 bits. Similar to the case of T1 it has to
+maintain a data rate of 8000 frames/sec. Thus having a data rate of
+8000 x 256 bits/sec =
+2.048 Mbps.
+
+TDM use cases
+=============
+
+With SLIC kind of devices
+=========================
+
+Typically TDM systems consist of TDM controller and a line control device.
+
+The TDM controller interfaces to the line control device through TDM
+interface which is digital TDM multiplexed data.
+
+The Line controller has the functionality to interface with the TDM
+controller at one end and interface with the analog units at the other.
+For example if the Line control device is a SLIC kind of device.
+The typical setup would be:
+
+|------------------|
+| |
+| | /-------\ |---------|
+| TDM controller |/ TDM \ | SLIC |<--------> s-ch0 analog phone 1
+| |\ data / | |<--------> s-ch1 analog phone 2
+| | \-------/ |---------|<--------> s-ch2 analog phone 3
+| |< digital > <analog>
+|------------------|
+
+
+
+Another use case (VoIP):
+========================
+
+ Voice packets on network
+ |--------| |------| _________ |------| |------|
+>----| |/---\| TDM | ( ) | TDM |/---\| |----->
+<----| SLIC |\---/| | ( n/w ) | |\---/| SLIC |-----<
+>----| | |------| --------- |------| | |----->
+ |--------| mux demux |------|
+
+In the above figure analog phones are connected to the hosts via SLICs.
+The voice spoken on the phones is multiplexed converted into VoIP
+packets and sent over network. At the rendering end the multiplexed
+data is de-multiplexed and sent to respective listeners via SLIC.
--
1.5.6.5
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