* Re: [PATCH SDK1.2 1/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Kumar Gala @ 2012-03-16 18:58 UTC (permalink / raw)
To: Jia Hongtao-B38951; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D019ADE0E@039-SN1MPN1-002.039d.mgd.msft.net>
On Feb 9, 2012, at 8:27 PM, Jia Hongtao-B38951 wrote:
> Hi Kumar,
> This series of patches have been pending for a long time.
> I'd like to know whether they are look good or not so I can do the =
further work on it.
> It's kind of emergency things for me.
> Thanks a lot for your attention.
I commented some time ago that the patches looked fine, but needed to be =
done for ALL the boards (include 86xx).
- k
>=20
> -----Original Message-----
> From: Jia Hongtao-B38951=20
> Sent: Tuesday, January 10, 2012 3:31 PM
> To: Gala Kumar-B11780
> Cc: Li Yang-R58472; Jia Hongtao-B38951; linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH SDK1.2 1/3] powerpc/fsl-pci: Unify pci/pcie =
initialization code
>=20
> Hi Kumar,
> Do you have any idea on this series of patches?
> Looking forward to your answer.
> Thanks.
>=20
> --Jia Hongtao.
>=20
> -----Original Message-----
> From: Jia Hongtao-B38951
> Sent: Wednesday, December 21, 2011 3:11 PM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: Li Yang-R58472; Gala Kumar-B11780; Jia Hongtao-B38951
> Subject: [PATCH SDK1.2 1/3] powerpc/fsl-pci: Unify pci/pcie =
initialization code
>=20
> We unified the Freescale pci/pcie initialization by changing the =
fsl_pci to a platform driver.
>=20
> In previous version pci/pcie initialization is in platform code which =
Initialize pci bridge base on EP/RC or host/agent settings.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c | 39 +++++++----------------
> arch/powerpc/sysdev/fsl_pci.c | 53 =
++++++++++++++++++++++++++++++++
> 2 files changed, 65 insertions(+), 27 deletions(-)
>=20
> diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c =
b/arch/powerpc/platforms/85xx/p1022_ds.c
> index 2bf4342..41de2c1 100644
> --- a/arch/powerpc/platforms/85xx/p1022_ds.c
> +++ b/arch/powerpc/platforms/85xx/p1022_ds.c
> @@ -277,32 +277,9 @@ void __init mpc85xx_smp_init(void);
> */
> static void __init p1022_ds_setup_arch(void) { -#ifdef CONFIG_PCI
> - struct device_node *np;
> -#endif
> - dma_addr_t max =3D 0xffffffff;
> -
> if (ppc_md.progress)
> ppc_md.progress("p1022_ds_setup_arch()", 0);
>=20
> -#ifdef CONFIG_PCI
> - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
> - struct resource rsrc;
> - struct pci_controller *hose;
> -
> - of_address_to_resource(np, 0, &rsrc);
> -
> - if ((rsrc.start & 0xfffff) =3D=3D 0x8000)
> - fsl_add_bridge(np, 1);
> - else
> - fsl_add_bridge(np, 0);
> -
> - hose =3D pci_find_hose_for_OF_device(np);
> - max =3D min(max, hose->dma_window_base_cur +
> - hose->dma_window_size);
> - }
> -#endif
> -
> #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
> diu_ops.get_pixel_format =3D p1022ds_get_pixel_format;
> diu_ops.set_gamma_table =3D p1022ds_set_gamma_table;
> @@ -316,11 +293,8 @@ static void __init p1022_ds_setup_arch(void) =
#endif
>=20
> #ifdef CONFIG_SWIOTLB
> - if (memblock_end_of_DRAM() > max) {
> + if (memblock_end_of_DRAM() > 0xffffffff)
> ppc_swiotlb_enable =3D 1;
> - set_pci_dma_ops(&swiotlb_dma_ops);
> - ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> - }
> #endif
>=20
> pr_info("Freescale P1022 DS reference board\n"); @@ -339,6 =
+313,17 @@ static int __init p1022_ds_publish_devices(void) } =
machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
>=20
> +static struct of_device_id __initdata p1022_pci_ids[] =3D {
> + { .compatible =3D "fsl,p1022-pcie", },
> + {},
> +};
> +
> +static int __init p1022_ds_publish_pci_device(void) {
> + return of_platform_bus_probe(NULL, p1022_pci_ids, NULL); }=20
> +machine_arch_initcall(p1022_ds, p1022_ds_publish_pci_device);
> +
> machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
>=20
> /*
> diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c index 4ce547e..a0f305d 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -712,3 +712,56 @@ u64 fsl_pci_immrbar_base(struct pci_controller =
*hose)
>=20
> return 0;
> }
> +
> +static const struct of_device_id pci_ids[] =3D {
> + { .compatible =3D "fsl,mpc8540-pci", },
> + { .compatible =3D "fsl,mpc8548-pcie", },
> + { .compatible =3D "fsl,p1022-pcie", },
> + {},
> +};
> +
> +static int __devinit fsl_pci_probe(struct platform_device *pdev) {
> + struct pci_controller *hose;
> +
> + if (of_match_node(pci_ids, pdev->dev.of_node)) {
> + struct resource rsrc;
> + of_address_to_resource(pdev->dev.of_node, 0, &rsrc);
> + if ((rsrc.start & 0xfffff) =3D=3D 8000)
> + fsl_add_bridge(pdev->dev.of_node, 1);
> + else
> + fsl_add_bridge(pdev->dev.of_node, 0);
> +
> +#ifdef CONFIG_SWIOTLB
> + hose =3D pci_find_hose_for_OF_device(pdev->dev.of_node);
> + /*
> + * if we couldn't map all of DRAM via the dma windows
> + * we need SWIOTLB to handle buffers located outside of
> + * dma capable memory region
> + */
> + if (memblock_end_of_DRAM() > hose->dma_window_base_cur
> + + hose->dma_window_size) {
> + ppc_swiotlb_enable =3D 1;
> + set_pci_dma_ops(&swiotlb_dma_ops);
> + ppc_md.pci_dma_dev_setup =3D =
pci_dma_dev_setup_swiotlb;
> + }
> +#endif
> +
> + }
> +
> + return 0;
> +}
> +
> +static struct platform_driver fsl_pci_driver =3D {
> + .driver =3D {
> + .name =3D "fsl-pci",
> + .of_match_table =3D pci_ids,
> + },
> + .probe =3D fsl_pci_probe,
> +};
> +
> +static int __init fsl_pci_init(void)
> +{
> + return platform_driver_register(&fsl_pci_driver);
> +}
> +arch_initcall(fsl_pci_init);
> --
> 1.7.5.1
>=20
^ permalink raw reply
* Re: [PATCH] Device Tree Bindings for Freescale TDM controller
From: Scott Wood @ 2012-03-16 18:29 UTC (permalink / raw)
To: Poonam Aggrwal; +Cc: Sandeep Singh, devicetree-discuss, linuxppc-dev
In-Reply-To: <1331861451-15427-1-git-send-email-poonam.aggrwal@freescale.com>
On 03/15/2012 08:30 PM, Poonam Aggrwal wrote:
> From: Poonam Aggrwal <poonam.aggrwal@freescale.com>
>
> This TDM controller is available in various Freescale SOCs like MPC8315, P1020,
> P1022, P1010.
>
> Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> ---
> Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 71 +++++++++++++++++++++
> 1 files changed, 71 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
>
> diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
> new file mode 100644
> index 0000000..61431e3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
> @@ -0,0 +1,71 @@
> +=====================================================================
> +TDM Device Tree Binding
> +Copyright (C) 2012 Freescale Semiconductor Inc.
> +
> +NOTE: The bindings described in this document are preliminary
> +and subject to change.
> +
> +=====================================================================
> +TDM (Time Division Multiplexing)
> +
> +DESCRIPTION
> +
> +The TDM is full duplex serial port designed to allow various devices including
> +digital signal processors (DSPs) to communicate with a variety of serial devices
> +including industry standard framers, codecs, other DSPs and microprocessors.
> +
> +The below properties describe the device tree bindings for Freescale TDM
> +controller.
> +This TDM controller is available on various Freescale Processors like
> +MPC8313, P1020, P1022 and P1010.
> +
> +PROPERTIES
> +
> + - compatible
> + Usage: required
> + Value type: <string>
> + Definition: Should contain "fsl,mpc8315-tdm".
> + So mpc8313 will have compatible = "fsl,mpc8315-tdm";
> + p1010 will have compatible "fsl,p1010-tdm", "fsl,mpc8315-tdm";
Shouldn't mpc8313 have:
compatible = "fsl,mpc8313-tdm", "fsl,mpc8315-tdm"?
I thought we were going to use 8313 as the canonical implementation, not
8315.
> + - reg
> + Usage: required
> + Value type: <tdm-reg-offset tdm-reg-size dmac-reg-offset dmac-reg-size>
> + Definition: A standard property. Specifies the physical address
> + offset and length of the TDM registers and TDM DMAC registers for
> + the device.
Just say there's two reg resources, and that the first is the TDM
registers and the second is the TDM DMAC registers.
It's typically not going to be the actual physical address, but rather
an offset that gets translated through a parent node's ranges.
Remove "value type"; it's standard.
> + - clock-frequency
> + Usage: optional
> + Value type: <u32>
> + Definition: The frequency at which the TDM block is operating.
Will this frequency ever need to be > 4GHz?
Might want to specify as u32 or u64, as ePAPR suggests.
> + - interrupts
> + Usage: required
> + Value type: <tdm-err-intr tdm-err-intr-type dmac-intr dmac-intr-type>
> + Definition: This field defines two interrupt specifiers namely interrupt
> + number and interrupt type for TDM error and TDM DMAC.
What is "tdm-err-intr-type"? The interrupt specifier encoding is
defined by the interrupt controller. There might be one cell, two
cells, four cells, etc. Remove "value type", it's standard.
> + - phy-handle
> + Usage: optional
> + Value type: <phandle>
> + Definition: Phandle of the line controller node or framer node eg. SLIC,
> + E1\T1 etc.
Use a forward slash -- this isn't a Windows filesystem path. :-)
> + - fsl-max-time-slots
> + Usage: required
> + Value type: <u32>
> + Definition: Maximum number of 8-bit time slots in one TDM frame.
> + This is the maximum number which TDM hardware supports.
fsl,tdm-max-time-slots
> +
> +EXAMPLE
> +
> + tdm@16000 {
> + device_type = "tdm";
No device_type
> + compatible = "fsl,p1010-tdm", "fsl,mpc8315-tdm";
> + reg = <0x16000 0x200 0x2c000 0x2000>;
> + clock-frequency = <0>;
Show a real clock-frequency, perhaps with a comment saying it's
typically filled in by boot software.
> + interrupts = <16 8 62 8>;
> + phy-handle = <zarlink1>
That phy-handle is invalid syntax, perhaps you meant:
phy-handle = <&zarlink1>;
> + fsl-max-time-slots = <128>
Missing semicolons on the last two properties.
-Scott
^ permalink raw reply
* Re: [PATCH 3/3] [v2] powerpc/85xx: p1022ds: enable monitor switching via pixis indirect mode
From: Kumar Gala @ 2012-03-16 16:20 UTC (permalink / raw)
To: Timur Tabi; +Cc: scottwood, linuxppc-dev
In-Reply-To: <1321638601-6861-3-git-send-email-timur@freescale.com>
On Nov 18, 2011, at 11:50 AM, Timur Tabi wrote:
> When the P1022's DIU video controller is active, the pixis must be =
accessed
> in "indirect" mode, which uses localbus chip select addresses.
>=20
> Switching between the DVI and LVDS monitor ports is handled by the =
pixis,
> so that switching needs to be done via indirect mode.
>=20
> This has the side-effect of no longer requiring U-Boot to enable the =
DIU.
> Now Linux can enable the DIU all by itself.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c | 132 =
++++++++++++++++++++++++++-----
> 1 files changed, 110 insertions(+), 22 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH v3 4/4] powerpc: Board support for GE IMP3A
From: Kumar Gala @ 2012-03-16 16:14 UTC (permalink / raw)
To: Martyn Welch; +Cc: Wim Van Sebroeck, linuxppc-dev, linux-kernel, Linus Walleij
In-Reply-To: <1331572380-1064-5-git-send-email-martyn.welch@ge.com>
On Mar 12, 2012, at 12:13 PM, Martyn Welch wrote:
> Initial board support for the GE IMP3A, a 3U compactPCI card with a =
p2020
> processor.
>=20
> Signed-off-by: Martyn Welch <martyn.welch@ge.com>
> ---
>=20
> v2: Rebase patch onto powerpc/next, taking work by Kyle Moffett into
> account.
>=20
> v3: Correct detection of interrupt controller.
>=20
> arch/powerpc/boot/dts/ge_imp3a.dts | 255 =
++++++++++++++++++++++++++++++
> arch/powerpc/configs/ge_imp3a_defconfig | 257 =
+++++++++++++++++++++++++++++++
> arch/powerpc/platforms/85xx/Kconfig | 15 ++
> arch/powerpc/platforms/85xx/Makefile | 1 +
> arch/powerpc/platforms/85xx/ge_imp3a.c | 246 =
+++++++++++++++++++++++++++++
> drivers/gpio/gpio-ge.c | 28 ++++
> 6 files changed, 802 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/ge_imp3a.dts
> create mode 100644 arch/powerpc/configs/ge_imp3a_defconfig
> create mode 100644 arch/powerpc/platforms/85xx/ge_imp3a.c
applied, moved defconfig to configs/85xx/
- k=
^ permalink raw reply
* Re: [PATCH v3 3/4] powerpc: Move GE PIC drivers
From: Kumar Gala @ 2012-03-16 16:13 UTC (permalink / raw)
To: Martyn Welch; +Cc: Wim Van Sebroeck, linuxppc-dev, linux-kernel, Linus Walleij
In-Reply-To: <1331572380-1064-4-git-send-email-martyn.welch@ge.com>
On Mar 12, 2012, at 12:12 PM, Martyn Welch wrote:
> Move the GE PIC drivers to allow these to be used by non-86xx boards.
>
> Signed-off-by: Martyn Welch <martyn.welch@ge.com>
> ---
>
> v2: Move GPIO and PIC drivers to sysdev/ge/ rather than platforms/.
>
> v3: Now just PIC driver. GPIO driver going to drivers/gpio.
>
> arch/powerpc/platforms/86xx/Kconfig | 4 ----
> arch/powerpc/platforms/86xx/Makefile | 1 -
> arch/powerpc/platforms/86xx/gef_ppc9a.c | 2 +-
> arch/powerpc/platforms/86xx/gef_sbc310.c | 2 +-
> arch/powerpc/platforms/86xx/gef_sbc610.c | 2 +-
> arch/powerpc/sysdev/Kconfig | 4 ++++
> arch/powerpc/sysdev/Makefile | 2 ++
> arch/powerpc/sysdev/ge/Makefile | 1 +
> .../86xx/gef_pic.c => sysdev/ge/ge_pic.c} | 2 +-
> .../86xx/gef_pic.h => sysdev/ge/ge_pic.h} | 0
> 10 files changed, 11 insertions(+), 9 deletions(-)
> create mode 100644 arch/powerpc/sysdev/ge/Makefile
> rename arch/powerpc/{platforms/86xx/gef_pic.c => sysdev/ge/ge_pic.c} (99%)
> rename arch/powerpc/{platforms/86xx/gef_pic.h => sysdev/ge/ge_pic.h} (100%)
applied
- k
^ permalink raw reply
* Re: [PATCH v3 2/4] gpio: Move GE GPIO driver to reside within GPIO subsystem
From: Kumar Gala @ 2012-03-16 16:13 UTC (permalink / raw)
To: Martyn Welch; +Cc: Wim Van Sebroeck, linuxppc-dev, linux-kernel, Linus Walleij
In-Reply-To: <1331572380-1064-3-git-send-email-martyn.welch@ge.com>
On Mar 12, 2012, at 12:12 PM, Martyn Welch wrote:
> The GE GPIO driver provides basic support (set direction, read/write =
state)
> for the GPIO provided on some GE single board computers. This patch =
moves
> the driver from the 86xx specific platform directrory to the GPIO =
subsystem
> so that it can be used on non-86xx boards.
>=20
> Signed-off-by: Martyn Welch <martyn.welch@ge.com>
> ---
>=20
> v3: Split out from patch moving PIC and GPIO driver. Moving to gpio =
subsystem
> instead of sysdev.
>=20
> arch/powerpc/configs/86xx/gef_ppc9a_defconfig | 1 +
> arch/powerpc/configs/86xx/gef_sbc310_defconfig | 1 +
> arch/powerpc/configs/86xx/gef_sbc610_defconfig | 2 ++
> arch/powerpc/platforms/86xx/Makefile | 3 +--
> drivers/gpio/Kconfig | 11 +++++++++++
> drivers/gpio/Makefile | 1 +
> .../86xx/gef_gpio.c =3D> drivers/gpio/gpio-ge.c | 2 +-
> 7 files changed, 18 insertions(+), 3 deletions(-)
> rename arch/powerpc/platforms/86xx/gef_gpio.c =3D> =
drivers/gpio/gpio-ge.c (98%)
applied
- k=
^ permalink raw reply
* Re: [PATCH v3 1/4] powerpc: Add GE FPGA config option
From: Kumar Gala @ 2012-03-16 16:13 UTC (permalink / raw)
To: Martyn Welch; +Cc: Wim Van Sebroeck, linuxppc-dev, linux-kernel, Linus Walleij
In-Reply-To: <1331572380-1064-2-git-send-email-martyn.welch@ge.com>
On Mar 12, 2012, at 12:12 PM, Martyn Welch wrote:
> This patch adds the GE_FPGA configuration option. This is being carried
> out as ground work to allow the PIC and GPIO drivers to be move from the
> powerpc 86xx platform directory to more general locations to allow them to
> be used on non-86xx boards and to reduce churn when further boards using
> these drivers are added.
>
> Signed-off-by: Martyn Welch <martyn.welch@ge.com>
> ---
>
> v3: Broken out from patch moving PIC and GPIO drivers
>
> arch/powerpc/platforms/86xx/Kconfig | 7 +++++++
> arch/powerpc/platforms/86xx/Makefile | 7 ++++---
> drivers/watchdog/Kconfig | 2 +-
> 3 files changed, 12 insertions(+), 4 deletions(-)
applied
- k
^ permalink raw reply
* Re: [PATCH] P1021: set IReady in QE Microcode Upload
From: Timur Tabi @ 2012-03-16 16:07 UTC (permalink / raw)
To: Kumar Gala
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Kokoris, Ioannis
In-Reply-To: <AC087E7A-B7BC-43E5-948F-68AEB8251FD3@kernel.crashing.org>
Kumar Gala wrote:
>> > Haiying said it should be ok, but I haven't tried it yet. I'll try it on Monday.
> Did you ever test this?
No, I forgot all about it. I'll try it today, assuming the lone 8323
board in the board farm still works.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 2/2 v5] powerpc/dts: Add dts for p1020rdb-pc board
From: Kumar Gala @ 2012-03-16 16:04 UTC (permalink / raw)
To: Zhicheng Fan; +Cc: linuxppc-dev
In-Reply-To: <1328856496-2873-2-git-send-email-B32736@freescale.com>
On Feb 10, 2012, at 12:48 AM, Zhicheng Fan wrote:
> From: Zhicheng Fan <b32736@freescale.com>
>=20
> P1020RDB-PC Overview
> ------------------
> 1Gbyte DDR3 SDRAM
> 32 Mbyte NAND flash
> 10 16Mbyte NOR flash
> 16 Mbyte SPI flash
> SD connector to interface with the SD memory card
> Real-time clock on I2C bus
>=20
> PCIe:
> - x1 PCIe slot
> - x1 mini-PCIe slot
>=20
> 10/100/1000 BaseT Ethernet ports:
> - eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 =
switch
> - eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
> - eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021
>=20
> USB 2.0 port:
> - Two USB2.0 Type A receptacles
> - One USB2.0 signal to Mini PCIe slot
>=20
> Dual RJ45 UART ports:
> - DUART interface: supports two UARTs up to 115200 bps for console =
display
>=20
> Signed-off-by: Zhicheng Fan <b32736@freescale.com>
> ---
> arch/powerpc/boot/dts/p1020rdb-pc.dtsi | 247 =
++++++++++++++++++++++
> arch/powerpc/boot/dts/p1020rdb-pc_32b.dts | 90 ++++++++
> arch/powerpc/boot/dts/p1020rdb-pc_36b.dts | 90 ++++++++
> arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts | 64 ++++++
> arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts | 142 +++++++++++++
> 5 files changed, 633 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p1020rdb-pc.dtsi
> create mode 100644 arch/powerpc/boot/dts/p1020rdb-pc_32b.dts
> create mode 100644 arch/powerpc/boot/dts/p1020rdb-pc_36b.dts
> create mode 100644 arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts
> create mode 100644 arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts
applied
- k=
^ permalink raw reply
* Re: [PATCH 1/2 v5] powerpc/85xx: Add p1020rdb-pc platform support
From: Kumar Gala @ 2012-03-16 16:04 UTC (permalink / raw)
To: Zhicheng Fan; +Cc: linuxppc-dev
In-Reply-To: <1328856496-2873-1-git-send-email-B32736@freescale.com>
On Feb 10, 2012, at 12:48 AM, Zhicheng Fan wrote:
> From: Zhicheng Fan <b32736@freescale.com>
>
> Signed-off-by: Zhicheng Fan <b32736@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 24 +++++++++++++++++++++++-
> 1 files changed, 23 insertions(+), 1 deletions(-)
applied
- k
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: add P1020MBG-PC platform support
From: Kumar Gala @ 2012-03-16 15:54 UTC (permalink / raw)
To: <Chang-Ming.Huang@freescale.com>; +Cc: linuxppc-dev
In-Reply-To: <1331716110-25545-1-git-send-email-Chang-Ming.Huang@freescale.com>
On Mar 14, 2012, at 4:08 AM, <Chang-Ming.Huang@freescale.com> =
<Chang-Ming.Huang@freescale.com> wrote:
> From: Jerry Huang <Chang-Ming.Huang@freescale.com>
>=20
> The p1020mbg-pc has the similar feature as the p1020rdb.
> Therefore, p1020mbg-pc use the same platform file as the p1/p2 rdb =
board.
> Overview of P1020MBG-PC platform:
> - DDR3 2GB
> - NOR flash 64MB
> - I2C EEPROM 256Kb
> - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
> - eTSEC2 (SGMII PHY)
> - eTSEC3 (RGMII PHY)
> - SDHC
> - 2 USB ports
> - 4 TDM ports
> - PCIe (Lane1 to dual SATA controller)
>=20
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 23 =
+++++++++++++++++++++++
> 1 files changed, 23 insertions(+), 0 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH 2/4] powerpc/85xx: add P1020UTM-PC platform support
From: Kumar Gala @ 2012-03-16 15:49 UTC (permalink / raw)
To: <Chang-Ming.Huang@freescale.com>; +Cc: linuxppc-dev
In-Reply-To: <1331716110-25545-2-git-send-email-Chang-Ming.Huang@freescale.com>
On Mar 14, 2012, at 4:08 AM, <Chang-Ming.Huang@freescale.com> =
<Chang-Ming.Huang@freescale.com> wrote:
> From: Jerry Huang <Chang-Ming.Huang@freescale.com>
>=20
> The p1020utm-pc has the similar feature as the p1020rdb.
> Therefore, p1020utm-pc use the same platform file as the p1/p2 rdb =
board.
> Overview of P1020UTM-PC platform:
> - DDR3 1GB
> - NOR flash 32MB
> - I2C EEPROM 256Kb
> - eTSEC1 (RGMII PHY Atheros AR8021)
> - eTSEC2 (SGMII PHY Vitesse VSC8221)
> - eTSEC3 (RGMII PHY Atheros AR8021)
> - SDHC
> - 2 USB ports
> - PCIe (Lane1 to dual SATA controller)
>=20
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 23 =
+++++++++++++++++++++++
> 1 files changed, 23 insertions(+), 0 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH][v4] NAND Machine support for Integrated Flash Controller
From: Kumar Gala @ 2012-03-16 15:49 UTC (permalink / raw)
To: Prabhakar Kushwaha
Cc: Poonam Aggrwal, Liu Shuo, linux-mtd, scottwood, Dipen Dudhat,
linuxppc-dev
In-Reply-To: <1331789663-27930-1-git-send-email-prabhakar@freescale.com>
On Mar 15, 2012, at 12:34 AM, Prabhakar Kushwaha wrote:
> Integrated Flash Controller(IFC) can be used to hook NAND Flash
> chips using NAND Flash Machine available on it.
>=20
> Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Liu Shuo <b35362@freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> ---
> Beased on =
http://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch master
>=20
> Tested on P1010RDB
>=20
> Changes for v2: Ported IFC driver for linux-3.2.0-rc3=20
> - Use chip->bbt_options for BBT
> - Use mtd_device_parse_register instead of old =
parse_mtd_partitions
>=20
> Changes for v3: Squashed following patch to make singe NAND driver =
patch
> - mtd/nand:Fix wrong usage of is_blank() in fsl_ifc_run_command
> http://patchwork.ozlabs.org/patch/136547/
> - mtd/nand: Fix IFC driver to support 2K NAND page
> http://patchwork.ozlabs.org/patch/135010/
>=20
> Changes for v4:
> - fsl_ifc_run_command: handled wait_event_timeout timeout-return =
case
> - Removed unused full_page variable
> - fsl_ifc_read_page: Updated Error message
> - fsl_ifc_nand_probe: removed possible memory leak for priv =
variable=20
>=20
>=20
> drivers/mtd/nand/Kconfig | 10 +
> drivers/mtd/nand/Makefile | 1 +
> drivers/mtd/nand/fsl_ifc_nand.c | 1072 =
+++++++++++++++++++++++++++++++++++++++
> 3 files changed, 1083 insertions(+), 0 deletions(-)
> create mode 100644 drivers/mtd/nand/fsl_ifc_nand.c
applied
- k=
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: add P1020MBG-PC platform support
From: Kumar Gala @ 2012-03-16 15:49 UTC (permalink / raw)
To: <Chang-Ming.Huang@freescale.com>; +Cc: linuxppc-dev
In-Reply-To: <1331716110-25545-1-git-send-email-Chang-Ming.Huang@freescale.com>
On Mar 14, 2012, at 4:08 AM, <Chang-Ming.Huang@freescale.com> =
<Chang-Ming.Huang@freescale.com> wrote:
> From: Jerry Huang <Chang-Ming.Huang@freescale.com>
>=20
> The p1020mbg-pc has the similar feature as the p1020rdb.
> Therefore, p1020mbg-pc use the same platform file as the p1/p2 rdb =
board.
> Overview of P1020MBG-PC platform:
> - DDR3 2GB
> - NOR flash 64MB
> - I2C EEPROM 256Kb
> - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
> - eTSEC2 (SGMII PHY)
> - eTSEC3 (RGMII PHY)
> - SDHC
> - 2 USB ports
> - 4 TDM ports
> - PCIe (Lane1 to dual SATA controller)
>=20
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 23 =
+++++++++++++++++++++++
> 1 files changed, 23 insertions(+), 0 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: Clean up partition nodes in dts for MPC8572DS
From: Kumar Gala @ 2012-03-16 15:49 UTC (permalink / raw)
To: Jia Hongtao; +Cc: linuxppc-dev
In-Reply-To: <1329790283-22962-1-git-send-email-B38951@freescale.com>
On Feb 20, 2012, at 8:11 PM, Jia Hongtao wrote:
> Signed-off-by: Jin Qing <b24347@freescale.com>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8572ds.dtsi | 50 =
+++++++++++++++++++++------------
> 1 files changed, 32 insertions(+), 18 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH 1/2] [v4] powerpc/85xx: p1022ds: disable the NOR flash node if video is enabled
From: Kumar Gala @ 2012-03-16 15:48 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1329351948-20581-1-git-send-email-timur@freescale.com>
On Feb 15, 2012, at 6:25 PM, Timur Tabi wrote:
> The Freescale P1022 has a unique pin muxing "feature" where the DIU =
video
> controller's video signals are muxed with 24 of the local bus address =
signals.
> When the DIU is enabled, the bulk of the local bus is disabled, =
preventing
> access to memory-mapped devices like NOR flash and the pixis FPGA.
>=20
> Therefore, if the DIU is going to be enabled, then memory-mapped =
devices on
> the localbus, like NOR flash, need to be disabled.
>=20
> This also means that the localbus is not a 'simple-bus' any more, so =
remove
> that string from the compatible node.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 6 ++-
> arch/powerpc/platforms/85xx/p1022_ds.c | 71 =
+++++++++++++++++++++++++++
> 2 files changed, 76 insertions(+), 1 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH 2/2] [v4] powerpc/85xx: create 32-bit DTS for the P1022DS
From: Kumar Gala @ 2012-03-16 15:48 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1329351948-20581-2-git-send-email-timur@freescale.com>
On Feb 15, 2012, at 6:25 PM, Timur Tabi wrote:
> Create a 32-bit address space version of p1022ds.dts. To avoid =
confusion,
> p1022ds.dts is renamed to p1022ds_36b.dts. We also create =
p1022ds.dtsi
> to store some common nodes.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/p1022ds.dts | 274 =
---------------------------------
> arch/powerpc/boot/dts/p1022ds.dtsi | 234 =
++++++++++++++++++++++++++++
> arch/powerpc/boot/dts/p1022ds_32b.dts | 103 ++++++++++++
> arch/powerpc/boot/dts/p1022ds_36b.dts | 103 ++++++++++++
> 4 files changed, 440 insertions(+), 274 deletions(-)
> delete mode 100644 arch/powerpc/boot/dts/p1022ds.dts
> create mode 100644 arch/powerpc/boot/dts/p1022ds.dtsi
> create mode 100644 arch/powerpc/boot/dts/p1022ds_32b.dts
> create mode 100644 arch/powerpc/boot/dts/p1022ds_36b.dts
applied
- k=
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/dts: Add magic-packet properties for etsec
From: Kumar Gala @ 2012-03-16 15:48 UTC (permalink / raw)
To: Xie Xiaobo; +Cc: linuxppc-dev
In-Reply-To: <1326794391-6105-2-git-send-email-X.Xie@freescale.com>
On Jan 17, 2012, at 3:59 AM, Xie Xiaobo wrote:
> The properties indicates that the hardware supports waking up via =
magic packet.
>=20
> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi | 3 ++-
> 4 files changed, 8 insertions(+), 4 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/dts: Add some DTS nodes and attributes for mpc8536ds
From: Kumar Gala @ 2012-03-16 15:48 UTC (permalink / raw)
To: Xie Xiaobo; +Cc: linuxppc-dev
In-Reply-To: <1326794391-6105-1-git-send-email-X.Xie@freescale.com>
On Jan 17, 2012, at 3:59 AM, Xie Xiaobo wrote:
> 1. Add partitions for NOR and NAND Flash.
> 2. Additional attributes for sdhc.
>=20
> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 5 ++
> arch/powerpc/boot/dts/mpc8536ds.dts | 6 ++-
> arch/powerpc/boot/dts/mpc8536ds.dtsi | 93 =
+++++++++++++++++++++++++
> arch/powerpc/boot/dts/mpc8536ds_36b.dts | 8 ++-
> 4 files changed, 109 insertions(+), 3 deletions(-)
applied
- k=
^ permalink raw reply
* Re: [PATCH 3/4] powerpc/85xx: add the P1020MBG-PC DTS support
From: Kumar Gala @ 2012-03-16 15:40 UTC (permalink / raw)
To: <Chang-Ming.Huang@freescale.com>; +Cc: linuxppc-dev
In-Reply-To: <1331716110-25545-3-git-send-email-Chang-Ming.Huang@freescale.com>
On Mar 14, 2012, at 4:08 AM, <Chang-Ming.Huang@freescale.com> =
<Chang-Ming.Huang@freescale.com> wrote:
> + partition@0 {
> + /* 128KB for DTB Image */
> + reg =3D <0x0 0x00020000>;
> + label =3D "NOR (RO) DTB Image";
> + read-only;
> + };
> +
How many times are we going to say to remove '(RO)' from the labels???
- k=
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/p2020rdb: move the NAND address.
From: Kumar Gala @ 2012-03-16 15:13 UTC (permalink / raw)
To: Sebastian Andrzej Siewior; +Cc: linuxppc-dev
In-Reply-To: <1331833228-14903-1-git-send-email-bigeasy@linutronix.de>
On Mar 15, 2012, at 12:40 PM, Sebastian Andrzej Siewior wrote:
> It is not at 0xffa00000. According to current u-boot source the NAND
> controller is always at 0xff800000 and it is either at CS0 or CS1
> depending on NAND or NAND+NOR mode. In 36bit mode it is shifted to
> 0xfff800000 but it has always an eight there and never an A.
>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> ---
> arch/powerpc/boot/dts/p2020rdb.dts | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
applied
- k
^ permalink raw reply
* Re: linux-next: manual merge of the char-misc tree with the powerpc tree
From: Greg KH @ 2012-03-16 15:29 UTC (permalink / raw)
To: Stephen Rothwell
Cc: Arnd Bergmann, linux-kernel, Masanari Iida, linux-next,
Paul Mackerras, linuxppc-dev
In-Reply-To: <20120316165207.5a4f0985863b5ae7c50bdd81@canb.auug.org.au>
On Fri, Mar 16, 2012 at 04:52:07PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the char-misc tree got a conflict in
> drivers/char/viotape.c between commit ba7a4822b48f ("powerpc: Remove some
> of the legacy iSeries specific device drivers") from the powerpc tree and
> commit 5fb15db4376f ("char: Fix typo in viotape.c") from the char-misc
> tree.
>
> The former removed this file, so I did that.
Sounds good to me, thanks.
greg k-h
^ permalink raw reply
* Re: [PATCH] powerpc/fsl_msi : return proper error value when ioremap failed.
From: Kumar Gala @ 2012-03-16 15:24 UTC (permalink / raw)
To: soniccat.liu; +Cc: linuxppc-dev, timur
In-Reply-To: <1331246857-5622-1-git-send-email-soniccat.liu@gmail.com>
On Mar 8, 2012, at 4:47 PM, soniccat.liu@gmail.com wrote:
> From: Liu Shuo <soniccat.liu@gmail.com>
>
> Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
> ---
> arch/powerpc/sysdev/fsl_msi.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
applied
- k
^ permalink raw reply
* Re: [PATCH] P1021: set IReady in QE Microcode Upload
From: Kumar Gala @ 2012-03-16 15:21 UTC (permalink / raw)
To: Tabi Timur-B04825
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Kokoris, Ioannis
In-Reply-To: <0154F680-D9F4-4CE1-BF5E-11884AD0ED4A@freescale.com>
On Nov 24, 2011, at 7:57 AM, Tabi Timur-B04825 wrote:
> On Nov 24, 2011, at 1:55 AM, Kumar Gala <galak@kernel.crashing.org> =
wrote:
>=20
>>>=20
>>> I'll have to check. But this patch can't be applied as-is unless =
it's
>>> proven safe for all QE-enabled chips.
>>=20
>> Any update on trying this on a MPC8323?
>=20
> Haiying said it should be ok, but I haven't tried it yet. I'll try it =
on Monday.
Did you ever test this?
- k=
^ permalink raw reply
* Re: [PATCH] p1010rdb: gianfar config does not have queues.
From: Kumar Gala @ 2012-03-16 15:20 UTC (permalink / raw)
To: Aggrwal Poonam-B10812
Cc: PPC list, U Bhaskar-B22300, Robin Holt, Eric Dumazet
In-Reply-To: <20110811142500.GD4926@sgi.com>
On Aug 11, 2011, at 9:25 AM, Robin Holt wrote:
> If I have the the fsl,num_rx_queues and fsl,num_tx_queues properties
> defined in the p1010's device tree file, I get a kernel panic very
> shortly after boot. The failure indicates we are configuring the
> gianfar.c driver for a queue depth greater than actual. Removing the
> properties got the problem resolved.
>=20
> Signed-off-by: Robin Holt <holt@sgi.com>
> To: U Bhaskar-B22300 <B22300@freescale.com>
> Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
> Cc: Eric Dumazet <eric.dumazet@gmail.com>
Poonam,
Can you comment on this patch, does it look correct?
- k
>=20
> diff --git a/arch/powerpc/boot/dts/p1010si.dtsi =
b/arch/powerpc/boot/dts/p1010si.dtsi
> index 7f51104..91566aa 100644
> --- a/arch/powerpc/boot/dts/p1010si.dtsi
> +++ b/arch/powerpc/boot/dts/p1010si.dtsi
> @@ -258,8 +258,6 @@
> device_type =3D "network";
> model =3D "eTSEC";
> compatible =3D "fsl,etsec2";
> - fsl,num_rx_queues =3D <0x8>;
> - fsl,num_tx_queues =3D <0x8>;
> local-mac-address =3D [ 00 00 00 00 00 00 ];
> interrupt-parent =3D <&mpic>;
>=20
> @@ -280,8 +278,6 @@
> device_type =3D "network";
> model =3D "eTSEC";
> compatible =3D "fsl,etsec2";
> - fsl,num_rx_queues =3D <0x8>;
> - fsl,num_tx_queues =3D <0x8>;
> local-mac-address =3D [ 00 00 00 00 00 00 ];
> interrupt-parent =3D <&mpic>;
>=20
> @@ -302,8 +298,6 @@
> device_type =3D "network";
> model =3D "eTSEC";
> compatible =3D "fsl,etsec2";
> - fsl,num_rx_queues =3D <0x8>;
> - fsl,num_tx_queues =3D <0x8>;
> local-mac-address =3D [ 00 00 00 00 00 00 ];
> interrupt-parent =3D <&mpic>;
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
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