* Re: [PATCH][RFC] mpc52xx, common: setup port_config and cdm settings through DTS
From: Wolfram Sang @ 2012-03-19 8:37 UTC (permalink / raw)
To: Anatolij Gustschin; +Cc: Heiko Schocher, linuxppc-dev, Wolfgang Denk
In-Reply-To: <20120319002507.275d73ef@wker>
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On Mon, Mar 19, 2012 at 12:25:07AM +0100, Anatolij Gustschin wrote:
> Hi Heiko,
>
> On Tue, 19 Apr 2011 08:04:05 +0200
> Heiko Schocher <hs@denx.de> wrote:
>
> > If firmware does not setup the "GPS Port Configuration Register"
> > and the "CDM 48MHz Fractional Divider Configuration Register",
> > it can be corrected through DTS.
> >
> > Signed-off-by: Heiko Schocher <hs@denx.de>
> > cc: devictree-discuss@lists.ozlabs.org
> > cc: linuxppc-dev@lists.ozlabs.org
> > cc: Grant Likely <glikely@secretlab.ca>
> > cc: Wolfgang Denk <wd@denx.de>
> > ---
> > .../devicetree/bindings/powerpc/fsl/mpc5200.txt | 16 +++++++++++
> > arch/powerpc/platforms/52xx/mpc52xx_common.c | 27 ++++++++++++++++++++
> > 2 files changed, 43 insertions(+), 0 deletions(-)
>
> Applied slightly modified patch to mpc5xxx next.
Given that the patch was sent nearly one year ago and it even got
modified, could please resend it to the list before applying?
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* [PATCH] powerpc/mpc52xx: setup port_config and CDM settings through DT
From: Anatolij Gustschin @ 2012-03-19 8:51 UTC (permalink / raw)
To: linuxppc-dev
Cc: devictree-discuss, Heiko Schocher, Grant Likely, Wolfgang Denk
In-Reply-To: <1303193045-20111-1-git-send-email-hs@denx.de>
From: Heiko Schocher <hs@denx.de>
If firmware does not setup the "GPS Port Configuration Register"
and the "CDM 48MHz Fractional Divider Configuration Register",
it can be corrected by additional properties in the device tree.
Add appropriate code to utility functions and document used
bindings.
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: devictree-discuss@lists.ozlabs.org
cc: linuxppc-dev@lists.ozlabs.org
cc: Grant Likely <glikely@secretlab.ca>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
.../devicetree/bindings/powerpc/fsl/mpc5200.txt | 17 ++++++++++++
arch/powerpc/platforms/52xx/mpc52xx_common.c | 27 ++++++++++++++++++++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
index 4ccb2cd..4478585 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
@@ -155,6 +155,10 @@ Each GPIO controller node should have the empty property gpio-controller and
according to the bit numbers in the GPIO control registers. The second cell
is for flags which is currently unused.
+If firmware does not setup pin-multiplexing (port_config) correct, it
+can be modified through the "fsl,init-port-config" property in the
+"fsl,mpc5200-gpio" node.
+
fsl,mpc5200-fec nodes
---------------------
The FEC node can specify one of the following properties to configure
@@ -196,3 +200,16 @@ External interrupts:
fsl,mpc5200-mscan nodes
-----------------------
See file can.txt in this directory.
+
+fsl,mpc5200-cdm nodes
+---------------------
+- setup "CDM 48MHz Fractional Divider Configuration Register"
+ If firmware does not setup this register correct, you can
+ modify it using the following properties:
+
+ - fsl,init-ext-48mhz-en
+ see MPC5200BUM Table 5-11 Bits 5-7
+ - fsl,init-fd-enable
+ see MPC5200BUM Table 5-11 Bit 15
+ - fsl,init-fd-counters
+ see MPC5200BUM Table 5-11 Bits 16-31
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 369fd54..a499848 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -137,6 +137,8 @@ void __init
mpc52xx_map_common_devices(void)
{
struct device_node *np;
+ const u32 *prop;
+ int plen;
/* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
* possibly from a interrupt context. wdt is only implement
@@ -154,11 +156,36 @@ mpc52xx_map_common_devices(void)
/* Clock Distribution Module, used by PSC clock setting function */
np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
mpc52xx_cdm = of_iomap(np, 0);
+ prop = of_get_property(np, "fsl,init-ext-48mhz-en", &plen);
+ if (prop) {
+ pr_debug("ext-48mhz-en: old:%x new:%x\n",
+ in_8(&mpc52xx_cdm->ext_48mhz_en), *prop);
+ out_8(&mpc52xx_cdm->ext_48mhz_en, *prop & 0x07);
+ }
+ prop = of_get_property(np, "fsl,init-fd-enable", &plen);
+ if (prop) {
+ pr_debug("fd-enable: old:%x new:%x\n",
+ in_8(&mpc52xx_cdm->fd_enable), *prop);
+ out_8(&mpc52xx_cdm->fd_enable, *prop & 0x01);
+ }
+ prop = of_get_property(np, "fsl,init-fd-counters", &plen);
+ if (prop) {
+ pr_debug("fd-counters: old:%x new:%x\n",
+ in_be16(&mpc52xx_cdm->fd_counters), *prop);
+ out_be16(&mpc52xx_cdm->fd_counters, *prop & 0x7777);
+ }
of_node_put(np);
/* simple_gpio registers */
np = of_find_matching_node(NULL, mpc52xx_gpio_simple);
simple_gpio = of_iomap(np, 0);
+ /* fixup the port_config register */
+ prop = of_get_property(np, "fsl,init-port-config", &plen);
+ if (prop) {
+ pr_debug("port-config: old:%x new:%x\n",
+ in_be32(&simple_gpio->port_config), *prop);
+ out_be32(&simple_gpio->port_config, *prop);
+ }
of_node_put(np);
/* wkup_gpio registers */
--
1.7.7.6
^ permalink raw reply related
* Re: [PATCH][RFC] mpc52xx, common: setup port_config and cdm settings through DTS
From: Anatolij Gustschin @ 2012-03-19 8:53 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Heiko Schocher, linuxppc-dev, Wolfgang Denk
In-Reply-To: <20120319083724.GA2484@pengutronix.de>
Hi Wolfram,
On Mon, 19 Mar 2012 09:37:24 +0100
Wolfram Sang <w.sang@pengutronix.de> wrote:
...
> > Applied slightly modified patch to mpc5xxx next.
>
> Given that the patch was sent nearly one year ago and it even got
> modified, could please resend it to the list before applying?
Yes, done.
Thanks,
Anatolij
^ permalink raw reply
* mpc5125 shared uart-spi driver
From: memorylost @ 2012-03-19 13:45 UTC (permalink / raw)
To: linuxppc-dev
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Hi all,
I am developing on a custom mpc5125 board.
The hardware people designed the board so that the console serial port (PSC1 as ttyPSC0) is "shared" with a 74HC595 shift register (!!),
which drivers some leds.
In other words: when I want to drive the leds I have to "switch" the port in spi mode, do the spi transfer, then return to uart serial mode.
A strobe pin allows not to disturb leds when uart mode is active.
This configuration surely will cause some glitches on the serial port, but finally it is not a big problem, since I use the serial console only as a debug help.
Uart works at 115200 bps, spi works at 10 MHz.
So I am trying to find a "nice and elegant" way to do this by (eventually) tweaking the spi driver : my first idea is
declaring in the dts file uart and spi on the same address, but "tweak" spi so that it does probe and then
puts the port as it was before probing (uart mode).
Then I should modify the spi driver so that before doing transfers it puts the port in spi mode, and after transfers
it puts back to uart.
Kernel is 2.6.29 .
Any suggestions are welcome...
Thanks,
regards
Lucio Dona'
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^ permalink raw reply
* Re: [PATCH v2 0/9] DMA engine cookie handling cleanups
From: Vinod Koul @ 2012-03-19 14:35 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Warren, Linus Walleij, Srinidhi Kasagar, Barry Song,
Dan Williams, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1331649534.1727.27.camel@vkoul-udesk3>
On Tue, 2012-03-13 at 20:08 +0530, Vinod Koul wrote:
> On Tue, 2012-03-13 at 12:31 +0000, Russell King - ARM Linux wrote:
> > On Tue, Mar 13, 2012 at 02:10:36PM +0530, Vinod Koul wrote:
> > > Please see if the below patch is the right fix for build failures in
> > > addition to one suggested by Jassi.
> >
> > I'm not sure that Jassi's solution is correct - and I'm wondering whether
> > any of the DMA engine drivers do the right thing when transfers are
> > terminated. Is it right for the DMA status function to return IN_PROGRESS
> > for a previously submitted cookie which has been terminated?
> >
> > I can see two answers to that, both equally valid:
> >
> > 1. It allows you to find out exactly where the DMA engine got to before
> > the transfer was terminated, and therefore recover from the termination
> > if you wish to.
> >
> > 2. Returning in-progress when a cookie will never be completed is
> > misleading, and could be misinterpreted by users of the tx_status
> > function, especially if they are waiting for a particular transaction
> > to complete.
> >
> > Maybe we need to introduce a DMA_TERMINATED status?
> I would agree with you that DMA_TERMINATED seems to be correct option.
> IN_PROGRESS would certainly confuse...
> I will drop Jassi's fix from this branch. Care to send the patch?
Even after adding such a state in dmaengine for DMA_TERMINATED, it
doesn't make much sense. In TERMINATE_ALL we do not update the
chan->complete value. So after client has terminated the channel it can
easily test to see if cookie is completed (before terminate will return
SUCCESS) or aborted (will return DMA_IN_PROGRESS)
So at present I am leaning on 1 :)
If I don't hear any opposition I will merge this (with Jassi's fix) and
then send pull to Linus
--
~Vinod
^ permalink raw reply
* Re: Problem with framebuffer mmap on platforms with large addressing
From: Dmitry Eremin-Solenikov @ 2012-03-19 14:42 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linux-fbdev, Florian Tobias Schandinat, Tony Breeds, linuxppc-dev
In-Reply-To: <1332103797.3105.202.camel@pasglop>
On Mon, Mar 19, 2012 at 12:49 AM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Sun, 2012-03-18 at 18:04 +0400, Dmitry Eremin-Solenikov wrote:
>> On Sun, Mar 18, 2012 at 4:46 AM, Benjamin Herrenschmidt
>> <benh@kernel.crashing.org> wrote:
>> > On Sat, 2012-03-17 at 20:04 +0400, Dmitry Eremin-Solenikov wrote:
>> >> Hello,
>> >>
>> >> I'm trying to make framebuffer to work on PPC460EX board (canyonlands).
>> >>
>> >> The peculiarity of this platform is the fact that it has
>> >> sizeof(unsigned long) = 4,
>> >> but physical address on it is 36 bits width. It is a common to various pieces
>> >> of the code to expect that unsigned long variable is able to contain physical
>> >> address. Most of those places are easy to fix.
>> >
>> > Yes. In fact, Tony (CC) has some patches to fix a lot of the DRM
>> > infrastructure (we have radeon KMS working on a similar platform).
>>
>> That is interesting! Are those patches published or otherwise available
>> somewhere? We are also very interested in enabling Canyonlands
>> with Radeon KMS!
>
> You will run into additional problems with 460 due to the fact that it's
> not cache coherent for DMA. Tony patches don't address that part of the
> problem (they were used on a 476 based platform).
Hmm. Could you please spill a little bit more of details? Also are those patches
for 476 merged or present somewhere?
>
>> > In fact, we could make the new structure such that it doesn't break
>> > userspace compatibility with 64-bit architectures at all, ie, the "new"
>> > and "compat" ioctl could remain entirely equivalent on 64-bit.
>>
>> I remember stuff about compat_ioctl, but I have never used/implemented
>> that. Are there any details of requirements for the structures being passed?
>
> In that specific case, I meant something else. IE. The old ioctl could
> remain unchanged, and the new ioctl make the same as the old one on
> 64-bit platforms.
I don't think this kind of magic would be good. I'd just stick to the new
ioctl.
>
> Cheers,
> Ben.
>
>
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: don't call of_platform_bus_probe() twice
From: Grant Likely @ 2012-03-19 16:04 UTC (permalink / raw)
To: Timur Tabi, Kumar Gala
Cc: Scott Wood, Dmitry Eremin-Solenikov, linuxppc-dev list
In-Reply-To: <4F63A7A4.4000205@freescale.com>
On Fri, 16 Mar 2012 15:50:44 -0500, Timur Tabi <timur@freescale.com> wrote:
> Kumar Gala wrote:
>
> > This seems like paper taping over the real issue. We should be able to call of_platform_bus_probe() multiple times.
>
> I tried debugging it, but I couldn't figure it out. My guess is that the
> nodes probed by of_platform_bus_probe() are somehow "reserved", so that
> the second time it's called, they're skipped. I figured that this was
> just a side-effect of the way the OF layer works.
The problem is that you want to create devices for grandchildren
nodes when the bus ids passed in don't match any of the child nodes so
the of_platform_bus_probe() doesn't iterate down to that level. This
is correct and expected behaviour.
g.
^ permalink raw reply
* [PATCH] [v3] powerpc/8xxx: remove 85xx/86xx restrictions from fsl_guts.h
From: Timur Tabi @ 2012-03-19 16:06 UTC (permalink / raw)
To: galak, broonie, linuxppc-dev, alsa-devel
Remove the check for CONFIG_PPC_85xx and CONFIG_PPC_86xx from fsl_guts.h.
The check was originally intended to allow the same header file to
be used on 85xx and 86xx systems, even though the Global Utilities
register could be different. It turns out that they're not actually
different, and so the check is not necessary. In addition, neither
macro is defined for 64-bit e5500 kernels, so that causes a build
break.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
The ASoC part of this patch applies cleanly to the ASoC for-3.4 branch,
so this patch should not cause any merge conflicts if carried on the
PowerPC branch, so I suggest that Kumar pick this up for 3.4 (it fixes a
potential 64-bit book-e build break), with an ACK from Mark.
arch/powerpc/include/asm/fsl_guts.h | 26 +++++---------------------
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 2 +-
arch/powerpc/platforms/85xx/p1022_ds.c | 4 ++--
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 2 +-
sound/soc/fsl/mpc8610_hpcd.c | 8 ++++----
sound/soc/fsl/p1022_ds.c | 10 +++++-----
7 files changed, 19 insertions(+), 35 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index ce04530..aa4c488 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -16,15 +16,6 @@
#define __ASM_POWERPC_FSL_GUTS_H__
#ifdef __KERNEL__
-/*
- * These #ifdefs are safe because it's not possible to build a kernel that
- * runs on e500 and e600 cores.
- */
-
-#if !defined(CONFIG_PPC_85xx) && !defined(CONFIG_PPC_86xx)
-#error Only 85xx and 86xx SOCs are supported
-#endif
-
/**
* Global Utility Registers.
*
@@ -36,11 +27,7 @@
* different names. In these cases, one name is chosen to avoid extraneous
* #ifdefs.
*/
-#ifdef CONFIG_PPC_85xx
-struct ccsr_guts_85xx {
-#else
-struct ccsr_guts_86xx {
-#endif
+struct ccsr_guts {
__be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
__be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
__be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */
@@ -77,11 +64,8 @@ struct ccsr_guts_86xx {
u8 res0a8[0xb0 - 0xa8];
__be32 rstcr; /* 0x.00b0 - Reset Control Register */
u8 res0b4[0xc0 - 0xb4];
-#ifdef CONFIG_PPC_85xx
- __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register */
-#else
- __be32 elbcvselcr; /* 0x.00c0 - eLBC Voltage Select Ctrl Reg */
-#endif
+ __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register
+ Called 'elbcvselcr' on 86xx SOCs */
u8 res0c4[0x224 - 0xc4];
__be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
__be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
@@ -136,7 +120,7 @@ struct ccsr_guts_86xx {
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx)
*/
-static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts,
+static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
unsigned int co, unsigned int ch, unsigned int device)
{
unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
@@ -172,7 +156,7 @@ static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts,
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* value: the new value for the bit (0 or 1)
*/
-static inline void guts_set_pmuxcr_dma(struct ccsr_guts_86xx __iomem *guts,
+static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
unsigned int co, unsigned int ch, unsigned int value)
{
if ((ch == 0) || (ch == 3)) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index f33662b..e82f06f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -271,7 +271,7 @@ static void __init mpc85xx_mds_qe_init(void)
if (machine_is(p1021_mds)) {
- struct ccsr_guts_85xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
np = of_find_node_by_name(NULL, "global-utilities");
if (np) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index db214cd..1a66c3d 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -128,7 +128,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
if (machine_is(p1025_rdb)) {
- struct ccsr_guts_85xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
np = of_find_node_by_name(NULL, "global-utilities");
if (np) {
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 0fe88e3..e74b7cd 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -150,7 +150,7 @@ static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
{
struct device_node *guts_node;
struct device_node *indirect_node = NULL;
- struct ccsr_guts_85xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
u8 __iomem *lbc_lcs0_ba = NULL;
u8 __iomem *lbc_lcs1_ba = NULL;
u8 b;
@@ -269,7 +269,7 @@ exit:
void p1022ds_set_pixel_clock(unsigned int pixclock)
{
struct device_node *guts_np = NULL;
- struct ccsr_guts_85xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
unsigned long freq;
u64 temp;
u32 pxclk;
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 13fa9a6..b8b1f33 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -226,7 +226,7 @@ void mpc8610hpcd_set_monitor_port(enum fsl_diu_monitor_port port)
void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
{
struct device_node *guts_np = NULL;
- struct ccsr_guts_86xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
unsigned long freq;
u64 temp;
u32 pxclk;
diff --git a/sound/soc/fsl/mpc8610_hpcd.c b/sound/soc/fsl/mpc8610_hpcd.c
index 0ea4a5a..1f4c3b7 100644
--- a/sound/soc/fsl/mpc8610_hpcd.c
+++ b/sound/soc/fsl/mpc8610_hpcd.c
@@ -58,9 +58,9 @@ static int mpc8610_hpcd_machine_probe(struct snd_soc_card *card)
{
struct mpc8610_hpcd_data *machine_data =
container_of(card, struct mpc8610_hpcd_data, card);
- struct ccsr_guts_86xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts_86xx));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
@@ -142,9 +142,9 @@ static int mpc8610_hpcd_machine_remove(struct snd_soc_card *card)
{
struct mpc8610_hpcd_data *machine_data =
container_of(card, struct mpc8610_hpcd_data, card);
- struct ccsr_guts_86xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts_86xx));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
diff --git a/sound/soc/fsl/p1022_ds.c b/sound/soc/fsl/p1022_ds.c
index a5d4e80..d0dee59 100644
--- a/sound/soc/fsl/p1022_ds.c
+++ b/sound/soc/fsl/p1022_ds.c
@@ -46,7 +46,7 @@
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* device: The device to set as the target (CCSR_GUTS_DMUXCR_xxx)
*/
-static inline void guts_set_dmuxcr(struct ccsr_guts_85xx __iomem *guts,
+static inline void guts_set_dmuxcr(struct ccsr_guts __iomem *guts,
unsigned int co, unsigned int ch, unsigned int device)
{
unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
@@ -90,9 +90,9 @@ static int p1022_ds_machine_probe(struct snd_soc_card *card)
{
struct machine_data *mdata =
container_of(card, struct machine_data, card);
- struct ccsr_guts_85xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts_85xx));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
@@ -164,9 +164,9 @@ static int p1022_ds_machine_remove(struct snd_soc_card *card)
{
struct machine_data *mdata =
container_of(card, struct machine_data, card);
- struct ccsr_guts_85xx __iomem *guts;
+ struct ccsr_guts __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts_85xx));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
--
1.7.10.rc1.8.ga99c5.dirty
^ permalink raw reply related
* Re: [PATCH] [v3] powerpc/8xxx: remove 85xx/86xx restrictions from fsl_guts.h
From: Mark Brown @ 2012-03-19 16:37 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, alsa-devel
In-Reply-To: <1332173199-25877-1-git-send-email-timur@freescale.com>
[-- Attachment #1: Type: text/plain, Size: 552 bytes --]
On Mon, Mar 19, 2012 at 11:06:39AM -0500, Timur Tabi wrote:
> Remove the check for CONFIG_PPC_85xx and CONFIG_PPC_86xx from fsl_guts.h.
> The check was originally intended to allow the same header file to
> be used on 85xx and 86xx systems, even though the Global Utilities
> register could be different. It turns out that they're not actually
> different, and so the check is not necessary. In addition, neither
> macro is defined for 64-bit e5500 kernels, so that causes a build
> break.
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* Re: [PATCH] Device Tree Bindings for Freescale TDM controller
From: Scott Wood @ 2012-03-19 17:27 UTC (permalink / raw)
To: Tabi Timur-B04825
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org,
Aggrwal Poonam-B10812, linuxppc-dev@lists.ozlabs.org,
Singh Sandeep-B37400
In-Reply-To: <CAOZdJXVU=1bW8_OTMecJHuWaa6_023UnUsfQTX8MGqd3E4SRAg@mail.gmail.com>
On 03/17/2012 11:07 AM, Tabi Timur-B04825 wrote:
> On Sat, Mar 17, 2012 at 2:33 AM, Aggrwal Poonam-B10812
> <B10812@freescale.com> wrote:
>>
>>>> + compatible = "fsl,p1010-tdm", "fsl,mpc8315-tdm";
>>>> + reg = <0x16000 0x200 0x2c000 0x2000>;
>>>> + clock-frequency = <0>;
>>>
>>> Show a real clock-frequency, perhaps with a comment saying it's typically
>>> filled in by boot software.
>
>> Okay.
>
> Scott, are you suggesting that Poonam put a non-zero number in the DTS
> for clock-frequency? If so, then I don't think that's a good idea, if
> U-Boot will always override it.
This is a device tree binding document, not U-Boot specific. It
describes what Linux (or another OS) can expect to see, not how it gets
there.
-Scott
^ permalink raw reply
* Re: [PATCH] Device Tree Bindings for Freescale TDM controller
From: Timur Tabi @ 2012-03-19 17:32 UTC (permalink / raw)
To: Scott Wood
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org,
Aggrwal Poonam-B10812, linuxppc-dev@lists.ozlabs.org,
Singh Sandeep-B37400
In-Reply-To: <4F676C9D.2070301@freescale.com>
Scott Wood wrote:
>> > Scott, are you suggesting that Poonam put a non-zero number in the DTS
>> > for clock-frequency? If so, then I don't think that's a good idea, if
>> > U-Boot will always override it.
> This is a device tree binding document, not U-Boot specific. It
> describes what Linux (or another OS) can expect to see, not how it gets
> there.
That doesn't really answer my question. We currently have many properties
that define a clock frequency, and the DTS sets them all to 0, with the
intent of having U-Boot update them. Now maybe these should all be
deleted, but it seems that setting them to a non-zero value is wrong,
because it might mislead people into thinking that the property is not
updated by U-Boot. When you see something like this:
clock-frequency = <0>;
It's pretty obvious that U-boot will fill it in.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH] Device Tree Bindings for Freescale TDM controller
From: Scott Wood @ 2012-03-19 17:32 UTC (permalink / raw)
To: Aggrwal Poonam-B10812
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org,
linuxppc-dev@lists.ozlabs.org, Singh Sandeep-B37400
In-Reply-To: <ACB6D0C0104CFF42A45A5D82A0DD4F3D09D518@039-SN2MPN1-013.039d.mgd.msft.net>
On 03/17/2012 02:33 AM, Aggrwal Poonam-B10812 wrote:
>>> + - compatible
>>> + Usage: required
>>> + Value type: <string>
>>> + Definition: Should contain "fsl,mpc8315-tdm".
>>> + So mpc8313 will have compatible = "fsl,mpc8315-tdm";
>>> + p1010 will have compatible "fsl,p1010-tdm", "fsl,mpc8315-tdm";
>>
>> Shouldn't mpc8313 have:
>> compatible = "fsl,mpc8313-tdm", "fsl,mpc8315-tdm"?
>>
>> I thought we were going to use 8313 as the canonical implementation, not
>> 8315.
> MPC8315 was the first FSL platform to have this controller.
> MPC8313 does not have TDM.
OK, so no example for mpc8313 then. :-)
>> Will this frequency ever need to be > 4GHz?
> Don't think so, at max this will be CCB, not sure if CCB on our platforms may get bigger than 4G ever.
Still, I think we should always make clock-frequency properties be 32/64
as the ePAPR describes, just in case.
>> Might want to specify as u32 or u64, as ePAPR suggests.
> Means Value type: <u32 or u64>?
Yes.
> In this case the driver must always use 64bit data structure to read this. Is this correct?
No, you'd use of_read_number(). Maybe factor out an of_get_frequency().
-Scott
^ permalink raw reply
* Re: [PATCH] Device Tree Bindings for Freescale TDM controller
From: Scott Wood @ 2012-03-19 17:55 UTC (permalink / raw)
To: Timur Tabi
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org,
Aggrwal Poonam-B10812, linuxppc-dev@lists.ozlabs.org,
Singh Sandeep-B37400
In-Reply-To: <4F676D9E.6000609@freescale.com>
On 03/19/2012 12:32 PM, Timur Tabi wrote:
> Scott Wood wrote:
>>>> Scott, are you suggesting that Poonam put a non-zero number in the DTS
>>>> for clock-frequency? If so, then I don't think that's a good idea, if
>>>> U-Boot will always override it.
>
>> This is a device tree binding document, not U-Boot specific. It
>> describes what Linux (or another OS) can expect to see, not how it gets
>> there.
>
> That doesn't really answer my question. We currently have many properties
> that define a clock frequency, and the DTS sets them all to 0, with the
> intent of having U-Boot update them.
Ideally these trees should be in U-Boot rather than Linux.
> Now maybe these should all be
> deleted, but it seems that setting them to a non-zero value is wrong,
> because it might mislead people into thinking that the property is not
> updated by U-Boot. When you see something like this:
>
> clock-frequency = <0>;
>
> It's pretty obvious that U-boot will fill it in.
You're assuming that this is a guide for writing dts files. If you look
at it as a guide for writing Linux code to interpret the device tree,
you'd come to the opposite conclusion.
I suggested a comment about common boot software behavior (but otherwise
show it as Linux would see it) as middle ground.
-Scott
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: don't call of_platform_bus_probe() twice
From: Timur Tabi @ 2012-03-19 18:43 UTC (permalink / raw)
To: Grant Likely; +Cc: Scott Wood, Dmitry Eremin-Solenikov, linuxppc-dev list
In-Reply-To: <20120319160452.B57D13E05A5@localhost>
Grant Likely wrote:
> The problem is that you want to create devices for grandchildren
> nodes when the bus ids passed in don't match any of the child nodes so
> the of_platform_bus_probe() doesn't iterate down to that level. This
> is correct and expected behaviour.
Well, I'm not still not 100% sure on what I'm supposed to do, so I tried this:
static struct of_device_id __initdata p1022_ds_ids[] = {
/* The audio driver probes the SSI DMA channels individually */
{ .compatible = "fsl,ssi-dma-channel", },
{},
};
static int __init p1022_ds_publish_devices(void)
{
struct device_node *np;
int ret;
mpc85xx_common_publish_devices();
for_each_compatible_node(np, NULL, "fsl,eloplus-dma") {
ret = of_platform_bus_probe(np, p1022_ds_ids, NULL);
if (ret)
return ret;
}
return 0;
}
It works, but it looks clunky.
For the record, this is what the DMA controller node looks like. It's a
child of the SOC node. The SSI driver probes on the "fsl,ssi-dma-channel"
nodes directly.
dma@c300 {
cell-index = <0x1>;
ranges = <0x0 0xc100 0x200>;
reg = <0xc300 0x4>;
compatible = "fsl,eloplus-dma";
#size-cells = <0x1>;
#address-cells = <0x1>;
dma-channel@180 {
interrupts = <0x4f 0x2 0x0 0x0>;
cell-index = <0x3>;
reg = <0x180 0x80>;
compatible = "fsl,eloplus-dma-channel";
};
dma-channel@100 {
interrupts = <0x4e 0x2 0x0 0x0>;
cell-index = <0x2>;
reg = <0x100 0x80>;
compatible = "fsl,eloplus-dma-channel";
};
dma-channel@80 {
phandle = <0x4>;
linux,phandle = <0x4>;
interrupts = <0x4d 0x2 0x0 0x0>;
cell-index = <0x1>;
reg = <0x80 0x80>;
compatible = "fsl,ssi-dma-channel";
};
dma-channel@0 {
phandle = <0x3>;
linux,phandle = <0x3>;
interrupts = <0x4c 0x2 0x0 0x0>;
cell-index = <0x0>;
reg = <0x0 0x80>;
compatible = "fsl,ssi-dma-channel";
};
};
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH v2 net-next 0/4] Gianfar byte queue limits
From: David Miller @ 2012-03-19 20:46 UTC (permalink / raw)
To: paul.gortmaker; +Cc: netdev, linuxppc-dev, eric.dumazet, therbert
In-Reply-To: <1332106761-18293-1-git-send-email-paul.gortmaker@windriver.com>
From: Paul Gortmaker <paul.gortmaker@windriver.com>
Date: Sun, 18 Mar 2012 17:39:17 -0400
> The following changes since commit cdf485be3a63d1f34293740fb726088c6840ceea:
>
> ixgbe: dcb: use DCB config values for FCoE traffic class on open (2012-03-14 00:49:10 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux.git gianfar-bql
>
> for you to fetch changes up to 5407b14c6792d6ff122ecb1a2a6acffad60ef389:
>
> gianfar: use netif_tx_queue_stopped instead of __netif_subqueue_stopped (2012-03-18 17:11:22 -0400)
Pulled, thanks.
^ permalink raw reply
* Re: 3.3.0-rc6-next-20120308 boot failure on POWER7 blade
From: Jesse Barnes @ 2012-03-20 0:37 UTC (permalink / raw)
To: Stephen Rothwell; +Cc: linuxppc-dev, yinghai, Anton Blanchard, linux-kernel
In-Reply-To: <20120315110516.4112fe49dac537b52d4ddc25@canb.auug.org.au>
Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>Hi Jesse,
>
>On Fri, 9 Mar=
2012 10:28:46 -0800 Jesse Barnes
><jbarnes@virtuousgeek.org> wrote:
>>
>> =
On Fri, 9 Mar 2012 14:46:45 +1100
>> Anton Blanchard <anton@samba.org> wrot=
e:
>>
>> > > Looks like something that got fixed but the new patches from
=
>Bjorn
>> > > aren't in next yet. I'll fwd you the patch separately to appl=
y on
>> > > top of what you have see if that helps (to confirm that's indee=
d
>the
>> > > issue).
>> >
>> > Thanks, confirmed that it fixes it. Patch =
below in case anyone else
>is
>> > hitting it.
>> >
>> > --
>> >
>> > On =
Sat, 2012-03-03 at 08:52 +1100, Benjamin Herrenschmidt wrote:
>> >
>> > > =
Or give me a chance to dig :-) I'll have a look next week.
>> >
>> > This =
is indeed what bjorn suspected on irc, this patch fixes it:
>> >
>> > (Bjo=
rn, please fold it in the original offending patch)
>>
>> Thanks guys; I'l=
l push the fixes to -next when I get to a real
>network
>> (at the airport =
now about to run out of battery with a crappy
>> connection).
>
>Ping?
>
>I=
am also still carrying the build fix for
>arch/powerpc/kernel/pci-common.c=
>since Feb 27.
>
>--
>Cheers,
>Stephen Rothwell sfr@ca=
nb.auug.org.au
>http://www.canb.auug.org.au/~sfr/
Arg yeah I'll apply the =
fixups before sending the pull req. This trip has been a nightmare (14+ hou=
r work days and no connectivity and a week longer than expected) but it's f=
inally over, and just in time!
Jesse
--
Jesse Barnes, Intel Open Source =
Technology Center
^ permalink raw reply
* [PATCH][v2] Device Tree Bindings for Freescale TDM controller
From: Poonam Aggrwal @ 2012-03-20 1:02 UTC (permalink / raw)
To: devicetree-discuss, linuxppc-dev; +Cc: Sandeep Singh, Poonam Aggrwal
This TDM controller is available in various Freescale SOCs like MPC8315, P1020,
P1022, P1010.
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
Changes in v2:
- Incorporated Scott's Review comments
Documentation/devicetree/bindings/tdm/fsl-tdm.txt | 67 +++++++++++++++++++++
1 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/tdm/fsl-tdm.txt
diff --git a/Documentation/devicetree/bindings/tdm/fsl-tdm.txt b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
new file mode 100644
index 0000000..6553dbe
--- /dev/null
+++ b/Documentation/devicetree/bindings/tdm/fsl-tdm.txt
@@ -0,0 +1,67 @@
+=====================================================================
+TDM Device Tree Binding
+Copyright (C) 2012 Freescale Semiconductor Inc.
+
+NOTE: The bindings described in this document are preliminary
+and subject to change.
+
+=====================================================================
+TDM (Time Division Multiplexing)
+
+DESCRIPTION
+
+The TDM is full duplex serial port designed to allow various devices including
+digital signal processors (DSPs) to communicate with a variety of serial devices
+including industry standard framers, codecs, other DSPs and microprocessors.
+
+The below properties describe the device tree bindings for Freescale TDM
+controller.
+This TDM controller is available on various Freescale Processors like
+MPC8315, P1020, P1022 and P1010.
+
+PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should contain "fsl,mpc8315-tdm".
+ So mpc8315 will have compatible = "fsl,mpc8315-tdm";
+ p1010 will have compatible "fsl,p1010-tdm", "fsl,mpc8315-tdm";
+
+ - reg
+ Usage: required
+ Definition: There are two reg resources. First is for TDM registers and
+ the second for TDM DMAC registers.
+
+ - clock-frequency
+ Usage: optional
+ Value type: <u32>
+ Definition: The frequency at which the TDM block is operating.
+
+ - interrupts
+ Usage: required
+ Definition: This field defines the interrupt specifiers for the two
+ interrupts. First is for TDM error and second for TDM DMAC.
+
+ - phy-handle
+ Usage: optional
+ Value type: <phandle>
+ Definition: Phandle of the line controller node or framer node eg. SLIC,
+ E1/T1 etc.
+
+ - fsl,max-time-slots
+ Usage: required
+ Value type: <u32>
+ Definition: Maximum number of 8-bit time slots in one TDM frame.
+ This is the maximum number which TDM hardware supports.
+
+EXAMPLE
+
+ tdm@16000 {
+ compatible = "fsl,p1010-tdm", "fsl,mpc8315-tdm";
+ reg = <0x16000 0x200 0x2c000 0x2000>;
+ clock-frequency = <399999999>; /* typically filled by u-boot */
+ interrupts = <16 8 62 8>;
+ phy-handle = <&zarlink1>;
+ fsl-max-time-slots = <128>;
+ };
--
1.6.5.6
^ permalink raw reply related
* linux-next: build failure after merge of the pci tree (actually powerpc tree related)
From: Stephen Rothwell @ 2012-03-20 3:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: ppc-dev, linux-next, Suzuki Poulose, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2818 bytes --]
Hi Ben,
After merging the pci tree, today's linux-next build (powerpc ppc64_defconfig)
failed like this:
powerpc64-linux-ld: section .text loaded at [0000000000e00000,0000000000e0721b] overlaps section .kernel:dtb loaded at [0000000000e00000,0000000000e0066f]
I have applied this patch for today (thanks to Tony Breeds and David
Gibson):
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Tue, 20 Mar 2012 14:13:51 +1100
Subject: [PATCH] powerpc: do not adjust the load address for ps3
Commit c55aef0e5bc6 "powerpc/boot: Change the load address for the wrapper
to fit the kernel" adjusted the laod address if the uncompressed kernel
was too large. Ps3 does not compress the kernel and uses a different
linker script, so do not adjust the load address in that case.
fixes this build error:
powerpc64-linux-ld: section .text loaded at [0000000000e00000,0000000000e0721b] overlaps section .kernel:dtb loaded at [0000000000e00000,0000000000e0066f]
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/boot/wrapper | 22 +++++++++++++---------
1 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index f090e6d..6761c74 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -144,6 +144,7 @@ tmp=$tmpdir/zImage.$$.o
ksection=.kernel:vmlinux.strip
isection=.kernel:initrd
link_address='0x400000'
+make_space=y
case "$platform" in
pseries)
@@ -210,6 +211,7 @@ ps3)
ksection=.kernel:vmlinux.bin
isection=.kernel:initrd
link_address=''
+ make_space=n
pie=
;;
ep88xc|ep405|ep8248e)
@@ -278,17 +280,19 @@ else
rm -f $vmz.$$
fi
-# Round the size to next higher MB limit
-round_size=$(((strip_size + 0xfffff) & 0xfff00000))
+if [ "$make_space" = "y" ]; then
+ # Round the size to next higher MB limit
+ round_size=$(((strip_size + 0xfffff) & 0xfff00000))
-round_size=0x$(printf "%x" $round_size)
-link_addr=$(printf "%d" $link_address)
+ round_size=0x$(printf "%x" $round_size)
+ link_addr=$(printf "%d" $link_address)
-if [ $link_addr -lt $strip_size ]; then
- echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \
- "overlaps the address of the wrapper($link_address)"
- echo "INFO: Fixing the link_address of wrapper to ($round_size)"
- link_address=$round_size
+ if [ $link_addr -lt $strip_size ]; then
+ echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \
+ "overlaps the address of the wrapper($link_address)"
+ echo "INFO: Fixing the link_address of wrapper to ($round_size)"
+ link_address=$round_size
+ fi
fi
vmz="$vmz$gzip"
--
1.7.9.1
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply related
* Re: Problem with framebuffer mmap on platforms with large addressing
From: Benjamin Herrenschmidt @ 2012-03-20 5:40 UTC (permalink / raw)
To: Dmitry Eremin-Solenikov
Cc: linux-fbdev, Florian Tobias Schandinat, Tony Breeds, linuxppc-dev
In-Reply-To: <CALT56yPjkPQOaXW4Eg8c-S4+a4Omou_YYacqrsCoTAYeXO0XkA@mail.gmail.com>
> >> That is interesting! Are those patches published or otherwise available
> >> somewhere? We are also very interested in enabling Canyonlands
> >> with Radeon KMS!
> >
> > You will run into additional problems with 460 due to the fact that it's
> > not cache coherent for DMA. Tony patches don't address that part of the
> > problem (they were used on a 476 based platform).
>
> Hmm. Could you please spill a little bit more of details? Also are those patches
> for 476 merged or present somewhere?
Well, DMA on 46x isn't cache coherent. The DRM plays interesting games
with mapping/unmapping pages for DMA by the chip and I don't think we
have the right hooks to do the appropriate cache flushing on these guys,
but Tony might be able to comment, I don't know whether he tried or not.
On the other hand 476 has fully cache coherent DMA so the only problem
there is the >32-bit physical address space.
As for the patches, you'll have to wait for Tony to respond (I'll poke
him locally).
Cheers,
Ben.
> >> > In fact, we could make the new structure such that it doesn't break
> >> > userspace compatibility with 64-bit architectures at all, ie, the "new"
> >> > and "compat" ioctl could remain entirely equivalent on 64-bit.
> >>
> >> I remember stuff about compat_ioctl, but I have never used/implemented
> >> that. Are there any details of requirements for the structures being passed?
> >
> > In that specific case, I meant something else. IE. The old ioctl could
> > remain unchanged, and the new ioctl make the same as the old one on
> > 64-bit platforms.
>
> I don't think this kind of magic would be good. I'd just stick to the new
> ioctl.
>
> >
> > Cheers,
> > Ben.
> >
> >
> >
>
>
>
^ permalink raw reply
* [PATCH 3/4 v2] powerpc/85xx: add the P1020MBG-PC DTS support
From: Chang-Ming.Huang @ 2012-03-20 6:24 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jerry Huang
From: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
---
changes for v2:
- remove the lable "read-only" for DTB and kernel partition
- remove the word "RO" or "RW" from the "lable" option
arch/powerpc/boot/dts/p1020mbg-pc.dtsi | 151 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/p1020mbg-pc_32b.dts | 89 +++++++++++++++++
arch/powerpc/boot/dts/p1020mbg-pc_36b.dts | 89 +++++++++++++++++
3 files changed, 329 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1020mbg-pc.dtsi
create mode 100644 arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
create mode 100644 arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc.dtsi b/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
new file mode 100644
index 0000000..a24699c
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020mbg-pc.dtsi
@@ -0,0 +1,151 @@
+/*
+ * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x4000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* 128KB for DTB Image */
+ reg = <0x0 0x00020000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@20000 {
+ /* 3.875 MB for Linux Kernel Image */
+ reg = <0x00020000 0x003e0000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 58MB for Root file System */
+ reg = <0x00400000 0x03a00000>;
+ label = "NOR Root File System";
+ };
+
+ partition@3e00000 {
+ /* This location must not be altered */
+ /* 1M for Vitesse 7385 Switch firmware */
+ reg = <0x3e00000 0x00100000>;
+ label = "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@3f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x03f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "vitesse-7385";
+ reg = <0x2 0x0 0x20000>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link = <1 1 1000 0 0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <&phy0>;
+ tbi-handle = <&tbi1>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ /* USB2 is shared with localbus, so it must be disabled
+ by default. We can't put 'status = "disabled";' here
+ since U-Boot doesn't clear the status property when
+ it enables USB2. OTOH, U-Boot does create a new node
+ when there isn't any. So, just comment it out.
+ */
+ usb@23000 {
+ status = "disabled";
+ phy_type = "ulpi";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
new file mode 100644
index 0000000..ab8f076
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts
@@ -0,0 +1,89 @@
+/*
+ * P1020 MBG-PC Device Tree Source (32-bit address map)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+ model = "fsl,P1020MBG-PC";
+ compatible = "fsl,P1020MBG-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0x0 0xffe05000 0x0 0x1000>;
+
+ /* NOR and L2 switch */
+ ranges = <0x0 0x0 0x0 0xec000000 0x04000000
+ 0x1 0x0 0x0 0xffa00000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ reg = <0x0 0xffe09000 0x0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0x0 0xffe0a000 0x0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1020mbg-pc.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
new file mode 100644
index 0000000..9e9f401
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts
@@ -0,0 +1,89 @@
+/*
+ * P1020 MBG-PC Device Tree Source (36-bit address map)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+ model = "fsl,P1020MBG-PC";
+ compatible = "fsl,P1020MBG-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0x0 0x1000>;
+
+ /* NOR and L2 switch */
+ ranges = <0x0 0x0 0xf 0xec000000 0x04000000
+ 0x1 0x0 0xf 0xffa00000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0x0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1020mbg-pc.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
--
1.7.5.4
^ permalink raw reply related
* [PATCH 4/4 v2] powerpc/85xx: add the P1020UTM-PC DTS support
From: Chang-Ming.Huang @ 2012-03-20 6:24 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jerry Huang
In-Reply-To: <1332224685-1012-1-git-send-email-Chang-Ming.Huang@freescale.com>
From: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
---
changes for v2:
- remove the lable "read-only" for DTB and kernel partition
- remove the word "RO" or "RW" from the "lable" option
arch/powerpc/boot/dts/p1020utm-pc.dtsi | 140 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/p1020utm-pc_32b.dts | 89 ++++++++++++++++++
arch/powerpc/boot/dts/p1020utm-pc_36b.dts | 89 ++++++++++++++++++
3 files changed, 318 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1020utm-pc.dtsi
create mode 100644 arch/powerpc/boot/dts/p1020utm-pc_32b.dts
create mode 100644 arch/powerpc/boot/dts/p1020utm-pc_36b.dts
diff --git a/arch/powerpc/boot/dts/p1020utm-pc.dtsi b/arch/powerpc/boot/dts/p1020utm-pc.dtsi
new file mode 100644
index 0000000..a2d4f5f
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020utm-pc.dtsi
@@ -0,0 +1,140 @@
+/*
+ * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x2000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* 256KB for DTB Image */
+ reg = <0x0 0x00040000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@40000 {
+ /* 3.75 MB for Linux Kernel Image */
+ reg = <0x00040000 0x003c0000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 27MB for Root file System */
+ reg = <0x00400000 0x01b00000>;
+ label = "NOR Root File System";
+ };
+
+ partition@1f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x01f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ phy2: ethernet-phy@2 {
+ interrupts = <1 1 0 0>;
+ reg = <0x2>;
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ phy-handle = <&phy2>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <&phy0>;
+ tbi-handle = <&tbi1>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ /* USB2 is shared with localbus, so it must be disabled
+ by default. We can't put 'status = "disabled";' here
+ since U-Boot doesn't clear the status property when
+ it enables USB2. OTOH, U-Boot does create a new node
+ when there isn't any. So, just comment it out.
+ */
+ usb@23000 {
+ status = "disabled";
+ phy_type = "ulpi";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_32b.dts b/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
new file mode 100644
index 0000000..4bfdd89
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020utm-pc_32b.dts
@@ -0,0 +1,89 @@
+/*
+ * P1020 UTM-PC Device Tree Source (32-bit address map)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+ model = "fsl,P1020UTM-PC";
+ compatible = "fsl,P1020UTM-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0x0 0xffe05000 0x0 0x1000>;
+
+ /* NOR */
+ ranges = <0x0 0x0 0x0 0xec000000 0x02000000
+ 0x1 0x0 0x0 0xffa00000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ reg = <0x0 0xffe09000 0x0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0x0 0xffe0a000 0x0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1020utm-pc.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020utm-pc_36b.dts b/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
new file mode 100644
index 0000000..abec535
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020utm-pc_36b.dts
@@ -0,0 +1,89 @@
+/*
+ * P1020 UTM-PC Device Tree Source (36-bit address map)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+ model = "fsl,P1020UTM-PC";
+ compatible = "fsl,P1020UTM-PC";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0x0 0x1000>;
+
+ /* NOR */
+ ranges = <0x0 0x0 0xf 0xec000000 0x02000000
+ 0x1 0x0 0xf 0xffa00000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0x0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1020utm-pc.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
--
1.7.5.4
^ permalink raw reply related
* [GIT PULL] DMA-mapping framework updates for 3.4
From: Marek Szyprowski @ 2012-03-20 7:24 UTC (permalink / raw)
To: Linus Torvalds
Cc: linux-mips, linux-ia64, linux-sh, linux-mm, sparclinux,
Marek Szyprowski, linux-arch, Jonathan Corbet, x86, Arnd Bergmann,
microblaze-uclinux, linaro-mm-sig, Andrzej Pietrasiewicz,
Thomas Gleixner, linux-arm-kernel, discuss, linux-kernel,
FUJITA Tomonori, Kyungmin Park, linux-alpha, Andrew Morton,
linuxppc-dev
Hi Linus,
Please pull the dma-mapping framework updates for v3.4 since commit
c16fa4f2ad19908a47c63d8fa436a1178438c7e7:
Linux 3.3
with the top-most commit e749a9f707f1102735e02338fa564be86be3bb69
common: DMA-mapping: add NON-CONSISTENT attribute
from the git repository at:
git://git.infradead.org/users/kmpark/linux-samsung dma-mapping-next
Those patches introduce a new alloc method (with support for memory
attributes) in dma_map_ops structure, which will later replace
dma_alloc_coherent and dma_alloc_writecombine functions.
Thanks!
Best regards
Marek Szyprowski
Samsung Poland R&D Center
Patch summary:
Andrzej Pietrasiewicz (9):
X86: adapt for dma_map_ops changes
MIPS: adapt for dma_map_ops changes
PowerPC: adapt for dma_map_ops changes
IA64: adapt for dma_map_ops changes
SPARC: adapt for dma_map_ops changes
Alpha: adapt for dma_map_ops changes
SH: adapt for dma_map_ops changes
Microblaze: adapt for dma_map_ops changes
Unicore32: adapt for dma_map_ops changes
Marek Szyprowski (6):
common: dma-mapping: introduce alloc_attrs and free_attrs methods
Hexagon: adapt for dma_map_ops changes
common: dma-mapping: remove old alloc_coherent and free_coherent methods
common: dma-mapping: introduce mmap method
common: DMA-mapping: add WRITE_COMBINE attribute
common: DMA-mapping: add NON-CONSISTENT attribute
Documentation/DMA-attributes.txt | 19 +++++++++++++++++++
arch/alpha/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/alpha/kernel/pci-noop.c | 10 ++++++----
arch/alpha/kernel/pci_iommu.c | 10 ++++++----
arch/hexagon/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/hexagon/kernel/dma.c | 9 +++++----
arch/ia64/hp/common/sba_iommu.c | 11 ++++++-----
arch/ia64/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/ia64/kernel/pci-swiotlb.c | 9 +++++----
arch/ia64/sn/pci/pci_dma.c | 9 +++++----
arch/microblaze/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/microblaze/kernel/dma.c | 10 ++++++----
arch/mips/cavium-octeon/dma-octeon.c | 16 ++++++++--------
arch/mips/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/mips/mm/dma-default.c | 8 ++++----
arch/powerpc/include/asm/dma-mapping.h | 24 ++++++++++++++++--------
arch/powerpc/kernel/dma-iommu.c | 10 ++++++----
arch/powerpc/kernel/dma-swiotlb.c | 4 ++--
arch/powerpc/kernel/dma.c | 10 ++++++----
arch/powerpc/kernel/ibmebus.c | 10 ++++++----
arch/powerpc/kernel/vio.c | 14 ++++++++------
arch/powerpc/platforms/cell/iommu.c | 16 +++++++++-------
arch/powerpc/platforms/ps3/system-bus.c | 13 +++++++------
arch/sh/include/asm/dma-mapping.h | 28 ++++++++++++++++++----------
arch/sh/kernel/dma-nommu.c | 4 ++--
arch/sh/mm/consistent.c | 6 ++++--
arch/sparc/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/sparc/kernel/iommu.c | 10 ++++++----
arch/sparc/kernel/ioport.c | 18 ++++++++++--------
arch/sparc/kernel/pci_sun4v.c | 9 +++++----
arch/unicore32/include/asm/dma-mapping.h | 18 ++++++++++++------
arch/unicore32/mm/dma-swiotlb.c | 4 ++--
arch/x86/include/asm/dma-mapping.h | 26 ++++++++++++++++----------
arch/x86/kernel/amd_gart_64.c | 11 ++++++-----
arch/x86/kernel/pci-calgary_64.c | 9 +++++----
arch/x86/kernel/pci-dma.c | 3 ++-
arch/x86/kernel/pci-nommu.c | 6 +++---
arch/x86/kernel/pci-swiotlb.c | 12 +++++++-----
arch/x86/xen/pci-swiotlb-xen.c | 4 ++--
drivers/iommu/amd_iommu.c | 10 ++++++----
drivers/iommu/intel-iommu.c | 9 +++++----
drivers/xen/swiotlb-xen.c | 5 +++--
include/linux/dma-attrs.h | 2 ++
include/linux/dma-mapping.h | 13 +++++++++----
include/linux/swiotlb.h | 6 ++++--
include/xen/swiotlb-xen.h | 6 ++++--
lib/swiotlb.c | 5 +++--
47 files changed, 338 insertions(+), 206 deletions(-)
^ permalink raw reply
* [PATCH 0/20] mmu: arch/mm: Port OOM changes to arch page fault handlers.
From: Kautuk Consul @ 2012-03-20 13:18 UTC (permalink / raw)
To: linux-alpha, linuxppc-dev, linux, linux-am33-list,
microblaze-uclinux, linux-m68k, linux-m32r-ja, linux-ia64,
linux-hexagon, linux-cris-kernel, linux-sh, linux-parisc,
sparclinux
Cc: linux-mm, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 950 bytes --]
Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
(x86,mm: make pagefault killable)
The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.
These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.
I was facing hang and livelock problems on my ARM and MIPS boards when
I invoked OOM by running the stress_32k.c test-case attached to this email.
Since both the ARM and MIPS porting chainges were accepted, me and my
co-worker decided to take the initiative to port these changes to all other
MMU based architectures.
Please review and do write back if there is any way I need to
improve/rewrite any
of these patches.
Signed-off-by: Mohd. Faris <mohdfarisq2010@gmail.com>
Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
---
[-- Attachment #2: stress_32k.c --]
[-- Type: text/x-csrc, Size: 3897 bytes --]
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <pthread.h>
#include <unistd.h>
#define ALLOC_BYTE 512*1024
#define COUNT 50
void *alloc_function_one( void *ptr );
void *alloc_function_two( void *ptr );
void *alloc_function_three( void *ptr );
void *alloc_function_four( void *ptr );
void *alloc_function_five( void *ptr );
void *enable_function( void *ptr );
int main(int argc, char *argv[])
{
pthread_t thread1, thread2, thread3, thread4, thread5;
char *message1 = "Thread 1";
char *message2 = "Thread 2";
char *message3 = "Thread 3";
char *message4 = "Thread 4";
char *message5 = "Thread 5";
int iret1 = -1;
int iret2 = -1;
int iret3 = -1;
int iret4 = -1;
int iret5 = -1;
fork();
iret1 = pthread_create( &thread1, NULL, alloc_function_one, (void*) message1);
iret2 = pthread_create( &thread2, NULL, alloc_function_two, (void*) message2);
iret2 = pthread_create( &thread3, NULL, alloc_function_three, (void*) message2);
iret2 = pthread_create( &thread4, NULL, alloc_function_four, (void*) message2);
iret2 = pthread_create( &thread5, NULL, alloc_function_five, (void*) message2);
pthread_join( thread1, NULL);
pthread_join( thread2, NULL);
pthread_join( thread3, NULL);
pthread_join( thread4, NULL);
pthread_join( thread5, NULL);
printf("Thread 1 returns: %d\n",iret1);
printf("Thread 2 returns: %d\n",iret2);
printf("Thread 3 returns: %d\n",iret3);
printf("Thread 4 returns: %d\n",iret4);
printf("Thread 5 returns: %d\n",iret5);
exit(0);
}
void *alloc_function_two( void *ptr )
{
char *message;
message = (char *) ptr;
void *myblock[COUNT];
int i= 0,j=0;
int freed=0;
printf("message_alloc \n");
while(1)
{
memset(myblock,0,sizeof(myblock));
printf("message_alloc %s \n",message);
for(i=0;i< COUNT ;i++)
{
myblock[i] = (void *) malloc(ALLOC_BYTE);
memset(myblock[i],1, ALLOC_BYTE);
}
}
}
void *alloc_function_one( void *ptr )
{
char *message;
message = (char *) ptr;
void *myblock[COUNT];
int i= 0,j=0;
int freed=0;
printf("message_alloc \n");
while(1)
{
memset(myblock,0,sizeof(myblock));
printf("message_alloc %s \n",message);
for(i=0;i< COUNT ;i++)
{
myblock[i] = (void *) malloc(ALLOC_BYTE);
memset(myblock[i],1, ALLOC_BYTE);
}
}
}
void *alloc_function_three( void *ptr )
{
char *message;
message = (char *) ptr;
void *myblock[COUNT];
int i= 0,j=0;
int freed=0;
printf("message_alloc \n");
while(1)
{
memset(myblock,0,sizeof(myblock));
printf("message_alloc %s \n",message);
for(i=0;i< COUNT ;i++)
{
myblock[i] = (void *) malloc(ALLOC_BYTE);
memset(myblock[i],1, ALLOC_BYTE);
}
}
}
void *alloc_function_four( void *ptr )
{
char *message;
message = (char *) ptr;
void *myblock[COUNT];
int i= 0,j=0;
int freed=0;
printf("message_alloc \n");
while(1)
{
memset(myblock,0,sizeof(myblock));
printf("message_alloc %s \n",message);
for(i=0;i< COUNT ;i++)
{
myblock[i] = (void *) malloc(ALLOC_BYTE);
memset(myblock[i],1, ALLOC_BYTE);
}
}
}
void *alloc_function_five( void *ptr )
{
char *message;
message = (char *) ptr;
void *myblock[COUNT];
int i= 0,j=0;
int freed=0;
printf("message_alloc \n");
while(1)
{
memset(myblock,0,sizeof(myblock));
printf("message_alloc %s \n",message);
for(i=0;i< COUNT ;i++)
{
myblock[i] = (void *) malloc(ALLOC_BYTE);
memset(myblock[i],1, ALLOC_BYTE);
}
}
}
^ permalink raw reply
* [PATCH 04/20] powerpc/mm/fault.c: Port OOM changes to do_page_fault
From: Kautuk Consul @ 2012-03-20 13:19 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Jimi Xenidis, Ingo Molnar,
Peter Zijlstra, Christian Dietrich
Cc: linuxppc-dev, linux-kernel, Mohd. Faris, Kautuk Consul
Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
(x86,mm: make pagefault killable)
The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.
These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.
Port these changes to powerpc.
Signed-off-by: Mohd. Faris <mohdfarisq2010@gmail.com>
Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
---
arch/powerpc/mm/fault.c | 51 +++++++++++++++++++++++++++++++++-------------
1 files changed, 36 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 2f0d1b0..a3b1176 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -129,6 +129,7 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
int is_write = 0, ret;
int trap = TRAP(regs);
int is_exec = trap == 0x400;
+ unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
/*
@@ -212,6 +213,7 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
if (!user_mode(regs) && !search_exception_tables(regs->nip))
goto bad_area_nosemaphore;
+retry:
down_read(&mm->mmap_sem);
}
@@ -313,6 +315,7 @@ good_area:
} else if (is_write) {
if (!(vma->vm_flags & VM_WRITE))
goto bad_area;
+ flags |= FAULT_FLAG_WRITE;
/* a read */
} else {
/* protection fault */
@@ -327,7 +330,11 @@ good_area:
* make sure we exit gracefully rather than endlessly redo
* the fault.
*/
- ret = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0);
+ ret = handle_mm_fault(mm, vma, address, flags);
+
+ if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+ return;
+
if (unlikely(ret & VM_FAULT_ERROR)) {
if (ret & VM_FAULT_OOM)
goto out_of_memory;
@@ -335,22 +342,36 @@ good_area:
goto do_sigbus;
BUG();
}
- if (ret & VM_FAULT_MAJOR) {
- current->maj_flt++;
- perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
- regs, address);
-#ifdef CONFIG_PPC_SMLPAR
- if (firmware_has_feature(FW_FEATURE_CMO)) {
- preempt_disable();
- get_lppaca()->page_ins += (1 << PAGE_FACTOR);
- preempt_enable();
+ if (flags & FAULT_FLAG_ALLOW_RETRY) {
+ if (ret & VM_FAULT_MAJOR) {
+ current->maj_flt++;
+ perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
+ regs, address);
+#ifd#ifdef CONFIG_PPC_SMLPAR
+ if (firmware_has_feature(FW_FEATURE_CMO)) {
+ preempt_disable();
+ get_lppaca()->page_ins += (1 << PAGE_FACTOR);
+ preempt_enable();
+ }
+#end#endif
+ } else {
+ current->min_flt++;
+ perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+ regs, address);
+ }
+ if (fault & VM_FAULT_RETRY) {
+ flags &= ~FAULT_FLAG_ALLOW_RETRY;
+
+ /*
+ * No need to up_read(&mm->mmap_sem) as we would
+ * have already released it in __lock_page_or_retry
+ * in mm/filemap.c.
+ */
+
+ goto retry;
}
-#endif
- } else {
- current->min_flt++;
- perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
- regs, address);
}
+
up_read(&mm->mmap_sem);
return 0;
--
1.7.5.4
^ permalink raw reply related
* Re: [PATCH 0/20] mmu: arch/mm: Port OOM changes to arch page fault handlers.
From: richard -rw- weinberger @ 2012-03-20 13:30 UTC (permalink / raw)
To: Kautuk Consul
Cc: linux-m32r-ja, linux-am33-list, linux-ia64, linux-parisc,
linux-cris-kernel, linux-sh, microblaze-uclinux, linux-alpha,
linux-kernel, linux-mm, linux-m68k, linux, sparclinux,
linux-hexagon, linuxppc-dev
In-Reply-To: <CAFPAmTQs9dOpQTaXU=6Or66YU+my_CnPw33TE4h++YArBNa38g@mail.gmail.com>
On Tue, Mar 20, 2012 at 2:18 PM, Kautuk Consul <consul.kautuk@gmail.com> wrote:
> Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
> (mm: retry page fault when blocking on disk transfer) and
> commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
> (x86,mm: make pagefault killable)
>
> The above commits introduced changes into the x86 pagefault handler
> for making the page fault handler retryable as well as killable.
>
> These changes reduce the mmap_sem hold time, which is crucial
> during OOM killer invocation.
>
> I was facing hang and livelock problems on my ARM and MIPS boards when
> I invoked OOM by running the stress_32k.c test-case attached to this email.
>
> Since both the ARM and MIPS porting chainges were accepted, me and my
> co-worker decided to take the initiative to port these changes to all other
> MMU based architectures.
>
> Please review and do write back if there is any way I need to
> improve/rewrite any
> of these patches.
>
What about arch/um/?
Does UML not need this change?
--
Thanks,
//richard
^ permalink raw reply
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