* Re: [RFC PATCH 1/12] memory-hotplug : rename remove_memory to offline_memory
From: Wen Congyang @ 2012-06-27 8:47 UTC (permalink / raw)
To: Yasuaki Ishimatsu
Cc: len.brown, linux-acpi, linux-kernel, linux-mm, paulus,
minchan.kim, kosaki.motohiro, cl, linuxppc-dev, akpm
In-Reply-To: <4FEAB2E1.3090200@cn.fujitsu.com>
At 06/27/2012 03:14 PM, Wen Congyang Wrote:
> At 06/27/2012 01:42 PM, Yasuaki Ishimatsu Wrote:
>> remove_memory() does not remove memory but just offlines memory. The patch
>> changes name of it to offline_memory().
>
> There are 3 functions in the kernel:
> 1. add_memory()
> 2. online_pages()
> 3. remove_memory()
>
> So I think offline_pages() is better than offline_memory().
There is already a function named offline_pages(). So we
should call offline_pages() instead of remove_memory() in
memory_block_action(), and there is no need to rename
remove_memory().
Thanks
Wen Congyang
>
> Thanks
> Wen Congyang
>>
>> CC: Len Brown <len.brown@intel.com>
>> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> CC: Paul Mackerras <paulus@samba.org>
>> CC: Christoph Lameter <cl@linux.com>
>> Cc: Minchan Kim <minchan.kim@gmail.com>
>> CC: Andrew Morton <akpm@linux-foundation.org>
>> CC: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
>> CC: Wen Congyang <wency@cn.fujitsu.com>
>> Signed-off-by: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
>>
>> ---
>> drivers/acpi/acpi_memhotplug.c | 2 +-
>> drivers/base/memory.c | 4 ++--
>> include/linux/memory_hotplug.h | 2 +-
>> mm/memory_hotplug.c | 6 +++---
>> 4 files changed, 7 insertions(+), 7 deletions(-)
>>
>> Index: linux-3.5-rc4/drivers/acpi/acpi_memhotplug.c
>> ===================================================================
>> --- linux-3.5-rc4.orig/drivers/acpi/acpi_memhotplug.c 2012-06-25 04:53:04.000000000 +0900
>> +++ linux-3.5-rc4/drivers/acpi/acpi_memhotplug.c 2012-06-26 13:48:38.263940481 +0900
>> @@ -318,7 +318,7 @@ static int acpi_memory_disable_device(st
>> */
>> list_for_each_entry_safe(info, n, &mem_device->res_list, list) {
>> if (info->enabled) {
>> - result = remove_memory(info->start_addr, info->length);
>> + result = offline_memory(info->start_addr, info->length);
>> if (result)
>> return result;
>> }
>> Index: linux-3.5-rc4/drivers/base/memory.c
>> ===================================================================
>> --- linux-3.5-rc4.orig/drivers/base/memory.c 2012-06-25 04:53:04.000000000 +0900
>> +++ linux-3.5-rc4/drivers/base/memory.c 2012-06-26 13:48:46.072842803 +0900
>> @@ -266,8 +266,8 @@ memory_block_action(unsigned long phys_i
>> break;
>> case MEM_OFFLINE:
>> start_paddr = page_to_pfn(first_page) << PAGE_SHIFT;
>> - ret = remove_memory(start_paddr,
>> - nr_pages << PAGE_SHIFT);
>> + ret = offline_memory(start_paddr,
>> + nr_pages << PAGE_SHIFT);
>> break;
>> default:
>> WARN(1, KERN_WARNING "%s(%ld, %ld) unknown action: "
>> Index: linux-3.5-rc4/mm/memory_hotplug.c
>> ===================================================================
>> --- linux-3.5-rc4.orig/mm/memory_hotplug.c 2012-06-25 04:53:04.000000000 +0900
>> +++ linux-3.5-rc4/mm/memory_hotplug.c 2012-06-26 13:48:46.072842803 +0900
>> @@ -990,7 +990,7 @@ out:
>> return ret;
>> }
>>
>> -int remove_memory(u64 start, u64 size)
>> +int offline_memory(u64 start, u64 size)
>> {
>> unsigned long start_pfn, end_pfn;
>>
>> @@ -999,9 +999,9 @@ int remove_memory(u64 start, u64 size)
>> return offline_pages(start_pfn, end_pfn, 120 * HZ);
>> }
>> #else
>> -int remove_memory(u64 start, u64 size)
>> +int offline_memory(u64 start, u64 size)
>> {
>> return -EINVAL;
>> }
>> #endif /* CONFIG_MEMORY_HOTREMOVE */
>> -EXPORT_SYMBOL_GPL(remove_memory);
>> +EXPORT_SYMBOL_GPL(offline_memory);
>> Index: linux-3.5-rc4/include/linux/memory_hotplug.h
>> ===================================================================
>> --- linux-3.5-rc4.orig/include/linux/memory_hotplug.h 2012-06-25 04:53:04.000000000 +0900
>> +++ linux-3.5-rc4/include/linux/memory_hotplug.h 2012-06-26 13:48:38.264940468 +0900
>> @@ -233,7 +233,7 @@ static inline int is_mem_section_removab
>> extern int mem_online_node(int nid);
>> extern int add_memory(int nid, u64 start, u64 size);
>> extern int arch_add_memory(int nid, u64 start, u64 size);
>> -extern int remove_memory(u64 start, u64 size);
>> +extern int offline_memory(u64 start, u64 size);
>> extern int sparse_add_one_section(struct zone *zone, unsigned long start_pfn,
>> int nr_pages);
>> extern void sparse_remove_one_section(struct zone *zone, struct mem_section *ms);
>>
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at http://www.tux.org/lkml/
>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
>
^ permalink raw reply
* Re: [RFC PATCH 2/12] memory-hogplug : check memory offline in offline_pages
From: Wen Congyang @ 2012-06-27 8:49 UTC (permalink / raw)
To: Yasuaki Ishimatsu
Cc: len.brown, linux-acpi, linux-kernel, linux-mm, paulus,
minchan.kim, kosaki.motohiro, cl, linuxppc-dev, akpm
In-Reply-To: <4FEA9DB1.7010303@jp.fujitsu.com>
At 06/27/2012 01:44 PM, Yasuaki Ishimatsu Wrote:
> When offline_pages() is called to offlined memory, the function fails since
> all memory has been offlined. In this case, the function should succeed.
> The patch adds the check function into offline_pages().
You miss such case: some pages are online, while some pages are offline.
offline_pages() will fail too in such case.
Thanks
Wen Congyang
>
> CC: Len Brown <len.brown@intel.com>
> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> CC: Paul Mackerras <paulus@samba.org>
> CC: Christoph Lameter <cl@linux.com>
> Cc: Minchan Kim <minchan.kim@gmail.com>
> CC: Andrew Morton <akpm@linux-foundation.org>
> CC: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
> CC: Wen Congyang <wency@cn.fujitsu.com>
> Signed-off-by: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
>
> ---
> drivers/base/memory.c | 20 ++++++++++++++++++++
> include/linux/memory.h | 1 +
> mm/memory_hotplug.c | 5 +++++
> 3 files changed, 26 insertions(+)
>
> Index: linux-3.5-rc4/drivers/base/memory.c
> ===================================================================
> --- linux-3.5-rc4.orig/drivers/base/memory.c 2012-06-26 13:28:16.726211752 +0900
> +++ linux-3.5-rc4/drivers/base/memory.c 2012-06-26 13:34:22.423639904 +0900
> @@ -70,6 +70,26 @@ void unregister_memory_isolate_notifier(
> }
> EXPORT_SYMBOL(unregister_memory_isolate_notifier);
>
> +bool memory_is_offline(unsigned long start_pfn, unsigned long end_pfn)
> +{
> + struct memory_block *mem;
> + struct mem_section *section;
> + unsigned long pfn, section_nr;
> +
> + for (pfn = start_pfn; pfn < end_pfn; pfn += PAGES_PER_SECTION) {
> + section_nr = pfn_to_section_nr(pfn);
> + section = __nr_to_section(section_nr);
> + mem = find_memory_block(section);
> + if (!mem)
> + continue;
> + if (mem->state == MEM_OFFLINE)
> + continue;
> + return false;
> + }
> +
> + return true;
> +}
> +
> /*
> * register_memory - Setup a sysfs device for a memory block
> */
> Index: linux-3.5-rc4/include/linux/memory.h
> ===================================================================
> --- linux-3.5-rc4.orig/include/linux/memory.h 2012-06-25 04:53:04.000000000 +0900
> +++ linux-3.5-rc4/include/linux/memory.h 2012-06-26 13:34:22.424639891 +0900
> @@ -120,6 +120,7 @@ extern int memory_isolate_notify(unsigne
> extern struct memory_block *find_memory_block_hinted(struct mem_section *,
> struct memory_block *);
> extern struct memory_block *find_memory_block(struct mem_section *);
> +extern bool memory_is_offline(unsigned long start_pfn, unsigned long end_pfn);
> #define CONFIG_MEM_BLOCK_SIZE (PAGES_PER_SECTION<<PAGE_SHIFT)
> enum mem_add_context { BOOT, HOTPLUG };
> #endif /* CONFIG_MEMORY_HOTPLUG_SPARSE */
> Index: linux-3.5-rc4/mm/memory_hotplug.c
> ===================================================================
> --- linux-3.5-rc4.orig/mm/memory_hotplug.c 2012-06-26 13:28:16.743211538 +0900
> +++ linux-3.5-rc4/mm/memory_hotplug.c 2012-06-26 13:48:38.264940468 +0900
> @@ -887,6 +887,11 @@ static int __ref offline_pages(unsigned
>
> lock_memory_hotplug();
>
> + if (memory_is_offline(start_pfn, end_pfn)) {
> + ret = 0;
> + goto out;
> + }
> +
> zone = page_zone(pfn_to_page(start_pfn));
> node = zone_to_nid(zone);
> nr_pages = end_pfn - start_pfn;
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
>
^ permalink raw reply
* Re: [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
From: Zhao Chenhui @ 2012-06-27 10:10 UTC (permalink / raw)
To: Kumar Gala; +Cc: scottwood, linuxppc-dev, linux-kernel
In-Reply-To: <AB6D43A9-FC54-40D2-A9B0-8B2E785124F9@kernel.crashing.org>
On Tue, Jun 26, 2012 at 09:03:42AM -0500, Kumar Gala wrote:
>
> On Jun 26, 2012, at 5:25 AM, Zhao Chenhui wrote:
>
> > Do hardware timebase sync. Firstly, stop all timebases, and transfer
> > the timebase value of the boot core to the other core. Finally,
> > start all timebases.
> >
> > Only apply to dual-core chips, such as MPC8572, P2020, etc.
> >
> > Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > ---
> > Changes for v6:
> > * added 85xx_TB_SYNC
> > * added isync() after set_tb()
> > * removed extra entries from mpc85xx_smp_guts_ids
>
> Why only on dual-core chips? Is this because of something related to 2 cores, or related to corenet vs non-corenet SoCs and how turning on/off the timebase works in the SOC?
>
> - k
I am working on a timebase sync patch for corenet SoCs which have more than 2 cores.
It is based on this patch.
-Chenhui
^ permalink raw reply
* Re: [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
From: Zhao Chenhui @ 2012-06-27 10:21 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: scottwood, linuxppc-dev, linux-kernel
In-Reply-To: <1340748634.3732.27.camel@pasglop>
On Wed, Jun 27, 2012 at 08:10:34AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2012-06-26 at 18:25 +0800, Zhao Chenhui wrote:
> > Do hardware timebase sync. Firstly, stop all timebases, and transfer
> > the timebase value of the boot core to the other core. Finally,
> > start all timebases.
> >
> > Only apply to dual-core chips, such as MPC8572, P2020, etc.
> >
> > Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > ---
> > Changes for v6:
> > * added 85xx_TB_SYNC
> > * added isync() after set_tb()
> > * removed extra entries from mpc85xx_smp_guts_ids
>
> What's that CONFIG option for ?
>
> Cheers,
> Ben.
This option is to guard the timebase sync routines. It is selected
when KEXEC or HOTPLUG_CPU is enabled on Freescale Book-E platforms.
-Chenhui
^ permalink raw reply
* RE: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs
From: Caraman Mihai Claudiu-B02008 @ 2012-06-27 11:41 UTC (permalink / raw)
To: Wood Scott-B07421
Cc: qemu-ppc@nongnu.org, linuxppc-dev@lists.ozlabs.org,
kvm@vger.kernel.org, kvm-ppc@vger.kernel.org
In-Reply-To: <4FEA3907.8080500@freescale.com>
PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBXb29kIFNjb3R0LUIwNzQyMQ0K
PiBTZW50OiBXZWRuZXNkYXksIEp1bmUgMjcsIDIwMTIgMTozNSBBTQ0KPiBUbzogQ2FyYW1hbiBN
aWhhaSBDbGF1ZGl1LUIwMjAwOA0KPiBDYzoga3ZtLXBwY0B2Z2VyLmtlcm5lbC5vcmc7IGt2bUB2
Z2VyLmtlcm5lbC5vcmc7IGxpbnV4cHBjLQ0KPiBkZXZAbGlzdHMub3psYWJzLm9yZzsgcWVtdS1w
cGNAbm9uZ251Lm9yZw0KPiBTdWJqZWN0OiBSZTogW1JGQyBQQVRDSCAwMy8xN10gS1ZNOiBQUEM2
NDogYm9va2U6IEFkZCBFUENSIHN1cHBvcnQgaW4NCj4gc3JlZ3MNCj4gDQo+IE9uIDA2LzI1LzIw
MTIgMDc6MjYgQU0sIE1paGFpIENhcmFtYW4gd3JvdGU6DQo+ID4gQWRkIEtWTV9TUkVHU19FXzY0
IGZlYXR1cmUgYW5kIEVQQ1Igc3ByIHN1cHBvcnQgaW4gZ2V0L3NldCBzcmVncyBmb3INCj4gPiA2
NC1iaXQgaG9zdHMuDQo+ID4NCj4gPiBTaWduZWQtb2ZmLWJ5OiBNaWhhaSBDYXJhbWFuIDxtaWhh
aS5jYXJhbWFuQGZyZWVzY2FsZS5jb20+DQo+ID4gLS0tDQo+ID4gIGFyY2gvcG93ZXJwYy9rdm0v
Ym9va2UuYyB8ICAgMTQgKysrKysrKysrKysrKysNCj4gPiAgMSBmaWxlcyBjaGFuZ2VkLCAxNCBp
bnNlcnRpb25zKCspLCAwIGRlbGV0aW9ucygtKQ0KPiA+DQo+ID4gZGlmZiAtLWdpdCBhL2FyY2gv
cG93ZXJwYy9rdm0vYm9va2UuYyBiL2FyY2gvcG93ZXJwYy9rdm0vYm9va2UuYyBpbmRleA0KPiA+
IGY5ZmEyNjAuLmQxNWM0YjUgMTAwNjQ0DQo+ID4gLS0tIGEvYXJjaC9wb3dlcnBjL2t2bS9ib29r
ZS5jDQo+ID4gKysrIGIvYXJjaC9wb3dlcnBjL2t2bS9ib29rZS5jDQo+ID4gQEAgLTEwNTIsNiAr
MTA1Miw5IEBAIHN0YXRpYyB2b2lkIGdldF9zcmVnc19iYXNlKHN0cnVjdCBrdm1fdmNwdSAqdmNw
dSwNCj4gPiAgCXU2NCB0YiA9IGdldF90YigpOw0KPiA+DQo+ID4gIAlzcmVncy0+dS5lLmZlYXR1
cmVzIHw9IEtWTV9TUkVHU19FX0JBU0U7DQo+ID4gKyNpZmRlZiBDT05GSUdfNjRCSVQNCj4gPiAr
CXNyZWdzLT51LmUuZmVhdHVyZXMgfD0gS1ZNX1NSRUdTX0VfNjQ7MCAjZW5kaWYNCj4gPg0KPiA+
ICAJc3JlZ3MtPnUuZS5jc3JyMCA9IHZjcHUtPmFyY2guY3NycjA7DQo+ID4gIAlzcmVncy0+dS5l
LmNzcnIxID0gdmNwdS0+YXJjaC5jc3JyMTsgQEAgLTEwNjMsNiArMTA2Niw5IEBAIHN0YXRpYw0K
PiA+IHZvaWQgZ2V0X3NyZWdzX2Jhc2Uoc3RydWN0IGt2bV92Y3B1ICp2Y3B1LA0KPiA+ICAJc3Jl
Z3MtPnUuZS5kZWMgPSBrdm1wcGNfZ2V0X2RlYyh2Y3B1LCB0Yik7DQo+ID4gIAlzcmVncy0+dS5l
LnRiID0gdGI7DQo+ID4gIAlzcmVncy0+dS5lLnZyc2F2ZSA9IHZjcHUtPmFyY2gudnJzYXZlOw0K
PiA+ICsjaWZkZWYgQ09ORklHXzY0QklUDQo+ID4gKwlzcmVncy0+dS5lLmVwY3IgPSB2Y3B1LT5h
cmNoLmVwY3I7DQo+ID4gKyNlbmRpZg0KPiA+ICB9DQo+ID4NCj4gPiAgc3RhdGljIGludCBzZXRf
c3JlZ3NfYmFzZShzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUsIEBAIC0xMDcxLDYgKzEwNzcsMTENCj4g
PiBAQCBzdGF0aWMgaW50IHNldF9zcmVnc19iYXNlKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSwNCj4g
PiAgCWlmICghKHNyZWdzLT51LmUuZmVhdHVyZXMgJiBLVk1fU1JFR1NfRV9CQVNFKSkNCj4gPiAg
CQlyZXR1cm4gMDsNCj4gPg0KPiA+ICsjaWZkZWYgQ09ORklHXzY0QklUDQo+ID4gKwlpZiAoIShz
cmVncy0+dS5lLmZlYXR1cmVzICYgS1ZNX1NSRUdTX0VfNjQpKQ0KPiA+ICsJCXJldHVybiAwOw0K
PiA+ICsjZW5kaWYNCj4gDQo+IFRoaXMgbWVhbnMgdGhhdCBhIFFFTVUgdGFyZ2V0aW5nIGEgMzIt
Yml0IGd1ZXN0IHdvbid0IGJlIGFibGUgdG8gc2V0IGFueQ0KPiBzcGVjaWFsIHJlZ2lzdGVycywg
aWYgaXQgc2V0cyBmZWF0dXJlIGJpdHMgbWFudWFsbHkgcmF0aGVyIHRoYW4gZ2V0dGluZw0KPiB0
aGVtIGZyb20gR0VUX1NSRUdTLg0KDQpJIGhhZCBzb21lIGNvbmNlcm5zIGFib3V0IGhpcy4gSSBv
bmx5IGNoZWNrIHFlbXUgcHBjIGNvZGUgd2hpY2ggdXNlcyBnZXQvc2V0DQphcHByb2FjaCBhbmQg
SSBmb2xsb3dlZCB0aGUgQkFTRSBtb2RlbC4gTm93IEkgc2VlIHRoYXQgcWVtdSB4ODYgc2V0IHRo
ZW0gbWFudWFsbHkgOigNCldoeSBkbyB3ZSBjYXJlIGlmIHRoZSBjYWxsZXIgc2V0IG9yIG5vdCBC
QVNFPw0KDQotTWlrZQ0K
^ permalink raw reply
* Re: [PATCH -v4 6/6] fault-injection: add notifier error injection testing scripts
From: Akinobu Mita @ 2012-06-27 11:42 UTC (permalink / raw)
To: Andrew Morton
Cc: Greg KH, linux-kernel, Rafael J. Wysocki, linux-mm,
Paul Mackerras, Pavel Machek, Américo Wang, linux-pm,
linuxppc-dev
In-Reply-To: <20120626163147.93181e21.akpm@linux-foundation.org>
2012/6/27 Andrew Morton <akpm@linux-foundation.org>:
> On Sat, 23 Jun 2012 23:58:22 +0900
> Akinobu Mita <akinobu.mita@gmail.com> wrote:
>
>> This adds two testing scripts with notifier error injection
>
> Can we move these into tools/testing/selftests/, so that a "make
> run_tests" runs these tests?
>
> Also, I don't think it's appropriate that "fault-injection" be in the
> path - that's an implementation detail. =A0What we're testing here is
> memory hotplug, pm, cpu hotplug, etc. =A0So each test would go into, say,
> tools/testing/selftests/cpu-hotplug.
>
> Now, your cpu-hotplug test only tests a tiny part of the cpu-hotplug
> code. =A0But it is a start, and creates the place where additional tests
> will be placed in the future.
>
>
> If the kernel configuration means that the tests cannot be run, the
> attempt should succeed so that other tests are not disrupted. =A0I guess
> that printing a warning in this case is useful.
>
> Probably the selftests will require root permissions - we haven't
> really thought about that much. =A0If these tests require root (I assume
> they do?) then a sensible approach would be to check for that and to
> emit a warning and return "success".
Thanks for your advice.
I'm going to make the following changes on these scripts
1. Change these paths to:
tools/testing/selftests/{cpu,memory}-hotplug/on-off-test.sh
2. Skip tests and exit(0) with a warning if no root or no sysfs
so that a "make run_tests" doesn't stop.
3. Add tests that simply online and offline cpus (or memory blocks)
and then tests with this notifier error injection features if the
kernel supports.
> My overall take on the fault-injection code is that there has been a
> disappointing amount of uptake: I don't see many developers using them
> for whitebox testing their stuff. =A0I guess this patchset addresses
> that, in a way.
I hope so. the impact of notifier error injection is restricted to
the particular kernel functionarity and these scripts are easy to run.
On the other hand, fault injection like failslab has a huge impact
on any kernel components and it often results catastrophe to userspace
even if no kernel bug. I am confident that I can find a certain amount
of kernel bugs with failslab but it requires enough spare time.
^ permalink raw reply
* Re: [PATCH v6 1/5] powerpc/85xx: implement hardware timebase sync
From: Benjamin Herrenschmidt @ 2012-06-27 11:48 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: scottwood, linuxppc-dev, linux-kernel
In-Reply-To: <20120627102138.GB10476@localhost.localdomain>
On Wed, 2012-06-27 at 18:21 +0800, Zhao Chenhui wrote:
> > What's that CONFIG option for ?
> >
> > Cheers,
> > Ben.
>
> This option is to guard the timebase sync routines. It is selected
> when KEXEC or HOTPLUG_CPU is enabled on Freescale Book-E platforms.
Any reason not to just make it unconditional ? That sort of config
option tend to just confuse things and make bug reports harder to sort
out.... Also you decrease your test coverage.
Cheers,
Ben.
^ permalink raw reply
* RE: [RFC PATCH 10/17] PowerPC: booke64: Refactor exception prolog for save/restore regs
From: Caraman Mihai Claudiu-B02008 @ 2012-06-27 11:49 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: qemu-ppc@nongnu.org, linuxppc-dev@lists.ozlabs.org,
kvm@vger.kernel.org, kvm-ppc@vger.kernel.org
In-Reply-To: <1340748766.3732.29.camel@pasglop>
PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBCZW5qYW1pbiBIZXJyZW5zY2ht
aWR0IFttYWlsdG86YmVuaEBrZXJuZWwuY3Jhc2hpbmcub3JnXQ0KPiBTZW50OiBXZWRuZXNkYXks
IEp1bmUgMjcsIDIwMTIgMToxMyBBTQ0KPiBUbzogQ2FyYW1hbiBNaWhhaSBDbGF1ZGl1LUIwMjAw
OA0KPiBDYzoga3ZtLXBwY0B2Z2VyLmtlcm5lbC5vcmc7IGt2bUB2Z2VyLmtlcm5lbC5vcmc7IGxp
bnV4cHBjLQ0KPiBkZXZAbGlzdHMub3psYWJzLm9yZzsgcWVtdS1wcGNAbm9uZ251Lm9yZw0KPiBT
dWJqZWN0OiBSZTogW1JGQyBQQVRDSCAxMC8xN10gUG93ZXJQQzogYm9va2U2NDogUmVmYWN0b3Ig
ZXhjZXB0aW9uDQo+IHByb2xvZyBmb3Igc2F2ZS9yZXN0b3JlIHJlZ3MNCj4gDQo+IE9uIE1vbiwg
MjAxMi0wNi0yNSBhdCAxNToyNiArMDMwMCwgTWloYWkgQ2FyYW1hbiB3cm90ZToNCj4gPiBSZWZh
Y3RvciBleGNlcHRpb24gcHJvbG9nIHRvIGFsbG93IHNhdmUvcmVzdG9yZSByZWdpc3RlciBwYXJh
bWV0ZXJzLg0KPiA+IEFkZCBhZGRpdGlvbiBub25lIGRlZmluaXRpb24gZm9yIGV4Y2VwdGlvbiBw
cm9sb2cgdXNhZ2UuDQo+ID4gVGhpcyBpcyBuZWVkZWQgZm9yIGV4Y2VwdGlvbnMgbGlrZSBHdWVz
dCBEb29yYmVsbCB0aGF0IHVzZSBHU1JSeA0KPiA+IHJlZ3NpdGVycyB3aGljaCBkbyBub3QgbWFw
IG9uIGV4Y2VwdGlvbiB0eXBlLg0KPiA+DQo+ID4gU2lnbmVkLW9mZi1ieTogTWloYWkgQ2FyYW1h
biA8bWloYWkuY2FyYW1hbkBmcmVlc2NhbGUuY29tPg0KPiA+IC0tLQ0KPiA+ICBhcmNoL3Bvd2Vy
cGMva2VybmVsL2V4Y2VwdGlvbnMtNjRlLlMgfCAgIDIzICsrKysrKysrLS0tLS0tLS0tLS0tLS0t
DQo+ID4gIDEgZmlsZXMgY2hhbmdlZCwgOCBpbnNlcnRpb25zKCspLCAxNSBkZWxldGlvbnMoLSkN
Cj4gPg0KPiA+IGRpZmYgLS1naXQgYS9hcmNoL3Bvd2VycGMva2VybmVsL2V4Y2VwdGlvbnMtNjRl
LlMNCj4gPiBiL2FyY2gvcG93ZXJwYy9rZXJuZWwvZXhjZXB0aW9ucy02NGUuUw0KPiA+IGluZGV4
IDcyMTVjYzIuLjUyYWE5NmIgMTAwNjQ0DQo+ID4gLS0tIGEvYXJjaC9wb3dlcnBjL2tlcm5lbC9l
eGNlcHRpb25zLTY0ZS5TDQo+ID4gKysrIGIvYXJjaC9wb3dlcnBjL2tlcm5lbC9leGNlcHRpb25z
LTY0ZS5TDQo+ID4gQEAgLTM1LDcgKzM1LDcgQEANCj4gPiAgI2RlZmluZQlTUEVDSUFMX0VYQ19G
UkFNRV9TSVpFCUlOVF9GUkFNRV9TSVpFDQo+ID4NCj4gPiAgLyogRXhjZXB0aW9uIHByb2xvZyBj
b2RlIGZvciBhbGwgZXhjZXB0aW9ucyAqLw0KPiA+IC0jZGVmaW5lIEVYQ0VQVElPTl9QUk9MT0co
biwgdHlwZSwgYWRkaXRpb24pCQkJCSAgICBcDQo+ID4gKyNkZWZpbmUgRVhDRVBUSU9OX1BST0xP
RyhuLCB0eXBlLCBzcnIwLCBzcnIxLCBhZGRpdGlvbikNCj4gXA0KPiA+ICAJbXRzcHIJU1BSTl9T
UFJHXyMjdHlwZSMjX1NDUkFUQ0gscjEzOwkvKiBnZXQgc3BhcmUgcmVnaXN0ZXJzICovDQo+IFwN
Cj4gPiAgCW1mc3ByCXIxMyxTUFJOX1NQUkdfUEFDQTsJLyogZ2V0IFBBQ0EgKi8JCQkgICAgXA0K
PiA+ICAJc3RkCXIxMCxQQUNBX0VYIyN0eXBlK0VYX1IxMChyMTMpOwkJCQkgICAgXA0KPiA+IEBA
IC00NCw1NCArNDQsNDcgQEANCj4gPiAgCWFkZGl0aW9uOwkJCS8qIGFkZGl0aW9uYWwgY29kZSBm
b3IgdGhhdCBleGMuICovIFwNCj4gPiAgCXN0ZAlyMSxQQUNBX0VYIyN0eXBlK0VYX1IxKHIxMyk7
IC8qIHNhdmUgb2xkIHIxIGluIHRoZSBQQUNBICovICBcDQo+ID4gIAlzdHcJcjEwLFBBQ0FfRVgj
I3R5cGUrRVhfQ1IocjEzKTsgLyogc2F2ZSBvbGQgQ1IgaW4gdGhlIFBBQ0EgKi8gXA0KPiA+IC0J
bWZzcHIJcjExLFNQUk5fIyN0eXBlIyNfU1JSMTsvKiB3aGF0IGFyZSB3ZSBjb21pbmcgZnJvbSAq
LwkgICAgXA0KPiA+ICsJbWZzcHIJcjExLHNycjE7Lyogd2hhdCBhcmUgd2UgY29taW5nIGZyb20g
Ki8JICAgIAkJICAgIFwNCj4gPiAgCXR5cGUjI19TRVRfS1NUQUNLOwkJLyogZ2V0IHNwZWNpYWwg
c3RhY2sgaWYgbmVjZXNzYXJ5ICovXA0KPiA+ICAJYW5kaS4JcjEwLHIxMSxNU1JfUFI7CQkvKiBz
YXZlIHN0YWNrIHBvaW50ZXIgKi8JICAgIFwNCj4gPiAgCWJlcQkxZjsJCQkvKiBicmFuY2ggYXJv
dW5kIGlmIHN1cGVydmlzb3IgKi8gICBcDQo+ID4gIAlsZAlyMSxQQUNBS1NBVkUocjEzKTsJLyog
Z2V0IGtlcm5lbCBzdGFjayBjb21pbmcgZnJvbSB1c3INCj4gKi9cDQo+ID4gIDE6CWNtcGRpCWNy
MSxyMSwwOwkJLyogY2hlY2sgaWYgU1AgbWFrZXMgc2Vuc2UgKi8JICAgIFwNCj4gPiAgCWJnZS0J
Y3IxLGV4Y18jI24jI19iYWRfc3RhY2s7LyogYmFkIHN0YWNrIChUT0RPOiBvdXQgb2YgbGluZSkg
Ki8gXA0KPiA+IC0JbWZzcHIJcjEwLFNQUk5fIyN0eXBlIyNfU1JSMDsJLyogcmVhZCBTUlIwIGJl
Zm9yZSB0b3VjaGluZyBzdGFjayAqLw0KPiA+ICsJbWZzcHIJcjEwLHNycjA7CQkvKiByZWFkIFNS
UjAgYmVmb3JlIHRvdWNoaW5nIHN0YWNrICovDQo+IA0KPiBObywgdXNlIHRoZSBleGlzdGluZyBt
YWNybywgdXNlIGEgIyN0eXBlIyMgc3BlY2lmaWMgdG8gZ3Vlc3QgZG9vcmJlbGxzLA0KPiB3aXRo
IGFwcHJvcHJpYXRlIGRlZmluaXRpb25zIG9mIHRoZSBjb3JyZXNwb25kaW5nIFNQUk5fIG1hY3Jv
cy4NCg0KSSBhc3N1bWUgdGhhdCBzcGVjaWZpYyBQQUNBX0VYLCBTQ1JBVENIIGFuZCBTRVRfS1NU
QUNLIGRlZmluaXRpb25zIHdpbGwNCmZhbGxiYWNrIHRvIEdFTi4NCg0KQ2hlZXJzLA0KTWlrZQ0K
^ permalink raw reply
* Re: [PATCH 3/3] serial/8250: delete WR SBC850 UART quirk handling
From: Alan Cox @ 2012-06-27 11:52 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev, Greg Kroah-Hartman, linux-serial, Alan Cox
In-Reply-To: <1340740469-31445-4-git-send-email-paul.gortmaker@windriver.com>
On Tue, 26 Jun 2012 15:54:29 -0400
Paul Gortmaker <paul.gortmaker@windriver.com> wrote:
> We've are dropping the support for the EOL SBC8560, so we can
> also delete this variant of the Alpha quirk support.
>
> Cc: Alan Cox <alan@linux.intel.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: linux-serial@vger.kernel.org
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> drivers/tty/serial/8250/8250.h | 7 -------
> 1 files changed, 0 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
> index f9719d1..ffd1e6e 100644
> --- a/drivers/tty/serial/8250/8250.h
> +++ b/drivers/tty/serial/8250/8250.h
> @@ -119,13 +119,6 @@ static inline void serial_dl_write(struct uart_8250_port *up, int value)
> * is cleared, the machine locks up with endless interrupts.
> */
> #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
> -#elif defined(CONFIG_SBC8560)
> -/*
> - * WindRiver did something similarly broken on their SBC8560 board. The
> - * UART tristates its IRQ output while OUT2 is clear, but they pulled
> - * the interrupt line _up_ instead of down, so if we register the IRQ
> - * while the UART is in that state, we die in an IRQ storm. */
> -#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
> #else
> #define ALPHA_KLUDGE_MCR 0
> #endif
Would you mind removing all of the crap from this if its going (eg
8250.c) not just the header so it gets missed ? Kill the symbol entirely ?
Alan
^ permalink raw reply
* Re: [PATCH 3/3] serial/8250: delete WR SBC850 UART quirk handling
From: Paul Gortmaker @ 2012-06-27 14:04 UTC (permalink / raw)
To: Alan Cox; +Cc: linuxppc-dev, Greg Kroah-Hartman, linux-serial, Alan Cox
In-Reply-To: <20120627125242.08a3114e@pyramind.ukuu.org.uk>
On 12-06-27 07:52 AM, Alan Cox wrote:
> On Tue, 26 Jun 2012 15:54:29 -0400
> Paul Gortmaker <paul.gortmaker@windriver.com> wrote:
>
>> We've are dropping the support for the EOL SBC8560, so we can
>> also delete this variant of the Alpha quirk support.
>>
>> Cc: Alan Cox <alan@linux.intel.com>
>> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>> Cc: linux-serial@vger.kernel.org
>> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
>> ---
>> drivers/tty/serial/8250/8250.h | 7 -------
>> 1 files changed, 0 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
>> index f9719d1..ffd1e6e 100644
>> --- a/drivers/tty/serial/8250/8250.h
>> +++ b/drivers/tty/serial/8250/8250.h
>> @@ -119,13 +119,6 @@ static inline void serial_dl_write(struct uart_8250_port *up, int value)
>> * is cleared, the machine locks up with endless interrupts.
>> */
>> #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
>> -#elif defined(CONFIG_SBC8560)
>> -/*
>> - * WindRiver did something similarly broken on their SBC8560 board. The
>> - * UART tristates its IRQ output while OUT2 is clear, but they pulled
>> - * the interrupt line _up_ instead of down, so if we register the IRQ
>> - * while the UART is in that state, we die in an IRQ storm. */
>> -#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
>> #else
>> #define ALPHA_KLUDGE_MCR 0
>> #endif
>
> Would you mind removing all of the crap from this if its going (eg
> 8250.c) not just the header so it gets missed ? Kill the symbol entirely ?
I will, once Alpha is removed from the tree. At the moment,
it still uses it.
Paul.
--
>
> Alan
^ permalink raw reply
* Re: [PATCH 3/3] serial/8250: delete WR SBC850 UART quirk handling
From: Alan Cox @ 2012-06-27 14:37 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev, Greg Kroah-Hartman, linux-serial, Alan Cox
In-Reply-To: <4FEB1307.7060209@windriver.com>
> I will, once Alpha is removed from the tree. At the moment,
> it still uses it.
Ok I hadn't realised that.
Alan
^ permalink raw reply
* [PATCH V4 2/2] PCI: minimal alignment for bars of P2P bridges
From: Gavin Shan @ 2012-06-27 14:48 UTC (permalink / raw)
To: linux-pci, linuxppc-dev; +Cc: bhelgaas, yinghai, Gavin Shan
In-Reply-To: <1340808525-24996-1-git-send-email-shangw@linux.vnet.ibm.com>
On some powerpc platforms, device BARs need to be assigned to separate
"segments" of the address space in order for the error isolation and HW
virtualization mechanisms (EEH) to work properly. Those "segments" have
a minimum size that can be fairly large (16M). In order to be able to
use the generic resource assignment code rather than re-inventing our
own, we chose to group devices by bus. That way, a simple change of the
minimum alignment requirements of resources assigned to PCI to PCI (P2P)
bridges is enough to ensure that all BARs for devices below those bridges
will fit into contiguous sets of segments and there will be no overlap.
This patch provides a way for the host bridge to override the default
alignment values used by the resource allocation code for that purpose.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
Reviewed-by: Richard Yang <weiyang@linux.vnet.ibm.com>
---
drivers/pci/probe.c | 5 +++++
drivers/pci/setup-bus.c | 28 +++++++++++++++++++++-------
include/linux/pci.h | 8 ++++++++
3 files changed, 34 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 658ac97..a196529 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -431,6 +431,11 @@ static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b)
if (bridge) {
INIT_LIST_HEAD(&bridge->windows);
bridge->bus = b;
+
+ /* Set minimal alignment shift of P2P bridges */
+ bridge->io_align_shift = PCI_DEFAULT_IO_ALIGN_SHIFT;
+ bridge->mem_align_shift = PCI_DEFAULT_MEM_ALIGN_SHIFT;
+ bridge->pmem_align_shift = PCI_DEFAULT_PMEM_ALIGN_SHIFT;
}
return bridge;
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 8fa2d4b..caebe98 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -706,10 +706,12 @@ static resource_size_t calculate_memsize(resource_size_t size,
static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
resource_size_t add_size, struct list_head *realloc_head)
{
+ struct pci_host_bridge *phb;
struct pci_dev *dev;
struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
unsigned long size = 0, size0 = 0, size1 = 0;
resource_size_t children_add_size = 0;
+ resource_size_t io_align;
if (!b_res)
return;
@@ -735,13 +737,17 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
children_add_size += get_res_add_size(realloc_head, r);
}
}
+
+ phb = find_pci_host_bridge(bus);
+ io_align = (1 << phb->io_align_shift);
+
size0 = calculate_iosize(size, min_size, size1,
- resource_size(b_res), 4096);
+ resource_size(b_res), io_align);
if (children_add_size > add_size)
add_size = children_add_size;
size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
calculate_iosize(size, min_size, add_size + size1,
- resource_size(b_res), 4096);
+ resource_size(b_res), io_align);
if (!size0 && !size1) {
if (b_res->start || b_res->end)
dev_info(&bus->self->dev, "disabling bridge window "
@@ -751,11 +757,11 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
return;
}
/* Alignment of the IO window is always 4K */
- b_res->start = 4096;
+ b_res->start = io_align;
b_res->end = b_res->start + size0 - 1;
b_res->flags |= IORESOURCE_STARTALIGN;
if (size1 > size0 && realloc_head) {
- add_to_list(realloc_head, bus->self, b_res, size1-size0, 4096);
+ add_to_list(realloc_head, bus->self, b_res, size1-size0, io_align);
dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
"%pR to [bus %02x-%02x] add_size %lx\n", b_res,
bus->secondary, bus->subordinate, size1-size0);
@@ -778,6 +784,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
resource_size_t add_size,
struct list_head *realloc_head)
{
+ struct pci_host_bridge *phb;
struct pci_dev *dev;
resource_size_t min_align, align, size, size0, size1;
resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */
@@ -785,10 +792,17 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
struct resource *b_res = find_free_bus_resource(bus, type);
unsigned int mem64_mask = 0;
resource_size_t children_add_size = 0;
+ int mem_align_shift;
if (!b_res)
return 0;
+ phb = find_pci_host_bridge(bus);
+ if (type & IORESOURCE_PREFETCH)
+ mem_align_shift = phb->pmem_align_shift;
+ else
+ mem_align_shift = phb->mem_align_shift;
+
memset(aligns, 0, sizeof(aligns));
max_order = 0;
size = 0;
@@ -818,8 +832,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
#endif
/* For bridges size != alignment */
align = pci_resource_alignment(dev, r);
- order = __ffs(align) - 20;
- if (order > 11) {
+ order = __ffs(align) - mem_align_shift;
+ if (order > (11 - (mem_align_shift - 20))) {
dev_warn(&dev->dev, "disabling BAR %d: %pR "
"(bad alignment %#llx)\n", i, r,
(unsigned long long) align);
@@ -846,7 +860,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
for (order = 0; order <= max_order; order++) {
resource_size_t align1 = 1;
- align1 <<= (order + 20);
+ align1 <<= (order + mem_align_shift);
if (!align)
min_align = align1;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 2b559f1..879de4e 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -376,9 +376,17 @@ struct pci_host_bridge_window {
resource_size_t offset; /* bus address + offset = CPU address */
};
+/* Default shits for P2P I/O and MMIO bar minimal alignment shifts */
+#define PCI_DEFAULT_IO_ALIGN_SHIFT 12 /* 4KB */
+#define PCI_DEFAULT_MEM_ALIGN_SHIFT 20 /* 1MB */
+#define PCI_DEFAULT_PMEM_ALIGN_SHIFT 20 /* 1MB */
+
struct pci_host_bridge {
struct device dev;
struct pci_bus *bus; /* root bus */
+ int io_align_shift; /* P2P I/O bar minimal alignment shift */
+ int mem_align_shift; /* P2P MMIO bar minimal alignment shift */
+ int pmem_align_shift; /* P2P prefetchable MMIO bar minimal alignment shift */
struct list_head windows; /* pci_host_bridge_windows */
void (*release_fn)(struct pci_host_bridge *);
void *release_data;
--
1.7.9.5
^ permalink raw reply related
* Re: [PATCH 4/4] powerpc/perf: Use perf_instruction_pointer in callchains
From: Scott Wood @ 2012-06-27 15:03 UTC (permalink / raw)
To: Anton Blanchard; +Cc: sukadev, paulus, linuxppc-dev
In-Reply-To: <20120627135928.06e91f76@kryten>
On 06/26/2012 10:59 PM, Anton Blanchard wrote:
>
> Hi Scott,
>
>> Won't this break core-fsl-emb, which doesn't define
>> perf_instruction_pointer()?
>
> It links ok for me. You should get the default version:
>
> #ifndef perf_misc_flags
> # define perf_misc_flags(regs) \
> (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL)
> # define perf_instruction_pointer(regs) instruction_pointer(regs)
> #endif
OK, sorry -- forgot to grep outside arch/powerpc. :-)
-Scott
^ permalink raw reply
* Re: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in sregs
From: Scott Wood @ 2012-06-27 15:23 UTC (permalink / raw)
To: Caraman Mihai Claudiu-B02008
Cc: qemu-ppc@nongnu.org, Wood Scott-B07421,
linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org,
kvm-ppc@vger.kernel.org
In-Reply-To: <300B73AA675FCE4A93EB4FC1D42459FF151D68@039-SN2MPN1-013.039d.mgd.msft.net>
On 06/27/2012 06:41 AM, Caraman Mihai Claudiu-B02008 wrote:
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Wednesday, June 27, 2012 1:35 AM
>> To: Caraman Mihai Claudiu-B02008
>> Cc: kvm-ppc@vger.kernel.org; kvm@vger.kernel.org; linuxppc-
>> dev@lists.ozlabs.org; qemu-ppc@nongnu.org
>> Subject: Re: [RFC PATCH 03/17] KVM: PPC64: booke: Add EPCR support in
>> sregs
>>
>> On 06/25/2012 07:26 AM, Mihai Caraman wrote:
>>> Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs for
>>> 64-bit hosts.
>>>
>>> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
>>> ---
>>> arch/powerpc/kvm/booke.c | 14 ++++++++++++++
>>> 1 files changed, 14 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index
>>> f9fa260..d15c4b5 100644
>>> --- a/arch/powerpc/kvm/booke.c
>>> +++ b/arch/powerpc/kvm/booke.c
>>> @@ -1052,6 +1052,9 @@ static void get_sregs_base(struct kvm_vcpu *vcpu,
>>> u64 tb = get_tb();
>>>
>>> sregs->u.e.features |= KVM_SREGS_E_BASE;
>>> +#ifdef CONFIG_64BIT
>>> + sregs->u.e.features |= KVM_SREGS_E_64;0 #endif
>>>
>>> sregs->u.e.csrr0 = vcpu->arch.csrr0;
>>> sregs->u.e.csrr1 = vcpu->arch.csrr1; @@ -1063,6 +1066,9 @@ static
>>> void get_sregs_base(struct kvm_vcpu *vcpu,
>>> sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
>>> sregs->u.e.tb = tb;
>>> sregs->u.e.vrsave = vcpu->arch.vrsave;
>>> +#ifdef CONFIG_64BIT
>>> + sregs->u.e.epcr = vcpu->arch.epcr;
>>> +#endif
>>> }
>>>
>>> static int set_sregs_base(struct kvm_vcpu *vcpu, @@ -1071,6 +1077,11
>>> @@ static int set_sregs_base(struct kvm_vcpu *vcpu,
>>> if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
>>> return 0;
>>>
>>> +#ifdef CONFIG_64BIT
>>> + if (!(sregs->u.e.features & KVM_SREGS_E_64))
>>> + return 0;
>>> +#endif
>>
>> This means that a QEMU targeting a 32-bit guest won't be able to set any
>> special registers, if it sets feature bits manually rather than getting
>> them from GET_SREGS.
>
> I had some concerns about his. I only check qemu ppc code which uses get/set
> approach and I followed the BASE model. Now I see that qemu x86 set them manually :(
> Why do we care if the caller set or not BASE?
BASE contains things which should be present on all booke chips. If
that's not set something's wrong.
None of the other feature bits are handled that way.
-Scott
^ permalink raw reply
* [PATCH 11/21] ppc/eeh: trace EEH state based on PE
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
Since we've introduced dedicated struct to trace individual PEs,
it's reasonable to trace its state through the dedicated struct
instead of using "eeh_dev" any more.
The patches implements the state tracing based on PE. It's notable
that the PE state will be applied to the specified PE as well as
its child PEs. That complies with the rule that problematic parent
PE will prevent those child PEs from working properly.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 3 +
arch/powerpc/include/asm/ppc-pci.h | 4 +-
arch/powerpc/platforms/pseries/eeh.c | 102 -------------------------------
arch/powerpc/platforms/pseries/eeh_pe.c | 79 ++++++++++++++++++++++++
4 files changed, 84 insertions(+), 104 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index fd69584..493dc7c 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -67,6 +67,9 @@ struct eeh_pe {
struct list_head child; /* Child PEs */
};
+#define eeh_pe_for_each_dev(pe, edev) \
+ list_for_each_entry(edev, &pe->edevs, list)
+
/*
* The struct is used to trace EEH state for the associated
* PCI device node or PCI device. In future, it might
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index 80fa704..c7e5bd6 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -57,8 +57,8 @@ int eeh_reset_pe(struct eeh_dev *);
void eeh_restore_bars(struct eeh_dev *);
int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
-void eeh_mark_slot(struct device_node *dn, int mode_flag);
-void eeh_clear_slot(struct device_node *dn, int mode_flag);
+void eeh_pe_state_mark(struct eeh_pe *pe, int state);
+void eeh_pe_state_clear(struct eeh_pe *pe, int state);
struct device_node *eeh_find_device_pe(struct device_node *dn);
void eeh_sysfs_add_device(struct pci_dev *pdev);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 82a5fdc..c527c46 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -279,108 +279,6 @@ struct device_node *eeh_find_device_pe(struct device_node *dn)
}
/**
- * __eeh_mark_slot - Mark all child devices as failed
- * @parent: parent device
- * @mode_flag: failure flag
- *
- * Mark all devices that are children of this device as failed.
- * Mark the device driver too, so that it can see the failure
- * immediately; this is critical, since some drivers poll
- * status registers in interrupts ... If a driver is polling,
- * and the slot is frozen, then the driver can deadlock in
- * an interrupt context, which is bad.
- */
-static void __eeh_mark_slot(struct device_node *parent, int mode_flag)
-{
- struct device_node *dn;
-
- for_each_child_of_node(parent, dn) {
- if (of_node_to_eeh_dev(dn)) {
- /* Mark the pci device driver too */
- struct pci_dev *dev = of_node_to_eeh_dev(dn)->pdev;
-
- of_node_to_eeh_dev(dn)->mode |= mode_flag;
-
- if (dev && dev->driver)
- dev->error_state = pci_channel_io_frozen;
-
- __eeh_mark_slot(dn, mode_flag);
- }
- }
-}
-
-/**
- * eeh_mark_slot - Mark the indicated device and its children as failed
- * @dn: parent device
- * @mode_flag: failure flag
- *
- * Mark the indicated device and its child devices as failed.
- * The device drivers are marked as failed as well.
- */
-void eeh_mark_slot(struct device_node *dn, int mode_flag)
-{
- struct pci_dev *dev;
- dn = eeh_find_device_pe(dn);
-
- /* Back up one, since config addrs might be shared */
- if (!pcibios_find_pci_bus(dn) && of_node_to_eeh_dev(dn->parent))
- dn = dn->parent;
-
- of_node_to_eeh_dev(dn)->mode |= mode_flag;
-
- /* Mark the pci device too */
- dev = of_node_to_eeh_dev(dn)->pdev;
- if (dev)
- dev->error_state = pci_channel_io_frozen;
-
- __eeh_mark_slot(dn, mode_flag);
-}
-
-/**
- * __eeh_clear_slot - Clear failure flag for the child devices
- * @parent: parent device
- * @mode_flag: flag to be cleared
- *
- * Clear failure flag for the child devices.
- */
-static void __eeh_clear_slot(struct device_node *parent, int mode_flag)
-{
- struct device_node *dn;
-
- for_each_child_of_node(parent, dn) {
- if (of_node_to_eeh_dev(dn)) {
- of_node_to_eeh_dev(dn)->mode &= ~mode_flag;
- of_node_to_eeh_dev(dn)->check_count = 0;
- __eeh_clear_slot(dn, mode_flag);
- }
- }
-}
-
-/**
- * eeh_clear_slot - Clear failure flag for the indicated device and its children
- * @dn: parent device
- * @mode_flag: flag to be cleared
- *
- * Clear failure flag for the indicated device and its children.
- */
-void eeh_clear_slot(struct device_node *dn, int mode_flag)
-{
- unsigned long flags;
- raw_spin_lock_irqsave(&confirm_error_lock, flags);
-
- dn = eeh_find_device_pe(dn);
-
- /* Back up one, since config addrs might be shared */
- if (!pcibios_find_pci_bus(dn) && of_node_to_eeh_dev(dn->parent))
- dn = dn->parent;
-
- of_node_to_eeh_dev(dn)->mode &= ~mode_flag;
- of_node_to_eeh_dev(dn)->check_count = 0;
- __eeh_clear_slot(dn, mode_flag);
- raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
-}
-
-/**
* eeh_dn_check_failure - Check if all 1's data is due to EEH slot freeze
* @dn: device node
* @dev: pci device, if known
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index ed675b8..3041e32 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -382,3 +382,82 @@ int eeh_pe_remove(struct eeh_dev *edev)
return 0;
}
+/**
+ * __eeh_pe_state_mark - Mark the state for the PE
+ * @data: EEH PE
+ * @flag: state
+ *
+ * The function is used to mark the indicated state for the given
+ * PE. Also, the associated PCI devices will be put into IO frozen
+ * state as well.
+ */
+static void *__eeh_pe_state_mark(void *data, void *flag)
+{
+ struct eeh_pe *pe = (struct eeh_pe *)data;
+ int state = *((int *)flag);
+ struct eeh_dev *tmp;
+ struct pci_dev *pdev;
+
+ /*
+ * Mark the PE with the indicated state. Also,
+ * the associated PCI device will be put into
+ * I/O frozen state to avoid I/O accesses from
+ * the PCI device driver.
+ */
+ pe->state |= state;
+ eeh_pe_for_each_dev(pe, tmp) {
+ pdev = eeh_dev_to_pci_dev(tmp);
+ if (pdev)
+ pdev->error_state = pci_channel_io_frozen;
+ }
+
+ return NULL;
+}
+
+/**
+ * eeh_pe_state_mark - Mark specified state for PE and its associated device
+ * @pe: EEH PE
+ *
+ * EEH error affects the current PE and its child PEs. The function
+ * is used to mark appropriate state for the affected PEs and the
+ * associated devices.
+ */
+void eeh_pe_state_mark(struct eeh_pe *pe, int state)
+{
+ eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
+}
+
+/**
+ * __eeh_pe_state_clear - Clear state for the PE
+ * @data: EEH PE
+ * @flag: state
+ *
+ * The function is used to clear the indicated state from the
+ * given PE. Besides, we also clear the check count of the PE
+ * as well.
+ */
+static void *__eeh_pe_state_clear(void *data, void *flag)
+{
+ struct eeh_pe *pe = (struct eeh_pe *)data;
+ int state = *((int *)flag);
+
+ pe->state &= ~state;
+ pe->check_count = 0;
+
+ return NULL;
+}
+
+/**
+ * eeh_pe_state_clear - Clear state for the PE and its children
+ * @pe: PE
+ * @state: state to be cleared
+ *
+ * When the PE and its children has been recovered from error,
+ * we need clear the error state for that. The function is used
+ * for the purpose.
+ */
+void eeh_pe_state_clear(struct eeh_pe *pe, int state)
+{
+ eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
+}
+
--
1.7.9.5
^ permalink raw reply related
* [PATCH 10/21] ppc/eeh: build EEH event based on PE
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
The original implementation builds EEH event based on EEH device.
We already had dedicated struct to depict PE. It's reasonable to
build EEH event based on PE.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh_event.h | 4 ++--
arch/powerpc/platforms/pseries/eeh_event.c | 29 ++++++++--------------------
2 files changed, 10 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh_event.h b/arch/powerpc/include/asm/eeh_event.h
index c68b012..dc722b5 100644
--- a/arch/powerpc/include/asm/eeh_event.h
+++ b/arch/powerpc/include/asm/eeh_event.h
@@ -28,10 +28,10 @@
*/
struct eeh_event {
struct list_head list; /* to form event queue */
- struct eeh_dev *edev; /* EEH device */
+ struct eeh_pe *pe; /* EEH PE */
};
-int eeh_send_failure_event(struct eeh_dev *edev);
+int eeh_send_failure_event(struct eeh_pe *pe);
struct eeh_dev *handle_eeh_events(struct eeh_event *);
#endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index 87fea2e..ab8ca18 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -117,36 +117,23 @@ static void eeh_thread_launcher(struct work_struct *dummy)
/**
* eeh_send_failure_event - Generate a PCI error event
- * @edev: EEH device
+ * @pe: EEH PE
*
* This routine can be called within an interrupt context;
* the actual event will be delivered in a normal context
* (from a workqueue).
*/
-int eeh_send_failure_event(struct eeh_dev *edev)
+int eeh_send_failure_event(struct eeh_pe *pe)
{
unsigned long flags;
struct eeh_event *event;
- struct device_node *dn = eeh_dev_to_of_node(edev);
- const char *location;
-
- if (!mem_init_done) {
- printk(KERN_ERR "EEH: event during early boot not handled\n");
- location = of_get_property(dn, "ibm,loc-code", NULL);
- printk(KERN_ERR "EEH: device node = %s\n", dn->full_name);
- printk(KERN_ERR "EEH: PCI location = %s\n", location);
- return 1;
- }
- event = kzalloc(sizeof(*event), GFP_ATOMIC);
- if (event == NULL) {
- printk(KERN_ERR "EEH: out of memory, event not handled\n");
- return 1;
- }
-
- if (edev->pdev)
- pci_dev_get(edev->pdev);
- event->edev = edev;
+ event = kzalloc(sizeof(*event), GFP_ATOMIC);
+ if (!event) {
+ pr_err("EEH: out of memory, event not handled\n");
+ return -ENOMEM;
+ }
+ event->pe = pe;
/* We may or may not be called in an interrupt context */
spin_lock_irqsave(&eeh_eventlist_lock, flags);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 09/21] ppc/eeh: remove PE at appropriate time
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
During PCI hotplug and EEH recovery, the PE hierarchy PE might be
changed due to the PCI topology changes. At later point when the
PCI device is added, the PE will be created dynamically again.
The patch introduces new function to remove EEH devices from the
associated PE. That also can cause that the parent PE is removed
from the PE tree if the parent PE doesn't include valid EEH devices
and child PEs.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 1 +
arch/powerpc/platforms/pseries/eeh.c | 1 +
arch/powerpc/platforms/pseries/eeh_pe.c | 46 +++++++++++++++++++++++++++++++
3 files changed, 48 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index e41107d..fd69584 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -167,6 +167,7 @@ static inline void eeh_unlock(void)
typedef void *(*eeh_traverse_func)(void *data, void *flag);
int __devinit eeh_phb_pe_create(struct pci_controller *phb);
int eeh_pe_create(struct eeh_dev *edev);
+int eeh_pe_remove(struct eeh_dev *edev);
void * __devinit eeh_dev_init(struct device_node *dn, void *data);
void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 99937da..82a5fdc 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -1156,6 +1156,7 @@ static void eeh_remove_device(struct pci_dev *dev)
dev->dev.archdata.edev = NULL;
pci_dev_put(dev);
+ eeh_pe_remove(edev);
pci_addr_cache_remove_device(dev);
eeh_sysfs_remove_device(dev);
}
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index 56aab91..ed675b8 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -336,3 +336,49 @@ int eeh_pe_create(struct eeh_dev *edev)
return 0;
}
+/**
+ * eeh_pe_remove - Remove one EEH device from the associated PE
+ * @edev: EEH device
+ *
+ * The PE hierarchy tree might be changed when doing PCI hotplug.
+ * Also, the PCI devices or buses could be removed from the system
+ * during EEH recovery.
+ */
+int eeh_pe_remove(struct eeh_dev *edev)
+{
+ struct eeh_pe *pe, *parent;
+
+ if (!edev->pe) {
+ pr_err("%s: No PE found for EEH device %s\n",
+ __func__, edev->dn->full_name);
+ return -EEXIST;
+ }
+
+ /* Remove the EEH device */
+ pe = edev->pe;
+ edev->pe = NULL;
+ list_del(&edev->list);
+
+ /*
+ * Check if the parent PE includes any EEH devices.
+ * If not, we should delete that. Also, we should
+ * delete the parent PE if it doesn't have associated
+ * child PEs and EEH devices.
+ */
+ while (1) {
+ parent = pe->parent;
+ if (pe->type & EEH_PE_PHB)
+ break;
+
+ if (list_empty(&pe->edevs) &&
+ list_empty(&pe->child_list)) {
+ list_del(&pe->child);
+ kfree(pe);
+ }
+
+ pe = parent;
+ }
+
+ return 0;
+}
+
--
1.7.9.5
^ permalink raw reply related
* [PATCH 14/21] ppc/eeh: device bars restore based on PE
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
The patch introduces the function to traverse the devices of the
specified PE and its child PEs. Also, the restore on device bars
is implemented based on the traverse function.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 3 +
arch/powerpc/include/asm/ppc-pci.h | 1 -
arch/powerpc/platforms/pseries/eeh.c | 79 --------------------------
arch/powerpc/platforms/pseries/eeh_pe.c | 93 +++++++++++++++++++++++++++++++
4 files changed, 96 insertions(+), 80 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 96451b7..9a9fe28 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -171,6 +171,9 @@ typedef void *(*eeh_traverse_func)(void *data, void *flag);
int __devinit eeh_phb_pe_create(struct pci_controller *phb);
int eeh_pe_create(struct eeh_dev *edev);
int eeh_pe_remove(struct eeh_dev *edev);
+void *eeh_pe_dev_traverse(struct eeh_pe *root,
+ eeh_traverse_func fn, void *flag);
+void eeh_pe_restore_bars(struct eeh_pe *pe);
void * __devinit eeh_dev_init(struct device_node *dn, void *data);
void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb);
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index 3e301b1..5cbe3f2 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -54,7 +54,6 @@ struct pci_dev *pci_addr_cache_get_device(unsigned long addr);
void eeh_slot_error_detail(struct eeh_dev *edev, int severity);
int eeh_pci_enable(struct eeh_dev *edev, int function);
int eeh_reset_pe(struct eeh_dev *);
-void eeh_restore_bars(struct eeh_dev *);
int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
void eeh_pe_state_mark(struct eeh_pe *pe, int state);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 636413f..28d0c04 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -610,85 +610,6 @@ int eeh_reset_pe(struct eeh_dev *edev)
return -1;
}
-/** Save and restore of PCI BARs
- *
- * Although firmware will set up BARs during boot, it doesn't
- * set up device BAR's after a device reset, although it will,
- * if requested, set up bridge configuration. Thus, we need to
- * configure the PCI devices ourselves.
- */
-
-/**
- * eeh_restore_one_device_bars - Restore the Base Address Registers for one device
- * @edev: PCI device associated EEH device
- *
- * Loads the PCI configuration space base address registers,
- * the expansion ROM base address, the latency timer, and etc.
- * from the saved values in the device node.
- */
-static inline void eeh_restore_one_device_bars(struct eeh_dev *edev)
-{
- int i;
- u32 cmd;
- struct device_node *dn = eeh_dev_to_of_node(edev);
-
- if (!edev->phb)
- return;
-
- for (i=4; i<10; i++) {
- eeh_ops->write_config(dn, i*4, 4, edev->config_space[i]);
- }
-
- /* 12 == Expansion ROM Address */
- eeh_ops->write_config(dn, 12*4, 4, edev->config_space[12]);
-
-#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
-#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
-
- eeh_ops->write_config(dn, PCI_CACHE_LINE_SIZE, 1,
- SAVED_BYTE(PCI_CACHE_LINE_SIZE));
-
- eeh_ops->write_config(dn, PCI_LATENCY_TIMER, 1,
- SAVED_BYTE(PCI_LATENCY_TIMER));
-
- /* max latency, min grant, interrupt pin and line */
- eeh_ops->write_config(dn, 15*4, 4, edev->config_space[15]);
-
- /* Restore PERR & SERR bits, some devices require it,
- * don't touch the other command bits
- */
- eeh_ops->read_config(dn, PCI_COMMAND, 4, &cmd);
- if (edev->config_space[1] & PCI_COMMAND_PARITY)
- cmd |= PCI_COMMAND_PARITY;
- else
- cmd &= ~PCI_COMMAND_PARITY;
- if (edev->config_space[1] & PCI_COMMAND_SERR)
- cmd |= PCI_COMMAND_SERR;
- else
- cmd &= ~PCI_COMMAND_SERR;
- eeh_ops->write_config(dn, PCI_COMMAND, 4, cmd);
-}
-
-/**
- * eeh_restore_bars - Restore the PCI config space info
- * @edev: EEH device
- *
- * This routine performs a recursive walk to the children
- * of this device as well.
- */
-void eeh_restore_bars(struct eeh_dev *edev)
-{
- struct device_node *dn;
- if (!edev)
- return;
-
- if ((edev->mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(edev->class_code))
- eeh_restore_one_device_bars(edev);
-
- for_each_child_of_node(eeh_dev_to_of_node(edev), dn)
- eeh_restore_bars(of_node_to_eeh_dev(dn));
-}
-
/**
* eeh_save_bars - Save device bars
* @edev: PCI device associated EEH device
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index 3041e32..8bae0f6 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -154,6 +154,38 @@ static void *eeh_pe_traverse(struct eeh_pe *root,
}
/**
+ * eeh_pe_dev_traverse - Traverse the devices from the PE
+ * @root: EEH PE
+ * @fn: function callback
+ * @flag: extra parameter to callback
+ *
+ * The function is used to traverse the devices of the specified
+ * PE and its child PEs.
+ */
+void *eeh_pe_dev_traverse(struct eeh_pe *root,
+ eeh_traverse_func fn, void *flag)
+{
+ struct eeh_pe *pe;
+ struct eeh_dev *edev;
+ void *ret;
+
+ if (!root) {
+ pr_warning("%s: Invalid PE %p\n", __func__, root);
+ return NULL;
+ }
+
+ /* Traverse root PE */
+ for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
+ eeh_pe_for_each_dev(pe, edev) {
+ ret = fn(edev, flag);
+ if (ret) return ret;
+ }
+ }
+
+ return NULL;
+}
+
+/**
* __eeh_pe_get - Check the PE address
* @data: EEH PE
* @flag: EEH device
@@ -461,3 +493,64 @@ void eeh_pe_state_clear(struct eeh_pe *pe, int state)
eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
}
+/**
+ * eeh_restore_one_device_bars - Restore the Base Address Registers for one device
+ * @data: EEH device
+ * @flag: Unused
+ *
+ * Loads the PCI configuration space base address registers,
+ * the expansion ROM base address, the latency timer, and etc.
+ * from the saved values in the device node.
+ */
+static void *eeh_restore_one_device_bars(void *data, void *flag)
+{
+ int i;
+ u32 cmd;
+ struct eeh_dev *edev = (struct eeh_dev *)data;
+ struct device_node *dn = eeh_dev_to_of_node(edev);
+
+ for (i = 4; i < 10; i++)
+ eeh_ops->write_config(dn, i*4, 4, edev->config_space[i]);
+ /* 12 == Expansion ROM Address */
+ eeh_ops->write_config(dn, 12*4, 4, edev->config_space[12]);
+
+#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
+#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
+
+ eeh_ops->write_config(dn, PCI_CACHE_LINE_SIZE, 1,
+ SAVED_BYTE(PCI_CACHE_LINE_SIZE));
+ eeh_ops->write_config(dn, PCI_LATENCY_TIMER, 1,
+ SAVED_BYTE(PCI_LATENCY_TIMER));
+
+ /* max latency, min grant, interrupt pin and line */
+ eeh_ops->write_config(dn, 15*4, 4, edev->config_space[15]);
+
+ /* Restore PERR & SERR bits, some devices require it,
+ * don't touch the other command bits
+ */
+ eeh_ops->read_config(dn, PCI_COMMAND, 4, &cmd);
+ if (edev->config_space[1] & PCI_COMMAND_PARITY)
+ cmd |= PCI_COMMAND_PARITY;
+ else
+ cmd &= ~PCI_COMMAND_PARITY;
+ if (edev->config_space[1] & PCI_COMMAND_SERR)
+ cmd |= PCI_COMMAND_SERR;
+ else
+ cmd &= ~PCI_COMMAND_SERR;
+ eeh_ops->write_config(dn, PCI_COMMAND, 4, cmd);
+
+ return NULL;
+}
+
+/**
+ * eeh_pe_restore_bars - Restore the PCI config space info
+ * @pe: EEH PE
+ *
+ * This routine performs a recursive walk to the children
+ * of this device as well.
+ */
+void eeh_pe_restore_bars(struct eeh_pe *pe)
+{
+ eeh_pe_dev_traverse(pe, eeh_restore_one_device_bars, NULL);
+}
+
--
1.7.9.5
^ permalink raw reply related
* [PATCH V4 1/2] PCI: pcibus address to resource converting take bus directly
From: Gavin Shan @ 2012-06-27 14:48 UTC (permalink / raw)
To: linux-pci, linuxppc-dev; +Cc: bhelgaas, yinghai, Gavin Shan
For allocating resource under bus path, we do have dev pass along,
and we could just use bus instead. Also, we'd like to make function
find_pci_host_bridge() global so that some platforms (e.g. PPC) can
access the pci host bridge directly.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
drivers/pci/host-bridge.c | 34 +++++++++++++++++++++-------------
include/linux/pci.h | 4 ++++
2 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c
index a68dc61..4ccf477 100644
--- a/drivers/pci/host-bridge.c
+++ b/drivers/pci/host-bridge.c
@@ -9,22 +9,19 @@
#include "pci.h"
-static struct pci_bus *find_pci_root_bus(struct pci_dev *dev)
+static struct pci_bus *find_pci_root_bus(struct pci_bus *bus)
{
- struct pci_bus *bus;
-
- bus = dev->bus;
while (bus->parent)
bus = bus->parent;
return bus;
}
-static struct pci_host_bridge *find_pci_host_bridge(struct pci_dev *dev)
+struct pci_host_bridge *find_pci_host_bridge(struct pci_bus *bus)
{
- struct pci_bus *bus = find_pci_root_bus(dev);
+ struct pci_bus *root_bus = find_pci_root_bus(bus);
- return to_pci_host_bridge(bus->bridge);
+ return to_pci_host_bridge(root_bus->bridge);
}
void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
@@ -40,10 +37,11 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
return res1->start <= res2->start && res1->end >= res2->end;
}
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
+void __pcibios_resource_to_bus(struct pci_bus *bus,
+ struct pci_bus_region *region,
+ struct resource *res)
{
- struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
+ struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
struct pci_host_bridge_window *window;
resource_size_t offset = 0;
@@ -60,6 +58,11 @@ void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
region->start = res->start - offset;
region->end = res->end - offset;
}
+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+ struct resource *res)
+{
+ __pcibios_resource_to_bus(dev->bus, region, res);
+}
EXPORT_SYMBOL(pcibios_resource_to_bus);
static bool region_contains(struct pci_bus_region *region1,
@@ -68,10 +71,10 @@ static bool region_contains(struct pci_bus_region *region1,
return region1->start <= region2->start && region1->end >= region2->end;
}
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
+static void __pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
+ struct pci_bus_region *region)
{
- struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
+ struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
struct pci_host_bridge_window *window;
resource_size_t offset = 0;
@@ -93,4 +96,9 @@ void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
res->start = region->start + offset;
res->end = region->end + offset;
}
+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+ struct pci_bus_region *region)
+{
+ __pcibios_bus_to_resource(dev->bus, res, region);
+}
EXPORT_SYMBOL(pcibios_bus_to_resource);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index fefb4e1..2b559f1 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -385,6 +385,7 @@ struct pci_host_bridge {
};
#define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
+struct pci_host_bridge *find_pci_host_bridge(struct pci_bus *bus);
void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
void (*release_fn)(struct pci_host_bridge *),
void *release_data);
@@ -657,6 +658,9 @@ void pci_fixup_cardbus(struct pci_bus *);
/* Generic PCI functions used internally */
+void __pcibios_resource_to_bus(struct pci_bus *bus,
+ struct pci_bus_region *region,
+ struct resource *res);
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
struct resource *res);
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 20/21] ppc/eeh: probe mode support
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
While EEH module is installed, PCI devices is checked one by one
to see if it supports eeh. That is done based on OF nodes or
PCI device referred by "struct pci_dev". In order to distinguish
the case, global variable "eeh_probe_mode" is introduced.
The patch implements the support to eeh probe mode. Also, the
EEH on pseries has set it into EEH_PROBE_MODE_FDT. That means
the probe will be done based on OF nodes on pSeries platform.
In addition, On pSeries platform, it's done by OF nodes. The patch
moves the the probe function to platform dependent backend and do
some cleanup.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 21 +++++
arch/powerpc/include/asm/ppc-pci.h | 1 +
arch/powerpc/platforms/pseries/eeh.c | 131 +++++---------------------
arch/powerpc/platforms/pseries/eeh_pseries.c | 96 +++++++++++++++++++
4 files changed, 140 insertions(+), 109 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index b7ac3f7..91c38b7 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -129,6 +129,8 @@ static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
struct eeh_ops {
char *name;
int (*init)(void);
+ void* (*of_probe)(struct device_node *dn, void *flag);
+ void* (*dev_probe)(struct pci_dev *dev, void *flag);
int (*set_option)(struct eeh_pe *pe, int option);
int (*get_pe_addr)(struct eeh_pe *pe);
int (*get_state)(struct eeh_pe *pe, int *state);
@@ -143,6 +145,25 @@ struct eeh_ops {
extern struct eeh_ops *eeh_ops;
extern int eeh_subsystem_enabled;
extern struct mutex eeh_mutex;
+extern int eeh_probe_mode;
+
+#define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */
+#define EEH_PROBE_MODE_FDT (1<<1) /* From FDT */
+
+static inline void eeh_probe_mode_set(int flag)
+{
+ eeh_probe_mode = flag;
+}
+
+static inline int eeh_probe_mode_fdt(void)
+{
+ return (eeh_probe_mode == EEH_PROBE_MODE_FDT);
+}
+
+static inline int eeh_probe_mode_dev(void)
+{
+ return (eeh_probe_mode == EEH_PROBE_MODE_DEV);
+}
static inline void eeh_lock(void)
{
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index 2a80f08..56d55c7 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -54,6 +54,7 @@ struct pci_dev *pci_addr_cache_get_device(unsigned long addr);
void eeh_slot_error_detail(struct eeh_pe *pe, int severity);
int eeh_pci_enable(struct eeh_pe *pe, int function);
int eeh_reset_pe(struct eeh_pe *);
+void eeh_save_bars(struct eeh_dev *edev);
int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
void eeh_pe_state_mark(struct eeh_pe *pe, int state);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 1438c4e..b2caf84 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -92,6 +92,17 @@ struct eeh_ops *eeh_ops = NULL;
int eeh_subsystem_enabled;
EXPORT_SYMBOL(eeh_subsystem_enabled);
+/*
+ * EEH probe mode support. The intention is to support multiple
+ * platforms for EEH. Some platforms like pSeries do PCI emunation
+ * based on FDT (Flat Device Tree). However, other platforms like
+ * powernv probe PCI devices from hardware. The flag is used to
+ * distinguish that. In addition, struct eeh_ops::probe would be
+ * invoked for particular OF node or PCI device so that the
+ * corresponding PE would be created there.
+ */
+int eeh_probe_mode;
+
/* Global EEH mutex */
DEFINE_MUTEX(eeh_mutex);
@@ -590,7 +601,7 @@ int eeh_reset_pe(struct eeh_pe *pe)
* PCI devices are added individually; but, for the restore,
* an entire slot is reset at a time.
*/
-static void eeh_save_bars(struct eeh_dev *edev)
+void eeh_save_bars(struct eeh_dev *edev)
{
int i;
struct device_node *dn;
@@ -604,108 +615,6 @@ static void eeh_save_bars(struct eeh_dev *edev)
}
/**
- * eeh_early_enable - Early enable EEH on the indicated device
- * @dn: device node
- * @data: BUID
- *
- * Enable EEH functionality on the specified PCI device. The function
- * is expected to be called before real PCI probing is done. However,
- * the PHBs have been initialized at this point.
- */
-static void *eeh_early_enable(struct device_node *dn, void *data)
-{
- int ret;
- const u32 *class_code = of_get_property(dn, "class-code", NULL);
- const u32 *vendor_id = of_get_property(dn, "vendor-id", NULL);
- const u32 *device_id = of_get_property(dn, "device-id", NULL);
- const u32 *regs;
- int enable;
- struct eeh_dev *edev = of_node_to_eeh_dev(dn);
- struct eeh_pe pe;
-
- edev->class_code = 0;
- edev->mode = 0;
-
- if (!of_device_is_available(dn))
- return NULL;
-
- /* Ignore bad nodes. */
- if (!class_code || !vendor_id || !device_id)
- return NULL;
-
- /* There is nothing to check on PCI to ISA bridges */
- if (dn->type && !strcmp(dn->type, "isa"))
- return NULL;
- edev->class_code = *class_code;
-
- /* Ok... see if this device supports EEH. Some do, some don't,
- * and the only way to find out is to check each and every one.
- */
- regs = of_get_property(dn, "reg", NULL);
- if (regs) {
- /* Initialize the fake PE */
- memset(&pe, 0, sizeof(struct eeh_pe));
- pe.phb = edev->phb;
- pe.config_addr = regs[0];
-
- /* First register entry is addr (00BBSS00) */
- /* Try to enable eeh */
- ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
-
- enable = 0;
- if (ret == 0) {
- edev->config_addr = regs[0];
-
- /* If the newer, better, ibm,get-config-addr-info is supported,
- * then use that instead.
- */
- edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
- pe.addr = edev->pe_config_addr;
-
- /* Some older systems (Power4) allow the
- * ibm,set-eeh-option call to succeed even on nodes
- * where EEH is not supported. Verify support
- * explicitly.
- */
- ret = eeh_ops->get_state(&pe, NULL);
- if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
- enable = 1;
- }
-
- if (enable) {
- eeh_subsystem_enabled = 1;
-
- eeh_pe_create(edev);
-
- pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
- dn->full_name, edev->config_addr,
- edev->pe_config_addr);
- } else {
-
- /* This device doesn't support EEH, but it may have an
- * EEH parent, in which case we mark it as supported.
- */
- if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
- of_node_to_eeh_dev(dn->parent)->pe) {
- /* Parent supports EEH. */
- edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
- edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
-
- eeh_pe_create(edev);
-
- return NULL;
- }
- }
- } else {
- printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
- dn->full_name);
- }
-
- eeh_save_bars(edev);
- return NULL;
-}
-
-/**
* eeh_ops_register - Register platform dependent EEH operations
* @ops: platform dependent EEH operations
*
@@ -790,15 +699,18 @@ static int __init eeh_init(void)
raw_spin_lock_init(&confirm_error_lock);
/* Enable EEH for all adapters */
- list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
- phb = hose->dn;
- traverse_pci_devices(phb, eeh_early_enable, NULL);
+ if (eeh_probe_mode_fdt()) {
+ list_for_each_entry_safe(hose, tmp,
+ &hose_list, list_node) {
+ phb = hose->dn;
+ traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
+ }
}
if (eeh_subsystem_enabled)
- printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
+ pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
else
- printk(KERN_WARNING "EEH: No capable adapters found\n");
+ pr_warning("EEH: No capable adapters found\n");
return ret;
}
@@ -829,7 +741,8 @@ static void eeh_add_device_early(struct device_node *dn)
if (NULL == phb || 0 == phb->buid)
return;
- eeh_early_enable(dn, NULL);
+ /* FIXME: hotplug support on POWERNV */
+ eeh_ops->of_probe(dn, NULL);
}
/**
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 6760e70..faeb26a 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -129,10 +129,104 @@ static int pseries_eeh_init(void)
eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
}
+ /* Set EEH probe mode */
+ eeh_probe_mode_set(EEH_PROBE_MODE_FDT);
+
return 0;
}
/**
+ * pseries_eeh_of_probe - EEH probe on the given device
+ * @dn: OF node
+ * @flag: Unused
+ *
+ * When EEH module is installed during system boot, all PCI devices
+ * are checked one by one to see if it supports EEH. The function
+ * is introduced for the purpose.
+ */
+static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
+{
+ struct eeh_dev *edev;
+ struct eeh_pe pe;
+ const u32 *class_code, *vendor_id, *device_id;
+ const u32 *regs;
+ int enable = 0;
+ int ret;
+
+ /* Retrieve OF node and eeh device */
+ edev = of_node_to_eeh_dev(dn);
+ if (!of_device_is_available(dn))
+ return NULL;
+
+ /* Retrieve class/vendor/device IDs */
+ class_code = of_get_property(dn, "class-code", NULL);
+ vendor_id = of_get_property(dn, "vendor-id", NULL);
+ device_id = of_get_property(dn, "device-id", NULL);
+
+ /* Skip for bad OF node or PCI-ISA bridge */
+ if (!class_code || !vendor_id || !device_id)
+ return NULL;
+ if (dn->type && !strcmp(dn->type, "isa"))
+ return NULL;
+
+ /* Update class code and mode of eeh device */
+ edev->class_code = *class_code;
+ edev->mode = 0;
+
+ /* Retrieve the device address */
+ regs = of_get_property(dn, "reg", NULL);
+ if (!regs) {
+ pr_warning("%s: OF node property %s::reg not found\n",
+ __func__, dn->full_name);
+ return NULL;
+ }
+
+ /* Initialize the fake PE */
+ memset(&pe, 0, sizeof(struct eeh_pe));
+ pe.phb = edev->phb;
+ pe.config_addr = regs[0];
+
+ /* Enable EEH on the device */
+ ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
+ if (!ret) {
+ edev->config_addr = regs[0];
+ /* Retrieve PE address */
+ edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
+ pe.addr = edev->pe_config_addr;
+
+ /* Some older systems (Power4) allow the ibm,set-eeh-option
+ * call to succeed even on nodes where EEH is not supported.
+ * Verify support explicitly.
+ */
+ ret = eeh_ops->get_state(&pe, NULL);
+ if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
+ enable = 1;
+
+ if (enable) {
+ eeh_subsystem_enabled = 1;
+ eeh_pe_create(edev);
+
+ pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
+ __func__, dn->full_name, pe.phb->global_number,
+ pe.addr, pe.config_addr);
+ } else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
+ (of_node_to_eeh_dev(dn->parent))->pe) {
+ /* This device doesn't support EEH, but it may have an
+ * EEH parent, in which case we mark it as supported.
+ */
+ edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
+ edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
+ eeh_pe_create(edev);
+ }
+ }
+
+ /* Save memory bars */
+ eeh_save_bars(edev);
+
+ return NULL;
+}
+
+/**
* pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
* @pe: EEH PE
* @option: operation to be issued
@@ -523,6 +617,8 @@ static int pseries_eeh_write_config(struct device_node *dn, int where, int size,
static struct eeh_ops pseries_eeh_ops = {
.name = "pseries",
.init = pseries_eeh_init,
+ .of_probe = pseries_eeh_of_probe,
+ .dev_probe = NULL,
.set_option = pseries_eeh_set_option,
.get_pe_addr = pseries_eeh_get_pe_addr,
.get_state = pseries_eeh_get_state,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 19/21] ppc/eeh: move stats to PE
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
The patch removes the eeh related statistics for eeh device since
they have been maintained by the corresponding eeh PE. Also, the
flags used to trace the state of eeh device and PE have been reworked
for a little bit.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 9 +--------
arch/powerpc/platforms/pseries/eeh.c | 13 +++----------
arch/powerpc/platforms/pseries/eeh_cache.c | 3 +--
arch/powerpc/platforms/pseries/eeh_driver.c | 6 +++---
arch/powerpc/platforms/pseries/eeh_sysfs.c | 9 ---------
5 files changed, 8 insertions(+), 32 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index e07ece1..b7ac3f7 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -77,20 +77,13 @@ struct eeh_pe {
* another tree except the currently existing tree of PCI
* buses and PCI devices
*/
-#define EEH_MODE_SUPPORTED (1<<0) /* EEH supported on the device */
-#define EEH_MODE_NOCHECK (1<<1) /* EEH check should be skipped */
-#define EEH_MODE_ISOLATED (1<<2) /* The device has been isolated */
-#define EEH_MODE_RECOVERING (1<<3) /* Recovering the device */
-#define EEH_MODE_IRQ_DISABLED (1<<4) /* Interrupt disabled */
+#define EEH_DEV_IRQ_DISABLED (1<<0) /* Interrupt disabled */
struct eeh_dev {
int mode; /* EEH mode */
int class_code; /* Class code of the device */
int config_addr; /* Config address */
int pe_config_addr; /* PE config address */
- int check_count; /* Times of ignored error */
- int freeze_count; /* Times of froze up */
- int false_positives; /* Times of reported #ff's */
u32 config_space[16]; /* Saved PCI config space */
struct eeh_pe *pe; /* Associated PE */
struct list_head list; /* Form link list in the PE */
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index d855c20..1438c4e 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -537,7 +537,7 @@ static void eeh_reset_pe_once(struct eeh_pe *pe)
* pci slot reset line is dropped. Make sure we don't miss
* these, and clear the flag now.
*/
- eeh_pe_state_clear(pe, EEH_MODE_ISOLATED);
+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
@@ -625,9 +625,6 @@ static void *eeh_early_enable(struct device_node *dn, void *data)
edev->class_code = 0;
edev->mode = 0;
- edev->check_count = 0;
- edev->freeze_count = 0;
- edev->false_positives = 0;
if (!of_device_is_available(dn))
return NULL;
@@ -637,10 +634,8 @@ static void *eeh_early_enable(struct device_node *dn, void *data)
return NULL;
/* There is nothing to check on PCI to ISA bridges */
- if (dn->type && !strcmp(dn->type, "isa")) {
- edev->mode |= EEH_MODE_NOCHECK;
+ if (dn->type && !strcmp(dn->type, "isa"))
return NULL;
- }
edev->class_code = *class_code;
/* Ok... see if this device supports EEH. Some do, some don't,
@@ -679,7 +674,6 @@ static void *eeh_early_enable(struct device_node *dn, void *data)
if (enable) {
eeh_subsystem_enabled = 1;
- edev->mode |= EEH_MODE_SUPPORTED;
eeh_pe_create(edev);
@@ -692,9 +686,8 @@ static void *eeh_early_enable(struct device_node *dn, void *data)
* EEH parent, in which case we mark it as supported.
*/
if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
- (of_node_to_eeh_dev(dn->parent)->mode & EEH_MODE_SUPPORTED)) {
+ of_node_to_eeh_dev(dn->parent)->pe) {
/* Parent supports EEH. */
- edev->mode |= EEH_MODE_SUPPORTED;
edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
diff --git a/arch/powerpc/platforms/pseries/eeh_cache.c b/arch/powerpc/platforms/pseries/eeh_cache.c
index f50b717..a191057 100644
--- a/arch/powerpc/platforms/pseries/eeh_cache.c
+++ b/arch/powerpc/platforms/pseries/eeh_cache.c
@@ -192,8 +192,7 @@ static void __pci_addr_cache_insert_device(struct pci_dev *dev)
}
/* Skip any devices for which EEH is not enabled. */
- if (!(edev->mode & EEH_MODE_SUPPORTED) ||
- edev->mode & EEH_MODE_NOCHECK) {
+ if (!edev->pe) {
#ifdef DEBUG
pr_info("PCI: skip building address cache for=%s - %s\n",
pci_name(dev), dn->full_name);
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index 343c807..8370ce7 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -93,7 +93,7 @@ static void eeh_disable_irq(struct pci_dev *dev)
if (!irq_has_action(dev->irq))
return;
- edev->mode |= EEH_MODE_IRQ_DISABLED;
+ edev->mode |= EEH_DEV_IRQ_DISABLED;
disable_irq_nosync(dev->irq);
}
@@ -108,8 +108,8 @@ static void eeh_enable_irq(struct pci_dev *dev)
{
struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
- if ((edev->mode) & EEH_MODE_IRQ_DISABLED) {
- edev->mode &= ~EEH_MODE_IRQ_DISABLED;
+ if ((edev->mode) & EEH_DEV_IRQ_DISABLED) {
+ edev->mode &= ~EEH_DEV_IRQ_DISABLED;
enable_irq(dev->irq);
}
}
diff --git a/arch/powerpc/platforms/pseries/eeh_sysfs.c b/arch/powerpc/platforms/pseries/eeh_sysfs.c
index 243b351..d377083 100644
--- a/arch/powerpc/platforms/pseries/eeh_sysfs.c
+++ b/arch/powerpc/platforms/pseries/eeh_sysfs.c
@@ -53,9 +53,6 @@ static DEVICE_ATTR(_name, S_IRUGO, eeh_show_##_name, NULL);
EEH_SHOW_ATTR(eeh_mode, mode, "0x%x");
EEH_SHOW_ATTR(eeh_config_addr, config_addr, "0x%x");
EEH_SHOW_ATTR(eeh_pe_config_addr, pe_config_addr, "0x%x");
-EEH_SHOW_ATTR(eeh_check_count, check_count, "%d" );
-EEH_SHOW_ATTR(eeh_freeze_count, freeze_count, "%d" );
-EEH_SHOW_ATTR(eeh_false_positives, false_positives, "%d" );
void eeh_sysfs_add_device(struct pci_dev *pdev)
{
@@ -64,9 +61,6 @@ void eeh_sysfs_add_device(struct pci_dev *pdev)
rc += device_create_file(&pdev->dev, &dev_attr_eeh_mode);
rc += device_create_file(&pdev->dev, &dev_attr_eeh_config_addr);
rc += device_create_file(&pdev->dev, &dev_attr_eeh_pe_config_addr);
- rc += device_create_file(&pdev->dev, &dev_attr_eeh_check_count);
- rc += device_create_file(&pdev->dev, &dev_attr_eeh_false_positives);
- rc += device_create_file(&pdev->dev, &dev_attr_eeh_freeze_count);
if (rc)
printk(KERN_WARNING "EEH: Unable to create sysfs entries\n");
@@ -77,8 +71,5 @@ void eeh_sysfs_remove_device(struct pci_dev *pdev)
device_remove_file(&pdev->dev, &dev_attr_eeh_mode);
device_remove_file(&pdev->dev, &dev_attr_eeh_config_addr);
device_remove_file(&pdev->dev, &dev_attr_eeh_pe_config_addr);
- device_remove_file(&pdev->dev, &dev_attr_eeh_check_count);
- device_remove_file(&pdev->dev, &dev_attr_eeh_false_positives);
- device_remove_file(&pdev->dev, &dev_attr_eeh_freeze_count);
}
--
1.7.9.5
^ permalink raw reply related
* [PATCH 08/21] ppc/eeh: create PEs duing EEH initialization
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
The patch creates PEs and associated the newly created PEs with
it parent/silbing as well as EEH devices. It would become more
straight to trace EEH errors and recover them accordingly.
Once the EEH functionality on one PCI IOA has been enabled, we
tries to create PE against it. If there's existing PE, to which
the current PCI IOA should be attached, the existing PE will be
converted from "device" type to "bus" type accordingly.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 1 +
arch/powerpc/platforms/pseries/eeh.c | 6 +++
arch/powerpc/platforms/pseries/eeh_pe.c | 89 +++++++++++++++++++++++++++++++
3 files changed, 96 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 1cc1388..e41107d 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -166,6 +166,7 @@ static inline void eeh_unlock(void)
typedef void *(*eeh_traverse_func)(void *data, void *flag);
int __devinit eeh_phb_pe_create(struct pci_controller *phb);
+int eeh_pe_create(struct eeh_dev *edev);
void * __devinit eeh_dev_init(struct device_node *dn, void *data);
void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 0ba7e3b..99937da 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -895,6 +895,8 @@ static void *eeh_early_enable(struct device_node *dn, void *data)
eeh_subsystem_enabled = 1;
edev->mode |= EEH_MODE_SUPPORTED;
+ eeh_pe_create(edev);
+
pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
dn->full_name, edev->config_addr,
edev->pe_config_addr);
@@ -908,6 +910,10 @@ static void *eeh_early_enable(struct device_node *dn, void *data)
/* Parent supports EEH. */
edev->mode |= EEH_MODE_SUPPORTED;
edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
+ edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
+
+ eeh_pe_create(edev);
+
return NULL;
}
}
diff --git a/arch/powerpc/platforms/pseries/eeh_pe.c b/arch/powerpc/platforms/pseries/eeh_pe.c
index f019953..56aab91 100644
--- a/arch/powerpc/platforms/pseries/eeh_pe.c
+++ b/arch/powerpc/platforms/pseries/eeh_pe.c
@@ -247,3 +247,92 @@ static struct eeh_pe *eeh_pe_get_parent(struct eeh_dev *edev)
return NULL;
}
+/**
+ * eeh_pe_create - Create EEH PE according to EEH device
+ * @edev: EEH device
+ *
+ * Create EEH PE according to the specified EEH device and
+ * put the EEH PE into appropriate place in the PE hierarchy
+ * tree.
+ */
+int eeh_pe_create(struct eeh_dev *edev)
+{
+ struct eeh_pe *pe, *parent;
+
+ /*
+ * Search the PE has been existing or not according
+ * to the PE address. If that has been existing, the
+ * PE should be composed of PCI bus and its subordinate
+ * components.
+ */
+ pe = eeh_pe_get(edev);
+ if (pe) {
+ if (!edev->pe_config_addr) {
+ pr_err("%s: PE with addr 0x%x already exists\n",
+ __func__, edev->config_addr);
+ return -EEXIST;
+ }
+
+ /* Mark the PE as type of PCI bus */
+ pe->type = EEH_PE_BUS;
+ edev->pe = pe;
+
+ /* Put the edev to PE */
+ list_add_tail(&edev->list, &pe->edevs);
+
+ pr_info("EEH: Add %s to Bus PE#%x\n",
+ edev->dn->full_name, pe->addr);
+
+ return 0;
+ }
+
+ /* Create a new EEH PE */
+ pe = kzalloc(sizeof(struct eeh_pe), GFP_KERNEL);
+ if (!pe) {
+ pr_err("%s: out of memory!\n", __func__);
+ return -ENOMEM;
+ }
+ pe->addr = edev->pe_config_addr;
+ pe->config_addr = edev->config_addr;
+ pe->type = EEH_PE_DEVICE;
+ pe->phb = edev->phb;
+ INIT_LIST_HEAD(&pe->child_list);
+ INIT_LIST_HEAD(&pe->child);
+ INIT_LIST_HEAD(&pe->edevs);
+
+ /*
+ * Put the new EEH PE into hierarchy tree. If the parent
+ * can't be found, the newly created PE will be attached
+ * to PHB directly. Otherwise, we have to associate the
+ * PE with its parent.
+ */
+ parent = eeh_pe_get_parent(edev);
+ if (!parent) {
+ parent = eeh_phb_pe_get(edev->phb);
+ if (!parent) {
+ pr_err("%s: No PHB PE is found (PHB Domain=%d)\n",
+ __func__, edev->phb->global_number);
+ edev->pe = NULL;
+ kfree(pe);
+ return -EEXIST;
+ }
+
+ pe->parent = parent;
+ } else {
+ pe->parent = parent;
+ }
+
+ /*
+ * Put the newly created PE into the child list and
+ * link the EEH device accordingly.
+ */
+ list_add_tail(&pe->child, &parent->child_list);
+ list_add_tail(&edev->list, &pe->edevs);
+ edev->pe = pe;
+
+ pr_info("EEH: Add %s to Device PE#%x, Parent PE#%x\n",
+ edev->dn->full_name, pe->addr, pe->parent->addr);
+
+ return 0;
+}
+
--
1.7.9.5
^ permalink raw reply related
* [PATCH 04/21] ppc/eeh: Introduce eeh_pe struct
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
As defined in PAPR 2.4, Partitionable Endpoint (PE) is an I/O subtree
that can be treated as a unit for the purposes of partitioning and error
recovery. Therefore, eeh core should be aware of PE. With eeh_pe struct,
we can support PE explicitly. Further more, it makes all the staff as
data centralized. Another important reason is for eeh core to support
multiple platforms. Some of them like pSeries figures out PEs through
OF nodes while others like powernv have to do that through PCI bus/device
tree. With explicit PE support, eeh core will be implemented based on
the centrialized data and platform dependent implementations figure it
out by their feasible ways.
When the struct is designed, following factors are taken in account:
* Reflecting the relationships of PEs. PE might have parent
as well children.
* Reflecting the association of PE and (eeh) devices.
* PEs have PHB boundary.
* PE should have unique address assigned in the corresponding
PHB domain.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 06dedff..f77b6d7 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -32,6 +32,42 @@ struct device_node;
#ifdef CONFIG_EEH
/*
+ * The struct is used to trace PE related EEH functionality.
+ * In theory, there will have one instance of the struct to
+ * be created against particular PE. In nature, PEs corelate
+ * to each other. the struct has to reflect that hierarchy in
+ * order to easily pick up those affected PEs when one particular
+ * PE has EEH errors.
+ *
+ * Also, one particular PE might be composed of PCI device, PCI
+ * bus and its subordinate components. The struct also need ship
+ * the information. Further more, one particular PE is only meaingful
+ * in the corresponding PHB. Therefore, the root PEs should be created
+ * against existing PHBs in on-to-one fashion.
+ */
+#define EEH_PE_PHB 1 /* PHB PE */
+#define EEH_PE_DEVICE 2 /* Device PE */
+#define EEH_PE_BUS 3 /* Bus PE */
+
+#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
+#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
+
+struct eeh_pe {
+ int type; /* PE type: PHB/Bus/Device */
+ int state; /* PE EEH dependent mode */
+ int config_addr; /* Traditional PCI address */
+ int addr; /* PE configuration address */
+ struct pci_controller *phb; /* Associated PHB */
+ int check_count; /* Times of ignored error */
+ int freeze_count; /* Times of froze up */
+ int false_positives; /* Times of reported #ff's */
+ struct eeh_pe *parent; /* Parent PE */
+ struct list_head child_list; /* Link PE to the child list */
+ struct list_head edevs; /* Link list of EEH devices */
+ struct list_head child; /* Child PEs */
+};
+
+/*
* The struct is used to trace EEH state for the associated
* PCI device node or PCI device. In future, it might
* represent PE as well so that the EEH device to form
@@ -53,6 +89,8 @@ struct eeh_dev {
int freeze_count; /* Times of froze up */
int false_positives; /* Times of reported #ff's */
u32 config_space[16]; /* Saved PCI config space */
+ struct eeh_pe *pe; /* Associated PE */
+ struct list_head list; /* Form link list in the PE */
struct pci_controller *phb; /* Associated PHB */
struct device_node *dn; /* Associated device node */
struct pci_dev *pdev; /* Associated PCI device */
--
1.7.9.5
^ permalink raw reply related
* Re: [PATCH V2 00/16] powerpc/eeh: PE support
From: Gavin Shan @ 2012-06-27 16:05 UTC (permalink / raw)
To: Gavin Shan; +Cc: linuxppc-dev
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
I'm sorry that the subject should be:
[PATCH V2 00/21] powerpc/eeh: PE support
I forgot got change that when pulling it from V1 :-)
Thanks,
Gavin
>The series of patches address explicit PE support as well as probe type
>support. For explicit PE support, struct eeh_pe has been introduced.
>While designing the struct, following factors have been taken into
>account.
>
> * For one particular PE, it might be composed of single PCI device,
> or multiple PCI devices and its educed children PCI devices (e.g.
> by PCIe bridges). The PE struct has included a linked list to refer
> the included PCI devices. Also, the linked list of devices has relected
> top-to-bottom fasion of the PCI subtree. That's to say, the first device
> in the linked list should be the toppest element in the PCI subtree which
> is being managed by the PE.
> * PEs correlate to each other. So the existing PEs have to form hierarchy
> levels. There're some fields in PE struct (e.g. parent/child/silbing)
> have been introduced for the purpose.
> * For one PE, it's only meaningful in the PHB domain.
>
>In addition, the mechniasm used to do memory bars restore, error report have
>been reworked based on PE. The eeh cache has been reworked for a little bit
>based on Ben's suggestion to trace eeh device.
>
>In order for explicit probe support, either OF node or pci device, global
>variable and some inline functions are introduced. For pSeries platform, it's
>going to support OF node probe and figure out PEs from the corresponding OF
>nodes. In contrast, powernv platform has to use pci device probe type since
>the PEs are being constructed at PHB fixup time.
>
>The series of patches have been verified on Firebird-L machine using "errinjct"
>utility. Here's the command used for that.
>
>errinjct eeh -v -f 0 -p U78AE.001.WZS00M9-P1-C18-L1-T2 -a 0x0 -m 0x0
>
>V1 -> V2
> * Rebase to 3.5.RC4.
> * Use the link list to trace the relationships of PEs, PE and eeh
> devices according to Ram's suggestion.
> * Simplify the PE tranverse function according to Ram's example.
> * Move EEH initialization around according to Ben's suggestion so
> that we can do memory allocation through slab.
> * Use kzmalloc() to allocate memory chunks for PE and eeh devices.
> * More booting messages for EEH initialization functions.
> * Introduce global EEH mutex to protect the PEs and eeh devices.
> * Added functions to support PE removal.
> * Comments cleanup
> * Change on the comparison of PE or BDF (Bus/Device/Function)
> address so that code looks more readable.
>
>arch/powerpc/include/asm/eeh.h | 132 ++++--
>arch/powerpc/include/asm/eeh_event.h | 6 +-
>arch/powerpc/include/asm/pci-bridge.h | 2 +
>arch/powerpc/include/asm/ppc-pci.h | 15 +-
>arch/powerpc/kernel/rtas_pci.c | 5 +-
>arch/powerpc/platforms/pseries/Makefile | 5 +-
>arch/powerpc/platforms/pseries/eeh.c | 527 +++++------------------
>arch/powerpc/platforms/pseries/eeh_cache.c | 19 +-
>arch/powerpc/platforms/pseries/eeh_dev.c | 14 +-
>arch/powerpc/platforms/pseries/eeh_driver.c | 235 +++++------
>arch/powerpc/platforms/pseries/eeh_event.c | 53 +--
>arch/powerpc/platforms/pseries/eeh_pe.c | 583 ++++++++++++++++++++++++++
>arch/powerpc/platforms/pseries/eeh_pseries.c | 246 +++++++----
>arch/powerpc/platforms/pseries/eeh_sysfs.c | 9 -
>arch/powerpc/platforms/pseries/msi.c | 6 +-
>arch/powerpc/platforms/pseries/setup.c | 2 -
>16 files changed, 1119 insertions(+), 740 deletions(-)
>create mode 100644 arch/powerpc/platforms/pseries/eeh_pe.c
>
>Thanks,
>Gavin
>
^ permalink raw reply
* [PATCH 01/21] ppc/eeh: move EEH initialization around
From: Gavin Shan @ 2012-06-27 16:01 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Gavin Shan
In-Reply-To: <1340812911-6793-1-git-send-email-shangw@linux.vnet.ibm.com>
Currently, we have 3 phases for EEH initialization on pSeries platform
using builtin functions: platform initialization, EEH device creation,
and EEH subsystem enablement. All of them are done no later than
ppc_md.setup_arch. That means that the slab/slub isn't ready yet, so
we have to allocate memory chunks on basis of PAGE_SIZE for those
dynamically created EEH devices. That's pretty expensive.
In order to utilize slab/slub for memory allocation, we have to move
the EEH initialization functions around, but all of them should be
called after slab/slub is ready.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 16 ----------------
arch/powerpc/kernel/rtas_pci.c | 3 ---
arch/powerpc/platforms/pseries/eeh.c | 10 +++++++---
arch/powerpc/platforms/pseries/eeh_dev.c | 6 +++++-
arch/powerpc/platforms/pseries/eeh_pseries.c | 4 +++-
arch/powerpc/platforms/pseries/setup.c | 2 --
6 files changed, 15 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index d60f998..06dedff 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -117,11 +117,6 @@ extern int eeh_subsystem_enabled;
void * __devinit eeh_dev_init(struct device_node *dn, void *data);
void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb);
-void __init eeh_dev_phb_init(void);
-void __init eeh_init(void);
-#ifdef CONFIG_PPC_PSERIES
-int __init eeh_pseries_init(void);
-#endif
int __init eeh_ops_register(struct eeh_ops *ops);
int __exit eeh_ops_unregister(const char *name);
unsigned long eeh_check_failure(const volatile void __iomem *token,
@@ -156,17 +151,6 @@ static inline void *eeh_dev_init(struct device_node *dn, void *data)
static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { }
-static inline void eeh_dev_phb_init(void) { }
-
-static inline void eeh_init(void) { }
-
-#ifdef CONFIG_PPC_PSERIES
-static inline int eeh_pseries_init(void)
-{
- return 0;
-}
-#endif /* CONFIG_PPC_PSERIES */
-
static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
{
return val;
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 179af90..140735c 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -275,9 +275,6 @@ void __init find_and_init_phbs(void)
of_node_put(root);
pci_devs_phb_init();
- /* Create EEH devices for all PHBs */
- eeh_dev_phb_init();
-
/*
* PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
* in chosen.
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index ecd394c..e819448 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -982,7 +982,7 @@ int __exit eeh_ops_unregister(const char *name)
* Even if force-off is set, the EEH hardware is still enabled, so that
* newer systems can boot.
*/
-void __init eeh_init(void)
+static int __init eeh_init(void)
{
struct pci_controller *hose, *tmp;
struct device_node *phb;
@@ -992,11 +992,11 @@ void __init eeh_init(void)
if (!eeh_ops) {
pr_warning("%s: Platform EEH operation not found\n",
__func__);
- return;
+ return -EEXIST;
} else if ((ret = eeh_ops->init())) {
pr_warning("%s: Failed to call platform init function (%d)\n",
__func__, ret);
- return;
+ return ret;
}
raw_spin_lock_init(&confirm_error_lock);
@@ -1011,8 +1011,12 @@ void __init eeh_init(void)
printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
else
printk(KERN_WARNING "EEH: No capable adapters found\n");
+
+ return ret;
}
+core_initcall_sync(eeh_init);
+
/**
* eeh_add_device_early - Enable EEH for the indicated device_node
* @dn: device node for which to set up EEH
diff --git a/arch/powerpc/platforms/pseries/eeh_dev.c b/arch/powerpc/platforms/pseries/eeh_dev.c
index c4507d0..ab68c59 100644
--- a/arch/powerpc/platforms/pseries/eeh_dev.c
+++ b/arch/powerpc/platforms/pseries/eeh_dev.c
@@ -93,10 +93,14 @@ void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb)
* Scan all the existing PHBs and create EEH devices for their OF
* nodes and their children OF nodes
*/
-void __init eeh_dev_phb_init(void)
+static int __init eeh_dev_phb_init(void)
{
struct pci_controller *phb, *tmp;
list_for_each_entry_safe(phb, tmp, &hose_list, list_node)
eeh_dev_phb_init_dynamic(phb);
+
+ return 0;
}
+
+core_initcall(eeh_dev_phb_init);
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 8752f79..bcf0bb8 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -559,7 +559,9 @@ static struct eeh_ops pseries_eeh_ops = {
* EEH initialization on pseries platform. This function should be
* called before any EEH related functions.
*/
-int __init eeh_pseries_init(void)
+static int __init eeh_pseries_init(void)
{
return eeh_ops_register(&pseries_eeh_ops);
}
+
+early_initcall(eeh_pseries_init);
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 51ecac9..5406473 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -388,10 +388,8 @@ static void __init pSeries_setup_arch(void)
/* Find and initialize PCI host bridges */
init_pci_config_tokens();
- eeh_pseries_init();
find_and_init_phbs();
pSeries_reconfig_notifier_register(&pci_dn_reconfig_nb);
- eeh_init();
pSeries_nvram_init();
--
1.7.9.5
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