* Re: [PATCH 2/2] powerpc/fsl: Update corenet64_smp_defconfig
From: Kumar Gala @ 2012-07-10 11:44 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: Harninder Rai, Laurentiu Tudor, linuxppc-dev, Minghuan Lian
In-Reply-To: <1341916802-19619-2-git-send-email-Shengzhou.Liu@freescale.com>
On Jul 10, 2012, at 5:40 AM, Shengzhou Liu wrote:
> * Enable USB, MMC, SATA, MTD, NAND, PAMU, RTC
> * Enable FSL RAID on P5020
> * Enable general RAID features (MD + async-tx)
> * Enable RTC on P2041RDB
> * Enable UIO SRIO & UIO DMA
> * Enable USDPAA SHMEM driver
> * Enable ePAPR HV support
> * Enable PCI-E support
>=20
> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
> Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> arch/powerpc/configs/corenet64_smp_defconfig | 94 =
++++++++++++++++++++++++--
> 1 files changed, 89 insertions(+), 5 deletions(-)
Is this patch really against upstream? We dont have PAMU, UIO =
SRIO/DMA,etc upstream.
- k=
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/fsl: Update corenet32_smp_defconfig
From: Kumar Gala @ 2012-07-10 11:43 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: Harninder Rai, linuxppc-dev, Shaohui Xie, Minghuan Lian
In-Reply-To: <1341916802-19619-1-git-send-email-Shengzhou.Liu@freescale.com>
On Jul 10, 2012, at 5:40 AM, Shengzhou Liu wrote:
> * Enable NAND, MSI, PAMU,
> * Enable FSL RAID on P5020
> * Enable general RAID features (MD + async-tx)
> * Enable RTC on P2041RDB
> * Enable UIO SRIO & UIO DMA
>=20
> Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> arch/powerpc/configs/corenet32_smp_defconfig | 22 =
+++++++++++++++++++++-
> 1 files changed, 21 insertions(+), 1 deletions(-)
Is this patch really against upstream? We dont have PAMU, UIO SRIO/DMA =
upstream.
- k=
^ permalink raw reply
* Re: [PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with CONFIG_PPC_FSL_BOOK3E
From: Kumar Gala @ 2012-07-10 11:41 UTC (permalink / raw)
To: Xie Shaohui-B21989
Cc: linuxppc-dev@lists.ozlabs.org, linux-watchdog@vger.kernel.org
In-Reply-To: <AFA5C641-783C-4B61-ACCF-6A776BF75B24@kernel.crashing.org>
On Jul 10, 2012, at 6:40 AM, Kumar Gala wrote:
>
> On Jul 10, 2012, at 5:22 AM, Xie Shaohui-B21989 wrote:
>
>> Hi, All,
>>
>> Is there any concern for this patch, it's been a long time.
>> Thanks!
>>
>>
>> Best Regards,
>> Shaohui Xie
>
> As commented, we should use PPC_FSL_BOOK3E, not CONFIG_PPC_FSL_BOOK3E.
>
> - k
Sorry, was looking at the older version of this patch.
- k
^ permalink raw reply
* Re: [PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with CONFIG_PPC_FSL_BOOK3E
From: Kumar Gala @ 2012-07-10 11:40 UTC (permalink / raw)
To: Xie Shaohui-B21989
Cc: linuxppc-dev@lists.ozlabs.org, linux-watchdog@vger.kernel.org
In-Reply-To: <ED492CCEAF882048BC2237DE806547C9079802C6@039-SN2MPN1-013.039d.mgd.msft.net>
On Jul 10, 2012, at 5:22 AM, Xie Shaohui-B21989 wrote:
> Hi, All,
>
> Is there any concern for this patch, it's been a long time.
> Thanks!
>
>
> Best Regards,
> Shaohui Xie
As commented, we should use PPC_FSL_BOOK3E, not CONFIG_PPC_FSL_BOOK3E.
- k
>
>
>> -----Original Message-----
>> From: Xie Shaohui-B21989
>> Sent: Friday, May 11, 2012 1:34 PM
>> To: linux-watchdog@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
>> Cc: Xie Shaohui-B21989
>> Subject: [PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with
>> CONFIG_PPC_FSL_BOOK3E
>>
>> CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_PPC_FSL_BOOK3E is
>> defined in both 32-bit and 64-bit, so use CONFIG_PPC_FSL_BOOK3E to make
>> driver work in 32-bit & 64-bit.
>>
>> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
>> ---
>> changes for v2:
>> use PPC_FSL_BOOK3E instead of FSL_SOC_BOOKE.
>>
>> drivers/watchdog/Kconfig | 8 ++++----
>> drivers/watchdog/booke_wdt.c | 4 ++--
>> 2 files changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index
>> 3709624..4373ca0 100644
>> --- a/drivers/watchdog/Kconfig
>> +++ b/drivers/watchdog/Kconfig
>> @@ -1094,10 +1094,10 @@ config BOOKE_WDT config BOOKE_WDT_DEFAULT_TIMEOUT
>> int "PowerPC Book-E Watchdog Timer Default Timeout"
>> depends on BOOKE_WDT
>> - default 38 if FSL_BOOKE
>> - range 0 63 if FSL_BOOKE
>> - default 3 if !FSL_BOOKE
>> - range 0 3 if !FSL_BOOKE
>> + default 38 if PPC_FSL_BOOK3E
>> + range 0 63 if PPC_FSL_BOOK3E
>> + default 3 if !PPC_FSL_BOOK3E
>> + range 0 3 if !PPC_FSL_BOOK3E
>> help
>> Select the default watchdog timer period to be used by the PowerPC
>> Book-E watchdog driver. A watchdog "event" occurs when the bit
>> diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
>> index ce0ab44..338a437 100644
>> --- a/drivers/watchdog/booke_wdt.c
>> +++ b/drivers/watchdog/booke_wdt.c
>> @@ -37,7 +37,7 @@
>> u32 booke_wdt_enabled;
>> u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
>>
>> -#ifdef CONFIG_FSL_BOOKE
>> +#ifdef CONFIG_PPC_FSL_BOOK3E
>> #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
>> #define WDTP_MASK (WDTP(0x3f))
>> #else
>> @@ -190,7 +190,7 @@ static long booke_wdt_ioctl(struct file *file,
>> case WDIOC_SETTIMEOUT:
>> if (get_user(tmp, p))
>> return -EFAULT;
>> -#ifdef CONFIG_FSL_BOOKE
>> +#ifdef CONFIG_PPC_FSL_BOOK3E
>> /* period of 1 gives the largest possible timeout */
>> if (tmp > period_to_sec(1))
>> return -EINVAL;
>> --
>> 1.6.4
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/watchdog: move booke watchdog param related code to prom.c
From: Kumar Gala @ 2012-07-10 11:39 UTC (permalink / raw)
To: Bhushan Bharat-R65777
Cc: linuxppc-dev@lists.ozlabs.org, linux-watchdog@vger.kernel.org,
Xie Shaohui-B21989
In-Reply-To: <6A3DF150A5B70D4F9B66A25E3F7C888D03CF8714@039-SN2MPN1-023.039d.mgd.msft.net>
On May 8, 2012, at 10:46 PM, Bhushan Bharat-R65777 wrote:
>>>>>> .org] On Behalf Of Shaohui Xie
>>>>>> Sent: Tuesday, May 08, 2012 11:37 AM
>>>>>> To: linux-watchdog@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
>>>>>> Cc: Xie Shaohui-B21989
>>>>>> Subject: [PATCH 1/2] powerpc/watchdog: move booke watchdog param
>>>>>> related code to prom.c
>>>>>>=20
>>>>>> Currently, BOOKE watchdog code for checking "wdt" and =
"wdt_period"
>>>>>> is in setup_32.c, it cannot be used in 64-bit, so move it to a
>>>>>> common place prom.c, which will be shared by 32-bit and 64-bit.
>>>>>>=20
>>>>>> Also, replace the simple_strtoul with kstrtol.
>>>>>>=20
>>>>>> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
>>>>>> ---
>>>>>> arch/powerpc/kernel/prom.c | 27 +++++++++++++++++++++++++++
>>>>>> arch/powerpc/kernel/setup_32.c | 24 ------------------------
>>>>>> 2 files changed, 27 insertions(+), 24 deletions(-)
>>>>>=20
>>>>> Is not setup-common.c is better place to move this?
>>>>=20
>>>> Move out from setup_32.c does not mean it have to go into
>>>> setup-common.c, I need better reason to do this.
>>>>=20
>>>=20
>>> What I think that setup_32.c is for 32 bit, setup_64.c is for 64 bit
>>> and setup-common.c is for both.
>>>=20
>>> I am not saying that you move this to setup-common.c. I am asking =
why
>>> you have not used setup-common.c ? I am ok even with prom.c.
>>>=20
>> [Xie Shaohui] I'm not a fan of prom.c, I did this because I see same =
kind of
>> early parameters checking is did in this file only, so I thought =
maybe I should
>> put them together. And seems setup-common.c is not the place to do =
command line
>> checking (I'm not sure about this).
>>=20
>=20
> Ok, so you are also not sure.
> Let us see what other guys things of this.
Put it in setup-common.c. prom.c has normally been mostly OF/dts =
related parsing.
- k=
^ permalink raw reply
* [PATCH 2/2] powerpc/fsl: Update corenet64_smp_defconfig
From: Shengzhou Liu @ 2012-07-10 10:40 UTC (permalink / raw)
To: galak
Cc: Harninder Rai, Shengzhou Liu, Minghuan Lian, Laurentiu Tudor,
linuxppc-dev
In-Reply-To: <1341916802-19619-1-git-send-email-Shengzhou.Liu@freescale.com>
* Enable USB, MMC, SATA, MTD, NAND, PAMU, RTC
* Enable FSL RAID on P5020
* Enable general RAID features (MD + async-tx)
* Enable RTC on P2041RDB
* Enable UIO SRIO & UIO DMA
* Enable USDPAA SHMEM driver
* Enable ePAPR HV support
* Enable PCI-E support
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
arch/powerpc/configs/corenet64_smp_defconfig | 94 ++++++++++++++++++++=
++++--
1 files changed, 89 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/=
configs/corenet64_smp_defconfig
index 6798343..14bbae7 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -5,14 +5,21 @@ CONFIG_SMP=3Dy
CONFIG_NR_CPUS=3D2
CONFIG_EXPERIMENTAL=3Dy
CONFIG_SYSVIPC=3Dy
+CONFIG_POSIX_MQUEUE=3Dy
CONFIG_BSD_PROCESS_ACCT=3Dy
+CONFIG_AUDIT=3Dy
CONFIG_SPARSE_IRQ=3Dy
+CONFIG_RCU_TRACE=3Dy
+CONFIG_RCU_FANOUT=3D32
CONFIG_IKCONFIG=3Dy
CONFIG_IKCONFIG_PROC=3Dy
CONFIG_LOG_BUF_SHIFT=3D14
CONFIG_BLK_DEV_INITRD=3Dy
CONFIG_EXPERT=3Dy
CONFIG_KALLSYMS_ALL=3Dy
+CONFIG_EMBEDDED=3Dy
+CONFIG_PERF_EVENTS=3Dy
+CONFIG_SLAB=3Dy
CONFIG_MODULES=3Dy
CONFIG_MODULE_UNLOAD=3Dy
CONFIG_MODULE_FORCE_UNLOAD=3Dy
@@ -25,11 +32,18 @@ CONFIG_HIGH_RES_TIMERS=3Dy
CONFIG_BINFMT_MISC=3Dm
CONFIG_RAPIDIO=3Dy
CONFIG_FSL_RIO=3Dy
+CONFIG_FSL_LBC=3Dy
+CONFIG_FSL_PAMU=3Dy
+CONFIG_PCIEPORTBUS=3Dy
+CONFIG_PCI_MSI=3Dy
CONFIG_NET=3Dy
CONFIG_PACKET=3Dy
CONFIG_UNIX=3Dy
CONFIG_XFRM_USER=3Dy
+CONFIG_XFRM_SUB_POLICY=3Dy
+CONFIG_XFRM_STATISTICS=3Dy
CONFIG_NET_KEY=3Dy
+CONFIG_NET_KEY_MIGRATE=3Dy
CONFIG_INET=3Dy
CONFIG_IP_MULTICAST=3Dy
CONFIG_IP_ADVANCED_ROUTER=3Dy
@@ -45,60 +59,130 @@ CONFIG_IP_MROUTE=3Dy
CONFIG_IP_PIMSM_V1=3Dy
CONFIG_IP_PIMSM_V2=3Dy
CONFIG_ARPD=3Dy
+CONFIG_INET_AH=3Dy
CONFIG_INET_ESP=3Dy
+CONFIG_INET_IPCOMP=3Dy
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_IPV6=3Dy
CONFIG_IP_SCTP=3Dm
CONFIG_UEVENT_HELPER_PATH=3D"/sbin/hotplug"
+CONFIG_MTD=3Dy
+CONFIG_MTD_CMDLINE_PARTS=3Dy
+CONFIG_MTD_CHAR=3Dy
+CONFIG_MTD_BLOCK=3Dy
+CONFIG_MTD_CFI=3Dy
+CONFIG_MTD_CFI_AMDSTD=3Dy
+CONFIG_MTD_PHYSMAP_OF=3Dy
+CONFIG_MTD_M25P80=3Dy
CONFIG_PROC_DEVICETREE=3Dy
CONFIG_BLK_DEV_LOOP=3Dy
CONFIG_BLK_DEV_RAM=3Dy
-CONFIG_BLK_DEV_RAM_SIZE=3D131072
+CONFIG_BLK_DEV_RAM_SIZE=3D262144
CONFIG_MISC_DEVICES=3Dy
CONFIG_EEPROM_LEGACY=3Dy
-CONFIG_NETDEVICES=3Dy
+CONFIG_BLK_DEV_SD=3Dy
+CONFIG_CHR_DEV_ST=3Dy
+CONFIG_BLK_DEV_SR=3Dy
+CONFIG_CHR_DEV_SG=3Dy
+CONFIG_SCSI_MULTI_LUN=3Dy
+CONFIG_SCSI_LOGGING=3Dy
+CONFIG_SCSI_SPI_ATTRS=3Dy
+CONFIG_ATA=3Dy
+CONFIG_SATA_FSL=3Dy
+CONFIG_SATA_SIL24=3Dy
+CONFIG_MD=3Dy
+CONFIG_BLK_DEV_MD=3Dy
+CONFIG_MD_RAID456=3Dy
+CONFIG_MULTICORE_RAID456=3Dy
CONFIG_DUMMY=3Dy
CONFIG_INPUT_FF_MEMLESS=3Dm
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIO_LIBPS2=3Dy
+CONFIG_PPC_EPAPR_HV_BYTECHAN=3Dy
CONFIG_SERIAL_8250=3Dy
CONFIG_SERIAL_8250_CONSOLE=3Dy
CONFIG_SERIAL_8250_EXTENDED=3Dy
CONFIG_SERIAL_8250_MANY_PORTS=3Dy
CONFIG_SERIAL_8250_DETECT_IRQ=3Dy
CONFIG_SERIAL_8250_RSA=3Dy
+CONFIG_HW_RANDOM=3Dy
CONFIG_I2C=3Dy
CONFIG_I2C_CHARDEV=3Dy
CONFIG_I2C_MPC=3Dy
+CONFIG_SPI=3Dy
+CONFIG_SPI_GPIO=3Dy
+CONFIG_SPI_FSL_SPI=3Dy
+CONFIG_SPI_FSL_ESPI=3Dy
# CONFIG_HWMON is not set
CONFIG_VIDEO_OUTPUT_CONTROL=3Dy
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_HID=3Dm
+CONFIG_USB=3Dy
+CONFIG_USB_DEVICEFS=3Dy
+CONFIG_USB_MON=3Dy
+CONFIG_USB_EHCI_HCD=3Dy
+CONFIG_USB_EHCI_FSL=3Dy
+CONFIG_USB_STORAGE=3Dy
+CONFIG_MMC=3Dy
+CONFIG_MMC_SDHCI=3Dy
+CONFIG_MMC_SDHCI_OF=3Dy
+CONFIG_MMC_SDHCI_OF_ESDHC=3Dy
+CONFIG_EDAC=3Dy
+CONFIG_EDAC_MM_EDAC=3Dy
+CONFIG_RTC_CLASS=3Dy
+CONFIG_RTC_DRV_DS3232=3Dy
+CONFIG_RTC_DRV_CMOS=3Dy
CONFIG_DMADEVICES=3Dy
CONFIG_FSL_DMA=3Dy
+CONFIG_FSL_RAID=3Dy
+CONFIG_ASYNC_TX_DMA=3Dy
+CONFIG_UIO=3Dy
+CONFIG_UIO_FSL_SRIO=3Dy
+CONFIG_UIO_FSL_DMA=3Dy
+CONFIG_STAGING=3Dy
+CONFIG_VIRT_DRIVERS=3Dy
+CONFIG_FSL_HV_MANAGER=3Dy
CONFIG_EXT2_FS=3Dy
CONFIG_EXT3_FS=3Dy
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_ISO9660_FS=3Dm
+CONFIG_JOLIET=3Dy
+CONFIG_ZISOFS=3Dy
+CONFIG_UDF_FS=3Dm
+CONFIG_MSDOS_FS=3Dm
+CONFIG_VFAT_FS=3Dy
+CONFIG_NTFS_FS=3Dy
CONFIG_PROC_KCORE=3Dy
CONFIG_TMPFS=3Dy
CONFIG_HUGETLBFS=3Dy
+CONFIG_JFFS2_FS=3Dy
+CONFIG_CRAMFS=3Dy
+CONFIG_NFS_FS=3Dy
+CONFIG_NFS_V3=3Dy
+CONFIG_NFS_V4=3Dy
+CONFIG_ROOT_NFS=3Dy
+CONFIG_NFSD=3Dm
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_PARTITION_ADVANCED=3Dy
CONFIG_MAC_PARTITION=3Dy
CONFIG_NLS=3Dy
+CONFIG_NLS_ISO8859_1=3Dy
CONFIG_NLS_UTF8=3Dm
CONFIG_CRC_T10DIF=3Dy
CONFIG_CRC_ITU_T=3Dm
CONFIG_FRAME_WARN=3D1024
+CONFIG_MAGIC_SYSRQ=3Dy
+CONFIG_DEBUG_KERNEL=3Dy
+CONFIG_DEBUG_SHIRQ=3Dy
CONFIG_DEBUG_FS=3Dy
CONFIG_DETECT_HUNG_TASK=3Dy
CONFIG_DEBUG_INFO=3Dy
CONFIG_SYSCTL_SYSCALL_CHECK=3Dy
+CONFIG_CRYPTO_NULL=3Dy
CONFIG_IRQ_DOMAIN_DEBUG=3Dy
CONFIG_CRYPTO_PCBC=3Dm
+CONFIG_CRYPTO_MD4=3Dy
CONFIG_CRYPTO_SHA256=3Dy
CONFIG_CRYPTO_SHA512=3Dy
CONFIG_CRYPTO_AES=3Dy
--=20
1.6.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/fsl: Update corenet32_smp_defconfig
From: Shengzhou Liu @ 2012-07-10 10:40 UTC (permalink / raw)
To: galak
Cc: Harninder Rai, linuxppc-dev, Shaohui Xie, Minghuan Lian,
Shengzhou Liu
* Enable NAND, MSI, PAMU,
* Enable FSL RAID on P5020
* Enable general RAID features (MD + async-tx)
* Enable RTC on P2041RDB
* Enable UIO SRIO & UIO DMA
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
arch/powerpc/configs/corenet32_smp_defconfig | 22 +++++++++++++++++++++-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 91db656..eafb64f 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -34,8 +34,10 @@ CONFIG_BINFMT_MISC=m
CONFIG_KEXEC=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_FSL_LBC=y
+CONFIG_FSL_PAMU=y
CONFIG_PCI=y
CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_MSI=y
# CONFIG_PCIEASPM is not set
CONFIG_RAPIDIO=y
CONFIG_FSL_RIO=y
@@ -76,11 +78,16 @@ CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_NAND_FSL_IFC=y
+CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_M25P80=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_BLK_DEV_RAM_SIZE=262144
CONFIG_MISC_DEVICES=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
@@ -95,6 +102,10 @@ CONFIG_SATA_FSL=y
CONFIG_SATA_SIL24=y
CONFIG_SATA_SIL=y
CONFIG_PATA_SIL680=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_RAID456=y
+CONFIG_MULTICORE_RAID456=y
CONFIG_NETDEVICES=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_E1000=y
@@ -136,13 +147,21 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_OF=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_MPC85XX=y
CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_CMOS=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_RAID=y
+CONFIG_ASYNC_TX_DMA=y
CONFIG_UIO=y
+CONFIG_UIO_FSL_SRIO=y
+CONFIG_UIO_FSL_DMA=y
CONFIG_STAGING=y
CONFIG_VIRT_DRIVERS=y
CONFIG_FSL_HV_MANAGER=y
@@ -171,6 +190,7 @@ CONFIG_MAC_PARTITION=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=m
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_SHIRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_INFO=y
--
1.6.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/fsl: Update corenet32_smp_defconfig
From: Shengzhou Liu @ 2012-07-10 10:38 UTC (permalink / raw)
To: galak
Cc: Harninder Rai, linuxppc-dev, Shaohui Xie, Minghuan Lian,
Shengzhou Liu
* Enable NAND, MSI, PAMU,
* Enable FSL RAID on P5020
* Enable general RAID features (MD + async-tx)
* Enable RTC on P2041RDB
* Enable UIO SRIO & UIO DMA
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
arch/powerpc/configs/corenet32_smp_defconfig | 22 +++++++++++++++++++++-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 91db656..eafb64f 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -34,8 +34,10 @@ CONFIG_BINFMT_MISC=m
CONFIG_KEXEC=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_FSL_LBC=y
+CONFIG_FSL_PAMU=y
CONFIG_PCI=y
CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_MSI=y
# CONFIG_PCIEASPM is not set
CONFIG_RAPIDIO=y
CONFIG_FSL_RIO=y
@@ -76,11 +78,16 @@ CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_NAND_FSL_IFC=y
+CONFIG_MTD_NAND_FSL_ELBC=y
CONFIG_MTD_M25P80=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_BLK_DEV_RAM_SIZE=262144
CONFIG_MISC_DEVICES=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
@@ -95,6 +102,10 @@ CONFIG_SATA_FSL=y
CONFIG_SATA_SIL24=y
CONFIG_SATA_SIL=y
CONFIG_PATA_SIL680=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_RAID456=y
+CONFIG_MULTICORE_RAID456=y
CONFIG_NETDEVICES=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_E1000=y
@@ -136,13 +147,21 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_OF=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_MPC85XX=y
CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_CMOS=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_RAID=y
+CONFIG_ASYNC_TX_DMA=y
CONFIG_UIO=y
+CONFIG_UIO_FSL_SRIO=y
+CONFIG_UIO_FSL_DMA=y
CONFIG_STAGING=y
CONFIG_VIRT_DRIVERS=y
CONFIG_FSL_HV_MANAGER=y
@@ -171,6 +190,7 @@ CONFIG_MAC_PARTITION=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=m
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_SHIRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_INFO=y
--
1.6.4
^ permalink raw reply related
* RE: [PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with CONFIG_PPC_FSL_BOOK3E
From: Xie Shaohui-B21989 @ 2012-07-10 10:22 UTC (permalink / raw)
To: Xie Shaohui-B21989, linux-watchdog@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1336714420-2394-1-git-send-email-Shaohui.Xie@freescale.com>
Hi, All,
Is there any concern for this patch, it's been a long time.
Thanks!
Best Regards,=20
Shaohui Xie=20
>-----Original Message-----
>From: Xie Shaohui-B21989
>Sent: Friday, May 11, 2012 1:34 PM
>To: linux-watchdog@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
>Cc: Xie Shaohui-B21989
>Subject: [PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with
>CONFIG_PPC_FSL_BOOK3E
>
>CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_PPC_FSL_BOOK3E is
>defined in both 32-bit and 64-bit, so use CONFIG_PPC_FSL_BOOK3E to make
>driver work in 32-bit & 64-bit.
>
>Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
>---
>changes for v2:
>use PPC_FSL_BOOK3E instead of FSL_SOC_BOOKE.
>
> drivers/watchdog/Kconfig | 8 ++++----
> drivers/watchdog/booke_wdt.c | 4 ++--
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index
>3709624..4373ca0 100644
>--- a/drivers/watchdog/Kconfig
>+++ b/drivers/watchdog/Kconfig
>@@ -1094,10 +1094,10 @@ config BOOKE_WDT config BOOKE_WDT_DEFAULT_TIMEOUT
> int "PowerPC Book-E Watchdog Timer Default Timeout"
> depends on BOOKE_WDT
>- default 38 if FSL_BOOKE
>- range 0 63 if FSL_BOOKE
>- default 3 if !FSL_BOOKE
>- range 0 3 if !FSL_BOOKE
>+ default 38 if PPC_FSL_BOOK3E
>+ range 0 63 if PPC_FSL_BOOK3E
>+ default 3 if !PPC_FSL_BOOK3E
>+ range 0 3 if !PPC_FSL_BOOK3E
> help
> Select the default watchdog timer period to be used by the PowerPC
> Book-E watchdog driver. A watchdog "event" occurs when the bit
>diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
>index ce0ab44..338a437 100644
>--- a/drivers/watchdog/booke_wdt.c
>+++ b/drivers/watchdog/booke_wdt.c
>@@ -37,7 +37,7 @@
> u32 booke_wdt_enabled;
> u32 booke_wdt_period =3D CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
>
>-#ifdef CONFIG_FSL_BOOKE
>+#ifdef CONFIG_PPC_FSL_BOOK3E
> #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
> #define WDTP_MASK (WDTP(0x3f))
> #else
>@@ -190,7 +190,7 @@ static long booke_wdt_ioctl(struct file *file,
> case WDIOC_SETTIMEOUT:
> if (get_user(tmp, p))
> return -EFAULT;
>-#ifdef CONFIG_FSL_BOOKE
>+#ifdef CONFIG_PPC_FSL_BOOK3E
> /* period of 1 gives the largest possible timeout */
> if (tmp > period_to_sec(1))
> return -EINVAL;
>--
>1.6.4
^ permalink raw reply
* RE: [PATCH 1/2] powerpc/watchdog: move booke watchdog param related code to prom.c
From: Xie Shaohui-B21989 @ 2012-07-10 10:21 UTC (permalink / raw)
To: Xie Shaohui-B21989, linux-watchdog@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1336457231-32513-1-git-send-email-Shaohui.Xie@freescale.com>
Hi, All,
Is there any concern for this patch, it's been a long time.
Thanks!
Best Regards,=20
Shaohui Xie=20
>-----Original Message-----
>From: Xie Shaohui-B21989
>Sent: Tuesday, May 08, 2012 2:07 PM
>To: linux-watchdog@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
>Cc: Xie Shaohui-B21989
>Subject: [PATCH 1/2] powerpc/watchdog: move booke watchdog param related
>code to prom.c
>
>Currently, BOOKE watchdog code for checking "wdt" and "wdt_period" is in
>setup_32.c, it cannot be used in 64-bit, so move it to a common place
>prom.c, which will be shared by 32-bit and 64-bit.
>
>Also, replace the simple_strtoul with kstrtol.
>
>Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
>---
> arch/powerpc/kernel/prom.c | 27 +++++++++++++++++++++++++++
> arch/powerpc/kernel/setup_32.c | 24 ------------------------
> 2 files changed, 27 insertions(+), 24 deletions(-)
>
>diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index
>f191bf0..49e1bdf 100644
>--- a/arch/powerpc/kernel/prom.c
>+++ b/arch/powerpc/kernel/prom.c
>@@ -84,6 +84,33 @@ static int __init early_parse_mem(char *p) }
>early_param("mem", early_parse_mem);
>
>+#ifdef CONFIG_BOOKE_WDT
>+extern u32 booke_wdt_enabled;
>+extern u32 booke_wdt_period;
>+
>+/* Checks wdt=3Dx and wdt_period=3Dxx command-line option */ notrace int
>+__init early_parse_wdt(char *p) {
>+ if (p && strncmp(p, "0", 1) !=3D 0)
>+ booke_wdt_enabled =3D 1;
>+
>+ return 0;
>+}
>+early_param("wdt", early_parse_wdt);
>+
>+int __init early_parse_wdt_period(char *p) {
>+ unsigned long ret;
>+ if (p) {
>+ if (!kstrtol(p, 0, &ret))
>+ booke_wdt_period =3D ret;
>+ }
>+
>+ return 0;
>+}
>+early_param("wdt_period", early_parse_wdt_period);
>+#endif /* CONFIG_BOOKE_WDT */
>+
> /*
> * overlaps_initrd - check for overlap with page aligned extension of
> * initrd.
>diff --git a/arch/powerpc/kernel/setup_32.c
>b/arch/powerpc/kernel/setup_32.c index ec8a53f..a8f54ec 100644
>--- a/arch/powerpc/kernel/setup_32.c
>+++ b/arch/powerpc/kernel/setup_32.c
>@@ -149,30 +149,6 @@ notrace void __init machine_init(u64 dt_ptr)
> ppc_md.progress("id mach(): done", 0x200); }
>
>-#ifdef CONFIG_BOOKE_WDT
>-extern u32 booke_wdt_enabled;
>-extern u32 booke_wdt_period;
>-
>-/* Checks wdt=3Dx and wdt_period=3Dxx command-line option */ -notrace int
>__init early_parse_wdt(char *p) -{
>- if (p && strncmp(p, "0", 1) !=3D 0)
>- booke_wdt_enabled =3D 1;
>-
>- return 0;
>-}
>-early_param("wdt", early_parse_wdt);
>-
>-int __init early_parse_wdt_period (char *p) -{
>- if (p)
>- booke_wdt_period =3D simple_strtoul(p, NULL, 0);
>-
>- return 0;
>-}
>-early_param("wdt_period", early_parse_wdt_period);
>-#endif /* CONFIG_BOOKE_WDT */
>-
> /* Checks "l2cr=3Dxxxx" command-line option */ int __init
>ppc_setup_l2cr(char *str) {
>--
>1.6.4
^ permalink raw reply
* Re: [RFC PATCH v3 0/13] memory-hotplug : hot-remove physical memory
From: Yasuaki Ishimatsu @ 2012-07-10 9:58 UTC (permalink / raw)
To: Christoph Lameter
Cc: len.brown, wency, linux-acpi, linux-kernel, linux-mm, paulus,
minchan.kim, kosaki.motohiro, rientjes, akpm, linuxppc-dev,
liuj97
In-Reply-To: <alpine.DEB.2.00.1207091015570.30060@router.home>
Hi Christoph,
2012/07/10 0:18, Christoph Lameter wrote:
>
> On Mon, 9 Jul 2012, Yasuaki Ishimatsu wrote:
>
>> Even if you apply these patches, you cannot remove the physical memory
>> completely since these patches are still under development. I want you to
>> cooperate to improve the physical memory hot-remove. So please review these
>> patches and give your comment/idea.
>
> Could you at least give a method on how you want to do physical memory
> removal?
We plan to release a dynamic hardware partitionable system. It will be
able to hot remove/add a system board which included memory and cpu.
But as you know, Linux does not support memory hot-remove on x86 box.
So I try to develop it.
Current plan to hot remove system board is to use container driver.
Thus I define the system board in ACPI DSDT table as a container device.
It have supported hot-add a container device. And if container device
has _EJ0 ACPI method, "eject" file to remove the container device is
prepared as follow:
# ls -l /sys/bus/acpi/devices/ACPI0004\:01/eject
--w-------. 1 root root 4096 Jul 10 18:19 /sys/bus/acpi/devices/ACPI0004:01/eject
When I hot-remove the container device, I echo 1 to the file as follow:
#echo 1 > /sys/bus/acpi/devices/ACPI0004\:02/eject
Then acpi_bus_trim() is called. And it calls acpi_memory_device_remove()
for removing memory device. But the code does not do nothing.
So I developed the continuation of the function.
> You would have to remove all objects from the range you want to
> physically remove. That is only possible under special circumstances and
> with a limited set of objects. Even if you exclusively use ZONE_MOVEABLE
> you still may get cases where pages are pinned for a long time.
I know it. So my memory hot-remove plan is as follows:
1. hot-added a system board
All memory which included the system board is offline.
2. online the memory as removable page
The function has not supported yet. It is being developed by Lai as follow:
http://lkml.indiana.edu/hypermail/linux/kernel/1207.0/01478.html
If it is supported, I will be able to create movable memory.
3. hot-remove the memory by container device's eject file
Thanks,
Yasuaki Ishimatsu
>
> I am not sure that these patches are useful unless we know where you are
> going with this. If we end up with a situation where we still cannot
> remove physical memory then this patchset is not helpful.
^ permalink raw reply
* RE: [PATCH 3/3 v2] powerpc/mpic: FSL MPIC error interrupt support.
From: Sethi Varun-B16395 @ 2012-07-10 9:39 UTC (permalink / raw)
To: Kumar Gala, Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org, Hamciuc Bogdan-BHAMCIU1
In-Reply-To: <22EF3A64-2185-4078-B7B9-00E00D32604A@kernel.crashing.org>
> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Tuesday, July 10, 2012 7:17 AM
> To: Wood Scott-B07421
> Cc: Sethi Varun-B16395; Hamciuc Bogdan-BHAMCIU1; linuxppc-
> dev@lists.ozlabs.org
> Subject: Re: [PATCH 3/3 v2] powerpc/mpic: FSL MPIC error interrupt
> support.
>=20
>=20
> On Jul 9, 2012, at 3:22 PM, Scott Wood wrote:
>=20
> > On 07/09/2012 02:03 PM, Kumar Gala wrote:
> >>
> >> On Jul 9, 2012, at 3:47 AM, Varun Sethi wrote:
> >>
> >>> +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) {
> >>
> >> Why can't we do this during mpic_init() time?
> >
> > Are you willing to hardcode that IRQ 16 is the error interrupt,
> > without waiting to see an intspec?
>=20
> I'm torn, but the bit of code in mpic_host_xlate that calls
> mpic_err_int_init() is just ugly.
>=20
> We could consider it similar to how we assume IPIs.
[Sethi Varun-B16395] I don't understand this point.
-Varun
^ permalink raw reply
* RE: [PATCH 3/3 v2] powerpc/mpic: FSL MPIC error interrupt support.
From: Sethi Varun-B16395 @ 2012-07-10 9:26 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@lists.ozlabs.org, Hamciuc Bogdan-BHAMCIU1
In-Reply-To: <62D13F27-5E39-450E-953D-102DCA32AA9D@kernel.crashing.org>
>=20
> > + u32 eisr, eimr;
> > + int errint;
> > + unsigned int cascade_irq;
> > +
> > + eisr =3D fsl_mpic_err_read(mpic->err_regs, eisr_offset);
> > + eimr =3D fsl_mpic_err_read(mpic->err_regs, eimr_offset);
> > +
> > + if (!(eisr & ~eimr))
> > + return IRQ_NONE;
> > +
> > + while (eisr) {
> > + errint =3D __builtin_clz(eisr);
> > + cascade_irq =3D irq_linear_revmap(mpic->irqhost,
> > + mpic->err_int_vecs[errint]);
> > + WARN_ON(cascade_irq =3D=3D NO_IRQ);
> > + if (cascade_irq !=3D NO_IRQ) {
> > + generic_handle_irq(cascade_irq);
> > + } else {
> > + eimr |=3D 1 << (31 - errint);
> > + fsl_mpic_err_write(mpic->err_regs, eimr_offset, eimr);
> > + }
> > + eisr &=3D ~(1 << (31 - errint));
> > + }
> > +
> > + return IRQ_HANDLED;
> > +}
> > +
> > +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) {
>=20
> Why can't we do this during mpic_init() time?
>=20
[Sethi Varun-B16395] Don't want to hard code the error interrupt number.
> > + unsigned int virq;
> > + unsigned int offset =3D MPIC_ERR_INT_EIMR;
>=20
> remove offset, just use MPIC_ERR_INT_EIMR in mpic_err_write
>=20
> > + int ret;
> > +
> > + virq =3D irq_create_mapping(mpic->irqhost, irqnum);
> > + if (virq =3D=3D NO_IRQ) {
> > + pr_err("Error interrupt setup failed\n");
> > + return -ENOSPC;
> > + }
> > +
> > + fsl_mpic_err_write(mpic->err_regs, offset, ~0);
>=20
> Add a comment about what this line is doing
>
[Sethi Varun-B16395] We are masking all the error interrupts here. I
Will add a comment for this.
=20
> > +
> > + ret =3D request_irq(virq, fsl_error_int_handler, IRQF_NO_THREAD,
> > + "mpic-error-int", mpic);
>=20
> Hmm, should we be using irq_set_chained_handler() instead of request_irq
>=20
> > + if (ret) {
> > + pr_err("Failed to register error interrupt handler\n");
> > + return ret;
> > + }
> > +
> > + return 0;
> > +}
> > diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> > index 61c7225..7002ef3 100644
> > --- a/arch/powerpc/sysdev/mpic.c
> > +++ b/arch/powerpc/sysdev/mpic.c
> > @@ -1026,6 +1026,9 @@ static int mpic_host_map(struct irq_domain *h,
> unsigned int virq,
> > return 0;
> > }
> >
> > + if (mpic_map_error_int(mpic, virq, hw))
> > + return 0;
> > +
> > if (hw >=3D mpic->num_sources)
> > return -EINVAL;
> >
> > @@ -1085,7 +1088,24 @@ static int mpic_host_xlate(struct irq_domain *h,
> struct device_node *ct,
> > */
> > switch (intspec[2]) {
> > case 0:
> > - case 1: /* no EISR/EIMR support for now, treat as shared IRQ
> */
> > + break;
> > + case 1:
> > + if (!(mpic->flags & MPIC_FSL_HAS_EIMR))
> > + break;
> > +
> > + if (intspec[3] >=3D ARRAY_SIZE(mpic->err_int_vecs))
> > + return -EINVAL;
> > +
> > + if (!mpic->err_int_config_done) {
> > + int ret;
> > + ret =3D mpic_err_int_init(mpic, intspec[0]);
> > + if (ret)
> > + return ret;
> > + mpic->err_int_config_done =3D 1;
> > + }
> > +
> > + *out_hwirq =3D mpic->err_int_vecs[intspec[3]];
> > +
> > break;
> > case 2:
> > if (intspec[0] >=3D ARRAY_SIZE(mpic->ipi_vecs)) @@ -
> 1302,6 +1322,8 @@
> > struct mpic * __init mpic_alloc(struct device_node *node,
> > mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE),
> > 0x1000);
> >
> > if (mpic->flags & MPIC_FSL) {
> > + u32 brr1, version;
> > +
> > /*
> > * Yes, Freescale really did put global registers in the
> > * magic per-cpu area -- and they don't even show up in the
> @@
> > -1309,6 +1331,17 @@ struct mpic * __init mpic_alloc(struct device_node
> *node,
> > */
> > mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
> > MPIC_CPU_THISBASE, 0x1000);
> > +
> > + brr1 =3D _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> > + MPIC_FSL_BRR1);
> > + version =3D brr1 & MPIC_FSL_BRR1_VER;
> > +
> > + /* Error interrupt mask register (EIMR) is required for
> > + * handling individual device error interrupts. EIMR
> > + * was added in MPIC version 4.1.
> > + */
> > + if (version >=3D 0x401)
> > + mpic_setup_error_int(mpic, intvec_top - 12);
>=20
> Would really like not to have this magic 12, but a comment would be nice
> if we keep it where the 12 comes from
>
[Sethi Varun-B16395]Obtaining vector numbers beyond ipi and timers for the =
error interrupts.=20
Will add a comment.
-Varun
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2012-07-10 9:25 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev list, Andrew Morton, Linux Kernel list
Hi Linus !
It looks like my rewrite of our lazy irq scheme is still exposing
"interesting" issues left and right. The previous fixes are now
causing an occasional BUG_ON to trigger (which this patch turns
into a WARN_ON while at it), due to another issue of disconnect
of the lazy irq state vs. the processor state in the idle loop
on pseries and cell.
This should fix it properly once for all moving the nasty code to a common
helper function.
There's also couple more fixes for some debug stuff that didn't build
(and helped resolving those problems so it's worth having), along with
a compile fix for newer gcc's.
Cheers,
Ben.
The following changes since commit 2437fccfbfc83bcb868ccc7fdfe2b5310bf07835:
Merge tag 'regulator-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator (2012-07-09 13:43:02 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
for you to fetch changes up to 50fb31cfed9218b439360caf7c0399b00042da15:
tty/hvc_opal: Fix debug function name (2012-07-10 19:16:25 +1000)
----------------------------------------------------------------
Benjamin Herrenschmidt (4):
powerpc: More fixes for lazy IRQ vs. idle
powerpc: Fix build of some debug irq code
powerpc/numa: Avoid stupid uninitialized warning from gcc
tty/hvc_opal: Fix debug function name
arch/powerpc/include/asm/hw_irq.h | 6 ++-
arch/powerpc/kernel/irq.c | 48 ++++++++++++++++++++++-
arch/powerpc/mm/numa.c | 2 +-
arch/powerpc/platforms/cell/pervasive.c | 11 +++---
arch/powerpc/platforms/pseries/processor_idle.c | 17 ++++----
drivers/tty/hvc/hvc_opal.c | 2 +-
6 files changed, 69 insertions(+), 17 deletions(-)
^ permalink raw reply
* [PATCH 2/2] powerpc/85xx: Create dts of each core in CAMP mode for P1021RDB-PC
From: Xu Jiucheng @ 2012-07-10 8:39 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Matthew McClintock, Xu Jiucheng
In-Reply-To: <1341909561-6591-1-git-send-email-Jiucheng.Xu@freescale.com>
Create the dts files for each core and splits the devices between
the two cores for P1021RDB-PC.
Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
Core1 has l2, serial1, eth2.
Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
---
arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts | 91 +++++++++++
arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts | 179 ++++++++++++++++++++++
2 files changed, 270 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts
create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts
new file mode 100644
index 0000000..199e94e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core0.dts
@@ -0,0 +1,91 @@
+/*
+ * P1021 RDB Core0 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have memory, l2, serail0, i2c, spi, gpio,
+ * tdm, dma, usb, eth0, eth1, sdhc, crypto, global-util, message, pci0, pci1,
+ * msi.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ */
+
+/include/ "p1021rdb-pc_32b.dts"
+
+/ {
+ model = "fsl,P1021RDB";
+ compatible = "fsl,P1021RDB-PC";
+
+ aliases {
+ ethernet1 = &enet0;
+ ethernet2 = &enet1;
+ serial0 = &serial0;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ PowerPC,P1021@1 {
+ status = "disabled";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ soc@ffe00000 {
+ serial1: serial@4600 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy1: ethernet-phy@1 {
+ status = "disabled";
+ };
+ };
+
+ enet2: ethernet@b2000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 42 /* serial1 */
+ 31 32 33 /* enet2-queue-group0 */
+ 25 26 27 /* enet2-queue-group1 */
+ >;
+ pic-no-reset;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts
new file mode 100644
index 0000000..dfc9105
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_camp_core1.dts
@@ -0,0 +1,179 @@
+/*
+ * P1021 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts allows core1 to have l2, eth2, serial1, crypto.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ */
+
+/include/ "p1021rdb-pc_32b.dts"
+
+/ {
+ model = "fsl,P1021RDB";
+ compatible = "fsl,P1021RDB-PC";
+
+ aliases {
+ ethernet0 = &enet2;
+ serial0 = &serial1;
+ };
+
+ cpus {
+ PowerPC,P1021@0 {
+ status = "disabled";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ localbus@ffe05000 {
+ status = "disabled";
+ };
+
+ soc@ffe00000 {
+ ecm-law@0 {
+ status = "disabled";
+ };
+
+ ecm@1000 {
+ status = "disabled";
+ };
+
+ memory-controller@2000 {
+ status = "disabled";
+ };
+
+ i2c@3000 {
+ status = "disabled";
+ };
+
+ i2c@3100 {
+ status = "disabled";
+ };
+
+ serial0: serial@4500 {
+ status = "disabled";
+ };
+
+ spi@7000 {
+ status = "disabled";
+ };
+
+ gpio: gpio-controller@f000 {
+ status = "disabled";
+ };
+
+ dma@21300 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ status = "disabled";
+ };
+
+ tbi0: tbi-phy@11 {
+ status = "disabled";
+ };
+ };
+
+ mdio@25000 {
+ status = "disabled";
+ };
+
+ mdio@26000 {
+ status = "disabled";
+ };
+
+ enet0: ethernet@b0000 {
+ status = "disabled";
+ };
+
+ enet1: ethernet@b1000 {
+ status = "disabled";
+ };
+
+ usb@22000 {
+ status = "disabled";
+ };
+
+ sdhci@2e000 {
+ status = "disabled";
+ };
+
+ crypto@30000 {
+ status = "disabled";
+ };
+
+ mpic: pic@40000 {
+ protected-sources = <
+ 16 /* ecm, mem, L2, pci0, pci1 */
+ 43 42 59 /* i2c, serial0, spi */
+ 47 63 62 /* gpio, tdm */
+ 20 21 22 23 /* dma */
+ 03 02 /* mdio */
+ 29 30 34 /* enet0-queue-group0 */
+ 17 18 24 /* enet0-queue-group1 */
+ 35 36 40 /* enet1-queue-group0 */
+ 51 52 67 /* enet1-queue-group1 */
+ 28 72 45 58 /* usb, sdhci, crypto */
+ 0xb0 0xb1 0xb2 /* message */
+ 0xb3 0xb4 0xb5
+ 0xb6 0xb7
+ 0xe0 0xe1 0xe2 /* msi */
+ 0xe3 0xe4 0xe5
+ 0xe6 0xe7 /* sdhci, crypto , pci */
+ >;
+ pic-no-reset;
+ };
+
+ msi@41600 {
+ status = "disabled";
+ };
+
+ global-utilities@e0000 { //global utilities block
+ status = "disabled";
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ status = "disabled";
+ };
+
+ pci1: pcie@ffe0a000 {
+ status = "disabled";
+ };
+};
--
1.6.4
^ permalink raw reply related
* [PATCH] powerpc/85xx: Add dts files for P1021RDB-PC board
From: Xu Jiucheng @ 2012-07-10 8:39 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Matthew McClintock, Xu Jiucheng
P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
- x1 PCIe slot or x1 PCIe to dual SATA controller
- x1 mini-PCIe slot
USB 2.0
- ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=E2=80=99s G=
L850A
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
---
arch/powerpc/boot/dts/p1021rdb-pc.dtsi | 236 +++++++++++++++++++++++=
++++++
arch/powerpc/boot/dts/p1021rdb-pc_32b.dts | 96 ++++++++++++
arch/powerpc/boot/dts/p1021rdb-pc_36b.dts | 96 ++++++++++++
arch/powerpc/boot/dts/p1021rdb.dts | 96 ------------
arch/powerpc/boot/dts/p1021rdb.dtsi | 236 -----------------------=
------
arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 ------------
6 files changed, 428 insertions(+), 428 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc.dtsi
create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
delete mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
delete mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
delete mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi b/arch/powerpc/boot/d=
ts/p1021rdb-pc.dtsi
new file mode 100644
index 0000000..b973461
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
@@ -0,0 +1,236 @@
+/*
+ * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "cfi-flash";
+ reg =3D <0x0 0x0 0x1000000>;
+ bank-width =3D <2>;
+ device-width =3D <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg =3D <0x0 0x00040000>;
+ label =3D "NOR Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg =3D <0x00040000 0x00040000>;
+ label =3D "NOR DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg =3D <0x00080000 0x00380000>;
+ label =3D "NOR Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg =3D <0x00400000 0x00b00000>;
+ label =3D "NOR JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg =3D <0x00f00000 0x00100000>;
+ label =3D "NOR U-Boot Image";
+ };
+ };
+
+ nand@1,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "fsl,p1021-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg =3D <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00100000>;
+ label =3D "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg =3D <0x00100000 0x00100000>;
+ label =3D "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00200000 0x00400000>;
+ label =3D "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg =3D <0x00600000 0x00400000>;
+ label =3D "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg =3D <0x00a00000 0x00700000>;
+ label =3D "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for User Writable Area */
+ reg =3D <0x01100000 0x00f00000>;
+ label =3D "NAND Writable User area";
+ };
+ };
+
+ L2switch@2,0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "vitesse-7385";
+ reg =3D <0x2 0x0 0x20000>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible =3D "pericom,pt7c4338";
+ reg =3D <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ compatible =3D "spansion,s25sl12801";
+ reg =3D <0>;
+ spi-max-frequency =3D <40000000>; /* input clock */
+
+ partition@u-boot {
+ /* 512KB for u-boot Bootloader Image */
+ reg =3D <0x0 0x00080000>;
+ label =3D "SPI Flash U-Boot Image";
+ read-only;
+ };
+
+ partition@dtb {
+ /* 512KB for DTB Image */
+ reg =3D <0x00080000 0x00080000>;
+ label =3D "SPI Flash DTB Image";
+ };
+
+ partition@kernel {
+ /* 4MB for Linux Kernel Image */
+ reg =3D <0x00100000 0x00400000>;
+ label =3D "SPI Flash Linux Kernel Image";
+ };
+
+ partition@fs {
+ /* 4MB for Compressed RFS Image */
+ reg =3D <0x00500000 0x00400000>;
+ label =3D "SPI Flash Compressed RFSImage";
+ };
+
+ partition@jffs-fs {
+ /* 7MB for JFFS2 based RFS */
+ reg =3D <0x00900000 0x00700000>;
+ label =3D "SPI Flash JFFS2 RFS";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type =3D "ulpi";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <3 1 0 0>;
+ reg =3D <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent =3D <&mpic>;
+ interrupts =3D <2 1 0 0>;
+ reg =3D <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg =3D <0x11>;
+ device_type =3D "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link =3D <1 1 1000 0 0>;
+ phy-connection-type =3D "rgmii-id";
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle =3D <&phy0>;
+ tbi-handle =3D <&tbi1>;
+ phy-connection-type =3D "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle =3D <&phy1>;
+ tbi-handle =3D <&tbi2>;
+ phy-connection-type =3D "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts b/arch/powerpc/boo=
t/dts/p1021rdb-pc_32b.dts
new file mode 100644
index 0000000..22534da
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg =3D <0 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000
+ 0x2 0x0 0x0 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges =3D <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ reg =3D <0 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg =3D <0 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@ffe80000 {
+ ranges =3D <0x0 0x0 0xffe80000 0x40000>;
+ reg =3D <0 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb-pc.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts b/arch/powerpc/boo=
t/dts/p1021rdb-pc_36b.dts
new file mode 100644
index 0000000..7ffe00a
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
@@ -0,0 +1,96 @@
+/*
+ * P1021 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions ar=
e met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyrig=
ht
+ * notice, this list of conditions and the following disclaimer in=
the
+ * documentation and/or other materials provided with the distribu=
tion.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote pro=
ducts
+ * derived from this software without specific prior written permi=
ssion.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of th=
e
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+ model =3D "fsl,P1021RDB";
+ compatible =3D "fsl,P1021RDB-PC";
+
+ memory {
+ device_type =3D "memory";
+ };
+
+ lbc: localbus@fffe05000 {
+ reg =3D <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+ ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000
+ 0x2 0x0 0xf 0xffb00000 0x00020000>;
+ };
+
+ soc: soc@fffe00000 {
+ ranges =3D <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ reg =3D <0xf 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg =3D <0xf 0xffe0a000 0 0x1000>;
+ ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges =3D <0x2000000 0x0 0xc0000000
+ 0x2000000 0x0 0xc0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@fffe80000 {
+ ranges =3D <0x0 0xf 0xffe80000 0x40000>;
+ reg =3D <0xf 0xffe80000 0 0x480>;
+ brg-frequency =3D <0>;
+ bus-frequency =3D <0>;
+ };
+};
+
+/include/ "p1021rdb-pc.dtsi"
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p=
1021rdb.dts
deleted file mode 100644
index 90b6b4c..0000000
--- a/arch/powerpc/boot/dts/p1021rdb.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * P1021 RDB Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions ar=
e met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyrig=
ht
- * notice, this list of conditions and the following disclaimer in=
the
- * documentation and/or other materials provided with the distribu=
tion.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote pro=
ducts
- * derived from this software without specific prior written permi=
ssion.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of th=
e
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/include/ "fsl/p1021si-pre.dtsi"
-/ {
- model =3D "fsl,P1021RDB";
- compatible =3D "fsl,P1021RDB-PC";
-
- memory {
- device_type =3D "memory";
- };
-
- lbc: localbus@ffe05000 {
- reg =3D <0 0xffe05000 0 0x1000>;
-
- /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
- ranges =3D <0x0 0x0 0x0 0xef000000 0x01000000
- 0x1 0x0 0x0 0xff800000 0x00040000
- 0x2 0x0 0x0 0xffb00000 0x00020000>;
- };
-
- soc: soc@ffe00000 {
- ranges =3D <0x0 0x0 0xffe00000 0x100000>;
- };
-
- pci0: pcie@ffe09000 {
- ranges =3D <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
- reg =3D <0 0xffe09000 0 0x1000>;
- pcie@0 {
- ranges =3D <0x2000000 0x0 0xa0000000
- 0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
- };
- };
-
- pci1: pcie@ffe0a000 {
- reg =3D <0 0xffe0a000 0 0x1000>;
- ranges =3D <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
- pcie@0 {
- ranges =3D <0x2000000 0x0 0x80000000
- 0x2000000 0x0 0x80000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
- };
- };
-
- qe: qe@ffe80000 {
- ranges =3D <0x0 0x0 0xffe80000 0x40000>;
- reg =3D <0 0xffe80000 0 0x480>;
- brg-frequency =3D <0>;
- bus-frequency =3D <0>;
- };
-};
-
-/include/ "p1021rdb.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/=
p1021rdb.dtsi
deleted file mode 100644
index b973461..0000000
--- a/arch/powerpc/boot/dts/p1021rdb.dtsi
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions ar=
e met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyrig=
ht
- * notice, this list of conditions and the following disclaimer in=
the
- * documentation and/or other materials provided with the distribu=
tion.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote pro=
ducts
- * derived from this software without specific prior written permi=
ssion.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of th=
e
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-&lbc {
- nor@0,0 {
- #address-cells =3D <1>;
- #size-cells =3D <1>;
- compatible =3D "cfi-flash";
- reg =3D <0x0 0x0 0x1000000>;
- bank-width =3D <2>;
- device-width =3D <1>;
-
- partition@0 {
- /* This location must not be altered */
- /* 256KB for Vitesse 7385 Switch firmware */
- reg =3D <0x0 0x00040000>;
- label =3D "NOR Vitesse-7385 Firmware";
- read-only;
- };
-
- partition@40000 {
- /* 256KB for DTB Image */
- reg =3D <0x00040000 0x00040000>;
- label =3D "NOR DTB Image";
- };
-
- partition@80000 {
- /* 3.5 MB for Linux Kernel Image */
- reg =3D <0x00080000 0x00380000>;
- label =3D "NOR Linux Kernel Image";
- };
-
- partition@400000 {
- /* 11MB for JFFS2 based Root file System */
- reg =3D <0x00400000 0x00b00000>;
- label =3D "NOR JFFS2 Root File System";
- };
-
- partition@f00000 {
- /* This location must not be altered */
- /* 512KB for u-boot Bootloader Image */
- /* 512KB for u-boot Environment Variables */
- reg =3D <0x00f00000 0x00100000>;
- label =3D "NOR U-Boot Image";
- };
- };
-
- nand@1,0 {
- #address-cells =3D <1>;
- #size-cells =3D <1>;
- compatible =3D "fsl,p1021-fcm-nand",
- "fsl,elbc-fcm-nand";
- reg =3D <0x1 0x0 0x40000>;
-
- partition@0 {
- /* This location must not be altered */
- /* 1MB for u-boot Bootloader Image */
- reg =3D <0x0 0x00100000>;
- label =3D "NAND U-Boot Image";
- read-only;
- };
-
- partition@100000 {
- /* 1MB for DTB Image */
- reg =3D <0x00100000 0x00100000>;
- label =3D "NAND DTB Image";
- };
-
- partition@200000 {
- /* 4MB for Linux Kernel Image */
- reg =3D <0x00200000 0x00400000>;
- label =3D "NAND Linux Kernel Image";
- };
-
- partition@600000 {
- /* 4MB for Compressed Root file System Image */
- reg =3D <0x00600000 0x00400000>;
- label =3D "NAND Compressed RFS Image";
- };
-
- partition@a00000 {
- /* 7MB for JFFS2 based Root file System */
- reg =3D <0x00a00000 0x00700000>;
- label =3D "NAND JFFS2 Root File System";
- };
-
- partition@1100000 {
- /* 15MB for User Writable Area */
- reg =3D <0x01100000 0x00f00000>;
- label =3D "NAND Writable User area";
- };
- };
-
- L2switch@2,0 {
- #address-cells =3D <1>;
- #size-cells =3D <1>;
- compatible =3D "vitesse-7385";
- reg =3D <0x2 0x0 0x20000>;
- };
-};
-
-&soc {
- i2c@3000 {
- rtc@68 {
- compatible =3D "pericom,pt7c4338";
- reg =3D <0x68>;
- };
- };
-
- spi@7000 {
- flash@0 {
- #address-cells =3D <1>;
- #size-cells =3D <1>;
- compatible =3D "spansion,s25sl12801";
- reg =3D <0>;
- spi-max-frequency =3D <40000000>; /* input clock */
-
- partition@u-boot {
- /* 512KB for u-boot Bootloader Image */
- reg =3D <0x0 0x00080000>;
- label =3D "SPI Flash U-Boot Image";
- read-only;
- };
-
- partition@dtb {
- /* 512KB for DTB Image */
- reg =3D <0x00080000 0x00080000>;
- label =3D "SPI Flash DTB Image";
- };
-
- partition@kernel {
- /* 4MB for Linux Kernel Image */
- reg =3D <0x00100000 0x00400000>;
- label =3D "SPI Flash Linux Kernel Image";
- };
-
- partition@fs {
- /* 4MB for Compressed RFS Image */
- reg =3D <0x00500000 0x00400000>;
- label =3D "SPI Flash Compressed RFSImage";
- };
-
- partition@jffs-fs {
- /* 7MB for JFFS2 based RFS */
- reg =3D <0x00900000 0x00700000>;
- label =3D "SPI Flash JFFS2 RFS";
- };
- };
- };
-
- usb@22000 {
- phy_type =3D "ulpi";
- };
-
- mdio@24000 {
- phy0: ethernet-phy@0 {
- interrupt-parent =3D <&mpic>;
- interrupts =3D <3 1 0 0>;
- reg =3D <0x0>;
- };
-
- phy1: ethernet-phy@1 {
- interrupt-parent =3D <&mpic>;
- interrupts =3D <2 1 0 0>;
- reg =3D <0x1>;
- };
-
- tbi0: tbi-phy@11 {
- reg =3D <0x11>;
- device_type =3D "tbi-phy";
- };
- };
-
- mdio@25000 {
- tbi1: tbi-phy@11 {
- reg =3D <0x11>;
- device_type =3D "tbi-phy";
- };
- };
-
- mdio@26000 {
- tbi2: tbi-phy@11 {
- reg =3D <0x11>;
- device_type =3D "tbi-phy";
- };
- };
-
- enet0: ethernet@b0000 {
- fixed-link =3D <1 1 1000 0 0>;
- phy-connection-type =3D "rgmii-id";
-
- };
-
- enet1: ethernet@b1000 {
- phy-handle =3D <&phy0>;
- tbi-handle =3D <&tbi1>;
- phy-connection-type =3D "sgmii";
- };
-
- enet2: ethernet@b2000 {
- phy-handle =3D <&phy1>;
- tbi-handle =3D <&tbi2>;
- phy-connection-type =3D "rgmii-id";
- };
-};
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/d=
ts/p1021rdb_36b.dts
deleted file mode 100644
index ea6d8b5..0000000
--- a/arch/powerpc/boot/dts/p1021rdb_36b.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * P1021 RDB Device Tree Source (36-bit address map)
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions ar=
e met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyrig=
ht
- * notice, this list of conditions and the following disclaimer in=
the
- * documentation and/or other materials provided with the distribu=
tion.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote pro=
ducts
- * derived from this software without specific prior written permi=
ssion.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of th=
e
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP=
LIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AR=
E
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR A=
NY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA=
MAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR=
TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/include/ "fsl/p1021si-pre.dtsi"
-/ {
- model =3D "fsl,P1021RDB";
- compatible =3D "fsl,P1021RDB-PC";
-
- memory {
- device_type =3D "memory";
- };
-
- lbc: localbus@fffe05000 {
- reg =3D <0xf 0xffe05000 0 0x1000>;
-
- /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
- ranges =3D <0x0 0x0 0xf 0xef000000 0x01000000
- 0x1 0x0 0xf 0xff800000 0x00040000
- 0x2 0x0 0xf 0xffb00000 0x00020000>;
- };
-
- soc: soc@fffe00000 {
- ranges =3D <0x0 0xf 0xffe00000 0x100000>;
- };
-
- pci0: pcie@fffe09000 {
- ranges =3D <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
- reg =3D <0xf 0xffe09000 0 0x1000>;
- pcie@0 {
- ranges =3D <0x2000000 0x0 0xa0000000
- 0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
- };
- };
-
- pci1: pcie@fffe0a000 {
- reg =3D <0xf 0xffe0a000 0 0x1000>;
- ranges =3D <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
- pcie@0 {
- ranges =3D <0x2000000 0x0 0xc0000000
- 0x2000000 0x0 0xc0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
- };
- };
-
- qe: qe@fffe80000 {
- ranges =3D <0x0 0xf 0xffe80000 0x40000>;
- reg =3D <0xf 0xffe80000 0 0x480>;
- brg-frequency =3D <0>;
- bus-frequency =3D <0>;
- };
-};
-
-/include/ "p1021rdb.dtsi"
-/include/ "fsl/p1021si-post.dtsi"
--=20
1.6.4
^ permalink raw reply related
* Re: [PATCH 1/1] powerpc: add "memory" attribute for mfmsr()
From: tiejun.chen @ 2012-07-10 8:27 UTC (permalink / raw)
To: tiejun.chen; +Cc: linuxppc-dev
In-Reply-To: <4FFBE659.10804@windriver.com>
On 07/10/2012 04:22 PM, tiejun.chen wrote:
> On 07/10/2012 04:19 PM, Benjamin Herrenschmidt wrote:
>> On Tue, 2012-07-10 at 15:59 +0800, Tiejun Chen wrote:
>>> Add "memory" attribute in inline assembly language as a compiler
>>> barrier to make sure 4.6.x GCC don't reorder mfmsr().
>>
>> Out of curiosity, did you see a case where it was re-ordered
>> improperly ?
>
> Yes.
>
> In my scenario, there's one simple wrapper from local_irq_save().
> ------
> uint32_t XX_DisableAllIntr(void)
> {
> unsigned long flags;
>
> local_irq_save(flags);
>
> return (uint32_t)flags;
> }
>
> When CONFIG_TRACE_IRQFLAGS_SUPPORT is enabled, kernel would expand
> local_irq_save(). Firstly, please refer to the follows:
>
> #define local_irq_save(flags) \
> do { \
> raw_local_irq_save(flags); \
> trace_hardirqs_off(); \
> } while (0)
>
> #define raw_local_irq_save(flags) \
> do { \
> typecheck(unsigned long, flags); \
> flags = arch_local_irq_save(); \
> } while (0)
>
> static inline unsigned long arch_local_irq_save(void)
> {
> unsigned long flags = arch_local_save_flags();
> #ifdef CONFIG_BOOKE
> asm volatile("wrteei 0" : : : "memory");
> #else
> SET_MSR_EE(flags & ~MSR_EE);
> #endif
> return flags;
> }
>
> static inline unsigned long arch_local_save_flags(void)
> {
> return mfmsr();
> }
>
> So local_irq_save(flags) is extended as something like:
>
> {
> #1 flags = mfmsr();
> #2 asm volatile("wrteei 0" : : : "memory");
> #3 trace_hardirqs_off();
> }
>
> But build kernel with our 5.0 toolchain (with/without
Note here this toolchain is based on 4.6.3.
Tiejun
> --with-toolchain-dir=wr-toolchain),
>
> (gdb) disassemble XX_DisableAllIntr
> Dump of assembler code for function XX_DisableAllIntr:
> 0xc04550c0 <+0>: mflr r0
> 0xc04550c4 <+4>: stw r0,4(r1)
> 0xc04550c8 <+8>: bl 0xc000f060 <mcount>
> 0xc04550cc <+12>: stwu r1,-16(r1)
> 0xc04550d0 <+16>: mflr r0
> 0xc04550d4 <+20>: stw r0,20(r1)
> 0xc04550d8 <+24>: wrteei 0
> 0xc04550dc <+28>: bl 0xc00c6c10 <trace_hardirqs_off>
> 0xc04550e0 <+32>: mfmsr r3
> 0xc04550e4 <+36>: lwz r0,20(r1)
> 0xc04550e8 <+40>: mtlr r0
> 0xc04550ec <+44>: addi r1,r1,16
> 0xc04550f0 <+48>: blr
> End of assembler dump.
>
> You should notice #2 and #3 is reorganized before #1. This means irq is always
> disabled before we check irq status via reading msr. Then kernel would work as
> abnormal sometimes.
>
> But with old toolchain (4.5.x) for this same kernel, everything is fine.
>
> Tiejun
>
>>
>> Cheers,
>> Ben.
>>
>>> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
>>> ---
>>> arch/powerpc/include/asm/reg.h | 3 ++-
>>> 1 files changed, 2 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>> index 559da19..578e5a0 100644
>>> --- a/arch/powerpc/include/asm/reg.h
>>> +++ b/arch/powerpc/include/asm/reg.h
>>> @@ -1016,7 +1016,8 @@
>>> /* Macros for setting and retrieving special purpose registers */
>>> #ifndef __ASSEMBLY__
>>> #define mfmsr() ({unsigned long rval; \
>>> - asm volatile("mfmsr %0" : "=r" (rval)); rval;})
>>> + asm volatile("mfmsr %0" : "=r" (rval) : \
>>> + : "memory"); rval;})
>>> #ifdef CONFIG_PPC_BOOK3S_64
>>> #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
>>> : : "r" (v) : "memory")
>>
>>
>>
>>
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
>
^ permalink raw reply
* Re: [PATCH 1/1] powerpc: add "memory" attribute for mfmsr()
From: tiejun.chen @ 2012-07-10 8:22 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1341908398.2561.15.camel@pasglop>
On 07/10/2012 04:19 PM, Benjamin Herrenschmidt wrote:
> On Tue, 2012-07-10 at 15:59 +0800, Tiejun Chen wrote:
>> Add "memory" attribute in inline assembly language as a compiler
>> barrier to make sure 4.6.x GCC don't reorder mfmsr().
>
> Out of curiosity, did you see a case where it was re-ordered
> improperly ?
Yes.
In my scenario, there's one simple wrapper from local_irq_save().
------
uint32_t XX_DisableAllIntr(void)
{
unsigned long flags;
local_irq_save(flags);
return (uint32_t)flags;
}
When CONFIG_TRACE_IRQFLAGS_SUPPORT is enabled, kernel would expand
local_irq_save(). Firstly, please refer to the follows:
#define local_irq_save(flags) \
do { \
raw_local_irq_save(flags); \
trace_hardirqs_off(); \
} while (0)
#define raw_local_irq_save(flags) \
do { \
typecheck(unsigned long, flags); \
flags = arch_local_irq_save(); \
} while (0)
static inline unsigned long arch_local_irq_save(void)
{
unsigned long flags = arch_local_save_flags();
#ifdef CONFIG_BOOKE
asm volatile("wrteei 0" : : : "memory");
#else
SET_MSR_EE(flags & ~MSR_EE);
#endif
return flags;
}
static inline unsigned long arch_local_save_flags(void)
{
return mfmsr();
}
So local_irq_save(flags) is extended as something like:
{
#1 flags = mfmsr();
#2 asm volatile("wrteei 0" : : : "memory");
#3 trace_hardirqs_off();
}
But build kernel with our 5.0 toolchain (with/without
--with-toolchain-dir=wr-toolchain),
(gdb) disassemble XX_DisableAllIntr
Dump of assembler code for function XX_DisableAllIntr:
0xc04550c0 <+0>: mflr r0
0xc04550c4 <+4>: stw r0,4(r1)
0xc04550c8 <+8>: bl 0xc000f060 <mcount>
0xc04550cc <+12>: stwu r1,-16(r1)
0xc04550d0 <+16>: mflr r0
0xc04550d4 <+20>: stw r0,20(r1)
0xc04550d8 <+24>: wrteei 0
0xc04550dc <+28>: bl 0xc00c6c10 <trace_hardirqs_off>
0xc04550e0 <+32>: mfmsr r3
0xc04550e4 <+36>: lwz r0,20(r1)
0xc04550e8 <+40>: mtlr r0
0xc04550ec <+44>: addi r1,r1,16
0xc04550f0 <+48>: blr
End of assembler dump.
You should notice #2 and #3 is reorganized before #1. This means irq is always
disabled before we check irq status via reading msr. Then kernel would work as
abnormal sometimes.
But with old toolchain (4.5.x) for this same kernel, everything is fine.
Tiejun
>
> Cheers,
> Ben.
>
>> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
>> ---
>> arch/powerpc/include/asm/reg.h | 3 ++-
>> 1 files changed, 2 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>> index 559da19..578e5a0 100644
>> --- a/arch/powerpc/include/asm/reg.h
>> +++ b/arch/powerpc/include/asm/reg.h
>> @@ -1016,7 +1016,8 @@
>> /* Macros for setting and retrieving special purpose registers */
>> #ifndef __ASSEMBLY__
>> #define mfmsr() ({unsigned long rval; \
>> - asm volatile("mfmsr %0" : "=r" (rval)); rval;})
>> + asm volatile("mfmsr %0" : "=r" (rval) : \
>> + : "memory"); rval;})
>> #ifdef CONFIG_PPC_BOOK3S_64
>> #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
>> : : "r" (v) : "memory")
>
>
>
>
^ permalink raw reply
* Re: [PATCH] More fixes for lazy IRQ vs. idle
From: Benjamin Herrenschmidt @ 2012-07-10 8:26 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1341891538.2561.10.camel@pasglop>
> - hard_irq_disable();
> - if (!lazy_irq_pending())
> + if (prep_irq_for_idle()) {
> cede_processor();
> +#ifdef CONFIG_TRACE_IRQFLAG
this is IRQFLAGS (missing "S"). I'll fix it while I commit, the same
typo is in another place in irq.c as well, I'll commit a fix for that
too and shoot the whole thing to Linus.
> + /* Ensure that H_CEDE returns with IRQs on */
> + WARN_ON(!(mfmsr() & MSR_EE));
> +#endif
> + }
> }
>
> static int dedicated_cede_loop(struct cpuidle_device *dev,
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 1/1] powerpc: add "memory" attribute for mfmsr()
From: Benjamin Herrenschmidt @ 2012-07-10 8:19 UTC (permalink / raw)
To: Tiejun Chen; +Cc: linuxppc-dev
In-Reply-To: <1341907153-20516-1-git-send-email-tiejun.chen@windriver.com>
On Tue, 2012-07-10 at 15:59 +0800, Tiejun Chen wrote:
> Add "memory" attribute in inline assembly language as a compiler
> barrier to make sure 4.6.x GCC don't reorder mfmsr().
Out of curiosity, did you see a case where it was re-ordered
improperly ?
Cheers,
Ben.
> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
> ---
> arch/powerpc/include/asm/reg.h | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index 559da19..578e5a0 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -1016,7 +1016,8 @@
> /* Macros for setting and retrieving special purpose registers */
> #ifndef __ASSEMBLY__
> #define mfmsr() ({unsigned long rval; \
> - asm volatile("mfmsr %0" : "=r" (rval)); rval;})
> + asm volatile("mfmsr %0" : "=r" (rval) : \
> + : "memory"); rval;})
> #ifdef CONFIG_PPC_BOOK3S_64
> #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
> : : "r" (v) : "memory")
^ permalink raw reply
* [PATCH] powerpc/dts: Add ucc uart support for p1025rdb
From: Zhicheng @ 2012-07-10 7:52 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: Zhicheng Fan
From: Zhicheng Fan <B32736@freescale.com>
Signed-off-by: Zhicheng Fan <B32736@freescale.com>
---
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 16 ++++++++++-
arch/powerpc/boot/dts/p1025rdb.dtsi | 40 +++++++++++++++++++++++++++
2 files changed, 55 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index a78e7ed..8a5993f 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -1,7 +1,7 @@
/*
* P1021/P1012 Silicon/SoC Device Tree Source (post include)
*
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -210,6 +210,20 @@
interrupt-parent = <&qeic>;
};
+ ucc@2600 {
+ cell-index = <7>;
+ reg = <0x2600 0x200>;
+ interrupts = <42>;
+ interrupt-parent = <&qeic>;
+ };
+
+ ucc@2200 {
+ cell-index = <3>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
+ };
+
muram@10000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/p1025rdb.dtsi b/arch/powerpc/boot/dts/p1025rdb.dtsi
index 3875661..257adf9 100644
--- a/arch/powerpc/boot/dts/p1025rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1025rdb.dtsi
@@ -272,5 +272,45 @@
0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
};
+
+ pio3: ucc_pin@03 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 0x0 0x16 0x2 0x0 0x2 0x0 /* SER7_CD_B*/
+ 0x0 0x12 0x2 0x0 0x2 0x0 /* SER7_CTS_B*/
+ 0x0 0x13 0x1 0x0 0x2 0x0 /* SER7_RTS_B*/
+ 0x0 0x14 0x2 0x0 0x2 0x0 /* SER7_RXD0*/
+ 0x0 0x15 0x1 0x0 0x2 0x0>; /* SER7_TXD0*/
+ };
+
+ pio4: ucc_pin@04 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 0x1 0x0 0x2 0x0 0x2 0x0 /* SER3_CD_B*/
+ 0x0 0x1c 0x2 0x0 0x2 0x0 /* SER3_CTS_B*/
+ 0x0 0x1d 0x1 0x0 0x2 0x0 /* SER3_RTS_B*/
+ 0x0 0x1e 0x2 0x0 0x2 0x0 /* SER3_RXD0*/
+ 0x0 0x1f 0x1 0x0 0x2 0x0>; /* SER3_TXD0*/
+ };
+ };
+};
+
+&qe {
+ serial2: ucc@2600 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <0>;
+ rx-clock-name = "brg6";
+ tx-clock-name = "brg6";
+ pio-handle = <&pio3>;
+ };
+
+ serial3: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ pio-handle = <&pio4>;
};
};
--
1.6.4
^ permalink raw reply related
* [PATCH 1/1] powerpc: add "memory" attribute for mfmsr()
From: Tiejun Chen @ 2012-07-10 7:59 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
Add "memory" attribute in inline assembly language as a compiler
barrier to make sure 4.6.x GCC don't reorder mfmsr().
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
arch/powerpc/include/asm/reg.h | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 559da19..578e5a0 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1016,7 +1016,8 @@
/* Macros for setting and retrieving special purpose registers */
#ifndef __ASSEMBLY__
#define mfmsr() ({unsigned long rval; \
- asm volatile("mfmsr %0" : "=r" (rval)); rval;})
+ asm volatile("mfmsr %0" : "=r" (rval) : \
+ : "memory"); rval;})
#ifdef CONFIG_PPC_BOOK3S_64
#define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
: : "r" (v) : "memory")
--
1.5.6
^ permalink raw reply related
* Re: [PATCH] More fixes for lazy IRQ vs. idle
From: Benjamin Herrenschmidt @ 2012-07-10 7:49 UTC (permalink / raw)
To: Michael Neuling; +Cc: linuxppc-dev
In-Reply-To: <21083.1341900615@neuling.org>
On Tue, 2012-07-10 at 16:10 +1000, Michael Neuling wrote:
> Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> > Looks like we still have issues with pSeries and Cell idle code
> > vs. the lazy irq state. In fact, the reset fixes that went upstream
> > are exposing the problem more by causing BUG_ON() to trigger (which
> > this patch turns into a WARN_ON instead).
>
> Do we need to cc stable for 3.4 or is this new stuff only effecting us
> since the 3.5 merge window?
That's probably stable business, I'll check that before I send it to
Linus.
Cheers,
Ben.
^ permalink raw reply
* [PATCH 2/2] powerpc/mpc8572ds: Update the MSI interrupts into 4-cell format
From: Jia Hongtao @ 2012-07-10 6:08 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: b38951
In-Reply-To: <1341900506-23401-1-git-send-email-B38951@freescale.com>
With 2-cell format interrupts of MSI PCIe ethernet card can not work.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
---
arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | 8 ++++----
arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index d34d127..ef9ef56 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -67,10 +67,10 @@
msi@41600 {
msi-available-ranges = <0 0x80>;
interrupts = <
- 0xe0 0
- 0xe1 0
- 0xe2 0
- 0xe3 0>;
+ 0xe0 0 0 0
+ 0xe1 0 0 0
+ 0xe2 0 0 0
+ 0xe3 0 0 0>;
};
timer@42100 {
status = "disabled";
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index 1932396..24564ee 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -97,10 +97,10 @@
msi@41600 {
msi-available-ranges = <0x80 0x80>;
interrupts = <
- 0xe4 0
- 0xe5 0
- 0xe6 0
- 0xe7 0>;
+ 0xe4 0 0 0
+ 0xe5 0 0 0
+ 0xe6 0 0 0
+ 0xe7 0 0 0>;
};
global-utilities@e0000 {
status = "disabled";
--
1.7.5.1
^ permalink raw reply related
* [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue
From: Jia Hongtao @ 2012-07-10 6:08 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: b38951
The issue log on core1 is:
root@mpc8572ds:~# ifconfig eth0 10.192.208.244
net eth0: could not attach to PHY
SIOCSIFFLAGS: No such device
To attach PHY node mdio@24520 should not be disabled in dts of core1.
Because all PHYs are controlled through this node as follows:
mdio@24520 {
phy0: ethernet-phy@0 {
interrupts = <10 1 0 0>;
reg = <0x0>;
};
phy1: ethernet-phy@1 {
interrupts = <10 1 0 0>;
reg = <0x1>;
};
phy2: ethernet-phy@2 {
interrupts = <10 1 0 0>;
reg = <0x2>;
};
phy3: ethernet-phy@3 {
interrupts = <10 1 0 0>;
reg = <0x3>;
};
tbi0: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
---
arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index d6a8faf..1932396 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -67,9 +67,6 @@
ethernet@24000 {
status = "disabled";
};
- mdio@24520 {
- status = "disabled";
- };
ptp_clock@24e00 {
status = "disabled";
};
--
1.7.5.1
^ permalink raw reply related
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