* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2012-07-27 4:37 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev list, Andrew Morton, Linux Kernel list
Hi Linus !
Here's a handful of powerpc patches, a couple of regression fixes
for problems introduced in the main batch in this merge window,
a couple of defconfig updates, and some trivials. The radeonfb
one is something that was long standing in SLES which I forgot
to pickup earlier.
Cheers,
Ben.
The following changes since commit bdc0077af574800d24318b6945cf2344e8dbb050:
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi (2012-07-24 18:11:22 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
for you to fetch changes up to bac821a6e3404330d509fd3a245bf7701f210c7c:
powerpc/ftrace: Trace function graph entry before updating index (2012-07-27 11:42:34 +1000)
----------------------------------------------------------------
Alexander Graf (1):
powerpc/kvm/bookehv: Fix build regression
Anton Blanchard (2):
powerpc: Enable pseries hardware RNG and crypto modules
powerpc: Lack of firmware flash support is not an error
Benjamin Herrenschmidt (1):
powerpc: Update g5_defconfig
Steven Rostedt (1):
powerpc/ftrace: Trace function graph entry before updating index
Stuart Yoder (1):
powerpc: Set stack limit properly in crit_transfer_to_handler
Tony Breeds (1):
radeonfb: Add quirk for the graphics adapter in some JSxx
arch/powerpc/configs/g5_defconfig | 103 ++++++++++----------------------
arch/powerpc/configs/ppc64_defconfig | 6 +-
arch/powerpc/configs/pseries_defconfig | 6 +-
arch/powerpc/kernel/entry_32.S | 12 +++-
arch/powerpc/kernel/ftrace.c | 11 ++--
arch/powerpc/kernel/rtas_flash.c | 2 +-
arch/powerpc/kvm/bookehv_interrupts.S | 77 ++++++++++++------------
drivers/video/aty/radeon_monitor.c | 35 +++++++++++
8 files changed, 128 insertions(+), 124 deletions(-)
^ permalink raw reply
* Re: [PATCH v8 0/7] power management patch set
From: Li Yang @ 2012-07-27 3:14 UTC (permalink / raw)
To: Kumar Gala; +Cc: scottwood, linuxppc-dev, Zhao Chenhui, linux-kernel
In-Reply-To: <B5854411-6C9A-43BA-BF5D-FB1AD76E28D1@kernel.crashing.org>
On Fri, Jul 27, 2012 at 1:29 AM, Kumar Gala <galak@kernel.crashing.org> wrote:
>
> On Jul 26, 2012, at 9:02 AM, Li Yang wrote:
>
>> On Fri, Jul 20, 2012 at 8:42 PM, Zhao Chenhui
>> <chenhui.zhao@freescale.com> wrote:
>>> Changes for v8:
>>> * Separated the cpu hotplug patch into three patches, as follows
>>> [PATCH v8 1/7] powerpc/smp: use a struct epapr_spin_table to replace macros
>>> [PATCH v8 2/7] powerpc/smp: add generic_set_cpu_up() to set cpu_state as CPU_UP_PREPARE
>>> [PATCH v8 4/7] powerpc/85xx: add HOTPLUG_CPU support
>>>
>>> * Replaced magic numbers with macros in "[PATCH 5/7] powerpc/85xx: add sleep and deep sleep support"
>>>
>>> * no change to the rest of the patch set
>>
>> Hi Kumar,
>>
>> How about picking about this series for 3.6? The review seems to
>> settle down for this revision.
>
> Its too late for 3.6, but will look at queuing it up for 3.7.
Too late? The latest version were submitted on Jul 20 and you are
still picking up other patches today. :) I do think the patches have
been floating around for too long time to wait for another release
cycle. If there are problems, we can work on addressing them in
follow up patches.
Leo
^ permalink raw reply
* RE: [PATCH V3 2/5] powerpc/fsl-pci: Determine primary bus by looking for ISA node
From: Jia Hongtao-B38951 @ 2012-07-27 2:56 UTC (permalink / raw)
To: Kumar Gala
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <C853F286-EB9D-4A73-936F-E56AA003396C@kernel.crashing.org>
> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Friday, July 27, 2012 2:22 AM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li Yang-R58472
> Subject: Re: [PATCH V3 2/5] powerpc/fsl-pci: Determine primary bus by
> looking for ISA node
>=20
>=20
> On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
>=20
> > PCI host bridge is primary bus if it contains an ISA node. But not all
> boards
> > fit this rule. Device tree should be updated for all these boards.
>=20
> I don't really seen any reason for this patch. We can just use the code
> as Scott wrote it that sets fsl_pci_primary based on search for the isa
> node.
>=20
I change the way of searching ISA node just because the platform driver
mechanism. Probe function of this driver will be called for each PCI
controller which means more than once. I think the Scott's way is not
perfectly match this situation. Anyway I will find a better way to solve
this by refactoring the Scott's method or using my own way.
Thanks.
-Hongtao.
^ permalink raw reply
* RE: [PATCH V3 2/5] powerpc/fsl-pci: Determine primary bus by looking for ISA node
From: Jia Hongtao-B38951 @ 2012-07-27 2:16 UTC (permalink / raw)
To: Kumar Gala
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <C853F286-EB9D-4A73-936F-E56AA003396C@kernel.crashing.org>
Thanks for all your comments.
Sorry for the mistakes in this patchset.
I am just so eager to push them to upstream.
I will work on the comments very carfully.
Thanks.
-Hongtao.
> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Friday, July 27, 2012 2:22 AM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li Yang-R58472
> Subject: Re: [PATCH V3 2/5] powerpc/fsl-pci: Determine primary bus by
> looking for ISA node
>=20
>=20
> On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
>=20
> > PCI host bridge is primary bus if it contains an ISA node. But not all
> boards
> > fit this rule. Device tree should be updated for all these boards.
>=20
> I don't really seen any reason for this patch. We can just use the code
> as Scott wrote it that sets fsl_pci_primary based on search for the isa
> node.
>=20
> >
> > Signed-off-by: Jia Hongtao <B38951@freescale.com>
> > Signed-off-by: Li Yang <leoli@freescale.com>
> > ---
> > Changed for V3:
> > - Using non-recursive function to find ISA under PCI
> >
> > arch/powerpc/include/asm/pci-bridge.h | 1 +
> > arch/powerpc/sysdev/fsl_pci.c | 31 ++++++++++++++++++++++++--
> -----
> > arch/powerpc/sysdev/fsl_pci.h | 12 +++++++++++-
> > 3 files changed, 36 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/pci-bridge.h
> b/arch/powerpc/include/asm/pci-bridge.h
> > index ac39e6a..b48fa7f 100644
> > --- a/arch/powerpc/include/asm/pci-bridge.h
> > +++ b/arch/powerpc/include/asm/pci-bridge.h
> > @@ -20,6 +20,7 @@ struct device_node;
> > struct pci_controller {
> > struct pci_bus *bus;
> > char is_dynamic;
> > + int is_primary;
> > #ifdef CONFIG_PPC64
> > int node;
> > #endif
> > diff --git a/arch/powerpc/sysdev/fsl_pci.c
> b/arch/powerpc/sysdev/fsl_pci.c
> > index 5228b6b..97557c5 100644
> > --- a/arch/powerpc/sysdev/fsl_pci.c
> > +++ b/arch/powerpc/sysdev/fsl_pci.c
> > @@ -453,6 +453,7 @@ int __init fsl_add_bridge(struct device_node *dev,
> int is_primary)
> >
> > hose->first_busno =3D bus_range ? bus_range[0] : 0x0;
> > hose->last_busno =3D bus_range ? bus_range[1] : 0xff;
> > + hose->is_primary =3D is_primary;
> >
> > setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
> > PPC_INDIRECT_TYPE_BIG_ENDIAN);
> > @@ -933,18 +934,34 @@ void pci_determine_swiotlb(void)
> > }
> > #endif
> >
> > -int primary_phb_addr;
> > +/* Checkout if PCI contains ISA node (Only scan the children of PCI)
> */
> > +static int of_pci_has_isa(struct device_node *pci_node)
> > +{
> > + struct device_node *np;
> > +
> > + read_lock(&devtree_lock);
> > + if (!pci_node)
> > + return 0;
> > + np =3D pci_node->allnext;
> > + for (; np !=3D pci_node->sibling; np =3D np->allnext) {
> > + if (np->type && (of_node_cmp(np->type, "isa") =3D=3D 0)
> > + && of_node_get(np)) {
> > + of_node_put(pci_node);
> > + return 1;
> > + }
> > + }
> > + of_node_put(pci_node);
> > + read_unlock(&devtree_lock);
> > + return 0;
> > +}
> > +
> > static int __devinit fsl_pci_probe(struct platform_device *pdev)
> > {
> > - struct pci_controller *hose;
> > bool is_primary;
> > + is_primary =3D of_pci_has_isa(pdev->dev.of_node);
> >
> > - if (of_match_node(pci_ids, pdev->dev.of_node)) {
> > - struct resource rsrc;
> > - of_address_to_resource(pdev->dev.of_node, 0, &rsrc);
> > - is_primary =3D ((rsrc.start & 0xfffff) =3D=3D primary_phb_addr);
> > + if (of_match_node(pci_ids, pdev->dev.of_node))
> > fsl_add_bridge(pdev->dev.of_node, is_primary);
> > - }
> >
> > return 0;
> > }
> > diff --git a/arch/powerpc/sysdev/fsl_pci.h
> b/arch/powerpc/sysdev/fsl_pci.h
> > index 095392d..c884e06 100644
> > --- a/arch/powerpc/sysdev/fsl_pci.h
> > +++ b/arch/powerpc/sysdev/fsl_pci.h
> > @@ -88,7 +88,17 @@ struct ccsr_pci {
> > __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture
> register 0 */
> > };
> >
> > -extern int primary_phb_addr;
> > +
> > +#ifdef CONFIG_SUSPEND
> > +struct fsl_pci_private_data {
> > + int inbound_num;
> > + struct pci_outbound_window_regs __iomem *pci_pow;
> > + struct pci_inbound_window_regs __iomem *pci_piw;
> > + void *saved_regs;
> > +};
> > +#endif
> > +
>=20
> This struct has nothing to do with this patch
>=20
> > +extern int is_has_isa_node(struct device_node *parent);
>=20
> Where is is_has_isa_node() defined or used?
>=20
> > extern int fsl_add_bridge(struct device_node *dev, int is_primary);
> > extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
> > extern int mpc83xx_add_bridge(struct device_node *dev);
> > --
> > 1.7.5.1
> >
>=20
^ permalink raw reply
* RE: [PATCH 3/6] powerpc/fsl-pci: Determine primary bus by looking for ISA node
From: Jia Hongtao-B38951 @ 2012-07-27 2:07 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <5011F01C.8000008@freescale.com>
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
MjENCj4gU2VudDogRnJpZGF5LCBKdWx5IDI3LCAyMDEyIDk6MzQgQU0NCj4gVG86IEppYSBIb25n
dGFvLUIzODk1MQ0KPiBDYzogV29vZCBTY290dC1CMDc0MjE7IGxpbnV4cHBjLWRldkBsaXN0cy5v
emxhYnMub3JnOw0KPiBnYWxha0BrZXJuZWwuY3Jhc2hpbmcub3JnOyBMaSBZYW5nLVI1ODQ3Mg0K
PiBTdWJqZWN0OiBSZTogW1BBVENIIDMvNl0gcG93ZXJwYy9mc2wtcGNpOiBEZXRlcm1pbmUgcHJp
bWFyeSBidXMgYnkNCj4gbG9va2luZyBmb3IgSVNBIG5vZGUNCj4gDQo+IE9uIDA3LzI1LzIwMTIg
MDk6MjAgUE0sIEppYSBIb25ndGFvLUIzODk1MSB3cm90ZToNCj4gPiBBbGwgdGhpcyByZWN1cnNp
b24gdGhpbmcgSSB3aWxsIHRyeSBhbm90aGVyIHdheS4NCj4gPg0KPiA+IEJ1dCB0aGlzIGlzIG5v
dCB0aGUgc2FtZSBhcyB5b3UgZGlkLiBJZiB3ZSB1c2UgcGxhdGZvcm0gZHJpdmVyIHByb2JlDQo+
IGZ1bmN0aW9uDQo+ID4gd2lsbCBiZSBjYWxsZWQgbW9yZSB0aGFuIG9uY2UuIFlvdXIgZnVuY3Rp
b24gaXMgdG8gZmluZCBJU0Egbm9kZSBhbmQNCj4gY2hlY2sgaWYNCj4gPiB0aGUgcGFyZW50IGVx
dWFsIHRvIHRoaXMgUENJIGNvbnRyb2xsZXIuIE15IGZ1bmN0aW9uIGlzIHRvIHNlYXJjaCBJU0EN
Cj4gdW5kZXINCj4gPiBlYWNoIFBDSSBjb250cm9sbGVyLg0KPiANCj4gVGhlIHJlc3VsdCBpcyB0
aGUgc2FtZSAtLSAiZG9lcyB0aGlzIFBDSSBjb250cm9sbGVyIGhhdmUgYW4gSVNBIG5vZGUNCj4g
dW5kZXIgaXQ/Ig0KPiANCj4gLVNjb3R0DQoNCg0KVGhlIHJlc3VsdCBpcyB0aGUgc2FtZSBidXQg
YXMgSSBzYWlkIGluIHBsYXRmb3JtIGRyaXZlciBwcm9iZSBmdW5jdGlvbiB3aWxsDQpiZSBjYWxs
ZWQgZm9yIGVhY2ggUENJIGNvbnRyb2xsZXIuIFdlIGRvbid0IHdhbnQgSVNBIGlzIHNlYXJjaGVk
IGZvciBtb3JlDQp0aGFuIG9uY2UuIEFsc28gcGxlYXNlIHJlZmVyIHRvIFYzIG9mIHRoaXMgcGF0
Y2ggc2V0IGluIHdoaWNoIEkgcmViYXNlIHRoZW0NCm9uIGxhdGVzdCB0cmVlLiBJIG1hZGUgYSBu
b24tcmVjdXJzaXZlIHZlcnNpb24gb2YgZnVuY3Rpb24gdG8gc2VhcmNoIGZvcg0KSVNBIHVuZGVy
IFBDSSBub2Rlcy4NCg0KLUhvbmd0YW8uDQo=
^ permalink raw reply
* Re: [PATCH v8 0/7] power management patch set
From: Scott Wood @ 2012-07-27 1:43 UTC (permalink / raw)
To: Li Yang; +Cc: linux-kernel, linuxppc-dev, Zhao Chenhui
In-Reply-To: <CADRPPNSw5Yn7EgHt5fm2vYr+zxC4T+JbsvT812u2JPKELNcA6g@mail.gmail.com>
On 07/26/2012 09:02 AM, Li Yang wrote:
> On Fri, Jul 20, 2012 at 8:42 PM, Zhao Chenhui
> <chenhui.zhao@freescale.com> wrote:
>> Changes for v8:
>> * Separated the cpu hotplug patch into three patches, as follows
>> [PATCH v8 1/7] powerpc/smp: use a struct epapr_spin_table to replace macros
>> [PATCH v8 2/7] powerpc/smp: add generic_set_cpu_up() to set cpu_state as CPU_UP_PREPARE
>> [PATCH v8 4/7] powerpc/85xx: add HOTPLUG_CPU support
>>
>> * Replaced magic numbers with macros in "[PATCH 5/7] powerpc/85xx: add sleep and deep sleep support"
>>
>> * no change to the rest of the patch set
>
> Hi Kumar,
>
> How about picking about this series for 3.6? The review seems to
> settle down for this revision.
>
>
> Hi Scott,
>
> Thanks for the review comments provided. We'd like to get the ACK
> from you for the series if you can.
I ACKed v7; I assume v8 hasn't made anything worse. :-)
I think it's time to merge this, and deal with any issues as they come up.
-Scott
^ permalink raw reply
* Re: [PATCH 3/6] powerpc/fsl-pci: Determine primary bus by looking for ISA node
From: Scott Wood @ 2012-07-27 1:34 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A27C7D@039-SN1MPN1-002.039d.mgd.msft.net>
On 07/25/2012 09:20 PM, Jia Hongtao-B38951 wrote:
> All this recursion thing I will try another way.
>
> But this is not the same as you did. If we use platform driver probe function
> will be called more than once. Your function is to find ISA node and check if
> the parent equal to this PCI controller. My function is to search ISA under
> each PCI controller.
The result is the same -- "does this PCI controller have an ISA node
under it?"
-Scott
^ permalink raw reply
* Re: [PATCH] powerpc: Give hypervisor decrementer interrupts their own handler
From: Benjamin Herrenschmidt @ 2012-07-27 0:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20120726235611.GA16566@bloggs.ozlabs.ibm.com>
On Fri, 2012-07-27 at 09:56 +1000, Paul Mackerras wrote:
> At the moment the handler for hypervisor decrementer interrupts is
> the same as for decrementer interrupts, i.e. timer_interrupt().
> This is bogus; if we ever do get a hypervisor decrementer interrupt
> it won't have anything to do with the next timer event. In fact
> the only time we get hypervisor decrementer interrupts is when one
> is left pending on exit from a KVM guest.
>
> When we get a hypervisor decrementer interrupt we don't need to do
> anything special to clear it, since they are edge-triggered on the
> transition of HDEC from 0 to -1. Thus this adds an empty handler
> function for them. We don't need to have them masked when interrupts
> are soft-disabled, so we use STD_EXCEPTION_HV instead of
> MASKABLE_EXCEPTION_HV.
>
> Signed-off-by: Paul Mackerras <paulus@samba.org>
I assume this should go in now and -stable ?
Cheers,
Ben.
> ---
> arch/powerpc/kernel/exceptions-64s.S | 3 ++-
> arch/powerpc/kernel/time.c | 9 +++++++++
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
> index 925bd6d..5b64eb2 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -188,7 +188,7 @@ hardware_interrupt_hv:
> KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
>
> MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
> - MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
> + STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
>
> STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
> KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
> @@ -489,6 +489,7 @@ machine_check_common:
>
> STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
> STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
> + STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
> STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
> STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
> STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
> index be171ee..e49e931 100644
> --- a/arch/powerpc/kernel/time.c
> +++ b/arch/powerpc/kernel/time.c
> @@ -535,6 +535,15 @@ void timer_interrupt(struct pt_regs * regs)
> trace_timer_interrupt_exit(regs);
> }
>
> +/*
> + * Hypervisor decrementer interrupts shouldn't occur but are sometimes
> + * left pending on exit from a KVM guest. We don't need to do anything
> + * to clear them, as they are edge-triggered.
> + */
> +void hdec_interrupt(struct pt_regs *regs)
> +{
> +}
> +
> #ifdef CONFIG_SUSPEND
> static void generic_suspend_disable_irqs(void)
> {
^ permalink raw reply
* Re: [PATCH] powerpc: powernv: Always go into nap mode when CPU is offline
From: Benjamin Herrenschmidt @ 2012-07-27 0:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Alexander Graf
In-Reply-To: <20120726235347.GA16461@bloggs.ozlabs.ibm.com>
On Fri, 2012-07-27 at 09:53 +1000, Paul Mackerras wrote:
> The CPU hotplug code for the powernv platform currently only puts
> offline CPUs into nap mode if the powersave_nap variable is set.
> However, HV-style KVM on this platform requires secondary CPU threads
> to be offline and in nap mode. Since we know nap mode works just
> fine on all POWER7 machines, and the only machines that support the
> powernv platform are POWER7 machines, this changes the code to
> always put offline CPUs into nap mode, regardless of powersave_nap.
> Powersave_nap still controls whether or not CPUs go into nap mode
> when idle, as before.
>
> Signed-off-by: Paul Mackerras <paulus@samba.org>
I assume this should go in now and -stable ?
Cheers,
Ben.
> ---
> arch/powerpc/include/asm/processor.h | 1 +
> arch/powerpc/kernel/idle_power7.S | 2 ++
> arch/powerpc/platforms/powernv/smp.c | 10 +---------
> 3 files changed, 4 insertions(+), 9 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
> index 2a25ab0..42d3869 100644
> --- a/arch/powerpc/include/asm/processor.h
> +++ b/arch/powerpc/include/asm/processor.h
> @@ -390,6 +390,7 @@ enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
>
> extern int powersave_nap; /* set if nap mode can be used in idle loop */
> void cpu_idle_wait(void);
> +extern void power7_nap(void);
>
> #ifdef CONFIG_PSERIES_IDLE
> extern void update_smt_snooze_delay(int snooze);
> diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
> index 7140d83..e11863f 100644
> --- a/arch/powerpc/kernel/idle_power7.S
> +++ b/arch/powerpc/kernel/idle_power7.S
> @@ -28,7 +28,9 @@ _GLOBAL(power7_idle)
> lwz r4,ADDROFF(powersave_nap)(r3)
> cmpwi 0,r4,0
> beqlr
> + /* fall through */
>
> +_GLOBAL(power7_nap)
> /* NAP is a state loss, we create a regs frame on the
> * stack, fill it up with the state we care about and
> * stick a pointer to it in PACAR1. We really only
> diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
> index 3ef4625..7698b6e 100644
> --- a/arch/powerpc/platforms/powernv/smp.c
> +++ b/arch/powerpc/platforms/powernv/smp.c
> @@ -106,14 +106,6 @@ static void pnv_smp_cpu_kill_self(void)
> {
> unsigned int cpu;
>
> - /* If powersave_nap is enabled, use NAP mode, else just
> - * spin aimlessly
> - */
> - if (!powersave_nap) {
> - generic_mach_cpu_die();
> - return;
> - }
> -
> /* Standard hot unplug procedure */
> local_irq_disable();
> idle_task_exit();
> @@ -128,7 +120,7 @@ static void pnv_smp_cpu_kill_self(void)
> */
> mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
> while (!generic_check_cpu_restart(cpu)) {
> - power7_idle();
> + power7_nap();
> if (!generic_check_cpu_restart(cpu)) {
> DBG("CPU%d Unexpected exit while offline !\n", cpu);
> /* We may be getting an IPI, so we re-enable
^ permalink raw reply
* [PATCH] powerpc: Give hypervisor decrementer interrupts their own handler
From: Paul Mackerras @ 2012-07-26 23:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, linuxppc-dev
At the moment the handler for hypervisor decrementer interrupts is
the same as for decrementer interrupts, i.e. timer_interrupt().
This is bogus; if we ever do get a hypervisor decrementer interrupt
it won't have anything to do with the next timer event. In fact
the only time we get hypervisor decrementer interrupts is when one
is left pending on exit from a KVM guest.
When we get a hypervisor decrementer interrupt we don't need to do
anything special to clear it, since they are edge-triggered on the
transition of HDEC from 0 to -1. Thus this adds an empty handler
function for them. We don't need to have them masked when interrupts
are soft-disabled, so we use STD_EXCEPTION_HV instead of
MASKABLE_EXCEPTION_HV.
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
arch/powerpc/kernel/exceptions-64s.S | 3 ++-
arch/powerpc/kernel/time.c | 9 +++++++++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 925bd6d..5b64eb2 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -188,7 +188,7 @@ hardware_interrupt_hv:
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
- MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
+ STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
@@ -489,6 +489,7 @@ machine_check_common:
STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
+ STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index be171ee..e49e931 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -535,6 +535,15 @@ void timer_interrupt(struct pt_regs * regs)
trace_timer_interrupt_exit(regs);
}
+/*
+ * Hypervisor decrementer interrupts shouldn't occur but are sometimes
+ * left pending on exit from a KVM guest. We don't need to do anything
+ * to clear them, as they are edge-triggered.
+ */
+void hdec_interrupt(struct pt_regs *regs)
+{
+}
+
#ifdef CONFIG_SUSPEND
static void generic_suspend_disable_irqs(void)
{
--
1.7.10.rc3.219.g53414
^ permalink raw reply related
* [PATCH] powerpc: powernv: Always go into nap mode when CPU is offline
From: Paul Mackerras @ 2012-07-26 23:53 UTC (permalink / raw)
To: Benjamin Herrenschmidt, linuxppc-dev; +Cc: Alexander Graf
The CPU hotplug code for the powernv platform currently only puts
offline CPUs into nap mode if the powersave_nap variable is set.
However, HV-style KVM on this platform requires secondary CPU threads
to be offline and in nap mode. Since we know nap mode works just
fine on all POWER7 machines, and the only machines that support the
powernv platform are POWER7 machines, this changes the code to
always put offline CPUs into nap mode, regardless of powersave_nap.
Powersave_nap still controls whether or not CPUs go into nap mode
when idle, as before.
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
arch/powerpc/include/asm/processor.h | 1 +
arch/powerpc/kernel/idle_power7.S | 2 ++
arch/powerpc/platforms/powernv/smp.c | 10 +---------
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 2a25ab0..42d3869 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -390,6 +390,7 @@ enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
extern int powersave_nap; /* set if nap mode can be used in idle loop */
void cpu_idle_wait(void);
+extern void power7_nap(void);
#ifdef CONFIG_PSERIES_IDLE
extern void update_smt_snooze_delay(int snooze);
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index 7140d83..e11863f 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -28,7 +28,9 @@ _GLOBAL(power7_idle)
lwz r4,ADDROFF(powersave_nap)(r3)
cmpwi 0,r4,0
beqlr
+ /* fall through */
+_GLOBAL(power7_nap)
/* NAP is a state loss, we create a regs frame on the
* stack, fill it up with the state we care about and
* stick a pointer to it in PACAR1. We really only
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 3ef4625..7698b6e 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -106,14 +106,6 @@ static void pnv_smp_cpu_kill_self(void)
{
unsigned int cpu;
- /* If powersave_nap is enabled, use NAP mode, else just
- * spin aimlessly
- */
- if (!powersave_nap) {
- generic_mach_cpu_die();
- return;
- }
-
/* Standard hot unplug procedure */
local_irq_disable();
idle_task_exit();
@@ -128,7 +120,7 @@ static void pnv_smp_cpu_kill_self(void)
*/
mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
while (!generic_check_cpu_restart(cpu)) {
- power7_idle();
+ power7_nap();
if (!generic_check_cpu_restart(cpu)) {
DBG("CPU%d Unexpected exit while offline !\n", cpu);
/* We may be getting an IPI, so we re-enable
--
1.7.10.rc3.219.g53414
^ permalink raw reply related
* Re: [2/3][PATCH][upstream] TDM Framework
From: Scott Wood @ 2012-07-26 22:09 UTC (permalink / raw)
To: Timur Tabi
Cc: Aggrwal Poonam-B10812, linuxppc-dev@lists.ozlabs.org,
Singh Sandeep-B37400
In-Reply-To: <5011B673.4030802@freescale.com>
On 07/26/2012 04:28 PM, Timur Tabi wrote:
> Michael Ellerman wrote:
>> And the bible, K & R, includes an example of an enum which explicitly
>> specifies all its values. It goes on to say "enumeration variables offer
>> the chance of [type] checking and so are often better than #defines".
>
> I don't want to beat a dead horse here, but if the driver doesn't do enum
> type checking, then it's hard to justify using an enum.
Enum symbols show up in a debugger, which is nice. Why use the
preprocessor for something that can be just as well expressed in the
language itself? The only real argument for #define in this case is
style, which in Linux does tend toward favoring #define.
-Scott
^ permalink raw reply
* Re: [2/3][PATCH][upstream] TDM Framework
From: Timur Tabi @ 2012-07-26 21:28 UTC (permalink / raw)
To: Michael Ellerman
Cc: Aggrwal Poonam-B10812, linuxppc-dev@lists.ozlabs.org,
Singh Sandeep-B37400
In-Reply-To: <1343193511.2218.10.camel@concordia>
Michael Ellerman wrote:
> And the bible, K & R, includes an example of an enum which explicitly
> specifies all its values. It goes on to say "enumeration variables offer
> the chance of [type] checking and so are often better than #defines".
I don't want to beat a dead horse here, but if the driver doesn't do enum
type checking, then it's hard to justify using an enum. Now you said,
"Yes, if you're going to define an enum you should use it, which this
patch doesn't, but that's just a bug in this patch." It could be argued
that there's no real place to incorporate enum type checking in this code.
IMHO, this is pointless:
enum mytype {
VALUE1 = 0x10,
VALUE2 = 0x20
};
int func(void)
{
if (some-condition)
return VALUE1;
else
return VALUE2;
}
> And the bible, K & R, includes an example of an enum which explicitly
> specifies all its values.
First, K&R is pretty old, and there are a lot of style issues in it that
are no longer in favor. I don't think anyone would advocate this:
int func(x, y)
int x;
int y;
{
...
}
Secondly, one of the benefits of an enum (which again, is not actually
being used in this patch), is to be able to specify multiple constants
that are given unique values, but you don't actually care what the values
are, like this:
enum radeon_family {
CHIP_FAMILY_UNKNOW,
CHIP_FAMILY_LEGACY,
CHIP_FAMILY_RADEON,
CHIP_FAMILY_RV100,
CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
CHIP_FAMILY_RV200,
...
};
The code will still work if I swap CHIP_FAMILY_RV100 with
CHIP_FAMILY_RS100. As long as each value is unique, everything works.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: introduce support for the Freescale / iVeia P1022RDK
From: Kumar Gala @ 2012-07-26 18:54 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1343085149-29048-1-git-send-email-timur@freescale.com>
On Jul 23, 2012, at 6:12 PM, Timur Tabi wrote:
> The Freescale / iVeia P1022RDK reference board is a small-factor board
> with a Freescale P1022 SOC. It includes:
>=20
> 1) 512 MB 64-bit DDR3-800 (max) memory
> 2) 8MB SPI serial flash memory for boot loader
> 3) Bootable 4-bit SD/MMC port
> 4) Two 10/100/1000 Ethernet connectors
> 5) One SATA port
> 6) Two USB ports
> 7) One PCIe x4 slot
> 8) DVI video connector
> 9) Audio input and output jacks, powered by a Wolfson WM8960 codec.
>=20
> Unlike the P1022DS, the P1022RDK does not have any localbus devices,
> presumably because of the localbus / DIU multiplexing restriction of
> the P1022 SOC.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/p1022rdk.dts | 188 =
+++++++++++++++++++++++++++
> arch/powerpc/configs/mpc85xx_defconfig | 1 +
> arch/powerpc/configs/mpc85xx_smp_defconfig | 1 +
> arch/powerpc/platforms/85xx/Kconfig | 7 +
> arch/powerpc/platforms/85xx/Makefile | 1 +
> arch/powerpc/platforms/85xx/p1022_rdk.c | 195 =
++++++++++++++++++++++++++++
> 6 files changed, 393 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p1022rdk.dts
> create mode 100644 arch/powerpc/platforms/85xx/p1022_rdk.c
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 3/3] [v4] powerpc/p5040ds: Add support for P5040DS board
From: Kumar Gala @ 2012-07-26 18:54 UTC (permalink / raw)
To: Timur Tabi; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <1343315334-800-3-git-send-email-timur@freescale.com>
On Jul 26, 2012, at 10:08 AM, Timur Tabi wrote:
> Add support for the Freescale P5040DS Reference Board ("Superhydra"), =
which
> is similar to the P5020DS. Features of the P5040 are listed below, =
but
> not all of these features (e.g. DPAA networking) are currently =
supported.
>=20
> Four P5040 single-threaded e5500 cores built
> Up to 2.4 GHz with 64-bit ISA support
> Three levels of instruction: user, supervisor, hypervisor
> CoreNet platform cache (CPC)
> 2.0 MB configures as dual 1 MB blocks hierarchical interconnect =
fabric
> Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving =
support
> Up to 1600MT/s
> Memory pre-fetch engine
> DPAA incorporating acceleration for the following functions
> Packet parsing, classification, and distribution (FMAN)
> Queue management for scheduling, packet sequencing and
> congestion management (QMAN)
> Hardware buffer management for buffer allocation and
> de-allocation (BMAN)
> Cryptography acceleration (SEC 5.0) at up to 40 Gbps
> SerDes
> 20 lanes at up to 5 Gbps
> Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA
> Ethernet interfaces
> Two 10 Gbps Ethernet MACs
> Ten 1 Gbps Ethernet MACs
> High-speed peripheral interfaces
> Two PCI Express 2.0/3.0 controllers
> Additional peripheral interfaces
> Two serial ATA (SATA 2.0) controllers
> Two high-speed USB 2.0 controllers with integrated PHY
> Enhanced secure digital host controller (SD/MMC/eMMC)
> Enhanced serial peripheral interface (eSPI)
> Two I2C controllers
> Four UARTs
> Integrated flash controller supporting NAND and NOR flash
> DMA
> Dual four channel
> Support for hardware virtualization and partitioning enforcement
> Extra privileged level for hypervisor support
> QorIQ Trust Architecture 1.1
> Secure boot, secure debug, tamper detection, volatile key storage
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/p5040ds.dts | 203 =
++++++++++++++++++++++++++
> arch/powerpc/configs/corenet32_smp_defconfig | 1 +
> arch/powerpc/configs/corenet64_smp_defconfig | 1 +
> arch/powerpc/platforms/85xx/Kconfig | 14 ++
> arch/powerpc/platforms/85xx/Makefile | 1 +
> arch/powerpc/platforms/85xx/corenet_ds.c | 10 +-
> arch/powerpc/platforms/85xx/p5040_ds.c | 89 +++++++++++
> 7 files changed, 318 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p5040ds.dts
> create mode 100644 arch/powerpc/platforms/85xx/p5040_ds.c
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 2/3] [v2] powerpc/85xx: add Freescale P5040 SOC and SEC v5.2 device trees
From: Kumar Gala @ 2012-07-26 18:54 UTC (permalink / raw)
To: Timur Tabi; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <1343315334-800-2-git-send-email-timur@freescale.com>
On Jul 26, 2012, at 10:08 AM, Timur Tabi wrote:
> From: Kim Phillips <kim.phillips@freescale.com>
>=20
> Add device tree (dtsi) files for the Freescale P5040 SOC. Since this
> SOC introduces SEC v5.2, add the dtsi file for that also.
>=20
> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 320 =
+++++++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi | 111 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi | 118 +++++++++
> 3 files changed, 549 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
> create mode 100644 arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
> create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 1/3] powerpc/fsl-pci: add fsl, qoriq-pcie-v2.4 compatible string
From: Kumar Gala @ 2012-07-26 18:54 UTC (permalink / raw)
To: Timur Tabi; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <1343315334-800-1-git-send-email-timur@freescale.com>
On Jul 26, 2012, at 10:08 AM, Timur Tabi wrote:
> The PCI controller on the Freescale P5040 is v2.4.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH] powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabled
From: Kumar Gala @ 2012-07-26 18:53 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1343076212-5236-1-git-send-email-timur@freescale.com>
On Jul 23, 2012, at 3:43 PM, Timur Tabi wrote:
> In order for indirect mode on the PIXIS to work properly, both chip =
selects
> need to be set to GPCM mode, otherwise writes to the chip select base
> addresses will not actually post to the local bus -- they'll go to the
> NAND controller instead. Therefore, we need to set BR0 and BR1 to =
GPCM
> mode before switching to indirect mode.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c | 64 =
+++++++++++++++++++++++++++++++-
> 1 files changed, 62 insertions(+), 2 deletions(-)
applied to merge
- k=
^ permalink raw reply
* Re: [PATCH][v1] powerpc/85xx: Fix sram_offset parameter type
From: Kumar Gala @ 2012-07-26 18:53 UTC (permalink / raw)
To: Claudiu Manoil; +Cc: Tang Yuantian, linuxppc-dev
In-Reply-To: <1343314075-2127-1-git-send-email-claudiu.manoil@freescale.com>
On Jul 26, 2012, at 9:47 AM, Claudiu Manoil wrote:
> The sram_offset parameter represents a physical address
> and should be of type phys_addr_t. As part of this fix,
> the extraction of sram_params is being cleaned-up and
> fixed.
> This patch fixes now the case when the offset value of
> 0xfff00000 was being rejected by the driver (returning
> -EINVAL), although this is a valid offset value.
>=20
> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
> ---
> v1: fixed copyright year format
>=20
> arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h | 4 +-
> arch/powerpc/sysdev/fsl_85xx_l2ctlr.c | 39 =
++++++++++------------------
> 2 files changed, 16 insertions(+), 27 deletions(-)
applied to merge
- k=
^ permalink raw reply
* Re: [PATCH V3 2/5] powerpc/fsl-pci: Determine primary bus by looking for ISA node
From: Kumar Gala @ 2012-07-26 18:21 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343305827-26734-2-git-send-email-B38951@freescale.com>
On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
> PCI host bridge is primary bus if it contains an ISA node. But not all =
boards
> fit this rule. Device tree should be updated for all these boards.
I don't really seen any reason for this patch. We can just use the code =
as Scott wrote it that sets fsl_pci_primary based on search for the isa =
node.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Changed for V3:
> - Using non-recursive function to find ISA under PCI
>=20
> arch/powerpc/include/asm/pci-bridge.h | 1 +
> arch/powerpc/sysdev/fsl_pci.c | 31 =
++++++++++++++++++++++++-------
> arch/powerpc/sysdev/fsl_pci.h | 12 +++++++++++-
> 3 files changed, 36 insertions(+), 8 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/pci-bridge.h =
b/arch/powerpc/include/asm/pci-bridge.h
> index ac39e6a..b48fa7f 100644
> --- a/arch/powerpc/include/asm/pci-bridge.h
> +++ b/arch/powerpc/include/asm/pci-bridge.h
> @@ -20,6 +20,7 @@ struct device_node;
> struct pci_controller {
> struct pci_bus *bus;
> char is_dynamic;
> + int is_primary;
> #ifdef CONFIG_PPC64
> int node;
> #endif
> diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c
> index 5228b6b..97557c5 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -453,6 +453,7 @@ int __init fsl_add_bridge(struct device_node *dev, =
int is_primary)
>=20
> hose->first_busno =3D bus_range ? bus_range[0] : 0x0;
> hose->last_busno =3D bus_range ? bus_range[1] : 0xff;
> + hose->is_primary =3D is_primary;
>=20
> setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
> PPC_INDIRECT_TYPE_BIG_ENDIAN);
> @@ -933,18 +934,34 @@ void pci_determine_swiotlb(void)
> }
> #endif
>=20
> -int primary_phb_addr;
> +/* Checkout if PCI contains ISA node (Only scan the children of PCI) =
*/
> +static int of_pci_has_isa(struct device_node *pci_node)
> +{
> + struct device_node *np;
> +
> + read_lock(&devtree_lock);
> + if (!pci_node)
> + return 0;
> + np =3D pci_node->allnext;
> + for (; np !=3D pci_node->sibling; np =3D np->allnext) {
> + if (np->type && (of_node_cmp(np->type, "isa") =3D=3D 0)
> + && of_node_get(np)) {
> + of_node_put(pci_node);
> + return 1;
> + }
> + }
> + of_node_put(pci_node);
> + read_unlock(&devtree_lock);
> + return 0;
> +}
> +
> static int __devinit fsl_pci_probe(struct platform_device *pdev)
> {
> - struct pci_controller *hose;
> bool is_primary;
> + is_primary =3D of_pci_has_isa(pdev->dev.of_node);
>=20
> - if (of_match_node(pci_ids, pdev->dev.of_node)) {
> - struct resource rsrc;
> - of_address_to_resource(pdev->dev.of_node, 0, &rsrc);
> - is_primary =3D ((rsrc.start & 0xfffff) =3D=3D =
primary_phb_addr);
> + if (of_match_node(pci_ids, pdev->dev.of_node))
> fsl_add_bridge(pdev->dev.of_node, is_primary);
> - }
>=20
> return 0;
> }
> diff --git a/arch/powerpc/sysdev/fsl_pci.h =
b/arch/powerpc/sysdev/fsl_pci.h
> index 095392d..c884e06 100644
> --- a/arch/powerpc/sysdev/fsl_pci.h
> +++ b/arch/powerpc/sysdev/fsl_pci.h
> @@ -88,7 +88,17 @@ struct ccsr_pci {
> __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture =
register 0 */
> };
>=20
> -extern int primary_phb_addr;
> +
> +#ifdef CONFIG_SUSPEND
> +struct fsl_pci_private_data {
> + int inbound_num;
> + struct pci_outbound_window_regs __iomem *pci_pow;
> + struct pci_inbound_window_regs __iomem *pci_piw;
> + void *saved_regs;
> +};
> +#endif
> +
This struct has nothing to do with this patch
> +extern int is_has_isa_node(struct device_node *parent);
Where is is_has_isa_node() defined or used?
> extern int fsl_add_bridge(struct device_node *dev, int is_primary);
> extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
> extern int mpc83xx_add_bridge(struct device_node *dev);
> --=20
> 1.7.5.1
>=20
^ permalink raw reply
* Re: [PATCH V3 1/5] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Kumar Gala @ 2012-07-26 18:14 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343305827-26734-1-git-send-email-B38951@freescale.com>
On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the =
fsl_pci
> to a platform driver. In previous PCI code architecture the =
initialization
> routine is called at board_setup_arch stage. Now the initialization is =
done
> in probe function which is architectural better. Also It's convenient =
for
> adding PM support for PCI controller in later patch.
>=20
> One issue introduced by this architecture is the timing of =
swiotlb_init.
> During PCI initialization the need of swiotlb is determined and this =
should
> be done before swiotlb_init. So a new function to determine swiotlb by
> parsing pci ranges is made. This function is called at =
board_setup_arch
> stage which is earlier than swiotlb_init.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Changed for V3:
> - Rebase the patch set on the latest tree
> - merge PCI unify and swiotlb patch into one
>=20
> arch/powerpc/sysdev/fsl_pci.c | 155 =
++++++++++++++++++++++++++++++++---------
> arch/powerpc/sysdev/fsl_pci.h | 9 +--
> 2 files changed, 125 insertions(+), 39 deletions(-)
I'd like the SWIOTLB refactoring as a separate patch. Additionally, the =
order of patches should be as follows:
1. refactor PCI node parsing code
2. add pci_determine_swiotlb (should rename to =
fsl_pci_determine_swiotlb)
3. Determine primary bus by looking for ISA node
4. convert all boards over to fsl_pci_init
5. convert fsl pci to platform driver (edac and other fixes should be =
merged in here)
6. PM support
- k=
^ permalink raw reply
* Re: [PATCH V3 1/5] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Kumar Gala @ 2012-07-26 17:52 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343305827-26734-1-git-send-email-B38951@freescale.com>
On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the =
fsl_pci
> to a platform driver. In previous PCI code architecture the =
initialization
> routine is called at board_setup_arch stage. Now the initialization is =
done
> in probe function which is architectural better. Also It's convenient =
for
> adding PM support for PCI controller in later patch.
>=20
> One issue introduced by this architecture is the timing of =
swiotlb_init.
> During PCI initialization the need of swiotlb is determined and this =
should
> be done before swiotlb_init. So a new function to determine swiotlb by
> parsing pci ranges is made. This function is called at =
board_setup_arch
> stage which is earlier than swiotlb_init.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Changed for V3:
> - Rebase the patch set on the latest tree
> - merge PCI unify and swiotlb patch into one
>=20
> arch/powerpc/sysdev/fsl_pci.c | 155 =
++++++++++++++++++++++++++++++++---------
> arch/powerpc/sysdev/fsl_pci.h | 9 +--
> 2 files changed, 125 insertions(+), 39 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c
> index a7b2a60..5228b6b 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -823,56 +823,143 @@ static const struct of_device_id pci_ids[] =3D =
{
> {},
> };
>=20
> -struct device_node *fsl_pci_primary;
> -
> -void __devinit fsl_pci_init(void)
> +#ifdef CONFIG_SWIOTLB
> +void pci_determine_swiotlb(void)
> {
> + const u32 *ranges;
> + int rlen;
> + int pna;
> + int np;
> struct device_node *node;
> - struct pci_controller *hose;
> - dma_addr_t max =3D 0xffffffff;
> -
> - /* Callers can specify the primary bus using other means. */
> - if (!fsl_pci_primary) {
> - /* If a PCI host bridge contains an ISA node, it's =
primary. */
> - node =3D of_find_node_by_type(NULL, "isa");
> - while ((fsl_pci_primary =3D of_get_parent(node))) {
> - of_node_put(node);
> - node =3D fsl_pci_primary;
> -
> - if (of_match_node(pci_ids, node))
> - break;
> - }
> - }
> + int memno;
> + u32 pci_space;
> + unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
> + unsigned long long pci_addr_lo =3D ULLONG_MAX;
> + unsigned long long pci_addr_hi =3D 0x0;
> + dma_addr_t pci_dma_sz;
>=20
> - node =3D NULL;
> for_each_node_by_type(node, "pci") {
> if (of_match_node(pci_ids, node)) {
> - /*
> - * If there's no PCI host bridge with ISA, =
arbitrarily
> - * designate one as primary. This can go away =
once
> - * various bugs with primary-less systems are =
fixed.
> - */
> - if (!fsl_pci_primary)
> - fsl_pci_primary =3D node;
> -
> - fsl_add_bridge(node, fsl_pci_primary =3D=3D =
node);
> - hose =3D pci_find_hose_for_OF_device(node);
> - max =3D min(max, hose->dma_window_base_cur +
> - hose->dma_window_size);
> + memno =3D 0;
> + pna =3D of_n_addr_cells(node);
> + np =3D pna + 5;
Don't duplicate code from pci_process_bridge_OF_ranges(), refactor the =
code to have a shared function:
> + /* Get ranges property */
> + ranges =3D of_get_property(node, "ranges", =
&rlen);
> + if (ranges =3D=3D NULL)
> + return;
> +
> + /* Parse outbound MEM window range */
> + while ((rlen -=3D np * 4) >=3D 0) {
> + /* Read next ranges element */
> + pci_space =3D ranges[0];
> + if (!((pci_space >> 24) & 0x2)) {
> + ranges +=3D np;
> + break;
> + }
> + pci_addr =3D of_read_number(ranges + 1, =
2);
> + cpu_addr =3D of_translate_address(
> + node, ranges + 3);
> + size =3D of_read_number(ranges + pna + =
3, 2);
> + ranges +=3D np;
> +
> + /*
> + * If we failed translation or got a =
zero-sized
> + * region (some FW try to feed us with =
non
> + * sensical zero sized regions such as =
power3
> + * which look like some kind of attempt =
at
> + * exposing the VGA memory hole)
> + */
> + if (cpu_addr =3D=3D OF_BAD_ADDR || size =
=3D=3D 0)
> + continue;
> +
> + /*
> + * Now consume following elements while =
they
> + * are contiguous
> + */
> + for (; rlen >=3D np * sizeof(u32);
> + ranges +=3D np, rlen -=3D =
np * 4) {
> + if (ranges[0] !=3D pci_space)
> + break;
> + pci_next =3D =
of_read_number(ranges + 1,
> + 2);
> + cpu_next =3D =
of_translate_address(node,
> + ranges + 3);
> + if (pci_next !=3D pci_addr + =
size ||
> + cpu_next !=3D cpu_addr + =
size)
> + break;
> + size +=3D of_read_number(
> + ranges + pna + =
3, 2);
> + }
> +
> + /* We support only 3 memory ranges */
> + if (memno >=3D 3) {
> + printk(KERN_INFO
> + " \\--> Skipped =
(too many) !\n");
> + continue;
> + }
> +
> + pci_addr_lo =3D min(pci_addr, =
pci_addr_lo);
> + pci_addr_hi =3D max(pci_addr + size, =
pci_addr_hi);
> + memno++;
> + }
> }
> }
>=20
> -#ifdef CONFIG_SWIOTLB
> + /* Get PEXCSRBAR size (equal to CCSR size) */
> + node =3D of_find_node_by_type(NULL, "soc");
> + ranges =3D of_get_property(node, "ranges", &rlen);
> + if (ranges =3D=3D NULL)
> + return;
> +
> + size =3D of_read_number(ranges + 3, 1);
> + of_node_put(node);
> +
> + if (pci_addr_hi < (0x100000000ull - size))
> + pci_dma_sz =3D pci_addr_lo;
> + else
> + pci_dma_sz =3D pci_addr_lo - size;
> +
> /*
> * if we couldn't map all of DRAM via the dma windows
> * we need SWIOTLB to handle buffers located outside of
> * dma capable memory region
> */
> - if (memblock_end_of_DRAM() - 1 > max) {
> + if (memblock_end_of_DRAM() > pci_dma_sz) {
> ppc_swiotlb_enable =3D 1;
> set_pci_dma_ops(&swiotlb_dma_ops);
> - ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> + ppc_md.pci_dma_dev_setup =3D
> + pci_dma_dev_setup_swiotlb;
why the line wrap change?
> }
> +}
> #endif
> +
> +int primary_phb_addr;
> +static int __devinit fsl_pci_probe(struct platform_device *pdev)
> +{
> + struct pci_controller *hose;
> + bool is_primary;
> +
> + if (of_match_node(pci_ids, pdev->dev.of_node)) {
> + struct resource rsrc;
> + of_address_to_resource(pdev->dev.of_node, 0, &rsrc);
> + is_primary =3D ((rsrc.start & 0xfffff) =3D=3D =
primary_phb_addr);
> + fsl_add_bridge(pdev->dev.of_node, is_primary);
> + }
> +
> + return 0;
> +}
> +
> +static struct platform_driver fsl_pci_driver =3D {
> + .driver =3D {
> + .name =3D "fsl-pci",
> + .of_match_table =3D pci_ids,
> + },
> + .probe =3D fsl_pci_probe,
> +};
> +
> +static int __init fsl_pci_init(void)
> +{
> + return platform_driver_register(&fsl_pci_driver);
> }
> +arch_initcall(fsl_pci_init);
> #endif
^ permalink raw reply
* Re: [PATCH V3 3/5] powerpc/mpc85xx: convert to unified PCI init
From: Kumar Gala @ 2012-07-26 17:47 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343305827-26734-3-git-send-email-B38951@freescale.com>
On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
> PCI initialization is now done by PCI controller driver. In =
board_setup_arch
> stage we don't need PCI init any more but swiotlb should be determined =
at this
> stage.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> We now just apply this for mpc85xx_ds and qemu
>=20
> arch/powerpc/kernel/iommu.c.rej | 22 -----------------
> arch/powerpc/platforms/85xx/common.c | 9 +++++++
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 =
+++++++----------------------
> arch/powerpc/platforms/85xx/qemu_e500.c | 5 +++-
> 4 files changed, 22 insertions(+), 52 deletions(-)
> delete mode 100644 arch/powerpc/kernel/iommu.c.rej
>=20
> diff --git a/arch/powerpc/kernel/iommu.c.rej =
b/arch/powerpc/kernel/iommu.c.rej
> deleted file mode 100644
> index 9d10d34..0000000
> --- a/arch/powerpc/kernel/iommu.c.rej
> +++ /dev/null
> @@ -1,22 +0,0 @@
> ---- arch/powerpc/kernel/iommu.c 2012-06-08 09:01:02.785709100 =
+1000
> -+++ arch/powerpc/kernel/iommu.c 2012-06-08 09:01:07.489784856 =
+1000
> -@@ -33,7 +33,9 @@
> - #include <linux/bitmap.h>
> - #include <linux/iommu-helper.h>
> - #include <linux/crash_dump.h>
> -+#include <linux/fault-inject.h>
> - #include <asm/io.h>
> -+#include <asm/vio.h>
> - #include <asm/prom.h>
> - #include <asm/iommu.h>
> - #include <asm/pci-bridge.h>
> -@@ -171,6 +261,9 @@
> - return DMA_ERROR_CODE;
> - }
> -=20
> -+ if (should_fail_iommu(dev))
> -+ return DMA_ERROR_CODE;
> -+
> - if (handle && *handle)
> - start =3D *handle;
> - else
> diff --git a/arch/powerpc/platforms/85xx/common.c =
b/arch/powerpc/platforms/85xx/common.c
> index 67dac22..303fedb 100644
> --- a/arch/powerpc/platforms/85xx/common.c
> +++ b/arch/powerpc/platforms/85xx/common.c
> @@ -27,6 +27,15 @@ static struct of_device_id __initdata =
mpc85xx_common_ids[] =3D {
> { .compatible =3D "fsl,mpc8548-guts", },
> /* Probably unnecessary? */
> { .compatible =3D "gpio-leds", },
> + /* For all PCI controllers */
> + { .compatible =3D "fsl,mpc8540-pci", },
> + { .compatible =3D "fsl,mpc8548-pcie", },
> + { .compatible =3D "fsl,p1022-pcie", },
> + { .compatible =3D "fsl,p1010-pcie", },
> + { .compatible =3D "fsl,p1023-pcie", },
> + { .compatible =3D "fsl,p4080-pcie", },
Add:
{ .compatible =3D "fsl,qoriq-pcie-v2.4", },
> + { .compatible =3D "fsl,qoriq-pcie-v2.3", },
> + { .compatible =3D "fsl,qoriq-pcie-v2.2", },
> {},
> };
- k=
^ permalink raw reply
* Re: [PATCH V3 3/5] powerpc/mpc85xx: convert to unified PCI init
From: Kumar Gala @ 2012-07-26 17:46 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343305827-26734-3-git-send-email-B38951@freescale.com>
On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:
> PCI initialization is now done by PCI controller driver. In =
board_setup_arch
> stage we don't need PCI init any more but swiotlb should be determined =
at this
> stage.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> We now just apply this for mpc85xx_ds and qemu
>=20
> arch/powerpc/kernel/iommu.c.rej | 22 -----------------
> arch/powerpc/platforms/85xx/common.c | 9 +++++++
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 =
+++++++----------------------
> arch/powerpc/platforms/85xx/qemu_e500.c | 5 +++-
> 4 files changed, 22 insertions(+), 52 deletions(-)
> delete mode 100644 arch/powerpc/kernel/iommu.c.rej
removal of iommu.c.rej is handled by:
commit 668fcb6972177489bdc01a66d697c3b494aa8a24
Author: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Mon Jul 23 09:38:53 2012 +1000
Remove stale .rej file
- k=
^ permalink raw reply
* Re: [PATCH v8 0/7] power management patch set
From: Kumar Gala @ 2012-07-26 17:29 UTC (permalink / raw)
To: Li Yang; +Cc: scottwood, linuxppc-dev, Zhao Chenhui, linux-kernel
In-Reply-To: <CADRPPNSw5Yn7EgHt5fm2vYr+zxC4T+JbsvT812u2JPKELNcA6g@mail.gmail.com>
On Jul 26, 2012, at 9:02 AM, Li Yang wrote:
> On Fri, Jul 20, 2012 at 8:42 PM, Zhao Chenhui
> <chenhui.zhao@freescale.com> wrote:
>> Changes for v8:
>> * Separated the cpu hotplug patch into three patches, as follows
>> [PATCH v8 1/7] powerpc/smp: use a struct epapr_spin_table to replace =
macros
>> [PATCH v8 2/7] powerpc/smp: add generic_set_cpu_up() to set cpu_state =
as CPU_UP_PREPARE
>> [PATCH v8 4/7] powerpc/85xx: add HOTPLUG_CPU support
>>=20
>> * Replaced magic numbers with macros in "[PATCH 5/7] powerpc/85xx: =
add sleep and deep sleep support"
>>=20
>> * no change to the rest of the patch set
>=20
> Hi Kumar,
>=20
> How about picking about this series for 3.6? The review seems to
> settle down for this revision.
Its too late for 3.6, but will look at queuing it up for 3.7.
> Hi Scott,
>=20
> Thanks for the review comments provided. We'd like to get the ACK
> from you for the series if you can.
>=20
> Regards,
> Leo
- k=
^ permalink raw reply
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