* Re: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM support
From: Li Yang @ 2012-08-09 5:05 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A51DA2@039-SN1MPN1-002.039d.mgd.msft.net>
On Thu, Aug 9, 2012 at 10:52 AM, Jia Hongtao-B38951
<B38951@freescale.com> wrote:
>
>
>> -----Original Message-----
>> From: Linuxppc-dev [mailto:linuxppc-dev-
>> bounces+b38951=freescale.com@lists.ozlabs.org] On Behalf Of Kumar Gala
>> Sent: Wednesday, August 08, 2012 8:47 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472
>> Subject: Re: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM
>> support
>>
>> >>>>>>
>> >>>>>> On Jul 24, 2012, at 5:20 AM, Jia Hongtao wrote:
>> >>>>>>
>> >>>>>>> Power supply for PCI inbound/outbound window registers is off
>> >>>>>>> when
>> >>>>>> system
>> >>>>>>> go to deep-sleep state. We save the values of registers before
>> >>>>>>> suspend and restore to registers after resume.
>> >>>>>>>
>> >>>>>>> Signed-off-by: Jiang Yutang <b14898@freescale.com>
>> >>>>>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
>> >>>>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>> >>>>>>> ---
>> >>>>>>> arch/powerpc/include/asm/pci-bridge.h | 2 +-
>> >>>>>>> arch/powerpc/sysdev/fsl_pci.c | 121
>> >>>>>> +++++++++++++++++++++++++++++++++
>> >>>>>>> 2 files changed, 122 insertions(+), 1 deletions(-)
>> >>>>>>
>> >>>>>> Remind me why we need to save/restore PCI ATMUs, why not just
>> >>>>>> re-parse the device tree to restore?
>> >>>>>>
>> >>>>>> - k
>> >>>>>
>> >>>>> Save/restore is the more efficient way. Latency of sleep/wakeup is
>> >>>>> one of most important features in power management.
>> >>>>>
>> >>>>> -Hongtao.
>> >>>>
>> >>>> I don't think the time it takes to run through setup_pci_atmu() is
>> >>>> that long compared to fsl_pci_resume().
>> >>>>
>> >>>> Also, don't you need to setup PCICCSRBAR and do setup_pci_cmd() on
>> >> resume?
>> >>>>
>> >>>> - k
>> >>>
>> >>> Hi Kumar,
>> >>> I did some tests on P1022DS and found out that PCI_CMD and PCICSRBAR
>> >>> is not lost when system in deep sleep. We don't need to save it.
>> >>
>> >> How does the PCI code know you're entering deep sleep and not
>> hibernation?
>> >>
>> >> -Scott
>> >
>> > When system come back from hibernation PCI will be initialized again.
>> > So no need to save PCI_CMD and PEXCSRBAR.
>> >
>> > -Hongtao.
>> >
>>
>> What do you mean PCI will be initialized again? What code path are you
>> talking about that would set PCI_CMD & PEXCSRBAR?
>>
>> - k
>
>
> In hibernation mode:
>
> When system come back from hibernation kernel will start up again.
> Before loading hibernation image PCI initialization has already done.
> Some other hardware also re-init again.
In current Linux implementation, restoring from hibernation image is
using late initcall. By that time, all the platform devices are
already initialized like a fresh boot.
- Leo
^ permalink raw reply
* RE: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-08-09 3:52 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50228B8A.7010008@freescale.com>
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^ permalink raw reply
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-08-09 3:48 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50228D8B.3040204@freescale.com>
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^ permalink raw reply
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-08-09 3:48 UTC (permalink / raw)
To: Wood Scott-B07421
Cc: Gala Kumar-B11780, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50228CA5.801@freescale.com>
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^ permalink raw reply
* RE: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM support
From: Jia Hongtao-B38951 @ 2012-08-09 2:52 UTC (permalink / raw)
To: Kumar Gala
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <1C95474C-B59D-4635-8FA9-B76165E177CD@kernel.crashing.org>
> -----Original Message-----
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+b38951=3Dfreescale.com@lists.ozlabs.org] On Behalf Of Kumar Gala
> Sent: Wednesday, August 08, 2012 8:47 PM
> To: Jia Hongtao-B38951
> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472
> Subject: Re: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM
> support
>=20
> >>>>>>
> >>>>>> On Jul 24, 2012, at 5:20 AM, Jia Hongtao wrote:
> >>>>>>
> >>>>>>> Power supply for PCI inbound/outbound window registers is off
> >>>>>>> when
> >>>>>> system
> >>>>>>> go to deep-sleep state. We save the values of registers before
> >>>>>>> suspend and restore to registers after resume.
> >>>>>>>
> >>>>>>> Signed-off-by: Jiang Yutang <b14898@freescale.com>
> >>>>>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> >>>>>>> Signed-off-by: Li Yang <leoli@freescale.com>
> >>>>>>> ---
> >>>>>>> arch/powerpc/include/asm/pci-bridge.h | 2 +-
> >>>>>>> arch/powerpc/sysdev/fsl_pci.c | 121
> >>>>>> +++++++++++++++++++++++++++++++++
> >>>>>>> 2 files changed, 122 insertions(+), 1 deletions(-)
> >>>>>>
> >>>>>> Remind me why we need to save/restore PCI ATMUs, why not just
> >>>>>> re-parse the device tree to restore?
> >>>>>>
> >>>>>> - k
> >>>>>
> >>>>> Save/restore is the more efficient way. Latency of sleep/wakeup is
> >>>>> one of most important features in power management.
> >>>>>
> >>>>> -Hongtao.
> >>>>
> >>>> I don't think the time it takes to run through setup_pci_atmu() is
> >>>> that long compared to fsl_pci_resume().
> >>>>
> >>>> Also, don't you need to setup PCICCSRBAR and do setup_pci_cmd() on
> >> resume?
> >>>>
> >>>> - k
> >>>
> >>> Hi Kumar,
> >>> I did some tests on P1022DS and found out that PCI_CMD and PCICSRBAR
> >>> is not lost when system in deep sleep. We don't need to save it.
> >>
> >> How does the PCI code know you're entering deep sleep and not
> hibernation?
> >>
> >> -Scott
> >
> > When system come back from hibernation PCI will be initialized again.
> > So no need to save PCI_CMD and PEXCSRBAR.
> >
> > -Hongtao.
> >
>=20
> What do you mean PCI will be initialized again? What code path are you
> talking about that would set PCI_CMD & PEXCSRBAR?
>=20
> - k
In hibernation mode:
When system come back from hibernation kernel will start up again.
Before loading hibernation image PCI initialization has already done.
Some other hardware also re-init again.
-Hongtao.
^ permalink raw reply
* Re: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM support
From: Scott Wood @ 2012-08-08 21:04 UTC (permalink / raw)
To: Kumar Gala
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472,
Jia Hongtao-B38951
In-Reply-To: <1C95474C-B59D-4635-8FA9-B76165E177CD@kernel.crashing.org>
On 08/08/2012 07:46 AM, Kumar Gala wrote:
>>>>>>>
>>>>>>> On Jul 24, 2012, at 5:20 AM, Jia Hongtao wrote:
>>>>>>>
>>>>>>>> Power supply for PCI inbound/outbound window registers is off when
>>>>>>> system
>>>>>>>> go to deep-sleep state. We save the values of registers before
>>>>>>>> suspend and restore to registers after resume.
>>>>>>>>
>>>>>>>> Signed-off-by: Jiang Yutang <b14898@freescale.com>
>>>>>>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
>>>>>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>>>>>>> ---
>>>>>>>> arch/powerpc/include/asm/pci-bridge.h | 2 +-
>>>>>>>> arch/powerpc/sysdev/fsl_pci.c | 121
>>>>>>> +++++++++++++++++++++++++++++++++
>>>>>>>> 2 files changed, 122 insertions(+), 1 deletions(-)
>>>>>>>
>>>>>>> Remind me why we need to save/restore PCI ATMUs, why not just
>>>>>>> re-parse the device tree to restore?
>>>>>>>
>>>>>>> - k
>>>>>>
>>>>>> Save/restore is the more efficient way. Latency of sleep/wakeup is
>>>>>> one of most important features in power management.
>>>>>>
>>>>>> -Hongtao.
>>>>>
>>>>> I don't think the time it takes to run through setup_pci_atmu() is
>>>>> that long compared to fsl_pci_resume().
>>>>>
>>>>> Also, don't you need to setup PCICCSRBAR and do setup_pci_cmd() on
>>> resume?
>>>>>
>>>>> - k
>>>>
>>>> Hi Kumar,
>>>> I did some tests on P1022DS and found out that PCI_CMD and PCICSRBAR
>>>> is not lost when system in deep sleep. We don't need to save it.
How do you know you're not just getting lucky? Maybe it only survives
deep sleep up to a certain duration, or under other specific circumstances.
Can you find anywhere that documents what state will be retained during
deep sleep, or ask an appropriate hardware designer?
-Scott
^ permalink raw reply
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Gala Kumar-B11780 @ 2012-08-08 19:04 UTC (permalink / raw)
To: Wood Scott-B07421
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472,
Jia Hongtao-B38951
In-Reply-To: <50228CA5.801@freescale.com>
>>>>>>> As I explained before, this has to be done globally, not from the
>>>>>>> probe function, so we can assign a default primary bus if there
>>> isn't any ISA.
>>>>>>> There are bugs in the Linux PPC PCI code relating to not having
>>>>>>> any primary bus.
>>>>>>>=20
>>>>>>> -Scott
>>>>>>=20
>>>>>> In my way of searching ISA you can also assign a default primary bus
>>>>>> in board specific files.
>>>>>=20
>>>>> That was meant for when the board file had an alternate way of
>>>>> searching for the primary bus (e.g. look for i8259), not as a
>>>>> replacement for the mechanism that guarantees there's a primary bus.
>>>>>=20
>>>>> You are causing a regression in the qemu_e500.c platform.
>>>>=20
>>>> Can we fix the qemu device tree to address the problem if we do make
>>>> it a rule to use the ISA node to indicate the primary bus?
>>>=20
>>> No. There is no ISA, and we're not going to lie and say there is.
>>=20
>> But we can assign a default primary for qemu.
>=20
> Not in the device tree. What other mechanism do you propose? And why
> do you want to fix it only for QEMU and not other boards, where things
> happen to work but not as designed?
>=20
> Kumar, can you speak up here as maintainer so we can stop going back and
> forth endlessly?
I'd rather we stick with the code that works for this purpose at this point=
. That would be Scott's current upstream code. Lets get the other aspects=
of this patchset closed (SWIOTLB, conversion to platform driver, PM, etc.)=
. The primary bus code Scott wrote does NOT need to change at this point.
- k=
^ permalink raw reply
* Re: [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary
From: Kumar Gala @ 2012-08-08 19:03 UTC (permalink / raw)
To: Josh Boyer, Tony Breeds
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org list,
Jia Hongtao
In-Reply-To: <1343988851-884-3-git-send-email-B38951@freescale.com>
On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote:
> Remove the dependency on PCI initialization for SWIOTLB =
initialization.
> So that PCI can be initialized at proper time.
>=20
> SWIOTLB is partly determined by PCI inbound/outbound map which is =
assigned
> in PCI initialization. But swiotlb_init() should be done at the stage =
of
> mem_init() which is much earlier than PCI initialization. So we =
reserve the
> memory for SWIOTLB first and free it if not necessary.
>=20
> All boards are converted to fit this change.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/include/asm/swiotlb.h | 6 ++++++
> arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++
> arch/powerpc/mm/mem.c | 3 +--
> arch/powerpc/platforms/44x/currituck.c | 10 ++--------
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 +
> arch/powerpc/platforms/85xx/qemu_e500.c | 1 +
> arch/powerpc/sysdev/fsl_pci.c | 5 +----
> 7 files changed, 32 insertions(+), 14 deletions(-)
Josh, Tony
Can you ack the 44x/currituck.c change.
thanks
- k
>=20
> diff --git a/arch/powerpc/include/asm/swiotlb.h =
b/arch/powerpc/include/asm/swiotlb.h
> index 8979d4c..de99d6e 100644
> --- a/arch/powerpc/include/asm/swiotlb.h
> +++ b/arch/powerpc/include/asm/swiotlb.h
> @@ -22,4 +22,10 @@ int __init swiotlb_setup_bus_notifier(void);
>=20
> extern void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev);
>=20
> +#ifdef CONFIG_SWIOTLB
> +void swiotlb_detect_4g(void);
> +#else
> +static inline void swiotlb_detect_4g(void) {}
> +#endif
> +
> #endif /* __ASM_SWIOTLB_H */
> diff --git a/arch/powerpc/kernel/dma-swiotlb.c =
b/arch/powerpc/kernel/dma-swiotlb.c
> index 4ab88da..aa85550 100644
> --- a/arch/powerpc/kernel/dma-swiotlb.c
> +++ b/arch/powerpc/kernel/dma-swiotlb.c
> @@ -104,3 +104,23 @@ int __init swiotlb_setup_bus_notifier(void)
> &ppc_swiotlb_plat_bus_notifier);
> return 0;
> }
> +
> +void swiotlb_detect_4g(void)
> +{
> + if ((memblock_end_of_DRAM() - 1) > 0xffffffff)
> + ppc_swiotlb_enable =3D 1;
> +}
> +
> +static int __init swiotlb_late_init(void)
> +{
> + if (ppc_swiotlb_enable) {
> + swiotlb_print_info();
> + set_pci_dma_ops(&swiotlb_dma_ops);
> + ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> + } else {
> + swiotlb_free();
> + }
> +
> + return 0;
> +}
> +subsys_initcall(swiotlb_late_init);
> diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
> index baaafde..f23c4e0 100644
> --- a/arch/powerpc/mm/mem.c
> +++ b/arch/powerpc/mm/mem.c
> @@ -300,8 +300,7 @@ void __init mem_init(void)
> unsigned long reservedpages =3D 0, codesize, initsize, datasize, =
bsssize;
>=20
> #ifdef CONFIG_SWIOTLB
> - if (ppc_swiotlb_enable)
> - swiotlb_init(1);
> + swiotlb_init(0);
> #endif
>=20
> num_physpages =3D memblock_phys_mem_size() >> PAGE_SHIFT;
> diff --git a/arch/powerpc/platforms/44x/currituck.c =
b/arch/powerpc/platforms/44x/currituck.c
> index 9f6c33d..6bd89a0 100644
> --- a/arch/powerpc/platforms/44x/currituck.c
> +++ b/arch/powerpc/platforms/44x/currituck.c
> @@ -21,7 +21,6 @@
> */
>=20
> #include <linux/init.h>
> -#include <linux/memblock.h>
> #include <linux/of.h>
> #include <linux/of_platform.h>
> #include <linux/rtc.h>
> @@ -159,13 +158,8 @@ static void __init ppc47x_setup_arch(void)
>=20
> /* No need to check the DMA config as we /know/ our windows are =
all of
> * RAM. Lets hope that doesn't change */
> -#ifdef CONFIG_SWIOTLB
> - if ((memblock_end_of_DRAM() - 1) > 0xffffffff) {
> - ppc_swiotlb_enable =3D 1;
> - set_pci_dma_ops(&swiotlb_dma_ops);
> - ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> - }
> -#endif
> + swiotlb_detect_4g();
> +
> ppc47x_smp_init();
> }
>=20
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c =
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
> index 6d3265f..56f8c8f 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
> @@ -159,6 +159,7 @@ static void __init mpc85xx_ds_setup_arch(void)
> if (ppc_md.progress)
> ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
>=20
> + swiotlb_detect_4g();
> mpc85xx_ds_pci_init();
> mpc85xx_smp_init();
>=20
> diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c =
b/arch/powerpc/platforms/85xx/qemu_e500.c
> index 95a2e53..3c5490c 100644
> --- a/arch/powerpc/platforms/85xx/qemu_e500.c
> +++ b/arch/powerpc/platforms/85xx/qemu_e500.c
> @@ -42,6 +42,7 @@ static void __init qemu_e500_setup_arch(void)
> ppc_md.progress("qemu_e500_setup_arch()", 0);
>=20
> fsl_pci_init();
> + swiotlb_detect_4g();
> mpc85xx_smp_init();
> }
>=20
> diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c
> index 6938792..da7a3d7 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -872,11 +872,8 @@ void __devinit fsl_pci_init(void)
> * we need SWIOTLB to handle buffers located outside of
> * dma capable memory region
> */
> - if (memblock_end_of_DRAM() - 1 > max) {
> + if (memblock_end_of_DRAM() - 1 > max)
> ppc_swiotlb_enable =3D 1;
> - set_pci_dma_ops(&swiotlb_dma_ops);
> - ppc_md.pci_dma_dev_setup =3D pci_dma_dev_setup_swiotlb;
> - }
> #endif
> }
> #endif
> --=20
> 1.7.5.1
>=20
^ permalink raw reply
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-08 16:02 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A51913@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/08/2012 04:39 AM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Tuesday, August 07, 2012 11:29 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org;
>> galak@kernel.crashing.org; Li Yang-R58472
>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote:
>>> I am really not sure that all boards need primary bus. Could you give
>>> me the link of discussion about primary that you mentioned?
>>
>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
>>
>> -Scott
>
>
> It seems in qemu isa_io_base must be non-zero.
In all cases. It just shows up worse under QEMU because of a different
issue.
> If there is no isa bridge should isa_io_base be non-zero for other boards?
Yes, until the bugs are fixed.
> If not maybe we should fix qemu bug.
If you want to try to make QEMU accept I/O BARs with address zero, go
ahead, but you don't get to assume that someone else will do it, we
still need to be compatible with older QEMUs (this bug is not so severe
that compatibility is unreasonable), and it still doesn't address the
fact that things are not functioning as designed. IIRC there are some
real hardware PCI cards that don't like getting an address of zero either.
> Or "quick fix" in the link is a workaround.
I think that "quick fix" may have problems if there is a primary bus but
it's not the first one detected. In any case, any fix or workaround has
to happen before you make changes that rely on it.
-Scott
^ permalink raw reply
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-08 15:58 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, Kumar Gala, linuxppc-dev@lists.ozlabs.org,
Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A518E4@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/08/2012 04:03 AM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Tuesday, August 07, 2012 11:25 PM
>> To: Li Yang-R58472
>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Jia
>> Hongtao-B38951
>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> On 08/06/2012 11:20 PM, Li Yang wrote:
>>> On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com>
>> wrote:
>>>> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote:
>>>>>
>>>>>
>>>>>> -----Original Message-----
>>>>>> From: Wood Scott-B07421
>>>>>> Sent: Saturday, August 04, 2012 12:28 AM
>>>>>> To: Jia Hongtao-B38951
>>>>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li
>>>>>> Yang- R58472; Wood Scott-B07421
>>>>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>>>> initialization code
>>>>>>
>>>>>> As I explained before, this has to be done globally, not from the
>>>>>> probe function, so we can assign a default primary bus if there
>> isn't any ISA.
>>>>>> There are bugs in the Linux PPC PCI code relating to not having
>>>>>> any primary bus.
>>>>>>
>>>>>> -Scott
>>>>>
>>>>> In my way of searching ISA you can also assign a default primary bus
>>>>> in board specific files.
>>>>
>>>> That was meant for when the board file had an alternate way of
>>>> searching for the primary bus (e.g. look for i8259), not as a
>>>> replacement for the mechanism that guarantees there's a primary bus.
>>>>
>>>> You are causing a regression in the qemu_e500.c platform.
>>>
>>> Can we fix the qemu device tree to address the problem if we do make
>>> it a rule to use the ISA node to indicate the primary bus?
>>
>> No. There is no ISA, and we're not going to lie and say there is.
>
> But we can assign a default primary for qemu.
Not in the device tree. What other mechanism do you propose? And why
do you want to fix it only for QEMU and not other boards, where things
happen to work but not as designed?
Kumar, can you speak up here as maintainer so we can stop going back and
forth endlessly?
>> I really don't understand what the problem is with leaving the primary
>> detection code as global. Either fix the bugs so we don't need a primary,
>> or accept some "impurity" in the workaround.
>>
>> -Scott
>
> Global detection for primary is ok but we think our way is deeper unified.
So my way works and "is ok", and your way doesn't work but is
theoretically cleaner.
> Is there any problem to fix the bugs?
If you want to fix them, go ahead. You don't get to rely on the bugs
beign fixed until after they're actually fixed.
> I really don't understand why we have to need a primary bus.
Did you read Ben's e-mail that I posted a link to?
-Scott
^ permalink raw reply
* Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-08 15:53 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A4B1D9@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/07/2012 10:57 PM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Tuesday, August 07, 2012 11:20 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
>> Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> On 08/07/2012 01:23 AM, Jia Hongtao-B38951 wrote:
>>>> -----Original Message-----
>>>> From: Wood Scott-B07421
>>>> Sent: Monday, August 06, 2012 11:16 PM
>>>> To: Jia Hongtao-B38951
>>>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
>>>> Yang-R58472
>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>> initialization code
>>>>
>>>> On 08/05/2012 09:39 PM, Jia Hongtao-B38951 wrote:
>>>>>
>>>>>
>>>>>> -----Original Message-----
>>>>>> From: Wood Scott-B07421
>>>>>> Sent: Saturday, August 04, 2012 12:04 AM
>>>>>> To: Jia Hongtao-B38951
>>>>>> Cc: Kumar Gala; linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li
>>>>>> Yang-R58472
>>>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>>>> initialization code
>>>>>>
>>>>>> On 08/02/2012 10:39 PM, Jia Hongtao-B38951 wrote:
>>>>>>>
>>>>>>>
>>>>>>>> -----Original Message-----
>>>>>>>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>>>>>>>> Sent: Thursday, August 02, 2012 8:24 PM
>>>>>>>> To: Jia Hongtao-B38951
>>>>>>>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li
>>>>>>>> Yang-R58472
>>>>>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>>>>>> initialization code
>>>>>>>>
>>>>>>>> You need to convert all boards to use fsl_pci_init before this
>> patch.
>>>>>>>> Otherwise we'll end up with PCI getting initialized twice on
>> boards.
>>>>>>>>
>>>>>>>> - k
>>>>>>>
>>>>>>> If we covert all boards with platform driver in this patch PCI will
>>>>>>> be initialized only once without converting all boards to use
>>>>>>> fsl_pci_init first.
>>>>>>
>>>>>> Then we'd have to pick apart core changes from board changes when
>>>>>> reviewing.
>>>>>>
>>>>>>> If we convert all boards to use fsl_pci_init before this patch and
>>>>>>> convert them to use platform driver again after this patch. Then
>>>>>>> between this patch and next pci will be initialized twice too.
>>>>>>
>>>>>> Why? That one patch should both create the platform driver and
>>>>>> remove the init from fsl_pci_init() -- except things like primary
>> bus
>>>>>> detection which has to happen globally.
>>>>>>
>>>>>> -Scott
>>>>>
>>>>> "One patch both create the platform driver and remove the init from
>>>>> fsl_pci_init()" means we should create platform driver and applied to
>>>>> all boards. If so why not just directly convert all boards using
>>>>> platform driver?
>>>>
>>>> Because it's harder to review when you have a bunch of board code in
>> the
>>>> patch in addition to core changes.
>>>>
>>>> Because you might want people to actually test on the boards in
>> question
>>>> when converting, especially given the change in how primary buses are
>>>> determined, and that some boards may need to provide their own
>>>> alternative.
>>>>
>>>> -Scott
>>>
>>> But if we separate the core changes and the boards update, between this
>> two
>>> patches PCI will be initialized twice.
>>
>> As I said earlier, you can remove the initcall and require boards to
>> manually call fsl_pci_init() until all boards are converted.
>>
>> -Scott
>
> As I said earlier, I can do this but it does not solve the twice-init problem.
I must have missed it. Why does it not solve the problem? If a board
doesn't call fsl_pci_init(), the platform driver doesn't get registered.
> If I do this first and then add platform driver we also have to convert all
> boards using platform driver in the same patch.
>
> We finally using the platform driver so Why do you keep insisting on converting
> all boards using fsl_pci_init() first even it does no improvement.
What we're asking for is bisectability (don't have any intermediate
stages where PCI gets initialized twice), and the ability to have a
smooth transition where boards can be converted as people are able to
test them and look into their individual needs regarding primary bus.
-Scott
^ permalink raw reply
* Re: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM support
From: Kumar Gala @ 2012-08-08 12:46 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A51933@039-SN1MPN1-002.039d.mgd.msft.net>
>>>>>>=20
>>>>>> On Jul 24, 2012, at 5:20 AM, Jia Hongtao wrote:
>>>>>>=20
>>>>>>> Power supply for PCI inbound/outbound window registers is off =
when
>>>>>> system
>>>>>>> go to deep-sleep state. We save the values of registers before
>>>>>>> suspend and restore to registers after resume.
>>>>>>>=20
>>>>>>> Signed-off-by: Jiang Yutang <b14898@freescale.com>
>>>>>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
>>>>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>>>>>> ---
>>>>>>> arch/powerpc/include/asm/pci-bridge.h | 2 +-
>>>>>>> arch/powerpc/sysdev/fsl_pci.c | 121
>>>>>> +++++++++++++++++++++++++++++++++
>>>>>>> 2 files changed, 122 insertions(+), 1 deletions(-)
>>>>>>=20
>>>>>> Remind me why we need to save/restore PCI ATMUs, why not just
>>>>>> re-parse the device tree to restore?
>>>>>>=20
>>>>>> - k
>>>>>=20
>>>>> Save/restore is the more efficient way. Latency of sleep/wakeup is
>>>>> one of most important features in power management.
>>>>>=20
>>>>> -Hongtao.
>>>>=20
>>>> I don't think the time it takes to run through setup_pci_atmu() is
>>>> that long compared to fsl_pci_resume().
>>>>=20
>>>> Also, don't you need to setup PCICCSRBAR and do setup_pci_cmd() on
>> resume?
>>>>=20
>>>> - k
>>>=20
>>> Hi Kumar,
>>> I did some tests on P1022DS and found out that PCI_CMD and PCICSRBAR
>>> is not lost when system in deep sleep. We don't need to save it.
>>=20
>> How does the PCI code know you're entering deep sleep and not =
hibernation?
>>=20
>> -Scott
>=20
> When system come back from hibernation PCI will be initialized again.
> So no need to save PCI_CMD and PEXCSRBAR.
>=20
> -Hongtao.=20
>=20
What do you mean PCI will be initialized again? What code path are you =
talking about that would set PCI_CMD & PEXCSRBAR?
- k=
^ permalink raw reply
* Re: [PATCH] powerpc/44x: Support OCM(On Chip Memory) for APM821xx SoC and Bluestone board
From: Josh Boyer @ 2012-08-08 12:23 UTC (permalink / raw)
To: Vinh Nguyen Huu Tuong, Benjamin Herrenschmidt
Cc: Meador Inge, Anatolij Gustschin, devicetree-discuss, Duc Dang,
Rob Herring, linux-kernel, Liu Gang, Paul Mackerras, Ashish Kalra,
Mai La, linuxppc-dev
In-Reply-To: <1341305550-15455-1-git-send-email-vhtnguyen@apm.com>
On Tue, Jul 3, 2012 at 4:52 AM, Vinh Nguyen Huu Tuong <vhtnguyen@apm.com> wrote:
> This patch consists of:
> - Add driver for OCM component
> - Export OCM Information at /sys/kernel/debug/ppc4xx_ocm/info
>
> Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com>
Acked-by: Josh Boyer <jwboyer@gmail.com>
Ben, could you pick this up? I have nothing else queued in the 4xx
tree at all.
josh
> ---
> arch/powerpc/boot/dts/bluestone.dts | 8 +
> arch/powerpc/include/asm/ppc4xx_ocm.h | 45 ++++
> arch/powerpc/platforms/44x/Kconfig | 8 +
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/ppc4xx_ocm.c | 415 +++++++++++++++++++++++++++++++++
> 5 files changed, 477 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/include/asm/ppc4xx_ocm.h
> create mode 100644 arch/powerpc/sysdev/ppc4xx_ocm.c
>
> diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
> index 9d4917a..7daaca3 100644
> --- a/arch/powerpc/boot/dts/bluestone.dts
> +++ b/arch/powerpc/boot/dts/bluestone.dts
> @@ -107,6 +107,14 @@
> interrupt-parent = <&UIC0>;
> };
>
> + OCM: ocm@400040000 {
> + compatible = "ibm,ocm";
> + status = "ok";
> + cell-index = <1>;
> + /* configured in U-Boot */
> + reg = <4 0x00040000 0x8000>; /* 32K */
> + };
> +
> SDR0: sdr {
> compatible = "ibm,sdr-apm821xx";
> dcr-reg = <0x00e 0x002>;
> diff --git a/arch/powerpc/include/asm/ppc4xx_ocm.h b/arch/powerpc/include/asm/ppc4xx_ocm.h
> new file mode 100644
> index 0000000..6ce9046
> --- /dev/null
> +++ b/arch/powerpc/include/asm/ppc4xx_ocm.h
> @@ -0,0 +1,45 @@
> +/*
> + * PowerPC 4xx OCM memory allocation support
> + *
> + * (C) Copyright 2009, Applied Micro Circuits Corporation
> + * Victor Gallardo (vgallardo@amcc.com)
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __ASM_POWERPC_PPC4XX_OCM_H__
> +#define __ASM_POWERPC_PPC4XX_OCM_H__
> +
> +#define PPC4XX_OCM_NON_CACHED 0
> +#define PPC4XX_OCM_CACHED 1
> +
> +#if defined(CONFIG_PPC4xx_OCM)
> +
> +void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
> + int flags, const char *owner);
> +void ppc4xx_ocm_free(const void *virt);
> +
> +#else
> +
> +#define ppc4xx_ocm_alloc(phys, size, align, flags, owner) NULL
> +#define ppc4xx_ocm_free(addr) ((void)0)
> +
> +#endif /* CONFIG_PPC4xx_OCM */
> +
> +#endif /* __ASM_POWERPC_PPC4XX_OCM_H__ */
> diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
> index 8abf6fb8..0effe9f 100644
> --- a/arch/powerpc/platforms/44x/Kconfig
> +++ b/arch/powerpc/platforms/44x/Kconfig
> @@ -252,6 +252,14 @@ config PPC4xx_GPIO
> help
> Enable gpiolib support for ppc440 based boards
>
> +config PPC4xx_OCM
> + bool "PPC4xx On Chip Memory (OCM) support"
> + depends on 4xx
> + select PPC_LIB_RHEAP
> + help
> + Enable OCM support for PowerPC 4xx platforms with on chip memory,
> + OCM provides the fast place for memory access to improve performance.
> +
> # 44x specific CPU modules, selected based on the board above.
> config 440EP
> bool
> diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
> index 1bd7ecb..6f768e2 100644
> --- a/arch/powerpc/sysdev/Makefile
> +++ b/arch/powerpc/sysdev/Makefile
> @@ -37,6 +37,7 @@ obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
> obj-$(CONFIG_PPC_I8259) += i8259.o
> obj-$(CONFIG_IPIC) += ipic.o
> obj-$(CONFIG_4xx) += uic.o
> +obj-$(CONFIG_PPC4xx_OCM) += ppc4xx_ocm.o
> obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o
> obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o
> obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o
> diff --git a/arch/powerpc/sysdev/ppc4xx_ocm.c b/arch/powerpc/sysdev/ppc4xx_ocm.c
> new file mode 100644
> index 0000000..1b15f93
> --- /dev/null
> +++ b/arch/powerpc/sysdev/ppc4xx_ocm.c
> @@ -0,0 +1,415 @@
> +/*
> + * PowerPC 4xx OCM memory allocation support
> + *
> + * (C) Copyright 2009, Applied Micro Circuits Corporation
> + * Victor Gallardo (vgallardo@amcc.com)
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/of.h>
> +#include <asm/rheap.h>
> +#include <asm/ppc4xx_ocm.h>
> +#include <linux/slab.h>
> +#include <linux/debugfs.h>
> +
> +#define OCM_DISABLED 0
> +#define OCM_ENABLED 1
> +
> +struct ocm_block {
> + struct list_head list;
> + void __iomem *addr;
> + int size;
> + const char *owner;
> +};
> +
> +/* non-cached or cached region */
> +struct ocm_region {
> + phys_addr_t phys;
> + void __iomem *virt;
> +
> + int memtotal;
> + int memfree;
> +
> + rh_info_t *rh;
> + struct list_head list;
> +};
> +
> +struct ocm_info {
> + int index;
> + int status;
> + int ready;
> +
> + phys_addr_t phys;
> +
> + int alignment;
> + int memtotal;
> + int cache_size;
> +
> + struct ocm_region nc; /* non-cached region */
> + struct ocm_region c; /* cached region */
> +};
> +
> +static struct ocm_info *ocm_nodes;
> +static int ocm_count;
> +
> +static struct ocm_info *ocm_get_node(unsigned int index)
> +{
> + if (index >= ocm_count) {
> + printk(KERN_ERR "PPC4XX OCM: invalid index");
> + return NULL;
> + }
> +
> + return &ocm_nodes[index];
> +}
> +
> +static int ocm_free_region(struct ocm_region *ocm_reg, const void *addr)
> +{
> + struct ocm_block *blk, *tmp;
> + unsigned long offset;
> +
> + if (!ocm_reg->virt)
> + return 0;
> +
> + list_for_each_entry_safe(blk, tmp, &ocm_reg->list, list) {
> + if (blk->addr == addr) {
> + offset = addr - ocm_reg->virt;
> + ocm_reg->memfree += blk->size;
> + rh_free(ocm_reg->rh, offset);
> + list_del(&blk->list);
> + kfree(blk);
> + return 1;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static void __init ocm_init_node(int count, struct device_node *node)
> +{
> + struct ocm_info *ocm;
> +
> + const unsigned int *cell_index;
> + const unsigned int *cache_size;
> + int len;
> +
> + struct resource rsrc;
> + int ioflags;
> +
> + ocm = ocm_get_node(count);
> +
> + cell_index = of_get_property(node, "cell-index", &len);
> + if (!cell_index) {
> + printk(KERN_ERR "PPC4XX OCM: missing cell-index property");
> + return;
> + }
> + ocm->index = *cell_index;
> +
> + if (of_device_is_available(node))
> + ocm->status = OCM_ENABLED;
> +
> + cache_size = of_get_property(node, "cached-region-size", &len);
> + if (cache_size)
> + ocm->cache_size = *cache_size;
> +
> + if (of_address_to_resource(node, 0, &rsrc)) {
> + printk(KERN_ERR "PPC4XX OCM%d: could not get resource address\n",
> + ocm->index);
> + return;
> + }
> +
> + ocm->phys = rsrc.start;
> + ocm->memtotal = (rsrc.end - rsrc.start + 1);
> +
> + printk(KERN_INFO "PPC4XX OCM%d: %d Bytes (%s)\n",
> + ocm->index, ocm->memtotal,
> + (ocm->status == OCM_DISABLED) ? "disabled" : "enabled");
> +
> + if (ocm->status == OCM_DISABLED)
> + return;
> +
> + /* request region */
> +
> + if (!request_mem_region(ocm->phys, ocm->memtotal, "ppc4xx_ocm")) {
> + printk(KERN_ERR "PPC4XX OCM%d: could not request region\n",
> + ocm->index);
> + return;
> + }
> +
> + /* Configure non-cached and cached regions */
> +
> + ocm->nc.phys = ocm->phys;
> + ocm->nc.memtotal = ocm->memtotal - ocm->cache_size;
> + ocm->nc.memfree = ocm->nc.memtotal;
> +
> + ocm->c.phys = ocm->phys + ocm->nc.memtotal;
> + ocm->c.memtotal = ocm->cache_size;
> + ocm->c.memfree = ocm->c.memtotal;
> +
> + if (ocm->nc.memtotal == 0)
> + ocm->nc.phys = 0;
> +
> + if (ocm->c.memtotal == 0)
> + ocm->c.phys = 0;
> +
> + printk(KERN_INFO "PPC4XX OCM%d: %d Bytes (non-cached)\n",
> + ocm->index, ocm->nc.memtotal);
> +
> + printk(KERN_INFO "PPC4XX OCM%d: %d Bytes (cached)\n",
> + ocm->index, ocm->c.memtotal);
> +
> + /* ioremap the non-cached region */
> + if (ocm->nc.memtotal) {
> + ioflags = _PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_EXEC;
> + ocm->nc.virt = __ioremap(ocm->nc.phys, ocm->nc.memtotal,
> + ioflags);
> +
> + if (!ocm->nc.virt) {
> + printk(KERN_ERR
> + "PPC4XX OCM%d: failed to ioremap non-cached memory\n",
> + ocm->index);
> + ocm->nc.memfree = 0;
> + return;
> + }
> + }
> +
> + /* ioremap the cached region */
> +
> + if (ocm->c.memtotal) {
> + ioflags = _PAGE_EXEC;
> + ocm->c.virt = __ioremap(ocm->c.phys, ocm->c.memtotal,
> + ioflags);
> +
> + if (!ocm->c.virt) {
> + printk(KERN_ERR
> + "PPC4XX OCM%d: failed to ioremap cached memory\n",
> + ocm->index);
> + ocm->c.memfree = 0;
> + return;
> + }
> + }
> +
> + /* Create Remote Heaps */
> +
> + ocm->alignment = 4; /* default 4 byte alignment */
> +
> + if (ocm->nc.virt) {
> + ocm->nc.rh = rh_create(ocm->alignment);
> + rh_attach_region(ocm->nc.rh, 0, ocm->nc.memtotal);
> + }
> +
> + if (ocm->c.virt) {
> + ocm->c.rh = rh_create(ocm->alignment);
> + rh_attach_region(ocm->c.rh, 0, ocm->c.memtotal);
> + }
> +
> + INIT_LIST_HEAD(&ocm->nc.list);
> + INIT_LIST_HEAD(&ocm->c.list);
> +
> + ocm->ready = 1;
> +
> + return;
> +}
> +
> +static int ocm_debugfs_show(struct seq_file *m, void *v)
> +{
> + struct ocm_block *blk, *tmp;
> + unsigned int i;
> +
> + for (i = 0; i < ocm_count; i++) {
> + struct ocm_info *ocm = ocm_get_node(i);
> +
> + if (!ocm || !ocm->ready)
> + continue;
> +
> + seq_printf(m, "PPC4XX OCM : %d\n", ocm->index);
> + seq_printf(m, "PhysAddr : 0x%llx\n", ocm->phys);
> + seq_printf(m, "MemTotal : %d Bytes\n", ocm->memtotal);
> + seq_printf(m, "MemTotal(NC) : %d Bytes\n", ocm->nc.memtotal);
> + seq_printf(m, "MemTotal(C) : %d Bytes\n", ocm->c.memtotal);
> +
> + seq_printf(m, "\n");
> +
> + seq_printf(m, "NC.PhysAddr : 0x%llx\n", ocm->nc.phys);
> + seq_printf(m, "NC.VirtAddr : 0x%p\n", ocm->nc.virt);
> + seq_printf(m, "NC.MemTotal : %d Bytes\n", ocm->nc.memtotal);
> + seq_printf(m, "NC.MemFree : %d Bytes\n", ocm->nc.memfree);
> +
> + list_for_each_entry_safe(blk, tmp, &ocm->nc.list, list) {
> + seq_printf(m, "NC.MemUsed : %d Bytes (%s)\n",
> + blk->size, blk->owner);
> + }
> +
> + seq_printf(m, "\n");
> +
> + seq_printf(m, "C.PhysAddr : 0x%llx\n", ocm->c.phys);
> + seq_printf(m, "C.VirtAddr : 0x%p\n", ocm->c.virt);
> + seq_printf(m, "C.MemTotal : %d Bytes\n", ocm->c.memtotal);
> + seq_printf(m, "C.MemFree : %d Bytes\n", ocm->c.memfree);
> +
> + list_for_each_entry_safe(blk, tmp, &ocm->c.list, list) {
> + seq_printf(m, "C.MemUsed : %d Bytes (%s)\n",
> + blk->size, blk->owner);
> + }
> +
> + seq_printf(m, "\n");
> + }
> +
> + return 0;
> +}
> +
> +static int ocm_debugfs_open(struct inode *inode, struct file *file)
> +{
> + return single_open(file, ocm_debugfs_show, NULL);
> +}
> +
> +static const struct file_operations ocm_debugfs_fops = {
> + .open = ocm_debugfs_open,
> + .read = seq_read,
> + .llseek = seq_lseek,
> + .release = single_release,
> +};
> +
> +static int ocm_debugfs_init(void)
> +{
> + struct dentry *junk;
> +
> + junk = debugfs_create_dir("ppc4xx_ocm", 0);
> + if (!junk) {
> + printk(KERN_ALERT "debugfs ppc4xx ocm: failed to create dir\n");
> + return -1;
> + }
> +
> + if (debugfs_create_file("info", 0644, junk, NULL, &ocm_debugfs_fops)) {
> + printk(KERN_ALERT "debugfs ppc4xx ocm: failed to create file\n");
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +void *ppc4xx_ocm_alloc(phys_addr_t *phys, int size, int align,
> + int flags, const char *owner)
> +{
> + void __iomem *addr = NULL;
> + unsigned long offset;
> + struct ocm_info *ocm;
> + struct ocm_region *ocm_reg;
> + struct ocm_block *ocm_blk;
> + int i;
> +
> + for (i = 0; i < ocm_count; i++) {
> + ocm = ocm_get_node(i);
> +
> + if (!ocm || !ocm->ready)
> + continue;
> +
> + if (flags == PPC4XX_OCM_NON_CACHED)
> + ocm_reg = &ocm->nc;
> + else
> + ocm_reg = &ocm->c;
> +
> + if (!ocm_reg->virt)
> + continue;
> +
> + if (align < ocm->alignment)
> + align = ocm->alignment;
> +
> + offset = rh_alloc_align(ocm_reg->rh, size, align, NULL);
> +
> + if (IS_ERR_VALUE(offset))
> + continue;
> +
> + ocm_blk = kzalloc(sizeof(struct ocm_block *), GFP_KERNEL);
> + if (!ocm_blk) {
> + printk(KERN_ERR "PPC4XX OCM: could not allocate ocm block");
> + rh_free(ocm_reg->rh, offset);
> + break;
> + }
> +
> + *phys = ocm_reg->phys + offset;
> + addr = ocm_reg->virt + offset;
> + size = ALIGN(size, align);
> +
> + ocm_blk->addr = addr;
> + ocm_blk->size = size;
> + ocm_blk->owner = owner;
> + list_add_tail(&ocm_blk->list, &ocm_reg->list);
> +
> + ocm_reg->memfree -= size;
> +
> + break;
> + }
> +
> + return addr;
> +}
> +
> +void ppc4xx_ocm_free(const void *addr)
> +{
> + int i;
> +
> + if (!addr)
> + return;
> +
> + for (i = 0; i < ocm_count; i++) {
> + struct ocm_info *ocm = ocm_get_node(i);
> +
> + if (!ocm || !ocm->ready)
> + continue;
> +
> + if (ocm_free_region(&ocm->nc, addr) ||
> + ocm_free_region(&ocm->c, addr))
> + return;
> + }
> +}
> +
> +static int __init ppc4xx_ocm_init(void)
> +{
> + struct device_node *np;
> + int count;
> +
> + count = 0;
> + for_each_compatible_node(np, NULL, "ibm,ocm")
> + count++;
> +
> + if (!count)
> + return 0;
> +
> + ocm_nodes = kzalloc((count * sizeof(struct ocm_info)), GFP_KERNEL);
> + if (!ocm_nodes) {
> + printk(KERN_ERR "PPC4XX OCM: failed to allocate OCM nodes!\n");
> + return -ENOMEM;
> + }
> +
> + ocm_count = count;
> + count = 0;
> +
> + for_each_compatible_node(np, NULL, "ibm,ocm") {
> + ocm_init_node(count, np);
> + count++;
> + }
> +
> + ocm_debugfs_init();
> +
> + return 0;
> +}
> +
> +arch_initcall(ppc4xx_ocm_init);
> --
> 1.7.2.5
>
^ permalink raw reply
* Re: [PATCH 1/3] powerpc/e500v2: Add power isa properties to comply with ePAPR 1.1
From: Tabi Timur-B04825 @ 2012-08-08 12:13 UTC (permalink / raw)
To: Yin Olivia-R63875; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1344408808-29411-1-git-send-email-hong-hua.yin@freescale.com>
On Wed, Aug 8, 2012 at 1:53 AM, Olivia Yin <hong-hua.yin@freescale.com> wro=
te:
> The patch update all e500v2 platforms.
Could you provide some more information about the ePAPR requirement?
> + * e500v2 power isa Device Tree Source (include)
Power ISA
> + *
> + * Copyright 2012 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions ar=
e met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyrig=
ht
> + * notice, this list of conditions and the following disclaimer in=
the
> + * documentation and/or other materials provided with the distribu=
tion.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote pro=
ducts
> + * derived from this software without specific prior written permi=
ssion.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of th=
e
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND AN=
Y
Please use normal quotation marks
"AS IS"
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* RE: [PATCH 5/6] powerpc/fsl-pci: Add pci inbound/outbound PM support
From: Jia Hongtao-B38951 @ 2012-08-08 9:54 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50213597.5080600@freescale.com>
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Q1NSQkFSLg0KDQotSG9uZ3Rhby4gDQoNCg==
^ permalink raw reply
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-08-08 9:39 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50213439.9070806@freescale.com>
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
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cGNpL3BjaWUNCj4gaW5pdGlhbGl6YXRpb24gY29kZQ0KPiANCj4gT24gMDgvMDcvMjAxMiAwMzow
OSBBTSwgSmlhIEhvbmd0YW8tQjM4OTUxIHdyb3RlOg0KPiA+IEkgYW0gcmVhbGx5IG5vdCBzdXJl
IHRoYXQgYWxsIGJvYXJkcyBuZWVkIHByaW1hcnkgYnVzLiBDb3VsZCB5b3UgZ2l2ZQ0KPiA+IG1l
IHRoZSBsaW5rIG9mIGRpc2N1c3Npb24gYWJvdXQgcHJpbWFyeSB0aGF0IHlvdSBtZW50aW9uZWQ/
DQo+IA0KPiBodHRwczovL2xpc3RzLm96bGFicy5vcmcvcGlwZXJtYWlsL2xpbnV4cHBjLWRldi8y
MDEyLUp1bmUvMDk4NTg2Lmh0bWwNCj4gDQo+IC1TY290dA0KDQoNCkl0IHNlZW1zIGluIHFlbXUg
aXNhX2lvX2Jhc2UgbXVzdCBiZSBub24temVyby4NCklmIHRoZXJlIGlzIG5vIGlzYSBicmlkZ2Ug
c2hvdWxkIGlzYV9pb19iYXNlIGJlIG5vbi16ZXJvIGZvciBvdGhlciBib2FyZHM/DQpJZiBub3Qg
bWF5YmUgd2Ugc2hvdWxkIGZpeCBxZW11IGJ1Zy4NCk9yICJxdWljayBmaXgiIGluIHRoZSBsaW5r
IGlzIGEgd29ya2Fyb3VuZC4NCg0KLUhvbmd0YW8uDQo=
^ permalink raw reply
* RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-08-08 9:03 UTC (permalink / raw)
To: Wood Scott-B07421, Li Yang-R58472
Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50213342.8020600@freescale.com>
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogV29vZCBTY290dC1CMDc0
MjENCj4gU2VudDogVHVlc2RheSwgQXVndXN0IDA3LCAyMDEyIDExOjI1IFBNDQo+IFRvOiBMaSBZ
YW5nLVI1ODQ3Mg0KPiBDYzogV29vZCBTY290dC1CMDc0MjE7IGxpbnV4cHBjLWRldkBsaXN0cy5v
emxhYnMub3JnOyBMaSBZYW5nLVI1ODQ3MjsgSmlhDQo+IEhvbmd0YW8tQjM4OTUxDQo+IFN1Ympl
Y3Q6IFJlOiBbUEFUQ0ggVjUgMy8zXSBwb3dlcnBjL2ZzbC1wY2k6IFVuaWZ5IHBjaS9wY2llDQo+
IGluaXRpYWxpemF0aW9uIGNvZGUNCj4gDQo+IE9uIDA4LzA2LzIwMTIgMTE6MjAgUE0sIExpIFlh
bmcgd3JvdGU6DQo+ID4gT24gTW9uLCBBdWcgNiwgMjAxMiBhdCAxMTowOSBQTSwgU2NvdHQgV29v
ZCA8c2NvdHR3b29kQGZyZWVzY2FsZS5jb20+DQo+IHdyb3RlOg0KPiA+PiBPbiAwOC8wNS8yMDEy
IDEwOjA3IFBNLCBKaWEgSG9uZ3Rhby1CMzg5NTEgd3JvdGU6DQo+ID4+Pg0KPiA+Pj4NCj4gPj4+
PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiA+Pj4+IEZyb206IFdvb2QgU2NvdHQtQjA3
NDIxDQo+ID4+Pj4gU2VudDogU2F0dXJkYXksIEF1Z3VzdCAwNCwgMjAxMiAxMjoyOCBBTQ0KPiA+
Pj4+IFRvOiBKaWEgSG9uZ3Rhby1CMzg5NTENCj4gPj4+PiBDYzogbGludXhwcGMtZGV2QGxpc3Rz
Lm96bGFicy5vcmc7IGdhbGFrQGtlcm5lbC5jcmFzaGluZy5vcmc7IExpDQo+ID4+Pj4gWWFuZy0g
UjU4NDcyOyBXb29kIFNjb3R0LUIwNzQyMQ0KPiA+Pj4+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggVjUg
My8zXSBwb3dlcnBjL2ZzbC1wY2k6IFVuaWZ5IHBjaS9wY2llDQo+ID4+Pj4gaW5pdGlhbGl6YXRp
b24gY29kZQ0KPiA+Pj4+DQo+ID4+Pj4gQXMgSSBleHBsYWluZWQgYmVmb3JlLCB0aGlzIGhhcyB0
byBiZSBkb25lIGdsb2JhbGx5LCBub3QgZnJvbSB0aGUNCj4gPj4+PiBwcm9iZSBmdW5jdGlvbiwg
c28gd2UgY2FuIGFzc2lnbiBhIGRlZmF1bHQgcHJpbWFyeSBidXMgaWYgdGhlcmUNCj4gaXNuJ3Qg
YW55IElTQS4NCj4gPj4+PiAgVGhlcmUgYXJlIGJ1Z3MgaW4gdGhlIExpbnV4IFBQQyBQQ0kgY29k
ZSByZWxhdGluZyB0byBub3QgaGF2aW5nDQo+ID4+Pj4gYW55IHByaW1hcnkgYnVzLg0KPiA+Pj4+
DQo+ID4+Pj4gLVNjb3R0DQo+ID4+Pg0KPiA+Pj4gSW4gbXkgd2F5IG9mIHNlYXJjaGluZyBJU0Eg
eW91IGNhbiBhbHNvIGFzc2lnbiBhIGRlZmF1bHQgcHJpbWFyeSBidXMNCj4gPj4+IGluIGJvYXJk
IHNwZWNpZmljIGZpbGVzLg0KPiA+Pg0KPiA+PiBUaGF0IHdhcyBtZWFudCBmb3Igd2hlbiB0aGUg
Ym9hcmQgZmlsZSBoYWQgYW4gYWx0ZXJuYXRlIHdheSBvZg0KPiA+PiBzZWFyY2hpbmcgZm9yIHRo
ZSBwcmltYXJ5IGJ1cyAoZS5nLiBsb29rIGZvciBpODI1OSksIG5vdCBhcyBhDQo+ID4+IHJlcGxh
Y2VtZW50IGZvciB0aGUgbWVjaGFuaXNtIHRoYXQgZ3VhcmFudGVlcyB0aGVyZSdzIGEgcHJpbWFy
eSBidXMuDQo+ID4+DQo+ID4+IFlvdSBhcmUgY2F1c2luZyBhIHJlZ3Jlc3Npb24gaW4gdGhlIHFl
bXVfZTUwMC5jIHBsYXRmb3JtLg0KPiA+DQo+ID4gQ2FuIHdlIGZpeCB0aGUgcWVtdSBkZXZpY2Ug
dHJlZSB0byBhZGRyZXNzIHRoZSBwcm9ibGVtIGlmIHdlIGRvIG1ha2UNCj4gPiBpdCBhIHJ1bGUg
dG8gdXNlIHRoZSBJU0Egbm9kZSB0byBpbmRpY2F0ZSB0aGUgcHJpbWFyeSBidXM/DQo+IA0KPiBO
by4gIFRoZXJlIGlzIG5vIElTQSwgYW5kIHdlJ3JlIG5vdCBnb2luZyB0byBsaWUgYW5kIHNheSB0
aGVyZSBpcy4NCg0KQnV0IHdlIGNhbiBhc3NpZ24gYSBkZWZhdWx0IHByaW1hcnkgZm9yIHFlbXUu
DQoNCj4gDQo+IEkgcmVhbGx5IGRvbid0IHVuZGVyc3RhbmQgd2hhdCB0aGUgcHJvYmxlbSBpcyB3
aXRoIGxlYXZpbmcgdGhlIHByaW1hcnkNCj4gZGV0ZWN0aW9uIGNvZGUgYXMgZ2xvYmFsLiAgRWl0
aGVyIGZpeCB0aGUgYnVncyBzbyB3ZSBkb24ndCBuZWVkIGEgcHJpbWFyeSwNCj4gb3IgYWNjZXB0
IHNvbWUgImltcHVyaXR5IiBpbiB0aGUgd29ya2Fyb3VuZC4NCj4gDQo+IC1TY290dA0KDQpHbG9i
YWwgZGV0ZWN0aW9uIGZvciBwcmltYXJ5IGlzIG9rIGJ1dCB3ZSB0aGluayBvdXIgd2F5IGlzIGRl
ZXBlciB1bmlmaWVkLg0KDQpJcyB0aGVyZSBhbnkgcHJvYmxlbSB0byBmaXggdGhlIGJ1Z3M/DQpJ
IHJlYWxseSBkb24ndCB1bmRlcnN0YW5kIHdoeSB3ZSBoYXZlIHRvIG5lZWQgYSBwcmltYXJ5IGJ1
cy4NCg0KLUhvbmd0YW8uDQoNCg0K
^ permalink raw reply
* [PATCH 2/3] powerpc/e500mc: Add power isa properties to comply with ePAPR 1.1
From: Olivia Yin @ 2012-08-08 6:53 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Olivia Yin
In-Reply-To: <1344408808-29411-1-git-send-email-hong-hua.yin@freescale.com>
The patch update all the e500mc platforms.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
branch: next
arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi | 58 +++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 3 +
4 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
new file mode 100644
index 0000000..fa40047
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
@@ -0,0 +1,58 @@
+/*
+ * e500mc power isa Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.06";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-ds; // Decorated Storage
+ power-isa-e.ed; // Embedded.Enhanced Debug
+ power-isa-e.pd; // Embedded.External PID
+ power-isa-e.hv; // Embedded.Hypervisor
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-e.pc; // Embedded.Processor Control
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-exp; // External Proxy
+ power-isa-fp; // Floating Point
+ power-isa-fp.r; // Floating Point.Record
+ power-isa-mmc; // Memory Coherence
+ power-isa-scpm; // Store Conditional Page Mobility
+ power-isa-wt; // Wait
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 2d0a40d..7a2697d 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
/ {
compatible = "fsl,P2041";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index 136def3..c9ca2c3 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
/ {
compatible = "fsl,P3041";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index b9556ee..493d9a0 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500mc_power_isa.dtsi"
+
/ {
compatible = "fsl,P4080";
#address-cells = <2>;
--
1.6.4
^ permalink raw reply related
* [PATCH 3/3] powerpc/e5500: Add power isa properties to comply with ePAPR 1.1
From: Olivia Yin @ 2012-08-08 6:53 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Olivia Yin
In-Reply-To: <1344408808-29411-2-git-send-email-hong-hua.yin@freescale.com>
The patch update all the e5500 platforms.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
branch: next
arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi | 59 ++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 3 +
2 files changed, 62 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
new file mode 100644
index 0000000..0e26eb5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
@@ -0,0 +1,59 @@
+/*
+ * e5500 power isa Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.06";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-ds; // Decorated Storage
+ power-isa-e.ed; // Embedded.Enhanced Debug
+ power-isa-e.pd; // Embedded.External PID
+ power-isa-e.hv; // Embedded.Hypervisor
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-e.pc; // Embedded.Processor Control
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-exp; // External Proxy
+ power-isa-fp; // Floating Point
+ power-isa-fp.r; // Floating Point.Record
+ power-isa-mmc; // Memory Coherence
+ power-isa-scpm; // Store Conditional Page Mobility
+ power-isa-wt; // Wait
+ power-isa-64; // 64-bit
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index ae823a4..0a198b0 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
/ {
compatible = "fsl,P5020";
#address-cells = <2>;
--
1.6.4
^ permalink raw reply related
* [PATCH 1/3] powerpc/e500v2: Add power isa properties to comply with ePAPR 1.1
From: Olivia Yin @ 2012-08-08 6:53 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Olivia Yin
The patch update all e500v2 platforms.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
branch: next
arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi | 52 +++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi | 3 +
arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi | 3 +
arch/powerpc/boot/dts/mpc8540ads.dts | 2 +
arch/powerpc/boot/dts/mpc8541cds.dts | 2 +
arch/powerpc/boot/dts/mpc8555cds.dts | 2 +
arch/powerpc/boot/dts/mpc8560ads.dts | 2 +
17 files changed, 96 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
new file mode 100644
index 0000000..efd6c73
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e500v2_power_isa.dtsi
@@ -0,0 +1,52 @@
+/*
+ * e500v2 power isa Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/ {
+ cpus {
+ power-isa-version = "2.03";
+ power-isa-b; // Base
+ power-isa-e; // Embedded
+ power-isa-atb; // Alternate Time Base
+ power-isa-cs; // Cache Specification
+ power-isa-e.le; // Embedded.Little-Endian
+ power-isa-e.pm; // Embedded.Performance Monitor
+ power-isa-ecl; // Embedded Cache Locking
+ power-isa-mmc; // Memory Coherence
+ power-isa-sp; // Signal Processing Engine
+ power-isa-sp.fd; // SPE.Embedded Float Scalar Double
+ power-isa-sp.fs; // SPE.Embedded Float Scalar Single
+ power-isa-sp.fv; // SPE.Embedded Float Vector
+ mmu-type = "power-embedded";
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
index 7de45a7..152906f 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,MPC8536";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
index 8777f92..5a69baf 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,MPC8544";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
index 720422d..fc1ce97 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,MPC8548";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
index eacd62c..122ca3b 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,MPC8568";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
index b07064d..2cd15a2 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,MPC8569";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
index ca18832..28c2a86 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,MPC8572";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
index 7354a8f..6e76f9b 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,P1010";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
index 6f0376e..fed9c4c 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,P1020";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
index 4abd54b..36161b5 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,P1021";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
index e930f4f..1956dea 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,P1022";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
index ac45f6d..132a152 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,P1023";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
index 3213288..42bf3c6 100644
--- a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
@@ -33,6 +33,9 @@
*/
/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
/ {
compatible = "fsl,P2020";
#address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index f99fb11..2d31863 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -11,6 +11,8 @@
/dts-v1/;
+/include/ "fsl/e500v2_power_isa.dtsi"
+
/ {
model = "MPC8540ADS";
compatible = "MPC8540ADS", "MPC85xxADS";
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 0f5e939..1c03c26 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -11,6 +11,8 @@
/dts-v1/;
+/include/ "fsl/e500v2_power_isa.dtsi"
+
/ {
model = "MPC8541CDS";
compatible = "MPC8541CDS", "MPC85xxCDS";
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index fe10438..36a7ea1 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -11,6 +11,8 @@
/dts-v1/;
+/include/ "fsl/e500v2_power_isa.dtsi"
+
/ {
model = "MPC8555CDS";
compatible = "MPC8555CDS", "MPC85xxCDS";
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 6e85e1b..1a43f5a 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -11,6 +11,8 @@
/dts-v1/;
+/include/ "fsl/e500v2_power_isa.dtsi"
+
/ {
model = "MPC8560ADS";
compatible = "MPC8560ADS", "MPC85xxADS";
--
1.6.4
^ permalink raw reply related
* Re: [PATCH 3/4] cpu: export cpu hotplug disable/enable functions as global functions
From: Zhao Chenhui @ 2012-08-08 7:11 UTC (permalink / raw)
To: Srivatsa S. Bhat
Cc: rjw, linuxppc-dev@lists.ozlabs.org list,
linux-kernel@vger.kernel.org list
In-Reply-To: <50220382.4010405@linux.vnet.ibm.com>
On Wed, Aug 08, 2012 at 11:43:22AM +0530, Srivatsa S. Bhat wrote:
> On 08/07/2012 11:21 PM, Kumar Gala wrote:
> >
> > On Aug 7, 2012, at 3:43 AM, Zhao Chenhui wrote:
> >
> >> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
> >> Therefore, the related functions should be exported.
> >>
> >> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> >> ---
> >> include/linux/cpu.h | 4 ++++
> >> 1 files changed, 4 insertions(+), 0 deletions(-)
> >
> > Rafael, Srivatsa,
> >
> > Wanted to get your ack on export these functions for direct calling by arch code.
> >
>
> Why not just use get_online_cpus()/put_online_cpus()?
>
> In the case of suspend/resume/hibernation, we had introduced these CPU hotplug disable
> functions because we would end up doing CPU hotplug ourselves, further down the path.
> So if we did a get_online_cpus(), we would end up deadlocking ourselves. Whereas, the
> patch 4/4 looks like a straightforward case of wanting to simply disable CPU hotplug..
> I don't see where you are doing CPU hotplug yourself in the path. So IMO, just
> get/put_online_cpus() should do.
>
> Regards,
> Srivatsa S. Bhat
>
Thanks for your comment. I will try to use get/put_online_cpus() in my patch.
-Chenhui
^ permalink raw reply
* Re: [PATCH 3/4] cpu: export cpu hotplug disable/enable functions as global functions
From: Srivatsa S. Bhat @ 2012-08-08 6:13 UTC (permalink / raw)
To: Kumar Gala
Cc: rjw, linuxppc-dev@lists.ozlabs.org list, Zhao Chenhui,
linux-kernel@vger.kernel.org list
In-Reply-To: <B4FC7F5E-EA8F-4FCA-B206-353FE4481DCE@kernel.crashing.org>
On 08/07/2012 11:21 PM, Kumar Gala wrote:
>
> On Aug 7, 2012, at 3:43 AM, Zhao Chenhui wrote:
>
>> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
>> Therefore, the related functions should be exported.
>>
>> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
>> ---
>> include/linux/cpu.h | 4 ++++
>> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> Rafael, Srivatsa,
>
> Wanted to get your ack on export these functions for direct calling by arch code.
>
Why not just use get_online_cpus()/put_online_cpus()?
In the case of suspend/resume/hibernation, we had introduced these CPU hotplug disable
functions because we would end up doing CPU hotplug ourselves, further down the path.
So if we did a get_online_cpus(), we would end up deadlocking ourselves. Whereas, the
patch 4/4 looks like a straightforward case of wanting to simply disable CPU hotplug..
I don't see where you are doing CPU hotplug yourself in the path. So IMO, just
get/put_online_cpus() should do.
Regards,
Srivatsa S. Bhat
>
>>
>> diff --git a/include/linux/cpu.h b/include/linux/cpu.h
>> index ce7a074..df8f73d 100644
>> --- a/include/linux/cpu.h
>> +++ b/include/linux/cpu.h
>> @@ -146,6 +146,8 @@ void notify_cpu_starting(unsigned int cpu);
>> extern void cpu_maps_update_begin(void);
>> extern void cpu_maps_update_done(void);
>>
>> +extern void cpu_hotplug_disable_before_freeze(void);
>> +extern void cpu_hotplug_enable_after_thaw(void);
>> #else /* CONFIG_SMP */
>>
>> #define cpu_notifier(fn, pri) do { (void)(fn); } while (0)
>> @@ -167,6 +169,8 @@ static inline void cpu_maps_update_done(void)
>> {
>> }
>>
>> +static inline void cpu_hotplug_disable_before_freeze(void) {}
>> +static inline void cpu_hotplug_enable_after_thaw(void) {}
>> #endif /* CONFIG_SMP */
>> extern struct bus_type cpu_subsys;
>>
>> --
>> 1.6.4.1
>>
>
^ permalink raw reply
* [PATCH 3/3 v5] powerpc/mpic: FSL MPIC error interrupt support.
From: Varun Sethi @ 2012-08-08 4:06 UTC (permalink / raw)
To: galak, linuxppc-dev; +Cc: Bogdan Hamciuc, Varun Sethi
All SOC device error interrupts are muxed and delivered to the core
as a single MPIC error interrupt. Currently all the device drivers
requiring access to device errors have to register for the MPIC error
interrupt as a shared interrupt.
With this patch we add interrupt demuxing capability in the mpic driver,
allowing device drivers to register for their individual error interrupts.
This is achieved by handling error interrupts in a cascaded fashion.
MPIC error interrupt is handled by the "error_int_handler", which
subsequently demuxes it using the EISR and delivers it to the respective
drivers.
The error interrupt capability is dependent on the MPIC EIMR register,
which was introduced in FSL MPIC version 4.1 (P4080 rev2). So, error
interrupt demuxing capability is dependent on the MPIC version and can
be used for versions >= 4.1.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
[In the initial version of the patch we were using handle_simple_irq
as the handler for cascaded error interrupts, this resulted
in issues in case of threaded isrs (with RT kernel). This issue was
debugged by Bogdan and decision was taken to use the handle_level_irq
handler]
---
arch/powerpc/include/asm/mpic.h | 14 ++++
arch/powerpc/sysdev/Makefile | 2 +-
arch/powerpc/sysdev/fsl_mpic_err.c | 149 ++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/mpic.c | 44 ++++++++++-
arch/powerpc/sysdev/mpic.h | 22 +++++
5 files changed, 229 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_mpic_err.c
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e14d35d..c0f9ef9 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -118,6 +118,9 @@
#define MPIC_MAX_CPUS 32
#define MPIC_MAX_ISU 32
+#define MPIC_MAX_ERR 32
+#define MPIC_FSL_ERR_INT 16
+
/*
* Tsi108 implementation of MPIC has many differences from the original one
*/
@@ -270,6 +273,7 @@ struct mpic
struct irq_chip hc_ipi;
#endif
struct irq_chip hc_tm;
+ struct irq_chip hc_err;
const char *name;
/* Flags */
unsigned int flags;
@@ -283,6 +287,8 @@ struct mpic
/* vector numbers used for internal sources (ipi/timers) */
unsigned int ipi_vecs[4];
unsigned int timer_vecs[8];
+ /* vector numbers used for FSL MPIC error interrupts */
+ unsigned int err_int_vecs[MPIC_MAX_ERR];
/* Spurious vector to program into unused sources */
unsigned int spurious_vec;
@@ -306,6 +312,9 @@ struct mpic
struct mpic_reg_bank cpuregs[MPIC_MAX_CPUS];
struct mpic_reg_bank isus[MPIC_MAX_ISU];
+ /* ioremap'ed base for error interrupt registers */
+ u32 __iomem *err_regs;
+
/* Protected sources */
unsigned long *protected;
@@ -370,6 +379,11 @@ struct mpic
#define MPIC_NO_RESET 0x00004000
/* Freescale MPIC (compatible includes "fsl,mpic") */
#define MPIC_FSL 0x00008000
+/* Freescale MPIC supports EIMR (error interrupt mask register).
+ * This flag is set for MPIC version >= 4.1 (version determined
+ * from the BRR1 register).
+*/
+#define MPIC_FSL_HAS_EIMR 0x00010000
/* MPIC HW modification ID */
#define MPIC_REGSET_MASK 0xf0000000
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 1bd7ecb..a57600b 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
obj-$(CONFIG_PPC_PMI) += pmi.o
obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
-obj-$(CONFIG_FSL_SOC) += fsl_soc.o
+obj-$(CONFIG_FSL_SOC) += fsl_soc.o fsl_mpic_err.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_PMC) += fsl_pmc.o
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
diff --git a/arch/powerpc/sysdev/fsl_mpic_err.c b/arch/powerpc/sysdev/fsl_mpic_err.c
new file mode 100644
index 0000000..b83f325
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_mpic_err.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *
+ * Author: Varun Sethi <varun.sethi@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#include <linux/irq.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mpic.h>
+
+#include "mpic.h"
+
+#define MPIC_ERR_INT_BASE 0x3900
+#define MPIC_ERR_INT_EISR 0x0000
+#define MPIC_ERR_INT_EIMR 0x0010
+
+static inline u32 mpic_fsl_err_read(u32 __iomem *base, unsigned int err_reg)
+{
+ return in_be32(base + (err_reg >> 2));
+}
+
+static inline void mpic_fsl_err_write(u32 __iomem *base, u32 value)
+{
+ out_be32(base + (MPIC_ERR_INT_EIMR >> 2), value);
+}
+
+static void fsl_mpic_mask_err(struct irq_data *d)
+{
+ u32 eimr;
+ struct mpic *mpic = irq_data_get_irq_chip_data(d);
+ unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0];
+
+ eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
+ eimr |= (1 << (31 - src));
+ mpic_fsl_err_write(mpic->err_regs, eimr);
+}
+
+static void fsl_mpic_unmask_err(struct irq_data *d)
+{
+ u32 eimr;
+ struct mpic *mpic = irq_data_get_irq_chip_data(d);
+ unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0];
+
+ eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
+ eimr &= ~(1 << (31 - src));
+ mpic_fsl_err_write(mpic->err_regs, eimr);
+}
+
+static struct irq_chip fsl_mpic_err_chip = {
+ .irq_disable = fsl_mpic_mask_err,
+ .irq_mask = fsl_mpic_mask_err,
+ .irq_unmask = fsl_mpic_unmask_err,
+};
+
+int mpic_setup_error_int(struct mpic *mpic, int intvec)
+{
+ int i;
+
+ mpic->err_regs = ioremap(mpic->paddr + MPIC_ERR_INT_BASE, 0x1000);
+ if (!mpic->err_regs) {
+ pr_err("could not map mpic error registers\n");
+ return -ENOMEM;
+ }
+ mpic->hc_err = fsl_mpic_err_chip;
+ mpic->hc_err.name = mpic->name;
+ mpic->flags |= MPIC_FSL_HAS_EIMR;
+ /* allocate interrupt vectors for error interrupts */
+ for (i = MPIC_MAX_ERR - 1; i >= 0; i--)
+ mpic->err_int_vecs[i] = --intvec;
+
+ return 0;
+}
+
+int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)
+{
+ if ((mpic->flags & MPIC_FSL_HAS_EIMR) &&
+ (hw >= mpic->err_int_vecs[0] &&
+ hw <= mpic->err_int_vecs[MPIC_MAX_ERR - 1])) {
+ WARN_ON(mpic->flags & MPIC_SECONDARY);
+
+ pr_debug("mpic: mapping as Error Interrupt\n");
+ irq_set_chip_data(virq, mpic);
+ irq_set_chip_and_handler(virq, &mpic->hc_err,
+ handle_level_irq);
+ return 1;
+ }
+
+ return 0;
+}
+
+static irqreturn_t fsl_error_int_handler(int irq, void *data)
+{
+ struct mpic *mpic = (struct mpic *) data;
+ u32 eisr, eimr;
+ int errint;
+ unsigned int cascade_irq;
+
+ eisr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EISR);
+ eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
+
+ if (!(eisr & ~eimr))
+ return IRQ_NONE;
+
+ while (eisr) {
+ errint = __builtin_clz(eisr);
+ cascade_irq = irq_linear_revmap(mpic->irqhost,
+ mpic->err_int_vecs[errint]);
+ WARN_ON(cascade_irq == NO_IRQ);
+ if (cascade_irq != NO_IRQ) {
+ generic_handle_irq(cascade_irq);
+ } else {
+ eimr |= 1 << (31 - errint);
+ mpic_fsl_err_write(mpic->err_regs, eimr);
+ }
+ eisr &= ~(1 << (31 - errint));
+ }
+
+ return IRQ_HANDLED;
+}
+
+void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
+{
+ unsigned int virq;
+ int ret;
+
+ virq = irq_create_mapping(mpic->irqhost, irqnum);
+ if (virq == NO_IRQ) {
+ pr_err("Error interrupt setup failed\n");
+ return;
+ }
+
+ /* Mask all error interrupts */
+ mpic_fsl_err_write(mpic->err_regs, ~0);
+
+ ret = request_irq(virq, fsl_error_int_handler, IRQF_NO_THREAD,
+ "mpic-error-int", mpic);
+ if (ret)
+ pr_err("Failed to register error interrupt handler\n");
+}
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7e32db7..9c6e535 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1026,6 +1026,9 @@ static int mpic_host_map(struct irq_domain *h, unsigned int virq,
return 0;
}
+ if (mpic_map_error_int(mpic, virq, hw))
+ return 0;
+
if (hw >= mpic->num_sources)
return -EINVAL;
@@ -1085,7 +1088,16 @@ static int mpic_host_xlate(struct irq_domain *h, struct device_node *ct,
*/
switch (intspec[2]) {
case 0:
- case 1: /* no EISR/EIMR support for now, treat as shared IRQ */
+ break;
+ case 1:
+ if (!(mpic->flags & MPIC_FSL_HAS_EIMR))
+ break;
+
+ if (intspec[3] >= ARRAY_SIZE(mpic->err_int_vecs))
+ return -EINVAL;
+
+ *out_hwirq = mpic->err_int_vecs[intspec[3]];
+
break;
case 2:
if (intspec[0] >= ARRAY_SIZE(mpic->ipi_vecs))
@@ -1302,6 +1314,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
if (mpic->flags & MPIC_FSL) {
+ u32 brr1, version;
+ int ret;
+
/*
* Yes, Freescale really did put global registers in the
* magic per-cpu area -- and they don't even show up in the
@@ -1309,6 +1324,29 @@ struct mpic * __init mpic_alloc(struct device_node *node,
*/
mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
MPIC_CPU_THISBASE, 0x1000);
+
+ brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
+ MPIC_FSL_BRR1);
+ version = brr1 & MPIC_FSL_BRR1_VER;
+
+ /* Error interrupt mask register (EIMR) is required for
+ * handling individual device error interrupts. EIMR
+ * was added in MPIC version 4.1.
+ *
+ * Over here we reserve vector number space for error
+ * interrupt vectors. This space is stolen from the
+ * global vector number space, as in case of ipis
+ * and timer interrupts.
+ *
+ * Available vector space = intvec_top - 12, where 12
+ * is the number of vectors which have been consumed by
+ * ipis and timer interrupts.
+ */
+ if (version >= 0x401) {
+ ret = mpic_setup_error_int(mpic, intvec_top - 12);
+ if (ret)
+ return NULL;
+ }
}
/* Reset */
@@ -1474,6 +1512,10 @@ void __init mpic_init(struct mpic *mpic)
num_timers = 8;
}
+ /* FSL mpic error interrupt intialization */
+ if (mpic->flags & MPIC_FSL_HAS_EIMR)
+ mpic_err_int_init(mpic, MPIC_FSL_ERR_INT);
+
/* Initialize timers to our reserved vectors and mask them for now */
for (i = 0; i < num_timers; i++) {
unsigned int offset = mpic_tm_offset(mpic, i);
diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
index 13f3e89..24bf07a 100644
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -40,4 +40,26 @@ extern int mpic_set_affinity(struct irq_data *d,
const struct cpumask *cpumask, bool force);
extern void mpic_reset_core(int cpu);
+#ifdef CONFIG_FSL_SOC
+extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);
+extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
+extern int mpic_setup_error_int(struct mpic *mpic, int intvec);
+#else
+static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)
+{
+ return 0;
+}
+
+
+static inline void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
+{
+ return;
+}
+
+static inline int mpic_setup_error_int(struct mpic *mpic, int intvec)
+{
+ return -1;
+}
+#endif
+
#endif /* _POWERPC_SYSDEV_MPIC_H */
--
1.7.4.1
^ permalink raw reply related
* RE: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao-B38951 @ 2012-08-08 3:57 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <50213207.8050000@freescale.com>
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^ permalink raw reply
* [PATCH 2/2] powerpc: Fix VMX in interrupt check in POWER7 copy loops
From: Anton Blanchard @ 2012-08-08 3:51 UTC (permalink / raw)
To: benh, paulus; +Cc: linuxppc-dev
In-Reply-To: <20120808135046.06056d11@kryten>
The enhanced prefetch hint patches corrupt the condition register
that was used to check if we are in interrupt. Fix this by using cr1.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
Index: b/arch/powerpc/lib/copyuser_power7.S
===================================================================
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -288,7 +288,7 @@ err1; stb r0,0(r3)
std r0,16(r1)
stdu r1,-STACKFRAMESIZE(r1)
bl .enter_vmx_usercopy
- cmpwi r3,0
+ cmpwi cr1,r3,0
ld r0,STACKFRAMESIZE+16(r1)
ld r3,STACKFRAMESIZE+48(r1)
ld r4,STACKFRAMESIZE+56(r1)
@@ -326,7 +326,7 @@ err1; stb r0,0(r3)
dcbt r0,r8,0b01010 /* GO */
.machine pop
- beq .Lunwind_stack_nonvmx_copy
+ beq cr1,.Lunwind_stack_nonvmx_copy
/*
* If source and destination are not relatively aligned we use a
Index: b/arch/powerpc/lib/memcpy_power7.S
===================================================================
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -222,7 +222,7 @@ _GLOBAL(memcpy_power7)
std r0,16(r1)
stdu r1,-STACKFRAMESIZE(r1)
bl .enter_vmx_copy
- cmpwi r3,0
+ cmpwi cr1,r3,0
ld r0,STACKFRAMESIZE+16(r1)
ld r3,STACKFRAMESIZE+48(r1)
ld r4,STACKFRAMESIZE+56(r1)
@@ -260,7 +260,7 @@ _GLOBAL(memcpy_power7)
dcbt r0,r8,0b01010 /* GO */
.machine pop
- beq .Lunwind_stack_nonvmx_copy
+ beq cr1,.Lunwind_stack_nonvmx_copy
/*
* If source and destination are not relatively aligned we use a
^ permalink raw reply
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