* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-10 16:00 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, Gala Kumar-B11780,
linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A52814@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Gala Kumar-B11780
>> Sent: Thursday, August 09, 2012 3:04 AM
>> To: Wood Scott-B07421
>> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc-
>> dev@lists.ozlabs.org
>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>>>>>>>>> As I explained before, this has to be done globally, not from
>>>>>>>>> the probe function, so we can assign a default primary bus if
>>>>>>>>> there
>>>>> isn't any ISA.
>>>>>>>>> There are bugs in the Linux PPC PCI code relating to not having
>>>>>>>>> any primary bus.
>>>>>>>>>
>>>>>>>>> -Scott
>>>>>>>>
>>>>>>>> In my way of searching ISA you can also assign a default primary
>>>>>>>> bus in board specific files.
>>>>>>>
>>>>>>> That was meant for when the board file had an alternate way of
>>>>>>> searching for the primary bus (e.g. look for i8259), not as a
>>>>>>> replacement for the mechanism that guarantees there's a primary bus.
>>>>>>>
>>>>>>> You are causing a regression in the qemu_e500.c platform.
>>>>>>
>>>>>> Can we fix the qemu device tree to address the problem if we do
>>>>>> make it a rule to use the ISA node to indicate the primary bus?
>>>>>
>>>>> No. There is no ISA, and we're not going to lie and say there is.
>>>>
>>>> But we can assign a default primary for qemu.
>>>
>>> Not in the device tree. What other mechanism do you propose? And why
>>> do you want to fix it only for QEMU and not other boards, where things
>>> happen to work but not as designed?
>>>
>>> Kumar, can you speak up here as maintainer so we can stop going back
>>> and forth endlessly?
>>
>> I'd rather we stick with the code that works for this purpose at this
>> point. That would be Scott's current upstream code. Lets get the other
>> aspects of this patchset closed (SWIOTLB, conversion to platform driver,
>> PM, etc.). The primary bus code Scott wrote does NOT need to change at
>> this point.
>>
>> - k
>
>
> I just submitted a new version of PCI patch in which I improve the primary part.
> The reasons I want to change the way of primary assignment listed below:
>
> 1. This approach is functionally equivalent to the Scott's code. In my approach
> there might be no primary assigned but it fixed by "quick fix" introduced by Ben.
> Please refer to this link:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
You might want to get Ben's input as to whether he actually wants to see
that "quick fix" applied.
> 2. Scott's and my way could not handle the situation that "the primary is not the
> first PCI bus detected". I found that only ge_imp3a got this problem so I fixed it
> by adding ISA node to its device tree. By adding this I think the solution is
> logically completed.
How did my approach not handle this case? As I said, ge_imp3a platform
code needs to set fsl_pci_primary manually before PCI init runs.
Adding a node to the device tree is not the answer, since that will
break compatibility with old device trees.
> 3. The key advantage of my way is better unified for platform driver. If I use
> the Scott's way I have to make an routine and called in all boards code.
Only until all boards are converted, and this is *not* different with
your approach.
> The goal
> of my PCI patch is unifying all PCI initialization code and obviously primary
> determination is part of PCI code.
>
> 4. The other advantage is efficiency. All my search for ISA node is just under
> PCI node instead of all device tree.
We do so many searches over the full device tree during boot that this
is meaningless.
Do you have benchmarks to show that device tree iteration is a
significant contributor to boot time?
-Scott
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock
From: Kumar Gala @ 2012-08-10 13:50 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: gregkh, linux-usb, linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <1344595712-12804-2-git-send-email-Shengzhou.Liu@freescale.com>
On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
> when missing USB PHY clock, kernel booting up will hang during USB
> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
> CPU hanging in this case.
>=20
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> drivers/usb/host/ehci-fsl.c | 63 =
++++++++++++++++++++++++++++++------------
> drivers/usb/host/ehci-fsl.h | 1 +
> 2 files changed, 46 insertions(+), 18 deletions(-)
I assume this should be considered a bug fix and be looked at for =
inclusion in v3.6?
- k=
^ permalink raw reply
* Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document
From: Gala Kumar-B11780 @ 2012-08-10 13:35 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org Discuss,
Paul Mackerras, linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <1344578002-8057-1-git-send-email-Dongsheng.wang@freescale.com>
On Aug 10, 2012, at 12:53 AM, <Dongsheng.wang@freescale.com> <Dongsheng.wan=
g@freescale.com> wrote:
> From: Wang Dongsheng <Dongsheng.Wang@freescale.com>
>=20
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
>=20
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers=
.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specifica=
tion.
>=20
> Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Documentation/devicetree/bindings/open-pic.txt | 46 +++++++++++++++=
+++++
Let's separate out the open-pic.txt timer binding change into its own patch=
from the FSL timer binding & dtsi updates.
> .../devicetree/bindings/powerpc/fsl/mpic-timer.txt | 21 +++++----
> arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi | 7 ++-
> arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi | 7 ++-
> 4 files changed, 66 insertions(+), 15 deletions(-)
>=20
> diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentati=
on/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
>=20
> * References
>=20
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"
> +
> +- reg : Contains two regions. The first is the timer frequency reportin=
g
> + register for the group. The second is the main timer register bank
> + (GTCCR, GTBCR, GTVPR, GTDR).
> +
> +- available-ranges: use <start count> style section to define which
> + timer interrupts can be used. This property is optional; without this=
,
> + all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> + with timer zero. If available-ranges is present, only the interrupts
> + that correspond to available timers shall be present.
> +
If we are going to require device_type property it should be in the binding=
.
Based on the comments in ePAPR, I recommend dropping device_type from the t=
imer binding.
> +* Examples
> +
> +Example 1:
> +
> + /* Note that this requires #interrupt-cells to be 4 */
> + timer: timer@010f0 {
> + compatible =3D "open-pic,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x010f0 4 0x01100 0x100>;
> +
> + /* Another AMP partition is using timer */
> + available-ranges =3D <2 2>;
> +
> + interrupts =3D <2 0 3 0
> + 3 0 3 0>;
> + };
> +
> +Example 2:
> +
> + timer: timer@010f0 {
> + compatible =3D "open-pic,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x010f0 4 0x01100 0x100>;
> + interrupts =3D <0 0 3 0
> + 1 0 3 0
> + 2 0 3 0
> + 3 0 3 0>;
> + };
> +
> [1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform
> Requirements (ePAPR), Version 1.0, July 2008.
> (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.p=
df)
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt=
b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> index df41958..5aafca0 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> @@ -1,13 +1,14 @@
> * Freescale MPIC timers
>=20
> Required properties:
> -- compatible: "fsl,mpic-global-timer"
> +- compatible: "fsl,global-timer"
Why are renaming?.. also use of fsl,global-timer is to generic of a name fo=
r the this.
>=20
> -- reg : Contains two regions. The first is the main timer register bank
> - (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The second is the timer control
> +- reg : Contains three regions. The first is the timer frequency report=
ing
> + register (TFRRx) for the group. The second is the main timer register
> + bank (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The third is the timer cont=
rol
> register (TCRx) for the group.
>=20
> -- fsl,available-ranges: use <start count> style section to define which
> +- available-ranges: use <start count> style section to define which
> timer interrupts can be used. This property is optional; without this,
> all timers within the group can be used.
>=20
> @@ -18,19 +19,21 @@ Required properties:
> Example:
> /* Note that this requires #interrupt-cells to be 4 */
> timer0: timer@41100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x41100 0x100 0x41300 4>;
> + compatible =3D "fsl,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x410f0 4 0x41100 0x100 0x41300 4>;
>=20
> /* Another AMP partition is using timers 0 and 1 */
> - fsl,available-ranges =3D <2 2>;
> + available-ranges =3D <2 2>;
>=20
> interrupts =3D <2 0 3 0
> 3 0 3 0>;
> };
>=20
> timer1: timer@42100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x42100 0x100 0x42300 4>;
> + compatible =3D "fsl,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x420f0 4 0x42100 0x100 0x42300 4>;
> interrupts =3D <4 0 3 0
> 5 0 3 0
> 6 0 3 0
> diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/power=
pc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> index 8734cff..01cd33c 100644
> --- a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> @@ -32,9 +32,10 @@
> * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> */
>=20
> -timer@42100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x42100 0x100 0x42300 4>;
> +timer@420f0 {
> + compatible =3D "fsl,global-timer";
Shouldn't this be:
compatible =3D "fsl,mpic-global-timer", "open-pic,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x420f0 4 0x42100 0x100 0x42300 4>;
> interrupts =3D <4 0 3 0
> 5 0 3 0
> 6 0 3 0
> diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/=
dts/fsl/pq3-mpic.dtsi
> index 71c30eb..c71d8e0 100644
> --- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
> @@ -44,9 +44,10 @@ mpic: pic@40000 {
> last-interrupt-source =3D <255>;
> };
>=20
> -timer@41100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x41100 0x100 0x41300 4>;
> +timer@410f0 {
> + compatible =3D "fsl,global-timer";
same as above.
> + device_type =3D "open-pic";
> + reg =3D <0x410f0 4 0x41100 0x100 0x41300 4>;
> interrupts =3D <0 0 3 0
> 1 0 3 0
> 2 0 3 0
> --=20
> 1.7.5.1
>=20
>=20
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply
* Re: [PATCH v3 1/2] mmc: Move mmc_delay() to include/linux/mmc/core.h
From: Arnd Bergmann @ 2012-08-10 13:27 UTC (permalink / raw)
To: Chunhe Lan; +Cc: linuxppc-dev, kumar.gala, cjb, linux-mmc
In-Reply-To: <1344637513-29383-1-git-send-email-Chunhe.Lan@freescale.com>
On Friday 10 August 2012, Chunhe Lan wrote:
> +static inline void mmc_delay(unsigned int ms)
> +{
> + if (ms < 1000 / HZ) {
> + cond_resched();
> + mdelay(ms);
> + } else {
> + msleep(ms);
> + }
> +}
I would actually question the point in this function to start with: The
decision whether to call mdelay() or msleep() should only be based on
whether you are allowed to sleep in the caller context. The idea of
cond_resched();
mdelay(ms);
sets off alarm bells, and I would always replace that with msleep().
Arnd
^ permalink raw reply
* Re: [PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Kumar Gala @ 2012-08-10 13:12 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1344586776-3115-1-git-send-email-B38951@freescale.com>
On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the =
fsl_pci
> to a platform driver. In previous PCI code architecture the =
initialization
> routine is called at board_setup_arch stage. Now the initialization is =
done
> in probe function which is architectural better. Also It's convenient =
for
> adding PM support for PCI controller in later patch.
>=20
> We also change the way of determining primary bus for fitting platform
> driver. Thanks to the proposal from Ben. Please refer to the link =
below:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
>=20
> Now we registered pci controllers as platform devices. So we combine =
two
> initialization code as one platform driver.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
> ---
> Changes for V6:
> - Fix "isa_io_base could not be zero" bug. Thanks to Ben.
>=20
> - Determining primary by looking for ISA node does not work for =
ge_imp3a.
> It's fixed by adding ISA node to its devied tree.
>=20
> arch/powerpc/boot/dts/ge_imp3a.dts | 4 +
> arch/powerpc/kernel/pci-common.c | 2 +-
> arch/powerpc/platforms/85xx/common.c | 10 +++
> arch/powerpc/platforms/85xx/corenet_ds.c | 31 +--------
> arch/powerpc/platforms/85xx/ge_imp3a.c | 48 +------------
> arch/powerpc/platforms/85xx/mpc8536_ds.c | 36 +---------
> arch/powerpc/platforms/85xx/mpc85xx_ads.c | 9 +--
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 14 +----
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 ++--------
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 38 +---------
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 28 +++-----
> arch/powerpc/platforms/85xx/p1010rdb.c | 14 +----
> arch/powerpc/platforms/85xx/p1022_ds.c | 34 +---------
> arch/powerpc/platforms/85xx/p1022_rdk.c | 34 +---------
> arch/powerpc/platforms/85xx/p1023_rds.c | 7 +--
> arch/powerpc/platforms/85xx/p2041_rdb.c | 2 +-
> arch/powerpc/platforms/85xx/p3041_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p4080_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p5020_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p5040_ds.c | 2 +-
> arch/powerpc/platforms/85xx/qemu_e500.c | 3 +-
> arch/powerpc/platforms/85xx/sbc8548.c | 19 +-----
> arch/powerpc/platforms/85xx/socrates.c | 11 +---
> arch/powerpc/platforms/85xx/stx_gp3.c | 11 +---
> arch/powerpc/platforms/85xx/tqm85xx.c | 21 +------
> arch/powerpc/platforms/85xx/xes_mpc85xx.c | 54 ++-------------
> arch/powerpc/platforms/86xx/gef_ppc9a.c | 10 +--
> arch/powerpc/platforms/86xx/gef_sbc310.c | 11 +---
> arch/powerpc/platforms/86xx/gef_sbc610.c | 10 +--
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 19 +----
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 40 +----------
> arch/powerpc/platforms/86xx/sbc8641d.c | 12 +---
> arch/powerpc/sysdev/fsl_pci.c | 102 =
+++++++++++++++++-----------
> arch/powerpc/sysdev/fsl_pci.h | 9 ++-
> drivers/edac/mpc85xx_edac.c | 43 +++---------
> 35 files changed, 165 insertions(+), 567 deletions(-)
>=20
> diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts =
b/arch/powerpc/boot/dts/ge_imp3a.dts
> index fefae41..aa2c4b5 100644
> --- a/arch/powerpc/boot/dts/ge_imp3a.dts
> +++ b/arch/powerpc/boot/dts/ge_imp3a.dts
> @@ -248,6 +248,10 @@
> 0x1000000 0x0 0x0
> 0x1000000 0x0 0x0
> 0x0 0x10000>;
> +
> + isa@1e {
> + device_type =3D "isa";
> + };
> };
> };
> };
Why are we adding an isa node to the ge_imp3a.dts?
If this is really needed it should be a separate patch as well.
- k
^ permalink raw reply
* Re: [PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Kumar Gala @ 2012-08-10 13:09 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1344586776-3115-1-git-send-email-B38951@freescale.com>
On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the =
fsl_pci
> to a platform driver. In previous PCI code architecture the =
initialization
> routine is called at board_setup_arch stage. Now the initialization is =
done
> in probe function which is architectural better. Also It's convenient =
for
> adding PM support for PCI controller in later patch.
>=20
> We also change the way of determining primary bus for fitting platform
> driver. Thanks to the proposal from Ben. Please refer to the link =
below:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
>=20
> Now we registered pci controllers as platform devices. So we combine =
two
> initialization code as one platform driver.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
> ---
> Changes for V6:
> - Fix "isa_io_base could not be zero" bug. Thanks to Ben.
>=20
> - Determining primary by looking for ISA node does not work for =
ge_imp3a.
> It's fixed by adding ISA node to its devied tree.
>=20
> arch/powerpc/boot/dts/ge_imp3a.dts | 4 +
> arch/powerpc/kernel/pci-common.c | 2 +-
> arch/powerpc/platforms/85xx/common.c | 10 +++
> arch/powerpc/platforms/85xx/corenet_ds.c | 31 +--------
> arch/powerpc/platforms/85xx/ge_imp3a.c | 48 +------------
> arch/powerpc/platforms/85xx/mpc8536_ds.c | 36 +---------
> arch/powerpc/platforms/85xx/mpc85xx_ads.c | 9 +--
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 14 +----
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 ++--------
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 38 +---------
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 28 +++-----
> arch/powerpc/platforms/85xx/p1010rdb.c | 14 +----
> arch/powerpc/platforms/85xx/p1022_ds.c | 34 +---------
> arch/powerpc/platforms/85xx/p1022_rdk.c | 34 +---------
> arch/powerpc/platforms/85xx/p1023_rds.c | 7 +--
> arch/powerpc/platforms/85xx/p2041_rdb.c | 2 +-
> arch/powerpc/platforms/85xx/p3041_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p4080_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p5020_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p5040_ds.c | 2 +-
> arch/powerpc/platforms/85xx/qemu_e500.c | 3 +-
> arch/powerpc/platforms/85xx/sbc8548.c | 19 +-----
> arch/powerpc/platforms/85xx/socrates.c | 11 +---
> arch/powerpc/platforms/85xx/stx_gp3.c | 11 +---
> arch/powerpc/platforms/85xx/tqm85xx.c | 21 +------
> arch/powerpc/platforms/85xx/xes_mpc85xx.c | 54 ++-------------
> arch/powerpc/platforms/86xx/gef_ppc9a.c | 10 +--
> arch/powerpc/platforms/86xx/gef_sbc310.c | 11 +---
> arch/powerpc/platforms/86xx/gef_sbc610.c | 10 +--
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 19 +----
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 40 +----------
> arch/powerpc/platforms/86xx/sbc8641d.c | 12 +---
> arch/powerpc/sysdev/fsl_pci.c | 102 =
+++++++++++++++++-----------
> arch/powerpc/sysdev/fsl_pci.h | 9 ++-
> drivers/edac/mpc85xx_edac.c | 43 +++---------
> 35 files changed, 165 insertions(+), 567 deletions(-)
>=20
[ snip ]
> diff --git a/arch/powerpc/kernel/pci-common.c =
b/arch/powerpc/kernel/pci-common.c
> index 0f75bd5..2a09aa5 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -734,7 +734,7 @@ void __devinit pci_process_bridge_OF_ranges(struct =
pci_controller *hose,
> hose->io_base_virt =3D ioremap(cpu_addr, size);
>=20
> /* Expect trouble if pci_addr is not 0 */
> - if (primary)
> + if (primary || !isa_io_base)
> isa_io_base =3D
> (unsigned =
long)hose->io_base_virt;
> #endif /* CONFIG_PPC32 */
Make this a separate patch.
- k=
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git merge branch (updated)
From: Kumar Gala @ 2012-08-10 13:07 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <7009C85C-A90F-4477-821A-507259A8F595@kernel.crashing.org>
Ben,
Two updates from last week (one dts bug fix, one minor defconfig update)
- k
The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee:
Linux 3.6-rc1 (2012-08-02 16:38:10 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge
for you to fetch changes up to 09a3017a585eb8567a7de15b426bb1dfb548bf0f:
powerpc/p4080ds: dts - add usb controller version info and port0 (2012-08-10 07:47:02 -0500)
----------------------------------------------------------------
Jia Hongtao (1):
powerpc/fsl-pci: Only scan PCI bus if configured as a host
Shengzhou Liu (1):
powerpc/p4080ds: dts - add usb controller version info and port0
Zhao Chenhui (1):
powerpc/85xx: mpc85xx_defconfig - add VIA PATA support for MPC85xxCDS
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 7 +++++++
arch/powerpc/configs/mpc85xx_defconfig | 1 +
arch/powerpc/sysdev/fsl_pci.c | 13 ++++++++-----
3 files changed, 16 insertions(+), 5 deletions(-)
^ permalink raw reply
* Re: [PATCH 3/3, v2] powerpc/e5500: Add Power ISA properties to comply with ePAPR 1.1
From: Kumar Gala @ 2012-08-10 13:05 UTC (permalink / raw)
To: Olivia Yin; +Cc: linuxppc-dev
In-Reply-To: <1344498156-25127-3-git-send-email-hong-hua.yin@freescale.com>
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties =
defined in ePAPR.
>=20
> If the power-isa-version property exists, then for each category from =
the=20
> Categories section of Book I of the Power ISA version indicated, the=20=
> existence of a property named power-isa-[CAT], where [CAT] is the=20
> abbreviated category name with all uppercase letters converted to=20
> lowercase, indicates that the category is supported by the =
implementation.
>=20
> This patch update all the e5500 platforms.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next
>=20
> arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi | 59 =
++++++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 3 +
> 2 files changed, 62 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
Added p5040si-pre.dtsi
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 1/3, v2] powerpc/e500v2: Add Power ISA properties to comply with ePAPR 1.1
From: Kumar Gala @ 2012-08-10 13:05 UTC (permalink / raw)
To: Olivia Yin; +Cc: linuxppc-dev
In-Reply-To: <1344498156-25127-1-git-send-email-hong-hua.yin@freescale.com>
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties =
defined in ePAPR.
>=20
> If the power-isa-version property exists, then for each category from =
the=20
> Categories section of Book I of the Power ISA version indicated, the=20=
> existence of a property named power-isa-[CAT], where [CAT] is the=20
> abbreviated category name with all uppercase letters converted to=20
> lowercase, indicates that the category is supported by the =
implementation.
>=20
> The patch update all e500v2 platforms.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 2/3, v2] powerpc/e500mc: Add Power ISA properties to comply with ePAPR 1.1
From: Kumar Gala @ 2012-08-10 13:05 UTC (permalink / raw)
To: Olivia Yin; +Cc: linuxppc-dev
In-Reply-To: <1344498156-25127-2-git-send-email-hong-hua.yin@freescale.com>
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties =
defined in ePAPR.
>=20
> If the power-isa-version property exists, then for each category from =
the=20
> Categories section of Book I of the Power ISA version indicated, the=20=
> existence of a property named power-isa-[CAT], where [CAT] is the=20
> abbreviated category name with all uppercase letters converted to=20
> lowercase, indicates that the category is supported by the =
implementation.
>=20
> The patch update all the e500mc platforms.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next
>=20
> arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi | 58 =
+++++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 3 +
> arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi | 3 +
> arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 3 +
> 4 files changed, 67 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 1/3, v2] powerpc/e500v2: Add Power ISA properties to comply with ePAPR 1.1
From: Kumar Gala @ 2012-08-10 12:59 UTC (permalink / raw)
To: Olivia Yin; +Cc: linuxppc-dev
In-Reply-To: <1344498156-25127-1-git-send-email-hong-hua.yin@freescale.com>
On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:
> power-isa-version and power-isa-* are cpu node general properties =
defined in ePAPR.
>=20
> If the power-isa-version property exists, then for each category from =
the=20
> Categories section of Book I of the Power ISA version indicated, the=20=
> existence of a property named power-isa-[CAT], where [CAT] is the=20
> abbreviated category name with all uppercase letters converted to=20
> lowercase, indicates that the category is supported by the =
implementation.
>=20
> The patch update all e500v2 platforms.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next
applied to next
- k=
^ permalink raw reply
* Re: [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary
From: Kumar Gala @ 2012-08-10 12:58 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343988851-884-3-git-send-email-B38951@freescale.com>
On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote:
> Remove the dependency on PCI initialization for SWIOTLB initialization.
> So that PCI can be initialized at proper time.
>
> SWIOTLB is partly determined by PCI inbound/outbound map which is assigned
> in PCI initialization. But swiotlb_init() should be done at the stage of
> mem_init() which is much earlier than PCI initialization. So we reserve the
> memory for SWIOTLB first and free it if not necessary.
>
> All boards are converted to fit this change.
>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/include/asm/swiotlb.h | 6 ++++++
> arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++
> arch/powerpc/mm/mem.c | 3 +--
> arch/powerpc/platforms/44x/currituck.c | 10 ++--------
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 +
> arch/powerpc/platforms/85xx/qemu_e500.c | 1 +
> arch/powerpc/sysdev/fsl_pci.c | 5 +----
> 7 files changed, 32 insertions(+), 14 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 3/3 v5] powerpc/mpic: FSL MPIC error interrupt support.
From: Kumar Gala @ 2012-08-10 12:58 UTC (permalink / raw)
To: Varun Sethi; +Cc: Bogdan Hamciuc, linuxppc-dev
In-Reply-To: <1344398769-31536-1-git-send-email-Varun.Sethi@freescale.com>
On Aug 7, 2012, at 11:06 PM, Varun Sethi wrote:
> All SOC device error interrupts are muxed and delivered to the core
> as a single MPIC error interrupt. Currently all the device drivers
> requiring access to device errors have to register for the MPIC error
> interrupt as a shared interrupt.
>=20
> With this patch we add interrupt demuxing capability in the mpic =
driver,
> allowing device drivers to register for their individual error =
interrupts.
> This is achieved by handling error interrupts in a cascaded fashion.
>=20
> MPIC error interrupt is handled by the "error_int_handler", which
> subsequently demuxes it using the EISR and delivers it to the =
respective
> drivers.=20
>=20
> The error interrupt capability is dependent on the MPIC EIMR register,
> which was introduced in FSL MPIC version 4.1 (P4080 rev2). So, error
> interrupt demuxing capability is dependent on the MPIC version and can
> be used for versions >=3D 4.1.
>=20
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
> [In the initial version of the patch we were using handle_simple_irq
> as the handler for cascaded error interrupts, this resulted
> in issues in case of threaded isrs (with RT kernel). This issue was
> debugged by Bogdan and decision was taken to use the handle_level_irq
> handler]
> ---
> arch/powerpc/include/asm/mpic.h | 14 ++++
> arch/powerpc/sysdev/Makefile | 2 +-
> arch/powerpc/sysdev/fsl_mpic_err.c | 149 =
++++++++++++++++++++++++++++++++++++
> arch/powerpc/sysdev/mpic.c | 44 ++++++++++-
> arch/powerpc/sysdev/mpic.h | 22 +++++
> 5 files changed, 229 insertions(+), 2 deletions(-)
> create mode 100644 arch/powerpc/sysdev/fsl_mpic_err.c
applied to next
- k
^ permalink raw reply
* Re: [PATCH] mpc85xx_defconfig: add VIA PATA support for MPC85xxCDS
From: Kumar Gala @ 2012-08-10 12:58 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1344330767-29444-1-git-send-email-chenhui.zhao@freescale.com>
On Aug 7, 2012, at 4:12 AM, Zhao Chenhui wrote:
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> ---
> Replace this patch "mpc85xx_defconfig: add IDE support for MPC85xxCDS".
>
> arch/powerpc/configs/mpc85xx_defconfig | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
applied to merge
- k
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0
From: Kumar Gala @ 2012-08-10 12:57 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: linux-usb, linuxppc-dev
In-Reply-To: <1344595712-12804-1-git-send-email-Shengzhou.Liu@freescale.com>
On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
> Add the missing usb controller version info and port0, which is
> required during setup usb phy.
>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)
applied to merge
- k
^ permalink raw reply
* Re: [PATCH] powerpc/smp: Do not disable IPI interrupts during suspend
From: Kumar Gala @ 2012-08-10 12:40 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev@lists.ozlabs.org list, Zhao Chenhui,
linux-kernel@vger.kernel.org list
In-Reply-To: <20120802100418.GA13777@localhost.localdomain>
On Aug 2, 2012, at 5:04 AM, Zhao Chenhui wrote:
> On Sat, Jul 28, 2012 at 08:20:31AM +1000, Benjamin Herrenschmidt =
wrote:
>> On Fri, 2012-07-27 at 16:58 -0500, Kumar Gala wrote:
>>> On Jul 20, 2012, at 7:47 AM, Zhao Chenhui wrote:
>>>=20
>>>> During suspend, all interrupts including IPI will be disabled. In =
this case,
>>>> the suspend process will hang in SMP. To prevent this, pass the =
flag
>>>> IRQF_NO_SUSPEND when requesting IPI irq.
>>>>=20
>>>> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>>> ---
>>>> arch/powerpc/kernel/smp.c | 2 +-
>>>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>>=20
>>> BenH,
>>>=20
>>> Can you ack?
>>=20
>> No I'll merge it but not until it's been in next for a bit unless you
>> have some strong emergency there, it's on my mental list of things to
>> shovel into next after rc1.
>>=20
>> Curiosity: didn't we use to disable all non-boot CPUs on suspend ?
>>=20
>> Cheers,
>> Ben.
>=20
> Yes, we disabled all non-boot CPUs on suspend by calling =
disable_nonboot_cpus().
> The disable_nonboot_cpus() needs IPIs to work. But prior to
> calling disable_nonboot_cpus(), the IPIs are disabled in =
dpm_suspend_noirq().
>=20
> -Chenhui
Benh, Ack?
- k=
^ permalink raw reply
* [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock
From: Shengzhou Liu @ 2012-08-10 10:48 UTC (permalink / raw)
To: linuxppc-dev, linux-usb; +Cc: Shengzhou Liu
In-Reply-To: <1344595712-12804-1-git-send-email-Shengzhou.Liu@freescale.com>
when missing USB PHY clock, kernel booting up will hang during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hanging in this case.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
drivers/usb/host/ehci-fsl.c | 63 ++++++++++++++++++++++++++++++------------
drivers/usb/host/ehci-fsl.h | 1 +
2 files changed, 46 insertions(+), 18 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b7451b2..aeb6d03 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -210,11 +210,11 @@ static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
usb_put_hcd(hcd);
}
-static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
+static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
enum fsl_usb2_phy_modes phy_mode,
unsigned int port_offset)
{
- u32 portsc, temp;
+ u32 portsc, timeout;
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
void __iomem *non_ehci = hcd->regs;
struct device *dev = hcd->self.controller;
@@ -232,9 +232,15 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_ULPI:
if (pdata->controller_ver) {
/* controller version 1.6 or above */
- temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
- out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
- USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL);
+ setbits32(non_ehci + FSL_SOC_USB_CTRL,
+ ULPI_PHY_CLK_SEL);
+ /*
+ * Due to controller issue of PHY_CLK_VALID in ULPI
+ * mode, we set USB_CTRL_USB_EN before checking
+ * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
+ */
+ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+ UTMI_PHY_EN, USB_CTRL_USB_EN);
}
portsc |= PORT_PTS_ULPI;
break;
@@ -247,9 +253,7 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_UTMI:
if (pdata->controller_ver) {
/* controller version 1.6 or above */
- temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
- out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
- UTMI_PHY_EN | USB_CTRL_USB_EN);
+ setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
become stable - 10ms*/
}
@@ -262,23 +266,39 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_NONE:
break;
}
+
+ if ((pdata->controller_ver) && ((phy_mode == FSL_USB2_PHY_ULPI) ||
+ (phy_mode == FSL_USB2_PHY_UTMI))) {
+ for (timeout = 1000; timeout > 0; timeout--) {
+ /* check PHY_CLK_VALID to get phy clk valid */
+ if (in_be32(non_ehci + FSL_SOC_USB_CTRL)
+ & PHY_CLK_VALID)
+ break;
+ udelay(1);
+ }
+ if (timeout == 0) {
+ printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
+ return -EINVAL;
+ }
+ }
+
ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
+
+ if (phy_mode != FSL_USB2_PHY_ULPI)
+ setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
+
+ return 0;
}
-static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
+static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
{
struct usb_hcd *hcd = ehci_to_hcd(ehci);
struct fsl_usb2_platform_data *pdata;
void __iomem *non_ehci = hcd->regs;
- u32 temp;
pdata = hcd->self.controller->platform_data;
- /* Enable PHY interface in the control reg. */
if (pdata->have_sysif_regs) {
- temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
- out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
-
/*
* Turn on cache snooping hardware, since some PowerPC platforms
* wholly rely on hardware to deal with cache coherent
@@ -293,7 +313,8 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
- ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
+ if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
+ return -EINVAL;
if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
unsigned int chip, rev, svr;
@@ -307,9 +328,12 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
ehci->has_fsl_port_bug = 1;
if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
- ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
+ if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
+ return -EINVAL;
+
if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
- ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1);
+ if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
+ return -EINVAL;
}
if (pdata->have_sysif_regs) {
@@ -322,12 +346,15 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
#endif
out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
}
+
+ return 0;
}
/* called after powerup, by probe or system-pm "wakeup" */
static int ehci_fsl_reinit(struct ehci_hcd *ehci)
{
- ehci_fsl_usb_setup(ehci);
+ if (ehci_fsl_usb_setup(ehci))
+ return -EINVAL;
ehci_port_power(ehci, 0);
return 0;
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index 8840368..dbd292e 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -61,4 +61,5 @@
#define PLL_RESET (1<<8)
#define UTMI_PHY_EN (1<<9)
#define ULPI_PHY_CLK_SEL (1<<10)
+#define PHY_CLK_VALID (1<<17)
#endif /* _EHCI_FSL_H */
--
1.6.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0
From: Shengzhou Liu @ 2012-08-10 10:48 UTC (permalink / raw)
To: linuxppc-dev, linux-usb; +Cc: Shengzhou Liu
Add the missing usb controller version info and port0, which is
required during setup usb phy.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 8d35d2c..4f9c9f6 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -345,6 +345,13 @@
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-usb2-mph-0.dtsi"
+ usb@210000 {
+ compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+ port0;
+ };
/include/ "qoriq-usb2-dr-0.dtsi"
+ usb@211000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+ };
/include/ "qoriq-sec4.0-0.dtsi"
};
--
1.6.4
^ permalink raw reply related
* Re: [PATCH v3 0/7] mv643xx.c: Add basic device tree support.
From: Arnd Bergmann @ 2012-08-10 10:49 UTC (permalink / raw)
To: Ian Molton
Cc: thomas.petazzoni, andrew, netdev, devicetree-discuss, ben.dooks,
linuxppc-dev, David Miller, linux-arm-kernel
In-Reply-To: <5023D577.8090001@codethink.co.uk>
On Thursday 09 August 2012, Ian Molton wrote:
> > I think showing one
> > parent device with children at address 0, 1 and 2 is ok.
> Is it acceptable for the child devices to directly access the
> parents register space? because there would be no other
> way for that to work.
Yes, I see no problem with that. As long as all the drivers
agree on who can access what.
> > The driver
> > already knows all those offsets and they are always the same
> > for all variants of mv643xx, right?
> Yes, but its not clean. And no amount of refactoring is
> really going to make a nice driver that also fits the ancient
> (and badly thought out) OF bindings.
In what way is it badly though out, or not clean? The use of
underscores in the properties, and the way that the sram
is configured is problematic, I agree. But The way that
the three ports are addressed and how the PHY is found
seems quite clever.
> If we have to break things, we can at least go for a nice
> clean design, surely?
>
> The ports arent really child devices of the MAC. The MAC
> just has 3 ports.
I don't see the difference between those two things.
> Luckily, it looks like the existing users don't actually use
> the device tree to set up the driver at all, preferring to
> translate their D-T bindings to calls to
> platform_device_register() so all we'd need to do to
> support them is completely ignore them.
>
> We're going to have to maintain a legacy
> platform_device -> DT bindings hack somewhere anyway,
> at least until the remaining other users of the driver
> convert to D-T.
I don't understand why you describe the method used in
powerpc as a hack. It was the normal way to introduce
DT support for platform devices back when it was implemented.
It also had the advantage of not requiring any modifications
to the generic driver, because it was shared between one
architecture using DT (powerpc) and one that didn't (ARM).
Arnd
^ permalink raw reply
* [PATCH v3 2/2] mmc: Use mmc_delay() instead of mdelay() for time delay
From: Chunhe Lan @ 2012-08-10 22:26 UTC (permalink / raw)
To: linux-mmc; +Cc: Shengzhou Liu, kumar.gala, cjb, linuxppc-dev, Chunhe Lan
The mmc_delay() is a wrapper function for mdelay() and msleep().
o mdelay() -- block the system when busy-waiting.
o msleep() -- suspend the currently running task to enable CPU
to process other tasks, so it is non-blocking
regarding the whole system.
When the desired delay time is more than a period of timer interrupt,
just use msleep(). Change mdelay() to mmc_delay() to avoid chewing
CPU when busy wait.
Signed-off-by: Shengzhou Liu <b36685@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Cc: Chris Ball <cjb@laptop.org>
---
drivers/mmc/host/sdhci-esdhc.h | 4 ++--
drivers/mmc/host/sdhci.c | 10 +++++-----
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index b97b2f5..272cea0 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -1,7 +1,7 @@
/*
* Freescale eSDHC controller driver generics for OF and pltfm.
*
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2007, 2012 Freescale Semiconductor, Inc.
* Copyright (c) 2009 MontaVista Software, Inc.
* Copyright (c) 2010 Pengutronix e.K.
* Author: Wolfram Sang <w.sang@pengutronix.de>
@@ -73,7 +73,7 @@ static inline void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
| (div << ESDHC_DIVIDER_SHIFT)
| (pre_div << ESDHC_PREDIV_SHIFT));
sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
- mdelay(1);
+ mmc_delay(1);
out:
host->clock = clock;
}
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 9a11dc3..6e67bc4 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -205,7 +205,7 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
return;
}
timeout--;
- mdelay(1);
+ mmc_delay(1);
}
if (host->ops->platform_reset_exit)
@@ -997,7 +997,7 @@ static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
return;
}
timeout--;
- mdelay(1);
+ mmc_delay(1);
}
mod_timer(&host->timer, jiffies + 10 * HZ);
@@ -1178,7 +1178,7 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
return;
}
timeout--;
- mdelay(1);
+ mmc_delay(1);
}
clk |= SDHCI_CLOCK_CARD_EN;
@@ -1243,7 +1243,7 @@ static int sdhci_set_power(struct sdhci_host *host, unsigned short power)
* can apply clock after applying power
*/
if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)
- mdelay(10);
+ mmc_delay(10);
return power;
}
@@ -1850,7 +1850,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
tuning_loop_counter--;
timeout--;
- mdelay(1);
+ mmc_delay(1);
} while (ctrl & SDHCI_CTRL_EXEC_TUNING);
/*
--
1.7.6.5
^ permalink raw reply related
* [PATCH v3 1/2] mmc: Move mmc_delay() to include/linux/mmc/core.h
From: Chunhe Lan @ 2012-08-10 22:25 UTC (permalink / raw)
To: linux-mmc; +Cc: kumar.gala, cjb, linuxppc-dev, Chunhe Lan
Move mmc_delay() from drivers/mmc/core/core.h to
include/linux/mmc/core.h. So when other functions
call it with include syntax using <linux/mmc/core.h>
of absolute path rather than "../core/core.h" of
relative path.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Cc: Chris Ball <cjb@laptop.org>
---
drivers/mmc/core/core.h | 12 ------------
include/linux/mmc/core.h | 11 +++++++++++
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index 3bdafbc..5f63d00 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -11,8 +11,6 @@
#ifndef _MMC_CORE_CORE_H
#define _MMC_CORE_CORE_H
-#include <linux/delay.h>
-
#define MMC_CMD_RETRIES 3
struct mmc_bus_ops {
@@ -46,16 +44,6 @@ void mmc_set_timing(struct mmc_host *host, unsigned int timing);
void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
void mmc_power_off(struct mmc_host *host);
-static inline void mmc_delay(unsigned int ms)
-{
- if (ms < 1000 / HZ) {
- cond_resched();
- mdelay(ms);
- } else {
- msleep(ms);
- }
-}
-
void mmc_rescan(struct work_struct *work);
void mmc_start_host(struct mmc_host *host);
void mmc_stop_host(struct mmc_host *host);
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 1b431c7..7021658 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -10,6 +10,7 @@
#include <linux/interrupt.h>
#include <linux/completion.h>
+#include <linux/delay.h>
struct request;
struct mmc_data;
@@ -192,6 +193,16 @@ static inline void mmc_claim_host(struct mmc_host *host)
__mmc_claim_host(host, NULL);
}
+static inline void mmc_delay(unsigned int ms)
+{
+ if (ms < 1000 / HZ) {
+ cond_resched();
+ mdelay(ms);
+ } else {
+ msleep(ms);
+ }
+}
+
extern u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
#endif /* LINUX_MMC_CORE_H */
--
1.7.6.5
^ permalink raw reply related
* [PATCH v2 4/4] powerpc/85xx: add support to JOG feature using cpufreq interface
From: Zhao Chenhui @ 2012-08-10 9:45 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: linux-kernel
Some 85xx silicons like MPC8536 and P1022 have a JOG feature, which provides
a dynamic mechanism to lower or raise the CPU core clock at runtime.
This patch adds the support to change CPU frequency using the standard
cpufreq interface. The ratio CORE to CCB can be 1:1(except MPC8536), 3:2,
2:1, 5:2, 3:1, 7:2 and 4:1.
Two CPU cores on P1022 must not in the low power state during the frequency
transition. The driver uses a atomic counter to meet the requirement.
The jog mode frequency transition process on the MPC8536 is similar to
the deep sleep process. The driver need save the CPU state and restore
it after CPU warm reset.
Note:
* The I/O peripherals such as PCIe and eTSEC may lose packets during
the jog mode frequency transition.
* The driver doesn't support MPC8536 Rev 1.0 due to a JOG erratum.
Subsequent revisions of MPC8536 have corrected the erratum.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
---
v2:
* use get/put_online_cpus() to disable/enable cpu hotplug.
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/cpufreq-jog.c | 388 +++++++++++++++++++++++++++++
arch/powerpc/platforms/Kconfig | 11 +
arch/powerpc/sysdev/fsl_pmc.c | 3 +
arch/powerpc/sysdev/fsl_soc.h | 2 +
5 files changed, 405 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/85xx/cpufreq-jog.c
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 8a030a1..6156849 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-y += common.o
obj-$(CONFIG_FSL_PMC) += sleep.o
+obj-$(CONFIG_MPC85xx_CPUFREQ) += cpufreq-jog.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
diff --git a/arch/powerpc/platforms/85xx/cpufreq-jog.c b/arch/powerpc/platforms/85xx/cpufreq-jog.c
new file mode 100644
index 0000000..287987b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/cpufreq-jog.c
@@ -0,0 +1,388 @@
+/*
+ * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
+ * Author: Dave Liu <daveliu@freescale.com>
+ * Modifier: Chenhui Zhao <chenhui.zhao@freescale.com>
+ *
+ * The cpufreq driver is for Freescale 85xx processor,
+ * based on arch/powerpc/platforms/cell/cbe_cpufreq.c
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2005-2007
+ * Christian Krafft <krafft@de.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/cpufreq.h>
+#include <linux/of_platform.h>
+#include <linux/suspend.h>
+#include <linux/cpu.h>
+
+#include <asm/prom.h>
+#include <asm/time.h>
+#include <asm/reg.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/smp.h>
+
+#include <sysdev/fsl_soc.h>
+
+static DEFINE_MUTEX(mpc85xx_switch_mutex);
+static void __iomem *guts;
+
+static u32 sysfreq;
+static unsigned int max_pll[2];
+static atomic_t in_jog_process;
+static struct cpufreq_frequency_table *mpc85xx_freqs;
+static int (*set_pll)(unsigned int cpu, unsigned int pll);
+
+static struct cpufreq_frequency_table mpc8536_freqs_table[] = {
+ {3, 0},
+ {4, 0},
+ {5, 0},
+ {6, 0},
+ {7, 0},
+ {8, 0},
+ {0, CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table p1022_freqs_table[] = {
+ {2, 0},
+ {3, 0},
+ {4, 0},
+ {5, 0},
+ {6, 0},
+ {7, 0},
+ {8, 0},
+ {0, CPUFREQ_TABLE_END},
+};
+
+#define FREQ_500MHz 500000000
+#define FREQ_800MHz 800000000
+
+#define CORE_RATIO_STRIDE 8
+#define CORE_RATIO_MASK 0x3f
+#define CORE_RATIO_SHIFT 16
+
+#define PORPLLSR 0x0 /* Power-On Reset PLL ratio status register */
+
+#define PMJCR 0x7c /* Power Management Jog Control Register */
+#define PMJCR_CORE0_SPD 0x00001000
+#define PMJCR_CORE_SPD 0x00002000
+
+#define POWMGTCSR 0x80 /* Power management control and status register */
+#define POWMGTCSR_JOG 0x00200000
+#define POWMGTCSR_INT_MASK 0x00000f00
+
+static void spin_while_jogging(void *dummy)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+
+ atomic_inc(&in_jog_process);
+
+ while (atomic_read(&in_jog_process) != 0)
+ barrier();
+
+ local_irq_restore(flags);
+}
+
+static int get_pll(int hw_cpu)
+{
+ int shift;
+ u32 val = in_be32(guts + PORPLLSR);
+
+ shift = hw_cpu * CORE_RATIO_STRIDE + CORE_RATIO_SHIFT;
+
+ return (val >> shift) & CORE_RATIO_MASK;
+}
+
+static int mpc8536_set_pll(unsigned int cpu, unsigned int pll)
+{
+ u32 corefreq, val, mask;
+ unsigned int cur_pll = get_pll(0);
+ unsigned long flags;
+
+ if (pll == cur_pll)
+ return 0;
+
+ val = (pll & CORE_RATIO_MASK) << CORE_RATIO_SHIFT;
+
+ corefreq = sysfreq * pll / 2;
+ /*
+ * Set the COREx_SPD bit if the requested core frequency
+ * is larger than the threshold frequency.
+ */
+ if (corefreq > FREQ_800MHz)
+ val |= PMJCR_CORE_SPD;
+
+ mask = (CORE_RATIO_MASK << CORE_RATIO_SHIFT) | PMJCR_CORE_SPD;
+ clrsetbits_be32(guts + PMJCR, mask, val);
+
+ /* readback to sync write */
+ in_be32(guts + PMJCR);
+
+ local_irq_save(flags);
+ mpc85xx_enter_deep_sleep(get_immrbase(), POWMGTCSR_JOG);
+ local_irq_restore(flags);
+
+ /* verify */
+ cur_pll = get_pll(0);
+ if (cur_pll != pll) {
+ pr_err("%s: error. The current PLL is %d instead of %d.\n",
+ __func__, cur_pll, pll);
+ return -1;
+ }
+
+ return 0;
+}
+
+static int p1022_set_pll(unsigned int cpu, unsigned int pll)
+{
+ int index, hw_cpu = get_hard_smp_processor_id(cpu);
+ int shift;
+ u32 corefreq, val, mask = 0;
+ unsigned int cur_pll = get_pll(hw_cpu);
+ unsigned long flags;
+ int ret = 0;
+
+ if (pll == cur_pll)
+ return 0;
+
+ shift = hw_cpu * CORE_RATIO_STRIDE + CORE_RATIO_SHIFT;
+ val = (pll & CORE_RATIO_MASK) << shift;
+
+ corefreq = sysfreq * pll / 2;
+ /*
+ * Set the COREx_SPD bit if the requested core frequency
+ * is larger than the threshold frequency.
+ */
+ if (corefreq > FREQ_500MHz)
+ val |= PMJCR_CORE0_SPD << hw_cpu;
+
+ mask = (CORE_RATIO_MASK << shift) | (PMJCR_CORE0_SPD << hw_cpu);
+ clrsetbits_be32(guts + PMJCR, mask, val);
+
+ /* readback to sync write */
+ in_be32(guts + PMJCR);
+
+ get_online_cpus();
+ /*
+ * A Jog request can not be asserted when any core is in a low
+ * power state on P1022. Before executing a jog request, any
+ * core which is in a low power state must be waked by a
+ * interrupt, and keep waking up until the sequence is
+ * finished.
+ */
+ for_each_present_cpu(index) {
+ if (!cpu_online(index)) {
+ put_online_cpus();
+ pr_err("%s: error, core%d is down.\n", __func__, index);
+ return -1;
+ }
+ }
+
+ atomic_set(&in_jog_process, 0);
+ smp_call_function(spin_while_jogging, NULL, 0);
+
+ local_irq_save(flags);
+
+ /* Wait for the other core to wake. */
+ if (!spin_event_timeout(atomic_read(&in_jog_process) == 1, 1000, 100)) {
+ pr_err("%s: timeout, the other core is not at running state.\n",
+ __func__);
+ ret = -1;
+ goto err;
+ }
+
+ out_be32(guts + POWMGTCSR, POWMGTCSR_JOG | POWMGTCSR_INT_MASK);
+
+ if (!spin_event_timeout(
+ (in_be32(guts + POWMGTCSR) & POWMGTCSR_JOG) == 0, 1000, 100)) {
+ pr_err("%s: timeout, fail to switch the core frequency.\n",
+ __func__);
+ ret = -1;
+ goto err;
+ }
+
+ clrbits32(guts + POWMGTCSR, POWMGTCSR_INT_MASK);
+ in_be32(guts + POWMGTCSR);
+
+ atomic_set(&in_jog_process, 0);
+err:
+ local_irq_restore(flags);
+ put_online_cpus();
+
+ /* verify */
+ cur_pll = get_pll(hw_cpu);
+ if (cur_pll != pll) {
+ pr_err("%s: error, the current PLL of core %d is %d instead of %d.\n",
+ __func__, hw_cpu, cur_pll, pll);
+ return -1;
+ }
+
+ return ret;
+}
+
+/*
+ * cpufreq functions
+ */
+static int mpc85xx_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+ unsigned int i, cur_pll;
+ int hw_cpu = get_hard_smp_processor_id(policy->cpu);
+
+ if (!cpu_present(policy->cpu))
+ return -ENODEV;
+
+ /* the latency of a transition, the unit is ns */
+ policy->cpuinfo.transition_latency = 2000;
+
+ cur_pll = get_pll(hw_cpu);
+
+ /* initialize frequency table */
+ pr_debug("core%d frequency table:\n", hw_cpu);
+ for (i = 0; mpc85xx_freqs[i].frequency != CPUFREQ_TABLE_END; i++) {
+ if (mpc85xx_freqs[i].index <= max_pll[hw_cpu]) {
+ /* The frequency unit is kHz. */
+ mpc85xx_freqs[i].frequency =
+ (sysfreq * mpc85xx_freqs[i].index / 2) / 1000;
+ } else {
+ mpc85xx_freqs[i].frequency = CPUFREQ_ENTRY_INVALID;
+ }
+
+ pr_debug("%d: %dkHz\n", i, mpc85xx_freqs[i].frequency);
+
+ if (mpc85xx_freqs[i].index == cur_pll)
+ policy->cur = mpc85xx_freqs[i].frequency;
+ }
+ pr_debug("current pll is at %d, and core freq is%d\n",
+ cur_pll, policy->cur);
+
+ cpufreq_frequency_table_get_attr(mpc85xx_freqs, policy->cpu);
+
+ /*
+ * This ensures that policy->cpuinfo_min
+ * and policy->cpuinfo_max are set correctly.
+ */
+ return cpufreq_frequency_table_cpuinfo(policy, mpc85xx_freqs);
+}
+
+static int mpc85xx_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+ cpufreq_frequency_table_put_attr(policy->cpu);
+
+ return 0;
+}
+
+static int mpc85xx_cpufreq_verify(struct cpufreq_policy *policy)
+{
+ return cpufreq_frequency_table_verify(policy, mpc85xx_freqs);
+}
+
+static int mpc85xx_cpufreq_target(struct cpufreq_policy *policy,
+ unsigned int target_freq,
+ unsigned int relation)
+{
+ struct cpufreq_freqs freqs;
+ unsigned int new;
+ int ret = 0;
+
+ if (!set_pll)
+ return -ENODEV;
+
+ cpufreq_frequency_table_target(policy,
+ mpc85xx_freqs,
+ target_freq,
+ relation,
+ &new);
+
+ freqs.old = policy->cur;
+ freqs.new = mpc85xx_freqs[new].frequency;
+ freqs.cpu = policy->cpu;
+
+ mutex_lock(&mpc85xx_switch_mutex);
+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+ ret = set_pll(policy->cpu, mpc85xx_freqs[new].index);
+ if (!ret) {
+ pr_info("cpufreq: Setting core%d frequency to %d kHz and PLL ratio to %d:2\n",
+ policy->cpu, mpc85xx_freqs[new].frequency,
+ mpc85xx_freqs[new].index);
+
+ ppc_proc_freq = freqs.new * 1000ul;
+ }
+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+ mutex_unlock(&mpc85xx_switch_mutex);
+
+ return ret;
+}
+
+static struct cpufreq_driver mpc85xx_cpufreq_driver = {
+ .verify = mpc85xx_cpufreq_verify,
+ .target = mpc85xx_cpufreq_target,
+ .init = mpc85xx_cpufreq_cpu_init,
+ .exit = mpc85xx_cpufreq_cpu_exit,
+ .name = "mpc85xx-JOG",
+ .owner = THIS_MODULE,
+ .flags = CPUFREQ_CONST_LOOPS,
+};
+
+static struct of_device_id mpc85xx_jog_ids[] = {
+ { .compatible = "fsl,mpc8536-guts", },
+ { .compatible = "fsl,p1022-guts", },
+ {}
+};
+
+int mpc85xx_jog_probe(void)
+{
+ struct device_node *np;
+ unsigned int svr;
+
+ np = of_find_matching_node(NULL, mpc85xx_jog_ids);
+ if (!np)
+ return -ENODEV;
+
+ guts = of_iomap(np, 0);
+ if (!guts) {
+ of_node_put(np);
+ return -ENODEV;
+ }
+
+ sysfreq = fsl_get_sys_freq();
+
+ if (of_device_is_compatible(np, "fsl,mpc8536-guts")) {
+ svr = mfspr(SPRN_SVR);
+ if ((svr & 0x7fff) == 0x10) {
+ pr_err("MPC8536 Rev 1.0 does not support cpufreq(JOG).\n");
+ of_node_put(np);
+ return -ENODEV;
+ }
+ mpc85xx_freqs = mpc8536_freqs_table;
+ set_pll = mpc8536_set_pll;
+ max_pll[0] = get_pll(0);
+
+ } else if (of_device_is_compatible(np, "fsl,p1022-guts")) {
+ mpc85xx_freqs = p1022_freqs_table;
+ set_pll = p1022_set_pll;
+ max_pll[0] = get_pll(0);
+ max_pll[1] = get_pll(1);
+ }
+
+ pr_info("Freescale MPC85xx cpufreq(JOG) driver\n");
+
+ of_node_put(np);
+ return cpufreq_register_driver(&mpc85xx_cpufreq_driver);
+}
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index e7a896a..a1518af 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -213,6 +213,17 @@ config CPU_FREQ_PMAC64
This adds support for frequency switching on Apple iMac G5,
and some of the more recent desktop G5 machines as well.
+config MPC85xx_CPUFREQ
+ bool "Support for Freescale MPC85xx CPU freq"
+ depends on PPC_85xx && FSL_PMC
+ default n
+ select CPU_FREQ_TABLE
+ help
+ This adds support for dynamic frequency switching on
+ Freescale MPC85xx by cpufreq interface. MPC8536 and P1022
+ have a JOG feature, which provides a dynamic mechanism
+ to lower or raise the CPU core clock at runtime.
+
config PPC_PASEMI_CPUFREQ
bool "Support for PA Semi PWRficient"
depends on PPC_PASEMI
diff --git a/arch/powerpc/sysdev/fsl_pmc.c b/arch/powerpc/sysdev/fsl_pmc.c
index b6c8c8f..b809a1b 100644
--- a/arch/powerpc/sysdev/fsl_pmc.c
+++ b/arch/powerpc/sysdev/fsl_pmc.c
@@ -202,6 +202,9 @@ static int pmc_probe(struct platform_device *pdev)
suspend_set_ops(&pmc_suspend_ops);
+#ifdef CONFIG_MPC85xx_CPUFREQ
+ mpc85xx_jog_probe();
+#endif
pr_info("Freescale PMC driver: sleep(standby)%s\n",
(pmc_flag & PMC_DEEP_SLEEP) ? ", deep sleep(mem)" : "");
return 0;
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index b1510ef..25be25c 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -65,5 +65,7 @@ void fsl_hv_halt(void);
* code can be compatible with both 32-bit & 36-bit.
*/
extern void mpc85xx_enter_deep_sleep(u64 ccsrbar, u32 powmgtreq);
+
+extern int mpc85xx_jog_probe(void);
#endif
#endif
--
1.6.4.1
^ permalink raw reply related
* Re: [PATCH 3/4] cpu: export cpu hotplug disable/enable functions as global functions
From: Zhao Chenhui @ 2012-08-10 9:41 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: linux-kernel
In-Reply-To: <1344329006-10645-3-git-send-email-chenhui.zhao@freescale.com>
On Tue, Aug 07, 2012 at 04:43:25PM +0800, Zhao Chenhui wrote:
> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
> Therefore, the related functions should be exported.
>
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> ---
> include/linux/cpu.h | 4 ++++
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/include/linux/cpu.h b/include/linux/cpu.h
> index ce7a074..df8f73d 100644
> --- a/include/linux/cpu.h
> +++ b/include/linux/cpu.h
> @@ -146,6 +146,8 @@ void notify_cpu_starting(unsigned int cpu);
> extern void cpu_maps_update_begin(void);
> extern void cpu_maps_update_done(void);
>
> +extern void cpu_hotplug_disable_before_freeze(void);
> +extern void cpu_hotplug_enable_after_thaw(void);
> #else /* CONFIG_SMP */
>
> #define cpu_notifier(fn, pri) do { (void)(fn); } while (0)
> @@ -167,6 +169,8 @@ static inline void cpu_maps_update_done(void)
> {
> }
>
> +static inline void cpu_hotplug_disable_before_freeze(void) {}
> +static inline void cpu_hotplug_enable_after_thaw(void) {}
> #endif /* CONFIG_SMP */
> extern struct bus_type cpu_subsys;
>
> --
> 1.6.4.1
>
Hi kumar,
I will not use these API in the 4/4 patch. please ignore this patch.
-Chenhui
^ permalink raw reply
* Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
From: Michael Ellerman @ 2012-08-10 9:00 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1344589138.27290.18.camel@concordia>
On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
> On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
> > Sicne a few days, powerpc allmodconfig fails with:
> >
> > ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
> > make[2]: *** [__modpost] Error 1
> > make[1]: *** [modules] Error 2
> >
> > http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/
>
>
> Yep, modular build is broken.
>
> Since this commit by the looks of it:
>
> commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
> Author: Liu Yu-B13201 <Yu.Liu@freescale.com>
> Date: Tue Jul 3 05:48:56 2012 +0000
>
> PPC: Don't use hardcoded opcode for ePAPR hcall invocation
>
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
And this address bounces, nice.
cheers
^ permalink raw reply
* Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
From: Michael Ellerman @ 2012-08-10 8:58 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux-Next, linuxppc-dev, stuart.yoder, yu.liu, Timur Tabi
In-Reply-To: <CAMuHMdV9dgjdHuz3avU1dubyekcZwT70x=5W+CL7iHQuoC1n_w@mail.gmail.com>
On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
> Sicne a few days, powerpc allmodconfig fails with:
>
> ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
> make[2]: *** [__modpost] Error 1
> make[1]: *** [modules] Error 2
>
> http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/
Yep, modular build is broken.
Since this commit by the looks of it:
commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
Author: Liu Yu-B13201 <Yu.Liu@freescale.com>
Date: Tue Jul 3 05:48:56 2012 +0000
PPC: Don't use hardcoded opcode for ePAPR hcall invocation
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
cheers
^ permalink raw reply
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