* [PATCH v4 10/13] Update NUMA VDSO information when updating CPU maps
From: Nathan Fontenot @ 2013-04-24 16:03 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <5177FB74.2050709@linux.vnet.ibm.com>
From: Jesse Larrew <jlarrew@linux.vnet.ibm.com>
The following patch adds vdso_getcpu_init(), which stores the NUMA node for
a cpu in SPRG3:
Commit 18ad51dd34 ("powerpc: Add VDSO version of getcpu") adds
vdso_getcpu_init(), which stores the NUMA node for a cpu in SPRG3.
This patch ensures that this information is also updated when the NUMA
affinity of a cpu changes.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
---
arch/powerpc/mm/numa.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/mm/numa.c
===================================================================
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:26:54.000000000 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:28:21.000000000 -0500
@@ -30,6 +30,7 @@
#include <asm/paca.h>
#include <asm/hvcall.h>
#include <asm/setup.h>
+#include <asm/vdso.h>
static int numa_enabled = 1;
@@ -1434,6 +1435,7 @@
unregister_cpu_under_node(update->cpu, update->old_nid);
unmap_cpu_from_node(update->cpu);
map_cpu_to_node(update->cpu, update->new_nid);
+ vdso_getcpu_init();
register_cpu_under_node(update->cpu, update->new_nid);
}
@@ -1449,6 +1451,7 @@
unsigned int cpu, changed = 0;
struct topology_update_data *updates, *ud;
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
+ cpumask_t updated_cpus;
struct device *dev;
int weight, i = 0;
@@ -1460,6 +1463,8 @@
if (!updates)
return 0;
+ cpumask_clear(&updated_cpus);
+
for_each_cpu(cpu, &cpu_associativity_changes_mask) {
ud = &updates[i++];
ud->cpu = cpu;
@@ -1470,12 +1475,13 @@
ud->new_nid = first_online_node;
ud->old_nid = numa_cpu_lookup_table[cpu];
+ cpumask_set_cpu(cpu, &updated_cpus);
if (i < weight)
ud->next = &updates[i];
}
- stop_machine(update_cpu_topology, &updates[0], cpu_online_mask);
+ stop_machine(update_cpu_topology, &updates[0], &updated_cpus);
for (ud = &updates[0]; ud; ud = ud->next) {
dev = get_cpu_device(ud->cpu);
^ permalink raw reply
* [PATCH v4 11/13] RE-enable Virtual Processor Home Node updating
From: Nathan Fontenot @ 2013-04-24 16:05 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <5177FB74.2050709@linux.vnet.ibm.com>
From: Jesse Larrew <jlarrew@linux.vnet.ibm.com>
The new PRRN firmware feature provides a more convenient and event-driven
interface than VPHN for notifying Linux of changes to the NUMA affinity of
platform resources. However, for practical reasons, it may not be feasible
for some customers to update to the latest firmware. For these customers,
the VPHN feature supported on previous firmware versions may still be the
best option.
The VPHN feature was previously disabled due to races with the load
balancing code when accessing the NUMA cpu maps, but the new stop_machine()
approach protects the NUMA cpu maps from these concurrent accesses. It
should be safe to re-enable this feature now.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
---
arch/powerpc/mm/numa.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
Index: powerpc/arch/powerpc/mm/numa.c
===================================================================
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:28:21.000000000 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 15:29:39.000000000 -0500
@@ -1572,9 +1572,8 @@
vphn_enabled = 0;
rc = of_reconfig_notifier_register(&dt_update_nb);
}
- } else if (0 && firmware_has_feature(FW_FEATURE_VPHN) &&
+ } else if (firmware_has_feature(FW_FEATURE_VPHN) &&
get_lppaca()->shared_proc) {
- /* Disabled until races with load balancing are fixed */
if (!vphn_enabled) {
prrn_enabled = 0;
vphn_enabled = 1;
^ permalink raw reply
* [PATCH v4 13/13] Add /proc interface to control topology updates
From: Nathan Fontenot @ 2013-04-24 16:07 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <5177FB74.2050709@linux.vnet.ibm.com>
There are instances in which we do not want topology updates to occur.
In order to allow this a /proc interface (/proc/powerpc/topology_updates)
is introduced so that topology updates can be enabled and disabled.
This patch also adds a prrn_is_enabled() call so that PRRN events are
handled in the kernel only if topology updating is enabled.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/topology.h | 5 ++
arch/powerpc/kernel/rtasd.c | 7 ++--
arch/powerpc/mm/numa.c | 62 +++++++++++++++++++++++++++++++++++-
3 files changed, 71 insertions(+), 3 deletions(-)
Index: powerpc/arch/powerpc/mm/numa.c
===================================================================
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-04-23 15:29:39.000000000 -0500
+++ powerpc/arch/powerpc/mm/numa.c 2013-04-23 19:30:33.000000000 -0500
@@ -23,6 +23,9 @@
#include <linux/cpuset.h>
#include <linux/node.h>
#include <linux/stop_machine.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/uaccess.h>
#include <asm/sparsemem.h>
#include <asm/prom.h>
#include <asm/smp.h>
@@ -1585,7 +1588,6 @@
return rc;
}
-__initcall(start_topology_update);
/*
* Disable polling for VPHN associativity changes.
@@ -1604,4 +1606,62 @@
return rc;
}
+
+int prrn_is_enabled(void)
+{
+ return prrn_enabled;
+}
+
+static int topology_read(struct seq_file *file, void *v)
+{
+ if (vphn_enabled || prrn_enabled)
+ seq_puts(file, "on\n");
+ else
+ seq_puts(file, "off\n");
+
+ return 0;
+}
+
+static int topology_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, topology_read, NULL);
+}
+
+static ssize_t topology_write(struct file *file, const char __user *buf,
+ size_t count, loff_t *off)
+{
+ char kbuf[4]; /* "on" or "off" plus null. */
+ int read_len;
+
+ read_len = count < 3 ? count : 3;
+ if (copy_from_user(kbuf, buf, read_len))
+ return -EINVAL;
+
+ kbuf[read_len] = '\0';
+
+ if (!strncmp(kbuf, "on", 2))
+ start_topology_update();
+ else if (!strncmp(kbuf, "off", 3))
+ stop_topology_update();
+ else
+ return -EINVAL;
+
+ return count;
+}
+
+static const struct file_operations topology_ops = {
+ .read = seq_read,
+ .write = topology_write,
+ .open = topology_open,
+ .release = single_release
+};
+
+static int topology_update_init(void)
+{
+ start_topology_update();
+ proc_create("powerpc/topology_updates", 644, NULL, &topology_ops);
+
+ return 0;
+}
+device_initcall(topology_update_init);
#endif /* CONFIG_PPC_SPLPAR */
Index: powerpc/arch/powerpc/include/asm/topology.h
===================================================================
--- powerpc.orig/arch/powerpc/include/asm/topology.h 2013-04-23 12:54:22.000000000 -0500
+++ powerpc/arch/powerpc/include/asm/topology.h 2013-04-23 19:31:57.000000000 -0500
@@ -71,6 +71,7 @@
#if defined(CONFIG_NUMA) && defined(CONFIG_PPC_SPLPAR)
extern int start_topology_update(void);
extern int stop_topology_update(void);
+extern int prrn_is_enabled(void);
#else
static inline int start_topology_update(void)
{
@@ -80,6 +81,10 @@
{
return 0;
}
+static inline int prrn_is_enabled(void)
+{
+ return 0;
+}
#endif /* CONFIG_NUMA && CONFIG_PPC_SPLPAR */
#include <asm-generic/topology.h>
Index: powerpc/arch/powerpc/kernel/rtasd.c
===================================================================
--- powerpc.orig/arch/powerpc/kernel/rtasd.c 2013-04-23 13:52:08.000000000 -0500
+++ powerpc/arch/powerpc/kernel/rtasd.c 2013-04-23 17:47:09.000000000 -0500
@@ -29,6 +29,7 @@
#include <asm/nvram.h>
#include <linux/atomic.h>
#include <asm/machdep.h>
+#include <asm/topology.h>
static DEFINE_SPINLOCK(rtasd_log_lock);
@@ -292,11 +293,13 @@
static void handle_rtas_event(const struct rtas_error_log *log)
{
- if (log->type == RTAS_TYPE_PRRN)
+ if (log->type == RTAS_TYPE_PRRN) {
/* For PRRN Events the extended log length is used to denote
* the scope for calling rtas update-nodes.
*/
- prrn_schedule_update(log->extended_log_length);
+ if (prrn_is_enabled())
+ prrn_schedule_update(log->extended_log_length);
+ }
return;
}
^ permalink raw reply
* [PATCH v4 12/13] Enable PRRN handling
From: Nathan Fontenot @ 2013-04-24 16:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <5177FB74.2050709@linux.vnet.ibm.com>
The Linux kernel and platform firmware negotiate their mutual support
of the PRRN option via the ibm,client-architecture-support interface.
This patch simply sets the appropriate fields in the client architecture
vector to indicate Linux support for PRRN and will allow the firmware to
report PRRN events via the RTAS event-scan mechanism.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
---
arch/powerpc/kernel/prom_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: powerpc/arch/powerpc/kernel/prom_init.c
===================================================================
--- powerpc.orig/arch/powerpc/kernel/prom_init.c 2013-04-23 14:46:23.000000000 -0500
+++ powerpc/arch/powerpc/kernel/prom_init.c 2013-04-23 15:30:36.000000000 -0500
@@ -698,7 +698,7 @@
#else
0,
#endif
- OV5_FEAT(OV5_TYPE1_AFFINITY),
+ OV5_FEAT(OV5_TYPE1_AFFINITY) | OV5_FEAT(OV5_PRRN),
0,
0,
0,
^ permalink raw reply
* Re: [PATCH] powerpc: Add isync to copy_and_flush
From: Benjamin Herrenschmidt @ 2013-04-24 16:36 UTC (permalink / raw)
To: Michael Neuling; +Cc: Linux PPC dev, miltonm, Nishanth Aravamudan
In-Reply-To: <29244.1366799409@ale.ozlabs.ibm.com>
On Wed, 2013-04-24 at 20:30 +1000, Michael Neuling wrote:
> benh: we should get this in 3.9 ASAP.
Considering that the bug has been there *forever* I don't think I have a
real standing to try to shove it down Linus throat as a "regression
fix" :-)
I'll put the fix in 3.10 and let it trickle down to stable.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Add HWCAP2 aux entry
From: Andrew Morton @ 2013-04-24 19:36 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Michael Neuling, vda.linux, Nishanth Aravamudan, linux-kernel,
Steve Munroe, paulus, viro, Ryan Arnold, linuxppc-dev
In-Reply-To: <1366677702.2886.9.camel@pasglop>
On Tue, 23 Apr 2013 10:41:42 +1000 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> On Thu, 2013-04-18 at 13:41 +1000, Michael Neuling wrote:
> > akpm,
> >
> > If you're happy with this, is it something you can take in your tree?
>
> Andrew ? Or give me an ack ? :-) I'm happy to carry this, we need that
> rather urgently and we have the glibc folks on board.
Looks good to me - please proceed with the patch.
^ permalink raw reply
* Re: [PATCH v2 7/8] powerpc/pseries: Read of-config partition via pstore
From: Kees Cook @ 2013-04-24 20:43 UTC (permalink / raw)
To: Aruna Balakrishnaiah
Cc: jkenisto, Tony Luck, Colin Cross, LKML, Anton Vorontsov,
linuxppc-dev, paulus, anton, mahesh
In-Reply-To: <20130424062052.7341.18551.stgit@aruna-ThinkPad-T420>
On Tue, Apr 23, 2013 at 11:20 PM, Aruna Balakrishnaiah
<aruna@linux.vnet.ibm.com> wrote:
> This patch set exploits the pstore subsystem to read details of
> of-config partition in NVRAM to a separate file in /dev/pstore.
> For instance, of-config partition details will be stored in a
> file named [of-nvram-5].
>
> Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com>
> Reviewed-by: Jim Keniston <jkenisto@us.ibm.com>
> ---
> arch/powerpc/platforms/pseries/nvram.c | 55 +++++++++++++++++++++++++++-----
> fs/pstore/inode.c | 3 ++
> include/linux/pstore.h | 1 +
> 3 files changed, 50 insertions(+), 9 deletions(-)
>
> diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
> index b118382..de448af 100644
> --- a/arch/powerpc/platforms/pseries/nvram.c
> +++ b/arch/powerpc/platforms/pseries/nvram.c
> @@ -132,9 +132,16 @@ static size_t oops_data_sz;
> static struct z_stream_s stream;
>
> #ifdef CONFIG_PSTORE
> +static struct nvram_os_partition of_config_partition = {
> + .name = "of-config",
> + .index = -1,
> + .os_partition = false
> +};
> +
> static enum pstore_type_id nvram_type_ids[] = {
> PSTORE_TYPE_DMESG,
> PSTORE_TYPE_RTAS,
> + PSTORE_TYPE_OF,
> -1
> };
> static int read_type;
> @@ -332,10 +339,15 @@ int nvram_read_partition(struct nvram_os_partition *part, char *buff,
>
> tmp_index = part->index;
>
> - rc = ppc_md.nvram_read((char *)&info, sizeof(struct err_log_info), &tmp_index);
> - if (rc <= 0) {
> - pr_err("%s: Failed nvram_read (%d)\n", __FUNCTION__, rc);
> - return rc;
> + if (part->os_partition) {
> + rc = ppc_md.nvram_read((char *)&info,
> + sizeof(struct err_log_info),
> + &tmp_index);
> + if (rc <= 0) {
> + pr_err("%s: Failed nvram_read (%d)\n", __FUNCTION__,
> + rc);
> + return rc;
> + }
> }
>
> rc = ppc_md.nvram_read(buff, length, &tmp_index);
> @@ -344,8 +356,10 @@ int nvram_read_partition(struct nvram_os_partition *part, char *buff,
> return rc;
> }
>
> - *error_log_cnt = info.seq_num;
> - *err_type = info.error_type;
> + if (part->os_partition) {
> + *error_log_cnt = info.seq_num;
> + *err_type = info.error_type;
> + }
>
> return 0;
> }
> @@ -516,7 +530,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
> }
>
> /*
> - * Reads the oops/panic report and ibm,rtas-log partition.
> + * Reads the oops/panic report, rtas and of-config partition.
> * Returns the length of the data we read from each partition.
> * Returns 0 if we've been called before.
> */
> @@ -525,9 +539,11 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
> struct pstore_info *psi)
> {
> struct oops_log_info *oops_hdr;
> - unsigned int err_type, id_no;
> + unsigned int err_type, id_no, size = 0;
> struct nvram_os_partition *part = NULL;
> char *buff = NULL;
> + int sig = 0;
> + loff_t p;
>
> read_type++;
>
> @@ -542,10 +558,29 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
> time->tv_sec = last_rtas_event;
> time->tv_nsec = 0;
> break;
> + case PSTORE_TYPE_OF:
> + sig = NVRAM_SIG_OF;
> + part = &of_config_partition;
> + *type = PSTORE_TYPE_OF;
> + *id = PSTORE_TYPE_OF;
> + time->tv_sec = 0;
> + time->tv_nsec = 0;
> + break;
> default:
> return 0;
> }
>
> + if (!part->os_partition) {
> + p = nvram_find_partition(part->name, sig, &size);
> + if (p <= 0) {
> + pr_err("nvram: Failed to find partition %s, "
> + "err %d\n", part->name, (int)p);
> + return 0;
> + }
> + part->index = p;
> + part->size = size;
> + }
> +
> buff = kmalloc(part->size, GFP_KERNEL);
>
> if (!buff)
> @@ -557,7 +592,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
> }
>
> *count = 0;
> - *id = id_no;
> +
> + if (part->os_partition)
> + *id = id_no;
>
> if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
> oops_hdr = (struct oops_log_info *)buff;
> diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
> index ec24f9c..8d4fb65 100644
> --- a/fs/pstore/inode.c
> +++ b/fs/pstore/inode.c
> @@ -327,6 +327,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname, u64 id, int count,
> case PSTORE_TYPE_PPC_RTAS:
> sprintf(name, "rtas-%s-%lld", psname, id);
> break;
> + case PSTORE_TYPE_PPC_OF:
> + sprintf(name, "of-%s-%lld", psname, id);
> + break;
> case PSTORE_TYPE_UNKNOWN:
> sprintf(name, "unknown-%s-%lld", psname, id);
> break;
> diff --git a/include/linux/pstore.h b/include/linux/pstore.h
> index d7a8fe9..615dc18 100644
> --- a/include/linux/pstore.h
> +++ b/include/linux/pstore.h
> @@ -37,6 +37,7 @@ enum pstore_type_id {
> PSTORE_TYPE_FTRACE = 3,
> /* PPC64 partition types */
> PSTORE_TYPE_PPC_RTAS = 4,
> + PSTORE_TYPE_PPC_OF = 5,
> PSTORE_TYPE_UNKNOWN = 255
> };
>
>
Should this be named just "PSTORE_TYPE_OF" instead of "...PPC_OF"?
-Kees
--
Kees Cook
Chrome OS Security
^ permalink raw reply
* Re: [PATCH v2 0/8] powerpc/pseries: Nvram-to-pstore
From: Kees Cook @ 2013-04-24 20:45 UTC (permalink / raw)
To: Aruna Balakrishnaiah
Cc: jkenisto, Tony Luck, Colin Cross, LKML, Anton Vorontsov,
linuxppc-dev, paulus, anton, mahesh
In-Reply-To: <20130424061807.7341.909.stgit@aruna-ThinkPad-T420>
On Tue, Apr 23, 2013 at 11:19 PM, Aruna Balakrishnaiah
<aruna@linux.vnet.ibm.com> wrote:
> Currently the kernel provides the contents of p-series NVRAM only as a
> simple stream of bytes via /dev/nvram, which must be interpreted in user
> space by the nvram command in the powerpc-utils package. This patch set
> exploits the pstore subsystem to expose each partition in NVRAM as a
> separate file in /dev/pstore. For instance Oops messages will stored in a
> file named [dmesg-nvram-2].
>
> Changes from v1:
> - Reduce #ifdefs by and remove forward declarations of pstore callbacks
> - Handle return value of nvram_write_os_partition
> - Remove empty pstore callbacks and register pstore only when pstore
> is configured
>
> ---
>
> Aruna Balakrishnaiah (8):
> powerpc/pseries: Remove syslog prefix in uncompressed oops text
> powerpc/pseries: Add version and timestamp to oops header
> powerpc/pseries: Introduce generic read function to read nvram-partitions
> powerpc/pseries: Read/Write oops nvram partition via pstore
> powerpc/pseries: Read rtas partition via pstore
> powerpc/pseries: Distinguish between a os-partition and non-os partition
> powerpc/pseries: Read of-config partition via pstore
> powerpc/pseries: Read common partition via pstore
>
>
> arch/powerpc/platforms/pseries/nvram.c | 353 +++++++++++++++++++++++++++-----
> fs/pstore/inode.c | 9 +
> include/linux/pstore.h | 4
> 3 files changed, 313 insertions(+), 53 deletions(-)
This series looks good! Other than the naming conventions (are these
new pstore types really PPC-only?) I think it's a fine addition.
Thanks!
-Kees
--
Kees Cook
Chrome OS Security
^ permalink raw reply
* Re: [PATCH 4/7] powerpc/powernv: Patch MSI EOI handler on P8
From: Benjamin Herrenschmidt @ 2013-04-24 20:49 UTC (permalink / raw)
To: Gavin Shan; +Cc: linuxppc-dev
In-Reply-To: <1366796259-29412-5-git-send-email-shangw@linux.vnet.ibm.com>
On Wed, 2013-04-24 at 17:37 +0800, Gavin Shan wrote:
> The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
> steps to handle the P/Q bits in IVE before EOIing the corresponding
> interrupt. The patch changes the EOI handler to cover that.
.../...
> static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
> {
> unsigned int count;
> @@ -667,6 +681,8 @@ static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
> }
>
> phb->msi_setup = pnv_pci_ioda_msi_setup;
> + if (phb->type == PNV_PHB_IODA2)
> + phb->msi_eoi = pnv_pci_ioda_msi_eoi;
Ouch, another function pointer call in a hot path...
> phb->msi32_support = 1;
> pr_info(" Allocated bitmap for %d MSIs (base IRQ 0x%x)\n",
> count, phb->msi_base);
> diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
> index a11b5a6..ea6a93d 100644
> --- a/arch/powerpc/platforms/powernv/pci.c
> +++ b/arch/powerpc/platforms/powernv/pci.c
> @@ -115,6 +115,25 @@ static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
> irq_dispose_mapping(entry->irq);
> }
> }
> +
> +int pnv_pci_msi_eoi(unsigned int hw_irq)
> +{
> + struct pci_controller *hose, *tmp;
> + struct pnv_phb *phb = NULL;
> +
> + list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
> + phb = hose->private_data;
> + if (hw_irq >= phb->msi_base &&
> + hw_irq < phb->msi_base + phb->msi_bmp.irq_count) {
> + if (!phb->msi_eoi)
> + return -EEXIST;
> + return phb->msi_eoi(phb, hw_irq);
> + }
> + }
> +
> + /* For LSI interrupts, we needn't do it */
> + return 0;
> +}
And a list walk ... that's not right.
Also, you do it for all XICS interrupts, including the non-PCI ones, the
LSIs, etc... only to figure out that some might not be MSIs later in
the loop.
Why not instead look at changing the irq_chip for the MSIs ?
IE. When setting up the MSIs for IODA2, use a different irq_chip which
is a copy of the original one with a different ->eoi callback, which
does the original xics eoi and then the OPAL stuff ?
You might even be able to use something like container_of to get back
to the struct phb, no need to iterate them all.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 5/7] powerpc/powernv: TCE invalidation for PHB3
From: Benjamin Herrenschmidt @ 2013-04-24 20:52 UTC (permalink / raw)
To: Gavin Shan; +Cc: linuxppc-dev
In-Reply-To: <1366796259-29412-6-git-send-email-shangw@linux.vnet.ibm.com>
> diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
> index cbfe678..0db308e 100644
> --- a/arch/powerpc/include/asm/iommu.h
> +++ b/arch/powerpc/include/asm/iommu.h
> @@ -76,6 +76,7 @@ struct iommu_table {
> struct iommu_pool large_pool;
> struct iommu_pool pools[IOMMU_NR_POOLS];
> unsigned long *it_map; /* A simple allocation bitmap for now */
> + void *sysdata;
> };
You should be able to avoid adding that field by using the container_of
trick to get to the PE and moving the iommu ops for ioda into pci-ioda.c
instead of sharing them with the non-ioda stuff.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 1/3] rapidio: make enumeration/discovery configurable
From: Andrew Morton @ 2013-04-24 21:37 UTC (permalink / raw)
To: Alexandre Bounine
Cc: Micha Nelissen, linux-kernel, Andre van Herk, linuxppc-dev
In-Reply-To: <1366813919-13766-2-git-send-email-alexandre.bounine@idt.com>
On Wed, 24 Apr 2013 10:31:57 -0400 Alexandre Bounine <alexandre.bounine@idt.com> wrote:
> Rework to implement RapidIO enumeration/discovery method selection
> combined with ability to use enumeration/discovery as a kernel module.
>
> This patch adds ability to introduce new RapidIO enumeration/discovery methods
> using kernel configuration options or loadable modules. Configuration option
> mechanism allows to select built-in or modular enumeration/discovery method from
> the list of existing methods or use external modules.
> If a modular enumeration/discovery is selected each RapidIO mport device can
> have its own method attached to it.
>
> The currently existing enumeration/discovery code was updated to be used
> as built-in or modular method. This configuration option is named "Basic
> enumeration/discovery" method.
>
> Several common routines have been moved from rio-scan.c to make them available
> to other enumeration methods and reduce number of exported symbols.
>
> ...
>
> @@ -1421,3 +1295,46 @@ enum_done:
> bail:
> return -EBUSY;
> }
> +
> +struct rio_scan rio_scan_ops = {
> + .enumerate = rio_enum_mport,
> + .discover = rio_disc_mport,
> +};
> +
> +
> +#ifdef MODULE
Why the `ifdef MODULE'? The module parameters are still accessible if
the driver is statically linked and we do want the driver to behave in
the same way regardless of how it was linked and loaded.
> +static bool scan;
> +module_param(scan, bool, 0);
> +MODULE_PARM_DESC(scan, "Start RapidIO network enumeration/discovery "
> + "(default = 1)");
> +
> +/**
> + * rio_basic_attach:
> + *
> + * When this enumeration/discovery method is loaded as a module this function
> + * registers its specific enumeration and discover routines for all available
> + * RapidIO mport devices. The "scan" command line parameter controls ability of
> + * the module to start RapidIO enumeration/discovery automatically.
> + *
> + * Returns 0 for success or -EIO if unable to register itself.
> + *
> + * This enumeration/discovery method cannot be unloaded and therefore does not
> + * provide a matching cleanup_module routine.
> + */
> +
> +int __init rio_basic_attach(void)
static
> +{
> + if (rio_register_scan(RIO_MPORT_ANY, &rio_scan_ops))
> + return -EIO;
> + if (scan)
> + rio_init_mports();
> + return 0;
> +}
> +
> +module_init(rio_basic_attach);
> +
> +MODULE_DESCRIPTION("Basic RapidIO enumeration/discovery");
> +MODULE_LICENSE("GPL");
> +
> +#endif /* MODULE */
> diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
> index d553b5d..e36628a 100644
> --- a/drivers/rapidio/rio.c
> +++ b/drivers/rapidio/rio.c
> @@ -31,6 +31,9 @@
>
> #include "rio.h"
>
> +LIST_HEAD(rio_devices);
static?
> +DEFINE_SPINLOCK(rio_global_list_lock);
static?
> +
> static LIST_HEAD(rio_mports);
> static unsigned char next_portid;
> static DEFINE_SPINLOCK(rio_mmap_lock);
>
> ...
>
> +/**
> + * rio_switch_init - Sets switch operations for a particular vendor switch
> + * @rdev: RIO device
> + * @do_enum: Enumeration/Discovery mode flag
> + *
> + * Searches the RIO switch ops table for known switch types. If the vid
> + * and did match a switch table entry, then call switch initialization
> + * routine to setup switch-specific routines.
> + */
> +void rio_switch_init(struct rio_dev *rdev, int do_enum)
> +{
> + struct rio_switch_ops *cur = __start_rio_switch_ops;
> + struct rio_switch_ops *end = __end_rio_switch_ops;
huh, I hadn't noticed that RIO has its very own vmlinux section. How
peculair.
> + while (cur < end) {
> + if ((cur->vid == rdev->vid) && (cur->did == rdev->did)) {
> + pr_debug("RIO: calling init routine for %s\n",
> + rio_name(rdev));
> + cur->init_hook(rdev, do_enum);
> + break;
> + }
> + cur++;
> + }
> +
> + if ((cur >= end) && (rdev->pef & RIO_PEF_STD_RT)) {
> + pr_debug("RIO: adding STD routing ops for %s\n",
> + rio_name(rdev));
> + rdev->rswitch->add_entry = rio_std_route_add_entry;
> + rdev->rswitch->get_entry = rio_std_route_get_entry;
> + rdev->rswitch->clr_table = rio_std_route_clr_table;
> + }
> +
> + if (!rdev->rswitch->add_entry || !rdev->rswitch->get_entry)
> + printk(KERN_ERR "RIO: missing routing ops for %s\n",
> + rio_name(rdev));
> +}
> +EXPORT_SYMBOL_GPL(rio_switch_init);
>
> ...
>
> +int rio_register_scan(int mport_id, struct rio_scan *scan_ops)
> +{
> + struct rio_mport *port;
> + int rc = -EBUSY;
> +
> + list_for_each_entry(port, &rio_mports, node) {
How come the driver has no locking for rio_mports? If a bugfix isn't
needed here then a code comment is!
> + if (port->id == mport_id || mport_id == RIO_MPORT_ANY) {
> + if (port->nscan && mport_id == RIO_MPORT_ANY)
> + continue;
> + else if (port->nscan)
> + break;
> +
> + port->nscan = scan_ops;
> + rc = 0;
> +
> + if (mport_id != RIO_MPORT_ANY)
> + break;
> + }
> + }
> +
> + return rc;
> +}
>
> ...
>
^ permalink raw reply
* Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500
From: Scott Wood @ 2013-04-24 22:38 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: linuxppc-dev, linux-kernel, r58472
In-Reply-To: <20130424112929.GC3172@localhost.localdomain>
On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
> On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
> > On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
> > >From: Chen-Hui Zhao <chenhui.zhao@freescale.com>
> > >
> > >For e6500, two threads in one core share one time base. Just need
> > >to do time base sync on first thread of one core, and skip it on
> > >the other thread.
> > >
> > >Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> > >Signed-off-by: Li Yang <leoli@freescale.com>
> > >Signed-off-by: Andy Fleming <afleming@freescale.com>
> > >---
> > > arch/powerpc/platforms/85xx/smp.c | 52
> > >+++++++++++++++++++++++++++++++-----
> > > 1 files changed, 44 insertions(+), 8 deletions(-)
> > >
> > >diff --git a/arch/powerpc/platforms/85xx/smp.c
> > >b/arch/powerpc/platforms/85xx/smp.c
> > >index 74d8cde..5f3eee3 100644
> > >--- a/arch/powerpc/platforms/85xx/smp.c
> > >+++ b/arch/powerpc/platforms/85xx/smp.c
> > >@@ -26,6 +26,7 @@
> > > #include <asm/cacheflush.h>
> > > #include <asm/dbell.h>
> > > #include <asm/fsl_guts.h>
> > >+#include <asm/cputhreads.h>
> > >
> > > #include <sysdev/fsl_soc.h>
> > > #include <sysdev/mpic.h>
> > >@@ -45,6 +46,7 @@ static u64 timebase;
> > > static int tb_req;
> > > static int tb_valid;
> > > static u32 cur_booting_core;
> > >+static bool rcpmv2;
> > >
> > > #ifdef CONFIG_PPC_E500MC
> > > /* get a physical mask of online cores and booting core */
> > >@@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void)
> > > u32 mask;
> > > int cpu;
> > >
> > >- mask =3D 1 << cur_booting_core;
> > >- for_each_online_cpu(cpu)
> > >- mask |=3D 1 << get_hard_smp_processor_id(cpu);
> > >+ if (smt_capable()) {
> > >+ /* two threads in one core share one time base */
> > >+ mask =3D 1 << cpu_core_index_of_thread(cur_booting_core);
> > >+ for_each_online_cpu(cpu)
> > >+ mask |=3D 1 << cpu_core_index_of_thread(
> > >+ get_hard_smp_processor_id(cpu));
> > >+ } else {
> > >+ mask =3D 1 << cur_booting_core;
> > >+ for_each_online_cpu(cpu)
> > >+ mask |=3D 1 << get_hard_smp_processor_id(cpu);
> > >+ }
> >
> > Where is smt_capable defined()? I assume somewhere in the patchset
> > but it's a pain to search 12 patches...
> >
>=20
> It is defined in arch/powerpc/include/asm/topology.h.
> #define smt_capable() (cpu_has_feature(CPU_FTR_SMT))
>=20
> Thanks for your review again.
We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't claim =20
that feature yet, except in our SDK kernel. That doesn't change the =20
topology of CPU numbering.
> > Is this really about whether we're SMT-capable or whether we have
> > rcpm v2?
> >
> > -Scott
>=20
> I think this "if" statement can be removed. The =20
> cpu_core_index_of_thread()
> can return the correct cpu number with thread or without thread.
>=20
> Like this:
> static inline u32 get_phy_cpu_mask(void)
> {
> u32 mask;
> int cpu;
>=20
> mask =3D 1 << cpu_core_index_of_thread(cur_booting_core);
> for_each_online_cpu(cpu)
> mask |=3D 1 << cpu_core_index_of_thread(
> get_hard_smp_processor_id(cpu));
>=20
> return mask;
> }
Likewise, this will get it wrong if SMT is disabled or not yet =20
implemented on a core.
-Scott=
^ permalink raw reply
* [PATCHv4 0/2] Speed Cap fixes for ppc64
From: lucaskt @ 2013-04-24 22:54 UTC (permalink / raw)
To: linuxppc-dev, dri-devel, Benjamin Herrenschmidt, Bjorn Helgaas,
David Airlie <airlied@linux.ie> Michael Ellerman
Cc: Kleber Sacilotto de Souza, Alex Deucher, Jerome Glisse,
Lucas Kannebley Tavares, Thadeu Lima de Souza Cascardo,
Brian King
From: Lucas Kannebley Tavares <lucaskt@vnet.linux.ibm.com>
This patch series does:
1. max_bus_speed is used to set the device to gen2 speeds
2. on power there's no longer a conflict between the pseries call and other architectures, because the overwrite is done via a ppc_md hook
3. radeon is using bus->max_bus_speed instead of drm_pcie_get_speed_cap_mask for gen2 capability detection
And I've also added the changes proposed by Michael Ellerman:
1. Corrected Patch 1's comments
2. Moved forward function declarations to pseries.h header
3. Added forward references to struct pci_host_bridge, preventing compilation fails.
The first patch consists of some architecture changes, such as adding a hook on powerpc for pci_root_bridge_prepare, so that pseries will initialize it to a function, while all other architectures get a NULL pointer. So that whenever whenever pci_create_root_bus is called, we'll get max_bus_speed properly setup from OpenFirmware.
The second patch consists of simple radeon changes not to call drm_get_pcie_speed_cap_mask anymore. I assume that on x86 machines, the max_bus_speed property will be properly set already.
Lucas Kannebley Tavares (2):
ppc64: perform proper max_bus_speed detection
radeon: use max_bus_speed to activate gen2 speeds
arch/powerpc/include/asm/machdep.h | 2 ++
arch/powerpc/kernel/pci-common.c | 8 +++++
arch/powerpc/platforms/pseries/pci.c | 51 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/pseries/pseries.h | 4 +++
arch/powerpc/platforms/pseries/setup.c | 2 ++
drivers/gpu/drm/radeon/evergreen.c | 10 ++-----
drivers/gpu/drm/radeon/r600.c | 9 ++----
drivers/gpu/drm/radeon/rv770.c | 9 ++----
8 files changed, 74 insertions(+), 21 deletions(-)
--
1.8.1.4
^ permalink raw reply
* [PATCHv4 1/2] ppc64: perform proper max_bus_speed detection
From: lucaskt @ 2013-04-24 22:54 UTC (permalink / raw)
To: linuxppc-dev, dri-devel, Benjamin Herrenschmidt, Bjorn Helgaas,
David Airlie <airlied@linux.ie> Michael Ellerman
Cc: Kleber Sacilotto de Souza, Alex Deucher, Jerome Glisse,
Thadeu Lima de Souza Cascardo, Lucas Kannebley Tavares,
Brian King
In-Reply-To: <1366844090-5492-1-git-send-email-lucaskt@linux.vnet.ibm.com>
From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
On pseries machines the detection for max_bus_speed should be done
through an OpenFirmware property. This patch adds a function to perform
this detection and a hook to perform dynamic adding of the function only for
pseries. This is done by overwriting the weak
pcibios_root_bridge_prepare function which is called by pci_create_root_bus().
Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/machdep.h | 2 ++
arch/powerpc/kernel/pci-common.c | 8 +++++
arch/powerpc/platforms/pseries/pci.c | 51 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/pseries/pseries.h | 4 +++
arch/powerpc/platforms/pseries/setup.c | 2 ++
5 files changed, 67 insertions(+)
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 3d6b410..8f558bf 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -107,6 +107,8 @@ struct machdep_calls {
void (*pcibios_fixup)(void);
int (*pci_probe_mode)(struct pci_bus *);
void (*pci_irq_fixup)(struct pci_dev *dev);
+ int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
+ *bridge);
/* To setup PHBs when using automatic OF platform driver for PCI */
int (*pci_setup_phb)(struct pci_controller *host);
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index fa12ae4..80986cf 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -844,6 +844,14 @@ int pci_proc_domain(struct pci_bus *bus)
return 1;
}
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+ if (ppc_md.pcibios_root_bridge_prepare)
+ return ppc_md.pcibios_root_bridge_prepare(bridge);
+
+ return 0;
+}
+
/* This header fixup will do the resource fixup for all devices as they are
* probed, but not for bridge ranges
*/
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 0b580f4..7f9c956 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -108,3 +108,54 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
fixup_winbond_82c105);
+
+int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+ struct device_node *dn, *pdn;
+ struct pci_bus *bus;
+ const uint32_t *pcie_link_speed_stats;
+
+ bus = bridge->bus;
+
+ dn = pcibios_get_phb_of_node(bus);
+ if (!dn)
+ return 0;
+
+ for (pdn = dn; pdn != NULL; pdn = pdn->parent) {
+ pcie_link_speed_stats = (const uint32_t *) of_get_property(dn,
+ "ibm,pcie-link-speed-stats", NULL);
+ if (pcie_link_speed_stats)
+ break;
+ }
+
+ if (!pcie_link_speed_stats) {
+ pr_err("no ibm,pcie-link-speed-stats property\n");
+ return 0;
+ }
+
+ switch (pcie_link_speed_stats[0]) {
+ case 0x01:
+ bus->max_bus_speed = PCIE_SPEED_2_5GT;
+ break;
+ case 0x02:
+ bus->max_bus_speed = PCIE_SPEED_5_0GT;
+ break;
+ default:
+ bus->max_bus_speed = PCI_SPEED_UNKNOWN;
+ break;
+ }
+
+ switch (pcie_link_speed_stats[1]) {
+ case 0x01:
+ bus->cur_bus_speed = PCIE_SPEED_2_5GT;
+ break;
+ case 0x02:
+ bus->cur_bus_speed = PCIE_SPEED_5_0GT;
+ break;
+ default:
+ bus->cur_bus_speed = PCI_SPEED_UNKNOWN;
+ break;
+ }
+
+ return 0;
+}
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 9a3dda0..b79393d 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -60,4 +60,8 @@ extern int dlpar_detach_node(struct device_node *);
/* Snooze Delay, pseries_idle */
DECLARE_PER_CPU(long, smt_snooze_delay);
+/* PCI root bridge prepare function override for pseries */
+struct pci_host_bridge;
+int pseries_root_bridge_prepare(struct pci_host_bridge *bridge);
+
#endif /* _PSERIES_PSERIES_H */
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 8bcc9ca..bf34cc9 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -466,6 +466,8 @@ static void __init pSeries_setup_arch(void)
else
ppc_md.enable_pmcs = power4_enable_pmcs;
+ ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
+
if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
long rc;
if ((rc = pSeries_enable_reloc_on_exc()) != H_SUCCESS) {
--
1.8.1.4
^ permalink raw reply related
* [PATCHv4 2/2] radeon: use max_bus_speed to activate gen2 speeds
From: lucaskt @ 2013-04-24 22:54 UTC (permalink / raw)
To: linuxppc-dev, dri-devel, Benjamin Herrenschmidt, Bjorn Helgaas,
David Airlie <airlied@linux.ie> Michael Ellerman
Cc: Kleber Sacilotto de Souza, Alex Deucher, Jerome Glisse,
Thadeu Lima de Souza Cascardo, Lucas Kannebley Tavares,
Brian King
In-Reply-To: <1366844090-5492-1-git-send-email-lucaskt@linux.vnet.ibm.com>
From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
radeon currently uses a drm function to get the speed capabilities for
the bus, drm_pcie_get_speed_cap_mask. However, this is a non-standard
method of performing this detection and this patch changes it to use
the max_bus_speed attribute.
Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
---
drivers/gpu/drm/radeon/evergreen.c | 10 +++-------
drivers/gpu/drm/radeon/r600.c | 9 ++-------
drivers/gpu/drm/radeon/rv770.c | 9 ++-------
3 files changed, 7 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 305a657..ee45026 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3855,8 +3855,7 @@ void evergreen_fini(struct radeon_device *rdev)
void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
{
- u32 link_width_cntl, speed_cntl, mask;
- int ret;
+ u32 link_width_cntl, speed_cntl;
if (radeon_pcie_gen2 == 0)
return;
@@ -3871,11 +3870,8 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
if (ASIC_IS_X2(rdev))
return;
- ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
- if (ret != 0)
- return;
-
- if (!(mask & DRM_PCIE_SPEED_50))
+ if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) &&
+ (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT))
return;
speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0740db3..4d5ba32 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -4351,8 +4351,6 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
{
u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
u16 link_cntl2;
- u32 mask;
- int ret;
if (radeon_pcie_gen2 == 0)
return;
@@ -4371,11 +4369,8 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev)
if (rdev->family <= CHIP_R600)
return;
- ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
- if (ret != 0)
- return;
-
- if (!(mask & DRM_PCIE_SPEED_50))
+ if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) &&
+ (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT))
return;
speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL);
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index d63fe1d..f4860f6 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1238,8 +1238,6 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
{
u32 link_width_cntl, lanes, speed_cntl, tmp;
u16 link_cntl2;
- u32 mask;
- int ret;
if (radeon_pcie_gen2 == 0)
return;
@@ -1254,11 +1252,8 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev)
if (ASIC_IS_X2(rdev))
return;
- ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask);
- if (ret != 0)
- return;
-
- if (!(mask & DRM_PCIE_SPEED_50))
+ if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) &&
+ (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT))
return;
DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n");
--
1.8.1.4
^ permalink raw reply related
* Re: [PATCHv4 1/2] ppc64: perform proper max_bus_speed detection
From: Tony Breeds @ 2013-04-24 23:48 UTC (permalink / raw)
To: lucaskt
Cc: Kleber Sacilotto de Souza, Brian King, dri-devel, Alex Deucher,
Jerome Glisse, Thadeu Lima de Souza Cascardo, Bjorn Helgaas,
linuxppc-dev
In-Reply-To: <1366844090-5492-2-git-send-email-lucaskt@linux.vnet.ibm.com>
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On Wed, Apr 24, 2013 at 07:54:49PM -0300, lucaskt@linux.vnet.ibm.com wrote:
> From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
>
> On pseries machines the detection for max_bus_speed should be done
> through an OpenFirmware property. This patch adds a function to perform
> this detection and a hook to perform dynamic adding of the function only for
> pseries. This is done by overwriting the weak
> pcibios_root_bridge_prepare function which is called by pci_create_root_bus().
>
> Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/machdep.h | 2 ++
> arch/powerpc/kernel/pci-common.c | 8 +++++
> arch/powerpc/platforms/pseries/pci.c | 51 ++++++++++++++++++++++++++++++++
> arch/powerpc/platforms/pseries/pseries.h | 4 +++
> arch/powerpc/platforms/pseries/setup.c | 2 ++
> 5 files changed, 67 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
> index 3d6b410..8f558bf 100644
> --- a/arch/powerpc/include/asm/machdep.h
> +++ b/arch/powerpc/include/asm/machdep.h
> @@ -107,6 +107,8 @@ struct machdep_calls {
> void (*pcibios_fixup)(void);
> int (*pci_probe_mode)(struct pci_bus *);
> void (*pci_irq_fixup)(struct pci_dev *dev);
> + int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
> + *bridge);
>
> /* To setup PHBs when using automatic OF platform driver for PCI */
> int (*pci_setup_phb)(struct pci_controller *host);
> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
> index fa12ae4..80986cf 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -844,6 +844,14 @@ int pci_proc_domain(struct pci_bus *bus)
> return 1;
> }
>
> +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> +{
> + if (ppc_md.pcibios_root_bridge_prepare)
> + return ppc_md.pcibios_root_bridge_prepare(bridge);
> +
> + return 0;
> +}
> +
> /* This header fixup will do the resource fixup for all devices as they are
> * probed, but not for bridge ranges
> */
> diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
> index 0b580f4..7f9c956 100644
> --- a/arch/powerpc/platforms/pseries/pci.c
> +++ b/arch/powerpc/platforms/pseries/pci.c
> @@ -108,3 +108,54 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
> }
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
> fixup_winbond_82c105);
> +
> +int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
> +{
> + struct device_node *dn, *pdn;
> + struct pci_bus *bus;
> + const uint32_t *pcie_link_speed_stats;
> +
> + bus = bridge->bus;
> +
> + dn = pcibios_get_phb_of_node(bus);
> + if (!dn)
> + return 0;
> +
> + for (pdn = dn; pdn != NULL; pdn = pdn->parent) {
> + pcie_link_speed_stats = (const uint32_t *) of_get_property(dn,
> + "ibm,pcie-link-speed-stats", NULL);
> + if (pcie_link_speed_stats)
> + break;
> + }
Please use the helpers in include/linux/of.h rather than open coding
this.
Yours Tony
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^ permalink raw reply
* Re: [PATCH] powerpc: Add isync to copy_and_flush
From: Michael Neuling @ 2013-04-25 0:19 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Nishanth Aravamudan, miltonm, Linux PPC dev
In-Reply-To: <1366821417.2869.12.camel@pasglop>
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> Considering that the bug has been there *forever* I don't think I have a
> real standing to try to shove it down Linus throat as a "regression
> fix" :-)
True, sorry.
> I'll put the fix in 3.10 and let it trickle down to stable.
Thanks
Mikey
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^ permalink raw reply
* Re: [PATCH v2 12/15] powerpc/85xx: add time base sync support for e6500
From: Zhao Chenhui @ 2013-04-25 0:28 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, linux-kernel, r58472
In-Reply-To: <1366843096.17465.17@snotra>
On Wed, Apr 24, 2013 at 05:38:16PM -0500, Scott Wood wrote:
> On 04/24/2013 06:29:29 AM, Zhao Chenhui wrote:
> >On Tue, Apr 23, 2013 at 07:04:06PM -0500, Scott Wood wrote:
> >> On 04/19/2013 05:47:45 AM, Zhao Chenhui wrote:
> >> >From: Chen-Hui Zhao <chenhui.zhao@freescale.com>
> >> >
> >> >For e6500, two threads in one core share one time base. Just need
> >> >to do time base sync on first thread of one core, and skip it on
> >> >the other thread.
> >> >
> >> >Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> >> >Signed-off-by: Li Yang <leoli@freescale.com>
> >> >Signed-off-by: Andy Fleming <afleming@freescale.com>
> >> >---
> >> > arch/powerpc/platforms/85xx/smp.c | 52
> >> >+++++++++++++++++++++++++++++++-----
> >> > 1 files changed, 44 insertions(+), 8 deletions(-)
> >> >
> >> >diff --git a/arch/powerpc/platforms/85xx/smp.c
> >> >b/arch/powerpc/platforms/85xx/smp.c
> >> >index 74d8cde..5f3eee3 100644
> >> >--- a/arch/powerpc/platforms/85xx/smp.c
> >> >+++ b/arch/powerpc/platforms/85xx/smp.c
> >> >@@ -53,26 +55,40 @@ static inline u32 get_phy_cpu_mask(void)
> >> > u32 mask;
> >> > int cpu;
> >> >
> >> >- mask = 1 << cur_booting_core;
> >> >- for_each_online_cpu(cpu)
> >> >- mask |= 1 << get_hard_smp_processor_id(cpu);
> >> >+ if (smt_capable()) {
> >> >+ /* two threads in one core share one time base */
> >> >+ mask = 1 << cpu_core_index_of_thread(cur_booting_core);
> >> >+ for_each_online_cpu(cpu)
> >> >+ mask |= 1 << cpu_core_index_of_thread(
> >> >+ get_hard_smp_processor_id(cpu));
> >> >+ } else {
> >> >+ mask = 1 << cur_booting_core;
> >> >+ for_each_online_cpu(cpu)
> >> >+ mask |= 1 << get_hard_smp_processor_id(cpu);
> >> >+ }
> >>
> >> Where is smt_capable defined()? I assume somewhere in the patchset
> >> but it's a pain to search 12 patches...
> >>
> >
> >It is defined in arch/powerpc/include/asm/topology.h.
> > #define smt_capable() (cpu_has_feature(CPU_FTR_SMT))
> >
> >Thanks for your review again.
>
> We shouldn't base it on CPU_FTR_SMT. For example, e6500 doesn't
> claim that feature yet, except in our SDK kernel. That doesn't
> change the topology of CPU numbering.
>
Then, where can I get the thread information? dts?
Or, wait for upstream of the thread suppport of e6500.
> >> Is this really about whether we're SMT-capable or whether we have
> >> rcpm v2?
> >>
> >> -Scott
> >
> >I think this "if" statement can be removed. The
> >cpu_core_index_of_thread()
> >can return the correct cpu number with thread or without thread.
> >
> >Like this:
> >static inline u32 get_phy_cpu_mask(void)
> >{
> > u32 mask;
> > int cpu;
> >
> > mask = 1 << cpu_core_index_of_thread(cur_booting_core);
> > for_each_online_cpu(cpu)
> > mask |= 1 << cpu_core_index_of_thread(
> > get_hard_smp_processor_id(cpu));
> >
> > return mask;
> >}
>
> Likewise, this will get it wrong if SMT is disabled or not yet
> implemented on a core.
>
> -Scott
Let's look into cpu_core_index_of_thread() in arch/powerpc/kernel/smp.c.
int cpu_core_index_of_thread(int cpu)
{
return cpu >> threads_shift;
}
If no thread, the threads_shift is equal to 0. It can work with no
thread.
Perhaps, I should submit this patch after the thread patches for e6500.
-Chenhui
^ permalink raw reply
* Re: "attempt to move .org backwards" still show up
From: Chen Gang @ 2013-04-25 1:05 UTC (permalink / raw)
To: Mike
Cc: sfr, Michael Neuling, matt, linux-kernel, paulus,
Aneesh Kumar K.V, linuxppc-dev
In-Reply-To: <1366807638.5911.2.camel@localhost>
On 2013年04月24日 20:47, Mike wrote:
> 在 2013-04-24三的 20:37 +1000，Michael Neuling写道：
>> > Mike Qiu <qiudayu@linux.vnet.ibm.com> wrote:
>> >
>>> > > 于 2013/4/24 16:31, Michael Ellerman 写道:
>>>> > > > On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
>>>>> > > >> Hi all
>>>>> > > >>
>>>>> > > >> I get an error message when I compile the source code in Power7 platform
>>>>> > > >> use the newest upstream kernel.
>>>> > > > Hi Mike,
>>>> > > >
>>>> > > > It depends on what your .config is. What defconfig are you building?
>>> > > I just copy the config file from /boot/config.* to .config and use make
>>> > > menuconfig
>>> > > change nothing by manually, then save.
>> >
>> > Can you post the resulting config here?
>> >
>> > Do you have commit in your tree?
>> > commit 087aa036eb79f24b856893190359ba812b460f45
>> > Author: Chen Gang <gang.chen@asianux.com>
>> > powerpc: make additional room in exception vector area
>> >
> Sure, that commit certainly in my git tree. And I just try to remove the
> code and re-git clone the source code from upstream, this problem still
> happen.
> I will post the config file as the attachment
> :)
>
> Thanks
I will try, and plan to get a result within this week (2013-04-28)
Thanks.
--
Chen Gang
Asianux Corporation
^ permalink raw reply
* [PATCH 4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE
From: Po Liu @ 2013-04-25 1:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Mingkai Hu
In-Reply-To: <1366854857-22791-1-git-send-email-Po.Liu@freescale.com>
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/configs/mpc85xx_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index cf815e8..ddc33a2 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -28,6 +28,7 @@ CONFIG_MPC85xx_MDS=y
CONFIG_MPC8536_DS=y
CONFIG_MPC85xx_DS=y
CONFIG_MPC85xx_RDB=y
+CONFIG_C293_PCIE=y
CONFIG_P1010_RDB=y
CONFIG_P1022_DS=y
CONFIG_P1022_RDK=y
--
1.8.0
^ permalink raw reply related
* [PATCH 3/4] powerpc/85xx: Add C293PCIE board support
From: Po Liu @ 2013-04-25 1:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Mingkai Hu
In-Reply-To: <1366854857-22791-1-git-send-email-Po.Liu@freescale.com>
From: Mingkai Hu <Mingkai.Hu@freescale.com>
C293PCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Singed-off-by: Po Liu <Po.Liu@freescale.com>
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/c293pcie.dts | 251 +++++++++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/Kconfig | 7 +
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/c293pcie.c | 82 +++++++++++
4 files changed, 341 insertions(+)
create mode 100644 arch/powerpc/boot/dts/c293pcie.dts
create mode 100644 arch/powerpc/platforms/85xx/c293pcie.c
diff --git a/arch/powerpc/boot/dts/c293pcie.dts b/arch/powerpc/boot/dts/c293pcie.dts
new file mode 100644
index 0000000..f2f6d76
--- /dev/null
+++ b/arch/powerpc/boot/dts/c293pcie.dts
@@ -0,0 +1,251 @@
+/*
+ * C293 PCIE Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/c293si-pre.dtsi"
+
+/ {
+ model = "fsl,C293PCIE";
+ compatible = "fsl,C293PCIE";
+
+ memory {
+ device_type = "memory";
+ };
+
+ ifc: ifc@fffe1e000 {
+ reg = <0xf 0xffe1e000 0 0x2000>;
+ ranges = <0x0 0x0 0xf 0xec000000 0x04000000
+ 0x2 0x0 0xf 0xffdf0000 0x00010000>;
+
+ };
+
+ soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+&ifc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x4000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* 1MB for DTB Image */
+ reg = <0x0 0x00100000>;
+ label = "NOR DTB Image";
+ };
+
+ partition@100000 {
+ /* 8 MB for Linux Kernel Image */
+ reg = <0x00100000 0x00800000>;
+ label = "NOR Linux Kernel Image";
+ };
+
+ partition@900000 {
+ /* 33MB for rootfs */
+ reg = <0x00900000 0x02100000>;
+ label = "NOR Rootfs Image";
+ };
+
+ partition@2a00000 {
+ /* 20MB for JFFS2 based Root file System */
+ reg = <0x02a00000 0x01400000>;
+ label = "NOR JFFS2 Root File System";
+ };
+
+ partition@3e00000 {
+ /* 1MB for blob encrypted key */
+ reg = <0x03e00000 0x00100000>;
+ label = "NOR blob encrypted key";
+ };
+
+ partition@3f00000 {
+ /* 512KB for u-boot Bootloader Image and evn */
+ reg = <0x03f00000 0x00100000>;
+ label = "NOR U-Boot Image";
+ read-only;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x1 0x0 0x10000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00200000 0x00400000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg = <0x00600000 0x00400000>;
+ label = "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = <0x00a00000 0x00f00000>;
+ label = "NAND JFFS2 Root File System";
+ };
+
+ partition@1900000 {
+ /* 7MB for User Area */
+ reg = <0x01900000 0x00700000>;
+ label = "NAND User area";
+ };
+ };
+
+ cpld@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,c293pcie-cpld";
+ reg = <0x2 0x0 0x0000020>;
+ bank-width = <1>;
+ device-width = <1>;
+ };
+};
+
+&soc {
+ i2c@3000 {
+ eeprom@50 {
+ compatible = "st,24c1024";
+ reg = <0x50>;
+ };
+
+ adt7461@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25sl12801";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ partition@0 {
+ /* 1MB for u-boot Bootloader Image */
+ /* 1MB for Environment */
+ reg = <0x0 0x00100000>;
+ label = "SPI Flash U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 512KB for DTB Image */
+ reg = <0x00100000 0x00080000>;
+ label = "SPI Flash DTB Image";
+ };
+
+ partition@180000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00180000 0x00400000>;
+ label = "SPI Flash Linux Kernel Image";
+ };
+
+ partition@580000 {
+ /* 4MB for Compressed RFS Image */
+ reg = <0x00580000 0x00400000>;
+ label = "SPI Flash Compressed RFSImage";
+ };
+
+ partition@980000 {
+ /* 6.5MB for JFFS2 based RFS */
+ reg = <0x00980000 0x00680000>;
+ label = "SPI Flash JFFS2 RFS";
+ };
+ };
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <2 1 0 0>;
+ reg = <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x2>;
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+};
+/include/ "fsl/c293si-post.dtsi"
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index a0dcd57..df26b21 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -32,6 +32,13 @@ config BSC9131_RDB
StarCore SC3850 DSP
Manufacturer : Freescale Semiconductor, Inc
+config C293_PCIE
+ bool "Freescale C293PCIE"
+ select DEFAULT_UIMAGE
+ select SWIOTLB
+ help
+ This option enables support for the C293PCIE board
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 07d0dbb..55b32cc 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
+obj-$(CONFIG_C293_PCIE) += c293pcie.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c b/arch/powerpc/platforms/85xx/c293pcie.c
new file mode 100644
index 0000000..75dda12
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/c293pcie.c
@@ -0,0 +1,82 @@
+/*
+ * C293PCIE Board Setup
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+void __init c293_pcie_pic_init(void)
+{
+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC ");
+
+ BUG_ON(mpic == NULL);
+
+ mpic_init(mpic);
+}
+
+
+/*
+ * Setup the architecture
+ */
+static void __init c293_pcie_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("c293_pcie_setup_arch()", 0);
+
+ fsl_pci_assign_primary();
+
+ printk(KERN_INFO "C293 PCIE board from Freescale Semiconductor\n");
+}
+
+machine_arch_initcall(c293_pcie, mpc85xx_common_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init c293_pcie_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,C293PCIE"))
+ return 1;
+ return 0;
+}
+
+define_machine(c293_pcie) {
+ .name = "C293 PCIE",
+ .probe = c293_pcie_probe,
+ .setup_arch = c293_pcie_setup_arch,
+ .init_IRQ = c293_pcie_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.8.0
^ permalink raw reply related
* [PATCH 2/4] powerpc/85xx: Add silicon device tree for C293
From: Po Liu @ 2013-04-25 1:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Mingkai Hu, Po Liu
In-Reply-To: <1366854857-22791-1-git-send-email-Po.Liu@freescale.com>
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Po Liu <Po.Liu@freescale.com>
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/fsl/c293si-post.dtsi | 193 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/c293si-pre.dtsi | 63 ++++++++++
2 files changed, 256 insertions(+)
create mode 100644 arch/powerpc/boot/dts/fsl/c293si-post.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/c293si-post.dtsi b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
new file mode 100644
index 0000000..bd20832
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi
@@ -0,0 +1,193 @@
+/*
+ * C293 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc", "simple-bus";
+ interrupts = <19 2 0 0>;
+};
+
+/* controller at 0xa000 */
+&pci0 {
+ compatible = "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 255>;
+ clock-frequency = <33333333>;
+ interrupts = <16 2 0 0>;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+ 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+ 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+ 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+ >;
+ };
+};
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ bus-frequency = <0>; // Filled out by uboot.
+
+ ecm-law@0 {
+ compatible = "fsl,ecm-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <12>;
+ };
+
+ ecm@1000 {
+ compatible = "fsl,c293-ecm", "fsl,ecm";
+ reg = <0x1000 0x1000>;
+ interrupts = <16 2 0 0>;
+ };
+
+ memory-controller@2000 {
+ compatible = "fsl,c293-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupts = <16 2 0 0>;
+ };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+/include/ "pq3-espi-0.dtsi"
+ spi0: spi@7000 {
+ fsl,espi-num-chipselects = <1>;
+ };
+
+/include/ "pq3-gpio-0.dtsi"
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,c293-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x80000>; // L2,512K
+ interrupts = <16 2 0 0>;
+ };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ compatible = "fsl,c293-esdhc", "fsl,esdhc";
+ sdhci,auto-cmd12;
+ };
+
+ crypto@80000 {
+/include/ "qoriq-sec6.0-0.dtsi"
+ };
+
+ crypto@80000 {
+ reg = <0x80000 0x20000>;
+ ranges = <0x0 0x80000 0x20000>;
+
+ jr@1000{
+ interrupts = <45 2 0 0>;
+ };
+ jr@2000{
+ interrupts = <57 2 0 0>;
+ };
+ };
+
+ crypto@a0000 {
+/include/ "qoriq-sec6.0-0.dtsi"
+ };
+
+ crypto@a0000 {
+ reg = <0xa0000 0x20000>;
+ ranges = <0x0 0xa0000 0x20000>;
+
+ jr@1000{
+ interrupts = <49 2 0 0>;
+ };
+ jr@2000{
+ interrupts = <50 2 0 0>;
+ };
+ };
+
+ crypto@c0000 {
+/include/ "qoriq-sec6.0-0.dtsi"
+ };
+
+ crypto@c0000 {
+ reg = <0xc0000 0x20000>;
+ ranges = <0x0 0xc0000 0x20000>;
+
+ jr@1000{
+ interrupts = <55 2 0 0>;
+ };
+ jr@2000{
+ interrupts = <56 2 0 0>;
+ };
+ };
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+ enet0: ethernet@b0000 {
+ queue-group@b0000 {
+ reg = <0x10000 0x1000>;
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ };
+ };
+
+/include/ "pq3-etsec2-1.dtsi"
+ enet1: ethernet@b1000 {
+ queue-group@b1000 {
+ reg = <0x11000 0x1000>;
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ };
+ };
+
+ global-utilities@e0000 {
+ compatible = "fsl,c293-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/c293si-pre.dtsi b/arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
new file mode 100644
index 0000000..065049d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/c293si-pre.dtsi
@@ -0,0 +1,63 @@
+/*
+ * C293 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+ compatible = "fsl,C293";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,e500v2@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ next-level-cache = <&L2>;
+ };
+ };
+};
--
1.8.0
^ permalink raw reply related
* [PATCH 1/4] powerpc/85xx: Add SEC6.0 device tree
From: Po Liu @ 2013-04-25 1:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Mingkai Hu
From: Mingkai Hu <Mingkai.Hu@freescale.com>
Add device tree for SEC 6.0 used on C29x silicon.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Singed-off-by: Po Liu <Po.Liu@freescale.com>
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi | 58 +++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
new file mode 100644
index 0000000..eb99a46
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec6.0-0.dtsi
@@ -0,0 +1,58 @@
+/*
+ * QorIQ Sec/Crypto 6.0 device tree stub
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ compatible = "fsl,sec-v6.0", "fsl,sec-v5.2",
+ "fsl,sec-v5.0", "fsl,sec-v4.4",
+ "fsl,sec-v4.0";
+ fsl,sec-era = <6>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ jr@1000 {
+ compatible = "fsl,sec-v6.0-job-ring",
+ "fsl,sec-v5.2-job-ring",
+ "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.4-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ };
+
+ jr@2000 {
+ compatible = "fsl,sec-v6.0-job-ring",
+ "fsl,sec-v5.2-job-ring",
+ "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.4-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ };
--
1.8.0
^ permalink raw reply related
* Re: "attempt to move .org backwards" still show up
From: Mike Qiu @ 2013-04-25 4:05 UTC (permalink / raw)
To: Chen Gang
Cc: sfr, Michael Neuling, matt, linux-kernel, paulus,
Aneesh Kumar K.V, linuxppc-dev
In-Reply-To: <5178816D.3000309@asianux.com>
于 2013/4/25 9:05, Chen Gang 写道:
> On 2013年04月24日 20:47, Mike wrote:
>> 在 2013-04-24三的 20:37 +1000，Michael Neuling写道：
>>>> Mike Qiu <qiudayu@linux.vnet.ibm.com> wrote:
>>>>
>>>>>> 于 2013/4/24 16:31, Michael Ellerman 写道:
>>>>>>>> On Wed, Apr 24, 2013 at 04:22:53PM +0800, Mike Qiu wrote:
>>>>>>>>>> Hi all
>>>>>>>>>>
>>>>>>>>>> I get an error message when I compile the source code in Power7 platform
>>>>>>>>>> use the newest upstream kernel.
>>>>>>>> Hi Mike,
>>>>>>>>
>>>>>>>> It depends on what your .config is. What defconfig are you building?
>>>>>> I just copy the config file from /boot/config.* to .config and use make
>>>>>> menuconfig
>>>>>> change nothing by manually, then save.
>>>> Can you post the resulting config here?
>>>>
>>>> Do you have commit in your tree?
>>>> commit 087aa036eb79f24b856893190359ba812b460f45
>>>> Author: Chen Gang <gang.chen@asianux.com>
>>>> powerpc: make additional room in exception vector area
>>>>
>> Sure, that commit certainly in my git tree. And I just try to remove the
>> code and re-git clone the source code from upstream, this problem still
>> happen.
>> I will post the config file as the attachment
>> :)
>>
>> Thanks
> I will try, and plan to get a result within this week (2013-04-28)
>
> Thanks.
Hi
This has block my work now
So I hope you can take a look ASAP
Thanks
:)
Mike
^ permalink raw reply
* Re: [PATCH v2 7/8] powerpc/pseries: Read of-config partition via pstore
From: Aruna Balakrishnaiah @ 2013-04-25 5:10 UTC (permalink / raw)
To: Kees Cook
Cc: jkenisto, Tony Luck, mahesh, Colin Cross, LKML, linuxppc-dev,
paulus, anton, Anton Vorontsov
In-Reply-To: <CAGXu5jKCafNaLCOcvo2+eoVGuP0rGP3e_OOg-YdkCFT_zc8k9g@mail.gmail.com>
On Thursday 25 April 2013 02:13 AM, Kees Cook wrote:
Hi Kees,
> On Tue, Apr 23, 2013 at 11:20 PM, Aruna Balakrishnaiah
> <aruna@linux.vnet.ibm.com> wrote:
>> This patch set exploits the pstore subsystem to read details of
>> of-config partition in NVRAM to a separate file in /dev/pstore.
>> For instance, of-config partition details will be stored in a
>> file named [of-nvram-5].
>>
>> Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com>
>> Reviewed-by: Jim Keniston <jkenisto@us.ibm.com>
>> ---
>> arch/powerpc/platforms/pseries/nvram.c | 55 +++++++++++++++++++++++++++-----
>> fs/pstore/inode.c | 3 ++
>> include/linux/pstore.h | 1 +
>> 3 files changed, 50 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
>> index b118382..de448af 100644
>> --- a/arch/powerpc/platforms/pseries/nvram.c
>> +++ b/arch/powerpc/platforms/pseries/nvram.c
>> @@ -132,9 +132,16 @@ static size_t oops_data_sz;
>> static struct z_stream_s stream;
>>
>> #ifdef CONFIG_PSTORE
>> +static struct nvram_os_partition of_config_partition = {
>> + .name = "of-config",
>> + .index = -1,
>> + .os_partition = false
>> +};
>> +
>> static enum pstore_type_id nvram_type_ids[] = {
>> PSTORE_TYPE_DMESG,
>> PSTORE_TYPE_RTAS,
>> + PSTORE_TYPE_OF,
>> -1
>> };
>> static int read_type;
>> @@ -332,10 +339,15 @@ int nvram_read_partition(struct nvram_os_partition *part, char *buff,
>>
>> tmp_index = part->index;
>>
>> - rc = ppc_md.nvram_read((char *)&info, sizeof(struct err_log_info), &tmp_index);
>> - if (rc <= 0) {
>> - pr_err("%s: Failed nvram_read (%d)\n", __FUNCTION__, rc);
>> - return rc;
>> + if (part->os_partition) {
>> + rc = ppc_md.nvram_read((char *)&info,
>> + sizeof(struct err_log_info),
>> + &tmp_index);
>> + if (rc <= 0) {
>> + pr_err("%s: Failed nvram_read (%d)\n", __FUNCTION__,
>> + rc);
>> + return rc;
>> + }
>> }
>>
>> rc = ppc_md.nvram_read(buff, length, &tmp_index);
>> @@ -344,8 +356,10 @@ int nvram_read_partition(struct nvram_os_partition *part, char *buff,
>> return rc;
>> }
>>
>> - *error_log_cnt = info.seq_num;
>> - *err_type = info.error_type;
>> + if (part->os_partition) {
>> + *error_log_cnt = info.seq_num;
>> + *err_type = info.error_type;
>> + }
>>
>> return 0;
>> }
>> @@ -516,7 +530,7 @@ static int nvram_pstore_write(enum pstore_type_id type,
>> }
>>
>> /*
>> - * Reads the oops/panic report and ibm,rtas-log partition.
>> + * Reads the oops/panic report, rtas and of-config partition.
>> * Returns the length of the data we read from each partition.
>> * Returns 0 if we've been called before.
>> */
>> @@ -525,9 +539,11 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
>> struct pstore_info *psi)
>> {
>> struct oops_log_info *oops_hdr;
>> - unsigned int err_type, id_no;
>> + unsigned int err_type, id_no, size = 0;
>> struct nvram_os_partition *part = NULL;
>> char *buff = NULL;
>> + int sig = 0;
>> + loff_t p;
>>
>> read_type++;
>>
>> @@ -542,10 +558,29 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
>> time->tv_sec = last_rtas_event;
>> time->tv_nsec = 0;
>> break;
>> + case PSTORE_TYPE_OF:
>> + sig = NVRAM_SIG_OF;
>> + part = &of_config_partition;
>> + *type = PSTORE_TYPE_OF;
>> + *id = PSTORE_TYPE_OF;
>> + time->tv_sec = 0;
>> + time->tv_nsec = 0;
>> + break;
>> default:
>> return 0;
>> }
>>
>> + if (!part->os_partition) {
>> + p = nvram_find_partition(part->name, sig, &size);
>> + if (p <= 0) {
>> + pr_err("nvram: Failed to find partition %s, "
>> + "err %d\n", part->name, (int)p);
>> + return 0;
>> + }
>> + part->index = p;
>> + part->size = size;
>> + }
>> +
>> buff = kmalloc(part->size, GFP_KERNEL);
>>
>> if (!buff)
>> @@ -557,7 +592,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
>> }
>>
>> *count = 0;
>> - *id = id_no;
>> +
>> + if (part->os_partition)
>> + *id = id_no;
>>
>> if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
>> oops_hdr = (struct oops_log_info *)buff;
>> diff --git a/fs/pstore/inode.c b/fs/pstore/inode.c
>> index ec24f9c..8d4fb65 100644
>> --- a/fs/pstore/inode.c
>> +++ b/fs/pstore/inode.c
>> @@ -327,6 +327,9 @@ int pstore_mkfile(enum pstore_type_id type, char *psname, u64 id, int count,
>> case PSTORE_TYPE_PPC_RTAS:
>> sprintf(name, "rtas-%s-%lld", psname, id);
>> break;
>> + case PSTORE_TYPE_PPC_OF:
>> + sprintf(name, "of-%s-%lld", psname, id);
>> + break;
>> case PSTORE_TYPE_UNKNOWN:
>> sprintf(name, "unknown-%s-%lld", psname, id);
>> break;
>> diff --git a/include/linux/pstore.h b/include/linux/pstore.h
>> index d7a8fe9..615dc18 100644
>> --- a/include/linux/pstore.h
>> +++ b/include/linux/pstore.h
>> @@ -37,6 +37,7 @@ enum pstore_type_id {
>> PSTORE_TYPE_FTRACE = 3,
>> /* PPC64 partition types */
>> PSTORE_TYPE_PPC_RTAS = 4,
>> + PSTORE_TYPE_PPC_OF = 5,
>> PSTORE_TYPE_UNKNOWN = 255
>> };
>>
>>
> Should this be named just "PSTORE_TYPE_OF" instead of "...PPC_OF"?
I renamed it from PSTORE_TYPE_OF to PSTORE_TYPE_PPC_OF as per Michael's
suggestion. But I have made a mistake of not changing the new name in nvram.c
file.
Will wait for other review comments and repost the patch.
>
> -Kees
>
> --
> Kees Cook
> Chrome OS Security
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
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