* Re: [v1][KVM][PATCH 1/1] kvm:ppc:booehv: direct ISI exception to Guest
From: tiejun.chen @ 2013-05-08 1:53 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, agraf, kvm-ppc, kvm
In-Reply-To: <1367970043.3398.39@snotra>
On 05/08/2013 07:40 AM, Scott Wood wrote:
> On 05/07/2013 06:06:30 AM, Tiejun Chen wrote:
>> We also can direct ISI exception to Guest like DSI.
>>
>> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
>> ---
>> arch/powerpc/kvm/booke_emulate.c | 3 +++
>> arch/powerpc/kvm/e500mc.c | 3 ++-
>> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> Are you seeing a real performance improvement from this? This will interfere
No. But after we reduce the exit to host, shouldn't this improve performance?
> somewhat with using the VF bit, if we were to ever do so, since VF only affects
Sorry, what is the VF you said?
Tiejun
^ permalink raw reply
* Re: [v1][KVM][PATCH 1/1] kvm:ppc:booehv: direct ISI exception to Guest
From: Scott Wood @ 2013-05-07 23:40 UTC (permalink / raw)
To: Tiejun Chen; +Cc: linuxppc-dev, agraf, kvm-ppc, kvm
In-Reply-To: <1367924791-24394-1-git-send-email-tiejun.chen@windriver.com>
On 05/07/2013 06:06:30 AM, Tiejun Chen wrote:
> We also can direct ISI exception to Guest like DSI.
>=20
> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
> ---
> arch/powerpc/kvm/booke_emulate.c | 3 +++
> arch/powerpc/kvm/e500mc.c | 3 ++-
> 2 files changed, 5 insertions(+), 1 deletion(-)
Are you seeing a real performance improvement from this? This will =20
interfere somewhat with using the VF bit, if we were to ever do so, =20
since VF only affects data accesses (and so the guest would see an ISI =20
storm rather than a machine check if it tries to execute from such an =20
address).
-Scott=
^ permalink raw reply
* Re: [PATCH] arch/powerpc: advertise ISA2.07, HTM, DSCR, EBB and ISEL bits in HWCAP2
From: Nishanth Aravamudan @ 2013-05-07 21:11 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Michael R Meissner, Steve Munroe, Peter Bergner,
Ryan Arnold, Michael Neuling
In-Reply-To: <1367959778.25488.17.camel@pasglop>
On 08.05.2013 [06:49:38 +1000], Benjamin Herrenschmidt wrote:
> On Tue, 2013-05-07 at 13:33 -0700, Nishanth Aravamudan wrote:
> > > Similarily, Nish, you may need to check that we remove those bits if
> > > pHyp has the partition in a mode that doesn't support them (P7
> > > compatibility for example) for migration purposes.
> >
> > Yep, I'll need to talk with Mikey about this part. Will be a follow-on
> > patch if needed. Minimally, the bit defines will stay the same, which is
> > the important part to get going right now.
>
> Actually in such a mode we'd get a back-version architected PVR so we
> should be fine now that I think twice, but of course that need to be
> tested.
True, I'll make sure it does get tested.
-Nish
^ permalink raw reply
* Re: [PATCH] arch/powerpc: advertise ISA2.07, HTM, DSCR, EBB and ISEL bits in HWCAP2
From: Benjamin Herrenschmidt @ 2013-05-07 20:49 UTC (permalink / raw)
To: Nishanth Aravamudan
Cc: linuxppc-dev, Michael R Meissner, Steve Munroe, Peter Bergner,
Ryan Arnold, Michael Neuling
In-Reply-To: <20130507203346.GA7307@linux.vnet.ibm.com>
On Tue, 2013-05-07 at 13:33 -0700, Nishanth Aravamudan wrote:
> > Similarily, Nish, you may need to check that we remove those bits if
> > pHyp has the partition in a mode that doesn't support them (P7
> > compatibility for example) for migration purposes.
>
> Yep, I'll need to talk with Mikey about this part. Will be a follow-on
> patch if needed. Minimally, the bit defines will stay the same, which is
> the important part to get going right now.
Actually in such a mode we'd get a back-version architected PVR so we
should be fine now that I think twice, but of course that need to be
tested.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] arch/powerpc: advertise ISA2.07, HTM, DSCR, EBB and ISEL bits in HWCAP2
From: Nishanth Aravamudan @ 2013-05-07 20:33 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Michael R Meissner, Steve Munroe, Peter Bergner,
Ryan Arnold, Michael Neuling
In-Reply-To: <1367876228.15842.62.camel@pasglop>
On 07.05.2013 [07:37:08 +1000], Benjamin Herrenschmidt wrote:
> On Mon, 2013-05-06 at 09:38 -0500, Ryan Arnold wrote:
> > My understanding was that these bits being 'on' is an indication of
> > what features the hardware supports (or what the kernel emulates) and
> > a not an indication of whether that facility is currently enabled or
> > not. If the hardware supports a particular feature but it is not
> > enabled I'd expect that user-space usage of that feature would cause
> > the kernel to trap on a facility availability exception (which is how
> > Altivec/VMX is implemented, being defaulted to turned off).
>
> Right but the discussion is about whether we should expose the bits
> when the kernel doesn't have the ability to handle the feature :-)
>
> IE. We need to remove the HTM feature if the kernel is compiled without
> transactional memory support.
>
> Similarily, Nish, you may need to check that we remove those bits if
> pHyp has the partition in a mode that doesn't support them (P7
> compatibility for example) for migration purposes.
Yep, I'll need to talk with Mikey about this part. Will be a follow-on
patch if needed. Minimally, the bit defines will stay the same, which is
the important part to get going right now.
Thanks,
Nish
^ permalink raw reply
* [PATCH v9 3/3] of/pci: microblaze: convert to common of_pci_range_parser
From: Andrew Murray @ 2013-05-07 15:31 UTC (permalink / raw)
To: robherring2
Cc: linux-mips, siva.kallam, linus.walleij, thierry.reding,
Liviu.Dudau, juhosg, paulus, linux-samsung-soc, linux, jg1.han,
jgunthorpe, thomas.abraham, linux-pci, grant.likely, arnd,
devicetree-discuss, kgene.kim, bhelgaas, linux-arm-kernel,
thomas.petazzoni, monstr, linux-kernel, suren.reddy,
Andrew Murray, linuxppc-dev
In-Reply-To: <1367940674-11987-1-git-send-email-Andrew.Murray@arm.com>
This patch converts the pci_load_of_ranges function to use the new common
of_pci_range_parser.
Signed-off-by: Andrew Murray <Andrew.Murray@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
---
arch/microblaze/pci/pci-common.c | 106 ++++++++++++++------------------------
1 files changed, 38 insertions(+), 68 deletions(-)
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 9ea521e..ba9e4a1 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -658,67 +658,42 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar,
void pci_process_bridge_OF_ranges(struct pci_controller *hose,
struct device_node *dev, int primary)
{
- const u32 *ranges;
- int rlen;
- int pna = of_n_addr_cells(dev);
- int np = pna + 5;
int memno = 0, isa_hole = -1;
- u32 pci_space;
- unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
unsigned long long isa_mb = 0;
struct resource *res;
+ struct of_pci_range range;
+ struct of_pci_range_parser parser;
pr_info("PCI host bridge %s %s ranges:\n",
dev->full_name, primary ? "(primary)" : "");
- /* Get ranges property */
- ranges = of_get_property(dev, "ranges", &rlen);
- if (ranges == NULL)
+ /* Check for ranges property */
+ if (of_pci_range_parser_init(&parser, dev))
return;
- /* Parse it */
pr_debug("Parsing ranges property...\n");
- while ((rlen -= np * 4) >= 0) {
+ for_each_of_pci_range(&parser, &range) {
/* Read next ranges element */
- pci_space = ranges[0];
- pci_addr = of_read_number(ranges + 1, 2);
- cpu_addr = of_translate_address(dev, ranges + 3);
- size = of_read_number(ranges + pna + 3, 2);
-
pr_debug("pci_space: 0x%08x pci_addr:0x%016llx ",
- pci_space, pci_addr);
+ range.pci_space, range.pci_addr);
pr_debug("cpu_addr:0x%016llx size:0x%016llx\n",
- cpu_addr, size);
-
- ranges += np;
+ range.cpu_addr, range.size);
/* If we failed translation or got a zero-sized region
* (some FW try to feed us with non sensical zero sized regions
* such as power3 which look like some kind of attempt
* at exposing the VGA memory hole)
*/
- if (cpu_addr == OF_BAD_ADDR || size == 0)
+ if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
continue;
- /* Now consume following elements while they are contiguous */
- for (; rlen >= np * sizeof(u32);
- ranges += np, rlen -= np * 4) {
- if (ranges[0] != pci_space)
- break;
- pci_next = of_read_number(ranges + 1, 2);
- cpu_next = of_translate_address(dev, ranges + 3);
- if (pci_next != pci_addr + size ||
- cpu_next != cpu_addr + size)
- break;
- size += of_read_number(ranges + pna + 3, 2);
- }
-
/* Act based on address space type */
res = NULL;
- switch ((pci_space >> 24) & 0x3) {
- case 1: /* PCI IO space */
+ switch (range.flags & IORESOURCE_TYPE_BITS) {
+ case IORESOURCE_IO:
pr_info(" IO 0x%016llx..0x%016llx -> 0x%016llx\n",
- cpu_addr, cpu_addr + size - 1, pci_addr);
+ range.cpu_addr, range.cpu_addr + range.size - 1,
+ range.pci_addr);
/* We support only one IO range */
if (hose->pci_io_size) {
@@ -726,11 +701,12 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
continue;
}
/* On 32 bits, limit I/O space to 16MB */
- if (size > 0x01000000)
- size = 0x01000000;
+ if (range.size > 0x01000000)
+ range.size = 0x01000000;
/* 32 bits needs to map IOs here */
- hose->io_base_virt = ioremap(cpu_addr, size);
+ hose->io_base_virt = ioremap(range.cpu_addr,
+ range.size);
/* Expect trouble if pci_addr is not 0 */
if (primary)
@@ -739,19 +715,20 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
/* pci_io_size and io_base_phys always represent IO
* space starting at 0 so we factor in pci_addr
*/
- hose->pci_io_size = pci_addr + size;
- hose->io_base_phys = cpu_addr - pci_addr;
+ hose->pci_io_size = range.pci_addr + range.size;
+ hose->io_base_phys = range.cpu_addr - range.pci_addr;
/* Build resource */
res = &hose->io_resource;
- res->flags = IORESOURCE_IO;
- res->start = pci_addr;
+ range.cpu_addr = range.pci_addr;
+
break;
- case 2: /* PCI Memory space */
- case 3: /* PCI 64 bits Memory space */
+ case IORESOURCE_MEM:
pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx %s\n",
- cpu_addr, cpu_addr + size - 1, pci_addr,
- (pci_space & 0x40000000) ? "Prefetch" : "");
+ range.cpu_addr, range.cpu_addr + range.size - 1,
+ range.pci_addr,
+ (range.pci_space & 0x40000000) ?
+ "Prefetch" : "");
/* We support only 3 memory ranges */
if (memno >= 3) {
@@ -759,13 +736,13 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
continue;
}
/* Handles ISA memory hole space here */
- if (pci_addr == 0) {
- isa_mb = cpu_addr;
+ if (range.pci_addr == 0) {
+ isa_mb = range.cpu_addr;
isa_hole = memno;
if (primary || isa_mem_base == 0)
- isa_mem_base = cpu_addr;
- hose->isa_mem_phys = cpu_addr;
- hose->isa_mem_size = size;
+ isa_mem_base = range.cpu_addr;
+ hose->isa_mem_phys = range.cpu_addr;
+ hose->isa_mem_size = range.size;
}
/* We get the PCI/Mem offset from the first range or
@@ -773,30 +750,23 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
* hole. If they don't match, bugger.
*/
if (memno == 0 ||
- (isa_hole >= 0 && pci_addr != 0 &&
+ (isa_hole >= 0 && range.pci_addr != 0 &&
hose->pci_mem_offset == isa_mb))
- hose->pci_mem_offset = cpu_addr - pci_addr;
- else if (pci_addr != 0 &&
- hose->pci_mem_offset != cpu_addr - pci_addr) {
+ hose->pci_mem_offset = range.cpu_addr -
+ range.pci_addr;
+ else if (range.pci_addr != 0 &&
+ hose->pci_mem_offset != range.cpu_addr -
+ range.pci_addr) {
pr_info(" \\--> Skipped (offset mismatch) !\n");
continue;
}
/* Build resource */
res = &hose->mem_resources[memno++];
- res->flags = IORESOURCE_MEM;
- if (pci_space & 0x40000000)
- res->flags |= IORESOURCE_PREFETCH;
- res->start = cpu_addr;
break;
}
- if (res != NULL) {
- res->name = dev->full_name;
- res->end = res->start + size - 1;
- res->parent = NULL;
- res->sibling = NULL;
- res->child = NULL;
- }
+ if (res != NULL)
+ of_pci_range_to_resource(&range, dev, res);
}
/* If there's an ISA hole and the pci_mem_offset is -not- matching
--
1.7.0.4
^ permalink raw reply related
* [PATCH v9 2/3] of/pci: mips: convert to common of_pci_range_parser
From: Andrew Murray @ 2013-05-07 15:31 UTC (permalink / raw)
To: robherring2
Cc: linux-mips, siva.kallam, linus.walleij, thierry.reding,
Liviu.Dudau, juhosg, paulus, linux-samsung-soc, linux, jg1.han,
jgunthorpe, thomas.abraham, linux-pci, grant.likely, arnd,
devicetree-discuss, kgene.kim, bhelgaas, linux-arm-kernel,
thomas.petazzoni, monstr, linux-kernel, suren.reddy,
Andrew Murray, linuxppc-dev
In-Reply-To: <1367940674-11987-1-git-send-email-Andrew.Murray@arm.com>
This patch converts the pci_load_of_ranges function to use the new common
of_pci_range_parser.
Signed-off-by: Andrew Murray <Andrew.Murray@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Grant Likely <grant.likely@secretlab.ca>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/mips/pci/pci.c | 50 ++++++++++++++++++--------------------------------
1 files changed, 18 insertions(+), 32 deletions(-)
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 0872f12..0d291e9 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -122,51 +122,37 @@ static void pcibios_scanbus(struct pci_controller *hose)
#ifdef CONFIG_OF
void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node)
{
- const __be32 *ranges;
- int rlen;
- int pna = of_n_addr_cells(node);
- int np = pna + 5;
+ struct of_pci_range range;
+ struct of_pci_range_parser parser;
pr_info("PCI host bridge %s ranges:\n", node->full_name);
- ranges = of_get_property(node, "ranges", &rlen);
- if (ranges == NULL)
- return;
hose->of_node = node;
- while ((rlen -= np * 4) >= 0) {
- u32 pci_space;
+ if (of_pci_range_parser_init(&parser, node))
+ return;
+
+ for_each_of_pci_range(&parser, &range) {
struct resource *res = NULL;
- u64 addr, size;
-
- pci_space = be32_to_cpup(&ranges[0]);
- addr = of_translate_address(node, ranges + 3);
- size = of_read_number(ranges + pna + 3, 2);
- ranges += np;
- switch ((pci_space >> 24) & 0x3) {
- case 1: /* PCI IO space */
+
+ switch (range.flags & IORESOURCE_TYPE_BITS) {
+ case IORESOURCE_IO:
pr_info(" IO 0x%016llx..0x%016llx\n",
- addr, addr + size - 1);
+ range.cpu_addr,
+ range.cpu_addr + range.size - 1);
hose->io_map_base =
- (unsigned long)ioremap(addr, size);
+ (unsigned long)ioremap(range.cpu_addr,
+ range.size);
res = hose->io_resource;
- res->flags = IORESOURCE_IO;
break;
- case 2: /* PCI Memory space */
- case 3: /* PCI 64 bits Memory space */
+ case IORESOURCE_MEM:
pr_info(" MEM 0x%016llx..0x%016llx\n",
- addr, addr + size - 1);
+ range.cpu_addr,
+ range.cpu_addr + range.size - 1);
res = hose->mem_resource;
- res->flags = IORESOURCE_MEM;
break;
}
- if (res != NULL) {
- res->start = addr;
- res->name = node->full_name;
- res->end = res->start + size - 1;
- res->parent = NULL;
- res->sibling = NULL;
- res->child = NULL;
- }
+ if (res != NULL)
+ of_pci_range_to_resource(&range, node, res);
}
}
#endif
--
1.7.0.4
^ permalink raw reply related
* [PATCH v9 1/3] of/pci: Provide support for parsing PCI DT ranges property
From: Andrew Murray @ 2013-05-07 15:31 UTC (permalink / raw)
To: robherring2
Cc: linux-mips, siva.kallam, linus.walleij, thierry.reding,
Liviu.Dudau, juhosg, paulus, linux-samsung-soc, linux, jg1.han,
jgunthorpe, thomas.abraham, linux-pci, grant.likely, arnd,
devicetree-discuss, kgene.kim, bhelgaas, linux-arm-kernel,
thomas.petazzoni, monstr, linux-kernel, suren.reddy,
Andrew Murray, linuxppc-dev
In-Reply-To: <1367940674-11987-1-git-send-email-Andrew.Murray@arm.com>
This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges property without relying on architecture specific
DT handling. This will make it easier to write archiecture independent host bridge
drivers and mitigate against further duplication of DT parsing code.
This patch can be used in the following way:
struct of_pci_range_parser parser;
struct of_pci_range range;
if (of_pci_range_parser_init(&parser, np))
; //no ranges property
for_each_of_pci_range(&parser, &range) {
/*
directly access properties of the address range, e.g.:
range.pci_space, range.pci_addr, range.cpu_addr,
range.size, range.flags
alternatively obtain a struct resource, e.g.:
struct resource res;
of_pci_range_to_resource(&range, np, &res);
*/
}
Additionally the implementation takes care of adjacent ranges and merges them
into a single range (as was the case with powerpc and microblaze).
Signed-off-by: Andrew Murray <Andrew.Murray@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
---
drivers/of/address.c | 67 ++++++++++++++++++++++++++++++++++++++++++++
include/linux/of_address.h | 48 +++++++++++++++++++++++++++++++
2 files changed, 115 insertions(+), 0 deletions(-)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 04da786..fdd0636 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -227,6 +227,73 @@ int of_pci_address_to_resource(struct device_node *dev, int bar,
return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
}
EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
+
+int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node)
+{
+ const int na = 3, ns = 2;
+ int rlen;
+
+ parser->node = node;
+ parser->pna = of_n_addr_cells(node);
+ parser->np = parser->pna + na + ns;
+
+ parser->range = of_get_property(node, "ranges", &rlen);
+ if (parser->range == NULL)
+ return -ENOENT;
+
+ parser->end = parser->range + rlen / sizeof(__be32);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
+
+struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
+ struct of_pci_range *range)
+{
+ const int na = 3, ns = 2;
+
+ if (!range)
+ return NULL;
+
+ if (!parser->range || parser->range + parser->np > parser->end)
+ return NULL;
+
+ range->pci_space = parser->range[0];
+ range->flags = of_bus_pci_get_flags(parser->range);
+ range->pci_addr = of_read_number(parser->range + 1, ns);
+ range->cpu_addr = of_translate_address(parser->node,
+ parser->range + na);
+ range->size = of_read_number(parser->range + parser->pna + na, ns);
+
+ parser->range += parser->np;
+
+ /* Now consume following elements while they are contiguous */
+ while (parser->range + parser->np <= parser->end) {
+ u32 flags, pci_space;
+ u64 pci_addr, cpu_addr, size;
+
+ pci_space = be32_to_cpup(parser->range);
+ flags = of_bus_pci_get_flags(parser->range);
+ pci_addr = of_read_number(parser->range + 1, ns);
+ cpu_addr = of_translate_address(parser->node,
+ parser->range + na);
+ size = of_read_number(parser->range + parser->pna + na, ns);
+
+ if (flags != range->flags)
+ break;
+ if (pci_addr != range->pci_addr + range->size ||
+ cpu_addr != range->cpu_addr + range->size)
+ break;
+
+ range->size += size;
+ parser->range += parser->np;
+ }
+
+ return range;
+}
+EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
+
#endif /* CONFIG_PCI */
/*
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 0506eb5..4c2e6f2 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -4,6 +4,36 @@
#include <linux/errno.h>
#include <linux/of.h>
+struct of_pci_range_parser {
+ struct device_node *node;
+ const __be32 *range;
+ const __be32 *end;
+ int np;
+ int pna;
+};
+
+struct of_pci_range {
+ u32 pci_space;
+ u64 pci_addr;
+ u64 cpu_addr;
+ u64 size;
+ u32 flags;
+};
+
+#define for_each_of_pci_range(parser, range) \
+ for (; of_pci_range_parser_one(parser, range);)
+
+static inline void of_pci_range_to_resource(struct of_pci_range *range,
+ struct device_node *np,
+ struct resource *res)
+{
+ res->flags = range->flags;
+ res->start = range->cpu_addr;
+ res->end = range->cpu_addr + range->size - 1;
+ res->parent = res->child = res->sibling = NULL;
+ res->name = np->full_name;
+}
+
#ifdef CONFIG_OF_ADDRESS
extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
extern bool of_can_translate_address(struct device_node *dev);
@@ -27,6 +57,11 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
#define pci_address_to_pio pci_address_to_pio
#endif
+extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node);
+extern struct of_pci_range *of_pci_range_parser_one(
+ struct of_pci_range_parser *parser,
+ struct of_pci_range *range);
#else /* CONFIG_OF_ADDRESS */
#ifndef of_address_to_resource
static inline int of_address_to_resource(struct device_node *dev, int index,
@@ -53,6 +88,19 @@ static inline const __be32 *of_get_address(struct device_node *dev, int index,
{
return NULL;
}
+
+static inline int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node)
+{
+ return -1;
+}
+
+static inline struct of_pci_range *of_pci_range_parser_one(
+ struct of_pci_range_parser *parser,
+ struct of_pci_range *range)
+{
+ return NULL;
+}
#endif /* CONFIG_OF_ADDRESS */
--
1.7.0.4
^ permalink raw reply related
* [PATCH v9 0/3] of/pci: Provide common support for PCI DT parsing
From: Andrew Murray @ 2013-05-07 15:31 UTC (permalink / raw)
To: robherring2
Cc: linux-mips, siva.kallam, linus.walleij, thierry.reding,
Liviu.Dudau, juhosg, paulus, linux-samsung-soc, linux, jg1.han,
jgunthorpe, thomas.abraham, linux-pci, grant.likely, arnd,
devicetree-discuss, kgene.kim, bhelgaas, linux-arm-kernel,
thomas.petazzoni, monstr, linux-kernel, suren.reddy,
Andrew Murray, linuxppc-dev
This patchset factors out duplicated code associated with parsing PCI
DT "ranges" properties across the architectures and introduces a
"ranges" parser. This parser "of_pci_range_parser" can be used directly
by ARM host bridge drivers enabling them to obtain ranges from device
trees.
I've included the Reviewed-by, Tested-by and Acked-by's received from
v5/v6/v7/v8 in this patchset, earlier versions of this patchset (v3) have been
tested-by:
Thierry Reding <thierry.reding@avionic-design.de>
Jingoo Han <jg1.han@samsung.com>
I've tested that this patchset builds and runs on ARM and that it builds on
PowerPC, x86_64, MIPS and Microblaze.
Compared to the v8 sent by Andrew Murray, the following changes have been made
(please note that the MIPS patch is unchanged from v8):
* Remove the unification of pci_process_bridge_OF_ranges between PowerPC and
Microblaze. Feedback from Bjorn and Benjamin (along with a NAK) suggested
that this goes against their future direction (using more of struct
pci_host_bridge and less of arch specific struct pci_controller).
Compared to the v7 sent by Andrew Murray, the following changes have been made
(please note that the first patch is unchanged from v7):
* Rename of_pci_range_parser to of_pci_range_parser_init and
of_pci_process_ranges to of_pci_range_parser_one as suggested by Grant
Likely.
* Reverted back to using a switch statement instead of if/else in
pci_process_bridge_OF_ranges. Grant Likely highlighted this change from
the original code which was unnecessary.
* Squashed in a patch provided by Gabor Juhos which fixes build errors on
MIPS found in the last patchset.
Compared to the v6 sent by Andrew Murray, the following changes have
been made in response to build errors/warnings:
* Inclusion of linux/of_address.h in of_pci.c as suggested by Michal
Simek to prevent compilation failures on Microblaze (and others) and his
ack.
* Use of externs, static inlines and a typo in linux/of_address.h in response
to linker errors (multiple defination) on x86_64 as spotted by a kbuild test
robot on (jcooper/linux.git mvebu/drivers)
* Add EXPORT_SYMBOL_GPL to of_pci_range_parser function to be consistent
with of_pci_process_ranges function
Compared to the v5 sent by Andrew Murray, the following changes have
been made:
* Use of CONFIG_64BIT instead of CONFIG_[a32bitarch] as suggested by
Rob Herring in drivers/of/of_pci.c
* Added forward declaration of struct pci_controller in linux/of_pci.h
to prevent compiler warning as suggested by Thomas Petazzoni
* Improved error checking (!range check), removal of unnecessary be32_to_cpup
call, improved formatting of struct of_pci_range_parser layout and
replacement of macro with a static inline. All suggested by Rob Herring.
Compared to the v4 (incorrectly labelled v3) sent by Andrew Murray,
the following changes have been made:
* Split the patch as suggested by Rob Herring
Compared to the v3 sent by Andrew Murray, the following changes have
been made:
* Unify and move duplicate pci_process_bridge_OF_ranges functions to
drivers/of/of_pci.c as suggested by Rob Herring
* Fix potential build errors with Microblaze/MIPS
Compared to "[PATCH v5 01/17] of/pci: Provide support for parsing PCI DT
ranges property", the following changes have been made:
* Correct use of IORESOURCE_* as suggested by Russell King
* Improved interface and naming as suggested by Thierry Reding
Compared to the v2 sent by Andrew Murray, Thomas Petazzoni did:
* Add a memset() on the struct of_pci_range_iter when starting the
for loop in for_each_pci_range(). Otherwise, with an uninitialized
of_pci_range_iter, of_pci_process_ranges() may crash.
* Add parenthesis around 'res', 'np' and 'iter' in the
for_each_of_pci_range macro definitions. Otherwise, passing
something like &foobar as 'res' didn't work.
* Rebased on top of 3.9-rc2, which required fixing a few conflicts in
the Microblaze code.
v2:
This follows on from suggestions made by Grant Likely
(marc.info/?l=linux-kernel&m=136079602806328)
Andrew Murray (3):
of/pci: Provide support for parsing PCI DT ranges property
of/pci: mips: convert to common of_pci_range_parser
of/pci: microblaze: convert to common of_pci_range_parser
arch/microblaze/pci/pci-common.c | 106 ++++++++++++++------------------------
arch/mips/pci/pci.c | 50 ++++++-----------
drivers/of/address.c | 67 ++++++++++++++++++++++++
include/linux/of_address.h | 48 +++++++++++++++++
4 files changed, 171 insertions(+), 100 deletions(-)
^ permalink raw reply
* Re: [PATCH] arch/powerpc: advertise ISA2.07, HTM, DSCR, EBB and ISEL bits in HWCAP2
From: Ryan Arnold @ 2013-05-07 15:11 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Michael R Meissner, Steve Munroe, Peter Bergner,
Michael Neuling, Nishanth Aravamudan
In-Reply-To: <1367876228.15842.62.camel@pasglop>
[-- Attachment #1: Type: text/plain, Size: 1427 bytes --]
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote on 05/06/2013
04:37:08 PM:
> Benjamin Herrenschmidt <benh@kernel.crashing.org>
> 05/06/2013 04:37 PM
>
> To
>
> Ryan Arnold/Rochester/IBM@IBMUS
>
> cc
>
> Nishanth Aravamudan <nacc@linux.vnet.ibm.com>, linuxppc-
> dev@lists.ozlabs.org, Michael R Meissner/Cambridge/IBM@IBMUS,
> Michael Neuling <michael.neuling@au1.ibm.com>, Peter Bergner/
> Rochester/IBM@IBMUS, Steve Munroe/Rochester/IBM@IBMUS
>
> Subject
>
> Re: [PATCH] arch/powerpc: advertise ISA2.07, HTM, DSCR, EBB and ISEL
> bits in HWCAP2
>
> On Mon, 2013-05-06 at 09:38 -0500, Ryan Arnold wrote:
> > My understanding was that these bits being 'on' is an indication of
> > what features the hardware supports (or what the kernel emulates) and
> > a not an indication of whether that facility is currently enabled or
> > not. If the hardware supports a particular feature but it is not
> > enabled I'd expect that user-space usage of that feature would cause
> > the kernel to trap on a facility availability exception (which is how
> > Altivec/VMX is implemented, being defaulted to turned off).
>
> Right but the discussion is about whether we should expose the bits
> when the kernel doesn't have the ability to handle the feature :-)
>
> IE. We need to remove the HTM feature if the kernel is compiled without
> transactional memory support.
Thanks for explaining. This is exactly how it should work.
Ryan
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^ permalink raw reply
* Re: [PATCH v2 1/4] powerpc/cputable: reserve bits in HWCAP2 for new features
From: Ryan Arnold @ 2013-05-07 15:07 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Michael Neuling, Nishanth Aravamudan, Steve Munroe, Peter Bergner,
linuxppc-dev, Michael R Meissner
In-Reply-To: <1367876461.15842.66.camel@pasglop>
[-- Attachment #1: Type: text/plain, Size: 938 bytes --]
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote on 05/06/2013
04:41:01 PM:
> Benjamin Herrenschmidt <benh@kernel.crashing.org>
> 05/06/2013 04:41 PM
>
> To
>
> Ryan Arnold/Rochester/IBM@IBMUS
>
> cc
>
> Nishanth Aravamudan <nacc@linux.vnet.ibm.com>, linuxppc-
> dev@lists.ozlabs.org, michael@ellerman.id.au, Michael R Meissner/
> Cambridge/IBM@IBMUS, Michael Neuling <mikey@neuling.org>, Peter
> Bergner/Rochester/IBM@IBMUS, Steve Munroe/Rochester/IBM@IBMUS
>
> Subject
>
> Re: [PATCH v2 1/4] powerpc/cputable: reserve bits in HWCAP2 for new
features
>
> On Mon, 2013-05-06 at 14:07 -0500, Ryan Arnold wrote:
> > Notice that I changed DSCR to DSC. The 'R' wasn't descriptive.
>
> The "R" is the name of the register for which we are exposing the
> availability to userspace... it's also the name of the sysfs entry so
> I'd rather keep it for consistency.
I'm fine with keeping the 'R' in the name. Thanks for the input.
Ryan
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^ permalink raw reply
* [PATCH][v2] powerpc: Bring all threads online prior to migration/hibernation
From: Robert Jennings @ 2013-05-07 14:34 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Nathan Fontenot, Robert Jennings, linuxppc-dev
This patch brings online all threads which are present but not online
prior to migration/hibernation. After migration/hibernation those
threads are taken back offline.
During migration/hibernation all online CPUs must call H_JOIN, this is
required by the hypervisor. Without this patch, threads that are offline
(H_CEDE'd) will not be woken to make the H_JOIN call and the OS will be
deadlocked (all threads either JOIN'd or CEDE'd).
Cc: <stable@kernel.org>
Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com>
---
v2: Fixed for UP build
---
arch/powerpc/include/asm/rtas.h | 2 +
arch/powerpc/kernel/rtas.c | 113 ++++++++++++++++++++++++++++++
arch/powerpc/platforms/pseries/suspend.c | 22 ++++++
3 files changed, 137 insertions(+)
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index a8bc2bb..34fd704 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -264,6 +264,8 @@ extern void rtas_progress(char *s, unsigned short hex);
extern void rtas_initialize(void);
extern int rtas_suspend_cpu(struct rtas_suspend_me_data *data);
extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data);
+extern int rtas_online_cpus_mask(cpumask_var_t cpus);
+extern int rtas_offline_cpus_mask(cpumask_var_t cpus);
extern int rtas_ibm_suspend_me(struct rtas_args *);
struct rtc_time;
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 1fd6e7b..52add6f 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -19,6 +19,7 @@
#include <linux/init.h>
#include <linux/capability.h>
#include <linux/delay.h>
+#include <linux/cpu.h>
#include <linux/smp.h>
#include <linux/completion.h>
#include <linux/cpumask.h>
@@ -807,6 +808,95 @@ static void rtas_percpu_suspend_me(void *info)
__rtas_suspend_cpu((struct rtas_suspend_me_data *)info, 1);
}
+enum rtas_cpu_state {
+ DOWN,
+ UP,
+};
+
+#ifndef CONFIG_SMP
+static int rtas_cpu_state_change_mask(enum rtas_cpu_state state,
+ cpumask_var_t cpus)
+{
+ if (!cpumask_empty(cpus)) {
+ cpumask_clear(cpus);
+ return -EINVAL;
+ } else
+ return 0;
+}
+#else
+/* On return cpumask will be altered to indicate CPUs changed.
+ * CPUs with states changed will be set in the mask,
+ * CPUs with status unchanged will be unset in the mask. */
+static int rtas_cpu_state_change_mask(enum rtas_cpu_state state,
+ cpumask_var_t cpus)
+{
+ int cpu;
+ int cpuret = 0;
+ int ret = 0;
+
+ if (cpumask_empty(cpus))
+ return 0;
+
+ for_each_cpu(cpu, cpus) {
+ switch (state) {
+ case DOWN:
+ cpuret = cpu_down(cpu);
+ break;
+ case UP:
+ cpuret = cpu_up(cpu);
+ break;
+ }
+ if (cpuret) {
+ pr_debug("%s: cpu_%s for cpu#%d returned %d.\n",
+ __func__,
+ ((state == UP) ? "up" : "down"),
+ cpu, cpuret);
+ if (!ret)
+ ret = cpuret;
+ if (state == UP) {
+ /* clear bits for unchanged cpus, return */
+ cpumask_shift_right(cpus, cpus, cpu);
+ cpumask_shift_left(cpus, cpus, cpu);
+ break;
+ } else {
+ /* clear bit for unchanged cpu, continue */
+ cpumask_clear_cpu(cpu, cpus);
+ }
+ }
+ }
+
+ return ret;
+}
+#endif
+
+int rtas_online_cpus_mask(cpumask_var_t cpus)
+{
+ int ret;
+
+ ret = rtas_cpu_state_change_mask(UP, cpus);
+
+ if (ret) {
+ cpumask_var_t tmp_mask;
+
+ if (!alloc_cpumask_var(&tmp_mask, GFP_TEMPORARY))
+ return ret;
+
+ /* Use tmp_mask to preserve cpus mask from first failure */
+ cpumask_copy(tmp_mask, cpus);
+ rtas_offline_cpus_mask(tmp_mask);
+ free_cpumask_var(tmp_mask);
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL(rtas_online_cpus_mask);
+
+int rtas_offline_cpus_mask(cpumask_var_t cpus)
+{
+ return rtas_cpu_state_change_mask(DOWN, cpus);
+}
+EXPORT_SYMBOL(rtas_offline_cpus_mask);
+
int rtas_ibm_suspend_me(struct rtas_args *args)
{
long state;
@@ -814,6 +904,8 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
struct rtas_suspend_me_data data;
DECLARE_COMPLETION_ONSTACK(done);
+ cpumask_var_t offline_mask;
+ int cpuret;
if (!rtas_service_present("ibm,suspend-me"))
return -ENOSYS;
@@ -837,11 +929,24 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
return 0;
}
+ if (!alloc_cpumask_var(&offline_mask, GFP_TEMPORARY))
+ return -ENOMEM;
+
atomic_set(&data.working, 0);
atomic_set(&data.done, 0);
atomic_set(&data.error, 0);
data.token = rtas_token("ibm,suspend-me");
data.complete = &done;
+
+ /* All present CPUs must be online */
+ cpumask_andnot(offline_mask, cpu_present_mask, cpu_online_mask);
+ cpuret = rtas_online_cpus_mask(offline_mask);
+ if (cpuret) {
+ pr_err("%s: Could not bring present CPUs online.\n", __func__);
+ atomic_set(&data.error, cpuret);
+ goto out;
+ }
+
stop_topology_update();
/* Call function on all CPUs. One of us will make the
@@ -857,6 +962,14 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
start_topology_update();
+ /* Take down CPUs not online prior to suspend */
+ cpuret = rtas_offline_cpus_mask(offline_mask);
+ if (cpuret)
+ pr_warn("%s: Could not restore CPUs to offline state.\n",
+ __func__);
+
+out:
+ free_cpumask_var(offline_mask);
return atomic_read(&data.error);
}
#else /* CONFIG_PPC_PSERIES */
diff --git a/arch/powerpc/platforms/pseries/suspend.c b/arch/powerpc/platforms/pseries/suspend.c
index 47226e0..5f997e7 100644
--- a/arch/powerpc/platforms/pseries/suspend.c
+++ b/arch/powerpc/platforms/pseries/suspend.c
@@ -16,6 +16,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/suspend.h>
#include <linux/stat.h>
@@ -126,11 +127,15 @@ static ssize_t store_hibernate(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
+ cpumask_var_t offline_mask;
int rc;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
+ if (!alloc_cpumask_var(&offline_mask, GFP_TEMPORARY))
+ return -ENOMEM;
+
stream_id = simple_strtoul(buf, NULL, 16);
do {
@@ -140,15 +145,32 @@ static ssize_t store_hibernate(struct device *dev,
} while (rc == -EAGAIN);
if (!rc) {
+ /* All present CPUs must be online */
+ cpumask_andnot(offline_mask, cpu_present_mask,
+ cpu_online_mask);
+ rc = rtas_online_cpus_mask(offline_mask);
+ if (rc) {
+ pr_err("%s: Could not bring present CPUs online.\n",
+ __func__);
+ goto out;
+ }
+
stop_topology_update();
rc = pm_suspend(PM_SUSPEND_MEM);
start_topology_update();
+
+ /* Take down CPUs not online prior to suspend */
+ if (!rtas_offline_cpus_mask(offline_mask))
+ pr_warn("%s: Could not restore CPUs to offline "
+ "state.\n", __func__);
}
stream_id = 0;
if (!rc)
rc = count;
+out:
+ free_cpumask_var(offline_mask);
return rc;
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH] powerpc/fsl_msi: fix error return code in fsl_of_msi_probe()
From: Wei Yongjun @ 2013-05-07 13:46 UTC (permalink / raw)
To: benh, paulus, grant.likely, rob.herring, galak, u.kleine-koenig,
agraf, gregkh
Cc: yongjun_wei, linuxppc-dev, devicetree-discuss, linux-kernel
From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Fix to return a negative error code in the MSI bitmap alloc error
handling case instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
---
arch/powerpc/sysdev/fsl_msi.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index ab02db3..f45556a 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -370,7 +370,6 @@ static int fsl_of_msi_probe(struct platform_device *dev)
struct fsl_msi *msi;
struct resource res;
int err, i, j, irq_index, count;
- int rc;
const u32 *p;
const struct fsl_msi_feature *features;
int len;
@@ -431,8 +430,8 @@ static int fsl_of_msi_probe(struct platform_device *dev)
*/
msi->phandle = dev->dev.of_node->phandle;
- rc = fsl_msi_init_allocator(msi);
- if (rc) {
+ err = fsl_msi_init_allocator(msi);
+ if (err) {
dev_err(&dev->dev, "Error allocating MSI bitmap\n");
goto error_out;
}
^ permalink raw reply related
* [v1][KVM][PATCH 1/1] kvm:ppc:booehv: direct ISI exception to Guest
From: Tiejun Chen @ 2013-05-07 11:06 UTC (permalink / raw)
To: agraf, scottwood; +Cc: linuxppc-dev, kvm, kvm-ppc
We also can direct ISI exception to Guest like DSI.
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
arch/powerpc/kvm/booke_emulate.c | 3 +++
arch/powerpc/kvm/e500mc.c | 3 ++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
index 27a4b28..33b14e9 100644
--- a/arch/powerpc/kvm/booke_emulate.c
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -197,6 +197,9 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
break;
case SPRN_IVOR3:
vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;
+#ifdef CONFIG_KVM_BOOKE_HV
+ mtspr(SPRN_GIVOR3, spr_val);
+#endif
break;
case SPRN_IVOR4:
vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val;
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index c3bdc0a..acf546a 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -123,6 +123,7 @@ void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
mtspr(SPRN_GIVPR, vcpu->arch.ivpr);
mtspr(SPRN_GIVOR2, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
+ mtspr(SPRN_GIVOR3, vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]);
mtspr(SPRN_GIVOR8, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
mtspr(SPRN_GSPRG0, (unsigned long)vcpu->arch.shared->sprg0);
mtspr(SPRN_GSPRG1, (unsigned long)vcpu->arch.shared->sprg1);
@@ -185,7 +186,7 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
- SPRN_EPCR_DUVD;
+ SPRN_EPCR_DUVD | SPRN_EPCR_ISIGS;
#ifdef CONFIG_64BIT
vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
#endif
--
1.7.9.5
^ permalink raw reply related
* [v2][KVM][PATCH 1/1] kvm:ppc: enable doorbell exception with CONFIG_PPC_DOORBELL
From: Tiejun Chen @ 2013-05-07 10:23 UTC (permalink / raw)
To: agraf; +Cc: linuxppc-dev, kvm, kvm-ppc
CONFIG_PPC_DOORBELL is enough to cover all variants.
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
arch/powerpc/kvm/booke.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 1020119..62d4ece 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -795,7 +795,7 @@ static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
kvmppc_fill_pt_regs(®s);
timer_interrupt(®s);
break;
-#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
+#if defined(CONFIG_PPC_DOORBELL)
case BOOKE_INTERRUPT_DOORBELL:
kvmppc_fill_pt_regs(®s);
doorbell_exception(®s);
--
1.7.9.5
^ permalink raw reply related
* Re: [v1][KVM][PATCH 1/1] kvm:ppc: enable doorbell exception with E500MC
From: tiejun.chen @ 2013-05-07 10:22 UTC (permalink / raw)
To: Alexander Graf; +Cc: linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <518859F5.7020503@windriver.com>
On 05/07/2013 09:33 AM, tiejun.chen wrote:
> On 05/06/2013 10:58 PM, Alexander Graf wrote:
>> On 05/06/2013 04:53 AM, Tiejun Chen wrote:
>>> Actually E500MC also support doorbell exception, and CONFIG_PPC_E500MC
>>> can cover BOOK3E/BOOK3E_64 as well.
>>>
>>> Signed-off-by: Tiejun Chen<tiejun.chen@windriver.com>
>>> ---
>>> arch/powerpc/kvm/booke.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
>>> index 1020119..dc1f590 100644
>>> --- a/arch/powerpc/kvm/booke.c
>>> +++ b/arch/powerpc/kvm/booke.c
>>> @@ -795,7 +795,7 @@ static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
>>> kvmppc_fill_pt_regs(®s);
>>> timer_interrupt(®s);
>>> break;
>>> -#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
>>> +#if defined(CONFIG_PPC_E500MC)
>>
>> I suppose you mean CONFIG_KVM_E500MC here? Why didn't this work for you before?
>
> This works for me.
>
> Here I just mean currently CONFIG_PPC_E500MC is always selected no matter what
> CONFIG_PPC_FSL_BOOK3E or CONFIG_PPC_BOOK3E_64 is enabled. And especially, this
> is already in the arch/powerpc/kvm/booke.c file, so I think one #ifdef
> (CONFIG_PPC_E500MC) is enough and also makes sense.
>
>> The ifdef above should cover the same range of CPUs.
>
> Or furthermore, the #ifdef CONFIG_PPC_DOORBELL is reasonable to cover this.
>
I think this may be better so I send next version with this. So please take a
look at.
Tiejun
^ permalink raw reply
* Re: [PATCH v8 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC
From: Benjamin Herrenschmidt @ 2013-05-07 10:19 UTC (permalink / raw)
To: Andrew Murray
Cc: linux-mips@linux-mips.org, siva.kallam@samsung.com,
linux-pci@vger.kernel.org, linus.walleij@linaro.org,
thierry.reding@avionic-design.de, Liviu Dudau, juhosg@openwrt.org,
paulus@samba.org, linux-samsung-soc@vger.kernel.org,
linux@arm.linux.org.uk, jg1.han@samsung.com,
jgunthorpe@obsidianresearch.com, thomas.abraham@linaro.org,
grant.likely@linaro.org, Rob Herring, arnd@arndb.de,
devicetree-discuss@lists.ozlabs.org, kgene.kim@samsung.com,
bhelgaas@google.com, linux-arm-kernel@lists.infradead.org,
thomas.petazzoni@free-electrons.com, monstr@monstr.eu,
linux-kernel@vger.kernel.org, suren.reddy@samsung.com,
linuxppc-dev
In-Reply-To: <20130507080142.GA8808@arm.com>
On Tue, 2013-05-07 at 09:01 +0100, Andrew Murray wrote:
>
> There were no objections to this latest revision until now and it is
> currently sitting with Jason Cooper (mvebu-next/pcie). [1]
Ok, well I've just sent Linus a pull request for my changes so at least
drop the powerpc changes from your tree for the time being.
> This is a view that was also shared by Bjorn [2] when I attempted to
> submit a patchset which moves struct pci_controller to asm-generic.
Right, it's the logical way to go
> The motativation for my patchsets were to give a way for ARM PCI host
> bridge drivers to parse the DT ranges property, but this snow-balled
> into unifying pci_process_bridge_OF_ranges.
Which I understand, I would probably have done the same thing in your
shoes :-)
> My v8 patchset provides a of_pci_range_parser which is used directly
> by a few ARM PCI DT host bridge drivers, this has been generally
> accepted and tested. I don't see why this can't remain and so I'd
> really like to keep this around.
Sure, no objection, in fact I should/could probably update my new code
to use it as well.
> Grant, Benjamin would you be happy for me to resubmit this series
> which provides the of_pci_range_parser which will be used by the
> separate implementations of pci_process_bridge_OF_ranges in
> PowerPC/Microblaze?
Sure, in fact feel free to update my new code if you have more bandwidth
than I do, it should hit Linus tree soon hopefully unless he objects to
me having a second pull request this merge window...
> Benjamin are you able to still use of_pci_range_parser in your
> 'Support per-aperture memory offset' patch?
I see no reason why not. I just haven't looked into it much, I admit,
being bogged down with a pile of new HW bringup in the lab etc...
Cheers,
Ben.
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2013-05-07 10:10 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev, Linux Kernel list
Hi Linus !
Here are a few more powerpc bits that I would like in 3.10. Mostly
remaining bolts & screw tightening of power8 support such as actually
exposing the new features via the previously added AT_HWCAP2, and a
few fixes, some of them for problems exposed recently like irqdomain
warnings or sysfs access permission issues, some exposed by power8
hardware.
The only change outside of arch/powerpc is a small one to irqdomain.c
to allow silent failure to fix a problem on Cell where we get a dozen
WARN_ON's tripping at boot for what is basically a normal case.
Grant Acked it but I forgot to put it in and didn't want to rebase.
Cheers,
Ben.
The following changes since commit 01227a889ed56ae53aeebb9f93be9d54dd8b2de8:
Merge tag 'kvm-3.10-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm (2013-05-05 14:47:31 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git test
for you to fetch changes up to 5737789c8340620d7b542d1d4e9b197de8eb2801:
powerpc: Make hard_irq_disable() do the right thing vs. irq tracing (2013-05-07 17:13:57 +1000)
----------------------------------------------------------------
Anton Blanchard (1):
powerpc: Emulate non privileged DSCR read and write
Benjamin Herrenschmidt (9):
powerpc/powerpnv: Properly handle failure starting CPUs
powerpc/pci: Don't add bogus empty resources to PHBs
powerpc/pnv: Fix "compatible" property for P8 PHB
irqdomain: Allow quiet failure mode
powerpc/cell/spufs: Fix status attribute permission
powerpc/cell/iommu: Improve error message for missing node
powerpc/pci: Support per-aperture memory offset
powerpc/topology: Fix spurr attribute permission
powerpc: Make hard_irq_disable() do the right thing vs. irq tracing
Brian King (1):
powerpc/pseries: Force 32 bit MSIs for devices that require it
Jeremy Kerr (1):
powerpc/powernv: Defer OPAL exception handler registration
Kleber Sacilotto de Souza (1):
powerpc/pseries: Perform proper max_bus_speed detection
Michael Neuling (1):
powerpc/tm: Fix null pointer deference in flush_hash_page
Nishanth Aravamudan (4):
powerpc/cputable: Reserve bits in HWCAP2 for new features
powerpc/cputable: Advertise DSCR support on P7/P7+
powerpc/cputable: Advertise ISEL support on appropriate embedded processors
powerpc/cputable: Advertise support for ISEL/HTM/DSCR/TAR on POWER8
arch/powerpc/include/asm/cputable.h | 2 +
arch/powerpc/include/asm/hw_irq.h | 16 ++---
arch/powerpc/include/asm/machdep.h | 3 +
arch/powerpc/include/asm/pci-bridge.h | 8 +--
arch/powerpc/include/asm/ppc-opcode.h | 4 ++
arch/powerpc/include/uapi/asm/cputable.h | 9 +++
arch/powerpc/kernel/cputable.c | 14 ++++
arch/powerpc/kernel/pci-common.c | 101 ++++++++++-----------------
arch/powerpc/kernel/pci_32.c | 2 +-
arch/powerpc/kernel/pci_64.c | 2 +-
arch/powerpc/kernel/sysfs.c | 2 +-
arch/powerpc/kernel/traps.c | 10 ++-
arch/powerpc/mm/hash_utils_64.c | 1 +
arch/powerpc/platforms/cell/iommu.c | 2 +-
arch/powerpc/platforms/cell/spu_base.c | 2 +-
arch/powerpc/platforms/embedded6xx/mpc10x.h | 11 ---
arch/powerpc/platforms/powermac/pci.c | 2 +-
arch/powerpc/platforms/powernv/opal.c | 15 +++-
arch/powerpc/platforms/powernv/pci-ioda.c | 12 ++--
arch/powerpc/platforms/powernv/smp.c | 4 +-
arch/powerpc/platforms/pseries/msi.c | 21 +++++-
arch/powerpc/platforms/pseries/pci.c | 53 ++++++++++++++
arch/powerpc/platforms/pseries/pseries.h | 4 ++
arch/powerpc/platforms/pseries/setup.c | 2 +
arch/powerpc/platforms/wsp/wsp_pci.c | 2 +-
arch/powerpc/sysdev/fsl_pci.c | 11 +--
arch/powerpc/sysdev/mpic.c | 14 +++-
arch/powerpc/sysdev/ppc4xx_pci.c | 15 ++--
kernel/irq/irqdomain.c | 20 +++++-
29 files changed, 236 insertions(+), 128 deletions(-)
^ permalink raw reply
* [PATCH] powerpc, cpu hotplug: Fix warning on boot regarding sysfs file permission
From: Srivatsa S. Bhat @ 2013-05-07 9:13 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: caiqian, gregkh, balbi, paulus, anton, Srivatsa S. Bhat
On boot, the following warning shows up on each CPU online operation:
------------[ cut here ]------------
WARNING: at drivers/base/core.c:575
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.9.0+ #2
task: c0000006fa180000 ti: c0000006fa200000 task.ti: c0000006fa200000
NIP: c00000000053772c LR: c000000000537728 CTR: 0000000001764c5c
REGS: c0000006fa203780 TRAP: 0700 Tainted: G W (3.9.0+)
MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI> CR: 28000024 XER: 00000002
SOFTE: 1
CFAR: c0000000008a6994
GPR00: c000000000537728 c0000006fa203a00 c000000000dafaf0 0000000000000020
GPR04: 0000000000000001 c000000000085d9c 0000000000000000 0000000000000002
GPR08: 0000000000000000 c0000006fa180000 c0000006fa180000 c000000000e38804
GPR12: 0000000000000000 c000000001db0000 c00000000000c1b0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000001 c000000000e44880
GPR20: c000000000e44d18 c000000000c726a8 0000000000000000 0000000000000000
GPR24: c000000000bab158 000000000000007e c000000000e68200 c000000000c71d48
GPR28: c0000000130c0030 0000000000000002 c0000000130c0030 c000000000c71f58
NIP [c00000000053772c] .device_create_file+0xac/0xc0
LR [c000000000537728] .device_create_file+0xa8/0xc0
PACATMSCRATCH [8000000000009032]
Call Trace:
[c0000006fa203a00] [c000000000537728] .device_create_file+0xa8/0xc0 (unreliable)
[c0000006fa203a80] [c00000000089f3e4] .register_cpu_online+0x10c/0x238
[c0000006fa203b30] [c000000000bc9a80] .topology_init+0x1fc/0x200
[c0000006fa203c10] [c00000000000b870] .do_one_initcall+0x60/0x1e0
[c0000006fa203cd0] [c000000000bc3fc0] .kernel_init_freeable+0x22c/0x310
[c0000006fa203da0] [c00000000000c1cc] .kernel_init+0x1c/0x1c0
[c0000006fa203e30] [c00000000000a170] .ret_from_kernel_thread+0x64/0x74
Instruction dump:
0fe00000 4bffffb8 60000000 60000000 60000000 e8040028 2fa00000 409eff98
3c62ffd6 3863dc38 4836f221 60000000 <0fe00000> a13f0008 4bffff7c 60000000
---[ end trace b53dfda141d62ab0 ]---
The problem is that the 'spurr' per-cpu sysfs file sports a write permission
without the corresponding ->store() method. So remove the bogus write
permission to fix the warning.
Reported-by: CAI Qian <caiqian@redhat.com>
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
---
arch/powerpc/kernel/sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 3ce1f86..e68a845 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -180,7 +180,7 @@ SYSFS_PMCSETUP(dscr, SPRN_DSCR);
SYSFS_PMCSETUP(pir, SPRN_PIR);
static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
-static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
+static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
static DEVICE_ATTR(pir, 0400, show_pir, NULL);
^ permalink raw reply related
* [PATCH v2] powerpc: Fix MAX_STACK_TRACE_ENTRIES too low warning again
From: Li Zhong @ 2013-05-07 8:44 UTC (permalink / raw)
To: PowerPC email list; +Cc: Paul Mackerras
In-Reply-To: <1367893978.3083.13.camel@ThinkPad-T5421>
Saw this warning again, and this time from the ret_from_fork path.
It seems we could clear the back chain earlier in copy_thread(), which
could cover both path, and also fix potential lockdep usage in
schedule_tail(), or exception occurred before we clear the back chain.
Signed-off-by: Li Zhong <zhong@linux.vnet.ibm.com>
---
arch/powerpc/kernel/entry_32.S | 2 --
arch/powerpc/kernel/entry_64.S | 2 --
arch/powerpc/kernel/process.c | 1 +
3 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index e514de5..d22e73e 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -439,8 +439,6 @@ ret_from_fork:
ret_from_kernel_thread:
REST_NVGPRS(r1)
bl schedule_tail
- li r3,0
- stw r3,0(r1)
mtlr r14
mr r3,r15
PPC440EP_ERR42
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 3fe5259..48e8a86 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -376,8 +376,6 @@ _GLOBAL(ret_from_fork)
_GLOBAL(ret_from_kernel_thread)
bl .schedule_tail
REST_NVGPRS(r1)
- li r3,0
- std r3,0(r1)
ld r14, 0(r14)
mtlr r14
mr r3,r15
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index ceb4e7b..80af366 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -971,6 +971,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
* do some house keeping and then return from the fork or clone
* system call, using the stack frame created above.
*/
+ ((unsigned long *)sp)[0] = 0;
sp -= sizeof(struct pt_regs);
kregs = (struct pt_regs *) sp;
sp -= STACK_FRAME_OVERHEAD;
^ permalink raw reply related
* Re: [PATCH] powerpc: Fix MAX_STACK_TRACE_ENTRIES too low warning again
From: Li Zhong @ 2013-05-07 8:29 UTC (permalink / raw)
To: PowerPC email list; +Cc: Paul Mackerras
In-Reply-To: <1367893978.3083.13.camel@ThinkPad-T5421>
On Tue, 2013-05-07 at 10:32 +0800, Li Zhong wrote:
> Saw this warning again, and this time from the ret_from_fork path.
>
> It seems we could clear the back chain earlier in copy_thread(), which
> could cover both path, and also fix potential lockdep usage in
> schedule_tail(), or exception occurred before we clear the back chain.
Sorry, I made some mistake, please ignore this patch...
It seems clearing the back chain shouldn't use kregs->gpr[1] below, it
should be ((unsigned long*)sp)[0]. I'll send an updated version.
Thanks, Zhong
>
> Signed-off-by: Li Zhong <zhong@linux.vnet.ibm.com>
> ---
> arch/powerpc/kernel/entry_32.S | 2 --
> arch/powerpc/kernel/entry_64.S | 2 --
> arch/powerpc/kernel/process.c | 1 +
> 3 files changed, 1 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
> index e514de5..d22e73e 100644
> --- a/arch/powerpc/kernel/entry_32.S
> +++ b/arch/powerpc/kernel/entry_32.S
> @@ -439,8 +439,6 @@ ret_from_fork:
> ret_from_kernel_thread:
> REST_NVGPRS(r1)
> bl schedule_tail
> - li r3,0
> - stw r3,0(r1)
> mtlr r14
> mr r3,r15
> PPC440EP_ERR42
> diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
> index 3fe5259..48e8a86 100644
> --- a/arch/powerpc/kernel/entry_64.S
> +++ b/arch/powerpc/kernel/entry_64.S
> @@ -376,8 +376,6 @@ _GLOBAL(ret_from_fork)
> _GLOBAL(ret_from_kernel_thread)
> bl .schedule_tail
> REST_NVGPRS(r1)
> - li r3,0
> - std r3,0(r1)
> ld r14, 0(r14)
> mtlr r14
> mr r3,r15
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index ceb4e7b..2c9fc5e 100644
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -973,6 +973,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
> */
> sp -= sizeof(struct pt_regs);
> kregs = (struct pt_regs *) sp;
> + kregs->gpr[1] = 0;
> sp -= STACK_FRAME_OVERHEAD;
> p->thread.ksp = sp;
> p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
^ permalink raw reply
* Re: [PATCH v8 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC
From: Andrew Murray @ 2013-05-07 8:01 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linux-mips@linux-mips.org, siva.kallam@samsung.com,
linux-pci@vger.kernel.org, linus.walleij@linaro.org,
thierry.reding@avionic-design.de, Liviu Dudau, juhosg@openwrt.org,
paulus@samba.org, linux-samsung-soc@vger.kernel.org,
linux@arm.linux.org.uk, jg1.han@samsung.com,
jgunthorpe@obsidianresearch.com, thomas.abraham@linaro.org,
grant.likely@linaro.org, Rob Herring, arnd@arndb.de,
devicetree-discuss@lists.ozlabs.org, kgene.kim@samsung.com,
bhelgaas@google.com, linux-arm-kernel@lists.infradead.org,
thomas.petazzoni@free-electrons.com, monstr@monstr.eu,
linux-kernel@vger.kernel.org, suren.reddy@samsung.com,
linuxppc-dev
In-Reply-To: <1367721709.11982.37.camel@pasglop>
On Sun, May 05, 2013 at 03:41:49AM +0100, Benjamin Herrenschmidt wrote:
> On Mon, 2013-04-22 at 11:41 +0100, Andrew Murray wrote:
> > The pci_process_bridge_OF_ranges function, used to parse the "ranges"
> > property of a PCI host device, is found in both Microblaze and PowerPC
> > architectures. These implementations are nearly identical. This patch
> > moves this common code to a common place.
>
> What's happening with this ? I'd like to avoid that patch for now
> as I'm doing some changes to pci_process_bridge_OF_ranges
> which are fairly urgent (I might even stick them in the current
> merge window) to deal with memory windows having separate offsets.
There were no objections to this latest revision until now and it is
currently sitting with Jason Cooper (mvebu-next/pcie). [1]
>
> There's also a few hacks in there that are really ppc specific...
>
> I think the right long term approach is to change the way powerpc
> (and microblaze ?) initializes PCI host bridges. Move it away from
> setup_arch() (which is a PITA anyway since it's way too early) to
> an early init call of some sort, and encapsulate the new struct
> pci_host_bridge.
>
> We can then directly configure the host bridge windows rather
> than having this "intermediary" set of resources in our pci_controller
> and in fact move most of the fields from pci_controller to
> pci_host_bridge to the point where the former can remain as a
> simple platform specific wrapper if needed.
This is a view that was also shared by Bjorn [2] when I attempted to
submit a patchset which moves struct pci_controller to asm-generic.
>
> So for new stuff (hint: DT based ARM PCI) or stuff that has to deal with
> a lot less archaic platforms (hint: Microblaze), I'd recommend going
> straight for that approach rather than perpetuating the PowerPC code
> which I'll try to deal with in the next few monthes.
The motativation for my patchsets were to give a way for ARM PCI host
bridge drivers to parse the DT ranges property, but this snow-balled into
unifying pci_process_bridge_OF_ranges.
My v8 patchset provides a of_pci_range_parser which is used directly by a
few ARM PCI DT host bridge drivers, this has been generally accepted and
tested. I don't see why this can't remain and so I'd really like to keep this
around.
Grant, Benjamin would you be happy for me to resubmit this series which provides
the of_pci_range_parser which will be used by the separate implementations of
pci_process_bridge_OF_ranges in PowerPC/Microblaze?
Benjamin are you able to still use of_pci_range_parser in your
'Support per-aperture memory offset' patch?
Thanks,
Andrew Murray
[1] https://lkml.org/lkml/2013/4/22/505
[2] https://patchwork.kernel.org/patch/2487671
>
> Cheers,
> Ben.
>
>
>
^ permalink raw reply
* Re: [PATCH] powerpc: Make hard_irq_disable() do the right thing vs. irq tracing
From: Benjamin Herrenschmidt @ 2013-05-07 7:25 UTC (permalink / raw)
To: tiejun.chen; +Cc: Scott Wood, Mihai Caraman, linuxppc-dev, kvm-ppc
In-Reply-To: <5188AA2D.1040802@windriver.com>
On Tue, 2013-05-07 at 15:15 +0800, tiejun.chen wrote:
> Could we simplify this as follows:
>
> +#define hard_irq_disable() do { \
> + __hard_irq_disable(); \
> + if (get_paca()->soft_enabled) { \
> + trace_hardirqs_off(); \
> + get_paca()->soft_enabled = 0; \
> + } \
> + get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \
> +} while(0)
I'd rather not. When lockdep is not enabled trace_hardirqs_off() is a
nop and thus we have no conditional at all which is arguably better...
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Make hard_irq_disable() do the right thing vs. irq tracing
From: tiejun.chen @ 2013-05-07 7:15 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Scott Wood, Mihai Caraman, linuxppc-dev, kvm-ppc
In-Reply-To: <1367910242.5769.11.camel@pasglop>
On 05/07/2013 03:04 PM, Benjamin Herrenschmidt wrote:
> If hard_irq_disable() is called while interrupts are already soft-disabled
> (which is the most common case) all is already well.
>
> However you can (and in some cases want) to call it while everything is
> enabled (to make sure you don't get a lazy even, for example before entry
> into KVM guests) and in this case we need to inform the irq tracer that
> the irqs are going off.
>
> We have to change the inline into a macro to avoid an include circular
> dependency hell hole.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
>
> Tested on pseries, Scott, I don't expect a problem with that patch especially
> since most callers already are soft disabled, so I'll merge it now along with
> my other pending stuff and you can simplify your KVM one.
>
> diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
> index e45c494..d615b28 100644
> --- a/arch/powerpc/include/asm/hw_irq.h
> +++ b/arch/powerpc/include/asm/hw_irq.h
> @@ -95,15 +95,13 @@ static inline bool arch_irqs_disabled(void)
> #define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
> #endif
>
> -static inline void hard_irq_disable(void)
> -{
> - __hard_irq_disable();
> - get_paca()->soft_enabled = 0;
> - get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
> -}
> -
> -/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
> -#define hard_irq_disable hard_irq_disable
> +#define hard_irq_disable() do { \
> + __hard_irq_disable(); \
> + if (local_paca->soft_enabled) \
> + trace_hardirqs_off(); \
> + get_paca()->soft_enabled = 0; \
Could we simplify this as follows:
+#define hard_irq_disable() do { \
+ __hard_irq_disable(); \
+ if (get_paca()->soft_enabled) { \
+ trace_hardirqs_off(); \
+ get_paca()->soft_enabled = 0; \
+ } \
+ get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \
+} while(0)
Tiejun
> + get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \
> +} while(0)
>
> static inline bool lazy_irq_pending(void)
> {
>
>
^ permalink raw reply
* [PATCH] powerpc: Make hard_irq_disable() do the right thing vs. irq tracing
From: Benjamin Herrenschmidt @ 2013-05-07 7:04 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Mihai Caraman, kvm-ppc, Tiejun Chen
If hard_irq_disable() is called while interrupts are already soft-disabled
(which is the most common case) all is already well.
However you can (and in some cases want) to call it while everything is
enabled (to make sure you don't get a lazy even, for example before entry
into KVM guests) and in this case we need to inform the irq tracer that
the irqs are going off.
We have to change the inline into a macro to avoid an include circular
dependency hell hole.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Tested on pseries, Scott, I don't expect a problem with that patch especially
since most callers already are soft disabled, so I'll merge it now along with
my other pending stuff and you can simplify your KVM one.
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index e45c494..d615b28 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -95,15 +95,13 @@ static inline bool arch_irqs_disabled(void)
#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
#endif
-static inline void hard_irq_disable(void)
-{
- __hard_irq_disable();
- get_paca()->soft_enabled = 0;
- get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
-}
-
-/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
-#define hard_irq_disable hard_irq_disable
+#define hard_irq_disable() do { \
+ __hard_irq_disable(); \
+ if (local_paca->soft_enabled) \
+ trace_hardirqs_off(); \
+ get_paca()->soft_enabled = 0; \
+ get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \
+} while(0)
static inline bool lazy_irq_pending(void)
{
^ permalink raw reply related
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