* [PATCH v2] powerpc/mpc85xx: Update the clock device tree nodes
From: Yuantian.Tang @ 2013-05-31 7:30 UTC (permalink / raw)
To: galak; +Cc: Tang Yuantian, devicetree-discuss, linuxppc-dev
From: Tang Yuantian <yuantian.tang@freescale.com>
The following SoCs will be affected: p2041, p3041, p4080,
p5020, p5040, b4420, b4860, t4240
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
v2:
- add t4240, b4420, b4860 support
- remove pll/4 clock from p2041, p3041 and p5020 board
arch/powerpc/boot/dts/fsl/b4420si-post.dtsi | 32 ++++++++-
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi | 2 +
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi | 32 ++++++++-
arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 4 ++
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 54 ++++++++++++++-
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 4 ++
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 54 ++++++++++++++-
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi | 4 ++
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 100 +++++++++++++++++++++++++++-
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 8 +++
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 38 ++++++++++-
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 2 +
arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 54 ++++++++++++++-
arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi | 4 ++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 77 ++++++++++++++++++++-
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | 12 ++++
16 files changed, 473 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index 5a6615d..b69d6e5 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -85,7 +85,37 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
+ compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0",
+ "fixed-clock";
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>;
+ clock-names = "pll0_0", "pll0_1", "pll0_2",
+ "pll1_0", "pll1_1", "pll1_2";
+ clock-output-names = "cmux0";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 7b4426e..a11126b 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -62,11 +62,13 @@
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index e5cf6c8..507a22d 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -129,7 +129,37 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
+ compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0",
+ "fixed-clock";
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>;
+ clock-names = "pll0_0", "pll0_1", "pll0_2",
+ "pll1_0", "pll1_1", "pll1_2";
+ clock-output-names = "cmux0";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 5263fa4..185a231 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -62,21 +62,25 @@
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index dc6cc5a..cdf1615 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -305,9 +305,61 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
+ compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0",
+ "fixed-clock";
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux1";
+ };
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux2";
+ };
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux3";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 7a2697d..22f3b14 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
cpu2: PowerPC,e500mc@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
cpu3: PowerPC,e500mc@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 3fa1e22..982cfae 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -332,9 +332,61 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
+ compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0",
+ "fixed-clock";
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux1";
+ };
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux2";
+ };
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux3";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index c9ca2c3..468e8be 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -82,6 +82,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -90,6 +91,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -98,6 +100,7 @@
cpu2: PowerPC,e500mc@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -106,6 +109,7 @@
cpu3: PowerPC,e500mc@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 34769a7..cf2fc54 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -352,9 +352,107 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
+ compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0",
+ "fixed-clock";
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+ pll2: pll2@840 {
+ #clock-cells = <1>;
+ reg = <0x840>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll2", "pll2-div2";
+ };
+ pll3: pll2@860 {
+ #clock-cells = <1>;
+ reg = <0x860>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll3", "pll3-div2";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux1";
+ };
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux2";
+ };
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux3";
+ };
+ mux4: mux4@80 {
+ #clock-cells = <0>;
+ reg = <0x80>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2_0", "pll2_1", "pll3_0", "pll3_1";
+ clock-output-names = "cmux4";
+ };
+ mux5: mux5@a0 {
+ #clock-cells = <0>;
+ reg = <0xa0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2_0", "pll2_1", "pll3_0", "pll3_1";
+ clock-output-names = "cmux5";
+ };
+ mux6: mux6@c0 {
+ #clock-cells = <0>;
+ reg = <0xc0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2_0", "pll2_1", "pll3_0", "pll3_1";
+ clock-output-names = "cmux6";
+ };
+ mux7: mux7@e0 {
+ #clock-cells = <0>;
+ reg = <0xe0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2_0", "pll2_1", "pll3_0", "pll3_1";
+ clock-output-names = "cmux7";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index 493d9a0..0040b5a 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
cpu2: PowerPC,e500mc@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
cpu3: PowerPC,e500mc@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
@@ -113,6 +117,7 @@
cpu4: PowerPC,e500mc@4 {
device_type = "cpu";
reg = <4>;
+ clocks = <&mux4>;
next-level-cache = <&L2_4>;
L2_4: l2-cache {
next-level-cache = <&cpc>;
@@ -121,6 +126,7 @@
cpu5: PowerPC,e500mc@5 {
device_type = "cpu";
reg = <5>;
+ clocks = <&mux5>;
next-level-cache = <&L2_5>;
L2_5: l2-cache {
next-level-cache = <&cpc>;
@@ -129,6 +135,7 @@
cpu6: PowerPC,e500mc@6 {
device_type = "cpu";
reg = <6>;
+ clocks = <&mux6>;
next-level-cache = <&L2_6>;
L2_6: l2-cache {
next-level-cache = <&cpc>;
@@ -137,6 +144,7 @@
cpu7: PowerPC,e500mc@7 {
device_type = "cpu";
reg = <7>;
+ clocks = <&mux7>;
next-level-cache = <&L2_7>;
L2_7: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index bc3ae5a..bb98848 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -337,9 +337,45 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+ compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0",
+ "fixed-clock";
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux1";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index 8df47fc..fe1a2e6 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -88,6 +88,7 @@
cpu0: PowerPC,e5500@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -96,6 +97,7 @@
cpu1: PowerPC,e5500@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index a91897f..a22a889 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -297,9 +297,61 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
+ compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0",
+ "fixed-clock";
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux1";
+ };
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux2";
+ };
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0_0", "pll0_1", "pll1_0", "pll1_1";
+ clock-output-names = "cmux3";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index 40ca943..3674686 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e5500@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e5500@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
cpu2: PowerPC,e5500@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
cpu3: PowerPC,e5500@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..fadff2c 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -368,8 +368,83 @@
};
clockgen: global-utilities@e1000 {
- compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
+ compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0",
+ "fixed-clock";
reg = <0xe1000 0x1000>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+ };
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+ };
+ pll2: pll2@840 {
+ #clock-cells = <1>;
+ reg = <0x840>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll2", "pll2-div2", "pll2-div4";
+ };
+ pll3: pll3@860 {
+ #clock-cells = <1>;
+ reg = <0x860>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll3", "pll3-div2", "pll3-div4";
+ };
+ pll4: pll4@880 {
+ #clock-cells = <1>;
+ reg = <0x880>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll4", "pll4-div2", "pll4-div4";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>,
+ <&pll2 0>, <&pll2 1>, <&pll2 2>;
+ clock-names = "pll0_0", "pll0_1", "pll0_2",
+ "pll1_0", "pll1_1", "pll1_2",
+ "pll2_0", "pll2_1", "pll2_2";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>,
+ <&pll2 0>, <&pll2 1>, <&pll2 2>;
+ clock-names = "pll0_0", "pll0_1", "pll0_2",
+ "pll1_0", "pll1_1", "pll1_2",
+ "pll2_0", "pll2_1", "pll2_2";
+ clock-output-names = "cmux1";
+ };
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
+ <&pll4 0>, <&pll4 1>, <&pll4 2>;
+ clock-names = "pll3_0", "pll3_1", "pll3_2",
+ "pll4_0", "pll4_1", "pll4_2";
+ clock-output-names = "cmux2";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index a93c55a..0b8ccc5 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -67,61 +67,73 @@
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu4: PowerPC,e6500@8 {
device_type = "cpu";
reg = <8 9>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu5: PowerPC,e6500@10 {
device_type = "cpu";
reg = <10 11>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu6: PowerPC,e6500@12 {
device_type = "cpu";
reg = <12 13>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu7: PowerPC,e6500@14 {
device_type = "cpu";
reg = <14 15>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu8: PowerPC,e6500@16 {
device_type = "cpu";
reg = <16 17>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
cpu9: PowerPC,e6500@18 {
device_type = "cpu";
reg = <18 19>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
cpu10: PowerPC,e6500@20 {
device_type = "cpu";
reg = <20 21>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
cpu11: PowerPC,e6500@22 {
device_type = "cpu";
reg = <22 23>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
};
--
1.8.0
^ permalink raw reply related
* Re: [PATCH] powerpc/mpc85xx: match with the pci bus address used by u-boot for all p1_p2_rdb_pc boards
From: Kevin Hao @ 2013-05-31 7:53 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc
In-Reply-To: <1369940262.14679.15@snotra>
[-- Attachment #1: Type: text/plain, Size: 3790 bytes --]
On Thu, May 30, 2013 at 01:57:42PM -0500, Scott Wood wrote:
> On 05/29/2013 10:25:25 PM, Kevin Hao wrote:
> >On Tue, May 28, 2013 at 05:45:56PM -0500, Scott Wood wrote:
> >> On 05/16/2013 01:29:45 AM, Kevin Hao wrote:
> >> >All these boards use the same configuration file p1_p2_rdb_pc.h in
> >> >u-boot. So they have the same pci bus address set by the u-boot.
> >> >But in some of these boards the bus address set in dtb don't match
> >> >the one used by u-boot. And this will trigger a kernel bug in 32bit
> >> >kernel and cause the pci device malfunction. For example, on a
> >> >p2020rdb-pc board the u-boot use the 0xa0000000 as both bus address
> >> >and cpu address for one pci controller and then assign bus address
> >> >such as 0xa00004000 to some pci device. But in the kernel, the dtb
> >> >set the bus address to 0xe0000000 and the cpu address to
> >0xa0000000.
> >> >The kernel assumes mistakenly the assigned bus address 0xa0004000
> >> >in pci device is correct and keep it unchanged. This will
> >definitely
> >> >cause the pci device malfunction. I have made two patches to fix
> >> >this in the pci subsystem.
> >> >http://patchwork.ozlabs.org/patch/243702/
> >> >http://patchwork.ozlabs.org/patch/243703/
> >> >
> >> >But I still think it makes sense to set these bus address to match
> >> >with the u-boot. This issue can't be reproduced on 36bit kernel.
> >> >But I also tweak the 36bit dtb for the above reason.
> >>
> >> IIRC the reason for using 0xe0000000 on all PCIe roots is to
> >> maximize the memory that is DMA-addressable without involving
> >> swiotlb.
> >
> >OK, this sounds reasonable. I can drop the changes for the 36bit
> >dts. But for
> >the 32bit dts, it does cause the kernel hang on my p2020rdb-pca
> >board when the
> >SiI3132 driver probe the on-board pcie to sata controller. I think
> >this issue
> >should apply to all these boards if it has a pci device plugged.
> >So we should
> >fix them ASAP.
>
> Is this what your 3.11 patch fixes,
Yes, the patch in the pci next tree fix this issue in a more general
level.
> or does it hang even with that?
No.
>
> >> Maybe U-Boot should be fixed?
> >
> >Maybe. I have created patch for kernel to detect this kind of
> >mismatch between
> >kernel and bootloader and then try to reassign the bus address
> >automatically.
> >https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=next&id=cf4d1cf5ac5e7d2b886af6ed906ea0dcdc5b6855
> >
> >So with this patch the kernel should just work even without this
> >patch and
> >the fix for u-boot. But this patch is just queued for 3.11. So I
> >wish we can
> >tweak the 32bit dts to accommodate to the u-boot now so that we
> >can make sure
> >that these boards are at least bootable for 3.10 or previous
> >kernel. Then we
> >can revert this patch for more DMA address space once the pci
> >patch are
> >merged into mainline.
>
> Is this a regression, or has it been broken for a while?
It seems that the p2020rdb-pc_32b.dts was not bootable since it
was first introduced into the mainline kernel. The reason is that
the following patch change the method of doing the translation of the
bus->resource and resource->bus and then disclose this mismatch
between bootloader and kernel.
commit 6c5705fec63d83eeb165fe61e34adc92ecc2ce75
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu Feb 23 20:19:03 2012 -0700
powerpc/PCI: get rid of device resource fixups
Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Thanks,
Kevin
>
> -Scott
[-- Attachment #2: Type: application/pgp-signature, Size: 490 bytes --]
^ permalink raw reply
* Re: [PATCH v5 00/13] net: mv643xx_eth DT support and fixes
From: David Miller @ 2013-05-31 9:32 UTC (permalink / raw)
To: sebastian.hesselbarth
Cc: andrew, jason, netdev, linux-kernel, buytenh, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <51A8432A.4000602@gmail.com>
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Date: Fri, 31 May 2013 08:28:58 +0200
> thanks for pulling these in. I finally found how to check if a patch
> already went into -stable. As Jason already said, the mdio patch that
> #1 fixes did not yet went into -stable. Can you unqueue it? Sorry for
> the confusion.
I'll unqueue it, thanks.
^ permalink raw reply
* Re: can't access PCIe card under sbc8548
From: Benjamin Herrenschmidt @ 2013-05-31 10:00 UTC (permalink / raw)
To: Scott Wood; +Cc: wolfking, linuxppc-dev
In-Reply-To: <1369931094.14679.6@snotra>
On Thu, 2013-05-30 at 11:24 -0500, Scott Wood wrote:
> ioremap() and out_bex/in_bex are not appropriate for PCI I/O regions
> (and presumably that's what it is, if pci_iomap is calling
> ioport_map). Big-endian is not appropriate for PCI in any case.
>
> The whole point of pci_iomap() appears to be that the driver doesn't
> need to care whether it's MMIO or PIO, and can use ioread/writeX on the
> resulting cookie. If PPC is messing this up it's not the driver's
> fault.
We are not messing this up and it should work.
Cheers,
Ben.
^ permalink raw reply
* Re: can't access PCIe card under sbc8548
From: Benjamin Herrenschmidt @ 2013-05-31 10:01 UTC (permalink / raw)
To: wolfking; +Cc: linuxppc-dev
In-Reply-To: <1369960818166-71847.post@n7.nabble.com>
On Thu, 2013-05-30 at 17:40 -0700, wolfking wrote:
> hi, scott:
> Thanks for replying!
> > In what specific way does it not work?
> when I use iowrite8 to write, things seem OK, the codes continue running,
> when I use ioread8 to read, the console I use freezes. The console stops
> responding.
> > Why can't it succeed? Is there nothing mapped at 0xfc7fc000?
> My PCIe card's local bus register is at BAR0+0xC7, so the driver should
> access 0xfc7fc027 and the following 7 bytes. But When I access the areas:
> ioread8 just freezes.
That looks more like a HW error to me unless you are hitting completely
the wrong system addresses.
What would be useful would be to add printk's to check what exact
physical address pci_iomap ends up using and whether that matches
to the iobase_phys of the PCI bridge + the BAR value of the card.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 1/3] powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds board
From: Benjamin Herrenschmidt @ 2013-05-31 10:11 UTC (permalink / raw)
To: Kevin Hao; +Cc: Scott Wood, linuxppc
In-Reply-To: <20130531064102.GB16514@pek-khao-d1.corp.ad.wrs.com>
On Fri, 2013-05-31 at 14:41 +0800, Kevin Hao wrote:
> Hi Ben,
>
> Could you shed some light on this issue? Do we really has the restriction
> that we have to pick one bus controller as primary even there is no
> ISA bus on the board? I did check the current code and found no code
> has a requirement for this. I also searched the archives and but found
> nothing useful. :-(
You can just pick the first one as primary... The reason we somewhat need
a primary is related to how we handle IO space.
We ioremap the IO space of all busses and assign the base of the primary
one to a global "_IO_BASE". Then any "port" access is an offset from that
which means that non-primary can end up having negative offsets. We fix
up all resources, which works fine ... unless drivers do stupid casts
and the wrap-around fails.
The main reason we did that originally is because we still had a slew of
x86 originated HW that would access hard wired IO ports, especially on things
like CHRP machines, looking for things like 8259 PIC, legacy kbd controllers,
UARTs, etc... at fixed IO port numbers.
We still support some of these boxes (though I do wonder how long since
somebody last booted a Pegasos) so I'm not quite yet keen on getting rid
of that stuff...
Cheers,
Ben.
^ permalink raw reply
* [PATCH] powerpc/fsl-booke: Rename b4qds.dts -> b4qds.dtsi.
From: Ian Campbell @ 2013-05-31 10:14 UTC (permalink / raw)
To: linux-kernel
Cc: Poonam Aggrwal, Ian Campbell, Shaveta Leekha, Minghuan Lian,
Andy Fleming, Ramneek Mehresh, Paul Mackerras, linuxppc-dev
This file is a common include for B4860 and B4420 but is not a valid DTS itself:
DTC arch/powerpc/boot/b4qds.dtb
Error: arch/powerpc/boot/dts/b4qds.dts:35.1-2 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/powerpc/boot/b4qds.dtb] Error 1
make: *** [b4qds.dtb] Error 2
I spotted in build tests of device-tree.git, announcement
https://lkml.org/lkml/2013/4/24/209, which builds *.dts. Probably no one would
do this this in real life on linux.git but it still seems worth fixing.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Cc: Shaveta Leekha <shaveta@freescale.com>
Cc: Minghuan Lian <Minghuan.Lian@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
---
arch/powerpc/boot/dts/b4420qds.dts | 2 +-
arch/powerpc/boot/dts/b4860qds.dts | 2 +-
arch/powerpc/boot/dts/b4qds.dts | 169 ------------------------------------
arch/powerpc/boot/dts/b4qds.dtsi | 169 ++++++++++++++++++++++++++++++++++++
4 files changed, 171 insertions(+), 171 deletions(-)
delete mode 100644 arch/powerpc/boot/dts/b4qds.dts
create mode 100644 arch/powerpc/boot/dts/b4qds.dtsi
diff --git a/arch/powerpc/boot/dts/b4420qds.dts b/arch/powerpc/boot/dts/b4420qds.dts
index 923156d..508dbdf 100644
--- a/arch/powerpc/boot/dts/b4420qds.dts
+++ b/arch/powerpc/boot/dts/b4420qds.dts
@@ -33,7 +33,7 @@
*/
/include/ "fsl/b4420si-pre.dtsi"
-/include/ "b4qds.dts"
+/include/ "b4qds.dtsi"
/ {
model = "fsl,B4420QDS";
diff --git a/arch/powerpc/boot/dts/b4860qds.dts b/arch/powerpc/boot/dts/b4860qds.dts
index 78907f3..6bb3707 100644
--- a/arch/powerpc/boot/dts/b4860qds.dts
+++ b/arch/powerpc/boot/dts/b4860qds.dts
@@ -33,7 +33,7 @@
*/
/include/ "fsl/b4860si-pre.dtsi"
-/include/ "b4qds.dts"
+/include/ "b4qds.dtsi"
/ {
model = "fsl,B4860QDS";
diff --git a/arch/powerpc/boot/dts/b4qds.dts b/arch/powerpc/boot/dts/b4qds.dts
deleted file mode 100644
index e6d2f8f..0000000
--- a/arch/powerpc/boot/dts/b4qds.dts
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * B4420DS Device Tree Source
- *
- * Copyright 2012 Freescale Semiconductor, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * This software is provided by Freescale Semiconductor "as is" and any
- * express or implied warranties, including, but not limited to, the implied
- * warranties of merchantability and fitness for a particular purpose are
- * disclaimed. In no event shall Freescale Semiconductor be liable for any
- * direct, indirect, incidental, special, exemplary, or consequential damages
- * (including, but not limited to, procurement of substitute goods or services;
- * loss of use, data, or profits; or business interruption) however caused and
- * on any theory of liability, whether in contract, strict liability, or tort
- * (including negligence or otherwise) arising in any way out of the use of
- * this software, even if advised of the possibility of such damage.
- */
-
-/ {
- model = "fsl,B4QDS";
- compatible = "fsl,B4QDS";
- #address-cells = <2>;
- #size-cells = <2>;
- interrupt-parent = <&mpic>;
-
- ifc: localbus@ffe124000 {
- reg = <0xf 0xfe124000 0 0x2000>;
- ranges = <0 0 0xf 0xe8000000 0x08000000
- 2 0 0xf 0xff800000 0x00010000
- 3 0 0xf 0xffdf0000 0x00008000>;
-
- nor@0,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "cfi-flash";
- reg = <0x0 0x0 0x8000000>;
- bank-width = <2>;
- device-width = <1>;
- };
-
- nand@2,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,ifc-nand";
- reg = <0x2 0x0 0x10000>;
-
- partition@0 {
- /* This location must not be altered */
- /* 1MB for u-boot Bootloader Image */
- reg = <0x0 0x00100000>;
- label = "NAND U-Boot Image";
- read-only;
- };
-
- partition@100000 {
- /* 1MB for DTB Image */
- reg = <0x00100000 0x00100000>;
- label = "NAND DTB Image";
- };
-
- partition@200000 {
- /* 10MB for Linux Kernel Image */
- reg = <0x00200000 0x00A00000>;
- label = "NAND Linux Kernel Image";
- };
-
- partition@c00000 {
- /* 500MB for Root file System Image */
- reg = <0x00c00000 0x1F400000>;
- label = "NAND RFS Image";
- };
- };
-
- board-control@3,0 {
- compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
- reg = <3 0 0x300>;
- };
- };
-
- memory {
- device_type = "memory";
- };
-
- dcsr: dcsr@f00000000 {
- ranges = <0x00000000 0xf 0x00000000 0x01052000>;
- };
-
- soc: soc@ffe000000 {
- ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
- reg = <0xf 0xfe000000 0 0x00001000>;
- spi@110000 {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "sst,sst25wf040";
- reg = <0>;
- spi-max-frequency = <40000000>; /* input clock */
- };
- };
-
- sdhc@114000 {
- /*Disabled as there is no sdhc connector on B4420QDS board*/
- status = "disabled";
- };
-
- i2c@118000 {
- eeprom@50 {
- compatible = "at24,24c64";
- reg = <0x50>;
- };
- eeprom@51 {
- compatible = "at24,24c256";
- reg = <0x51>;
- };
- eeprom@53 {
- compatible = "at24,24c256";
- reg = <0x53>;
- };
- eeprom@57 {
- compatible = "at24,24c256";
- reg = <0x57>;
- };
- rtc@68 {
- compatible = "dallas,ds3232";
- reg = <0x68>;
- };
- };
-
- usb@210000 {
- dr_mode = "host";
- phy_type = "ulpi";
- };
-
- };
-
- pci0: pcie@ffe200000 {
- reg = <0xf 0xfe200000 0 0x10000>;
- ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
- 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-
-};
-
-/include/ "fsl/b4si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
new file mode 100644
index 0000000..e6d2f8f
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -0,0 +1,169 @@
+/*
+ * B4420DS Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of
+ * this software, even if advised of the possibility of such damage.
+ */
+
+/ {
+ model = "fsl,B4QDS";
+ compatible = "fsl,B4QDS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ ifc: localbus@ffe124000 {
+ reg = <0xf 0xfe124000 0 0x2000>;
+ ranges = <0 0 0xf 0xe8000000 0x08000000
+ 2 0 0xf 0xff800000 0x00010000
+ 3 0 0xf 0xffdf0000 0x00008000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x2 0x0 0x10000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 10MB for Linux Kernel Image */
+ reg = <0x00200000 0x00A00000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@c00000 {
+ /* 500MB for Root file System Image */
+ reg = <0x00c00000 0x1F400000>;
+ label = "NAND RFS Image";
+ };
+ };
+
+ board-control@3,0 {
+ compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
+ reg = <3 0 0x300>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ dcsr: dcsr@f00000000 {
+ ranges = <0x00000000 0xf 0x00000000 0x01052000>;
+ };
+
+ soc: soc@ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ spi@110000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,sst25wf040";
+ reg = <0>;
+ spi-max-frequency = <40000000>; /* input clock */
+ };
+ };
+
+ sdhc@114000 {
+ /*Disabled as there is no sdhc connector on B4420QDS board*/
+ status = "disabled";
+ };
+
+ i2c@118000 {
+ eeprom@50 {
+ compatible = "at24,24c64";
+ reg = <0x50>;
+ };
+ eeprom@51 {
+ compatible = "at24,24c256";
+ reg = <0x51>;
+ };
+ eeprom@53 {
+ compatible = "at24,24c256";
+ reg = <0x53>;
+ };
+ eeprom@57 {
+ compatible = "at24,24c256";
+ reg = <0x57>;
+ };
+ rtc@68 {
+ compatible = "dallas,ds3232";
+ reg = <0x68>;
+ };
+ };
+
+ usb@210000 {
+ dr_mode = "host";
+ phy_type = "ulpi";
+ };
+
+ };
+
+ pci0: pcie@ffe200000 {
+ reg = <0xf 0xfe200000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+};
+
+/include/ "fsl/b4si-post.dtsi"
--
1.7.10.4
^ permalink raw reply related
* DTB build failure due to preproccessing
From: Ian Campbell @ 2013-05-31 10:29 UTC (permalink / raw)
To: linux-kernel
Cc: Michal Marek, JonLoeliger, Stephen Warren, linux-kbuild,
Rob Herring, linuxppc-dev
This affects arch/powerpc/boot/dts/virtex440-ml510.dts but I think it is
actually a more general issue:
$ make ARCH=powerpc CROSS_COMPILE=powerpc-linux- virtex440-ml510.dtb
CC scripts/mod/devicetable-offsets.s
GEN scripts/mod/devicetable-offsets.h
HOSTCC scripts/mod/file2alias.o
HOSTLD scripts/mod/modpost
DTC arch/powerpc/boot/virtex440-ml510.dtb
Error: arch/powerpc/boot/dts/virtex440-ml510.dts:374.6-7 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [arch/powerpc/boot/virtex440-ml510.dtb] Error 1
make: *** [virtex440-ml510.dtb] Error 2
Line 374 is the "IDSEL 0x16..." line here:
interrupt-map = <
/* IRQ mapping for pci slots and ALI M1533
...
* management core also isn't used.
*/
/* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
0x3000 0 0 1 &xps_intc_0 3 2
0x3000 0 0 2 &xps_intc_0 2 2
0x3000 0 0 3 &xps_intc_0 5 2
0x3000 0 0 4 &xps_intc_0 4 2
Which gets preprocessed into:
interrupt-map = <
# 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
0x3000 0 0 1 &xps_intc_0 3 2
0x3000 0 0 2 &xps_intc_0 2 2
0x3000 0 0 3 &xps_intc_0 5 2
0x3000 0 0 4 &xps_intc_0 4 2
If I manually remove the "# 375 " line then that fixes the error
(although there is then a subsequent one of the same type).
I suppose this is a bug in dtc? It appears to have at least some
awareness of these preprocessor line number comments since it manages to
report the original source line number.
Ian.
^ permalink raw reply
* Re: [PATCH 17/18] cpufreq: powerpc: move cpufreq driver to drivers/cpufreq
From: Viresh Kumar @ 2013-05-31 10:50 UTC (permalink / raw)
To: Benjamin Herrenschmidt, deepthi
Cc: robin.randhawa, linux-pm, patches, Liviu.Dudau, linux-kernel,
cpufreq, rjw, Steve.Bannister, Paul Mackerras, Olof Johansson,
arvind.chauhan, linuxppc-dev, linaro-kernel, charles.garcia-tobin
In-Reply-To: <CAKohpo=DoWB+E-bgWCUVec5Y8wsfEu0V43Pg5mHzqep8yn0_JA@mail.gmail.com>
On 20 May 2013 10:10, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> On 13 May 2013 11:34, Viresh Kumar <viresh.kumar@linaro.org> wrote:
>> On 22 April 2013 12:19, Viresh Kumar <viresh.kumar@linaro.org> wrote:
>>> On 9 April 2013 14:05, Viresh Kumar <viresh.kumar@linaro.org> wrote:
>>>> On 5 April 2013 12:16, Viresh Kumar <viresh.kumar@linaro.org> wrote:
>>>>> On 4 April 2013 18:24, Viresh Kumar <viresh.kumar@linaro.org> wrote:
>>>>>> This patch moves cpufreq driver of powerpc platform to drivers/cpufreq.
>>>>>>
>>>>>> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>>>>>> Cc: Paul Mackerras <paulus@samba.org>
>>>>>> Cc: Olof Johansson <olof@lixom.net>
>>>>>> Cc: linuxppc-dev@lists.ozlabs.org
>>>>>> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
>>>>>> ---
>>>>>> Compile Tested only.
>>>>>>
>>>>>> arch/powerpc/platforms/Kconfig | 31 ----------------------
>>>>>> arch/powerpc/platforms/pasemi/Makefile | 1 -
>>>>>> arch/powerpc/platforms/powermac/Makefile | 2 --
>>>>>> drivers/cpufreq/Kconfig.powerpc | 26 ++++++++++++++++++
>>>>>> drivers/cpufreq/Makefile | 3 +++
>>>>>> .../cpufreq.c => drivers/cpufreq/pasemi-cpufreq.c | 0
>>>>>> .../cpufreq/pmac32-cpufreq.c | 0
>>>>>> .../cpufreq/pmac64-cpufreq.c | 0
>>>>>> 8 files changed, 29 insertions(+), 34 deletions(-)
>>>>>> rename arch/powerpc/platforms/pasemi/cpufreq.c => drivers/cpufreq/pasemi-cpufreq.c (100%)
>>>>>> rename arch/powerpc/platforms/powermac/cpufreq_32.c => drivers/cpufreq/pmac32-cpufreq.c (100%)
>>>>>> rename arch/powerpc/platforms/powermac/cpufreq_64.c => drivers/cpufreq/pmac64-cpufreq.c (100%)
>>>>>
>>>>> Hi Deepthi,
>>>>>
>>>>> Can you help testing this please?
>>>>
>>>> Ping!!
>>>
>>> Ping!!
>>
>> Hi Benjamin,
>>
>> Hope you are back from your vacations. Can you give it a try now?
>
> Ping!!
Ping!!
^ permalink raw reply
* [PATCH] powerpc/mm: Always invalidate tlb on hpte invalidate and update
From: Aneesh Kumar K.V @ 2013-05-31 11:03 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Aneesh Kumar K.V
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
If a hash bucket gets full, we "evict" a more/less random entry from it.
When we do that we don't invalidate the TLB (hpte_remove) because we assume
the old translation is still technically "valid". This implies that when
we are invalidating or updating pte, even if HPTE entry is not valid
we should do a tlb invalidate.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/mm/hash_native_64.c | 30 ++++++++++++++++++++++--------
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 6a2aead..4c122c3 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -336,11 +336,18 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
hpte_v = hptep->v;
actual_psize = hpte_actual_psize(hptep, psize);
+ /*
+ * We need to invalidate the TLB always because hpte_remove doesn't do
+ * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less
+ * random entry from it. When we do that we don't invalidate the TLB
+ * (hpte_remove) because we assume the old translation is still
+ * technically "valid".
+ */
if (actual_psize < 0) {
- native_unlock_hpte(hptep);
- return -1;
+ actual_psize = psize;
+ ret = -1;
+ goto err_out;
}
- /* Even if we miss, we need to invalidate the TLB */
if (!HPTE_V_COMPARE(hpte_v, want_v)) {
DBG_LOW(" -> miss\n");
ret = -1;
@@ -350,6 +357,7 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
hptep->r = (hptep->r & ~(HPTE_R_PP | HPTE_R_N)) |
(newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_C));
}
+err_out:
native_unlock_hpte(hptep);
/* Ensure it is out of the tlb too. */
@@ -409,7 +417,7 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea,
hptep = htab_address + slot;
actual_psize = hpte_actual_psize(hptep, psize);
if (actual_psize < 0)
- return;
+ actual_psize = psize;
/* Update the HPTE */
hptep->r = (hptep->r & ~(HPTE_R_PP | HPTE_R_N)) |
@@ -437,21 +445,27 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long vpn,
hpte_v = hptep->v;
actual_psize = hpte_actual_psize(hptep, psize);
+ /*
+ * We need to invalidate the TLB always because hpte_remove doesn't do
+ * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less
+ * random entry from it. When we do that we don't invalidate the TLB
+ * (hpte_remove) because we assume the old translation is still
+ * technically "valid".
+ */
if (actual_psize < 0) {
+ actual_psize = psize;
native_unlock_hpte(hptep);
- local_irq_restore(flags);
- return;
+ goto err_out;
}
- /* Even if we miss, we need to invalidate the TLB */
if (!HPTE_V_COMPARE(hpte_v, want_v))
native_unlock_hpte(hptep);
else
/* Invalidate the hpte. NOTE: this also unlocks it */
hptep->v = 0;
+err_out:
/* Invalidate the TLB */
tlbie(vpn, psize, actual_psize, ssize, local);
-
local_irq_restore(flags);
}
--
1.8.1.2
^ permalink raw reply related
* Re: [GIT PULL 00/66] perf/core improvements and fixes
From: Ingo Molnar @ 2013-05-31 11:04 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Peter Zijlstra, Stephane Eranian, linuxppc-dev, Andi Kleen,
Paul Mackerras, Sam Ravnborg, Rabin Vincent, Jiri Olsa,
Xiao Guangrong, Arnaldo Carvalho de Melo, Frederic Weisbecker,
Ingo Molnar, Sukadev Bhattiprolu, Corey Ashford, Namhyung Kim,
Borislav Petkov, Runzhen Wang, William Cohen,
Arnaldo Carvalho de Melo, Mike Galbraith, linux-kernel,
Pekka Enberg, Minchan Kim, David Ahern
In-Reply-To: <1369929699-8724-1-git-send-email-acme@infradead.org>
* Arnaldo Carvalho de Melo <acme@infradead.org> wrote:
> From: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
>
> Hi Ingo,
>
> Please consider pulling,
>
> - Arnaldo
>
> The following changes since commit c0ffaf3655fab1909a920c8f30ba1722932d01bb:
>
> watchdog: Remove softlockup_thresh from Documentation (2013-05-28 11:28:20 +0200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux tags/perf-core-for-mingo
>
> for you to fetch changes up to c3c44709b5095091216c06b8df83feddc01ba6b0:
>
> perf tools: Add missing liblk.a dependency for python/perf.so (2013-05-30 17:36:16 +0300)
>
> ----------------------------------------------------------------
> perf/core improvements and fixes:
>
> . Reset SIGTERM handler in workload child process, fix from David Ahern.
>
> . Handle death by SIGTERM in 'perf record', fix from David Ahern.
>
> . Fix printing of perf_event_paranoid message, from David Ahern.
>
> . Handle realloc failures in 'perf kvm', from David Ahern.
>
> . Fix divide by 0 in variance, from David Ahern.
>
> . Save parent pid in thread struct, from David Ahern.
>
> . Handle JITed code in shared memory, from Andi Kleen.
>
> . Makefile reorganization, prep work for Kconfig patches, from Jiri Olsa.
>
> . Fixes for 'perf diff', from Jiri Olsa.
>
> . Add automated make test suite, from Jiri Olsa.
>
> . 'perf tests' fixes from Jiri Olsa.
>
> . Remove some unused struct members, from Jiri Olsa.
>
> . Add missing liblk.a dependency for python/perf.so, fix from Jiri Olsa.
>
> . Respect CROSS_COMPILE in liblk.a, from Rabin Vincent.
>
> . Expand definition of sysfs format attribute, from Michael Ellerman.
>
> . No need to do locking when adding hists in perf report, only 'top'
> needs that, from Namhyung Kim.
>
> . Sorting improvements, from Namhyung Kim.
>
> . Fix alignment of symbol column in in the hists browser (top, report)
> when -v is given, from NAmhyung Kim.
>
> . Add --percent-limit option to 'top' and 'report', from Namhyung Kim.
>
> . Fix 'perf top' -E option behavior, from Namhyung Kim.
>
> . Fix bug in isupper() and islower(), from Sukadev Bhattiprolu.
>
> . Fix compile errors in bp_signal 'perf test', from Sukadev Bhattiprolu.
>
> . Make Power7 CPI stack events available in sysfs, from Sukadev Bhattiprolu.
>
> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
>
> ----------------------------------------------------------------
> Andi Kleen (1):
> perf tools: Handle JITed code in shared memory
>
> Arnaldo Carvalho de Melo (3):
> perf archive: Fix typo on Documentation
> perf hists browser: Use sort__has_sym
> perf test: Fix typo
>
> David Ahern (6):
> perf record: handle death by SIGTERM
> perf evsel: Fix printing of perf_event_paranoid message
> perf kvm: Handle realloc failures
> perf stats: Fix divide by 0 in variance
> perf tools: Save parent pid in thread struct
> perf evlist: Reset SIGTERM handler in workload child process
>
> Jiri Olsa (32):
> perf tools: Fix tab vs spaces issue in Makefile ifdef/endif
> perf diff: Use internal rb tree for hists__precompute
> perf hists: Rename hist_entry__add_pair arguments
> perf tools: Add automated make test suite
> perf tools: Move arch check into config/Makefile
> perf tools: Move programs check into config/Makefile
> perf tools: Move compiler and linker flags check into config/Makefile
> perf tools: Move libelf check config into config/Makefile
> perf tools: Move libdw check config into config/Makefile
> perf tools: Move libunwind check config into config/Makefile
> perf tools: Move libaudit check config into config/Makefile
> perf tools: Move slang check config into config/Makefile
> perf tools: Move gtk2 check config into config/Makefile
> perf tools: Move libperl check config into config/Makefile
> perf tools: Move libpython check config into config/Makefile
> perf tools: Move libbfd check config into config/Makefile
> perf tools: Move stdlib check config into config/Makefile
> perf tools: Move libnuma check config into config/Makefile
> perf tools: Move paths config into config/Makefile
> perf tools: Final touches for CHK config move
> perf tests: Fix attr test for record -d option
> perf tests: Fix exclude_guest|exclude_host checking for attr tests
> perf tools: Remove frozen from perf_header struct
> perf tools: Remove cwdlen from struct perf_session
> perf tools: Merge all *CFLAGS* make variable into CFLAGS
> perf tools: Merge all *LDFLAGS* make variable into LDFLAGS
> perf tools: Switch to full path C include directories
> perf tools: Add NO_BIONIC variable to confiure bionic setup
> perf tools: Replace tabs with spaces for all non-commands statements
> perf tools: Replace multiple line assignment with multiple statements
> perf tools: Remove '?=' Makefile STRIP assignment
> perf tools: Add missing liblk.a dependency for python/perf.so
>
> Michael Ellerman (1):
> perf: Expand definition of sysfs format attribute
>
> Namhyung Kim (18):
> perf hists: Fix an invalid memory free on he->branch_info
> perf hists: Free unused mem info of a matched hist entry
> perf report: Fix alignment of symbol column when -v is given
> perf sort: Introduce sort__mode variable
> perf sort: Factor out common code in sort_dimension__add()
> perf sort: Separate out memory-specific sort keys
> perf sort: Consolidate sort_entry__setup_elide()
> perf sort: Reorder HISTC_SRCLINE index
> perf sort: Cleanup sort__has_sym setting
> perf top: Use sort__has_sym
> perf top: Fix -E option behavior
> perf top: Fix percent output when no samples collected
> perf top: Get rid of *_threaded() functions
> perf hists: Move locking to its call-sites
> perf report: Don't bother locking when adding hist entries
> perf report: Add --percent-limit option
> perf top: Add --percent-limit option
> perf report: Add report.percent-limit config variable
>
> Rabin Vincent (1):
> tools lib lk: Respect CROSS_COMPILE
>
> Sukadev Bhattiprolu (4):
> perf tools: Fix bug in isupper() and islower()
> perf tests: Fix compile errors in bp_signal files
> perf: Power7: Make CPI stack events available in sysfs
> perf: Power7 Update testing ABI to list CPI-stack events
>
> .../testing/sysfs-bus-event_source-devices-events | 32 +-
> .../testing/sysfs-bus-event_source-devices-format | 6 +
> arch/powerpc/perf/power7-pmu.c | 73 +++
> tools/lib/lk/Makefile | 3 +
> tools/perf/Documentation/perf-archive.txt | 2 +-
> tools/perf/Documentation/perf-report.txt | 4 +
> tools/perf/Documentation/perf-top.txt | 4 +
> tools/perf/Makefile | 630 ++++-----------------
> tools/perf/builtin-diff.c | 19 +-
> tools/perf/builtin-kvm.c | 3 +
> tools/perf/builtin-record.c | 2 +-
> tools/perf/builtin-report.c | 102 ++--
> tools/perf/builtin-top.c | 74 +--
> tools/perf/config/Makefile | 477 ++++++++++++++++
> tools/perf/tests/attr/base-record | 4 +-
> tools/perf/tests/attr/base-stat | 4 +-
> tools/perf/tests/attr/test-record-data | 5 +-
> tools/perf/tests/bp_signal.c | 6 +
> tools/perf/tests/bp_signal_overflow.c | 6 +
> tools/perf/tests/builtin-test.c | 2 +-
> tools/perf/tests/make | 138 +++++
> tools/perf/ui/browsers/hists.c | 106 +++-
> tools/perf/ui/gtk/hists.c | 13 +-
> tools/perf/ui/stdio/hist.c | 7 +-
> tools/perf/util/evlist.c | 2 +
> tools/perf/util/evsel.c | 2 +-
> tools/perf/util/header.c | 2 -
> tools/perf/util/header.h | 1 -
> tools/perf/util/hist.c | 96 ++--
> tools/perf/util/hist.h | 16 +-
> tools/perf/util/map.c | 1 +
> tools/perf/util/session.h | 1 -
> tools/perf/util/setup.py | 5 +-
> tools/perf/util/sort.c | 128 +++--
> tools/perf/util/sort.h | 36 +-
> tools/perf/util/stat.c | 2 +-
> tools/perf/util/thread.c | 4 +
> tools/perf/util/thread.h | 1 +
> tools/perf/util/top.c | 23 +-
> tools/perf/util/top.h | 2 +-
> tools/perf/util/util.h | 4 +-
> 41 files changed, 1270 insertions(+), 778 deletions(-)
> create mode 100644 tools/perf/config/Makefile
> create mode 100644 tools/perf/tests/make
Pulled, thanks a lot Arnaldo!
I'm wondering, do we need any of the fixes here for perf/urgent and v3.10
as well?
Thanks,
Ingo
^ permalink raw reply
* [PATCH] powerpc/32bit:Store temporary result in r0 instead of r8
From: Priyanka Jain @ 2013-05-31 11:20 UTC (permalink / raw)
To: linuxppc-dev, stable; +Cc: scottwood, Priyanka Jain, tiejun.chen
While returning from exception handling in case of PREEMPT enabled,
_TIF_NEED_RESCHED bit is checked in TI_FLAGS (thread_info flag) of current
task. Only if this bit is set, it should continue with the process of
calling preempt_schedule_irq() to schedule highest priority task if
available.
Current code assumes that r8 contains TI_FLAGS and check this for
_TIF_NEED_RESCHED, but as r8 is modified in the code which executes before
this check, r8 no longer contains the expected TI_FLAGS information.
As a result check for comparison with _TIF_NEED_RESCHED was failing even if
NEED_RESCHED bit is set in the current thread_info flag. Due to this,
preempt_schedule_irq() and in turn scheduler was not getting called even if
highest priority task is ready for execution.
So, store temporary results in r0 instead of r8 to prevent r8 from getting
modified as subsequent code is dependent on its value.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
---
arch/powerpc/kernel/entry_32.S | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index d22e73e..22b45a4 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -849,7 +849,7 @@ resume_kernel:
/* check current_thread_info, _TIF_EMULATE_STACK_STORE */
CURRENT_THREAD_INFO(r9, r1)
lwz r8,TI_FLAGS(r9)
- andis. r8,r8,_TIF_EMULATE_STACK_STORE@h
+ andis. r0,r8,_TIF_EMULATE_STACK_STORE@h
beq+ 1f
addi r8,r1,INT_FRAME_SIZE /* Get the kprobed function entry */
--
1.7.4.1
^ permalink raw reply related
* Re: [PATCH] powerpc/32bit:Store temporary result in r0 instead of r8
From: Sebastian Andrzej Siewior @ 2013-05-31 11:07 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: scottwood, tiejun.chen, linuxppc-dev, Priyanka Jain
In-Reply-To: <1369639817-2856-1-git-send-email-Priyanka.Jain@freescale.com>
On Mon, May 27, 2013 at 01:00:17PM +0530, Priyanka Jain wrote:
> While returning from exception handling in case of PREEMPT enabled,
> _TIF_NEED_RESCHED bit is checked in TI_FLAGS (thread_info flag) of current
> task. Only if this bit is set, it should continue with the process of
> calling preempt_schedule_irq() to schedule highest priority task if
> available.
This is broken since a9c4e541 ("powerpc/kprobe: Complete kprobe
and migrate exception frame") and this commit joined Linus' tree in
v3.7-rc1.
Ben, please add
Cc: <stable@vger.kernel.org> # 3.7+
so it gets into the stable tree.
Sebastian
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Grant Likely @ 2013-05-31 11:48 UTC (permalink / raw)
To: Ian Campbell, linux-kernel
Cc: Michal Marek, JonLoeliger, Stephen Warren, linux-kbuild,
Rob Herring, linuxppc-dev
In-Reply-To: <1369996170.5199.68.camel@zakaz.uk.xensource.com>
On Fri, 31 May 2013 11:29:30 +0100, Ian Campbell <Ian.Campbell@citrix.com> wrote:
> This affects arch/powerpc/boot/dts/virtex440-ml510.dts but I think it is
> actually a more general issue:
>
> $ make ARCH=powerpc CROSS_COMPILE=powerpc-linux- virtex440-ml510.dtb
> CC scripts/mod/devicetable-offsets.s
> GEN scripts/mod/devicetable-offsets.h
> HOSTCC scripts/mod/file2alias.o
> HOSTLD scripts/mod/modpost
> DTC arch/powerpc/boot/virtex440-ml510.dtb
> Error: arch/powerpc/boot/dts/virtex440-ml510.dts:374.6-7 syntax error
> FATAL ERROR: Unable to parse input tree
> make[1]: *** [arch/powerpc/boot/virtex440-ml510.dtb] Error 1
> make: *** [virtex440-ml510.dtb] Error 2
>
> Line 374 is the "IDSEL 0x16..." line here:
> interrupt-map = <
> /* IRQ mapping for pci slots and ALI M1533
> ...
> * management core also isn't used.
> */
>
> /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
> 0x3000 0 0 1 &xps_intc_0 3 2
> 0x3000 0 0 2 &xps_intc_0 2 2
> 0x3000 0 0 3 &xps_intc_0 5 2
> 0x3000 0 0 4 &xps_intc_0 4 2
>
> Which gets preprocessed into:
> interrupt-map = <
> # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
> 0x3000 0 0 1 &xps_intc_0 3 2
> 0x3000 0 0 2 &xps_intc_0 2 2
> 0x3000 0 0 3 &xps_intc_0 5 2
> 0x3000 0 0 4 &xps_intc_0 4 2
>
> If I manually remove the "# 375 " line then that fixes the error
> (although there is then a subsequent one of the same type).
>
> I suppose this is a bug in dtc? It appears to have at least some
> awareness of these preprocessor line number comments since it manages to
> report the original source line number.
dtc is only able to track line numbers when the native /include/
directive is used. The #include directive doesn't help it. It should be
added, but until it is the following patch solves the problem:
I've got this patch in my tree. Either Rob or I will push it to Linus in
the next few days.
g.
---
commit d01dccdcb3ea8233b09efb9c24db9f057fbd3b37
Author: Grant Likely <grant.likely@linaro.org>
Date: Fri May 31 12:45:18 2013 +0100
dtc: Suppress cpp linemarker annotations
DTC isn't able to parse cpp linemarker annotations, so suppress them in
the cpp output by adding the -P flag to the cpp options.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 51bb3de..fc08a2b 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -149,7 +149,7 @@ cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(LINUXINCLUDE) \
ld_flags = $(LDFLAGS) $(ldflags-y)
-dtc_cpp_flags = -Wp,-MD,$(depfile).pre -nostdinc \
+dtc_cpp_flags = -Wp,-MD,$(depfile).pre -nostdinc -P \
-I$(srctree)/arch/$(SRCARCH)/boot/dts \
-I$(srctree)/arch/$(SRCARCH)/boot/dts/include \
-undef -D__DTS__
^ permalink raw reply related
* Re: [PATCH v5 12/13] ARM: kirkwood: remove redundant DT board files
From: Jason Cooper @ 2013-05-31 11:54 UTC (permalink / raw)
To: Arnaud Ebalard
Cc: Thomas Petazzoni, Andrew Lunn, linux-kernel, linux-arm-kernel,
netdev, linuxppc-dev, David Miller, Lennert Buytenhek,
Sebastian Hesselbarth
In-Reply-To: <87txlknluf.fsf@natisbad.org>
Arnaud,
On Fri, May 31, 2013 at 12:28:56AM +0200, Arnaud Ebalard wrote:
> Hi,
>
> Jason Cooper <jason@lakedaemon.net> writes:
>
> >> For instance 6bd98481ab34 (arm: kirkwood: NETGEAR ReadyNAS Duo v2 init
> >> PCIe via DT) currently sitting in jcooper/mvebu/pcie_kirkwood removes
> >> the PCIE init routine in board-readynas.c, and yours remove ge00
> >> init. With both applied, the whole file can go away.
> >>
> >> AFAICT, this may be the case soon for:
> >>
> >> arch/arm/mach-kirkwood/board-iconnect.c (36e5722089)
> >> arch/arm/mach-kirkwood/board-mplcec4.c (9470fbfb8d)
> >> arch/arm/mach-kirkwood/board-nsa310.c (40fa8e5da2)
> >> arch/arm/mach-kirkwood/board-readynas.c (6bd98481ab)
> >> arch/arm/mach-kirkwood/board-ts219.c (259e234608)
> >
> > Would you mind putting a patch together (for after v3.10 drops) to do
> > this? If you applied Sebastian's series on top of mvebu/pcie_kirkwood,
> > that should get you almost there. The last half of his series is going
> > in after v3.10...
>
> Something like the quick quilt-generated patch at the end of this email
> (done after a dummy merge of Sebastian's set in mvebu/pcie_kirkwood)?
yep.
> I will take a look at what remains after Sebastian's set hit one of
> your branch but I guess he will have included most of what is in the
> patch to help you with the merge.
>
> Anyway, at the end here is what DT board files would remain:
>
> $ ls -1 arch/arm/mach-kirkwood/board-*.c
> arch/arm/mach-kirkwood/board-dnskw.c
This one seems to just be setting a gpio to enable reboot after power
failure. Should be simple to move to DT.
> arch/arm/mach-kirkwood/board-dt.c
We obviously need this one. ;-)
> arch/arm/mach-kirkwood/board-lsxl.c
This is taken care of in mvebu/boards
391a16c ARM: Kirkwood: Convert LSXL to restart-poweroff driver.
> arch/arm/mach-kirkwood/board-ts219.c
Also in mvebu/boards
4350a47 ARM: Kirkwood: Make use of the QNAP Power off driver.
> Just one question though: the removal of MACH_*_DT in Kconfig removes
> the automatic selection of useful board specific options like
> ARM_APPENDED_DTB, ARM_ATAG_DTB_COMPAT, POWER_RESET_RESTART,
> POWER_RESET_QNAP. Is that expected?
I would select POWER_RESET_QNAP and POWER_RESET_RESTART in Kconfig for
ARCH_KIRKWOOD_DT, and put ARM_APPENDED_DTB and ARM_ATAG_DTB_COMPAT into
the defconfig.
thx,
Jason.
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Ian Campbell @ 2013-05-31 11:58 UTC (permalink / raw)
To: Grant Likely
Cc: Michal Marek, JonLoeliger, Stephen Warren, linux-kbuild,
linux-kernel, Rob Herring, linuxppc-dev
In-Reply-To: <20130531114824.60D223E0901@localhost>
On Fri, 2013-05-31 at 12:48 +0100, Grant Likely wrote:
> On Fri, 31 May 2013 11:29:30 +0100, Ian Campbell <Ian.Campbell@citrix.com> wrote:
> > This affects arch/powerpc/boot/dts/virtex440-ml510.dts but I think it is
> > actually a more general issue:
> >
> > $ make ARCH=powerpc CROSS_COMPILE=powerpc-linux- virtex440-ml510.dtb
> > CC scripts/mod/devicetable-offsets.s
> > GEN scripts/mod/devicetable-offsets.h
> > HOSTCC scripts/mod/file2alias.o
> > HOSTLD scripts/mod/modpost
> > DTC arch/powerpc/boot/virtex440-ml510.dtb
> > Error: arch/powerpc/boot/dts/virtex440-ml510.dts:374.6-7 syntax error
> > FATAL ERROR: Unable to parse input tree
> > make[1]: *** [arch/powerpc/boot/virtex440-ml510.dtb] Error 1
> > make: *** [virtex440-ml510.dtb] Error 2
> >
> > Line 374 is the "IDSEL 0x16..." line here:
> > interrupt-map = <
> > /* IRQ mapping for pci slots and ALI M1533
> > ...
> > * management core also isn't used.
> > */
> >
> > /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
> > 0x3000 0 0 1 &xps_intc_0 3 2
> > 0x3000 0 0 2 &xps_intc_0 2 2
> > 0x3000 0 0 3 &xps_intc_0 5 2
> > 0x3000 0 0 4 &xps_intc_0 4 2
> >
> > Which gets preprocessed into:
> > interrupt-map = <
> > # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
> > 0x3000 0 0 1 &xps_intc_0 3 2
> > 0x3000 0 0 2 &xps_intc_0 2 2
> > 0x3000 0 0 3 &xps_intc_0 5 2
> > 0x3000 0 0 4 &xps_intc_0 4 2
> >
> > If I manually remove the "# 375 " line then that fixes the error
> > (although there is then a subsequent one of the same type).
> >
> > I suppose this is a bug in dtc? It appears to have at least some
> > awareness of these preprocessor line number comments since it manages to
> > report the original source line number.
>
> dtc is only able to track line numbers when the native /include/
> directive is used. The #include directive doesn't help it. It should be
> added, but until it is the following patch solves the problem:
>
> I've got this patch in my tree. Either Rob or I will push it to Linus in
> the next few days.
Thanks, I'll do something similar in my device-tree.git tree.
Ian
^ permalink raw reply
* [PATCH 1/1] Add a new platform tree for ib8315.
From: Sergey Gerasimov @ 2013-05-31 12:27 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Kumar Gala,
Artem Bityutskiy, Huang Shijie, David Woodhouse
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
[-- Attachment #1: Type: text/plain, Size: 40409 bytes --]
Signed-off-by: Sergey Gerasimov <Sergey.Gerasimov@astrosoft-development.com>
---
arch/powerpc/boot/dts/ib8315.dts | 490 +++++++++++++++++++++++++++++
arch/powerpc/configs/83xx/ib8315_defconfig | 102 ++++++
arch/powerpc/platforms/83xx/Kconfig | 7 +
arch/powerpc/platforms/83xx/Makefile | 1 +
arch/powerpc/platforms/83xx/tqm8315.c | 137 ++++++++
5 files changed, 737 insertions(+)
create mode 100644 arch/powerpc/boot/dts/ib8315.dts
create mode 100644 arch/powerpc/configs/83xx/ib8315_defconfig
create mode 100644 arch/powerpc/platforms/83xx/tqm8315.c
diff --git a/arch/powerpc/boot/dts/ib8315.dts b/arch/powerpc/boot/dts/ib8315.dts
new file mode 100644
index 0000000..963caf2
--- /dev/null
+++ b/arch/powerpc/boot/dts/ib8315.dts
@@ -0,0 +1,490 @@
+/*
+ * IB8315 Device Tree Source based on:
+ * TQM8315 Device Tree Source
+ *
+ * Copyright 2009 TQ Components
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "fsl,tqm8315";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8315@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <16384>;
+ i-cache-size = <16384>;
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x0>; // from bootloader
+ };
+
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ /*
+ * CS0 and CS1 are swapped when booting from nand, but the
+ * addresses are the same.
+ */
+ ranges = <0x0 0x0 0x80000000 0x04000000
+ 0x1 0x0 0xe0600000 0x00008000>;
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ /*
+ * The Intel PC48F4400P0TB00 chip has two non-identical
+ * dies. We need to define two seperate regions, that
+ * are scanned by physmap_of independently. Else, the
+ * MTD driver assumes two identical chips.
+ */
+ reg = <0x0 0x00000000 0x02000000
+ 0x0 0x02000000 0x02000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x80000>; // 512 KiB
+ read-only;
+ };
+
+ partition@1 {
+ label = "env1";
+ reg = <0x80000 0x20000>; // 128 KiB
+ read-only;
+ };
+
+ partition@2 {
+ label = "env2";
+ reg = <0xA0000 0x40000>; // 384 KiB
+ read-only;
+ };
+
+ partition@3 {
+ label ="dtb";
+ reg = <0x100000 0x100000>; // 1 MiB
+ };
+
+ partition@4 {
+ label ="kernel";
+ reg = <0x200000 0x300000>; // 3 MiB
+ };
+
+ partition@5 {
+ label ="root";
+ reg = <0x500000 0x2800000>; // 40 MiB
+ };
+
+ /*
+ * The remaining 19 MiB, e.g. for a file system.
+ * Requires MTD concatenation support
+ */
+ partition@6 {
+ label ="user";
+ reg = <0x2D00000 0x1300000>;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x8000>;
+
+ partition@0 {
+ label = "filesystem";
+ reg = <0x0 0x20000000>;
+ /*read-only;*/
+ };
+ };
+ };
+
+ immr@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,mpc8315-immr", "simple-bus";
+ ranges = <0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>; // from bootloader
+
+ wdt@200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ clock-frequency = <400000>; // SCL
+ dfsrr;
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+ eeprom@57 {
+ compatible = "atmel,24c256";
+ reg = <0x57>;
+ };
+ sensor@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ };
+ /* Enable this to support sensors on STK85xxNG */
+ /*sensor@49 {
+ compatible = "national,lm75";
+ reg = <0x49>;
+ };
+ sensor@4A {
+ compatible = "national,lm75";
+ reg = <0x4A>;
+ };
+ sensor@4B {
+ compatible = "national,lm75";
+ reg = <0x4B>;
+ };*/
+ };
+
+ spi@7000 {
+ cell-index = <0>;
+ compatible = "fsl,spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
+ mode = "cpu";
+ };
+
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ cell-index = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
+ dr_mode = "host";
+ phy_type = "utmi";
+ };
+
+ enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ ranges = <0x0 0x24000 0x1000>;
+ // from bootloader
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ tbi-handle = <&tbi0>;
+ phy-handle = < &phy0 >;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x520 0x20>;
+
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&ipic>;
+ interrupts = <20 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&ipic>;
+ interrupts = <19 0x8>;
+ reg = <0x1>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ ranges = <0x0 0x25000 0x1000>;
+ // from bootloader
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
+ tbi-handle = <&tbi1>;
+ phy-handle = < &phy1 >;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>; // from bootloader
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>; // from bootloader
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
+ "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
+ "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x97c>;
+ fsl,descriptor-types-mask = <0x3ab0abf>;
+ };
+
+ sata@18000 {
+ compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ sata@19000 {
+ compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
+ reg = <0x19000 0x1000>;
+ cell-index = <2>;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: interrupt-controller@700 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ device_type = "ipic";
+ };
+ };
+
+ pci0: pci@e0008500 {
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ /* The values are calculated the following:
+ * The first thre values are address values as address-cells is 3
+ * The first value is the bus number in bits 31-16 (normal 0 because masked out)
+ * Bits 15-8 are the devfn (this is the IDSEL Line shift 3 bits to the left IDSEL AD15 is 0x78)
+ * Bis 7-0 are unused set to 0 and mask out with the interrupt-mask value
+ * The following two values should be 0 and masked out
+ * The fourth value is the interrupt bis from PCI configuration header (one value as interrupt-cells is 1)
+ * The last three values are the interrupt this interrupt is connected to.
+ * First interrupt controller node, then the number and last the flags (8 means level low) */
+ interrupt-map = <
+ /* IDSEL 0x10 - first PCI slot */
+ 0x8000 0x0 0x0 0x1 &ipic 18 0x8
+ 0x8000 0x0 0x0 0x2 &ipic 19 0x8
+ 0x8000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x8000 0x0 0x0 0x3 &ipic 21 0x8
+
+ /* IDSEL 0x11 - Second PCI slot */
+ 0x8800 0x0 0x0 0x1 &ipic 19 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 18 0x8
+
+ /* IDSEL 0x12 - USB controller */
+ 0x9000 0x0 0x0 0x1 &ipic 21 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0 0xC0000000 0xC0000000 0 0x10000000
+ 0x02000000 0 0xD0000000 0xD0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>;
+ clock-frequency = <0>; // from bootloader
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
+ compatible = "fsl,mpc8349-pci";
+ device_type = "pci";
+ };
+
+ pci1: pcie@e0009000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe0009000 0x00001000>;
+ ranges = <0x02000000 0 0x40000000 0x40000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xe3100000 0 0x00800000>;
+ bus-range = <0 255>;
+ interrupt-map-mask = <0x0 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 1 8
+ 0 0 0 2 &ipic 1 8
+ 0 0 0 3 &ipic 1 8
+ 0 0 0 4 &ipic 1 8>;
+ clock-frequency = <0>;
+
+ pcie@0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ reg = <0 0 0 0 0>;
+ ranges = <0x02000000 0 0x40000000
+ 0x02000000 0 0x40000000
+ 0 0x10000000
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00800000>;
+ };
+ };
+
+ pci2: pcie@e000a000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe000a000 0x00001000>;
+ ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xe3180000 0 0x00800000>;
+ bus-range = <0 255>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 2 8
+ 0 0 0 2 &ipic 2 8
+ 0 0 0 3 &ipic 2 8
+ 0 0 0 4 &ipic 2 8>;
+ clock-frequency = <0>;
+
+ pcie@0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ reg = <0 0 0 0 0>;
+ ranges = <0x02000000 0 0x60000000
+ 0x02000000 0 0x60000000
+ 0 0x10000000
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00800000>;
+ };
+ };
+};
diff --git a/arch/powerpc/configs/83xx/ib8315_defconfig b/arch/powerpc/configs/83xx/ib8315_defconfig
new file mode 100644
index 0000000..5788130
--- /dev/null
+++ b/arch/powerpc/configs/83xx/ib8315_defconfig
@@ -0,0 +1,102 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_EPOLL is not set
+CONFIG_EMBEDDED=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_PPC_83xx=y
+CONFIG_TQM8315=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+# CONFIG_PCIEASPM is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_EEPROM_AT24=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_ATA=y
+CONFIG_SATA_FSL=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_3COM is not set
+CONFIG_GIANFAR=y
+CONFIG_E100=y
+CONFIG_E1000=y
+CONFIG_E1000E=y
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MPC=y
+CONFIG_SENSORS_LM75=y
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_USB=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_FSL=y
+# CONFIG_USB_EHCI_HCD_PPC_OF is not set
+CONFIG_USB_STORAGE=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_MSDOS_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 670a033..1d280d5 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -24,6 +24,13 @@ config MPC831x_RDB
help
This option enables support for the MPC8313 RDB and MPC8315 RDB boards.
+config TQM8315
+ bool "TQM8315 Board"
+ select DEFAULT_UIMAGE
+ select PPC_MPC831x
+ help
+ This option enables support for the TQM8315 processor board.
+
config MPC832x_MDS
bool "Freescale MPC832x MDS"
select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index ed95bfc..05524f1 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o
obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o
obj-$(CONFIG_MPC830x_RDB) += mpc830x_rdb.o
obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o
+obj-$(CONFIG_TQM8315) += tqm8315.o
obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
diff --git a/arch/powerpc/platforms/83xx/tqm8315.c b/arch/powerpc/platforms/83xx/tqm8315.c
new file mode 100644
index 0000000..04c106a
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/tqm8315.c
@@ -0,0 +1,137 @@
+/*
+ * arch/powerpc/platforms/83xx/tqm8315.c
+ *
+ * Description: TQM8315 board specific routines.
+ *
+ * Author: Oliver Weber <o.weber@gateware.de>
+ * Copyright (C) TQ Components 2009.
+ *
+ * This file is based on mpc831x_rdb.c,
+ * Author: Lo Wlison <r43300@freescale.com>
+ * Copyright (C) Freescale Semiconductor, Inc. 2006.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+
+#include <linux/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_pci.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc83xx.h"
+
+#define MPC8315_SATA_PHYCTRL_REG_OFFSET 0x15C
+#define PHYCTRLCFG_REFCLK_MASK 0x00000070
+#define PHYCTRLCFG_REFCLK_50MHZ 0x00000050
+#define PHYCTRLCFG_REFCLK_75MHZ 0x00000000
+#define PHYCTRLCFG_REFCLK_100MHZ 0x00000060
+#define PHYCTRLCFG_REFCLK_125MHZ 0x00000070
+#define PHYCTRLCFG_REFCLK_150MHZ 0x00000020
+
+
+#ifdef CONFIG_SATA_FSL
+void init_mpc8315_sata_phy(void)
+{
+ u32 val32;
+ void __iomem *immap;
+
+ immap = ioremap(get_immrbase() + 0x18000, 0x1000);
+ if (immap == NULL)
+ return;
+
+ /* Configure PHY for 125 MHz reference clock */
+ val32 = ioread32(immap + MPC8315_SATA_PHYCTRL_REG_OFFSET);
+ val32 &= ~PHYCTRLCFG_REFCLK_MASK;
+ val32 |= PHYCTRLCFG_REFCLK_125MHZ;
+ iowrite32(val32, immap + MPC8315_SATA_PHYCTRL_REG_OFFSET);
+
+ iounmap(immap);
+}
+#endif
+
+/*
+ * Setup the architecture
+ */
+static void __init tqm8315_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("tqm8315_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+ mpc83xx_add_bridge(np);
+ for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
+ mpc83xx_add_bridge(np);
+#endif
+ mpc831x_usb_cfg();
+
+#ifdef CONFIG_SATA_FSL
+ init_mpc8315_sata_phy();
+#endif
+}
+
+static void __init tqm8315_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init tqm8315_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "TQM8315")
+ || of_flat_dt_is_compatible(root, "fsl,tqm8315");
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ {.compatible = "simple-bus"},
+ {.compatible = "gianfar"},
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ return 0;
+}
+machine_device_initcall(tqm8315, declare_of_platform_devices);
+
+define_machine(tqm8315) {
+ .name = "TQM8315",
+ .probe = tqm8315_probe,
+ .setup_arch = tqm8315_setup_arch,
+ .init_IRQ = tqm8315_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+};
--
1.7.11.7
[-- Attachment #2: Type: text/html, Size: 169911 bytes --]
^ permalink raw reply related
* Re: can't access PCIe card under sbc8548
From: wolfking @ 2013-05-31 12:46 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1369994474.3928.132.camel@pasglop>
hi, Herrenschmidt
Thanks for replying to this topic!
> That looks more like a HW error to me unless you are hitting completely
> the wrong system addresses.
The HW is OK. If I plug this card into another ppc board: mpc86641-hpcn,
it works fine.
> What would be useful would be to add printk's to check what exact
> physical address pci_iomap ends up using and whether that matches
> to the iobase_phys of the PCI bridge + the BAR value of the card.
Would you mind telling me at what position should I add the printk?
I can only print pci_iomap's return address which is mentioned in
the previous mail, it is 0xfc7fc000. The following is part of the
linux boot message:
PCI host bridge /pcie@e000a000 ranges:
MEM 0x00000000a0000000..0x00000000afffffff -> 0x00000000a0000000
IO 0x00000000e2800000..0x00000000ea7fffff -> 0x0000000000000000
/pcie@e000a000: PCICSRBAR @ 0xfff00000
Is 0xe2800000 the iobase_phys of the PCI bridge?
So any suggestion is appreciated!
regards,
wolfking.
--
View this message in context: http://linuxppc.10917.n7.nabble.com/can-t-access-PCIe-card-under-sbc8548-tp71775p71874.html
Sent from the linuxppc-dev mailing list archive at Nabble.com.
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Ian Campbell @ 2013-05-31 13:07 UTC (permalink / raw)
To: Jon Loeliger
Cc: Michal Marek, Stephen Warren, linux-kbuild, linux-kernel,
Rob Herring, linuxppc-dev
In-Reply-To: <E1UiOxz-0004ET-RE@jdl.com>
[-- Attachment #1: Type: text/plain, Size: 2564 bytes --]
On Fri, 2013-05-31 at 08:01 -0500, Jon Loeliger wrote:
> > >
> > > Line 374 is the "IDSEL 0x16..." line here:
> > > interrupt-map = <
> > > /* IRQ mapping for pci slots and ALI M1533
> > > ...
> > > * management core also isn't used.
> > > */
> > >
> > > /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
> > > 0x3000 0 0 1 &xps_intc_0 3 2
> > > 0x3000 0 0 2 &xps_intc_0 2 2
> > > 0x3000 0 0 3 &xps_intc_0 5 2
> > > 0x3000 0 0 4 &xps_intc_0 4 2
>
> Can you show me the original source without mods here, please?
This is Linux v3.10-rc3 arch/powerpc/boot/dts/virtex440-ml510.dts also
attached.
> Or is the "..." purely elided comments?
Yes.
> > > Which gets preprocessed into:
> > > interrupt-map = <
> > > # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
> > > 0x3000 0 0 1 &xps_intc_0 3 2
> > > 0x3000 0 0 2 &xps_intc_0 2 2
> > > 0x3000 0 0 3 &xps_intc_0 5 2
> > > 0x3000 0 0 4 &xps_intc_0 4 2
>
>
> > dtc is only able to track line numbers when the native /include/
> > directive is used. The #include directive doesn't help it. It should be
> > added, but until it is the following patch solves the problem:
>
> It's supposed to do better than that, I think.
> This, from dtc-lexer.l
>
> <*>^"#"(line)?{WS}+[0-9]+{WS}+{STRING}({WS}+[0-9]+)? {
> char *line, *tmp, *fn;
> /* skip text before line # */
> line = yytext;
> while (!isdigit(*line))
> line++;
> /* skip digits in line # */
> tmp = line;
> while (!isspace(*tmp))
> tmp++;
> /* "NULL"-terminate line # */
> *tmp = '\0';
> /* start of filename */
> fn = strchr(tmp + 1, '"') + 1;
> /* strip trailing " from filename */
> tmp = strchr(fn, '"');
> *tmp = 0;
> /* -1 since #line is the number of the next line */
> srcpos_set_line(xstrdup(fn), atoi(line) - 1);
> }
>
> Hrm. Is this a "that's not in the kernel's copy yet" problem?
> Or did this fail to match the offending '# <line> <file>' somehow?
> (Like, is that '# 375' really in column 1?)
The "#" is in the first column.
I've attached the actual file.
Ian.
[-- Attachment #2: .virtex440-ml510.dtb.dts.tmp --]
[-- Type: text/plain, Size: 12339 bytes --]
# 1 "arch/powerpc/boot/dts/virtex440-ml510.dts"
# 1 "<built-in>"
# 1 "<command-line>"
# 1 "arch/powerpc/boot/dts/virtex440-ml510.dts"
# 12 "arch/powerpc/boot/dts/virtex440-ml510.dts"
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ml510-ref-design", "xlnx,virtex440";
dcr-parent = <&ppc440_0>;
DDR2_SDRAM_DIMM0: memory@0 {
device_type = "memory";
reg = < 0x0 0x20000000 >;
} ;
alias {
ethernet0 = &Hard_Ethernet_MAC;
serial0 = &RS232_Uart_1;
} ;
chosen {
bootargs = "console=ttyS0 root=/dev/ram";
linux,stdout-path = "/plb@0/serial@83e00000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x1>;
#size-cells = <0>;
ppc440_0: cpu@0 {
#address-cells = <1>;
#size-cells = <1>;
clock-frequency = <300000000>;
compatible = "PowerPC,440", "ibm,ppc440";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
dcr-access-method = "native";
dcr-controller ;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
model = "PowerPC,440";
reg = <0>;
timebase-frequency = <300000000>;
xlnx,apu-control = <0x2000>;
xlnx,apu-udi-0 = <0x0>;
xlnx,apu-udi-1 = <0x0>;
xlnx,apu-udi-10 = <0x0>;
xlnx,apu-udi-11 = <0x0>;
xlnx,apu-udi-12 = <0x0>;
xlnx,apu-udi-13 = <0x0>;
xlnx,apu-udi-14 = <0x0>;
xlnx,apu-udi-15 = <0x0>;
xlnx,apu-udi-2 = <0x0>;
xlnx,apu-udi-3 = <0x0>;
xlnx,apu-udi-4 = <0x0>;
xlnx,apu-udi-5 = <0x0>;
xlnx,apu-udi-6 = <0x0>;
xlnx,apu-udi-7 = <0x0>;
xlnx,apu-udi-8 = <0x0>;
xlnx,apu-udi-9 = <0x0>;
xlnx,dcr-autolock-enable = <0x1>;
xlnx,dcu-rd-ld-cache-plb-prio = <0x0>;
xlnx,dcu-rd-noncache-plb-prio = <0x0>;
xlnx,dcu-rd-touch-plb-prio = <0x0>;
xlnx,dcu-rd-urgent-plb-prio = <0x0>;
xlnx,dcu-wr-flush-plb-prio = <0x0>;
xlnx,dcu-wr-store-plb-prio = <0x0>;
xlnx,dcu-wr-urgent-plb-prio = <0x0>;
xlnx,dma0-control = <0x0>;
xlnx,dma0-plb-prio = <0x0>;
xlnx,dma0-rxchannelctrl = <0x1010000>;
xlnx,dma0-rxirqtimer = <0x3ff>;
xlnx,dma0-txchannelctrl = <0x1010000>;
xlnx,dma0-txirqtimer = <0x3ff>;
xlnx,dma1-control = <0x0>;
xlnx,dma1-plb-prio = <0x0>;
xlnx,dma1-rxchannelctrl = <0x1010000>;
xlnx,dma1-rxirqtimer = <0x3ff>;
xlnx,dma1-txchannelctrl = <0x1010000>;
xlnx,dma1-txirqtimer = <0x3ff>;
xlnx,dma2-control = <0x0>;
xlnx,dma2-plb-prio = <0x0>;
xlnx,dma2-rxchannelctrl = <0x1010000>;
xlnx,dma2-rxirqtimer = <0x3ff>;
xlnx,dma2-txchannelctrl = <0x1010000>;
xlnx,dma2-txirqtimer = <0x3ff>;
xlnx,dma3-control = <0x0>;
xlnx,dma3-plb-prio = <0x0>;
xlnx,dma3-rxchannelctrl = <0x1010000>;
xlnx,dma3-rxirqtimer = <0x3ff>;
xlnx,dma3-txchannelctrl = <0x1010000>;
xlnx,dma3-txirqtimer = <0x3ff>;
xlnx,endian-reset = <0x0>;
xlnx,generate-plb-timespecs = <0x1>;
xlnx,icu-rd-fetch-plb-prio = <0x0>;
xlnx,icu-rd-spec-plb-prio = <0x0>;
xlnx,icu-rd-touch-plb-prio = <0x0>;
xlnx,interconnect-imask = <0xffffffff>;
xlnx,mplb-allow-lock-xfer = <0x1>;
xlnx,mplb-arb-mode = <0x0>;
xlnx,mplb-awidth = <0x20>;
xlnx,mplb-counter = <0x500>;
xlnx,mplb-dwidth = <0x80>;
xlnx,mplb-max-burst = <0x8>;
xlnx,mplb-native-dwidth = <0x80>;
xlnx,mplb-p2p = <0x0>;
xlnx,mplb-prio-dcur = <0x2>;
xlnx,mplb-prio-dcuw = <0x3>;
xlnx,mplb-prio-icu = <0x4>;
xlnx,mplb-prio-splb0 = <0x1>;
xlnx,mplb-prio-splb1 = <0x0>;
xlnx,mplb-read-pipe-enable = <0x1>;
xlnx,mplb-sync-tattribute = <0x0>;
xlnx,mplb-wdog-enable = <0x1>;
xlnx,mplb-write-pipe-enable = <0x1>;
xlnx,mplb-write-post-enable = <0x1>;
xlnx,num-dma = <0x0>;
xlnx,pir = <0xf>;
xlnx,ppc440mc-addr-base = <0x0>;
xlnx,ppc440mc-addr-high = <0x1fffffff>;
xlnx,ppc440mc-arb-mode = <0x0>;
xlnx,ppc440mc-bank-conflict-mask = <0x1800000>;
xlnx,ppc440mc-control = <0xf810008f>;
xlnx,ppc440mc-max-burst = <0x8>;
xlnx,ppc440mc-prio-dcur = <0x2>;
xlnx,ppc440mc-prio-dcuw = <0x3>;
xlnx,ppc440mc-prio-icu = <0x4>;
xlnx,ppc440mc-prio-splb0 = <0x1>;
xlnx,ppc440mc-prio-splb1 = <0x0>;
xlnx,ppc440mc-row-conflict-mask = <0x7ffe00>;
xlnx,ppcdm-asyncmode = <0x0>;
xlnx,ppcds-asyncmode = <0x0>;
xlnx,user-reset = <0x0>;
} ;
} ;
plb_v46_0: plb@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
ranges ;
FLASH: flash@fc000000 {
bank-width = <2>;
compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
reg = < 0xfc000000 0x2000000 >;
xlnx,family = "virtex5";
xlnx,include-datawidth-matching-0 = <0x1>;
xlnx,include-datawidth-matching-1 = <0x0>;
xlnx,include-datawidth-matching-2 = <0x0>;
xlnx,include-datawidth-matching-3 = <0x0>;
xlnx,include-negedge-ioregs = <0x0>;
xlnx,include-plb-ipif = <0x1>;
xlnx,include-wrbuf = <0x1>;
xlnx,max-mem-width = <0x10>;
xlnx,mch-native-dwidth = <0x20>;
xlnx,mch-plb-clk-period-ps = <0x2710>;
xlnx,mch-splb-awidth = <0x20>;
xlnx,mch0-accessbuf-depth = <0x10>;
xlnx,mch0-protocol = <0x0>;
xlnx,mch0-rddatabuf-depth = <0x10>;
xlnx,mch1-accessbuf-depth = <0x10>;
xlnx,mch1-protocol = <0x0>;
xlnx,mch1-rddatabuf-depth = <0x10>;
xlnx,mch2-accessbuf-depth = <0x10>;
xlnx,mch2-protocol = <0x0>;
xlnx,mch2-rddatabuf-depth = <0x10>;
xlnx,mch3-accessbuf-depth = <0x10>;
xlnx,mch3-protocol = <0x0>;
xlnx,mch3-rddatabuf-depth = <0x10>;
xlnx,mem0-width = <0x10>;
xlnx,mem1-width = <0x20>;
xlnx,mem2-width = <0x20>;
xlnx,mem3-width = <0x20>;
xlnx,num-banks-mem = <0x1>;
xlnx,num-channels = <0x2>;
xlnx,priority-mode = <0x0>;
xlnx,synch-mem-0 = <0x0>;
xlnx,synch-mem-1 = <0x0>;
xlnx,synch-mem-2 = <0x0>;
xlnx,synch-mem-3 = <0x0>;
xlnx,synch-pipedelay-0 = <0x2>;
xlnx,synch-pipedelay-1 = <0x2>;
xlnx,synch-pipedelay-2 = <0x2>;
xlnx,synch-pipedelay-3 = <0x2>;
xlnx,tavdv-ps-mem-0 = <0x1adb0>;
xlnx,tavdv-ps-mem-1 = <0x3a98>;
xlnx,tavdv-ps-mem-2 = <0x3a98>;
xlnx,tavdv-ps-mem-3 = <0x3a98>;
xlnx,tcedv-ps-mem-0 = <0x1adb0>;
xlnx,tcedv-ps-mem-1 = <0x3a98>;
xlnx,tcedv-ps-mem-2 = <0x3a98>;
xlnx,tcedv-ps-mem-3 = <0x3a98>;
xlnx,thzce-ps-mem-0 = <0x88b8>;
xlnx,thzce-ps-mem-1 = <0x1b58>;
xlnx,thzce-ps-mem-2 = <0x1b58>;
xlnx,thzce-ps-mem-3 = <0x1b58>;
xlnx,thzoe-ps-mem-0 = <0x1b58>;
xlnx,thzoe-ps-mem-1 = <0x1b58>;
xlnx,thzoe-ps-mem-2 = <0x1b58>;
xlnx,thzoe-ps-mem-3 = <0x1b58>;
xlnx,tlzwe-ps-mem-0 = <0x88b8>;
xlnx,tlzwe-ps-mem-1 = <0x0>;
xlnx,tlzwe-ps-mem-2 = <0x0>;
xlnx,tlzwe-ps-mem-3 = <0x0>;
xlnx,twc-ps-mem-0 = <0x1adb0>;
xlnx,twc-ps-mem-1 = <0x3a98>;
xlnx,twc-ps-mem-2 = <0x3a98>;
xlnx,twc-ps-mem-3 = <0x3a98>;
xlnx,twp-ps-mem-0 = <0x11170>;
xlnx,twp-ps-mem-1 = <0x2ee0>;
xlnx,twp-ps-mem-2 = <0x2ee0>;
xlnx,twp-ps-mem-3 = <0x2ee0>;
xlnx,xcl0-linesize = <0x4>;
xlnx,xcl0-writexfer = <0x1>;
xlnx,xcl1-linesize = <0x4>;
xlnx,xcl1-writexfer = <0x1>;
xlnx,xcl2-linesize = <0x4>;
xlnx,xcl2-writexfer = <0x1>;
xlnx,xcl3-linesize = <0x4>;
xlnx,xcl3-writexfer = <0x1>;
} ;
Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,compound";
ethernet@81c00000 {
compatible = "xlnx,xps-ll-temac-1.01.b";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 8 2 >;
llink-connected = <&Hard_Ethernet_MAC_fifo>;
local-mac-address = [ 02 00 00 00 00 00 ];
reg = < 0x81c00000 0x40 >;
xlnx,bus2core-clk-ratio = <0x1>;
xlnx,phy-type = <0x3>;
xlnx,phyaddr = <0x1>;
xlnx,rxcsum = <0x0>;
xlnx,rxfifo = <0x8000>;
xlnx,temac-type = <0x0>;
xlnx,txcsum = <0x0>;
xlnx,txfifo = <0x8000>;
} ;
} ;
Hard_Ethernet_MAC_fifo: xps-ll-fifo@81a00000 {
compatible = "xlnx,xps-ll-fifo-1.01.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 6 2 >;
reg = < 0x81a00000 0x10000 >;
xlnx,family = "virtex5";
} ;
IIC_EEPROM: i2c@81600000 {
compatible = "xlnx,xps-iic-2.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 9 2 >;
reg = < 0x81600000 0x10000 >;
xlnx,clk-freq = <0x5f5e100>;
xlnx,family = "virtex5";
xlnx,gpo-width = <0x1>;
xlnx,iic-freq = <0x186a0>;
xlnx,scl-inertial-delay = <0x5>;
xlnx,sda-inertial-delay = <0x5>;
xlnx,ten-bit-adr = <0x0>;
} ;
LCD_OPTIONAL: gpio@81420000 {
compatible = "xlnx,xps-gpio-1.00.a";
reg = < 0x81420000 0x10000 >;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,family = "virtex5";
xlnx,gpio-width = <0xb>;
xlnx,interrupt-present = <0x0>;
xlnx,is-bidir = <0x1>;
xlnx,is-bidir-2 = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
} ;
LEDs_4Bit: gpio@81400000 {
compatible = "xlnx,xps-gpio-1.00.a";
reg = < 0x81400000 0x10000 >;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,family = "virtex5";
xlnx,gpio-width = <0x4>;
xlnx,interrupt-present = <0x0>;
xlnx,is-bidir = <0x1>;
xlnx,is-bidir-2 = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
} ;
RS232_Uart_1: serial@83e00000 {
clock-frequency = <100000000>;
compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
current-speed = <9600>;
device_type = "serial";
interrupt-parent = <&xps_intc_0>;
interrupts = < 11 2 >;
reg = < 0x83e00000 0x10000 >;
reg-offset = <0x1003>;
reg-shift = <2>;
xlnx,family = "virtex5";
xlnx,has-external-rclk = <0x0>;
xlnx,has-external-xin = <0x0>;
xlnx,is-a-16550 = <0x1>;
} ;
SPI_EEPROM: xps-spi@feff8000 {
compatible = "xlnx,xps-spi-2.00.b";
interrupt-parent = <&xps_intc_0>;
interrupts = < 10 2 >;
reg = < 0xfeff8000 0x80 >;
xlnx,family = "virtex5";
xlnx,fifo-exist = <0x1>;
xlnx,num-ss-bits = <0x1>;
xlnx,num-transfer-bits = <0x8>;
xlnx,sck-ratio = <0x80>;
} ;
SysACE_CompactFlash: sysace@83600000 {
compatible = "xlnx,xps-sysace-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 7 2 >;
reg = < 0x83600000 0x10000 >;
xlnx,family = "virtex5";
xlnx,mem-width = <0x10>;
} ;
plbv46_pci_0: plbv46-pci@85e00000 {
#size-cells = <2>;
#address-cells = <3>;
compatible = "xlnx,plbv46-pci-1.03.a";
device_type = "pci";
reg = < 0x85e00000 0x10000 >;
# 350 "arch/powerpc/boot/dts/virtex440-ml510.dts"
ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
0x01000000 0 0x00000000 0xf0000000 0 0x00010000>;
#interrupt-cells = <1>;
interrupt-parent = <&xps_intc_0>;
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
interrupt-map = <
# 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
0x3000 0 0 1 &xps_intc_0 3 2
0x3000 0 0 2 &xps_intc_0 2 2
0x3000 0 0 3 &xps_intc_0 5 2
0x3000 0 0 4 &xps_intc_0 4 2
# 396 "arch/powerpc/boot/dts/virtex440-ml510.dts"
0x2800 0 0 1 &xps_intc_0 4 2
# 412 "arch/powerpc/boot/dts/virtex440-ml510.dts"
0x0800 0 0 1 &i8259 7 2
0x5800 0 0 1 &i8259 14 2
0x7800 0 0 1 &i8259 7 2
>;
ali_m1533 {
#size-cells = <1>;
#address-cells = <2>;
i8259: interrupt-controller@20 {
reg = <1 0x20 2
1 0xa0 2
1 0x4d0 2>;
interrupt-controller;
device_type = "interrupt-controller";
#address-cells = <0>;
#interrupt-cells = <2>;
compatible = "chrp,iic";
interrupts = <1 3>;
interrupt-parent = <&xps_intc_0>;
};
};
} ;
xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 {
compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
reg = < 0xffff0000 0x10000 >;
xlnx,family = "virtex5";
} ;
xps_intc_0: interrupt-controller@81800000 {
#interrupt-cells = <0x2>;
compatible = "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = < 0x81800000 0x10000 >;
xlnx,num-intr-inputs = <0xc>;
} ;
xps_tft_0: tft@86e00000 {
compatible = "xlnx,xps-tft-1.00.a";
reg = < 0x86e00000 0x10000 >;
xlnx,dcr-splb-slave-if = <0x1>;
xlnx,default-tft-base-addr = <0x0>;
xlnx,family = "virtex5";
xlnx,i2c-slave-addr = <0x76>;
xlnx,mplb-awidth = <0x20>;
xlnx,mplb-dwidth = <0x80>;
xlnx,mplb-native-dwidth = <0x40>;
xlnx,mplb-smallest-slave = <0x20>;
xlnx,tft-interface = <0x1>;
} ;
} ;
} ;
[-- Attachment #3: virtex440-ml510.dts --]
[-- Type: text/x-csrc, Size: 14474 bytes --]
/*
* Xilinx ML510 Reference Design support
*
* This DTS file was created for the ml510_bsb1_pcores_ppc440 reference design.
* The reference design contains a bug which prevent PCI DMA from working
* properly. A description of the bug is given in the plbv46_pci section. It
* needs to be fixed by the user until Xilinx updates their reference design.
*
* Copyright 2009, Roderick Colenbrander
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ml510-ref-design", "xlnx,virtex440";
dcr-parent = <&ppc440_0>;
DDR2_SDRAM_DIMM0: memory@0 {
device_type = "memory";
reg = < 0x0 0x20000000 >;
} ;
alias {
ethernet0 = &Hard_Ethernet_MAC;
serial0 = &RS232_Uart_1;
} ;
chosen {
bootargs = "console=ttyS0 root=/dev/ram";
linux,stdout-path = "/plb@0/serial@83e00000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x1>;
#size-cells = <0>;
ppc440_0: cpu@0 {
#address-cells = <1>;
#size-cells = <1>;
clock-frequency = <300000000>;
compatible = "PowerPC,440", "ibm,ppc440";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
dcr-access-method = "native";
dcr-controller ;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
model = "PowerPC,440";
reg = <0>;
timebase-frequency = <300000000>;
xlnx,apu-control = <0x2000>;
xlnx,apu-udi-0 = <0x0>;
xlnx,apu-udi-1 = <0x0>;
xlnx,apu-udi-10 = <0x0>;
xlnx,apu-udi-11 = <0x0>;
xlnx,apu-udi-12 = <0x0>;
xlnx,apu-udi-13 = <0x0>;
xlnx,apu-udi-14 = <0x0>;
xlnx,apu-udi-15 = <0x0>;
xlnx,apu-udi-2 = <0x0>;
xlnx,apu-udi-3 = <0x0>;
xlnx,apu-udi-4 = <0x0>;
xlnx,apu-udi-5 = <0x0>;
xlnx,apu-udi-6 = <0x0>;
xlnx,apu-udi-7 = <0x0>;
xlnx,apu-udi-8 = <0x0>;
xlnx,apu-udi-9 = <0x0>;
xlnx,dcr-autolock-enable = <0x1>;
xlnx,dcu-rd-ld-cache-plb-prio = <0x0>;
xlnx,dcu-rd-noncache-plb-prio = <0x0>;
xlnx,dcu-rd-touch-plb-prio = <0x0>;
xlnx,dcu-rd-urgent-plb-prio = <0x0>;
xlnx,dcu-wr-flush-plb-prio = <0x0>;
xlnx,dcu-wr-store-plb-prio = <0x0>;
xlnx,dcu-wr-urgent-plb-prio = <0x0>;
xlnx,dma0-control = <0x0>;
xlnx,dma0-plb-prio = <0x0>;
xlnx,dma0-rxchannelctrl = <0x1010000>;
xlnx,dma0-rxirqtimer = <0x3ff>;
xlnx,dma0-txchannelctrl = <0x1010000>;
xlnx,dma0-txirqtimer = <0x3ff>;
xlnx,dma1-control = <0x0>;
xlnx,dma1-plb-prio = <0x0>;
xlnx,dma1-rxchannelctrl = <0x1010000>;
xlnx,dma1-rxirqtimer = <0x3ff>;
xlnx,dma1-txchannelctrl = <0x1010000>;
xlnx,dma1-txirqtimer = <0x3ff>;
xlnx,dma2-control = <0x0>;
xlnx,dma2-plb-prio = <0x0>;
xlnx,dma2-rxchannelctrl = <0x1010000>;
xlnx,dma2-rxirqtimer = <0x3ff>;
xlnx,dma2-txchannelctrl = <0x1010000>;
xlnx,dma2-txirqtimer = <0x3ff>;
xlnx,dma3-control = <0x0>;
xlnx,dma3-plb-prio = <0x0>;
xlnx,dma3-rxchannelctrl = <0x1010000>;
xlnx,dma3-rxirqtimer = <0x3ff>;
xlnx,dma3-txchannelctrl = <0x1010000>;
xlnx,dma3-txirqtimer = <0x3ff>;
xlnx,endian-reset = <0x0>;
xlnx,generate-plb-timespecs = <0x1>;
xlnx,icu-rd-fetch-plb-prio = <0x0>;
xlnx,icu-rd-spec-plb-prio = <0x0>;
xlnx,icu-rd-touch-plb-prio = <0x0>;
xlnx,interconnect-imask = <0xffffffff>;
xlnx,mplb-allow-lock-xfer = <0x1>;
xlnx,mplb-arb-mode = <0x0>;
xlnx,mplb-awidth = <0x20>;
xlnx,mplb-counter = <0x500>;
xlnx,mplb-dwidth = <0x80>;
xlnx,mplb-max-burst = <0x8>;
xlnx,mplb-native-dwidth = <0x80>;
xlnx,mplb-p2p = <0x0>;
xlnx,mplb-prio-dcur = <0x2>;
xlnx,mplb-prio-dcuw = <0x3>;
xlnx,mplb-prio-icu = <0x4>;
xlnx,mplb-prio-splb0 = <0x1>;
xlnx,mplb-prio-splb1 = <0x0>;
xlnx,mplb-read-pipe-enable = <0x1>;
xlnx,mplb-sync-tattribute = <0x0>;
xlnx,mplb-wdog-enable = <0x1>;
xlnx,mplb-write-pipe-enable = <0x1>;
xlnx,mplb-write-post-enable = <0x1>;
xlnx,num-dma = <0x0>;
xlnx,pir = <0xf>;
xlnx,ppc440mc-addr-base = <0x0>;
xlnx,ppc440mc-addr-high = <0x1fffffff>;
xlnx,ppc440mc-arb-mode = <0x0>;
xlnx,ppc440mc-bank-conflict-mask = <0x1800000>;
xlnx,ppc440mc-control = <0xf810008f>;
xlnx,ppc440mc-max-burst = <0x8>;
xlnx,ppc440mc-prio-dcur = <0x2>;
xlnx,ppc440mc-prio-dcuw = <0x3>;
xlnx,ppc440mc-prio-icu = <0x4>;
xlnx,ppc440mc-prio-splb0 = <0x1>;
xlnx,ppc440mc-prio-splb1 = <0x0>;
xlnx,ppc440mc-row-conflict-mask = <0x7ffe00>;
xlnx,ppcdm-asyncmode = <0x0>;
xlnx,ppcds-asyncmode = <0x0>;
xlnx,user-reset = <0x0>;
} ;
} ;
plb_v46_0: plb@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
ranges ;
FLASH: flash@fc000000 {
bank-width = <2>;
compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
reg = < 0xfc000000 0x2000000 >;
xlnx,family = "virtex5";
xlnx,include-datawidth-matching-0 = <0x1>;
xlnx,include-datawidth-matching-1 = <0x0>;
xlnx,include-datawidth-matching-2 = <0x0>;
xlnx,include-datawidth-matching-3 = <0x0>;
xlnx,include-negedge-ioregs = <0x0>;
xlnx,include-plb-ipif = <0x1>;
xlnx,include-wrbuf = <0x1>;
xlnx,max-mem-width = <0x10>;
xlnx,mch-native-dwidth = <0x20>;
xlnx,mch-plb-clk-period-ps = <0x2710>;
xlnx,mch-splb-awidth = <0x20>;
xlnx,mch0-accessbuf-depth = <0x10>;
xlnx,mch0-protocol = <0x0>;
xlnx,mch0-rddatabuf-depth = <0x10>;
xlnx,mch1-accessbuf-depth = <0x10>;
xlnx,mch1-protocol = <0x0>;
xlnx,mch1-rddatabuf-depth = <0x10>;
xlnx,mch2-accessbuf-depth = <0x10>;
xlnx,mch2-protocol = <0x0>;
xlnx,mch2-rddatabuf-depth = <0x10>;
xlnx,mch3-accessbuf-depth = <0x10>;
xlnx,mch3-protocol = <0x0>;
xlnx,mch3-rddatabuf-depth = <0x10>;
xlnx,mem0-width = <0x10>;
xlnx,mem1-width = <0x20>;
xlnx,mem2-width = <0x20>;
xlnx,mem3-width = <0x20>;
xlnx,num-banks-mem = <0x1>;
xlnx,num-channels = <0x2>;
xlnx,priority-mode = <0x0>;
xlnx,synch-mem-0 = <0x0>;
xlnx,synch-mem-1 = <0x0>;
xlnx,synch-mem-2 = <0x0>;
xlnx,synch-mem-3 = <0x0>;
xlnx,synch-pipedelay-0 = <0x2>;
xlnx,synch-pipedelay-1 = <0x2>;
xlnx,synch-pipedelay-2 = <0x2>;
xlnx,synch-pipedelay-3 = <0x2>;
xlnx,tavdv-ps-mem-0 = <0x1adb0>;
xlnx,tavdv-ps-mem-1 = <0x3a98>;
xlnx,tavdv-ps-mem-2 = <0x3a98>;
xlnx,tavdv-ps-mem-3 = <0x3a98>;
xlnx,tcedv-ps-mem-0 = <0x1adb0>;
xlnx,tcedv-ps-mem-1 = <0x3a98>;
xlnx,tcedv-ps-mem-2 = <0x3a98>;
xlnx,tcedv-ps-mem-3 = <0x3a98>;
xlnx,thzce-ps-mem-0 = <0x88b8>;
xlnx,thzce-ps-mem-1 = <0x1b58>;
xlnx,thzce-ps-mem-2 = <0x1b58>;
xlnx,thzce-ps-mem-3 = <0x1b58>;
xlnx,thzoe-ps-mem-0 = <0x1b58>;
xlnx,thzoe-ps-mem-1 = <0x1b58>;
xlnx,thzoe-ps-mem-2 = <0x1b58>;
xlnx,thzoe-ps-mem-3 = <0x1b58>;
xlnx,tlzwe-ps-mem-0 = <0x88b8>;
xlnx,tlzwe-ps-mem-1 = <0x0>;
xlnx,tlzwe-ps-mem-2 = <0x0>;
xlnx,tlzwe-ps-mem-3 = <0x0>;
xlnx,twc-ps-mem-0 = <0x1adb0>;
xlnx,twc-ps-mem-1 = <0x3a98>;
xlnx,twc-ps-mem-2 = <0x3a98>;
xlnx,twc-ps-mem-3 = <0x3a98>;
xlnx,twp-ps-mem-0 = <0x11170>;
xlnx,twp-ps-mem-1 = <0x2ee0>;
xlnx,twp-ps-mem-2 = <0x2ee0>;
xlnx,twp-ps-mem-3 = <0x2ee0>;
xlnx,xcl0-linesize = <0x4>;
xlnx,xcl0-writexfer = <0x1>;
xlnx,xcl1-linesize = <0x4>;
xlnx,xcl1-writexfer = <0x1>;
xlnx,xcl2-linesize = <0x4>;
xlnx,xcl2-writexfer = <0x1>;
xlnx,xcl3-linesize = <0x4>;
xlnx,xcl3-writexfer = <0x1>;
} ;
Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,compound";
ethernet@81c00000 {
compatible = "xlnx,xps-ll-temac-1.01.b";
device_type = "network";
interrupt-parent = <&xps_intc_0>;
interrupts = < 8 2 >;
llink-connected = <&Hard_Ethernet_MAC_fifo>;
local-mac-address = [ 02 00 00 00 00 00 ];
reg = < 0x81c00000 0x40 >;
xlnx,bus2core-clk-ratio = <0x1>;
xlnx,phy-type = <0x3>;
xlnx,phyaddr = <0x1>;
xlnx,rxcsum = <0x0>;
xlnx,rxfifo = <0x8000>;
xlnx,temac-type = <0x0>;
xlnx,txcsum = <0x0>;
xlnx,txfifo = <0x8000>;
} ;
} ;
Hard_Ethernet_MAC_fifo: xps-ll-fifo@81a00000 {
compatible = "xlnx,xps-ll-fifo-1.01.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 6 2 >;
reg = < 0x81a00000 0x10000 >;
xlnx,family = "virtex5";
} ;
IIC_EEPROM: i2c@81600000 {
compatible = "xlnx,xps-iic-2.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 9 2 >;
reg = < 0x81600000 0x10000 >;
xlnx,clk-freq = <0x5f5e100>;
xlnx,family = "virtex5";
xlnx,gpo-width = <0x1>;
xlnx,iic-freq = <0x186a0>;
xlnx,scl-inertial-delay = <0x5>;
xlnx,sda-inertial-delay = <0x5>;
xlnx,ten-bit-adr = <0x0>;
} ;
LCD_OPTIONAL: gpio@81420000 {
compatible = "xlnx,xps-gpio-1.00.a";
reg = < 0x81420000 0x10000 >;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,family = "virtex5";
xlnx,gpio-width = <0xb>;
xlnx,interrupt-present = <0x0>;
xlnx,is-bidir = <0x1>;
xlnx,is-bidir-2 = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
} ;
LEDs_4Bit: gpio@81400000 {
compatible = "xlnx,xps-gpio-1.00.a";
reg = < 0x81400000 0x10000 >;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,family = "virtex5";
xlnx,gpio-width = <0x4>;
xlnx,interrupt-present = <0x0>;
xlnx,is-bidir = <0x1>;
xlnx,is-bidir-2 = <0x1>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
} ;
RS232_Uart_1: serial@83e00000 {
clock-frequency = <100000000>;
compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
current-speed = <9600>;
device_type = "serial";
interrupt-parent = <&xps_intc_0>;
interrupts = < 11 2 >;
reg = < 0x83e00000 0x10000 >;
reg-offset = <0x1003>;
reg-shift = <2>;
xlnx,family = "virtex5";
xlnx,has-external-rclk = <0x0>;
xlnx,has-external-xin = <0x0>;
xlnx,is-a-16550 = <0x1>;
} ;
SPI_EEPROM: xps-spi@feff8000 {
compatible = "xlnx,xps-spi-2.00.b";
interrupt-parent = <&xps_intc_0>;
interrupts = < 10 2 >;
reg = < 0xfeff8000 0x80 >;
xlnx,family = "virtex5";
xlnx,fifo-exist = <0x1>;
xlnx,num-ss-bits = <0x1>;
xlnx,num-transfer-bits = <0x8>;
xlnx,sck-ratio = <0x80>;
} ;
SysACE_CompactFlash: sysace@83600000 {
compatible = "xlnx,xps-sysace-1.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 7 2 >;
reg = < 0x83600000 0x10000 >;
xlnx,family = "virtex5";
xlnx,mem-width = <0x10>;
} ;
plbv46_pci_0: plbv46-pci@85e00000 {
#size-cells = <2>;
#address-cells = <3>;
compatible = "xlnx,plbv46-pci-1.03.a";
device_type = "pci";
reg = < 0x85e00000 0x10000 >;
/*
* The default ML510 BSB has C_IPIFBAR2PCIBAR_0 set to
* 0 which means that a read/write to the memory mapped
* i/o region (which starts at 0xa0000000) for pci
* bar 0 on the plb side translates to 0.
* It is important to set this value to 0xa0000000, so
* that inbound and outbound pci transactions work
* properly including DMA.
*/
ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
0x01000000 0 0x00000000 0xf0000000 0 0x00010000>;
#interrupt-cells = <1>;
interrupt-parent = <&xps_intc_0>;
interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
interrupt-map = <
/* IRQ mapping for pci slots and ALI M1533
* periperhals. In total there are 5 interrupt
* lines connected to a xps_intc controller.
* Four of them are PCI IRQ A, B, C, D and
* which correspond to respectively xpx_intc
* 5, 4, 3 and 2. The fifth interrupt line is
* connected to the south bridge and this one
* uses irq 1 and is active high instead of
* active low.
*
* The M1533 contains various peripherals
* including AC97 audio, a modem, USB, IDE and
* some power management stuff. The modem
* isn't connected on the ML510 and the power
* management core also isn't used.
*/
/* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
0x3000 0 0 1 &xps_intc_0 3 2
0x3000 0 0 2 &xps_intc_0 2 2
0x3000 0 0 3 &xps_intc_0 5 2
0x3000 0 0 4 &xps_intc_0 4 2
/* IDSEL 0x13 / dev=3, bus=1 / PCI slot 4 */
/*
0x11800 0 0 1 &xps_intc_0 5 0 2
0x11800 0 0 2 &xps_intc_0 4 0 2
0x11800 0 0 3 &xps_intc_0 3 0 2
0x11800 0 0 4 &xps_intc_0 2 0 2
*/
/* According to the datasheet + schematic
* ABCD [FPGA] of slot 5 is mapped to DABC.
* Testing showed that at least A maps to B,
* the mapping of the other pins is a guess
* and for that reason the lines have been
* commented out.
*/
/* IDSEL 0x15 / dev=5, bus=0 / PCI slot 5 */
0x2800 0 0 1 &xps_intc_0 4 2
/*
0x2800 0 0 2 &xps_intc_0 3 2
0x2800 0 0 3 &xps_intc_0 2 2
0x2800 0 0 4 &xps_intc_0 5 2
*/
/* IDSEL 0x12 / dev=2, bus=1 / PCI slot 6 */
/*
0x11000 0 0 1 &xps_intc_0 4 0 2
0x11000 0 0 2 &xps_intc_0 3 0 2
0x11000 0 0 3 &xps_intc_0 2 0 2
0x11000 0 0 4 &xps_intc_0 5 0 2
*/
/* IDSEL 0x11 / dev=1, bus=0 / AC97 audio */
0x0800 0 0 1 &i8259 7 2
/* IDSEL 0x1b / dev=11, bus=0 / IDE */
0x5800 0 0 1 &i8259 14 2
/* IDSEL 0x1f / dev 15, bus=0 / 2x USB 1.1 */
0x7800 0 0 1 &i8259 7 2
>;
ali_m1533 {
#size-cells = <1>;
#address-cells = <2>;
i8259: interrupt-controller@20 {
reg = <1 0x20 2
1 0xa0 2
1 0x4d0 2>;
interrupt-controller;
device_type = "interrupt-controller";
#address-cells = <0>;
#interrupt-cells = <2>;
compatible = "chrp,iic";
/* south bridge irq is active high */
interrupts = <1 3>;
interrupt-parent = <&xps_intc_0>;
};
};
} ;
xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 {
compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
reg = < 0xffff0000 0x10000 >;
xlnx,family = "virtex5";
} ;
xps_intc_0: interrupt-controller@81800000 {
#interrupt-cells = <0x2>;
compatible = "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = < 0x81800000 0x10000 >;
xlnx,num-intr-inputs = <0xc>;
} ;
xps_tft_0: tft@86e00000 {
compatible = "xlnx,xps-tft-1.00.a";
reg = < 0x86e00000 0x10000 >;
xlnx,dcr-splb-slave-if = <0x1>;
xlnx,default-tft-base-addr = <0x0>;
xlnx,family = "virtex5";
xlnx,i2c-slave-addr = <0x76>;
xlnx,mplb-awidth = <0x20>;
xlnx,mplb-dwidth = <0x80>;
xlnx,mplb-native-dwidth = <0x40>;
xlnx,mplb-smallest-slave = <0x20>;
xlnx,tft-interface = <0x1>;
} ;
} ;
} ;
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Ian Campbell @ 2013-05-31 13:16 UTC (permalink / raw)
To: Jon Loeliger
Cc: Michal Marek, Stephen Warren, linux-kbuild, linux-kernel,
Rob Herring, linuxppc-dev
In-Reply-To: <E1UiOxz-0004ET-RE@jdl.com>
On Fri, 2013-05-31 at 08:01 -0500, Jon Loeliger wrote:
> Hrm. Is this a "that's not in the kernel's copy yet" problem?
BTW I'm using dtc.git 4e76ec796c90d44d417f82d9db2d67cfe575f8ed and not
the kernel copy.
dtc-lexer.l in my HEAD is identical to the current master
(2e3fc7e9b3a4722a5500afaa9faf7874c61b2e6a) according to git diff.
Ian.
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Jon Loeliger @ 2013-05-31 13:01 UTC (permalink / raw)
To: Grant Likely
Cc: Michal Marek, Stephen Warren, Ian Campbell, linux-kbuild,
linux-kernel, Rob Herring, linuxppc-dev
In-Reply-To: <20130531114824.60D223E0901@localhost>
> >
> > Line 374 is the "IDSEL 0x16..." line here:
> > interrupt-map = <
> > /* IRQ mapping for pci slots and ALI M1533
> > ...
> > * management core also isn't used.
> > */
> >
> > /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
> > 0x3000 0 0 1 &xps_intc_0 3 2
> > 0x3000 0 0 2 &xps_intc_0 2 2
> > 0x3000 0 0 3 &xps_intc_0 5 2
> > 0x3000 0 0 4 &xps_intc_0 4 2
Can you show me the original source without mods here, please?
Or is the "..." purely elided comments?
> > Which gets preprocessed into:
> > interrupt-map = <
> > # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
> > 0x3000 0 0 1 &xps_intc_0 3 2
> > 0x3000 0 0 2 &xps_intc_0 2 2
> > 0x3000 0 0 3 &xps_intc_0 5 2
> > 0x3000 0 0 4 &xps_intc_0 4 2
> dtc is only able to track line numbers when the native /include/
> directive is used. The #include directive doesn't help it. It should be
> added, but until it is the following patch solves the problem:
It's supposed to do better than that, I think.
This, from dtc-lexer.l
<*>^"#"(line)?{WS}+[0-9]+{WS}+{STRING}({WS}+[0-9]+)? {
char *line, *tmp, *fn;
/* skip text before line # */
line = yytext;
while (!isdigit(*line))
line++;
/* skip digits in line # */
tmp = line;
while (!isspace(*tmp))
tmp++;
/* "NULL"-terminate line # */
*tmp = '\0';
/* start of filename */
fn = strchr(tmp + 1, '"') + 1;
/* strip trailing " from filename */
tmp = strchr(fn, '"');
*tmp = 0;
/* -1 since #line is the number of the next line */
srcpos_set_line(xstrdup(fn), atoi(line) - 1);
}
Hrm. Is this a "that's not in the kernel's copy yet" problem?
Or did this fail to match the offending '# <line> <file>' somehow?
(Like, is that '# 375' really in column 1?)
Thanks,
jdl
^ permalink raw reply
* Re: 3.10-rc ppc64 corrupts usermem when swapping
From: Hugh Dickins @ 2013-05-31 14:45 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Anton Blanchard, Paul Mackerras, Aneesh Kumar K.V,
David Gibson
In-Reply-To: <1369978262.3928.111.camel@pasglop>
On Fri, 31 May 2013, Benjamin Herrenschmidt wrote:
> On Thu, 2013-05-30 at 22:05 -0700, Hugh Dickins wrote:
> > > Sure, it's now under way. If all goes well, I'll give you a
> > > progress report in about 15 hours time; but given the variance in
> > > how long it took to hit, I won't feel fully confident until this
> > > time tomorrow, when I'll update you again.
> >
> > Still running fine. I'll leave it running a few more hours to make
> > sure, and then try switching to the patch Aneesh sent afterwards -
> > or say if you'd prefer me to switch over to that one immediately.
>
> The patch you are running on is what I'll send to Linus for 3.10 (+/-
> cosmetics). Aneesh second patch is a much larger rework which will be
> needed for THP but that will wait for 3.11. I'm happy for you to test it
> but I first want to make sure it's solid with the 3.10 fix :-)
That makes sense.
The first patch ran fine without incident for 25 hours, I say it's good.
I've now stopped that run and started another with the second patch in.
Hugh
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Stephen Warren @ 2013-05-31 16:04 UTC (permalink / raw)
To: Grant Likely
Cc: Michal Marek, JonLoeliger, Stephen Warren, Ian Campbell,
linux-kbuild, linux-kernel, Rob Herring, linuxppc-dev
In-Reply-To: <20130531114824.60D223E0901@localhost>
On 05/31/2013 05:48 AM, Grant Likely wrote:
> On Fri, 31 May 2013 11:29:30 +0100, Ian Campbell <Ian.Campbell@citrix.com> wrote:
>> This affects arch/powerpc/boot/dts/virtex440-ml510.dts but I think it is
>> actually a more general issue:
>>
>> $ make ARCH=powerpc CROSS_COMPILE=powerpc-linux- virtex440-ml510.dtb
>> CC scripts/mod/devicetable-offsets.s
>> GEN scripts/mod/devicetable-offsets.h
>> HOSTCC scripts/mod/file2alias.o
>> HOSTLD scripts/mod/modpost
>> DTC arch/powerpc/boot/virtex440-ml510.dtb
>> Error: arch/powerpc/boot/dts/virtex440-ml510.dts:374.6-7 syntax error
>> FATAL ERROR: Unable to parse input tree
>> make[1]: *** [arch/powerpc/boot/virtex440-ml510.dtb] Error 1
>> make: *** [virtex440-ml510.dtb] Error 2
>>
>> Line 374 is the "IDSEL 0x16..." line here:
>> interrupt-map = <
>> /* IRQ mapping for pci slots and ALI M1533
>> ...
>> * management core also isn't used.
>> */
>>
>> /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
>> 0x3000 0 0 1 &xps_intc_0 3 2
>> 0x3000 0 0 2 &xps_intc_0 2 2
>> 0x3000 0 0 3 &xps_intc_0 5 2
>> 0x3000 0 0 4 &xps_intc_0 4 2
>>
>> Which gets preprocessed into:
>> interrupt-map = <
>> # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
>> 0x3000 0 0 1 &xps_intc_0 3 2
>> 0x3000 0 0 2 &xps_intc_0 2 2
>> 0x3000 0 0 3 &xps_intc_0 5 2
>> 0x3000 0 0 4 &xps_intc_0 4 2
>>
>> If I manually remove the "# 375 " line then that fixes the error
>> (although there is then a subsequent one of the same type).
>>
>> I suppose this is a bug in dtc? It appears to have at least some
>> awareness of these preprocessor line number comments since it manages to
>> report the original source line number.
>
> dtc is only able to track line numbers when the native /include/
> directive is used. The #include directive doesn't help it. It should be
> added, but until it is the following patch solves the problem:
>
> I've got this patch in my tree. Either Rob or I will push it to Linus in
> the next few days.
>
> g.
>
> ---
> commit d01dccdcb3ea8233b09efb9c24db9f057fbd3b37
> Author: Grant Likely <grant.likely@linaro.org>
> Date: Fri May 31 12:45:18 2013 +0100
>
> dtc: Suppress cpp linemarker annotations
>
> DTC isn't able to parse cpp linemarker annotations, so suppress them in
> the cpp output by adding the -P flag to the cpp options.
That's not true; it explicitly does have code to parse the line markers.
I'll have to investigate why it isn't working in this case.
If you apply this patch, then anyone who has switched to #include rther
than /include/ will get incorrect line numbers in dtc error messages.
Admittedly that's a smaller population right now though. Perhaps we
should just do a kernel-wide conversion though.
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Grant Likely @ 2013-05-31 16:31 UTC (permalink / raw)
To: Stephen Warren
Cc: Michal Marek, JonLoeliger, Stephen Warren, Ian Campbell,
linux-kbuild, linux-kernel, Rob Herring,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <51A8CA15.4070504@wwwdotorg.org>
On Fri, May 31, 2013 at 5:04 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 05/31/2013 05:48 AM, Grant Likely wrote:
>> On Fri, 31 May 2013 11:29:30 +0100, Ian Campbell <Ian.Campbell@citrix.com> wrote:
>>> This affects arch/powerpc/boot/dts/virtex440-ml510.dts but I think it is
>>> actually a more general issue:
>>>
>>> $ make ARCH=powerpc CROSS_COMPILE=powerpc-linux- virtex440-ml510.dtb
>>> CC scripts/mod/devicetable-offsets.s
>>> GEN scripts/mod/devicetable-offsets.h
>>> HOSTCC scripts/mod/file2alias.o
>>> HOSTLD scripts/mod/modpost
>>> DTC arch/powerpc/boot/virtex440-ml510.dtb
>>> Error: arch/powerpc/boot/dts/virtex440-ml510.dts:374.6-7 syntax error
>>> FATAL ERROR: Unable to parse input tree
>>> make[1]: *** [arch/powerpc/boot/virtex440-ml510.dtb] Error 1
>>> make: *** [virtex440-ml510.dtb] Error 2
>>>
>>> Line 374 is the "IDSEL 0x16..." line here:
>>> interrupt-map = <
>>> /* IRQ mapping for pci slots and ALI M1533
>>> ...
>>> * management core also isn't used.
>>> */
>>>
>>> /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */
>>> 0x3000 0 0 1 &xps_intc_0 3 2
>>> 0x3000 0 0 2 &xps_intc_0 2 2
>>> 0x3000 0 0 3 &xps_intc_0 5 2
>>> 0x3000 0 0 4 &xps_intc_0 4 2
>>>
>>> Which gets preprocessed into:
>>> interrupt-map = <
>>> # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
>>> 0x3000 0 0 1 &xps_intc_0 3 2
>>> 0x3000 0 0 2 &xps_intc_0 2 2
>>> 0x3000 0 0 3 &xps_intc_0 5 2
>>> 0x3000 0 0 4 &xps_intc_0 4 2
>>>
>>> If I manually remove the "# 375 " line then that fixes the error
>>> (although there is then a subsequent one of the same type).
>>>
>>> I suppose this is a bug in dtc? It appears to have at least some
>>> awareness of these preprocessor line number comments since it manages to
>>> report the original source line number.
>>
>> dtc is only able to track line numbers when the native /include/
>> directive is used. The #include directive doesn't help it. It should be
>> added, but until it is the following patch solves the problem:
>>
>> I've got this patch in my tree. Either Rob or I will push it to Linus in
>> the next few days.
>>
>> g.
>>
>> ---
>> commit d01dccdcb3ea8233b09efb9c24db9f057fbd3b37
>> Author: Grant Likely <grant.likely@linaro.org>
>> Date: Fri May 31 12:45:18 2013 +0100
>>
>> dtc: Suppress cpp linemarker annotations
>>
>> DTC isn't able to parse cpp linemarker annotations, so suppress them in
>> the cpp output by adding the -P flag to the cpp options.
>
> That's not true; it explicitly does have code to parse the line markers.
> I'll have to investigate why it isn't working in this case.
>
> If you apply this patch, then anyone who has switched to #include rther
> than /include/ will get incorrect line numbers in dtc error messages.
> Admittedly that's a smaller population right now though. Perhaps we
> should just do a kernel-wide conversion though.
My mistake. I tested the wrong thing. I've dropped the patch.
g.
^ permalink raw reply
* Re: DTB build failure due to preproccessing
From: Stephen Warren @ 2013-05-31 16:37 UTC (permalink / raw)
To: Ian Campbell
Cc: Michal Marek, JonLoeliger, Stephen Warren, linux-kbuild,
linux-kernel, Rob Herring, linuxppc-dev
In-Reply-To: <1369996170.5199.68.camel@zakaz.uk.xensource.com>
On 05/31/2013 04:29 AM, Ian Campbell wrote:
> This affects arch/powerpc/boot/dts/virtex440-ml510.dts but I think it is
> actually a more general issue:
>
> $ make ARCH=powerpc CROSS_COMPILE=powerpc-linux- virtex440-ml510.dtb
> CC scripts/mod/devicetable-offsets.s
> GEN scripts/mod/devicetable-offsets.h
> HOSTCC scripts/mod/file2alias.o
> HOSTLD scripts/mod/modpost
> DTC arch/powerpc/boot/virtex440-ml510.dtb
> Error: arch/powerpc/boot/dts/virtex440-ml510.dts:374.6-7 syntax error
> FATAL ERROR: Unable to parse input tree
> make[1]: *** [arch/powerpc/boot/virtex440-ml510.dtb] Error 1
> make: *** [virtex440-ml510.dtb] Error 2
...
> interrupt-map = <
> # 375 "arch/powerpc/boot/dts/virtex440-ml510.dts"
> 0x3000 0 0 1 &xps_intc_0 3 2
> 0x3000 0 0 2 &xps_intc_0 2 2
> 0x3000 0 0 3 &xps_intc_0 5 2
> 0x3000 0 0 4 &xps_intc_0 4 2
I /think/ what's happening here is that dtc's rule for #line parsing
allows the formats:
# LINE FILENAME
or:
#LINE FILENAME FLAGS
where FLAGS is an integer
The lexer rule that optionally consumes flags requires some WS
(white-space) between the filename and flags. It looks like this
whitespace can actually cross a line boundary, so it ends up consuming
the first "0" of the hex constant on the next line, which then leaves
"x3000" to be parsed as cell data, which is a syntax error.
You can hack around this for testing by doing one of a few things:
a) Add an extra integer on to the end of the problematic #line directives.
b) Remove the leading "0x" from the constants following the #line
directives. I think this will still mean dtc eats the 3000 as part of
the #line directive, but hides the syntax error.
The solution here is to make dtc's #line matching regex:
<*>^"#"(line)?{WS}+[0-9]+{WS}+{STRING}({WS}+[0-9]+)? {
... use someting other than {WS} in the final instance; some kind of
{WS} that won't match/cross line boundaries. I'll see if I can cook up a
patch for this.
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox