* [PATCH][RFC][v2] pci: fsl: rework PCIe driver compatible with Layerscape
From: Minghuan Lian @ 2013-08-28 10:42 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Minghuan Lian, Zang Roy-R61911
The Freescale's Layerscape series processors will use ARM cores.
The LS1's PCIe controllers is the same as T4240's. So it's better
the PCIe controller driver can support PowerPC and ARM
simultaneously. This patch is for this purpose. It derives
the common functions from arch/powerpc/sysdev/fsl_pci.c to
drivers/pci/host/pcie-fsl.c and leaves several platform-dependent
functions which should be implemented in platform files.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
---
Based on upstream master 3.11-rc7
The function has been tested on MPC8315ERDB MPC8572DS P5020DS P3041DS
and T4240QDS boards
Change log:
v2:
1. Use 'pci' instead of 'pcie' in new file name and file contents.
2. Use iowrite32be()/iowrite32() instead of out_be32/le32()
3. Fix ppc_md.dma_set_mask setting
4. Synchronizes host->first_busno and pci->first_busno.
5. Fix PCI IO space settings
6. Some small changes according to Scott's comments.
arch/powerpc/Kconfig | 1 +
arch/powerpc/sysdev/fsl_pci.c | 610 ++++-------------
arch/powerpc/sysdev/fsl_pci.h | 91 ---
drivers/edac/mpc85xx_edac.c | 10 -
drivers/pci/host/Kconfig | 4 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-fsl.c | 736 +++++++++++++++++++++
.../sysdev/fsl_pci.h => include/linux/fsl/pci.h | 107 ++-
8 files changed, 932 insertions(+), 628 deletions(-)
create mode 100644 drivers/pci/host/pci-fsl.c
copy arch/powerpc/sysdev/fsl_pci.h => include/linux/fsl/pci.h (67%)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9cf59816d..f78484c 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -671,6 +671,7 @@ config FSL_SOC
config FSL_PCI
bool
+ select PCI_FSL if FSL_SOC_BOOKE || PPC_86xx
select PPC_INDIRECT_PCI
select PCI_QUIRKS
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..b3ff28b 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
/*
* MPC83xx/85xx/86xx PCI/PCIE support routing.
*
- * Copyright 2007-2012 Freescale Semiconductor, Inc.
+ * Copyright 2007-2013 Freescale Semiconductor, Inc.
* Copyright 2008-2009 MontaVista Software, Inc.
*
* Initial author: Xianghua Xiao <x.xiao@freescale.com>
@@ -26,6 +26,7 @@
#include <linux/memblock.h>
#include <linux/log2.h>
#include <linux/slab.h>
+#include <linux/fsl/pci.h>
#include <asm/io.h>
#include <asm/prom.h>
@@ -54,60 +55,17 @@ static void quirk_fsl_pcie_header(struct pci_dev *dev)
return;
}
-static int fsl_indirect_read_config(struct pci_bus *, unsigned int,
- int, int, u32 *);
-
-static int fsl_pcie_check_link(struct pci_controller *hose)
-{
- u32 val = 0;
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pcie_header);
- if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) {
- if (hose->ops->read == fsl_indirect_read_config) {
- struct pci_bus bus;
- bus.number = 0;
- bus.sysdata = hose;
- bus.ops = hose->ops;
- indirect_read_config(&bus, 0, PCIE_LTSSM, 4, &val);
- } else
- early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
- if (val < PCIE_LTSSM_L0)
- return 1;
- } else {
- struct ccsr_pci __iomem *pci = hose->private_data;
- /* for PCIe IP rev 3.0 or greater use CSR0 for link state */
- val = (in_be32(&pci->pex_csr0) & PEX_CSR0_LTSSM_MASK)
- >> PEX_CSR0_LTSSM_SHIFT;
- if (val != PEX_CSR0_LTSSM_L0)
- return 1;
- }
+#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
- return 0;
-}
+#define MAX_PHYS_ADDR_BITS 40
-static int fsl_indirect_read_config(struct pci_bus *bus, unsigned int devfn,
- int offset, int len, u32 *val)
+u64 fsl_pci64_dma_offset(void)
{
- struct pci_controller *hose = pci_bus_to_host(bus);
-
- if (fsl_pcie_check_link(hose))
- hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
- else
- hose->indirect_type &= ~PPC_INDIRECT_TYPE_NO_PCIE_LINK;
-
- return indirect_read_config(bus, devfn, offset, len, val);
+ return 1ull << MAX_PHYS_ADDR_BITS;
}
-#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
-
-static struct pci_ops fsl_indirect_pcie_ops =
-{
- .read = fsl_indirect_read_config,
- .write = indirect_write_config,
-};
-
-#define MAX_PHYS_ADDR_BITS 40
-static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS;
-
static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
{
if (!dev->dma_mask || !dma_supported(dev, dma_mask))
@@ -121,300 +79,43 @@ static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
if ((dev->bus == &pci_bus_type) &&
dma_mask >= DMA_BIT_MASK(MAX_PHYS_ADDR_BITS)) {
set_dma_ops(dev, &dma_direct_ops);
- set_dma_offset(dev, pci64_dma_offset);
+ set_dma_offset(dev, fsl_pci64_dma_offset());
}
*dev->dma_mask = dma_mask;
return 0;
}
-static int setup_one_atmu(struct ccsr_pci __iomem *pci,
- unsigned int index, const struct resource *res,
- resource_size_t offset)
+struct fsl_pci *fsl_sys_to_pci(void *sys)
{
- resource_size_t pci_addr = res->start - offset;
- resource_size_t phys_addr = res->start;
- resource_size_t size = resource_size(res);
- u32 flags = 0x80044000; /* enable & mem R/W */
- unsigned int i;
+ struct pci_controller *hose = sys;
+ struct fsl_pci *pci = hose->private_data;
- pr_debug("PCI MEM resource start 0x%016llx, size 0x%016llx.\n",
- (u64)res->start, (u64)size);
+ /* Update the first bus number */
+ if (pci->first_busno != hose->first_busno)
+ pci->first_busno = hose->first_busno;
- if (res->flags & IORESOURCE_PREFETCH)
- flags |= 0x10000000; /* enable relaxed ordering */
-
- for (i = 0; size > 0; i++) {
- unsigned int bits = min(ilog2(size),
- __ffs(pci_addr | phys_addr));
-
- if (index + i >= 5)
- return -1;
-
- out_be32(&pci->pow[index + i].potar, pci_addr >> 12);
- out_be32(&pci->pow[index + i].potear, (u64)pci_addr >> 44);
- out_be32(&pci->pow[index + i].powbar, phys_addr >> 12);
- out_be32(&pci->pow[index + i].powar, flags | (bits - 1));
-
- pci_addr += (resource_size_t)1U << bits;
- phys_addr += (resource_size_t)1U << bits;
- size -= (resource_size_t)1U << bits;
- }
-
- return i;
+ return pci;
}
-/* atmu setup for fsl pci/pcie controller */
-static void setup_pci_atmu(struct pci_controller *hose)
+struct pci_bus *fsl_fake_pci_bus(struct fsl_pci *pci, int busnr)
{
- struct ccsr_pci __iomem *pci = hose->private_data;
- int i, j, n, mem_log, win_idx = 3, start_idx = 1, end_idx = 4;
- u64 mem, sz, paddr_hi = 0;
- u64 offset = 0, paddr_lo = ULLONG_MAX;
- u32 pcicsrbar = 0, pcicsrbar_sz;
- u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL |
- PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
- const char *name = hose->dn->full_name;
- const u64 *reg;
- int len;
-
- if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
- if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) {
- win_idx = 2;
- start_idx = 0;
- end_idx = 3;
- }
- }
-
- /* Disable all windows (except powar0 since it's ignored) */
- for(i = 1; i < 5; i++)
- out_be32(&pci->pow[i].powar, 0);
- for (i = start_idx; i < end_idx; i++)
- out_be32(&pci->piw[i].piwar, 0);
-
- /* Setup outbound MEM window */
- for(i = 0, j = 1; i < 3; i++) {
- if (!(hose->mem_resources[i].flags & IORESOURCE_MEM))
- continue;
-
- paddr_lo = min(paddr_lo, (u64)hose->mem_resources[i].start);
- paddr_hi = max(paddr_hi, (u64)hose->mem_resources[i].end);
-
- /* We assume all memory resources have the same offset */
- offset = hose->mem_offset[i];
- n = setup_one_atmu(pci, j, &hose->mem_resources[i], offset);
-
- if (n < 0 || j >= 5) {
- pr_err("Ran out of outbound PCI ATMUs for resource %d!\n", i);
- hose->mem_resources[i].flags |= IORESOURCE_DISABLED;
- } else
- j += n;
- }
-
- /* Setup outbound IO window */
- if (hose->io_resource.flags & IORESOURCE_IO) {
- if (j >= 5) {
- pr_err("Ran out of outbound PCI ATMUs for IO resource\n");
- } else {
- pr_debug("PCI IO resource start 0x%016llx, size 0x%016llx, "
- "phy base 0x%016llx.\n",
- (u64)hose->io_resource.start,
- (u64)resource_size(&hose->io_resource),
- (u64)hose->io_base_phys);
- out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12));
- out_be32(&pci->pow[j].potear, 0);
- out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12));
- /* Enable, IO R/W */
- out_be32(&pci->pow[j].powar, 0x80088000
- | (ilog2(hose->io_resource.end
- - hose->io_resource.start + 1) - 1));
- }
- }
-
- /* convert to pci address space */
- paddr_hi -= offset;
- paddr_lo -= offset;
-
- if (paddr_hi == paddr_lo) {
- pr_err("%s: No outbound window space\n", name);
- return;
- }
-
- if (paddr_lo == 0) {
- pr_err("%s: No space for inbound window\n", name);
- return;
- }
+ static struct pci_bus bus;
+ static struct pci_controller hose;
- /* setup PCSRBAR/PEXCSRBAR */
- early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, 0xffffffff);
- early_read_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, &pcicsrbar_sz);
- pcicsrbar_sz = ~pcicsrbar_sz + 1;
+ bus.number = busnr;
+ bus.sysdata = &hose;
+ hose.private_data = pci;
+ bus.ops = pci->ops;
- if (paddr_hi < (0x100000000ull - pcicsrbar_sz) ||
- (paddr_lo > 0x100000000ull))
- pcicsrbar = 0x100000000ull - pcicsrbar_sz;
- else
- pcicsrbar = (paddr_lo - pcicsrbar_sz) & -pcicsrbar_sz;
- early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, pcicsrbar);
-
- paddr_lo = min(paddr_lo, (u64)pcicsrbar);
-
- pr_info("%s: PCICSRBAR @ 0x%x\n", name, pcicsrbar);
-
- /* Setup inbound mem window */
- mem = memblock_end_of_DRAM();
-
- /*
- * The msi-address-64 property, if it exists, indicates the physical
- * address of the MSIIR register. Normally, this register is located
- * inside CCSR, so the ATMU that covers all of CCSR is used. But if
- * this property exists, then we normally need to create a new ATMU
- * for it. For now, however, we cheat. The only entity that creates
- * this property is the Freescale hypervisor, and the address is
- * specified in the partition configuration. Typically, the address
- * is located in the page immediately after the end of DDR. If so, we
- * can avoid allocating a new ATMU by extending the DDR ATMU by one
- * page.
- */
- reg = of_get_property(hose->dn, "msi-address-64", &len);
- if (reg && (len == sizeof(u64))) {
- u64 address = be64_to_cpup(reg);
-
- if ((address >= mem) && (address < (mem + PAGE_SIZE))) {
- pr_info("%s: extending DDR ATMU to cover MSIIR", name);
- mem += PAGE_SIZE;
- } else {
- /* TODO: Create a new ATMU for MSIIR */
- pr_warn("%s: msi-address-64 address of %llx is "
- "unsupported\n", name, address);
- }
- }
-
- sz = min(mem, paddr_lo);
- mem_log = ilog2(sz);
-
- /* PCIe can overmap inbound & outbound since RX & TX are separated */
- if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
- /* Size window to exact size if power-of-two or one size up */
- if ((1ull << mem_log) != mem) {
- if ((1ull << mem_log) > mem)
- pr_info("%s: Setting PCI inbound window "
- "greater than memory size\n", name);
- mem_log++;
- }
-
- piwar |= ((mem_log - 1) & PIWAR_SZ_MASK);
-
- /* Setup inbound memory window */
- out_be32(&pci->piw[win_idx].pitar, 0x00000000);
- out_be32(&pci->piw[win_idx].piwbar, 0x00000000);
- out_be32(&pci->piw[win_idx].piwar, piwar);
- win_idx--;
-
- hose->dma_window_base_cur = 0x00000000;
- hose->dma_window_size = (resource_size_t)sz;
-
- /*
- * if we have >4G of memory setup second PCI inbound window to
- * let devices that are 64-bit address capable to work w/o
- * SWIOTLB and access the full range of memory
- */
- if (sz != mem) {
- mem_log = ilog2(mem);
-
- /* Size window up if we dont fit in exact power-of-2 */
- if ((1ull << mem_log) != mem)
- mem_log++;
-
- piwar = (piwar & ~PIWAR_SZ_MASK) | (mem_log - 1);
-
- /* Setup inbound memory window */
- out_be32(&pci->piw[win_idx].pitar, 0x00000000);
- out_be32(&pci->piw[win_idx].piwbear,
- pci64_dma_offset >> 44);
- out_be32(&pci->piw[win_idx].piwbar,
- pci64_dma_offset >> 12);
- out_be32(&pci->piw[win_idx].piwar, piwar);
-
- /*
- * install our own dma_set_mask handler to fixup dma_ops
- * and dma_offset
- */
- ppc_md.dma_set_mask = fsl_pci_dma_set_mask;
-
- pr_info("%s: Setup 64-bit PCI DMA window\n", name);
- }
- } else {
- u64 paddr = 0;
-
- /* Setup inbound memory window */
- out_be32(&pci->piw[win_idx].pitar, paddr >> 12);
- out_be32(&pci->piw[win_idx].piwbar, paddr >> 12);
- out_be32(&pci->piw[win_idx].piwar, (piwar | (mem_log - 1)));
- win_idx--;
-
- paddr += 1ull << mem_log;
- sz -= 1ull << mem_log;
-
- if (sz) {
- mem_log = ilog2(sz);
- piwar |= (mem_log - 1);
-
- out_be32(&pci->piw[win_idx].pitar, paddr >> 12);
- out_be32(&pci->piw[win_idx].piwbar, paddr >> 12);
- out_be32(&pci->piw[win_idx].piwar, piwar);
- win_idx--;
-
- paddr += 1ull << mem_log;
- }
-
- hose->dma_window_base_cur = 0x00000000;
- hose->dma_window_size = (resource_size_t)paddr;
- }
-
- if (hose->dma_window_size < mem) {
-#ifndef CONFIG_SWIOTLB
- pr_err("%s: ERROR: Memory size exceeds PCI ATMU ability to "
- "map - enable CONFIG_SWIOTLB to avoid dma errors.\n",
- name);
-#endif
- /* adjusting outbound windows could reclaim space in mem map */
- if (paddr_hi < 0xffffffffull)
- pr_warning("%s: WARNING: Outbound window cfg leaves "
- "gaps in memory map. Adjusting the memory map "
- "could reduce unnecessary bounce buffering.\n",
- name);
-
- pr_info("%s: DMA window size is 0x%llx\n", name,
- (u64)hose->dma_window_size);
- }
-}
-
-static void __init setup_pci_cmd(struct pci_controller *hose)
-{
- u16 cmd;
- int cap_x;
-
- early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
- | PCI_COMMAND_IO;
- early_write_config_word(hose, 0, 0, PCI_COMMAND, cmd);
-
- cap_x = early_find_capability(hose, 0, 0, PCI_CAP_ID_PCIX);
- if (cap_x) {
- int pci_x_cmd = cap_x + PCI_X_CMD;
- cmd = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
- | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
- early_write_config_word(hose, 0, 0, pci_x_cmd, cmd);
- } else {
- early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80);
- }
+ return &bus;
}
void fsl_pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_controller *hose = pci_bus_to_host(bus);
- int i, is_pcie = 0, no_link;
+ int i, is_pcie, no_link;
+ struct fsl_pci *pci = fsl_sys_to_pci(hose);
/* The root complex bridge comes up with bogus resources,
* we copy the PHB ones in.
@@ -424,9 +125,8 @@ void fsl_pcibios_fixup_bus(struct pci_bus *bus)
* tricky.
*/
- if (fsl_pcie_bus_fixup)
- is_pcie = early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP);
- no_link = !!(hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK);
+ is_pcie = pci->is_pcie;
+ no_link = fsl_pci_check_link(pci);
if (bus->parent == hose->bus && (is_pcie || no_link)) {
for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; ++i) {
@@ -448,115 +148,95 @@ void fsl_pcibios_fixup_bus(struct pci_bus *bus)
}
}
-int __init fsl_add_bridge(struct platform_device *pdev, int is_primary)
+int fsl_pci_exclude_device(struct fsl_pci *pci, u8 bus, u8 devfn)
{
- int len;
- struct pci_controller *hose;
- struct resource rsrc;
- const int *bus_range;
- u8 hdr_type, progif;
- struct device_node *dev;
- struct ccsr_pci __iomem *pci;
-
- dev = pdev->dev.of_node;
+ struct pci_controller *hose = pci->sys;
- if (!of_device_is_available(dev)) {
- pr_warning("%s: disabled\n", dev->full_name);
- return -ENODEV;
- }
+ if (!hose)
+ return PCIBIOS_SUCCESSFUL;
- pr_debug("Adding PCI host bridge %s\n", dev->full_name);
+ if (ppc_md.pci_exclude_device)
+ if (ppc_md.pci_exclude_device(hose, bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
- /* Fetch host bridge registers address */
- if (of_address_to_resource(dev, 0, &rsrc)) {
- printk(KERN_WARNING "Can't get pci register base!");
- return -ENOMEM;
- }
+ return PCIBIOS_SUCCESSFUL;
+}
- /* Get bus range if any */
- bus_range = of_get_property(dev, "bus-range", &len);
- if (bus_range == NULL || len < 2 * sizeof(int))
- printk(KERN_WARNING "Can't get bus-range for %s, assume"
- " bus 0\n", dev->full_name);
+int fsl_pci_sys_register(struct fsl_pci *pci)
+{
+ struct pci_controller *hose;
pci_add_flags(PCI_REASSIGN_ALL_BUS);
- hose = pcibios_alloc_controller(dev);
+ hose = pcibios_alloc_controller(pci->dn);
if (!hose)
return -ENOMEM;
/* set platform device as the parent */
- hose->parent = &pdev->dev;
- hose->first_busno = bus_range ? bus_range[0] : 0x0;
- hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
- pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
- (u64)rsrc.start, (u64)resource_size(&rsrc));
+ hose->private_data = pci;
+ hose->parent = pci->dev;
+ hose->first_busno = pci->first_busno;
+ hose->last_busno = pci->last_busno;
+ hose->ops = pci->ops;
+
+#ifdef CONFIG_PPC32
+ /* On 32 bits, limit I/O space to 16MB */
+ if (pci->pci_io_size > 0x01000000)
+ pci->pci_io_size = 0x01000000;
+
+ /* 32 bits needs to map IOs here */
+ hose->io_base_virt = ioremap(pci->io_base_phys + pci->io_resource.start,
+ pci->pci_io_size);
+
+ /* Expect trouble if pci_addr is not 0 */
+ if (fsl_pci_primary == pci->dn)
+ isa_io_base = (unsigned long)hose->io_base_virt;
+#endif /* CONFIG_PPC32 */
+
+ hose->pci_io_size = pci->io_resource.start + pci->pci_io_size;
+ hose->io_base_phys = pci->io_base_phys;
+ hose->io_resource = pci->io_resource;
+
+ memcpy(hose->mem_offset, pci->mem_offset, sizeof(hose->mem_offset));
+ memcpy(hose->mem_resources, pci->mem_resources,
+ sizeof(hose->mem_resources));
+ hose->dma_window_base_cur = pci->dma_window_base_cur;
+ hose->dma_window_size = pci->dma_window_size;
+
+ pci->sys = hose;
- pci = hose->private_data = ioremap(rsrc.start, resource_size(&rsrc));
- if (!hose->private_data)
- goto no_bridge;
-
- setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
- PPC_INDIRECT_TYPE_BIG_ENDIAN);
-
- if (in_be32(&pci->block_rev1) < PCIE_IP_REV_3_0)
- hose->indirect_type |= PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK;
-
- if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
- /* use fsl_indirect_read_config for PCIe */
- hose->ops = &fsl_indirect_pcie_ops;
- /* For PCIE read HEADER_TYPE to identify controler mode */
- early_read_config_byte(hose, 0, 0, PCI_HEADER_TYPE, &hdr_type);
- if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE)
- goto no_bridge;
-
- } else {
- /* For PCI read PROG to identify controller mode */
- early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif);
- if ((progif & 1) == 1)
- goto no_bridge;
- }
-
- setup_pci_cmd(hose);
-
- /* check PCI express link status */
- if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
- hose->indirect_type |= PPC_INDIRECT_TYPE_EXT_REG |
- PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
- if (fsl_pcie_check_link(hose))
- hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
- }
-
- printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
- "Firmware bus number: %d->%d\n",
- (unsigned long long)rsrc.start, hose->first_busno,
- hose->last_busno);
+ /*
+ * Install our own dma_set_mask handler to fixup dma_ops
+ * and dma_offset when memory is more than dma window size
+ */
+ if (pci->is_pcie && memblock_end_of_DRAM() > hose->dma_window_size)
+ ppc_md.dma_set_mask = fsl_pci_dma_set_mask;
- pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
- hose, hose->cfg_addr, hose->cfg_data);
+#ifdef CONFIG_SWIOTLB
+ /*
+ * if we couldn't map all of DRAM via the dma windows
+ * we need SWIOTLB to handle buffers located outside of
+ * dma capable memory region
+ */
+ if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
+ hose->dma_window_size)
+ ppc_swiotlb_enable = 1;
+#endif
- /* Interpret the "ranges" property */
- /* This also maps the I/O region and sets isa_io/mem_base */
- pci_process_bridge_OF_ranges(hose, dev, is_primary);
+ mpc85xx_pci_err_probe(to_platform_device(pci->dev));
+ return 0;
+}
- /* Setup PEX window registers */
- setup_pci_atmu(hose);
+void fsl_pci_sys_remove(struct fsl_pci *pci)
+{
+ struct pci_controller *hose = pci->sys;
- return 0;
+ if (!hose)
+ return;
-no_bridge:
- iounmap(hose->private_data);
- /* unmap cfg_data & cfg_addr separately if not on same page */
- if (((unsigned long)hose->cfg_data & PAGE_MASK) !=
- ((unsigned long)hose->cfg_addr & PAGE_MASK))
- iounmap(hose->cfg_data);
- iounmap(hose->cfg_addr);
pcibios_free_controller(hose);
- return -ENODEV;
}
-#endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pcie_header);
+#endif
#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
struct mpc83xx_pcie_priv {
@@ -693,6 +373,19 @@ static struct pci_ops mpc83xx_pcie_ops = {
.write = mpc83xx_pcie_write_config,
};
+static int mpc83xx_pcie_check_link(struct pci_controller *hose)
+{
+ u32 val = 0;
+
+#define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */
+#define PCIE_LTSSM_L0 0x16 /* L0 state */
+
+ early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
+ if (val < PCIE_LTSSM_L0)
+ return 1;
+ return 0;
+}
+
static int __init mpc83xx_pcie_setup(struct pci_controller *hose,
struct resource *reg)
{
@@ -727,7 +420,7 @@ static int __init mpc83xx_pcie_setup(struct pci_controller *hose,
out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAH, 0);
out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, 0);
- if (fsl_pcie_check_link(hose))
+ if (mpc83xx_pcie_check_link(hose))
hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
return 0;
@@ -869,7 +562,7 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
}
#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
-static const struct of_device_id pci_ids[] = {
+const struct of_device_id fsl_pci_ids[] = {
{ .compatible = "fsl,mpc8540-pci", },
{ .compatible = "fsl,mpc8548-pcie", },
{ .compatible = "fsl,mpc8610-pci", },
@@ -906,7 +599,7 @@ void fsl_pci_assign_primary(void)
of_node_put(np);
np = fsl_pci_primary;
- if (of_match_node(pci_ids, np) && of_device_is_available(np))
+ if (of_match_node(fsl_pci_ids, np) && of_device_is_available(np))
return;
}
@@ -915,7 +608,7 @@ void fsl_pci_assign_primary(void)
* designate one as primary. This can go away once
* various bugs with primary-less systems are fixed.
*/
- for_each_matching_node(np, pci_ids) {
+ for_each_matching_node(np, fsl_pci_ids) {
if (of_device_is_available(np)) {
fsl_pci_primary = np;
of_node_put(np);
@@ -924,81 +617,4 @@ void fsl_pci_assign_primary(void)
}
}
-static int fsl_pci_probe(struct platform_device *pdev)
-{
- int ret;
- struct device_node *node;
-#ifdef CONFIG_SWIOTLB
- struct pci_controller *hose;
-#endif
-
- node = pdev->dev.of_node;
- ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
-
-#ifdef CONFIG_SWIOTLB
- if (ret == 0) {
- hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
-
- /*
- * if we couldn't map all of DRAM via the dma windows
- * we need SWIOTLB to handle buffers located outside of
- * dma capable memory region
- */
- if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
- hose->dma_window_size)
- ppc_swiotlb_enable = 1;
- }
-#endif
-
- mpc85xx_pci_err_probe(pdev);
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int fsl_pci_resume(struct device *dev)
-{
- struct pci_controller *hose;
- struct resource pci_rsrc;
-
- hose = pci_find_hose_for_OF_device(dev->of_node);
- if (!hose)
- return -ENODEV;
-
- if (of_address_to_resource(dev->of_node, 0, &pci_rsrc)) {
- dev_err(dev, "Get pci register base failed.");
- return -ENODEV;
- }
-
- setup_pci_atmu(hose);
-
- return 0;
-}
-
-static const struct dev_pm_ops pci_pm_ops = {
- .resume = fsl_pci_resume,
-};
-
-#define PCI_PM_OPS (&pci_pm_ops)
-
-#else
-
-#define PCI_PM_OPS NULL
-
-#endif
-
-static struct platform_driver fsl_pci_driver = {
- .driver = {
- .name = "fsl-pci",
- .pm = PCI_PM_OPS,
- .of_match_table = pci_ids,
- },
- .probe = fsl_pci_probe,
-};
-
-static int __init fsl_pci_init(void)
-{
- return platform_driver_register(&fsl_pci_driver);
-}
-arch_initcall(fsl_pci_init);
#endif
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index 72b5625..42f3ab6 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -14,97 +14,6 @@
#ifndef __POWERPC_FSL_PCI_H
#define __POWERPC_FSL_PCI_H
-struct platform_device;
-
-#define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */
-#define PCIE_LTSSM_L0 0x16 /* L0 state */
-#define PCIE_IP_REV_2_2 0x02080202 /* PCIE IP block version Rev2.2 */
-#define PCIE_IP_REV_3_0 0x02080300 /* PCIE IP block version Rev3.0 */
-#define PIWAR_EN 0x80000000 /* Enable */
-#define PIWAR_PF 0x20000000 /* prefetch */
-#define PIWAR_TGI_LOCAL 0x00f00000 /* target - local memory */
-#define PIWAR_READ_SNOOP 0x00050000
-#define PIWAR_WRITE_SNOOP 0x00005000
-#define PIWAR_SZ_MASK 0x0000003f
-
-/* PCI/PCI Express outbound window reg */
-struct pci_outbound_window_regs {
- __be32 potar; /* 0x.0 - Outbound translation address register */
- __be32 potear; /* 0x.4 - Outbound translation extended address register */
- __be32 powbar; /* 0x.8 - Outbound window base address register */
- u8 res1[4];
- __be32 powar; /* 0x.10 - Outbound window attributes register */
- u8 res2[12];
-};
-
-/* PCI/PCI Express inbound window reg */
-struct pci_inbound_window_regs {
- __be32 pitar; /* 0x.0 - Inbound translation address register */
- u8 res1[4];
- __be32 piwbar; /* 0x.8 - Inbound window base address register */
- __be32 piwbear; /* 0x.c - Inbound window base extended address register */
- __be32 piwar; /* 0x.10 - Inbound window attributes register */
- u8 res2[12];
-};
-
-/* PCI/PCI Express IO block registers for 85xx/86xx */
-struct ccsr_pci {
- __be32 config_addr; /* 0x.000 - PCI/PCIE Configuration Address Register */
- __be32 config_data; /* 0x.004 - PCI/PCIE Configuration Data Register */
- __be32 int_ack; /* 0x.008 - PCI Interrupt Acknowledge Register */
- __be32 pex_otb_cpl_tor; /* 0x.00c - PCIE Outbound completion timeout register */
- __be32 pex_conf_tor; /* 0x.010 - PCIE configuration timeout register */
- __be32 pex_config; /* 0x.014 - PCIE CONFIG Register */
- __be32 pex_int_status; /* 0x.018 - PCIE interrupt status */
- u8 res2[4];
- __be32 pex_pme_mes_dr; /* 0x.020 - PCIE PME and message detect register */
- __be32 pex_pme_mes_disr; /* 0x.024 - PCIE PME and message disable register */
- __be32 pex_pme_mes_ier; /* 0x.028 - PCIE PME and message interrupt enable register */
- __be32 pex_pmcr; /* 0x.02c - PCIE power management command register */
- u8 res3[3016];
- __be32 block_rev1; /* 0x.bf8 - PCIE Block Revision register 1 */
- __be32 block_rev2; /* 0x.bfc - PCIE Block Revision register 2 */
-
-/* PCI/PCI Express outbound window 0-4
- * Window 0 is the default window and is the only window enabled upon reset.
- * The default outbound register set is used when a transaction misses
- * in all of the other outbound windows.
- */
- struct pci_outbound_window_regs pow[5];
- u8 res14[96];
- struct pci_inbound_window_regs pmit; /* 0xd00 - 0xd9c Inbound MSI */
- u8 res6[96];
-/* PCI/PCI Express inbound window 3-0
- * inbound window 1 supports only a 32-bit base address and does not
- * define an inbound window base extended address register.
- */
- struct pci_inbound_window_regs piw[4];
-
- __be32 pex_err_dr; /* 0x.e00 - PCI/PCIE error detect register */
- u8 res21[4];
- __be32 pex_err_en; /* 0x.e08 - PCI/PCIE error interrupt enable register */
- u8 res22[4];
- __be32 pex_err_disr; /* 0x.e10 - PCI/PCIE error disable register */
- u8 res23[12];
- __be32 pex_err_cap_stat; /* 0x.e20 - PCI/PCIE error capture status register */
- u8 res24[4];
- __be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
- __be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 0 */
- __be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 0 */
- __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */
- u8 res_e38[200];
- __be32 pdb_stat; /* 0x.f00 - PCIE Debug Status */
- u8 res_f04[16];
- __be32 pex_csr0; /* 0x.f14 - PEX Control/Status register 0*/
-#define PEX_CSR0_LTSSM_MASK 0xFC
-#define PEX_CSR0_LTSSM_SHIFT 2
-#define PEX_CSR0_LTSSM_L0 0x11
- __be32 pex_csr1; /* 0x.f18 - PEX Control/Status register 1*/
- u8 res_f1c[228];
-
-};
-
-extern int fsl_add_bridge(struct platform_device *pdev, int is_primary);
extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
extern int mpc83xx_add_bridge(struct device_node *dev);
u64 fsl_pci_immrbar_base(struct pci_controller *hose);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 3eb32f6..ae603c1 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -239,7 +239,6 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
pdata = pci->pvt_info;
pdata->name = "mpc85xx_pci_err";
pdata->irq = NO_IRQ;
- dev_set_drvdata(&op->dev, pci);
pci->dev = &op->dev;
pci->mod_name = EDAC_MOD_STR;
pci->ctl_name = pdata->name;
@@ -259,15 +258,6 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
/* we only need the error registers */
r.start += 0xe00;
-
- if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r),
- pdata->name)) {
- printk(KERN_ERR "%s: Error while requesting mem region\n",
- __func__);
- res = -EBUSY;
- goto err;
- }
-
pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r));
if (!pdata->pci_vbase) {
printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 1184ff6..454484b 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -14,4 +14,8 @@ config PCI_EXYNOS
select PCIEPORTBUS
select PCIE_DW
+config PCI_FSL
+ bool "Freescale PCI/PCIe controller"
+ depends on FSL_SOC_BOOKE || PPC_86xx
+
endmenu
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 086d850..b6d4564 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
obj-$(CONFIG_PCIE_DW) += pcie-designware.o
+obj-$(CONFIG_PCI_FSL) += pci-fsl.o
diff --git a/drivers/pci/host/pci-fsl.c b/drivers/pci/host/pci-fsl.c
new file mode 100644
index 0000000..a20d57c
--- /dev/null
+++ b/drivers/pci/host/pci-fsl.c
@@ -0,0 +1,736 @@
+/*
+ * 85xx/86xx/LS PCI/PCIE common driver support
+ *
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * Moved from arch/power/sysdev/fsl_pci.c
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/log2.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/pci_regs.h>
+#include <linux/platform_device.h>
+#include <linux/resource.h>
+#include <linux/types.h>
+#include <linux/memblock.h>
+#include <linux/fsl/pci.h>
+
+/* Indirect type */
+#define INDIRECT_TYPE_EXT_REG 0x00000002
+#define INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x00000004
+#define INDIRECT_TYPE_NO_PCIE_LINK 0x00000008
+#define INDIRECT_TYPE_BIG_ENDIAN 0x00000010
+#define INDIRECT_TYPE_FSL_CFG_REG_LINK 0x00000040
+
+u64 __weak fsl_pci64_dma_offset(void)
+{
+ return 0;
+}
+
+struct fsl_pci * __weak fsl_sys_to_pci(void *sys)
+{
+ return NULL;
+}
+
+struct pci_bus * __weak fsl_fake_pci_bus(struct fsl_pci *pci, int busnr)
+{
+ return NULL;
+}
+
+int __weak fsl_pci_exclude_device(struct fsl_pci *pci, u8 bus, u8 devfn)
+{
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int fsl_pci_read_config(struct fsl_pci *pci, int bus, int devfn,
+ int offset, int len, u32 *val)
+{
+ u32 bus_no, reg, data;
+
+ if (pci->indirect_type & INDIRECT_TYPE_NO_PCIE_LINK) {
+ if (bus != pci->first_busno)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ if (devfn != 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ }
+
+ if (fsl_pci_exclude_device(pci, bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ bus_no = (bus == pci->first_busno) ? pci->self_busno : bus;
+
+ if (pci->indirect_type & INDIRECT_TYPE_EXT_REG)
+ reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
+ else
+ reg = offset & 0xfc;
+
+ if (pci->indirect_type & INDIRECT_TYPE_BIG_ENDIAN)
+ iowrite32be(0x80000000 | (bus_no << 16) | (devfn << 8) | reg,
+ &pci->regs->config_addr);
+ else
+ iowrite32(0x80000000 | (bus_no << 16) | (devfn << 8) | reg,
+ &pci->regs->config_addr);
+
+ /*
+ * Note: the caller has already checked that offset is
+ * suitably aligned and that len is 1, 2 or 4.
+ */
+ data = ioread32(&pci->regs->config_data);
+ switch (len) {
+ case 1:
+ *val = (data >> (8 * (offset & 3))) & 0xff;
+ break;
+ case 2:
+ *val = (data >> (8 * (offset & 3))) & 0xffff;
+ break;
+ default:
+ *val = data;
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int fsl_pci_write_config(struct fsl_pci *pci, int bus, int devfn,
+ int offset, int len, u32 val)
+{
+ void __iomem *cfg_data;
+ u32 bus_no, reg;
+
+ if (pci->indirect_type & INDIRECT_TYPE_NO_PCIE_LINK) {
+ if (bus != pci->first_busno)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ if (devfn != 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ }
+
+ if (fsl_pci_exclude_device(pci, bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ bus_no = (bus == pci->first_busno) ?
+ pci->self_busno : bus;
+
+ if (pci->indirect_type & INDIRECT_TYPE_EXT_REG)
+ reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
+ else
+ reg = offset & 0xfc;
+
+ if (pci->indirect_type & INDIRECT_TYPE_BIG_ENDIAN)
+ iowrite32be(0x80000000 | (bus_no << 16) | (devfn << 8) | reg,
+ &pci->regs->config_addr);
+ else
+ iowrite32(0x80000000 | (bus_no << 16) | (devfn << 8) | reg,
+ &pci->regs->config_addr);
+
+ /* suppress setting of PCI_PRIMARY_BUS */
+ if (pci->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
+ if ((offset == PCI_PRIMARY_BUS) &&
+ (bus == pci->first_busno))
+ val &= 0xffffff00;
+
+ /*
+ * Note: the caller has already checked that offset is
+ * suitably aligned and that len is 1, 2 or 4.
+ */
+ cfg_data = ((void *) &(pci->regs->config_data)) + (offset & 3);
+ switch (len) {
+ case 1:
+ iowrite8(val, cfg_data);
+ break;
+ case 2:
+ iowrite16(val, cfg_data);
+ break;
+ default:
+ iowrite32(val, cfg_data);
+ break;
+ }
+ return PCIBIOS_SUCCESSFUL;
+}
+
+int fsl_pci_check_link(struct fsl_pci *pci)
+{
+ u32 val = 0;
+
+ if (pci->indirect_type & INDIRECT_TYPE_FSL_CFG_REG_LINK) {
+ fsl_pci_read_config(pci, 0, 0, PCIE_LTSSM, 4, &val);
+ if (val < PCIE_LTSSM_L0)
+ return 1;
+ } else {
+ /* for PCIe IP rev 3.0 or greater use CSR0 for link state */
+ val = (in_be32(&pci->regs->pex_csr0) & PEX_CSR0_LTSSM_MASK)
+ >> PEX_CSR0_LTSSM_SHIFT;
+ if (val != PEX_CSR0_LTSSM_L0)
+ return 1;
+ }
+
+ return 0;
+}
+
+static int fsl_indirect_read_config(struct pci_bus *bus, unsigned int devfn,
+ int offset, int len, u32 *val)
+{
+ struct fsl_pci *pci = fsl_sys_to_pci(bus->sysdata);
+
+ if (!pci)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ if (fsl_pci_check_link(pci))
+ pci->indirect_type |= INDIRECT_TYPE_NO_PCIE_LINK;
+ else
+ pci->indirect_type &= ~INDIRECT_TYPE_NO_PCIE_LINK;
+
+ return fsl_pci_read_config(pci, bus->number, devfn, offset, len, val);
+}
+
+static int fsl_indirect_write_config(struct pci_bus *bus, unsigned int devfn,
+ int offset, int len, u32 val)
+{
+ struct fsl_pci *pci = fsl_sys_to_pci(bus->sysdata);
+
+ if (!pci)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return fsl_pci_write_config(pci, bus->number, devfn,
+ offset, len, val);
+}
+
+static struct pci_ops fsl_indirect_pci_ops = {
+ .read = fsl_indirect_read_config,
+ .write = fsl_indirect_write_config,
+};
+
+#define EARLY_FSL_PCI_OP(rw, size, type) \
+int early_fsl_##rw##_config_##size(struct fsl_pci *pci, int bus, \
+ int devfn, int offset, type value) \
+{ \
+ return pci_bus_##rw##_config_##size(fsl_fake_pci_bus(pci, bus),\
+ devfn, offset, value); \
+}
+
+EARLY_FSL_PCI_OP(read, byte, u8 *)
+EARLY_FSL_PCI_OP(read, word, u16 *)
+EARLY_FSL_PCI_OP(read, dword, u32 *)
+EARLY_FSL_PCI_OP(write, byte, u8)
+EARLY_FSL_PCI_OP(write, word, u16)
+EARLY_FSL_PCI_OP(write, dword, u32)
+
+static int early_fsl_find_capability(struct fsl_pci *pci,
+ int busnr, int devfn, int cap)
+{
+ struct pci_bus *bus = fsl_fake_pci_bus(pci, busnr);
+
+ if (!bus)
+ return 0;
+
+ return pci_bus_find_capability(bus, devfn, cap);
+}
+
+static int setup_one_atmu(struct ccsr_pci __iomem *pci,
+ unsigned int index, const struct resource *res,
+ resource_size_t offset)
+{
+ resource_size_t pci_addr = res->start - offset;
+ resource_size_t phys_addr = res->start;
+ resource_size_t size = resource_size(res);
+ u32 flags = 0x80044000; /* enable & mem R/W */
+ unsigned int i;
+
+ pr_debug("PCI MEM resource start 0x%016llx, size 0x%016llx.\n",
+ (u64)res->start, (u64)size);
+
+ if (res->flags & IORESOURCE_PREFETCH)
+ flags |= 0x10000000; /* enable relaxed ordering */
+
+ for (i = 0; size > 0; i++) {
+ unsigned int bits = min(ilog2(size),
+ __ffs(pci_addr | phys_addr));
+
+ if (index + i >= 5)
+ return -1;
+
+ iowrite32be(pci_addr >> 12, &pci->pow[index + i].potar);
+ iowrite32be((u64)pci_addr >> 44, &pci->pow[index + i].potear);
+ iowrite32be(phys_addr >> 12, &pci->pow[index + i].powbar);
+ iowrite32be(flags | (bits - 1), &pci->pow[index + i].powar);
+
+ pci_addr += (resource_size_t)1U << bits;
+ phys_addr += (resource_size_t)1U << bits;
+ size -= (resource_size_t)1U << bits;
+ }
+
+ return i;
+}
+
+/* atmu setup for fsl pci/pcie controller */
+static void setup_pci_atmu(struct fsl_pci *pci)
+{
+ int i, j, n, mem_log, win_idx = 3, start_idx = 1, end_idx = 4;
+ u64 mem, sz, paddr_hi = 0;
+ u64 offset = 0, paddr_lo = ULLONG_MAX;
+ u32 pcicsrbar = 0, pcicsrbar_sz;
+ u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL |
+ PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
+ const u64 *reg;
+ int len;
+
+ if (pci->is_pcie) {
+ if (in_be32(&pci->regs->block_rev1) >= PCIE_IP_REV_2_2) {
+ win_idx = 2;
+ start_idx = 0;
+ end_idx = 3;
+ }
+ }
+
+ /* Disable all windows (except powar0 since it's ignored) */
+ for (i = 1; i < 5; i++)
+ iowrite32be(0, &pci->regs->pow[i].powar);
+ for (i = start_idx; i < end_idx; i++)
+ iowrite32be(0, &pci->regs->piw[i].piwar);
+
+ /* Setup outbound MEM window */
+ for (i = 0, j = 1; i < 3; i++) {
+ if (!(pci->mem_resources[i].flags & IORESOURCE_MEM))
+ continue;
+
+ paddr_lo = min_t(u64, paddr_lo, pci->mem_resources[i].start);
+ paddr_hi = max_t(u64, paddr_hi, pci->mem_resources[i].end);
+
+ /* We assume all memory resources have the same offset */
+ offset = pci->mem_offset[i];
+ n = setup_one_atmu(pci->regs, j, &pci->mem_resources[i],
+ offset);
+
+ if (n < 0 || j >= 5) {
+ dev_err(pci->dev, "Ran out of outbound PCI ATMUs"
+ " for resource %d!\n", i);
+ pci->mem_resources[i].flags |= IORESOURCE_DISABLED;
+ } else
+ j += n;
+ }
+
+ /* Setup outbound IO window */
+ if (pci->io_resource.flags & IORESOURCE_IO) {
+ if (j >= 5)
+ dev_err(pci->dev,
+ "Ran out of outbound PCI ATMUs for IO resource\n");
+ else {
+ dev_dbg(pci->dev,
+ "PCI IO resource start 0x%016llx,"
+ "size 0x%016llx, phy base 0x%016llx.\n",
+ (u64)pci->io_resource.start,
+ (u64)resource_size(&pci->io_resource),
+ (u64)pci->io_base_phys);
+ iowrite32be(pci->io_resource.start >> 12,
+ &pci->regs->pow[j].potar);
+ iowrite32be(0, &pci->regs->pow[j].potear);
+ iowrite32be(pci->io_base_phys >> 12,
+ &pci->regs->pow[j].powbar);
+ /* Enable, IO R/W */
+ iowrite32be(0x80088000 |
+ (ilog2(resource_size(&pci->io_resource)) - 1),
+ &pci->regs->pow[j].powar);
+ }
+ }
+
+ /* convert to pci address space */
+ paddr_hi -= offset;
+ paddr_lo -= offset;
+
+ if (paddr_hi == paddr_lo) {
+ dev_err(pci->dev, "No outbound window space\n");
+ return;
+ }
+
+ if (paddr_lo == 0) {
+ dev_err(pci->dev, "No space for inbound window\n");
+ return;
+ }
+
+ /* setup PCSRBAR/PEXCSRBAR */
+ early_fsl_write_config_dword(pci, 0, 0, PCI_BASE_ADDRESS_0,
+ 0xffffffff);
+ early_fsl_read_config_dword(pci, 0, 0, PCI_BASE_ADDRESS_0,
+ &pcicsrbar_sz);
+ pcicsrbar_sz = ~pcicsrbar_sz + 1;
+
+ if (paddr_hi < (0x100000000ull - pcicsrbar_sz) ||
+ (paddr_lo > 0x100000000ull))
+ pcicsrbar = 0x100000000ull - pcicsrbar_sz;
+ else
+ pcicsrbar = (paddr_lo - pcicsrbar_sz) & -pcicsrbar_sz;
+ early_fsl_write_config_dword(pci, 0, 0, PCI_BASE_ADDRESS_0,
+ pcicsrbar);
+
+ paddr_lo = min_t(u64, paddr_lo, pcicsrbar);
+
+ dev_info(pci->dev, "PCICSRBAR @ 0x%x\n", pcicsrbar);
+
+ /* Setup inbound mem window */
+ mem = memblock_end_of_DRAM();
+
+ /*
+ * The msi-address-64 property, if it exists, indicates the physical
+ * address of the MSIIR register. Normally, this register is located
+ * inside CCSR, so the ATMU that covers all of CCSR is used. But if
+ * this property exists, then we normally need to create a new ATMU
+ * for it. For now, however, we cheat. The only entity that creates
+ * this property is the Freescale hypervisor, and the address is
+ * specified in the partition configuration. Typically, the address
+ * is located in the page immediately after the end of DDR. If so, we
+ * can avoid allocating a new ATMU by extending the DDR ATMU by one
+ * page.
+ */
+ reg = of_get_property(pci->dn, "msi-address-64", &len);
+ if (reg && (len == sizeof(u64))) {
+ u64 address = be64_to_cpup(reg);
+
+ if ((address >= mem) && (address < (mem + PAGE_SIZE))) {
+ dev_info(pci->dev,
+ "extending DDR ATMU to cover MSIIR\n");
+ mem += PAGE_SIZE;
+ } else {
+ /* TODO: Create a new ATMU for MSIIR */
+ dev_warn(pci->dev,
+ "msi-address-64 address of %llx is "
+ "unsupported\n", address);
+ }
+ }
+
+ sz = min(mem, paddr_lo);
+ mem_log = ilog2(sz);
+
+ /* PCIe can overmap inbound & outbound since RX & TX are separated */
+ if (pci->is_pcie) {
+ /* Size window to exact size if power-of-two or one size up */
+ if ((1ull << mem_log) != mem) {
+ if ((1ull << mem_log) > mem)
+ dev_info(pci->dev, "Setting PCI inbound window"
+ "greater than memory size\n");
+ mem_log++;
+ }
+
+ piwar |= ((mem_log - 1) & PIWAR_SZ_MASK);
+
+ /* Setup inbound memory window */
+ iowrite32be(0, &pci->regs->piw[win_idx].pitar);
+ iowrite32be(0, &pci->regs->piw[win_idx].piwbar);
+ iowrite32be(piwar, &pci->regs->piw[win_idx].piwar);
+ win_idx--;
+
+ pci->dma_window_base_cur = 0x00000000;
+ pci->dma_window_size = (resource_size_t)sz;
+
+ /*
+ * if we have >4G of memory setup second PCI inbound window to
+ * let devices that are 64-bit address capable to work w/o
+ * SWIOTLB and access the full range of memory
+ */
+ if (sz != mem) {
+ mem_log = ilog2(mem);
+
+ /* Size window up if we dont fit in exact power-of-2 */
+ if ((1ull << mem_log) != mem)
+ mem_log++;
+
+ piwar = (piwar & ~PIWAR_SZ_MASK) |
+ (mem_log - 1);
+
+ /* Setup inbound memory window */
+ iowrite32be(0, &pci->regs->piw[win_idx].pitar);
+ iowrite32be(fsl_pci64_dma_offset() >> 44,
+ &pci->regs->piw[win_idx].piwbear);
+ iowrite32be(fsl_pci64_dma_offset() >> 12,
+ &pci->regs->piw[win_idx].piwbar);
+ iowrite32be(piwar,
+ &pci->regs->piw[win_idx].piwar);
+ }
+ } else {
+ u64 paddr = 0;
+
+ /* Setup inbound memory window */
+ iowrite32be(paddr >> 12, &pci->regs->piw[win_idx].pitar);
+ iowrite32be(paddr >> 12, &pci->regs->piw[win_idx].piwbar);
+ iowrite32be((piwar | (mem_log - 1)),
+ &pci->regs->piw[win_idx].piwar);
+ win_idx--;
+
+ paddr += 1ull << mem_log;
+ sz -= 1ull << mem_log;
+
+ if (sz) {
+ mem_log = ilog2(sz);
+ piwar |= (mem_log - 1);
+
+ iowrite32be(paddr >> 12,
+ &pci->regs->piw[win_idx].pitar);
+ iowrite32be(paddr >> 12,
+ &pci->regs->piw[win_idx].piwbar);
+ iowrite32be(piwar,
+ &pci->regs->piw[win_idx].piwar);
+ win_idx--;
+
+ paddr += 1ull << mem_log;
+ }
+
+ pci->dma_window_base_cur = 0x00000000;
+ pci->dma_window_size = (resource_size_t)paddr;
+ }
+
+ if (pci->dma_window_size < mem) {
+#ifndef CONFIG_SWIOTLB
+ dev_err(pci->dev, "Memory size exceeds PCI ATMU ability to "
+ "map - enable CONFIG_SWIOTLB to avoid dma errors.\n");
+#endif
+ /* adjusting outbound windows could reclaim space in mem map */
+ if (paddr_hi < 0xffffffffull)
+ dev_warn(pci->dev, "Outbound window cfg leaves "
+ "gaps in memory map. Adjusting the memory map "
+ "could reduce unnecessary bounce buffering.\n");
+
+ dev_info(pci->dev, "DMA window size is 0x%llx\n",
+ (u64)pci->dma_window_size);
+ }
+}
+
+static void __init setup_pci_cmd(struct fsl_pci *pci)
+{
+ u16 cmd;
+ int cap_x;
+
+ early_fsl_read_config_word(pci, 0, 0, PCI_COMMAND, &cmd);
+ cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
+ PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
+ early_fsl_write_config_word(pci, 0, 0, PCI_COMMAND, cmd);
+
+ cap_x = early_fsl_find_capability(pci, 0, 0, PCI_CAP_ID_PCIX);
+ if (cap_x) {
+ int pci_x_cmd = cap_x + PCI_X_CMD;
+ cmd = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ |
+ PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
+ early_fsl_write_config_word(pci, 0, 0, pci_x_cmd, cmd);
+ } else
+ early_fsl_write_config_byte(pci, 0, 0, PCI_LATENCY_TIMER,
+ 0x80);
+}
+
+static int __init
+fsl_pci_setup(struct platform_device *pdev, struct fsl_pci *pci)
+{
+ struct resource *rsrc;
+ u8 hdr_type, progif;
+ struct device_node *dn;
+ struct of_pci_range range;
+ struct of_pci_range_parser parser;
+ int mem = 0;
+
+ dn = pdev->dev.of_node;
+ pci->dn = dn;
+ pci->dev = &pdev->dev;
+
+ dev_info(&pdev->dev, "Find controller %s\n", dn->full_name);
+
+ /* Fetch host bridge registers address */
+ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!rsrc) {
+ dev_err(&pdev->dev, "Can't get pci register base!");
+ return -EINVAL;
+ }
+ dev_info(&pdev->dev, "REG 0x%016llx..0x%016llx\n",
+ (u64)rsrc->start, (u64)rsrc->end);
+
+ /* Parse pci range resources from device tree */
+ if (of_pci_range_parser_init(&parser, dn)) {
+ dev_err(&pdev->dev, "missing ranges property\n");
+ return -EINVAL;
+ }
+
+ /* Get the I/O and memory ranges from device tree */
+ for_each_of_pci_range(&parser, &range) {
+ unsigned long restype = range.flags & IORESOURCE_TYPE_BITS;
+ if (restype == IORESOURCE_IO) {
+ of_pci_range_to_resource(&range, dn,
+ &pci->io_resource);
+ pci->io_resource.name = "I/O";
+ pci->io_resource.start = range.pci_addr;
+ pci->io_resource.end = range.pci_addr + range.size - 1;
+ pci->pci_io_size = range.size;
+ pci->io_base_phys = range.cpu_addr - range.pci_addr;
+ dev_info(&pdev->dev,
+ " IO 0x%016llx..0x%016llx -> 0x%016llx\n",
+ range.cpu_addr,
+ range.cpu_addr + range.size - 1,
+ range.pci_addr);
+ }
+ if (restype == IORESOURCE_MEM) {
+ if (mem >= 3)
+ continue;
+ of_pci_range_to_resource(&range, dn,
+ &pci->mem_resources[mem]);
+ pci->mem_resources[mem].name = "MEM";
+ pci->mem_offset[mem] = range.cpu_addr - range.pci_addr;
+ dev_info(&pdev->dev,
+ "MEM 0x%016llx..0x%016llx -> 0x%016llx\n",
+ (u64)pci->mem_resources[mem].start,
+ (u64)pci->mem_resources[mem].end,
+ range.pci_addr);
+ }
+ }
+
+ /* Get bus range */
+ if (of_pci_parse_bus_range(dn, &pci->busn)) {
+ dev_err(&pdev->dev, "failed to parse bus-range property\n");
+ pci->first_busno = 0x0;
+ pci->last_busno = 0xff;
+ } else {
+ pci->first_busno = pci->busn.start;
+ pci->last_busno = pci->busn.end;
+ }
+ dev_info(&pdev->dev, "Firmware bus number %d->%d\n",
+ pci->first_busno, pci->last_busno);
+
+ pci->regs = devm_ioremap_resource(&pdev->dev, rsrc);
+ if (IS_ERR(pci->regs))
+ return PTR_ERR(pci->regs);
+
+ pci->ops = &fsl_indirect_pci_ops;
+ pci->indirect_type = INDIRECT_TYPE_BIG_ENDIAN;
+
+ if (in_be32(&pci->regs->block_rev1) < PCIE_IP_REV_3_0)
+ pci->indirect_type |= INDIRECT_TYPE_FSL_CFG_REG_LINK;
+
+ pci->is_pcie = early_fsl_find_capability(pci, 0, 0, PCI_CAP_ID_EXP);
+ if (pci->is_pcie) {
+ /* For PCIE read HEADER_TYPE to identify controller mode */
+ early_fsl_read_config_byte(pci, 0, 0, PCI_HEADER_TYPE,
+ &hdr_type);
+ if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_NORMAL)
+ goto no_bridge;
+ } else {
+ /* For PCI read PROG to identify controller mode */
+ early_fsl_read_config_byte(pci, 0, 0, PCI_CLASS_PROG, &progif);
+ if ((progif & 1) == 1)
+ goto no_bridge;
+ }
+
+ setup_pci_cmd(pci);
+
+ /* check PCI express link status */
+ if (pci->is_pcie) {
+ pci->indirect_type |= INDIRECT_TYPE_EXT_REG |
+ INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
+ if (fsl_pci_check_link(pci))
+ pci->indirect_type |= INDIRECT_TYPE_NO_PCIE_LINK;
+ }
+
+ /* Setup PEX window registers */
+ setup_pci_atmu(pci);
+
+ platform_set_drvdata(pdev, pci);
+
+ return 0;
+
+no_bridge:
+ dev_info(&pdev->dev, "It works as EP mode\n");
+ return -EPERM;
+}
+
+static int __init fsl_pci_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct fsl_pci *pci;
+
+ if (!of_device_is_available(pdev->dev.of_node)) {
+ dev_warn(&pdev->dev, "disabled\n");
+ return -ENODEV;
+ }
+
+ if (!fsl_pci_sys_register) {
+ dev_err(&pdev->dev,
+ "no fsl_pci_sys_register implementation\n");
+ return -EPERM;
+ }
+
+ pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
+ if (!pci) {
+ dev_err(&pdev->dev, "no memory for fsl_pci\n");
+ return -ENOMEM;
+ }
+
+ ret = fsl_pci_setup(pdev, pci);
+ if (ret)
+ return ret;
+
+ ret = fsl_pci_sys_register(pci);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register pcie to soc\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int __exit fsl_pci_remove(struct platform_device *pdev)
+{
+ struct fsl_pci *pci = platform_get_drvdata(pdev);
+
+ if (!pci)
+ return -ENODEV;
+
+ if (fsl_pci_sys_remove)
+ fsl_pci_sys_remove(pci);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int fsl_pci_resume(struct device *dev)
+{
+ struct fsl_pci *pci = dev_get_drvdata(dev);
+
+ if (!pci)
+ return -ENODEV;
+
+ setup_pci_atmu(pci);
+
+ return 0;
+}
+
+static const struct dev_pm_ops pci_pm_ops = {
+ .resume = fsl_pci_resume,
+};
+
+#define PCI_PM_OPS (&pci_pm_ops)
+
+#else
+
+#define PCI_PM_OPS NULL
+
+#endif
+
+static struct platform_driver fsl_pci_driver = {
+ .driver = {
+ .name = "fsl-pci",
+ .pm = PCI_PM_OPS,
+ .of_match_table = fsl_pci_ids,
+ },
+ .probe = fsl_pci_probe,
+ .remove = fsl_pci_remove,
+};
+
+static int __init fsl_pci_init(void)
+{
+ return platform_driver_register(&fsl_pci_driver);
+}
+
+arch_initcall(fsl_pci_init);
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/include/linux/fsl/pci.h
similarity index 67%
copy from arch/powerpc/sysdev/fsl_pci.h
copy to include/linux/fsl/pci.h
index 72b5625..ba72a89 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/include/linux/fsl/pci.h
@@ -1,7 +1,9 @@
/*
- * MPC85xx/86xx PCI Express structure define
+ * MPC85xx/86xx/LS PCI Express structure define
*
- * Copyright 2007,2011 Freescale Semiconductor, Inc
+ * Copyright 2013 Freescale Semiconductor, Inc
+ *
+ * Moved from arch/powerpc/sysdev/fsl_pci.h
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -11,10 +13,8 @@
*/
#ifdef __KERNEL__
-#ifndef __POWERPC_FSL_PCI_H
-#define __POWERPC_FSL_PCI_H
-
-struct platform_device;
+#ifndef __PCI_H
+#define __PCI_H
#define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */
#define PCIE_LTSSM_L0 0x16 /* L0 state */
@@ -47,7 +47,7 @@ struct pci_inbound_window_regs {
u8 res2[12];
};
-/* PCI/PCI Express IO block registers for 85xx/86xx */
+/* PCI/PCI Express IO block registers for 85xx/86xx/LS */
struct ccsr_pci {
__be32 config_addr; /* 0x.000 - PCI/PCIE Configuration Address Register */
__be32 config_data; /* 0x.004 - PCI/PCIE Configuration Data Register */
@@ -104,27 +104,74 @@ struct ccsr_pci {
};
-extern int fsl_add_bridge(struct platform_device *pdev, int is_primary);
-extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
-extern int mpc83xx_add_bridge(struct device_node *dev);
-u64 fsl_pci_immrbar_base(struct pci_controller *hose);
-
-extern struct device_node *fsl_pci_primary;
-
-#ifdef CONFIG_PCI
-void fsl_pci_assign_primary(void);
-#else
-static inline void fsl_pci_assign_primary(void) {}
-#endif
-
-#ifdef CONFIG_EDAC_MPC85XX
-int mpc85xx_pci_err_probe(struct platform_device *op);
-#else
-static inline int mpc85xx_pci_err_probe(struct platform_device *op)
-{
- return -ENOTSUPP;
-}
-#endif
-
-#endif /* __POWERPC_FSL_PCI_H */
+/*
+ * Structure of a PCI controller (host bridge)
+ */
+struct fsl_pci {
+ struct list_head node;
+ int is_pcie;
+ struct device_node *dn;
+ struct device *dev;
+
+ int first_busno;
+ int last_busno;
+ int self_busno;
+ struct resource busn;
+
+ struct pci_ops *ops;
+ struct ccsr_pci __iomem *regs;
+
+ u32 indirect_type;
+
+ struct resource io_resource;
+ resource_size_t io_base_phys;
+ resource_size_t pci_io_size;
+
+ struct resource mem_resources[3];
+ resource_size_t mem_offset[3];
+
+ int global_number; /* PCI domain number */
+
+ resource_size_t dma_window_base_cur;
+ resource_size_t dma_window_size;
+
+ void *sys;
+};
+
+/* Return link status 0-> link, 1-> no link*/
+int fsl_pci_check_link(struct fsl_pci *pci);
+
+/* Return PCI64 DMA offset */
+extern u64 fsl_pci64_dma_offset(void);
+
+/*
+ * PCI dts node compatible is platform dependent.
+ * So, ids should be defined in platform files.
+ */
+extern const struct of_device_id fsl_pci_ids[];
+
+/*
+ * Convert platform-dependent pci controller structure to fsl_pci
+ * PowerPC uses structure pci_controller and ARM uses structure pci_sys_data
+ * to describe pci controller.
+ */
+extern struct fsl_pci *fsl_sys_to_pci(void *sys);
+
+/*
+ * To fake a PCI bus
+ * it is called by early_fsl_*(), at that time the platform-dependent
+ * pci controller and pci bus have not been created.
+ */
+extern struct pci_bus *fsl_fake_pci_bus(struct fsl_pci *pci, int busnr);
+
+/* To avoid touching specified devices */
+extern int fsl_pci_exclude_device(struct fsl_pci *pci, u8 bus, u8 devfn);
+
+/* Register PCI/PCIe controller to platform */
+extern int __weak fsl_pci_sys_register(struct fsl_pci *pci);
+
+/* Remove PCI/PCIe controller from platform */
+extern void __weak fsl_pci_sys_remove(struct fsl_pci *pci);
+
+#endif /* __PCI_H */
#endif /* __KERNEL__ */
--
1.8.1.2
^ permalink raw reply related
* Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
From: Gerhard Sittig @ 2013-08-28 12:08 UTC (permalink / raw)
To: linuxppc-dev, Anatolij Gustschin, linux-arm-kernel; +Cc: Paul Mackerras
In-Reply-To: <1375821851-31609-10-git-send-email-gsi@denx.de>
[ re-created the Cc: list, this is about the PCI clock exclusively ]
Of all the "preparation" patches in the series (parts 01-14/31,
forming the "peripheral driver cleanup" phase before the
introduction of CCF support), this patch remains the last to get
picked up.
But I'd suggest to leave this patch for now (for v3.12, it's
rather late). Either ignore this message and the patch, or see
below for why application isn't required now, and an update of
this patch is needed and will be appropriate for v3.13.
I'm sorry for the confusion, the potentially perceived
instability is a result of both widening the series' scope after
initial submission as well as a recent extension of test coverage
after the scope has been widened. Thank you for your patience!
On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote:
>
> make the Freescale PCI driver get, prepare and enable the PCI clock
> during probe(); the clock gets put upon device close by the devm approach
>
> clock lookup is non-fatal as not all platforms may provide clock specs
> in their device tree, but failure to enable specified clocks are fatal
>
> the driver appears to not have a remove() routine, so no reference to
> the clock is kept during use, and the clock isn't released (the devm
> approach will put the clock, but it won't get disabled or unprepared)
>
> Signed-off-by: Gerhard Sittig <gsi@denx.de>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 46ac1dd..549ff08 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -17,6 +17,8 @@
> ...
What this patch 09/31 does is add a non-fatal device tree based
clock lookup in the fsl_pci_probe() routine, to acquire the PCI
clock item appropriately if there is a provider and a DT spec.
The patch in v4 has a bug, which has an obvious fix while an
update wasn't sent yet, for neither the patch nor the series.
There is one more known issue in the series (not with
functionality but with policy, specifically in a multi platform
configuration), while I don't want to resend the series while
known issues are pending. But this is not the problem here.
First of all the patch is a NOP in the forseeable future. It
won't harm yet its content isn't urgently needed either, to
unbreak stuff or to support upcoming features that were
communicated before.
Further analysis has shown that the patch is incomplete.
The 85xx and 86xx platforms will pass through the fsl_pci_probe()
routine. That these platforms don't have OF clock providers is
not a problem, the patch will remain a NOP then. Its function
will kick in when these platforms may grow clock providers
(things will transparently keep working, this was the actual
intent of the patch). Since the series is about 512x CCF
support, the patch will remain a NOP throughout the whole series,
but won't harm either.
The 83xx and 512x platforms in contrast _don't_ pass through the
fsl_pci_probe() routine, instead they call mpc83xx_add_bridge()
from within the .setup_arch() callback in platform initialization
code, which iterates over the compatible OF nodes, and runs at a
point in time where the platform's clock provider has not yet
been setup and thus is not available. In this situation any
clock lookup will fail, which is not fatal during PCI setup yet
won't acquire the clock item and thus will have the common
infrastructure disable the "unused" clock much later.
There is a workaround for this lack of proper clock acquisition
in the peripheral driver. The clock provider needs to pre-enable
the PCI clock item upon its initialization, because the
peripheral driver can't when it initializes. Checking the same
condition in the provider's pre-enable workaround which the
.setup_arch() routine is checking before the add_bridge() calls
(the presence of compatible nodes) results in correct operation
as well as most appropriate resource use (clock enabled when PCI
hardware was attached to, and clock disabled in the absence of
PCI hardware or driver attachment).
So the update of this patch 09/31 will contain
- the fix for the copy'n'paste bug in the probe() routine
- an appropriate comment in the add_bridge() routine
- no change in its nature, the idea remains unaffected
The backend (clock provider) will contain the pre-enable
workaround for the PCI clock item.
As a result, the 83xx, 85xx, and 86xx platforms won't see any
change (there is a NOP in probe() and a comment in add_bridge(),
neither of which break any operation). The 512x platform will
have proper PCI operation in the presence of common clock
support. Should 8xxx platforms grow CCF support later, they will
transparently keep working (85xx, 86xx), or may add the same
simple yet appropriate workaround (83xx).
So the outline is there, the approach is straight forward and
easily can get implemented, and the resulting code will work for
all platforms while there is no potential for breakage. The PCI
driver will improve, and all is well. :) There is no need for
action for v3.12, and v3.13 can include the improvement.
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [PATCH v8 1/3] DMA: Freescale: revise device tree binding document
From: Mark Rutland @ 2013-08-28 12:48 UTC (permalink / raw)
To: Hongbo Zhang
Cc: devicetree@vger.kernel.org, ian.campbell@citrix.com, Pawel Moll,
swarren@wwwdotorg.org, vinod.koul@intel.com,
linux-kernel@vger.kernel.org, rob.herring@calxeda.com,
djbw@fb.com, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <521DB26F.8010501@freescale.com>
On Wed, Aug 28, 2013 at 09:18:55AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:25 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zhang@freescale.com wrote:
> >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> >>
> >> This patch updates the discription of each type of DMA controller and its
> >> channels, it is preparation for adding another new DMA controller binding, it
> >> also fixes some defects of indent for text alignment at the same time.
> >>
> >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> >> ---
> >> .../devicetree/bindings/powerpc/fsl/dma.txt | 62 +++++++++-----------
> >> 1 file changed, 27 insertions(+), 35 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> index 2a4b4bc..ddf17af 100644
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> @@ -1,33 +1,29 @@
> >> -* Freescale 83xx DMA Controller
> >> +* Freescale DMA Controllers
> >>
> >> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> >> +** Freescale Elo DMA Controller
> >> + This is a little-endian DMA controller, used in Freescale mpc83xx series
> >> + chips such as mpc8315, mpc8349, mpc8379 etc.
> >>
> >> Required properties:
> >>
> >> -- compatible : compatible list, contains 2 entries, first is
> >> - "fsl,CHIP-dma", where CHIP is the processor
> >> - (mpc8349, mpc8360, etc.) and the second is
> >> - "fsl,elo-dma"
> >> -- reg : <registers mapping for DMA general status reg>
> >> -- ranges : Should be defined as specified in 1) to describe the
> >> - DMA controller channels.
> >> +- compatible : must include "fsl,elo-dma"
> > We should list the other values that may be in the list also, unless
> > they are really of no consequence, in which case their presence in dt is
> > questionable.
> Hmm. Stephen questioned here too, it seems this is a default rule.
> Although Scott@freescale had explained our thoughts, I'd like to edit
> this item like this:
>
> "must include "fsl,eloplus-dma", and a "fsl,CHIP-dma" is optional, where
> CHIP is the processor name"
>
> We don't list all the chip name because we have tens of them and we
> cannot list all of them, and it is unnecessary to list them because we
> even don't use "fsl,CHIP-dma" in the new driver, add "fsl,CHIP-dma" here
> just make it questionable when it presents in example and old dts files.
>
> I remove the examples in bracket "(mpc8349, mpc8360, etc.)" because we
> can see the real example below.
> I don't say" if "fsl,CHIP-dma" presents, it should be the first one, and
> the "fsl,eloplus-dma" should be the second" because it is common rule.
> the description language should be clear and concise too I think.
Actually, you've convinced me for the form as you originally converted
it (must include "fsl,elo-dma"), given that the other strings aren't
used to give information anywhere and "fsl,CHIP-dma" doesn't fully
define a valid string.
> >> +- reg : <registers specifier for DMA general status reg>
> >> +- ranges : describes the mapping between the address space of the
> >> + DMA channels and the address space of the DMA controller
> >> - cell-index : controller index. 0 for controller @ 0x8100
> >> -- interrupts : <interrupt mapping for DMA IRQ>
> >> +- interrupts : <interrupt specifier for DMA IRQ>
> >> - interrupt-parent : optional, if needed for interrupt mapping
> >>
> >> -
> >> - DMA channel nodes:
> >> - - compatible : compatible list, contains 2 entries, first is
> >> - "fsl,CHIP-dma-channel", where CHIP is the processor
> >> - (mpc8349, mpc8350, etc.) and the second is
> >> - "fsl,elo-dma-channel". However, see note below.
> >> - - reg : <registers mapping for channel>
> >> + - compatible : must include "fsl,elo-dma-channel"
> >> + However, see note below.
> > Again, I think we should list the other entries that may be in the list.
> > Otherwise it's not clear what the binding defines. Similarly for the
> > other compatible list definitions below...
> >
> >> + - reg : <registers specifier for channel>
> >> - cell-index : dma channel index starts at 0.
> > I realise you haven't changed it, but it's unclear what the cell-index
> > property is (and somewhat confusingly there seem to be multiple
> > defnitions). It might be worth clarifying it while performing the other
> > cleanup.
> not clear with your point "multiple definitions", we really have
> multiple dma channels for one dma controller.
> cell-index is used as channel index, this is an old method used by old
> driver, my patch didn't touch this part.
Sorry, I'd misunderstood the cell-index property. More noise from me.
Given that, this looks fine to me.
Acked-by: Mark Rutland <mark.rutland@arm.com>
> >>
> >> Optional properties:
> >> - - interrupts : <interrupt mapping for DMA channel IRQ>
> >> - (on 83xx this is expected to be identical to
> >> - the interrupts property of the parent node)
> >> + - interrupts : <interrupt specifier for DMA channel IRQ>
> >> + (on 83xx this is expected to be identical to
> >> + the interrupts property of the parent node)
> >> - interrupt-parent : optional, if needed for interrupt mapping
> >>
> >> Example:
> >> @@ -70,30 +66,26 @@ Example:
> >> };
> >> };
> >>
> >> -* Freescale 85xx/86xx DMA Controller
> >> -
> >> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
> >> +** Freescale EloPlus DMA Controller
> >> + This is DMA controller with extended addresses and chaining, mainly used in
> >> + Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as mpc8540, mpc8641
> >> + p4080, bsc9131 etc.
> >>
> >> Required properties:
> >>
> >> -- compatible : compatible list, contains 2 entries, first is
> >> - "fsl,CHIP-dma", where CHIP is the processor
> >> - (mpc8540, mpc8540, etc.) and the second is
> >> - "fsl,eloplus-dma"
> >> -- reg : <registers mapping for DMA general status reg>
> >> +- compatible : must include "fsl,eloplus-dma"
> >> +- reg : <registers specifier for DMA general status reg>
> >> - cell-index : controller index. 0 for controller @ 0x21000,
> >> 1 for controller @ 0xc000
> >> -- ranges : Should be defined as specified in 1) to describe the
> >> - DMA controller channels.
> >> +- ranges : describes the mapping between the address space of the
> >> + DMA channels and the address space of the DMA controller
> >>
> >> - DMA channel nodes:
> >> - - compatible : compatible list, contains 2 entries, first is
> >> - "fsl,CHIP-dma-channel", where CHIP is the processor
> >> - (mpc8540, mpc8560, etc.) and the second is
> >> - "fsl,eloplus-dma-channel". However, see note below.
> >> + - compatible : must include "fsl,eloplus-dma-channel"
> >> + However, see note below.
> >> - cell-index : dma channel index starts at 0.
> >> - - reg : <registers mapping for channel>
> >> - - interrupts : <interrupt mapping for DMA channel IRQ>
> >> + - reg : <registers specifier for channel>
> >> + - interrupts : <interrupt specifier for DMA channel IRQ>
> >> - interrupt-parent : optional, if needed for interrupt mapping
> >>
> >> Example:
> >> --
> >> 1.7.9.5
> > Thanks,
> > Mark.
> >
>
>
>
>
^ permalink raw reply
* Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes
From: Mark Rutland @ 2013-08-28 12:51 UTC (permalink / raw)
To: Hongbo Zhang
Cc: devicetree@vger.kernel.org, ian.campbell@citrix.com, Pawel Moll,
swarren@wwwdotorg.org, vinod.koul@intel.com,
linux-kernel@vger.kernel.org, rob.herring@calxeda.com,
djbw@fb.com, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <521D9E89.7040700@freescale.com>
On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
> On 08/27/2013 07:35 PM, Mark Rutland wrote:
> > On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
> >> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> >>
> >> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> >> the device tree nodes for them.
> >>
> >> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> >> ---
> >> .../devicetree/bindings/powerpc/fsl/dma.txt | 66 ++++++++++++++++
> >> arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 4 +-
> >> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 81 ++++++++++++++++++++
> >> arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi | 81 ++++++++++++++++++++
> >> arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 4 +-
> >> 5 files changed, 232 insertions(+), 4 deletions(-)
> >> create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
> >>
> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> index ddf17af..10fd031 100644
> >> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> >> @@ -126,6 +126,72 @@ Example:
> >> };
> >> };
> >>
> >> +** Freescale Elo3 DMA Controller
> >> + This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
> >> + series chips, such as t1040, t4240, b4860.
> >> +
> >> +Required properties:
> >> +
> >> +- compatible : must include "fsl,elo3-dma"
> >> +- reg : <registers specifier for DMA general status reg>
> >> +- ranges : describes the mapping between the address space of the
> >> + DMA channels and the address space of the DMA controller
> >> +
> >> +- DMA channel nodes:
> >> + - compatible : must include "fsl,eloplus-dma-channel"
> >> + - reg : <registers specifier for channel>
> >> + - interrupts : <interrupt specifier for DMA channel IRQ>
> >> + - interrupt-parent : optional, if needed for interrupt mapping
> >> +
> >> +Example:
> >> +dma@100300 {
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + compatible = "fsl,elo3-dma";
> >> + reg = <0x100300 0x4 0x100600 0x4>;
> > Is that one reg entry where #size-cells=2 and #address-cells=2?
> >
> > That's what the binding implies (given it only describes a single reg
> > entry).
> >
> > if it's two entries, we should make that explicit (both in the binding
> > and example):
> >
> > reg = <0x100300 0x4>,
> > <0x100600 0x4>;
> Yes they are two entries, I will change it this way.
Ok. Could you make sure you document what the two reg entries correspond
to? That's not clear from "<registers specifier for channel>".
> >> + ranges = <0x0 0x100100 0x500>;
> > If it is one reg entry then the example ranges property isn't big enough
> > to contain the parent-bus-address.
> They are two reg entries, so the range is big enough.
Ok.
> >
> >> + dma-channel@0 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x0 0x80>;
> >> + interrupts = <28 2 0 0>;
> >> + };
> >> + dma-channel@80 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x80 0x80>;
> >> + interrupts = <29 2 0 0>;
> >> + };
> >> + dma-channel@100 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x100 0x80>;
> >> + interrupts = <30 2 0 0>;
> >> + };
> >> + dma-channel@180 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x180 0x80>;
> >> + interrupts = <31 2 0 0>;
> >> + };
> >> + dma-channel@300 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x300 0x80>;
> >> + interrupts = <76 2 0 0>;
> >> + };
> >> + dma-channel@380 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x380 0x80>;
> >> + interrupts = <77 2 0 0>;
> >> + };
> >> + dma-channel@400 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x400 0x80>;
> >> + interrupts = <78 2 0 0>;
> >> + };
> >> + dma-channel@480 {
> >> + compatible = "fsl,eloplus-dma-channel";
> >> + reg = <0x480 0x80>;
> >> + interrupts = <79 2 0 0>;
> >> + };
> >> +};
> >> +
> >> Note on DMA channel compatible properties: The compatible property must say
> >> "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> >> driver (fsldma). Any DMA channel used by fsldma cannot be used by another
> >> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> index 7399154..ea53ea1 100644
> >> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
> >> @@ -223,13 +223,13 @@
> >> reg = <0xe2000 0x1000>;
> >> };
> >>
> >> -/include/ "qoriq-dma-0.dtsi"
> >> +/include/ "elo3-dma-0.dtsi"
> >> dma@100300 {
> >> fsl,iommu-parent = <&pamu0>;
> >> fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
> >> };
> >>
> >> -/include/ "qoriq-dma-1.dtsi"
> >> +/include/ "elo3-dma-1.dtsi"
> >> dma@101300 {
> >> fsl,iommu-parent = <&pamu0>;
> >> fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
> >> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> new file mode 100644
> >> index 0000000..69a3277
> >> --- /dev/null
> >> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
> >> @@ -0,0 +1,81 @@
> >> +/*
> >> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
> > Copy-pasted?
> >
> > Presumably should be "Elo3 DMA devicetree stub", or similar?
> >
> > Similarly for elo3-dma-1.dtsi.
> Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series
> chips.
> To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"
That sounds good to me.
Cheers,
Mark.
^ permalink raw reply
* Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
From: Gerhard Sittig @ 2013-08-28 13:50 UTC (permalink / raw)
To: linuxppc-dev, Anatolij Gustschin, Mike Turquette,
linux-arm-kernel, devicetree
Cc: Detlev Zundel, Wolfram Sang, Greg Kroah-Hartman, Rob Herring,
Mark Brown, Marc Kleine-Budde, David Woodhouse,
Wolfgang Grandegger, Mauro Carvalho Chehab
In-Reply-To: <1375821851-31609-1-git-send-email-gsi@denx.de>
[ summary for the busy or the impatient:
this is a status update on the series
- peripheral driver cleanup considered appropriate for v3.12
- common clock support introduction isn't ready yet
- which in turn holds subsequent parts
- while the overall shape of the series is looking good ]
On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote:
>
> this series
> - fixes several drivers that are used in the MPC512x platform (UART,
> SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
> handle clocks (appropriately acquire and setup them, hold references
> during use, release clocks after use)
> - introduces support for the common clock framework (CCF, COMMON_CLK
> Kconfig option) in the PowerPC based MPC512x platform, which brings
> device tree based clock lookup as well
>
> although the series does touch several subsystems -- tty (serial), spi,
> net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of
> the patches are strictly clock related or trivial
>
> it appears most appropriate to take this series through either the clk
> or the powerpc trees after it has passed review and other subsystem
> maintainers ACKed the clock setup related driver modifications
Since the status of this series was questioned recently, I felt
that I should officially and publicly provide a status update in
the absence of a v5 submission update.
The series has undergone some review and has received changes as
concerns were raised and feedback was provided. While I consider
the nature and frequency of the changes totally appropriate --
each revision addressed all of the issues raised, and did so in
an appropriate manner, but could not forsee what else would be
raised upon re-submission. Actually not sending another version
before _all_ concerns are addressed appropriately is what held
back submission of v5. See the phase overview below for details.
Adding the cleanup of existing code before the introduction of
new features did widen the scope of the series, yet has heavily
improved the series, and the feedback was gratefully accepted and
thoroughly got addressed.
Actually this driver cleanup, which only was introduced after
initial submission upon Mark's request, could be considered the
most desirable part of the series at this very point in time.
And as I write this, the patches of the "peripheral driver
cleanup" phase are being picked up for v3.12 after they have
become stable in the review iterations.
Further extension of test coverage for the series after
submission of v4 has led to minimal fixes in CAN, USB, and PCI,
and has revealed one problem in multi platform configurations
which currently is the only remaining blocker for phase 2 and
subsequent steps. While phase 1 with its obvious cleanup is
stable and has become desirable and acceptable and currently is
being picked up.
The current status of the v4 series in detail is:
Phase 1, patches 01-14/31, peripheral driver cleanup and DTS
improvement: has addressed all concerns raised, and can be
applied via any subtree in any order since the parts are
independent from each other, with a few minor additions
- USB 03/31 received another adjustment of the clock lookup 'dev'
parameter, the applied version works in all three cases of the
PPC_CLOCK implementation where clock names are global, the CCF
implementation with clkdev registration (during migration), and
the CCF implementation with device tree based clock lookup (the
end result of the series); the v4 patch wasn't broken but just
in need of an addendum before/within phase 3, which now was
folded into phase 1
- PCI 09/31 had a compile error on 85xx/86xx due to a
copy'n'paste bug in an error path; since the (fixed) patch
still remains a NOP for now and within the whole series, I have
suggested to leave this patch for v3.12, and to address the
remaining issue of the PCI driver patch being incomplete later,
see the followup for 09/31 for details (what gets added in a
future version is another comment in the PCI driver and a
workaround in the clock provider backend, because in the given
implementation the peripheral driver cannot appropriately
acquire its clock item on some platforms)
- CAN 11/31 could save one more instruction by adding another
jump label in the error path instead of explicit undo of a
setup step, Marc's suggestion was implemented and has been
applied
So all parts of phase 1 (with the exception of the PCI driver
change which is and remains a NOP) were applied, and followup
patches for fixup were avoided. Nothing was broken, no breakage
was introduced, it's all about improvements.
Phase 2, patches 15-18/31, introduction of CCF support for
MPC512x: works correctly for MPC512x and doesn't break other
platforms, but won't work in multi platform configurations with
MPC52xx (PPC_CLOCK and COMMON_CLK will collide in the linker),
shall not be considered for v3.12, multi platform needs to get
sorted out before consideration for v3.13 (and is the only known
issue of the series feature- or policy-wise)
Phase 3, patches 20,21,23-28/31, adoption of peripheral drivers
to the CCF world: is complete feature-wise and recently has
received even more test coverage than before, remaining fixes got
folded into phase 1, patches of phase 3 depend on CCF support
which gets introduced in phase 2, and the "workaround removal"
aspects of phase 3 will explicitly be moved to phase 4 while the
content remains unaffected (mere split and re-order)
Phase 4, patches 19,22,29-31/31, removal of migration support
after complete adoption: is complete feature-wise, but partial
removal of workarounds and compatibility from phase 3 shall move
explicitly to phase 4, to more strictly tell those phases apart
and for collision free application via individual subtrees if
application through a single tree cannot be done, so a mere
re-ordering remains to get communicated while nothing changes in
the content (re-ordering the sequence as well as verifying that
the patches in phase 3 are independent from each other has
already been done internally)
To summarize:
- The series is in a good shape, one multi platform issue needs
to get addressed, everything else either is already there or
just needs to get communicated.
- Phase 1 with the obvious cleanup is being considered for v3.12,
and patches have been queued in their respective subtrees.
- Phase 2 will become acceptable when the multi platform
configuration has been sorted out. Each platform works in
itself, just not the combination of 52xx and 512x, and actually
MPC52xx could be considered the out-lier here (is the only
remaining user of PPC_CLOCK, and does so with a dummy
implementation in the absence of a real provider).
- Phases 3 and 4 are "complete" but depend on phase 2. What
remains is a re-sort of the CCF adjustment and the migration
support removal aspects.
Thanks to those involved in the feedback and application so far!
In my eyes, changes have been few, and necessary, and always an
improvement. Regardless of which potential for further
improvement remains, which just happens to be way outside of the
scope of the series (power consumption aspects that neither have
been addressed nor prepared before, or CCF support for other
PowerPC based platforms maybe).
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* [PATCH] powerpc/mpc8xx: Clearer Oops message for Software Emulation Exception
From: Christophe Leroy @ 2013-08-28 14:19 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras; +Cc: linuxppc-dev, linux-kernel
This patch modifies the Oops message in case of Software Emulation Exception.
The existing message is quite confusing because it refers to FPU Emulation
while most often the issue is due to either a non supported instruction
(not necessarily FPU related) or a stale instruction due to HW issues.
The new message tries to be more generic in order to make the user understand
that the Oops is due to something wrong with an instruction, not necessarily
due to an FPU instruction.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
diff -ur linux-3.11-rc6/arch/powerpc/kernel/traps.c linux/arch/powerpc/kernel/traps.c
--- linux-3.11-rc6/arch/powerpc/kernel/traps.c 2013-08-25 15:20:33.000000000 +0200
+++ linux/arch/powerpc/kernel/traps.c 2013-08-25 15:31:29.000000000 +0200
@@ -1476,7 +1476,8 @@
if (!user_mode(regs)) {
debugger(regs);
- die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
+ die("Kernel Mode Unimplemented Instruction or SW FPU Emulation",
+ regs, SIGFPE);
}
#ifdef CONFIG_MATH_EMULATION
^ permalink raw reply
* Re: [PATCH] arch: powerpc: kvm: add signed type cast for comparation
From: Alexander Graf @ 2013-08-28 14:24 UTC (permalink / raw)
To: Chen Gang
Cc: Gleb Natapov, kvm, kvm-ppc, Paul Mackerras, pbonzini,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <51FF3D0B.6050609@asianux.com>
On 05.08.2013, at 07:50, Chen Gang wrote:
> On 08/05/2013 12:34 PM, Paul Mackerras wrote:
>> On Mon, Jul 22, 2013 at 02:32:35PM +0800, Chen Gang wrote:
>>>> 'rmls' is 'unsigned long', lpcr_rmls() will return negative number when
>>>> failure occurs, so it need a type cast for comparing.
>>>>
>>>> 'lpid' is 'unsigned long', kvmppc_alloc_lpid() return negative number
>>>> when failure occurs, so it need a type cast for comparing.
>>>>
>>>>
>>>> Signed-off-by: Chen Gang <gang.chen@asianux.com>
>> Looks right, thanks.
>>
>> Acked-by: Paul Mackerras <paulus@samba.org>
>>
>>
>
> Thank you very much.
Thanks, applied to kvm-ppc-queue.
Alex
^ permalink raw reply
* Re: [PATCH] KVM: PPC: Book3S PR: return appropriate error when allocation fails
From: Alexander Graf @ 2013-08-28 14:26 UTC (permalink / raw)
To: Thadeu Lima de Souza Cascardo
Cc: Gleb Natapov, kvm, linux-kernel, kvm-ppc, Paul Mackerras,
Paolo Bonzini, linuxppc-dev
In-Reply-To: <1374073829-28246-1-git-send-email-cascardo@linux.vnet.ibm.com>
On 17.07.2013, at 17:10, Thadeu Lima de Souza Cascardo wrote:
> err was overwritten by a previous function call, and checked to be 0. If
> the following page allocation fails, 0 is going to be returned instead
> of -ENOMEM.
>
> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Thanks, applied to kvm-ppc-queue.
Alex
^ permalink raw reply
* Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
From: Gerhard Sittig @ 2013-08-28 15:59 UTC (permalink / raw)
To: linuxppc-dev, Anatolij Gustschin, linux-arm-kernel,
Benjamin Herrenschmidt, Paul Mackerras, Kumar Gala
In-Reply-To: <20130828120827.GB26379@book.gsilab.sittig.org>
On Wed, Aug 28, 2013 at 14:08 +0200, Gerhard Sittig wrote:
>
> [ re-created the Cc: list, this is about the PCI clock exclusively ]
I just noticed by coincidence that the message which I received
back from the linuxppc-dev ML appeared to have dropped Benjamin
Herrenschmidt and Kumar Gala from the Cc: list -- while they do
appear in the header of the message that I have sent and I can't
see what might have caused the loss of information. :-O
Do you want me to re-send the message for the benefit of
potential followups, or is it OK that you receive the message via
the list but potentially without the Cc: attribute?
The message was mostly "for your information" and contained a
status update, while no action is required or problems need to
get resolved.
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [PATCH V3] i2c: move of helpers into the core
From: Grant Likely @ 2013-08-28 19:24 UTC (permalink / raw)
To: Wolfram Sang, linux-i2c
Cc: devel, devicetree, davinci-linux-open-source, linux-samsung-soc,
alsa-devel, linux-doc, Wolfram Sang, linux-kernel, dri-devel,
linux-acpi, linux-tegra, linux-omap, linuxppc-dev,
linux-arm-kernel, linux-media
In-Reply-To: <1377187217-31820-1-git-send-email-wsa@the-dreams.de>
On Thu, 22 Aug 2013 18:00:14 +0200, Wolfram Sang <wsa@the-dreams.de> wrote:
> I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
> that it is much cleaner to have this in the core. This also removes a
> circular dependency between the helpers and the core, and so we can
> finally register child nodes in the core instead of doing this manually
> in each driver. So, fix the drivers and documentation, too.
>
> Acked-by: Rob Herring <rob.herring@calxeda.com>
> Reviewed-by: Felipe Balbi <balbi@ti.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Grant Likely <grant.likely@linaro.org>
> ---
>
> V2->V3: Was trying to be too smart by only fixing includes needed.
> Took a more general approach this time, converting of_i2c.h
> to i2c.h in case i2c.h was not already there. Otherwise
> remove it. Improved my build scripts and no build failures,
> no complaints from buildbot as well.
>
>
> Documentation/acpi/enumeration.txt | 1 -
> arch/powerpc/platforms/44x/warp.c | 1 -
> drivers/gpu/drm/tilcdc/tilcdc_slave.c | 1 -
> drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 1 -
> drivers/gpu/host1x/drm/output.c | 2 +-
> drivers/i2c/busses/i2c-at91.c | 3 -
> drivers/i2c/busses/i2c-cpm.c | 6 --
> drivers/i2c/busses/i2c-davinci.c | 2 -
> drivers/i2c/busses/i2c-designware-platdrv.c | 2 -
> drivers/i2c/busses/i2c-gpio.c | 3 -
> drivers/i2c/busses/i2c-i801.c | 2 -
> drivers/i2c/busses/i2c-ibm_iic.c | 4 -
> drivers/i2c/busses/i2c-imx.c | 3 -
> drivers/i2c/busses/i2c-mpc.c | 2 -
> drivers/i2c/busses/i2c-mv64xxx.c | 3 -
> drivers/i2c/busses/i2c-mxs.c | 3 -
> drivers/i2c/busses/i2c-nomadik.c | 3 -
> drivers/i2c/busses/i2c-ocores.c | 3 -
> drivers/i2c/busses/i2c-octeon.c | 3 -
> drivers/i2c/busses/i2c-omap.c | 3 -
> drivers/i2c/busses/i2c-pnx.c | 3 -
> drivers/i2c/busses/i2c-powermac.c | 9 +-
> drivers/i2c/busses/i2c-pxa.c | 2 -
> drivers/i2c/busses/i2c-s3c2410.c | 2 -
> drivers/i2c/busses/i2c-sh_mobile.c | 2 -
> drivers/i2c/busses/i2c-sirf.c | 3 -
> drivers/i2c/busses/i2c-stu300.c | 2 -
> drivers/i2c/busses/i2c-tegra.c | 3 -
> drivers/i2c/busses/i2c-versatile.c | 2 -
> drivers/i2c/busses/i2c-wmt.c | 3 -
> drivers/i2c/busses/i2c-xiic.c | 3 -
> drivers/i2c/i2c-core.c | 109 +++++++++++++++++++++-
> drivers/i2c/i2c-mux.c | 3 -
> drivers/i2c/muxes/i2c-arb-gpio-challenge.c | 1 -
> drivers/i2c/muxes/i2c-mux-gpio.c | 1 -
> drivers/i2c/muxes/i2c-mux-pinctrl.c | 1 -
> drivers/media/platform/exynos4-is/fimc-is-i2c.c | 4 +-
> drivers/media/platform/exynos4-is/fimc-is.c | 2 +-
> drivers/media/platform/exynos4-is/media-dev.c | 1 -
> drivers/of/Kconfig | 6 --
> drivers/of/Makefile | 1 -
> drivers/of/of_i2c.c | 114 -----------------------
> drivers/staging/imx-drm/imx-tve.c | 2 +-
> include/linux/i2c.h | 20 ++++
> include/linux/of_i2c.h | 46 ---------
> sound/soc/fsl/imx-sgtl5000.c | 2 +-
> sound/soc/fsl/imx-wm8962.c | 2 +-
> 47 files changed, 138 insertions(+), 262 deletions(-)
> delete mode 100644 drivers/of/of_i2c.c
> delete mode 100644 include/linux/of_i2c.h
>
> diff --git a/Documentation/acpi/enumeration.txt b/Documentation/acpi/enumeration.txt
> index d9be7a9..958266e 100644
> --- a/Documentation/acpi/enumeration.txt
> +++ b/Documentation/acpi/enumeration.txt
> @@ -238,7 +238,6 @@ An I2C bus (controller) driver does:
> if (ret)
> /* handle error */
>
> - of_i2c_register_devices(adapter);
> /* Enumerate the slave devices behind this bus via ACPI */
> acpi_i2c_register_devices(adapter);
>
> diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
> index 4cfa499..534574a 100644
> --- a/arch/powerpc/platforms/44x/warp.c
> +++ b/arch/powerpc/platforms/44x/warp.c
> @@ -16,7 +16,6 @@
> #include <linux/interrupt.h>
> #include <linux/delay.h>
> #include <linux/of_gpio.h>
> -#include <linux/of_i2c.h>
> #include <linux/slab.h>
> #include <linux/export.h>
>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.c b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
> index dfffaf0..a19f657 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
> @@ -16,7 +16,6 @@
> */
>
> #include <linux/i2c.h>
> -#include <linux/of_i2c.h>
> #include <linux/pinctrl/pinmux.h>
> #include <linux/pinctrl/consumer.h>
> #include <drm/drm_encoder_slave.h>
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
> index 925c7cd..c38b56b 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
> @@ -16,7 +16,6 @@
> */
>
> #include <linux/i2c.h>
> -#include <linux/of_i2c.h>
> #include <linux/gpio.h>
> #include <linux/of_gpio.h>
> #include <linux/pinctrl/pinmux.h>
> diff --git a/drivers/gpu/host1x/drm/output.c b/drivers/gpu/host1x/drm/output.c
> index 8140fc6..137ae81 100644
> --- a/drivers/gpu/host1x/drm/output.c
> +++ b/drivers/gpu/host1x/drm/output.c
> @@ -9,7 +9,7 @@
>
> #include <linux/module.h>
> #include <linux/of_gpio.h>
> -#include <linux/of_i2c.h>
> +#include <linux/i2c.h>
>
> #include "drm.h"
>
> diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
> index 6bb839b..fd05930 100644
> --- a/drivers/i2c/busses/i2c-at91.c
> +++ b/drivers/i2c/busses/i2c-at91.c
> @@ -28,7 +28,6 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> -#include <linux/of_i2c.h>
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> #include <linux/platform_data/dma-atmel.h>
> @@ -775,8 +774,6 @@ static int at91_twi_probe(struct platform_device *pdev)
> return rc;
> }
>
> - of_i2c_register_devices(&dev->adapter);
> -
> dev_info(dev->dev, "AT91 i2c bus driver.\n");
> return 0;
> }
> diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
> index 2e1f7eb..b2b8aa9 100644
> --- a/drivers/i2c/busses/i2c-cpm.c
> +++ b/drivers/i2c/busses/i2c-cpm.c
> @@ -42,7 +42,6 @@
> #include <linux/dma-mapping.h>
> #include <linux/of_device.h>
> #include <linux/of_platform.h>
> -#include <linux/of_i2c.h>
> #include <sysdev/fsl_soc.h>
> #include <asm/cpm.h>
>
> @@ -681,11 +680,6 @@ static int cpm_i2c_probe(struct platform_device *ofdev)
> dev_dbg(&ofdev->dev, "hw routines for %s registered.\n",
> cpm->adap.name);
>
> - /*
> - * register OF I2C devices
> - */
> - of_i2c_register_devices(&cpm->adap);
> -
> return 0;
> out_shut:
> cpm_i2c_shutdown(cpm);
> diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
> index fa55605..62be3b3 100644
> --- a/drivers/i2c/busses/i2c-davinci.c
> +++ b/drivers/i2c/busses/i2c-davinci.c
> @@ -38,7 +38,6 @@
> #include <linux/slab.h>
> #include <linux/cpufreq.h>
> #include <linux/gpio.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_device.h>
>
> #include <mach/hardware.h>
> @@ -728,7 +727,6 @@ static int davinci_i2c_probe(struct platform_device *pdev)
> dev_err(&pdev->dev, "failure adding adapter\n");
> goto err_unuse_clocks;
> }
> - of_i2c_register_devices(adap);
>
> return 0;
>
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
> index 4c5fada..27ea436 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -35,7 +35,6 @@
> #include <linux/err.h>
> #include <linux/interrupt.h>
> #include <linux/of.h>
> -#include <linux/of_i2c.h>
> #include <linux/platform_device.h>
> #include <linux/pm.h>
> #include <linux/pm_runtime.h>
> @@ -172,7 +171,6 @@ static int dw_i2c_probe(struct platform_device *pdev)
> dev_err(&pdev->dev, "failure adding adapter\n");
> return r;
> }
> - of_i2c_register_devices(adap);
> acpi_i2c_register_devices(adap);
>
> pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
> diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
> index bc6e139..e5da9fe 100644
> --- a/drivers/i2c/busses/i2c-gpio.c
> +++ b/drivers/i2c/busses/i2c-gpio.c
> @@ -16,7 +16,6 @@
> #include <linux/platform_device.h>
> #include <linux/gpio.h>
> #include <linux/of_gpio.h>
> -#include <linux/of_i2c.h>
>
> struct i2c_gpio_private_data {
> struct i2c_adapter adap;
> @@ -224,8 +223,6 @@ static int i2c_gpio_probe(struct platform_device *pdev)
> if (ret)
> goto err_add_bus;
>
> - of_i2c_register_devices(adap);
> -
> platform_set_drvdata(pdev, priv);
>
> dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n",
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> index 4ebceed..4296d17 100644
> --- a/drivers/i2c/busses/i2c-i801.c
> +++ b/drivers/i2c/busses/i2c-i801.c
> @@ -87,7 +87,6 @@
> #include <linux/slab.h>
> #include <linux/wait.h>
> #include <linux/err.h>
> -#include <linux/of_i2c.h>
>
> #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
> defined CONFIG_DMI
> @@ -1230,7 +1229,6 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
> goto exit_free_irq;
> }
>
> - of_i2c_register_devices(&priv->adapter);
> i801_probe_optional_slaves(priv);
> /* We ignore errors - multiplexing is optional */
> i801_add_mux(priv);
> diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
> index 973f516..ff3caa0 100644
> --- a/drivers/i2c/busses/i2c-ibm_iic.c
> +++ b/drivers/i2c/busses/i2c-ibm_iic.c
> @@ -42,7 +42,6 @@
> #include <linux/io.h>
> #include <linux/i2c.h>
> #include <linux/of_platform.h>
> -#include <linux/of_i2c.h>
>
> #include "i2c-ibm_iic.h"
>
> @@ -759,9 +758,6 @@ static int iic_probe(struct platform_device *ofdev)
> dev_info(&ofdev->dev, "using %s mode\n",
> dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
>
> - /* Now register all the child nodes */
> - of_i2c_register_devices(adap);
> -
> return 0;
>
> error_cleanup:
> diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
> index e242797..bbbea6b 100644
> --- a/drivers/i2c/busses/i2c-imx.c
> +++ b/drivers/i2c/busses/i2c-imx.c
> @@ -50,7 +50,6 @@
> #include <linux/slab.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> -#include <linux/of_i2c.h>
> #include <linux/platform_data/i2c-imx.h>
>
> /** Defines ********************************************************************
> @@ -570,8 +569,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
> return ret;
> }
>
> - of_i2c_register_devices(&i2c_imx->adapter);
> -
> /* Set up platform driver data */
> platform_set_drvdata(pdev, i2c_imx);
>
> diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
> index 7607dc0..9f2513d 100644
> --- a/drivers/i2c/busses/i2c-mpc.c
> +++ b/drivers/i2c/busses/i2c-mpc.c
> @@ -18,7 +18,6 @@
> #include <linux/sched.h>
> #include <linux/init.h>
> #include <linux/of_platform.h>
> -#include <linux/of_i2c.h>
> #include <linux/slab.h>
>
> #include <linux/io.h>
> @@ -691,7 +690,6 @@ static int fsl_i2c_probe(struct platform_device *op)
> dev_err(i2c->dev, "failed to add adapter\n");
> goto fail_add;
> }
> - of_i2c_register_devices(&i2c->adap);
>
> return result;
>
> diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
> index b1f42bf..8220322 100644
> --- a/drivers/i2c/busses/i2c-mv64xxx.c
> +++ b/drivers/i2c/busses/i2c-mv64xxx.c
> @@ -21,7 +21,6 @@
> #include <linux/of.h>
> #include <linux/of_device.h>
> #include <linux/of_irq.h>
> -#include <linux/of_i2c.h>
> #include <linux/clk.h>
> #include <linux/err.h>
>
> @@ -689,8 +688,6 @@ mv64xxx_i2c_probe(struct platform_device *pd)
> goto exit_free_irq;
> }
>
> - of_i2c_register_devices(&drv_data->adapter);
> -
> return 0;
>
> exit_free_irq:
> diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
> index df8ff5a..62ed07d 100644
> --- a/drivers/i2c/busses/i2c-mxs.c
> +++ b/drivers/i2c/busses/i2c-mxs.c
> @@ -27,7 +27,6 @@
> #include <linux/stmp_device.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> -#include <linux/of_i2c.h>
> #include <linux/dma-mapping.h>
> #include <linux/dmaengine.h>
>
> @@ -701,8 +700,6 @@ static int mxs_i2c_probe(struct platform_device *pdev)
> return err;
> }
>
> - of_i2c_register_devices(adap);
> -
> return 0;
> }
>
> diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
> index 512dfe6..519df17 100644
> --- a/drivers/i2c/busses/i2c-nomadik.c
> +++ b/drivers/i2c/busses/i2c-nomadik.c
> @@ -24,7 +24,6 @@
> #include <linux/pm_runtime.h>
> #include <linux/platform_data/i2c-nomadik.h>
> #include <linux/of.h>
> -#include <linux/of_i2c.h>
> #include <linux/pinctrl/consumer.h>
>
> #define DRIVER_NAME "nmk-i2c"
> @@ -1045,8 +1044,6 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id)
> goto err_add_adap;
> }
>
> - of_i2c_register_devices(adap);
> -
> pm_runtime_put(&adev->dev);
>
> return 0;
> diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
> index 0e1f824..0a52b78 100644
> --- a/drivers/i2c/busses/i2c-ocores.c
> +++ b/drivers/i2c/busses/i2c-ocores.c
> @@ -24,7 +24,6 @@
> #include <linux/i2c-ocores.h>
> #include <linux/slab.h>
> #include <linux/io.h>
> -#include <linux/of_i2c.h>
> #include <linux/log2.h>
>
> struct ocores_i2c {
> @@ -435,8 +434,6 @@ static int ocores_i2c_probe(struct platform_device *pdev)
> if (pdata) {
> for (i = 0; i < pdata->num_devices; i++)
> i2c_new_device(&i2c->adap, pdata->devices + i);
> - } else {
> - of_i2c_register_devices(&i2c->adap);
> }
>
> return 0;
> diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
> index 956fe32..b929ba2 100644
> --- a/drivers/i2c/busses/i2c-octeon.c
> +++ b/drivers/i2c/busses/i2c-octeon.c
> @@ -15,7 +15,6 @@
> #include <linux/interrupt.h>
> #include <linux/kernel.h>
> #include <linux/module.h>
> -#include <linux/of_i2c.h>
> #include <linux/delay.h>
> #include <linux/sched.h>
> #include <linux/slab.h>
> @@ -599,8 +598,6 @@ static int octeon_i2c_probe(struct platform_device *pdev)
> }
> dev_info(i2c->dev, "version %s\n", DRV_VERSION);
>
> - of_i2c_register_devices(&i2c->adap);
> -
> return 0;
>
> out:
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 142b694d..a9f0f80 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -38,7 +38,6 @@
> #include <linux/clk.h>
> #include <linux/io.h>
> #include <linux/of.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_device.h>
> #include <linux/slab.h>
> #include <linux/i2c-omap.h>
> @@ -1245,8 +1244,6 @@ omap_i2c_probe(struct platform_device *pdev)
> dev_info(dev->dev, "bus %d rev%d.%d at %d kHz\n", adap->nr,
> major, minor, dev->speed);
>
> - of_i2c_register_devices(adap);
> -
> pm_runtime_mark_last_busy(dev->dev);
> pm_runtime_put_autosuspend(dev->dev);
>
> diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
> index 5f39c6d..7b57d67 100644
> --- a/drivers/i2c/busses/i2c-pnx.c
> +++ b/drivers/i2c/busses/i2c-pnx.c
> @@ -23,7 +23,6 @@
> #include <linux/err.h>
> #include <linux/clk.h>
> #include <linux/slab.h>
> -#include <linux/of_i2c.h>
>
> #define I2C_PNX_TIMEOUT_DEFAULT 10 /* msec */
> #define I2C_PNX_SPEED_KHZ_DEFAULT 100
> @@ -741,8 +740,6 @@ static int i2c_pnx_probe(struct platform_device *pdev)
> goto out_irq;
> }
>
> - of_i2c_register_devices(&alg_data->adapter);
> -
> dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
> alg_data->adapter.name, res->start, alg_data->irq);
>
> diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
> index 8dc90da..1010f2e 100644
> --- a/drivers/i2c/busses/i2c-powermac.c
> +++ b/drivers/i2c/busses/i2c-powermac.c
> @@ -440,7 +440,9 @@ static int i2c_powermac_probe(struct platform_device *dev)
> adapter->algo = &i2c_powermac_algorithm;
> i2c_set_adapdata(adapter, bus);
> adapter->dev.parent = &dev->dev;
> - adapter->dev.of_node = dev->dev.of_node;
> +
> + /* Clear of_node to skip automatic registration of i2c child nodes */
> + adapter->dev.of_node = NULL;
> rc = i2c_add_adapter(adapter);
> if (rc) {
> printk(KERN_ERR "i2c-powermac: Adapter %s registration "
> @@ -450,9 +452,8 @@ static int i2c_powermac_probe(struct platform_device *dev)
>
> printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
>
> - /* Cannot use of_i2c_register_devices() due to Apple device-tree
> - * funkyness
> - */
> + /* Use custom child registration due to Apple device-tree funkyness */
> + adapter->dev.of_node = dev->dev.of_node;
> i2c_powermac_register_devices(adapter, bus);
>
> return rc;
> diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
> index fbafed2..bc65014 100644
> --- a/drivers/i2c/busses/i2c-pxa.c
> +++ b/drivers/i2c/busses/i2c-pxa.c
> @@ -31,7 +31,6 @@
> #include <linux/i2c-pxa.h>
> #include <linux/of.h>
> #include <linux/of_device.h>
> -#include <linux/of_i2c.h>
> #include <linux/platform_device.h>
> #include <linux/err.h>
> #include <linux/clk.h>
> @@ -1185,7 +1184,6 @@ static int i2c_pxa_probe(struct platform_device *dev)
> printk(KERN_INFO "I2C: Failed to add bus\n");
> goto eadapt;
> }
> - of_i2c_register_devices(&i2c->adap);
>
> platform_set_drvdata(dev, i2c);
>
> diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
> index cab1c91..643426e 100644
> --- a/drivers/i2c/busses/i2c-s3c2410.c
> +++ b/drivers/i2c/busses/i2c-s3c2410.c
> @@ -36,7 +36,6 @@
> #include <linux/cpufreq.h>
> #include <linux/slab.h>
> #include <linux/io.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_gpio.h>
> #include <linux/pinctrl/consumer.h>
>
> @@ -1154,7 +1153,6 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
> return ret;
> }
>
> - of_i2c_register_devices(&i2c->adap);
> platform_set_drvdata(pdev, i2c);
>
> pm_runtime_enable(&pdev->dev);
> diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
> index debf745..aa1268f 100644
> --- a/drivers/i2c/busses/i2c-sh_mobile.c
> +++ b/drivers/i2c/busses/i2c-sh_mobile.c
> @@ -27,7 +27,6 @@
> #include <linux/platform_device.h>
> #include <linux/interrupt.h>
> #include <linux/i2c.h>
> -#include <linux/of_i2c.h>
> #include <linux/err.h>
> #include <linux/pm_runtime.h>
> #include <linux/clk.h>
> @@ -758,7 +757,6 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
> "I2C adapter %d with bus speed %lu Hz (L/H=%x/%x)\n",
> adap->nr, pd->bus_speed, pd->iccl, pd->icch);
>
> - of_i2c_register_devices(adap);
> return 0;
>
> err_all:
> diff --git a/drivers/i2c/busses/i2c-sirf.c b/drivers/i2c/busses/i2c-sirf.c
> index a63c7d5..0ff22e2 100644
> --- a/drivers/i2c/busses/i2c-sirf.c
> +++ b/drivers/i2c/busses/i2c-sirf.c
> @@ -12,7 +12,6 @@
> #include <linux/slab.h>
> #include <linux/platform_device.h>
> #include <linux/i2c.h>
> -#include <linux/of_i2c.h>
> #include <linux/clk.h>
> #include <linux/err.h>
> #include <linux/io.h>
> @@ -366,8 +365,6 @@ static int i2c_sirfsoc_probe(struct platform_device *pdev)
>
> clk_disable(clk);
>
> - of_i2c_register_devices(adap);
> -
> dev_info(&pdev->dev, " I2C adapter ready to operate\n");
>
> return 0;
> diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
> index d1a6b20..047546c 100644
> --- a/drivers/i2c/busses/i2c-stu300.c
> +++ b/drivers/i2c/busses/i2c-stu300.c
> @@ -17,7 +17,6 @@
> #include <linux/clk.h>
> #include <linux/io.h>
> #include <linux/slab.h>
> -#include <linux/of_i2c.h>
>
> /* the name of this kernel module */
> #define NAME "stu300"
> @@ -936,7 +935,6 @@ stu300_probe(struct platform_device *pdev)
> platform_set_drvdata(pdev, dev);
> dev_info(&pdev->dev, "ST DDC I2C @ %p, irq %d\n",
> dev->virtbase, dev->irq);
> - of_i2c_register_devices(adap);
>
> return 0;
> }
> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
> index 9aa1b60..c457cb4 100644
> --- a/drivers/i2c/busses/i2c-tegra.c
> +++ b/drivers/i2c/busses/i2c-tegra.c
> @@ -25,7 +25,6 @@
> #include <linux/interrupt.h>
> #include <linux/delay.h>
> #include <linux/slab.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_device.h>
> #include <linux/module.h>
> #include <linux/clk/tegra.h>
> @@ -802,8 +801,6 @@ static int tegra_i2c_probe(struct platform_device *pdev)
> return ret;
> }
>
> - of_i2c_register_devices(&i2c_dev->adapter);
> -
> return 0;
> }
>
> diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
> index f3a8790..6bb3a89 100644
> --- a/drivers/i2c/busses/i2c-versatile.c
> +++ b/drivers/i2c/busses/i2c-versatile.c
> @@ -16,7 +16,6 @@
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> #include <linux/io.h>
> -#include <linux/of_i2c.h>
>
> #define I2C_CONTROL 0x00
> #define I2C_CONTROLS 0x00
> @@ -108,7 +107,6 @@ static int i2c_versatile_probe(struct platform_device *dev)
> ret = i2c_bit_add_numbered_bus(&i2c->adap);
> if (ret >= 0) {
> platform_set_drvdata(dev, i2c);
> - of_i2c_register_devices(&i2c->adap);
> return 0;
> }
>
> diff --git a/drivers/i2c/busses/i2c-wmt.c b/drivers/i2c/busses/i2c-wmt.c
> index baaa7d1..c65da3d 100644
> --- a/drivers/i2c/busses/i2c-wmt.c
> +++ b/drivers/i2c/busses/i2c-wmt.c
> @@ -21,7 +21,6 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_address.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_irq.h>
> #include <linux/platform_device.h>
>
> @@ -439,8 +438,6 @@ static int wmt_i2c_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, i2c_dev);
>
> - of_i2c_register_devices(adap);
> -
> return 0;
> }
>
> diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
> index 3d0f052..8823db7 100644
> --- a/drivers/i2c/busses/i2c-xiic.c
> +++ b/drivers/i2c/busses/i2c-xiic.c
> @@ -40,7 +40,6 @@
> #include <linux/i2c-xiic.h>
> #include <linux/io.h>
> #include <linux/slab.h>
> -#include <linux/of_i2c.h>
>
> #define DRIVER_NAME "xiic-i2c"
>
> @@ -752,8 +751,6 @@ static int xiic_i2c_probe(struct platform_device *pdev)
> i2c_new_device(&i2c->adap, pdata->devices + i);
> }
>
> - of_i2c_register_devices(&i2c->adap);
> -
> return 0;
>
> add_adapter_failed:
> diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
> index f32ca29..08ebd78 100644
> --- a/drivers/i2c/i2c-core.c
> +++ b/drivers/i2c/i2c-core.c
> @@ -23,7 +23,11 @@
> SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> and
> Jean Delvare <khali@linux-fr.org>
> Mux support by Rodolfo Giometti <giometti@enneenne.com> and
> - Michael Lawnick <michael.lawnick.ext@nsn.com> */
> + Michael Lawnick <michael.lawnick.ext@nsn.com>
> + OF support is copyright (c) 2008 Jochen Friedrich <jochen@scram.de>
> + (based on a previous patch from Jon Smirl <jonsmirl@gmail.com>) and
> + (c) 2013 Wolfram Sang <wsa@the-dreams.de>
> + */
>
> #include <linux/module.h>
> #include <linux/kernel.h>
> @@ -35,7 +39,9 @@
> #include <linux/init.h>
> #include <linux/idr.h>
> #include <linux/mutex.h>
> +#include <linux/of.h>
> #include <linux/of_device.h>
> +#include <linux/of_irq.h>
> #include <linux/completion.h>
> #include <linux/hardirq.h>
> #include <linux/irqflags.h>
> @@ -954,6 +960,104 @@ static void i2c_scan_static_board_info(struct i2c_adapter *adapter)
> up_read(&__i2c_board_lock);
> }
>
> +/* OF support code */
> +
> +#if IS_ENABLED(CONFIG_OF)
> +static void of_i2c_register_devices(struct i2c_adapter *adap)
> +{
> + void *result;
> + struct device_node *node;
> +
> + /* Only register child devices if the adapter has a node pointer set */
> + if (!adap->dev.of_node)
> + return;
> +
> + dev_dbg(&adap->dev, "of_i2c: walking child nodes\n");
> +
> + for_each_available_child_of_node(adap->dev.of_node, node) {
> + struct i2c_board_info info = {};
> + struct dev_archdata dev_ad = {};
> + const __be32 *addr;
> + int len;
> +
> + dev_dbg(&adap->dev, "of_i2c: register %s\n", node->full_name);
> +
> + if (of_modalias_node(node, info.type, sizeof(info.type)) < 0) {
> + dev_err(&adap->dev, "of_i2c: modalias failure on %s\n",
> + node->full_name);
> + continue;
> + }
> +
> + addr = of_get_property(node, "reg", &len);
> + if (!addr || (len < sizeof(int))) {
> + dev_err(&adap->dev, "of_i2c: invalid reg on %s\n",
> + node->full_name);
> + continue;
> + }
> +
> + info.addr = be32_to_cpup(addr);
> + if (info.addr > (1 << 10) - 1) {
> + dev_err(&adap->dev, "of_i2c: invalid addr=%x on %s\n",
> + info.addr, node->full_name);
> + continue;
> + }
> +
> + info.irq = irq_of_parse_and_map(node, 0);
> + info.of_node = of_node_get(node);
> + info.archdata = &dev_ad;
> +
> + if (of_get_property(node, "wakeup-source", NULL))
> + info.flags |= I2C_CLIENT_WAKE;
> +
> + request_module("%s%s", I2C_MODULE_PREFIX, info.type);
> +
> + result = i2c_new_device(adap, &info);
> + if (result == NULL) {
> + dev_err(&adap->dev, "of_i2c: Failure registering %s\n",
> + node->full_name);
> + of_node_put(node);
> + irq_dispose_mapping(info.irq);
> + continue;
> + }
> + }
> +}
> +
> +static int of_dev_node_match(struct device *dev, void *data)
> +{
> + return dev->of_node == data;
> +}
> +
> +/* must call put_device() when done with returned i2c_client device */
> +struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
> +{
> + struct device *dev;
> +
> + dev = bus_find_device(&i2c_bus_type, NULL, node,
> + of_dev_node_match);
> + if (!dev)
> + return NULL;
> +
> + return i2c_verify_client(dev);
> +}
> +EXPORT_SYMBOL(of_find_i2c_device_by_node);
> +
> +/* must call put_device() when done with returned i2c_adapter device */
> +struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
> +{
> + struct device *dev;
> +
> + dev = bus_find_device(&i2c_bus_type, NULL, node,
> + of_dev_node_match);
> + if (!dev)
> + return NULL;
> +
> + return i2c_verify_adapter(dev);
> +}
> +EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
> +#else
> +static void of_i2c_register_devices(struct i2c_adapter *adap) { }
> +#endif /* CONFIG_OF */
> +
> static int i2c_do_add_adapter(struct i2c_driver *driver,
> struct i2c_adapter *adap)
> {
> @@ -1058,6 +1162,8 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
>
> exit_recovery:
> /* create pre-declared device nodes */
> + of_i2c_register_devices(adap);
> +
> if (adap->nr < __i2c_first_dynamic_bus_num)
> i2c_scan_static_board_info(adap);
>
> @@ -1282,7 +1388,6 @@ void i2c_del_adapter(struct i2c_adapter *adap)
> }
> EXPORT_SYMBOL(i2c_del_adapter);
>
> -
> /* ------------------------------------------------------------------------- */
>
> int i2c_for_each_dev(void *data, int (*fn)(struct device *, void *))
> diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
> index 7409ebb..797e311 100644
> --- a/drivers/i2c/i2c-mux.c
> +++ b/drivers/i2c/i2c-mux.c
> @@ -25,7 +25,6 @@
> #include <linux/i2c.h>
> #include <linux/i2c-mux.h>
> #include <linux/of.h>
> -#include <linux/of_i2c.h>
>
> /* multiplexer per channel data */
> struct i2c_mux_priv {
> @@ -185,8 +184,6 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,
> dev_info(&parent->dev, "Added multiplexed i2c bus %d\n",
> i2c_adapter_id(&priv->adap));
>
> - of_i2c_register_devices(&priv->adap);
> -
> return &priv->adap;
> }
> EXPORT_SYMBOL_GPL(i2c_add_mux_adapter);
> diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
> index 210b6f7..b901638 100644
> --- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
> +++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
> @@ -21,7 +21,6 @@
> #include <linux/i2c-mux.h>
> #include <linux/init.h>
> #include <linux/module.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_gpio.h>
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c
> index 5a0ce00..128a981 100644
> --- a/drivers/i2c/muxes/i2c-mux-gpio.c
> +++ b/drivers/i2c/muxes/i2c-mux-gpio.c
> @@ -16,7 +16,6 @@
> #include <linux/module.h>
> #include <linux/slab.h>
> #include <linux/gpio.h>
> -#include <linux/of_i2c.h>
> #include <linux/of_gpio.h>
>
> struct gpiomux {
> diff --git a/drivers/i2c/muxes/i2c-mux-pinctrl.c b/drivers/i2c/muxes/i2c-mux-pinctrl.c
> index a43c0ce..859a6d2 100644
> --- a/drivers/i2c/muxes/i2c-mux-pinctrl.c
> +++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c
> @@ -20,7 +20,6 @@
> #include <linux/i2c-mux.h>
> #include <linux/init.h>
> #include <linux/module.h>
> -#include <linux/of_i2c.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/i2c-mux-pinctrl.h>
> #include <linux/platform_device.h>
> diff --git a/drivers/media/platform/exynos4-is/fimc-is-i2c.c b/drivers/media/platform/exynos4-is/fimc-is-i2c.c
> index 617a798..9930556 100644
> --- a/drivers/media/platform/exynos4-is/fimc-is-i2c.c
> +++ b/drivers/media/platform/exynos4-is/fimc-is-i2c.c
> @@ -12,7 +12,7 @@
>
> #include <linux/clk.h>
> #include <linux/module.h>
> -#include <linux/of_i2c.h>
> +#include <linux/i2c.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/slab.h>
> @@ -67,8 +67,6 @@ static int fimc_is_i2c_probe(struct platform_device *pdev)
> pm_runtime_enable(&pdev->dev);
> pm_runtime_enable(&i2c_adap->dev);
>
> - of_i2c_register_devices(i2c_adap);
> -
> return 0;
> }
>
> diff --git a/drivers/media/platform/exynos4-is/fimc-is.c b/drivers/media/platform/exynos4-is/fimc-is.c
> index 967f6a9..2276fdc 100644
> --- a/drivers/media/platform/exynos4-is/fimc-is.c
> +++ b/drivers/media/platform/exynos4-is/fimc-is.c
> @@ -21,7 +21,7 @@
> #include <linux/interrupt.h>
> #include <linux/kernel.h>
> #include <linux/module.h>
> -#include <linux/of_i2c.h>
> +#include <linux/i2c.h>
> #include <linux/of_irq.h>
> #include <linux/of_address.h>
> #include <linux/of_platform.h>
> diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c
> index 19f556c..f8c66b4 100644
> --- a/drivers/media/platform/exynos4-is/media-dev.c
> +++ b/drivers/media/platform/exynos4-is/media-dev.c
> @@ -20,7 +20,6 @@
> #include <linux/of.h>
> #include <linux/of_platform.h>
> #include <linux/of_device.h>
> -#include <linux/of_i2c.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/types.h>
> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
> index 80e5c13..78cc760 100644
> --- a/drivers/of/Kconfig
> +++ b/drivers/of/Kconfig
> @@ -48,12 +48,6 @@ config OF_IRQ
> def_bool y
> depends on !SPARC
>
> -config OF_I2C
> - def_tristate I2C
> - depends on I2C
> - help
> - OpenFirmware I2C accessors
> -
> config OF_NET
> depends on NETDEVICES
> def_bool y
> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> index 1f9c0c4..efd0510 100644
> --- a/drivers/of/Makefile
> +++ b/drivers/of/Makefile
> @@ -3,7 +3,6 @@ obj-$(CONFIG_OF_FLATTREE) += fdt.o
> obj-$(CONFIG_OF_PROMTREE) += pdt.o
> obj-$(CONFIG_OF_ADDRESS) += address.o
> obj-$(CONFIG_OF_IRQ) += irq.o
> -obj-$(CONFIG_OF_I2C) += of_i2c.o
> obj-$(CONFIG_OF_NET) += of_net.o
> obj-$(CONFIG_OF_SELFTEST) += selftest.o
> obj-$(CONFIG_OF_MDIO) += of_mdio.o
> diff --git a/drivers/of/of_i2c.c b/drivers/of/of_i2c.c
> deleted file mode 100644
> index b667264..0000000
> --- a/drivers/of/of_i2c.c
> +++ /dev/null
> @@ -1,114 +0,0 @@
> -/*
> - * OF helpers for the I2C API
> - *
> - * Copyright (c) 2008 Jochen Friedrich <jochen@scram.de>
> - *
> - * Based on a previous patch from Jon Smirl <jonsmirl@gmail.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - */
> -
> -#include <linux/i2c.h>
> -#include <linux/irq.h>
> -#include <linux/of.h>
> -#include <linux/of_i2c.h>
> -#include <linux/of_irq.h>
> -#include <linux/module.h>
> -
> -void of_i2c_register_devices(struct i2c_adapter *adap)
> -{
> - void *result;
> - struct device_node *node;
> -
> - /* Only register child devices if the adapter has a node pointer set */
> - if (!adap->dev.of_node)
> - return;
> -
> - dev_dbg(&adap->dev, "of_i2c: walking child nodes\n");
> -
> - for_each_available_child_of_node(adap->dev.of_node, node) {
> - struct i2c_board_info info = {};
> - struct dev_archdata dev_ad = {};
> - const __be32 *addr;
> - int len;
> -
> - dev_dbg(&adap->dev, "of_i2c: register %s\n", node->full_name);
> -
> - if (of_modalias_node(node, info.type, sizeof(info.type)) < 0) {
> - dev_err(&adap->dev, "of_i2c: modalias failure on %s\n",
> - node->full_name);
> - continue;
> - }
> -
> - addr = of_get_property(node, "reg", &len);
> - if (!addr || (len < sizeof(int))) {
> - dev_err(&adap->dev, "of_i2c: invalid reg on %s\n",
> - node->full_name);
> - continue;
> - }
> -
> - info.addr = be32_to_cpup(addr);
> - if (info.addr > (1 << 10) - 1) {
> - dev_err(&adap->dev, "of_i2c: invalid addr=%x on %s\n",
> - info.addr, node->full_name);
> - continue;
> - }
> -
> - info.irq = irq_of_parse_and_map(node, 0);
> - info.of_node = of_node_get(node);
> - info.archdata = &dev_ad;
> -
> - if (of_get_property(node, "wakeup-source", NULL))
> - info.flags |= I2C_CLIENT_WAKE;
> -
> - request_module("%s%s", I2C_MODULE_PREFIX, info.type);
> -
> - result = i2c_new_device(adap, &info);
> - if (result == NULL) {
> - dev_err(&adap->dev, "of_i2c: Failure registering %s\n",
> - node->full_name);
> - of_node_put(node);
> - irq_dispose_mapping(info.irq);
> - continue;
> - }
> - }
> -}
> -EXPORT_SYMBOL(of_i2c_register_devices);
> -
> -static int of_dev_node_match(struct device *dev, void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> -/* must call put_device() when done with returned i2c_client device */
> -struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
> -{
> - struct device *dev;
> -
> - dev = bus_find_device(&i2c_bus_type, NULL, node,
> - of_dev_node_match);
> - if (!dev)
> - return NULL;
> -
> - return i2c_verify_client(dev);
> -}
> -EXPORT_SYMBOL(of_find_i2c_device_by_node);
> -
> -/* must call put_device() when done with returned i2c_adapter device */
> -struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
> -{
> - struct device *dev;
> -
> - dev = bus_find_device(&i2c_bus_type, NULL, node,
> - of_dev_node_match);
> - if (!dev)
> - return NULL;
> -
> - return i2c_verify_adapter(dev);
> -}
> -EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
> -
> -MODULE_LICENSE("GPL");
> diff --git a/drivers/staging/imx-drm/imx-tve.c b/drivers/staging/imx-drm/imx-tve.c
> index a56797d..2d76fd4 100644
> --- a/drivers/staging/imx-drm/imx-tve.c
> +++ b/drivers/staging/imx-drm/imx-tve.c
> @@ -21,7 +21,7 @@
> #include <linux/clk.h>
> #include <linux/clk-provider.h>
> #include <linux/module.h>
> -#include <linux/of_i2c.h>
> +#include <linux/i2c.h>
> #include <linux/regmap.h>
> #include <linux/regulator/consumer.h>
> #include <linux/spinlock.h>
> diff --git a/include/linux/i2c.h b/include/linux/i2c.h
> index e988fa9..2189189 100644
> --- a/include/linux/i2c.h
> +++ b/include/linux/i2c.h
> @@ -542,6 +542,26 @@ static inline int i2c_adapter_id(struct i2c_adapter *adap)
>
> #endif /* I2C */
>
> +#if IS_ENABLED(CONFIG_OF)
> +/* must call put_device() when done with returned i2c_client device */
> +extern struct i2c_client *of_find_i2c_device_by_node(struct device_node *node);
> +
> +/* must call put_device() when done with returned i2c_adapter device */
> +extern struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node);
> +
> +#else
> +
> +static inline struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
> +{
> + return NULL;
> +}
> +
> +static inline struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
> +{
> + return NULL;
> +}
> +#endif /* CONFIG_OF */
> +
> #if IS_ENABLED(CONFIG_ACPI_I2C)
> extern void acpi_i2c_register_devices(struct i2c_adapter *adap);
> #else
> diff --git a/include/linux/of_i2c.h b/include/linux/of_i2c.h
> deleted file mode 100644
> index cfb545c..0000000
> --- a/include/linux/of_i2c.h
> +++ /dev/null
> @@ -1,46 +0,0 @@
> -/*
> - * Generic I2C API implementation for PowerPC.
> - *
> - * Copyright (c) 2008 Jochen Friedrich <jochen@scram.de>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - */
> -
> -#ifndef __LINUX_OF_I2C_H
> -#define __LINUX_OF_I2C_H
> -
> -#if defined(CONFIG_OF_I2C) || defined(CONFIG_OF_I2C_MODULE)
> -#include <linux/i2c.h>
> -
> -extern void of_i2c_register_devices(struct i2c_adapter *adap);
> -
> -/* must call put_device() when done with returned i2c_client device */
> -extern struct i2c_client *of_find_i2c_device_by_node(struct device_node *node);
> -
> -/* must call put_device() when done with returned i2c_adapter device */
> -extern struct i2c_adapter *of_find_i2c_adapter_by_node(
> - struct device_node *node);
> -
> -#else
> -static inline void of_i2c_register_devices(struct i2c_adapter *adap)
> -{
> - return;
> -}
> -
> -static inline struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
> -{
> - return NULL;
> -}
> -
> -/* must call put_device() when done with returned i2c_adapter device */
> -static inline struct i2c_adapter *of_find_i2c_adapter_by_node(
> - struct device_node *node)
> -{
> - return NULL;
> -}
> -#endif /* CONFIG_OF_I2C */
> -
> -#endif /* __LINUX_OF_I2C_H */
> diff --git a/sound/soc/fsl/imx-sgtl5000.c b/sound/soc/fsl/imx-sgtl5000.c
> index 3f726e4..f2fbde9 100644
> --- a/sound/soc/fsl/imx-sgtl5000.c
> +++ b/sound/soc/fsl/imx-sgtl5000.c
> @@ -13,7 +13,7 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_platform.h>
> -#include <linux/of_i2c.h>
> +#include <linux/i2c.h>
> #include <linux/clk.h>
> #include <sound/soc.h>
>
> diff --git a/sound/soc/fsl/imx-wm8962.c b/sound/soc/fsl/imx-wm8962.c
> index 52a36a9..9fd7a65 100644
> --- a/sound/soc/fsl/imx-wm8962.c
> +++ b/sound/soc/fsl/imx-wm8962.c
> @@ -15,7 +15,7 @@
>
> #include <linux/module.h>
> #include <linux/of_platform.h>
> -#include <linux/of_i2c.h>
> +#include <linux/i2c.h>
> #include <linux/slab.h>
> #include <linux/clk.h>
> #include <sound/soc.h>
> --
> 1.7.10.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
* Re: [RFC PATCH v2 3/4] powerpc: refactor of_get_cpu_node to support other architectures
From: Grant Likely @ 2013-08-28 19:46 UTC (permalink / raw)
To: Mark Rutland, Sudeep KarkadaNagesha
Cc: Jonas Bonn, devicetree@vger.kernel.org, Michal Simek,
Lorenzo Pieralisi, linux-pm@vger.kernel.org, Tomasz Figa,
rob.herring@calxeda.com, linux-kernel@vger.kernel.org,
Rafael J. Wysocki, Rob Herring, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20130822135930.GC23152@e106331-lin.cambridge.arm.com>
On Thu, 22 Aug 2013 14:59:30 +0100, Mark Rutland <mark.rutland@arm.com> wrote:
> On Mon, Aug 19, 2013 at 02:56:10PM +0100, Sudeep KarkadaNagesha wrote:
> > On 19/08/13 14:02, Rob Herring wrote:
> > > On 08/19/2013 05:19 AM, Mark Rutland wrote:
> > >> On Sat, Aug 17, 2013 at 11:09:36PM +0100, Benjamin Herrenschmidt wrote:
> > >>> On Sat, 2013-08-17 at 12:50 +0200, Tomasz Figa wrote:
> > >>>> I wonder how would this handle uniprocessor ARM (pre-v7) cores, for
> > >>>> which
> > >>>> the updated bindings[1] define #address-cells = <0> and so no reg
> > >>>> property.
> > >>>>
> > >>>> [1] - http://thread.gmane.org/gmane.linux.ports.arm.kernel/260795
> > >>>
> > >>> Why did you do that in the binding ? That sounds like looking to create
> > >>> problems ...
> > >>>
> > >>> Traditionally, UP setups just used "0" as the "reg" property on other
> > >>> architectures, why do differently ?
> > >>
> > >> The decision was taken because we defined our reg property to refer to
> > >> the MPIDR register's Aff{2,1,0} bitfields, and on UP cores before v7
> > >> there's no MPIDR register at all. Given there can only be a single CPU
> > >> in that case, describing a register that wasn't present didn't seem
> > >> necessary or helpful.
> > >
> > > What exactly reg represents is up to the binding definition, but it
> > > still should be present IMO. I don't see any issue with it being
> > > different for pre-v7.
> > >
> > Yes it's better to have 'reg' with value 0 than not having it.
> > Otherwise this generic of_get_cpu_node implementation would need some
> > _hack_ to handle that case.
>
> I'm not sure that having some code to handle a difference in standard
> between two architectures is a hack. If anything, I'd argue encoding a
> reg of 0 that corresponds to a nonexistent MPIDR value (given that's
> what the reg property is defined to map to on ARM) is more of a hack ;)
>
> I'm not averse to having a reg value of 0 for this case, but given that
> there are existing devicetrees without it, requiring a reg property will
> break compatibility with them.
Then special cases those device trees, but you changing existing
convention really needs to be avoided. The referenced documentation
change is brand new, so we're not stuck with it.
g.
^ permalink raw reply
* Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
From: Benjamin Herrenschmidt @ 2013-08-28 22:10 UTC (permalink / raw)
To: Gerhard Sittig
Cc: Paul Mackerras, Anatolij Gustschin, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <20130828155944.GA30987@book.gsilab.sittig.org>
On Wed, 2013-08-28 at 17:59 +0200, Gerhard Sittig wrote:
> On Wed, Aug 28, 2013 at 14:08 +0200, Gerhard Sittig wrote:
> >
> > [ re-created the Cc: list, this is about the PCI clock exclusively ]
>
> I just noticed by coincidence that the message which I received
> back from the linuxppc-dev ML appeared to have dropped Benjamin
> Herrenschmidt and Kumar Gala from the Cc: list -- while they do
> appear in the header of the message that I have sent and I can't
> see what might have caused the loss of information. :-O
Don't bother with me. I haven't had the bandwidth to look at that
at all. I'll leave Anatolij the responsibility here :-)
Cheers,
Ben.
> Do you want me to re-send the message for the benefit of
> potential followups, or is it OK that you receive the message via
> the list but potentially without the Cc: attribute?
>
> The message was mostly "for your information" and contained a
> status update, while no action is required or problems need to
> get resolved.
>
>
> virtually yours
> Gerhard Sittig
^ permalink raw reply
* [PATCH -next] ASoC: fsl_spdif: remove redundant dev_err call in fsl_spdif_probe()
From: Wei Yongjun @ 2013-08-29 0:00 UTC (permalink / raw)
To: timur, lgirdwood, broonie, perex, tiwai, grant.likely,
rob.herring
Cc: devicetree, yongjun_wei, linuxppc-dev, alsa-devel
From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
---
sound/soc/fsl/fsl_spdif.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index a9798aa..e93dc0d 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -1113,10 +1113,8 @@ static int fsl_spdif_probe(struct platform_device *pdev)
}
regs = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(regs)) {
- dev_err(&pdev->dev, "could not map device resources\n");
+ if (IS_ERR(regs))
return PTR_ERR(regs);
- }
spdif_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
"core", regs, &fsl_spdif_regmap_config);
^ permalink raw reply related
* Re: [PATCH v8 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes
From: Hongbo Zhang @ 2013-08-29 2:46 UTC (permalink / raw)
To: Mark Rutland
Cc: devicetree@vger.kernel.org, ian.campbell@citrix.com, Pawel Moll,
swarren@wwwdotorg.org, vinod.koul@intel.com,
linux-kernel@vger.kernel.org, rob.herring@calxeda.com,
djbw@fb.com, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20130828125153.GC10250@e106331-lin.cambridge.arm.com>
On 08/28/2013 08:51 PM, Mark Rutland wrote:
> On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
>> On 08/27/2013 07:35 PM, Mark Rutland wrote:
>>> On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zhang@freescale.com wrote:
>>>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>>
>>>> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
>>>> the device tree nodes for them.
>>>>
>>>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>>>> ---
>>>> .../devicetree/bindings/powerpc/fsl/dma.txt | 66 ++++++++++++++++
>>>> arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 4 +-
>>>> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 81 ++++++++++++++++++++
>>>> arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi | 81 ++++++++++++++++++++
>>>> arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 4 +-
>>>> 5 files changed, 232 insertions(+), 4 deletions(-)
>>>> create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> index ddf17af..10fd031 100644
>>>> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
>>>> @@ -126,6 +126,72 @@ Example:
>>>> };
>>>> };
>>>>
>>>> +** Freescale Elo3 DMA Controller
>>>> + This is EloPlus controller with 8 channels, used in Freescale Txxx and Bxxx
>>>> + series chips, such as t1040, t4240, b4860.
>>>> +
>>>> +Required properties:
>>>> +
>>>> +- compatible : must include "fsl,elo3-dma"
>>>> +- reg : <registers specifier for DMA general status reg>
>>>> +- ranges : describes the mapping between the address space of the
>>>> + DMA channels and the address space of the DMA controller
>>>> +
>>>> +- DMA channel nodes:
>>>> + - compatible : must include "fsl,eloplus-dma-channel"
>>>> + - reg : <registers specifier for channel>
>>>> + - interrupts : <interrupt specifier for DMA channel IRQ>
>>>> + - interrupt-parent : optional, if needed for interrupt mapping
>>>> +
>>>> +Example:
>>>> +dma@100300 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + compatible = "fsl,elo3-dma";
>>>> + reg = <0x100300 0x4 0x100600 0x4>;
>>> Is that one reg entry where #size-cells=2 and #address-cells=2?
>>>
>>> That's what the binding implies (given it only describes a single reg
>>> entry).
>>>
>>> if it's two entries, we should make that explicit (both in the binding
>>> and example):
>>>
>>> reg = <0x100300 0x4>,
>>> <0x100600 0x4>;
>> Yes they are two entries, I will change it this way.
> Ok. Could you make sure you document what the two reg entries correspond
> to? That's not clear from "<registers specifier for channel>".
Yes I am sure, we have reg for DMA controller and also reg for each DMA
channel.
these two reg entries are "registers specifier for DMA general status
reg", not "registers specifier for channel"
because this is an 8-channel DMA controller, we have two general status
registers (vs. one status register for 4-chanel DMA controller previously )
>>>> + ranges = <0x0 0x100100 0x500>;
>>> If it is one reg entry then the example ranges property isn't big enough
>>> to contain the parent-bus-address.
>> They are two reg entries, so the range is big enough.
> Ok.
>
>>>> + dma-channel@0 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x0 0x80>;
>>>> + interrupts = <28 2 0 0>;
>>>> + };
>>>> + dma-channel@80 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x80 0x80>;
>>>> + interrupts = <29 2 0 0>;
>>>> + };
>>>> + dma-channel@100 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x100 0x80>;
>>>> + interrupts = <30 2 0 0>;
>>>> + };
>>>> + dma-channel@180 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x180 0x80>;
>>>> + interrupts = <31 2 0 0>;
>>>> + };
>>>> + dma-channel@300 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x300 0x80>;
>>>> + interrupts = <76 2 0 0>;
>>>> + };
>>>> + dma-channel@380 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x380 0x80>;
>>>> + interrupts = <77 2 0 0>;
>>>> + };
>>>> + dma-channel@400 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x400 0x80>;
>>>> + interrupts = <78 2 0 0>;
>>>> + };
>>>> + dma-channel@480 {
>>>> + compatible = "fsl,eloplus-dma-channel";
>>>> + reg = <0x480 0x80>;
>>>> + interrupts = <79 2 0 0>;
>>>> + };
>>>> +};
>>>> +
>>>> Note on DMA channel compatible properties: The compatible property must say
>>>> "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
>>>> driver (fsldma). Any DMA channel used by fsldma cannot be used by another
>>>> diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> index 7399154..ea53ea1 100644
>>>> --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
>>>> @@ -223,13 +223,13 @@
>>>> reg = <0xe2000 0x1000>;
>>>> };
>>>>
>>>> -/include/ "qoriq-dma-0.dtsi"
>>>> +/include/ "elo3-dma-0.dtsi"
>>>> dma@100300 {
>>>> fsl,iommu-parent = <&pamu0>;
>>>> fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
>>>> };
>>>>
>>>> -/include/ "qoriq-dma-1.dtsi"
>>>> +/include/ "elo3-dma-1.dtsi"
>>>> dma@101300 {
>>>> fsl,iommu-parent = <&pamu0>;
>>>> fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
>>>> diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> new file mode 100644
>>>> index 0000000..69a3277
>>>> --- /dev/null
>>>> +++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
>>>> @@ -0,0 +1,81 @@
>>>> +/*
>>>> + * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
>>> Copy-pasted?
>>>
>>> Presumably should be "Elo3 DMA devicetree stub", or similar?
>>>
>>> Similarly for elo3-dma-1.dtsi.
>> Yes copy-pasted, but QorIQ isn't wrong, it is name of Freescale series
>> chips.
>> To be more specific, I'd like to use "QorIQ Elo3 DMA devicetree stub"
> That sounds good to me.
>
> Cheers,
> Mark.
>
^ permalink raw reply
* [PATCH] Powerpc/eSDCH: Specify voltage for T4240QDS
From: Haijun Zhang @ 2013-08-29 3:31 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: scottwood, Haijun Zhang, X.Xie
Freescale T4240QDS reference board has extra voltage shifters added
to allow 3.3V operation, so add 3.3v voltage support for T4240QDS.
1.8v and 3.3v is recommand for eMMC and SDHC card.
Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
---
arch/powerpc/boot/dts/t4240qds.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
index 0555976..eb3c3de 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -148,6 +148,10 @@
interrupts = <0x1 0x1 0 0>;
};
};
+
+ sdhc@114000 {
+ voltage-ranges = <1800 1800 3300 3300>;
+ };
};
pci0: pcie@ffe240000 {
--
1.8.0
^ permalink raw reply related
* Re: [PATCH 03/10] crypto: nx - fix limits to sg lists for AES-CBC
From: Herbert Xu @ 2013-08-29 4:42 UTC (permalink / raw)
To: Marcelo Cerri; +Cc: linuxppc-dev, linux-kernel, linux-crypto
In-Reply-To: <1377288074-18998-4-git-send-email-mhcerri@linux.vnet.ibm.com>
On Fri, Aug 23, 2013 at 05:01:07PM -0300, Marcelo Cerri wrote:
> This patch updates the nx-aes-cbc implementation to perform several
> hyper calls if needed in order to always respect the length limits for
> scatter/gather lists.
>
> Two different limits are considered:
>
> - "ibm,max-sg-len": maximum number of bytes of each scatter/gather
> list.
>
> - "ibm,max-sync-cop":
> - The total number of bytes that a scatter/gather list can hold.
> - The maximum number of elements that a scatter/gather list can have.
>
> Reviewed-by: Joy Latten <jmlatten@linux.vnet.ibm.com>
> Signed-off-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com>
This patch does not apply against the current cryptodev tree.
Please regenerate your pathces.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* [PATCH] powerpc: Enable /dev/port when isa_io_special is set
From: Benjamin Herrenschmidt @ 2013-08-29 6:55 UTC (permalink / raw)
To: linuxppc-dev
isa_io_special is set when the platform provides a "special"
implementation of inX/outX via some FW interface for example.
Such a platform doesn't need an ISA bridge on PCI, and so /dev/port
should be made available even if one isn't present.
This makes the LPC bus IOs accessible via /dev/port on PowerNV Power8
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/io.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 5a64757..edcc209 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -21,7 +21,7 @@ extern struct pci_dev *isa_bridge_pcidev;
/*
* has legacy ISA devices ?
*/
-#define arch_has_dev_port() (isa_bridge_pcidev != NULL)
+#define arch_has_dev_port() (isa_bridge_pcidev != NULL || isa_io_special)
#endif
#include <linux/device.h>
^ permalink raw reply related
* [PATCH] powerpc/scom: Change scom_read() and scom_write() to return errors
From: Benjamin Herrenschmidt @ 2013-08-29 6:55 UTC (permalink / raw)
To: linuxppc-dev
scom_read() now returns the read value via a pointer argument and
both functions return an int error code
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/scom.h | 23 +++++++++++++++++------
arch/powerpc/platforms/wsp/scom_smp.c | 18 +++++++++++++-----
arch/powerpc/platforms/wsp/scom_wsp.c | 12 ++++++++----
arch/powerpc/platforms/wsp/wsp.c | 13 +++++++------
arch/powerpc/sysdev/scom.c | 3 +--
5 files changed, 46 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/include/asm/scom.h b/arch/powerpc/include/asm/scom.h
index 0cabfd7..07dcdcf 100644
--- a/arch/powerpc/include/asm/scom.h
+++ b/arch/powerpc/include/asm/scom.h
@@ -54,8 +54,8 @@ struct scom_controller {
scom_map_t (*map)(struct device_node *ctrl_dev, u64 reg, u64 count);
void (*unmap)(scom_map_t map);
- u64 (*read)(scom_map_t map, u32 reg);
- void (*write)(scom_map_t map, u32 reg, u64 value);
+ int (*read)(scom_map_t map, u32 reg, u64 *value);
+ int (*write)(scom_map_t map, u32 reg, u64 value);
};
extern const struct scom_controller *scom_controller;
@@ -133,10 +133,18 @@ static inline void scom_unmap(scom_map_t map)
* scom_read - Read a SCOM register
* @map: Result of scom_map
* @reg: Register index within that map
+ * @value: Updated with the value read
+ *
+ * Returns 0 (success) or a negative error code
*/
-static inline u64 scom_read(scom_map_t map, u32 reg)
+static inline int scom_read(scom_map_t map, u32 reg, u64 *value)
{
- return scom_controller->read(map, reg);
+ int rc;
+
+ rc = scom_controller->read(map, reg, value);
+ if (rc)
+ *value = 0xfffffffffffffffful;
+ return rc;
}
/**
@@ -144,12 +152,15 @@ static inline u64 scom_read(scom_map_t map, u32 reg)
* @map: Result of scom_map
* @reg: Register index within that map
* @value: Value to write
+ *
+ * Returns 0 (success) or a negative error code
*/
-static inline void scom_write(scom_map_t map, u32 reg, u64 value)
+static inline int scom_write(scom_map_t map, u32 reg, u64 value)
{
- scom_controller->write(map, reg, value);
+ return scom_controller->write(map, reg, value);
}
+
#endif /* CONFIG_PPC_SCOM */
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/wsp/scom_smp.c b/arch/powerpc/platforms/wsp/scom_smp.c
index b56b70a..268bc89 100644
--- a/arch/powerpc/platforms/wsp/scom_smp.c
+++ b/arch/powerpc/platforms/wsp/scom_smp.c
@@ -116,7 +116,14 @@ static int a2_scom_ram(scom_map_t scom, int thread, u32 insn, int extmask)
scom_write(scom, SCOM_RAMIC, cmd);
- while (!((val = scom_read(scom, SCOM_RAMC)) & mask)) {
+ for (;;) {
+ if (scom_read(scom, SCOM_RAMC, &val) != 0) {
+ pr_err("SCOM error on instruction 0x%08x, thread %d\n",
+ insn, thread);
+ return -1;
+ }
+ if (val & mask)
+ break;
pr_devel("Waiting on RAMC = 0x%llx\n", val);
if (++n == 3) {
pr_err("RAMC timeout on instruction 0x%08x, thread %d\n",
@@ -151,9 +158,7 @@ static int a2_scom_getgpr(scom_map_t scom, int thread, int gpr, int alt,
if (rc)
return rc;
- *out_gpr = scom_read(scom, SCOM_RAMD);
-
- return 0;
+ return scom_read(scom, SCOM_RAMD, out_gpr);
}
static int a2_scom_getspr(scom_map_t scom, int thread, int spr, u64 *out_spr)
@@ -353,7 +358,10 @@ int a2_scom_startup_cpu(unsigned int lcpu, int thr_idx, struct device_node *np)
pr_devel("Bringing up CPU%d using SCOM...\n", lcpu);
- pccr0 = scom_read(scom, SCOM_PCCR0);
+ if (scom_read(scom, SCOM_PCCR0, &pccr0) != 0) {
+ printk(KERN_ERR "XSCOM failure readng PCCR0 on CPU%d\n", lcpu);
+ return -1;
+ }
scom_write(scom, SCOM_PCCR0, pccr0 | SCOM_PCCR0_ENABLE_DEBUG |
SCOM_PCCR0_ENABLE_RAM);
diff --git a/arch/powerpc/platforms/wsp/scom_wsp.c b/arch/powerpc/platforms/wsp/scom_wsp.c
index 4052e22..54172c4 100644
--- a/arch/powerpc/platforms/wsp/scom_wsp.c
+++ b/arch/powerpc/platforms/wsp/scom_wsp.c
@@ -50,18 +50,22 @@ static void wsp_scom_unmap(scom_map_t map)
iounmap((void *)map);
}
-static u64 wsp_scom_read(scom_map_t map, u32 reg)
+static int wsp_scom_read(scom_map_t map, u32 reg, u64 *value)
{
u64 __iomem *addr = (u64 __iomem *)map;
- return in_be64(addr + reg);
+ *value = in_be64(addr + reg);
+
+ return 0;
}
-static void wsp_scom_write(scom_map_t map, u32 reg, u64 value)
+static int wsp_scom_write(scom_map_t map, u32 reg, u64 value)
{
u64 __iomem *addr = (u64 __iomem *)map;
- return out_be64(addr + reg, value);
+ out_be64(addr + reg, value);
+
+ return 0;
}
static const struct scom_controller wsp_scom_controller = {
diff --git a/arch/powerpc/platforms/wsp/wsp.c b/arch/powerpc/platforms/wsp/wsp.c
index d25cc96..ddb6efe 100644
--- a/arch/powerpc/platforms/wsp/wsp.c
+++ b/arch/powerpc/platforms/wsp/wsp.c
@@ -89,6 +89,7 @@ void wsp_halt(void)
struct device_node *dn;
struct device_node *mine;
struct device_node *me;
+ int rc;
me = of_get_cpu_node(smp_processor_id(), NULL);
mine = scom_find_parent(me);
@@ -101,15 +102,15 @@ void wsp_halt(void)
/* read-modify-write it so the HW probe does not get
* confused */
- val = scom_read(m, 0);
- val |= 1;
- scom_write(m, 0, val);
+ rc = scom_read(m, 0, &val);
+ if (rc == 0)
+ scom_write(m, 0, val | 1);
scom_unmap(m);
}
m = scom_map(mine, 0, 1);
- val = scom_read(m, 0);
- val |= 1;
- scom_write(m, 0, val);
+ rc = scom_read(m, 0, &val);
+ if (rc == 0)
+ scom_write(m, 0, val | 1);
/* should never return */
scom_unmap(m);
}
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 9193e12..10f1d9e 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -137,8 +137,7 @@ static int scom_val_get(void *data, u64 *val)
if (!scom_map_ok(ent->map))
return -EFAULT;
- *val = scom_read(ent->map, 0);
- return 0;
+ return scom_read(ent->map, 0, val);
}
DEFINE_SIMPLE_ATTRIBUTE(scom_val_fops, scom_val_get, scom_val_set,
"0x%llx\n");
^ permalink raw reply related
* [PATCH] powerpc/scom: Add support for "reg" property
From: Benjamin Herrenschmidt @ 2013-08-29 6:56 UTC (permalink / raw)
To: linuxppc-dev
When devices are direct children of a scom controller node, they
should be able to use the normal "reg" property instead of "scom-reg".
In that case, they also use #address-cells rather than #scom-cells
to indicate the size of an entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/sysdev/scom.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 10f1d9e..413622d 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -53,7 +53,7 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
{
struct device_node *parent;
unsigned int cells, size;
- const u32 *prop;
+ const __be32 *prop, *sprop;
u64 reg, cnt;
scom_map_t ret;
@@ -62,12 +62,24 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
if (parent == NULL)
return 0;
- prop = of_get_property(parent, "#scom-cells", NULL);
- cells = prop ? *prop : 1;
-
+ /*
+ * We support "scom-reg" properties for adding scom registers
+ * to a random device-tree node with an explicit scom-parent
+ *
+ * We also support the simple "reg" property if the device is
+ * a direct child of a scom controller.
+ *
+ * In case both exist, "scom-reg" takes precedence.
+ */
prop = of_get_property(dev, "scom-reg", &size);
+ sprop = of_get_property(parent, "#scom-cells", NULL);
+ if (!prop && parent == dev->parent) {
+ prop = of_get_property(dev, "reg", &size);
+ sprop = of_get_property(parent, "#address-cells", NULL);
+ }
if (!prop)
- return 0;
+ return NULL;
+ cells = sprop ? be32_to_cpup(sprop) : 1;
size >>= 2;
if (index >= (size / (2*cells)))
^ permalink raw reply related
* [PATCH] powerpc/scom: Create debugfs files using ibm,chip-id if available
From: Benjamin Herrenschmidt @ 2013-08-29 6:56 UTC (permalink / raw)
To: linuxppc-dev
When creating the debugfs scom files, use "ibm,chip-id" as the scom%d
index rather than a simple made up number when possible.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/sysdev/scom.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 413622d..cb20d54 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -196,8 +196,13 @@ static int scom_debug_init(void)
return -1;
i = rc = 0;
- for_each_node_with_property(dn, "scom-controller")
- rc |= scom_debug_init_one(root, dn, i++);
+ for_each_node_with_property(dn, "scom-controller") {
+ int id = of_get_ibm_chip_id(dn);
+ if (id == -1)
+ id = i;
+ rc |= scom_debug_init_one(root, dn, id);
+ i++;
+ }
return rc;
}
^ permalink raw reply related
* [PATCH] powerpc/powernv: Add scom support under OPALv3
From: Benjamin Herrenschmidt @ 2013-08-29 6:57 UTC (permalink / raw)
To: linuxppc-dev
OPAL v3 provides interfaces to access the chips XSCOM, expose
this via the existing scom infrastructure.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/platforms/powernv/Kconfig | 1 +
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/opal-xscom.c | 105 ++++++++++++++++++++++++++++
3 files changed, 107 insertions(+)
create mode 100644 arch/powerpc/platforms/powernv/opal-xscom.c
diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig
index 6fae5eb..7f39da0 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -9,6 +9,7 @@ config PPC_POWERNV
select EPAPR_BOOT
select PPC_INDIRECT_PIO
select PPC_UDBG_16550
+ select PPC_SCOM
default y
config POWERNV_MSI
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index 300c437..02dc1f5 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -4,3 +4,4 @@ obj-y += opal-rtc.o opal-nvram.o opal-lpc.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_PCI) += pci.o pci-p5ioc2.o pci-ioda.o
obj-$(CONFIG_EEH) += eeh-ioda.o eeh-powernv.o
+obj-$(CONFIG_PPC_SCOM) += opal-xscom.o
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
new file mode 100644
index 0000000..3ed5c64
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -0,0 +1,105 @@
+/*
+ * PowerNV LPC bus handling.
+ *
+ * Copyright 2013 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/bug.h>
+#include <linux/gfp.h>
+#include <linux/slab.h>
+
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+#include <asm/opal.h>
+#include <asm/scom.h>
+
+/*
+ * We could probably fit that inside the scom_map_t
+ * which is a void* after all but it's really too ugly
+ * so let's kmalloc it for now
+ */
+struct opal_scom_map {
+ uint32_t chip;
+ uint32_t addr;
+};
+
+static scom_map_t opal_scom_map(struct device_node *dev, u64 reg, u64 count)
+{
+ struct opal_scom_map *m;
+ const __be32 *gcid;
+
+ if (!of_get_property(dev, "scom-controller", NULL)) {
+ pr_err("%s: device %s is not a SCOM controller\n",
+ __func__, dev->full_name);
+ return SCOM_MAP_INVALID;
+ }
+ gcid = of_get_property(dev, "ibm,chip-id", NULL);
+ if (!gcid) {
+ pr_err("%s: device %s has no ibm,chip-id\n",
+ __func__, dev->full_name);
+ return SCOM_MAP_INVALID;
+ }
+ m = kmalloc(sizeof(struct opal_scom_map), GFP_KERNEL);
+ if (!m)
+ return NULL;
+ m->chip = be32_to_cpup(gcid);
+ m->addr = reg;
+
+ return (scom_map_t)m;
+}
+
+static void opal_scom_unmap(scom_map_t map)
+{
+ kfree(map);
+}
+
+static int opal_xscom_err_xlate(int64_t rc)
+{
+ switch(rc) {
+ case 0:
+ return 0;
+ /* Add more translations if necessary */
+ default:
+ return -EIO;
+ }
+}
+
+static int opal_scom_read(scom_map_t map, u32 reg, u64 *value)
+{
+ struct opal_scom_map *m = map;
+ int64_t rc;
+
+ rc = opal_xscom_read(m->chip, m->addr + reg, (uint64_t *)__pa(value));
+ return opal_xscom_err_xlate(rc);
+}
+
+static int opal_scom_write(scom_map_t map, u32 reg, u64 value)
+{
+ struct opal_scom_map *m = map;
+ int64_t rc;
+
+ rc = opal_xscom_write(m->chip, m->addr + reg, value);
+ return opal_xscom_err_xlate(rc);
+}
+
+static const struct scom_controller opal_scom_controller = {
+ .map = opal_scom_map,
+ .unmap = opal_scom_unmap,
+ .read = opal_scom_read,
+ .write = opal_scom_write
+};
+
+static int opal_xscom_init(void)
+{
+ if (firmware_has_feature(FW_FEATURE_OPALv3))
+ scom_init(&opal_scom_controller);
+ return 0;
+}
+arch_initcall(opal_xscom_init);
^ permalink raw reply related
* [PATCH] powerpc/scom: CONFIG_SCOM_DEBUGFS should depend on CONFIG_DEBUG_FS
From: Benjamin Herrenschmidt @ 2013-08-29 6:58 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/sysdev/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index ab4cb54..13ec968 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -28,7 +28,7 @@ config PPC_SCOM
config SCOM_DEBUGFS
bool "Expose SCOM controllers via debugfs"
- depends on PPC_SCOM
+ depends on PPC_SCOM && DEBUG_FS
default n
config GE_FPGA
^ permalink raw reply related
* [PATCH] powerpc/scom: Use "devspec" rather than "path" in debugfs entries
From: Benjamin Herrenschmidt @ 2013-08-29 7:25 UTC (permalink / raw)
To: linuxppc-dev
This is the traditional name for device-tree path, used in sysfs,
do the same for the XSCOM debugfs files.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/sysdev/scom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index cb20d54..3963d99 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -180,7 +180,7 @@ static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
debugfs_create_file("addr", 0600, dir, ent, &scom_addr_fops);
debugfs_create_file("value", 0600, dir, ent, &scom_val_fops);
- debugfs_create_blob("path", 0400, dir, &ent->blob);
+ debugfs_create_blob("devspec", 0400, dir, &ent->blob);
return 0;
}
^ permalink raw reply related
* Re: [RFC PATCH v2 3/4] powerpc: refactor of_get_cpu_node to support other architectures
From: Lorenzo Pieralisi @ 2013-08-29 9:50 UTC (permalink / raw)
To: Grant Likely
Cc: Mark Rutland, devicetree@vger.kernel.org, Michal Simek,
Jonas Bonn, linux-pm@vger.kernel.org, Sudeep KarkadaNagesha,
Tomasz Figa, rob.herring@calxeda.com,
linux-kernel@vger.kernel.org, Rafael J. Wysocki, Rob Herring,
linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20130828194638.AB78E3E0A6F@localhost>
On Wed, Aug 28, 2013 at 08:46:38PM +0100, Grant Likely wrote:
> On Thu, 22 Aug 2013 14:59:30 +0100, Mark Rutland <mark.rutland@arm.com> w=
rote:
> > On Mon, Aug 19, 2013 at 02:56:10PM +0100, Sudeep KarkadaNagesha wrote:
> > > On 19/08/13 14:02, Rob Herring wrote:
> > > > On 08/19/2013 05:19 AM, Mark Rutland wrote:
> > > >> On Sat, Aug 17, 2013 at 11:09:36PM +0100, Benjamin Herrenschmidt w=
rote:
> > > >>> On Sat, 2013-08-17 at 12:50 +0200, Tomasz Figa wrote:
> > > >>>> I wonder how would this handle uniprocessor ARM (pre-v7) cores, =
for
> > > >>>> which=20
> > > >>>> the updated bindings[1] define #address-cells =3D <0> and so no =
reg=20
> > > >>>> property.
> > > >>>>
> > > >>>> [1] - http://thread.gmane.org/gmane.linux.ports.arm.kernel/26079=
5
> > > >>>
> > > >>> Why did you do that in the binding ? That sounds like looking to =
create
> > > >>> problems ...=20
> > > >>>
> > > >>> Traditionally, UP setups just used "0" as the "reg" property on o=
ther
> > > >>> architectures, why do differently ?
> > > >>
> > > >> The decision was taken because we defined our reg property to refe=
r to
> > > >> the MPIDR register's Aff{2,1,0} bitfields, and on UP cores before =
v7
> > > >> there's no MPIDR register at all. Given there can only be a single=
CPU
> > > >> in that case, describing a register that wasn't present didn't see=
m
> > > >> necessary or helpful.
> > > >=20
> > > > What exactly reg represents is up to the binding definition, but it
> > > > still should be present IMO. I don't see any issue with it being
> > > > different for pre-v7.
> > > >=20
> > > Yes it's better to have 'reg' with value 0 than not having it.
> > > Otherwise this generic of_get_cpu_node implementation would need some
> > > _hack_ to handle that case.
> >=20
> > I'm not sure that having some code to handle a difference in standard
> > between two architectures is a hack. If anything, I'd argue encoding a
> > reg of 0 that corresponds to a nonexistent MPIDR value (given that's
> > what the reg property is defined to map to on ARM) is more of a hack ;)
> >=20
> > I'm not averse to having a reg value of 0 for this case, but given that
> > there are existing devicetrees without it, requiring a reg property wil=
l
> > break compatibility with them.
>=20
> Then special cases those device trees, but you changing existing
> convention really needs to be avoided. The referenced documentation
> change is brand new, so we're not stuck with it.
I have no problem with changing the bindings and forcing:
#address-cells =3D <1>;
reg =3D <0>;
for UP predating v7, my big worry is related to in-kernel dts that we
already patched to follow the #address-cells =3D <0> rule (and we had to
do it since we got asked that question multiple times on the public
lists).
What do you mean by "special case those device trees" ? I have not
planned to patch them again, unless we really consider that a necessary
evil.
Thanks,
Lorenzo
^ permalink raw reply
* Re: [PATCH v12] ASoC: fsl: Add S/PDIF machine driver
From: Mark Brown @ 2013-08-29 12:15 UTC (permalink / raw)
To: Nicolin Chen
Cc: mark.rutland, devicetree, alsa-devel, lars, swarren, s.hauer,
tomasz.figa, rob.herring, p.zabel, shawn.guo, linuxppc-dev
In-Reply-To: <1377662686-31696-1-git-send-email-b42378@freescale.com>
[-- Attachment #1: Type: text/plain, Size: 245 bytes --]
On Wed, Aug 28, 2013 at 12:04:46PM +0800, Nicolin Chen wrote:
> This patch implements a device-tree-only machine driver for Freescale
> i.MX series Soc. It works with spdif_transmitter/spdif_receiver and
> fsl_spdif.c drivers.
Applied, thanks.
[-- Attachment #2: Digital signature --]
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^ permalink raw reply
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