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* Re: [PATCH 0/4] powernv: kvm: numa fault improvement
From: Aneesh Kumar K.V @ 2014-01-20 15:45 UTC (permalink / raw)
  To: Liu ping fan, Alexander Graf; +Cc: Paul Mackerras, linuxppc-dev, kvm-ppc
In-Reply-To: <CAFgQCTthThEtNEG7EOuYFCtOm46-br59u9QUNkxF0w-TM+RdJQ@mail.gmail.com>

Liu ping fan <kernelfans@gmail.com> writes:

> On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf <agraf@suse.de> wrote:
>>
>> On 11.12.2013, at 09:47, Liu Ping Fan <kernelfans@gmail.com> wrote:
>>
>>> This series is based on Aneesh's series  "[PATCH -V2 0/5] powerpc: mm: Numa faults support for ppc64"
>>>
>>> For this series, I apply the same idea from the previous thread "[PATCH 0/3] optimize for powerpc _PAGE_NUMA"
>>> (for which, I still try to get a machine to show nums)
>>>
>>> But for this series, I think that I have a good justification -- the fact of heavy cost when switching context between guest and host,
>>> which is  well known.
>>
>> This cover letter isn't really telling me anything. Please put a proper description of what you're trying to achieve, why you're trying to achieve what you're trying and convince your readers that it's a good idea to do it the way you do it.
>>
> Sorry for the unclear message. After introducing the _PAGE_NUMA,
> kvmppc_do_h_enter() can not fill up the hpte for guest. Instead, it
> should rely on host's kvmppc_book3s_hv_page_fault() to call
> do_numa_page() to do the numa fault check. This incurs the overhead
> when exiting from rmode to vmode.  My idea is that in
> kvmppc_do_h_enter(), we do a quick check, if the page is right placed,
> there is no need to exit to vmode (i.e saving htab, slab switching)

Can you explain more. Are we looking at hcall from guest  and
hypervisor handling them in real mode ? If so why would guest issue a
hcall on a pte entry that have PAGE_NUMA set. Or is this about
hypervisor handling a missing hpte, because of host swapping this page
out ? In that case how we end up in h_enter ? IIUC for that case we
should get to kvmppc_hpte_hv_fault. 


>
>>> If my suppose is correct, will CCing kvm@vger.kernel.org from next version.
>>
>> This translates to me as "This is an RFC"?
>>
> Yes, I am not quite sure about it. I have no bare-metal to verify it.
> So I hope at least, from the theory, it is correct.
>

-aneesh

^ permalink raw reply

* Re: [PATCH 2/4] powernv: kvm: make _PAGE_NUMA take effect
From: Aneesh Kumar K.V @ 2014-01-20 15:22 UTC (permalink / raw)
  To: Liu Ping Fan, linuxppc-dev, kvm-ppc; +Cc: Paul Mackerras, Alexander Graf
In-Reply-To: <1386751674-14136-3-git-send-email-pingfank@linux.vnet.ibm.com>

Liu Ping Fan <kernelfans@gmail.com> writes:

> To make _PAGE_NUMA take effect, we should force the checking when
> guest uses hypercall to setup hpte.
>
> Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
> ---
>  arch/powerpc/kvm/book3s_hv_rm_mmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
> index 9c51544..af8602d 100644
> --- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
> +++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
> @@ -232,7 +232,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
>  		/* Look up the Linux PTE for the backing page */
>  		pte_size = psize;
>  		pte = lookup_linux_pte(pgdir, hva, writing, &pte_size);
> -		if (pte_present(pte)) {
> +		if (pte_present(pte) && !pte_numa(pte)) {
>  			if (writing && !pte_write(pte))
>  				/* make the actual HPTE be read-only */
>  				ptel = hpte_make_readonly(ptel);

How did we end up doing h_enter on a pte entry with pte_numa bit set ?

-aneesh

^ permalink raw reply

* Re: [PATCH 0/4] powernv: kvm: numa fault improvement
From: Alexander Graf @ 2014-01-20 14:48 UTC (permalink / raw)
  To: Liu ping fan; +Cc: Paul Mackerras, linuxppc-dev, Aneesh Kumar K.V, kvm-ppc
In-Reply-To: <CAFgQCTthThEtNEG7EOuYFCtOm46-br59u9QUNkxF0w-TM+RdJQ@mail.gmail.com>


On 15.01.2014, at 07:36, Liu ping fan <kernelfans@gmail.com> wrote:

> On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf <agraf@suse.de> wrote:
>>=20
>> On 11.12.2013, at 09:47, Liu Ping Fan <kernelfans@gmail.com> wrote:
>>=20
>>> This series is based on Aneesh's series  "[PATCH -V2 0/5] powerpc: =
mm: Numa faults support for ppc64"
>>>=20
>>> For this series, I apply the same idea from the previous thread =
"[PATCH 0/3] optimize for powerpc _PAGE_NUMA"
>>> (for which, I still try to get a machine to show nums)
>>>=20
>>> But for this series, I think that I have a good justification -- the =
fact of heavy cost when switching context between guest and host,
>>> which is  well known.
>>=20
>> This cover letter isn't really telling me anything. Please put a =
proper description of what you're trying to achieve, why you're trying =
to achieve what you're trying and convince your readers that it's a good =
idea to do it the way you do it.
>>=20
> Sorry for the unclear message. After introducing the _PAGE_NUMA,
> kvmppc_do_h_enter() can not fill up the hpte for guest. Instead, it
> should rely on host's kvmppc_book3s_hv_page_fault() to call
> do_numa_page() to do the numa fault check. This incurs the overhead
> when exiting from rmode to vmode.  My idea is that in
> kvmppc_do_h_enter(), we do a quick check, if the page is right placed,
> there is no need to exit to vmode (i.e saving htab, slab switching)
>=20
>>> If my suppose is correct, will CCing kvm@vger.kernel.org from next =
version.
>>=20
>> This translates to me as "This is an RFC"?
>>=20
> Yes, I am not quite sure about it. I have no bare-metal to verify it.
> So I hope at least, from the theory, it is correct.

Paul, could you please give this some thought and maybe benchmark it?


Alex

^ permalink raw reply

* [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Tiejun Chen @ 2014-01-20  8:39 UTC (permalink / raw)
  To: scottwood; +Cc: linuxppc-dev
In-Reply-To: <1390207175-2181-1-git-send-email-tiejun.chen@windriver.com>

AER driver needs to share this PCI err irq with EDAC, otherwise
we can't register AER driver successfully as follows:

genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0000:00:00.0:pcie02 failed with error -16
genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0001:02:00.0:pcie02 failed with error -16

Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
 drivers/edac/mpc85xx_edac.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index fd46b0b..0dda7c4 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
 	if (edac_op_state == EDAC_OPSTATE_INT) {
 		pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
 		res = devm_request_irq(&op->dev, pdata->irq,
-				       mpc85xx_pci_isr, IRQF_DISABLED,
+				       mpc85xx_pci_isr, IRQF_SHARED |
+				       IRQF_DISABLED,
 				       "[EDAC] PCI err", pci);
 		if (res < 0) {
 			printk(KERN_ERR
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH][v2] powerpc/pci: Fix IMMRBAR address
From: Minghuan Lian @ 2014-01-20 10:54 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Scott Wood, Minghuan Lian, Zang Roy-R61911

For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
So when getting base address, these bits should be masked,
otherwise we may get incorrect base address.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
---
Change log:
v2:
Use PCI_BASE_ADDRESS_MEM_MASK instead of 0xfffffff0

 arch/powerpc/sysdev/fsl_pci.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4dfd61d..252716d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -868,6 +868,14 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
 
 		pci_bus_read_config_dword(hose->bus,
 			PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
+
+		/*
+		 * For PEXCSRBAR, bit 3-0 indicate prefetchable and
+		 * address type. So when getting base address, these
+		 * bits should be masked
+		 */
+		base &= PCI_BASE_ADDRESS_MEM_MASK;
+
 		return base;
 	}
 #endif
-- 
1.8.1.2

^ permalink raw reply related

* Re: [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Johannes Thumshirn @ 2014-01-20  9:31 UTC (permalink / raw)
  To: Tiejun Chen; +Cc: scottwood, Borislav Petkov, linuxppc-dev, linux-edac
In-Reply-To: <1390208175-3656-1-git-send-email-tiejun.chen@windriver.com>

On Mon, Jan 20, 2014 at 04:56:15PM +0800, Tiejun Chen wrote:
> AER driver needs to share this PCI err irq with EDAC, otherwise
> we can't register AER driver successfully as follows:
>
> genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
> Call Trace:
> [ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
> [ee063cf0] [c055fac4] dump_stack+0x78/0xa0
> [ee063d00] [c006e16c] __setup_irq+0x51c/0x540
> [ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
> [ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
> [ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
> [ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
> [ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
> [ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
> [ee063e30] [c02c1f94] driver_attach+0x24/0x40
> [ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
> [ee063e60] [c02c2d98] driver_register+0x88/0x140
> [ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
> [ee063e80] [c06fb14c] aer_service_init+0x28/0x38
> [ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
> [ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
> [ee063f30] [c0002ac4] kernel_init+0x14/0x130
> [ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
> aer: probe of 0000:00:00.0:pcie02 failed with error -16
> genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
> Call Trace:
> [ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
> [ee063cf0] [c055fac4] dump_stack+0x78/0xa0
> [ee063d00] [c006e16c] __setup_irq+0x51c/0x540
> [ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
> [ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
> [ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
> [ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
> [ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
> [ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
> [ee063e30] [c02c1f94] driver_attach+0x24/0x40
> [ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
> [ee063e60] [c02c2d98] driver_register+0x88/0x140
> [ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
> [ee063e80] [c06fb14c] aer_service_init+0x28/0x38
> [ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
> [ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
> [ee063f30] [c0002ac4] kernel_init+0x14/0x130
> [ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
> aer: probe of 0001:02:00.0:pcie02 failed with error -16
>
> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
> ---
>  drivers/edac/mpc85xx_edac.c |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> index fd46b0b..0dda7c4 100644
> --- a/drivers/edac/mpc85xx_edac.c
> +++ b/drivers/edac/mpc85xx_edac.c
> @@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
>  	if (edac_op_state == EDAC_OPSTATE_INT) {
>  		pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
>  		res = devm_request_irq(&op->dev, pdata->irq,
> -				       mpc85xx_pci_isr, IRQF_DISABLED,
> +				       mpc85xx_pci_isr, IRQF_SHARED |
> +				       IRQF_DISABLED,
>  				       "[EDAC] PCI err", pci);
>  		if (res < 0) {
>  			printk(KERN_ERR
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-edac" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html


Hi Tiejun,

This is already floating around in linux-next and will hopefully be merged in
3.14.

Hope this helps.

^ permalink raw reply

* [PATCH] powerpc/mpc85xx: Update clock nodes in device tree
From: Yuantian.Tang @ 2014-01-20  8:26 UTC (permalink / raw)
  To: b07421; +Cc: Tang Yuantian, linuxppc-dev

From: Tang Yuantian <yuantian.tang@freescale.com>

The following SoCs will be affected: p2041, p3041, p4080,
p5020, p5040, b4420, b4860, t4240

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 arch/powerpc/boot/dts/fsl/b4420si-post.dtsi |  36 +++++++++
 arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi  |   2 +
 arch/powerpc/boot/dts/fsl/b4860si-post.dtsi |  36 +++++++++
 arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi  |   4 +
 arch/powerpc/boot/dts/fsl/p2041si-post.dtsi |  60 +++++++++++++++
 arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi  |   4 +
 arch/powerpc/boot/dts/fsl/p3041si-post.dtsi |  61 +++++++++++++++
 arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi  |   4 +
 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 113 ++++++++++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi  |   8 ++
 arch/powerpc/boot/dts/fsl/p5020si-post.dtsi |  43 +++++++++++
 arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi  |   2 +
 arch/powerpc/boot/dts/fsl/p5040si-post.dtsi |  61 +++++++++++++++
 arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi  |   4 +
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi |  86 +++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi  |  12 +++
 16 files changed, 536 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index 5a6615d..60566f99 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -86,6 +86,42 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
+		ranges = <0x0 0xe1000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-2.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-2.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+				<&pll1 0>, <&pll1 1>, <&pll1 2>;
+			clock-names = "pll0", "pll0-div2", "pll0-div4",
+				"pll1", "pll1-div2", "pll1-div4";
+			clock-output-names = "cmux0";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index c6e451a..2419731 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -64,11 +64,13 @@
 		cpu0: PowerPC,e6500@0 {
 			device_type = "cpu";
 			reg = <0 1>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2>;
 		};
 		cpu1: PowerPC,e6500@2 {
 			device_type = "cpu";
 			reg = <2 3>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2>;
 		};
 	};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 9813975..cbc354b 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -130,6 +130,42 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
+		ranges = <0x0 0xe1000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-2.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-2.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+				<&pll1 0>, <&pll1 1>, <&pll1 2>;
+			clock-names = "pll0", "pll0-div2", "pll0-div4",
+				"pll1", "pll1-div2", "pll1-div4";
+			clock-output-names = "cmux0";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 9bc26b1..142ac86 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -64,21 +64,25 @@
 		cpu0: PowerPC,e6500@0 {
 			device_type = "cpu";
 			reg = <0 1>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2>;
 		};
 		cpu1: PowerPC,e6500@2 {
 			device_type = "cpu";
 			reg = <2 3>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2>;
 		};
 		cpu2: PowerPC,e6500@4 {
 			device_type = "cpu";
 			reg = <4 5>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2>;
 		};
 		cpu3: PowerPC,e6500@6 {
 			device_type = "cpu";
 			reg = <6 7>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2>;
 		};
 	};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index dc6cc5a..e2987a3 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -306,8 +306,68 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
+		ranges = <0x0 0xe1000 0x1000>;
 		reg = <0xe1000 0x1000>;
 		clock-frequency = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-1.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux0";
+		};
+
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux1";
+		};
+
+		mux2: mux2@40 {
+			#clock-cells = <0>;
+			reg = <0x40 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+		};
+
+		mux3: mux3@60 {
+			#clock-cells = <0>;
+			reg = <0x60 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux3";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 7a2697d..22f3b14 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -81,6 +81,7 @@
 		cpu0: PowerPC,e500mc@0 {
 			device_type = "cpu";
 			reg = <0>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
 				next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
 		cpu1: PowerPC,e500mc@1 {
 			device_type = "cpu";
 			reg = <1>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
 				next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
 		cpu2: PowerPC,e500mc@2 {
 			device_type = "cpu";
 			reg = <2>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_2>;
 			L2_2: l2-cache {
 				next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
 		cpu3: PowerPC,e500mc@3 {
 			device_type = "cpu";
 			reg = <3>;
+			clocks = <&mux3>;
 			next-level-cache = <&L2_3>;
 			L2_3: l2-cache {
 				next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 3fa1e22..7af6d45 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -333,8 +333,69 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
+		ranges = <0x0 0xe1000 0x1000>;
 		reg = <0xe1000 0x1000>;
 		clock-frequency = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-1.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux0";
+		};
+
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux1";
+		};
+
+		mux2: mux2@40 {
+			#clock-cells = <0>;
+			reg = <0x40 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux2";
+		};
+
+		mux3: mux3@60 {
+			#clock-cells = <0>;
+			reg = <0x60 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux3";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index c9ca2c3..468e8be 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -82,6 +82,7 @@
 		cpu0: PowerPC,e500mc@0 {
 			device_type = "cpu";
 			reg = <0>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
 				next-level-cache = <&cpc>;
@@ -90,6 +91,7 @@
 		cpu1: PowerPC,e500mc@1 {
 			device_type = "cpu";
 			reg = <1>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
 				next-level-cache = <&cpc>;
@@ -98,6 +100,7 @@
 		cpu2: PowerPC,e500mc@2 {
 			device_type = "cpu";
 			reg = <2>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_2>;
 			L2_2: l2-cache {
 				next-level-cache = <&cpc>;
@@ -106,6 +109,7 @@
 		cpu3: PowerPC,e500mc@3 {
 			device_type = "cpu";
 			reg = <3>;
+			clocks = <&mux3>;
 			next-level-cache = <&L2_3>;
 			L2_3: l2-cache {
 				next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 34769a7..2415e1f 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -353,8 +353,121 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
+		ranges = <0x0 0xe1000 0x1000>;
 		reg = <0xe1000 0x1000>;
 		clock-frequency = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-1.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2";
+		};
+
+		pll2: pll2@840 {
+			#clock-cells = <1>;
+			reg = <0x840 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll2", "pll2-div2";
+		};
+
+		pll3: pll3@860 {
+			#clock-cells = <1>;
+			reg = <0x860 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll3", "pll3-div2";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux0";
+		};
+
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux1";
+		};
+
+		mux2: mux2@40 {
+			#clock-cells = <0>;
+			reg = <0x40 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux2";
+		};
+
+		mux3: mux3@60 {
+			#clock-cells = <0>;
+			reg = <0x60 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux3";
+		};
+
+		mux4: mux4@80 {
+			#clock-cells = <0>;
+			reg = <0x80 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+			clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+			clock-output-names = "cmux4";
+		};
+
+		mux5: mux5@a0 {
+			#clock-cells = <0>;
+			reg = <0xa0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+			clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+			clock-output-names = "cmux5";
+		};
+
+		mux6: mux6@c0 {
+			#clock-cells = <0>;
+			reg = <0xc0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+			clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+			clock-output-names = "cmux6";
+		};
+
+		mux7: mux7@e0 {
+			#clock-cells = <0>;
+			reg = <0xe0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+			clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+			clock-output-names = "cmux7";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index 493d9a0..0040b5a 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -81,6 +81,7 @@
 		cpu0: PowerPC,e500mc@0 {
 			device_type = "cpu";
 			reg = <0>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
 				next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
 		cpu1: PowerPC,e500mc@1 {
 			device_type = "cpu";
 			reg = <1>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
 				next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
 		cpu2: PowerPC,e500mc@2 {
 			device_type = "cpu";
 			reg = <2>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_2>;
 			L2_2: l2-cache {
 				next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
 		cpu3: PowerPC,e500mc@3 {
 			device_type = "cpu";
 			reg = <3>;
+			clocks = <&mux3>;
 			next-level-cache = <&L2_3>;
 			L2_3: l2-cache {
 				next-level-cache = <&cpc>;
@@ -113,6 +117,7 @@
 		cpu4: PowerPC,e500mc@4 {
 			device_type = "cpu";
 			reg = <4>;
+			clocks = <&mux4>;
 			next-level-cache = <&L2_4>;
 			L2_4: l2-cache {
 				next-level-cache = <&cpc>;
@@ -121,6 +126,7 @@
 		cpu5: PowerPC,e500mc@5 {
 			device_type = "cpu";
 			reg = <5>;
+			clocks = <&mux5>;
 			next-level-cache = <&L2_5>;
 			L2_5: l2-cache {
 				next-level-cache = <&cpc>;
@@ -129,6 +135,7 @@
 		cpu6: PowerPC,e500mc@6 {
 			device_type = "cpu";
 			reg = <6>;
+			clocks = <&mux6>;
 			next-level-cache = <&L2_6>;
 			L2_6: l2-cache {
 				next-level-cache = <&cpc>;
@@ -137,6 +144,7 @@
 		cpu7: PowerPC,e500mc@7 {
 			device_type = "cpu";
 			reg = <7>;
+			clocks = <&mux7>;
 			next-level-cache = <&L2_7>;
 			L2_7: l2-cache {
 				next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index bc3ae5a..2985de4 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -338,8 +338,51 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+		ranges = <0x0 0xe1000 0x1000>;
 		reg = <0xe1000 0x1000>;
 		clock-frequency = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-1.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux0";
+		};
+
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux1";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index 8df47fc..fe1a2e6 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -88,6 +88,7 @@
 		cpu0: PowerPC,e5500@0 {
 			device_type = "cpu";
 			reg = <0>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
 				next-level-cache = <&cpc>;
@@ -96,6 +97,7 @@
 		cpu1: PowerPC,e5500@1 {
 			device_type = "cpu";
 			reg = <1>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
 				next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index a91897f..546a899 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -298,8 +298,69 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
+		ranges = <0x0 0xe1000 0x1000>;
 		reg = <0xe1000 0x1000>;
 		clock-frequency = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-1.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-1.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux0";
+		};
+
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux1";
+		};
+
+		mux2: mux2@40 {
+			#clock-cells = <0>;
+			reg = <0x40 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux2";
+		};
+
+		mux3: mux3@60 {
+			#clock-cells = <0>;
+			reg = <0x60 0x4>;
+			compatible = "fsl,qoriq-core-mux-1.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+			clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+			clock-output-names = "cmux3";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index 40ca943..3674686 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -81,6 +81,7 @@
 		cpu0: PowerPC,e5500@0 {
 			device_type = "cpu";
 			reg = <0>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
 				next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
 		cpu1: PowerPC,e5500@1 {
 			device_type = "cpu";
 			reg = <1>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
 				next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
 		cpu2: PowerPC,e5500@2 {
 			device_type = "cpu";
 			reg = <2>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_2>;
 			L2_2: l2-cache {
 				next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
 		cpu3: PowerPC,e5500@3 {
 			device_type = "cpu";
 			reg = <3>;
+			clocks = <&mux3>;
 			next-level-cache = <&L2_3>;
 			L2_3: l2-cache {
 				next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 4143a97..f99d74f 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -369,7 +369,93 @@
 
 	clockgen: global-utilities@e1000 {
 		compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
+		ranges = <0x0 0xe1000 0x1000>;
 		reg = <0xe1000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysclk: sysclk {
+			#clock-cells = <0>;
+			compatible = "fsl,qoriq-sysclk-2.0";
+			clock-output-names = "sysclk";
+		};
+
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+		};
+
+		pll1: pll1@820 {
+			#clock-cells = <1>;
+			reg = <0x820 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+		};
+
+		pll2: pll2@840 {
+			#clock-cells = <1>;
+			reg = <0x840 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll2", "pll2-div2", "pll2-div4";
+		};
+
+		pll3: pll3@860 {
+			#clock-cells = <1>;
+			reg = <0x860 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll3", "pll3-div2", "pll3-div4";
+		};
+
+		pll4: pll4@880 {
+			#clock-cells = <1>;
+			reg = <0x880 0x4>;
+			compatible = "fsl,qoriq-core-pll-2.0";
+			clocks = <&sysclk>;
+			clock-output-names = "pll4", "pll4-div2", "pll4-div4";
+		};
+
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 0x4>;
+			compatible = "fsl,qoriq-core-mux-2.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+				<&pll1 0>, <&pll1 1>, <&pll1 2>,
+				<&pll2 0>, <&pll2 1>, <&pll2 2>;
+			clock-names = "pll0", "pll0-div2", "pll0-div4",
+				"pll1", "pll1-div2", "pll1-div4",
+				"pll2", "pll2-div2", "pll2-div4";
+			clock-output-names = "cmux0";
+		};
+
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 0x4>;
+			compatible = "fsl,qoriq-core-mux-2.0";
+			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+				<&pll1 0>, <&pll1 1>, <&pll1 2>,
+				<&pll2 0>, <&pll2 1>, <&pll2 2>;
+			clock-names = "pll0", "pll0-div2", "pll0-div4",
+				"pll1", "pll1-div2", "pll1-div4",
+				"pll2", "pll2-div2", "pll2-div4";
+			clock-output-names = "cmux1";
+		};
+
+		mux2: mux2@40 {
+			#clock-cells = <0>;
+			reg = <0x40 0x4>;
+			compatible = "fsl,qoriq-core-mux-2.0";
+			clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
+				<&pll4 0>, <&pll4 1>, <&pll4 2>;
+			clock-names = "pll3", "pll3-div2", "pll3-div4",
+				"pll4", "pll4-div2", "pll4-div4";
+			clock-output-names = "cmux2";
+		};
 	};
 
 	rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index a93c55a..0b8ccc5 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -67,61 +67,73 @@
 		cpu0: PowerPC,e6500@0 {
 			device_type = "cpu";
 			reg = <0 1>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_1>;
 		};
 		cpu1: PowerPC,e6500@2 {
 			device_type = "cpu";
 			reg = <2 3>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_1>;
 		};
 		cpu2: PowerPC,e6500@4 {
 			device_type = "cpu";
 			reg = <4 5>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_1>;
 		};
 		cpu3: PowerPC,e6500@6 {
 			device_type = "cpu";
 			reg = <6 7>;
+			clocks = <&mux0>;
 			next-level-cache = <&L2_1>;
 		};
 		cpu4: PowerPC,e6500@8 {
 			device_type = "cpu";
 			reg = <8 9>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_2>;
 		};
 		cpu5: PowerPC,e6500@10 {
 			device_type = "cpu";
 			reg = <10 11>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_2>;
 		};
 		cpu6: PowerPC,e6500@12 {
 			device_type = "cpu";
 			reg = <12 13>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_2>;
 		};
 		cpu7: PowerPC,e6500@14 {
 			device_type = "cpu";
 			reg = <14 15>;
+			clocks = <&mux1>;
 			next-level-cache = <&L2_2>;
 		};
 		cpu8: PowerPC,e6500@16 {
 			device_type = "cpu";
 			reg = <16 17>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_3>;
 		};
 		cpu9: PowerPC,e6500@18 {
 			device_type = "cpu";
 			reg = <18 19>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_3>;
 		};
 		cpu10: PowerPC,e6500@20 {
 			device_type = "cpu";
 			reg = <20 21>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_3>;
 		};
 		cpu11: PowerPC,e6500@22 {
 			device_type = "cpu";
 			reg = <22 23>;
+			clocks = <&mux2>;
 			next-level-cache = <&L2_3>;
 		};
 	};
-- 
1.8.0

^ permalink raw reply related

* Re: [PATCH] slub: Don't throw away partial remote slabs if there is no local memory
From: Wanpeng Li @ 2014-01-20  9:10 UTC (permalink / raw)
  To: Joonsoo Kim
  Cc: cl, nacc, penberg, linux-mm, Han Pingtian, paulus,
	Anton Blanchard, mpm, linuxppc-dev
In-Reply-To: <20140107074136.GA4011@lge.com>

[-- Attachment #1: Type: text/plain, Size: 1203 bytes --]

Hi Joonsoo,
On Tue, Jan 07, 2014 at 04:41:36PM +0900, Joonsoo Kim wrote:
[...]
>
>------------->8--------------------
>diff --git a/mm/slub.c b/mm/slub.c
>index c3eb3d3..a1f6dfa 100644
>--- a/mm/slub.c
>+++ b/mm/slub.c
>@@ -1672,7 +1672,19 @@ static void *get_partial(struct kmem_cache *s, gfp_t flags, int node,
> {
>        void *object;
>        int searchnode = (node == NUMA_NO_NODE) ? numa_node_id() : node;
>+       struct zonelist *zonelist;
>+       struct zoneref *z;
>+       struct zone *zone;
>+       enum zone_type high_zoneidx = gfp_zone(flags);
>
>+       if (!node_present_pages(searchnode)) {
>+               zonelist = node_zonelist(searchnode, flags);
>+               for_each_zone_zonelist(zone, z, zonelist, high_zoneidx) {
>+                       searchnode = zone_to_nid(zone);
>+                       if (node_present_pages(searchnode))
>+                               break;
>+               }
>+       }
>        object = get_partial_node(s, get_node(s, searchnode), c, flags);
>        if (object || node != NUMA_NO_NODE)
>                return object;
>

The patch fix the bug. However, the kernel crashed very quickly after running 
stress tests for a short while:


[-- Attachment #2: oops --]
[-- Type: text/plain, Size: 4918 bytes --]

[  287.464285] Unable to handle kernel paging request for data at address 0x00000001
[  287.464289] Faulting instruction address: 0xc000000000445af8
[  287.464294] Oops: Kernel access of bad area, sig: 11 [#1]
[  287.464296] SMP NR_CPUS=2048 NUMA pSeries
[  287.464301] Modules linked in: btrfs raid6_pq xor dm_service_time sg nfsv3 arc4 md4 rpcsec_gss_krb5 nfsv4 nls_utf8 cifs nfs fscache dns_resolver nf_conntrack_netbios_ns nf_conntrack_broadcast ipt_MASQUERADE ip6t_REJECT ipt_REJECT xt_conntrack ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw iptable_filter ip_tables ext4 mbcache jbd2 ibmvfc scsi_transport_fc ibmveth nx_crypto pseries_rng nfsd auth_rpcgss nfs_acl lockd binfmt_misc sunrpc uinput dm_multipath xfs libcrc32c sd_mod crc_t10dif crct10dif_common ibmvscsi scsi_transport_srp scsi_tgt dm_mirror dm_region_hash dm_log dm_mod
[  287.464374] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-71.el7.91831.ppc64 #1
[  287.464378] task: c000000000fde590 ti: c0000001fffd0000 task.ti: c0000000010a4000
[  287.464382] NIP: c000000000445af8 LR: c000000000445bcc CTR: c000000000445b90
[  287.464385] REGS: c0000001fffd38e0 TRAP: 0300   Not tainted  (3.10.0-71.el7.91831.ppc64)
[  287.464388] MSR: 8000000000009032 <SF,EE,ME,IR,DR,RI>  CR: 88002084  XER: 00000001
[  287.464397] SOFTE: 0
[  287.464398] CFAR: c00000000000908c
[  287.464401] DAR: 0000000000000001, DSISR: 40000000
[  287.464403]
GPR00: d000000003649a04 c0000001fffd3b60 c0000000010a94d0 0000000000000003
GPR04: c00000018d841048 c0000001fffd3bd0 0000000000000012 d00000000364eff0
GPR08: c0000001fffd3bd0 0000000000000001 d00000000364d688 c000000000445b90
GPR12: d00000000364b960 c000000007e00000 00000000042ac510 0000000000000060
GPR16: 0000000000200000 00000000fffffb19 c000000001122100 0000000000000000
GPR20: c000000000a94680 c000000001122180 c000000000a94680 000000000000000a
GPR24: 0000000000000100 0000000000000000 0000000000000001 c0000001ef900000
GPR28: c0000001d6c066f0 c0000001aea03520 c0000001bc9a2640 c00000018d841680
[  287.464447] NIP [c000000000445af8] .__dev_printk+0x28/0xc0
[  287.464450] LR [c000000000445bcc] .dev_printk+0x3c/0x50
[  287.464453] PACATMSCRATCH [8000000000009032]
[  287.464455] Call Trace:
[  287.464458] [c0000001fffd3b60] [c0000001fffd3c00] 0xc0000001fffd3c00 (unreliable)
[  287.464467] [c0000001fffd3bf0] [d000000003649a04] .ibmvfc_scsi_done+0x334/0x3e0 [ibmvfc]
[  287.464474] [c0000001fffd3cb0] [d0000000036495b8] .ibmvfc_handle_crq+0x2e8/0x320 [ibmvfc]
[  287.464488] [c0000001fffd3d30] [d000000003649fe4] .ibmvfc_tasklet+0xd4/0x250 [ibmvfc]
[  287.464494] [c0000001fffd3de0] [c00000000009b46c] .tasklet_action+0xcc/0x1b0
[  287.464498] [c0000001fffd3e90] [c00000000009a668] .__do_softirq+0x148/0x360
[  287.464503] [c0000001fffd3f90] [c0000000000218a8] .call_do_softirq+0x14/0x24
[  287.464507] [c0000001fffcfdf0] [c0000000000107e0] .do_softirq+0xd0/0x100
[  287.464511] [c0000001fffcfe80] [c00000000009aba8] .irq_exit+0x1b8/0x1d0
[  287.464514] [c0000001fffcff10] [c000000000010410] .__do_irq+0xc0/0x1e0
[  287.464518] [c0000001fffcff90] [c0000000000218cc] .call_do_irq+0x14/0x24
[  287.464522] [c0000000010a76d0] [c0000000000105bc] .do_IRQ+0x8c/0x100
[  287.464527] --- Exception: 501 at 0xffff
[  287.464527]     LR = .arch_local_irq_restore+0x74/0x90
[  287.464533] [c0000000010a7770] [c000000000002494] hardware_interrupt_common+0x114/0x180 (unreliable)
[  287.464540] --- Exception: 501 at .plpar_hcall_norets+0x84/0xd4
[  287.464540]     LR = .check_and_cede_processor+0x24/0x40
[  287.464546] [c0000000010a7a60] [0000000000000001] 0x1 (unreliable)
[  287.464550] [c0000000010a7ad0] [c000000000074ecc] .shared_cede_loop+0x2c/0x70
[  287.464555] [c0000000010a7b50] [c0000000005538f4] .cpuidle_enter_state+0x64/0x150
[  287.464559] [c0000000010a7c10] [c000000000553ad0] .cpuidle_idle_call+0xf0/0x300
[  287.464563] [c0000000010a7cc0] [c0000000000695c0] .pseries_lpar_idle+0x10/0x50
[  287.464568] [c0000000010a7d30] [c000000000016ee4] .arch_cpu_idle+0x64/0x150
[  287.464572] [c0000000010a7db0] [c0000000000f6504] .cpu_startup_entry+0x1a4/0x2d0
[  287.464577] [c0000000010a7e80] [c00000000000bd04] .rest_init+0x94/0xb0
[  287.464582] [c0000000010a7ef0] [c000000000a044d0] .start_kernel+0x4b0/0x4cc
[  287.464586] [c0000000010a7f90] [c000000000009d30] .start_here_common+0x20/0x70
[  287.464589] Instruction dump:
[  287.464591] 60000000 60420000 2c240000 7c6a1b78 41c20088 e9240090 88630001 7ca82b78
[  287.464598] 2fa90000 3863ffd0 7c6307b4 419e002c <e8c90000> e8e40050 2fa70000 419e004c
[  287.464606] ---[ end trace c469801a8c53d8f1 ]---
[  287.466576]
[  287.466582] Sending IPI to other CPUs
[  287.468526] IPI complete


^ permalink raw reply

* [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Tiejun Chen @ 2014-01-20  8:56 UTC (permalink / raw)
  To: scottwood; +Cc: linuxppc-dev, linux-edac

AER driver needs to share this PCI err irq with EDAC, otherwise
we can't register AER driver successfully as follows:

genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0000:00:00.0:pcie02 failed with error -16
genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0001:02:00.0:pcie02 failed with error -16

Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
 drivers/edac/mpc85xx_edac.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index fd46b0b..0dda7c4 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
 	if (edac_op_state == EDAC_OPSTATE_INT) {
 		pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
 		res = devm_request_irq(&op->dev, pdata->irq,
-				       mpc85xx_pci_isr, IRQF_DISABLED,
+				       mpc85xx_pci_isr, IRQF_SHARED |
+				       IRQF_DISABLED,
 				       "[EDAC] PCI err", pci);
 		if (res < 0) {
 			printk(KERN_ERR
-- 
1.7.9.5

^ permalink raw reply related

* Re: [PATCH] DMA: Freescale: change BWC from 256 bytes to 1024 bytes
From: Vinod Koul @ 2014-01-20  7:43 UTC (permalink / raw)
  To: hongbo.zhang
  Cc: linux-kernel, scottwood, dmaengine, dan.j.williams, linuxppc-dev
In-Reply-To: <1389852653-8806-1-git-send-email-hongbo.zhang@freescale.com>

On Thu, Jan 16, 2014 at 02:10:53PM +0800, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
> 
> Freescale DMA has a feature of BandWidth Control (ab. BWC), which is currently
> 256 bytes and should be changed to 1024 bytes for best DMA throughput.
> Changing BWC from 256 to 1024 will improve DMA performance much, in cases
> whatever one channel is running or multi channels are running simultanously,
> large or small buffers are copied.  And this change doesn't impact memory
> access performance remarkably, lmbench tests show that for some cases the
> memory performance are decreased very slightly, while the others are even
> better.
> Tested on T4240.

Applied, thanks

--
~Vinod

^ permalink raw reply

* [PATCH] powerpc: hugetlb: replace __get_cpu_var with get_cpu_var
From: Tiejun Chen @ 2014-01-20  8:39 UTC (permalink / raw)
  To: scottwood; +Cc: linuxppc-dev

Replace __get_cpu_var safely with get_cpu_var to avoid
the following call trace:

[ 7253.637591] BUG: using smp_processor_id() in preemptible [00000000 00000000]
code: hugemmap01/9048
[ 7253.637601] caller is free_hugepd_range.constprop.25+0x88/0x1a8
[ 7253.637605] CPU: 1 PID: 9048 Comm: hugemmap01 Not tainted 3.10.20-rt14+ #114
[ 7253.637606] Call Trace:
[ 7253.637617] [cb049d80] [c0007ea4] show_stack+0x4c/0x168 (unreliable)
[ 7253.637624] [cb049dc0] [c031c674] debug_smp_processor_id+0x114/0x134
[ 7253.637628] [cb049de0] [c0016d28] free_hugepd_range.constprop.25+0x88/0x1a8
[ 7253.637632] [cb049e00] [c001711c] hugetlb_free_pgd_range+0x6c/0x168
[ 7253.637639] [cb049e40] [c0117408] free_pgtables+0x12c/0x150
[ 7253.637646] [cb049e70] [c011ce38] unmap_region+0xa0/0x11c
[ 7253.637671] [cb049ef0] [c011f03c] do_munmap+0x224/0x3bc
[ 7253.637676] [cb049f20] [c011f2e0] vm_munmap+0x38/0x5c
[ 7253.637682] [cb049f40] [c000ef88] ret_from_syscall+0x0/0x3c
[ 7253.637686] --- Exception: c01 at 0xff16004

Signed-off-by: Tiejun Chen<tiejun.chen@windriver.com>
---
 arch/powerpc/mm/hugetlbpage.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 90bb6d9..eb92365 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -472,12 +472,13 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
 {
 	struct hugepd_freelist **batchp;
 
-	batchp = &__get_cpu_var(hugepd_freelist_cur);
+	batchp = &get_cpu_var(hugepd_freelist_cur);
 
 	if (atomic_read(&tlb->mm->mm_users) < 2 ||
 	    cpumask_equal(mm_cpumask(tlb->mm),
 			  cpumask_of(smp_processor_id()))) {
 		kmem_cache_free(hugepte_cache, hugepte);
+        put_cpu_var(hugepd_freelist_cur);
 		return;
 	}
 
@@ -491,6 +492,7 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
 		call_rcu_sched(&(*batchp)->rcu, hugepd_free_rcu_callback);
 		*batchp = NULL;
 	}
+	put_cpu_var(hugepd_freelist_cur);
 }
 #endif
 
-- 
1.7.9.5

^ permalink raw reply related

* Re: KGDB panics on p2020 target
From: "“tiejun.chen”" @ 2014-01-20  8:25 UTC (permalink / raw)
  To: Arun Chandran, linuxppc-dev
In-Reply-To: <CAFdej02gyEuDDWwBa4wG01NVf_-wOysdWha+mi+Z+0YafiUAGQ@mail.gmail.com>

On 01/17/2014 03:52 PM, Arun Chandran wrote:
> Hi,
>
> I am testing kgdb on freescale p2020 target.
>
> In target
> ------------
>
> 1)
> root@freescale-p2020ds:~# uname -a
> Linux freescale-p2020ds 3.10.20-rt14+ #9 SMP Thu Jan 16 16:32:15 IST 2014
> ppc GNU/Linux
>
> 2)
> root@freescale-p2020ds:~# cat /proc/cpuinfo
> processor       : 0
> cpu             : e500v2
> clock           : 999.990008MHz
> revision        : 4.0 (pvr 8021 1040)
> bogomips        : 124.99
>
> processor       : 1
> cpu             : e500v2
> clock           : 999.990008MHz
> revision        : 4.0 (pvr 8021 1040)
> bogomips        : 124.99
>
> total bogomips  : 249.99
> timebase        : 62499376
> platform        : P2020 DS
> model           : fsl,P2020DS
> Memory          : 768 MB
>
> 3)
> freescale-p2020ds:~# echo "ttyS1,115200" >
> /sys/module/kgdboc/parameters/kgdoc
>
> 4) I set up host (settings given below); Then I send   "SysRq : DEBUG"
>
> In host
> ----------
> (gdb) target remote /dev/ttyS0
> Remote debugging using /dev/ttyS0
> kgdb_breakpoint () at kernel/debug/debug_core.c:1013
> 1013 arch_kgdb_breakpoint();
> (gdb) b sys_sync
> Breakpoint 1 at 0xc0167288: file fs/sync.c, line 103.
> (gdb) c
> Continuing.
>
> I am able to take control in host; after that I am setting breakpoint at
> "sys_sync"
>
> In target
> ------------
> root@freescale-p2020ds:~# for i in 1 2 3 4 5 6 7 8 9
>> do
>> sync
>> done
>
> In host
> ----------
> Breakpoint 1, sys_sync () at fs/sync.c:103
> 103 {
> (gdb) c
> Continuing.
>
> Breakpoint is hit only one time instead of 9 times; after that target hangs.

I recommend you try upstream to take a further look at this, instead of that 
Freescale distribution. As I recall currently KGDB works well in 85xx case in ML.

>
> Then i tried to send "SysRq : DEBUG" in target kernel panics.
>
> I have pasted the panic below.
>
> #########################################
> SysRq : DEBUG
> Kernel panic - not syncing: Recursive entry to debugger

The kernel already trap into kgdb_handle_exception() with the debug exception 
while triggering that break point, but again you trigger another debug exception 
by SysRq. Actually KGDB can't handle such this recursive behavior, so KGDB 
always call kgdb_reenter_check() to prevent this scenario with this call trace.

static int kgdb_reenter_check(struct kgdb_state *ks)
{
         unsigned long addr;

         if (atomic_read(&kgdb_active) != raw_smp_processor_id())
                 return 0;
	...

         if (exception_level > 1) {
                 dump_stack();
                 panic("Recursive entry to debugger");
         }


Tiejun	

> CPU: 1 PID: 2266 Comm: cron Not tainted 3.10.20-rt14+ #6
> Call Trace:
> [effe5d10] [c0008060] show_stack+0x4c/0x168 (unreliable)
> [effe5d50] [c0588878] panic+0xe4/0x224
> [effe5da0] [c00b2cbc] kgdb_handle_exception+0x1d4/0x1f8
> [effe5df0] [c0010038] kgdb_handle_breakpoint+0x4c/0x80
> [effe5e00] [c057e7e0] program_check_exception+0x10c/0x264
> [effe5e10] [c000f660] ret_from_except_full+0x0/0x4c
> --- Exception: 700 at sysrq_handle_dbg+0x3c/0xc8
>      LR = __handle_sysrq+0x154/0x1cc
> [effe5ed0] [c033df5c] __handle_sysrq+0x140/0x1cc (unreliable)
> [effe5f00] [c0353ef8] serial8250_rx_chars+0xe8/0x218
> [effe5f30] [c0359644] fsl8250_handle_irq+0xac/0x174
> [effe5f50] [c0352f9c] serial8250_interrupt+0x40/0xe8
> [effe5f70] [c00b5500] handle_irq_event_percpu+0xcc/0x2a8
> [effe5fc0] [c00b5720] handle_irq_event+0x44/0x74
> [effe5fe0] [c00b8e14] handle_fasteoi_irq+0xd0/0x17c
> [effe5ff0] [c000d58c] call_handle_irq+0x18/0x28
> [c4f91b10] [c0004f60] do_IRQ+0x150/0x224
> [c4f91b40] [c000f6ac] ret_from_except+0x0/0x18
> --- Exception: 501 at rpcauth_lookup_credcache+0x138/0x2a4
>      LR = rpcauth_lookup_credcache+0xb8/0x2a4
> [c4f91c00] [24002424] 0x24002424 (unreliable)
> [c4f91c50] [c055cb84] rpcauth_lookupcred+0x64/0xac
> [c4f91c80] [c055ce2c] rpcauth_refreshcred+0x11c/0x124
> [c4f91cc0] [c055ac80] __rpc_execute+0x8c/0x330
> [c4f91d10] [c05540b8] rpc_run_task+0x9c/0xc4
> [c4f91d20] [c0554204] rpc_call_sync+0x50/0xb8
> [c4f91d50] [c0257164] nfs_proc_getattr+0x48/0x5c
> [c4f91d70] [c024aaa4] __nfs_revalidate_inode+0xa8/0x168
> [c4f91d90] [c024ac1c] nfs_revalidate_mapping+0xb8/0x194
> [c4f91da0] [c0251f00] nfs_follow_link+0x24/0xc8
> [c4f91dc0] [c0145280] path_lookupat+0x2f4/0x824
> [c4f91e10] [c01457dc] filename_lookup.isra.33+0x2c/0x8c
> [c4f91e30] [c0147a74] user_path_at_empty+0x58/0x9c
> [c4f91eb0] [c013d5bc] vfs_fstatat+0x54/0xb4
> [c4f91ee0] [c013d93c] SyS_stat64+0x1c/0x44
> [c4f91f40] [c000eec0] ret_from_syscall+0x0/0x3c
> --- Exception: c01 at 0xff08a98
>      LR = 0xfed53e8
> CPU: 1 PID: 2266 Comm: cron Not tainted 3.10.20-rt14+ #6
> Call Trace:
> [effe5bb0] [c0008060] show_stack+0x4c/0x168 (unreliable)
> [effe5bf0] [c00b2cac] kgdb_handle_exception+0x1c4/0x1f8
> [effe5c40] [c0010038] kgdb_handle_breakpoint+0x4c/0x80
> [effe5c50] [c057e7e0] program_check_exception+0x10c/0x264
> [effe5c60] [c000f660] ret_from_except_full+0x0/0x4c
> --- Exception: 700 at kgdb_panic_event+0x1c/0x3c
>      LR = notifier_call_chain+0x60/0xb0
> [effe5d20] [00000000]    (nil) (unreliable)
> [effe5d40] [c05819dc] __atomic_notifier_call_chain+0x14/0x24
> [effe5d50] [c05888a8] panic+0x114/0x224
> [effe5da0] [c00b2cbc] kgdb_handle_exception+0x1d4/0x1f8
> [effe5df0] [c0010038] kgdb_handle_breakpoint+0x4c/0x80
> [effe5e00] [c057e7e0] program_check_exception+0x10c/0x264
> [effe5e10] [c000f660] ret_from_except_full+0x0/0x4c
> --- Exception: 700 at sysrq_handle_dbg+0x3c/0xc8
>      LR = __handle_sysrq+0x154/0x1cc
> [effe5ed0] [c033df5c] __handle_sysrq+0x140/0x1cc (unreliable)
> [effe5f00] [c0353ef8] serial8250_rx_chars+0xe8/0x218
> [effe5f30] [c0359644] fsl8250_handle_irq+0xac/0x174
> [effe5f50] [c0352f9c] serial8250_interrupt+0x40/0xe8
> [effe5f70] [c00b5500] handle_irq_event_percpu+0xcc/0x2a8
> [effe5fc0] [c00b5720] handle_irq_event+0x44/0x74
> [effe5fe0] [c00b8e14] handle_fasteoi_irq+0xd0/0x17c
> [effe5ff0] [c000d58c] call_handle_irq+0x18/0x28
> [c4f91b10] [c0004f60] do_IRQ+0x150/0x224
> [c4f91b40] [c000f6ac] ret_from_except+0x0/0x18
> --- Exception: 501 at rpcauth_lookup_credcache+0x138/0x2a4
>      LR = rpcauth_lookup_credcache+0xb8/0x2a4
> [c4f91c00] [24002424] 0x24002424 (unreliable)
> [c4f91c50] [c055cb84] rpcauth_lookupcred+0x64/0xac
> [c4f91c80] [c055ce2c] rpcauth_refreshcred+0x11c/0x124
> [c4f91cc0] [c055ac80] __rpc_execute+0x8c/0x330
> [c4f91d10] [c05540b8] rpc_run_task+0x9c/0xc4
> [c4f91d20] [c0554204] rpc_call_sync+0x50/0xb8
> [c4f91d50] [c0257164] nfs_proc_getattr+0x48/0x5c
> [c4f91d70] [c024aaa4] __nfs_revalidate_inode+0xa8/0x168
> [c4f91d90] [c024ac1c] nfs_revalidate_mapping+0xb8/0x194
> [c4f91da0] [c0251f00] nfs_follow_link+0x24/0xc8
> [c4f91dc0] [c0145280] path_lookupat+0x2f4/0x824
> [c4f91e10] [c01457dc] filename_lookup.isra.33+0x2c/0x8c
> [c4f91e30] [c0147a74] user_path_at_empty+0x58/0x9c
> [c4f91eb0] [c013d5bc] vfs_fstatat+0x54/0xb4
> [c4f91ee0] [c013d93c] SyS_stat64+0x1c/0x44
> [c4f91f40] [c000eec0] ret_from_syscall+0x0/0x3c
> --- Exception: c01 at 0xff08a98
>      LR = 0xfed53e8
>
>
> ########################################################
>
> Could you please share your thoughts on this issue?
>
> I have also attached my kernel .config.
>
> Regards,
> Arun C
>
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>

^ permalink raw reply

* [PATCH] powerpc/perf: Define perf_event_print_debug() to print PMU register values
From: Michael Ellerman @ 2014-01-20  6:16 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: khandual

From: Anshuman Khandual <khandual@linux.vnet.ibm.com>

Currently the sysrq ShowRegs command does not print any PMU registers as
we have an empty definition for perf_event_print_debug(). This patch
defines perf_event_print_debug() to print various PMU registers.

Example output:

CPU: 0 PMU registers, ppmu = POWER7 n_counters = 6
PMC1:  00000000 PMC2: 00000000 PMC3: 00000000 PMC4: 00000000
PMC5:  00000000 PMC6: 00000000 PMC7: deadbeef PMC8: deadbeef
MMCR0: 0000000080000000 MMCR1: 0000000000000000 MMCRA: 0f00000001000000
SIAR:  0000000000000000 SDAR:  0000000000000000 SIER:  0000000000000000

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
[mpe: Fix 32 bit build and rework formatting for compactness]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
 arch/powerpc/include/asm/perf_event_server.h |  1 +
 arch/powerpc/perf/core-book3s.c              | 55 ++++++++++++++++++++++++++--
 2 files changed, 52 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 3fd2f1b..9ed73714 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -14,6 +14,7 @@
 #include <linux/device.h>
 #include <uapi/asm/perf_event.h>
 
+/* Update perf_event_print_debug() if this changes */
 #define MAX_HWEVENTS		8
 #define MAX_EVENT_ALTERNATIVES	8
 #define MAX_LIMITED_HWCOUNTERS	2
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 29b89e8..ff3d8a4 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -563,10 +563,6 @@ out:
 
 static void perf_event_interrupt(struct pt_regs *regs);
 
-void perf_event_print_debug(void)
-{
-}
-
 /*
  * Read one performance monitor counter (PMC).
  */
@@ -645,6 +641,57 @@ static void write_pmc(int idx, unsigned long val)
 	}
 }
 
+/* Called from sysrq_handle_showregs() */
+void perf_event_print_debug(void)
+{
+	unsigned long sdar, sier, flags;
+	u32 pmcs[MAX_HWEVENTS];
+	int i;
+
+	if (!ppmu->n_counter)
+		return;
+
+	local_irq_save(flags);
+
+	pr_info("CPU: %d PMU registers, ppmu = %s n_counters = %d",
+		 smp_processor_id(), ppmu->name, ppmu->n_counter);
+
+	for (i = 0; i < ppmu->n_counter; i++)
+		pmcs[i] = read_pmc(i + 1);
+
+	for (; i < MAX_HWEVENTS; i++)
+		pmcs[i] = 0xdeadbeef;
+
+	pr_info("PMC1:  %08x PMC2: %08x PMC3: %08x PMC4: %08x\n",
+		 pmcs[0], pmcs[1], pmcs[2], pmcs[3]);
+
+	if (ppmu->n_counter > 4)
+		pr_info("PMC5:  %08x PMC6: %08x PMC7: %08x PMC8: %08x\n",
+			 pmcs[4], pmcs[5], pmcs[6], pmcs[7]);
+
+	pr_info("MMCR0: %016lx MMCR1: %016lx MMCRA: %016lx\n",
+		mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCRA));
+
+	sdar = sier = 0;
+#ifdef CONFIG_PPC64
+	sdar = mfspr(SPRN_SDAR);
+
+	if (ppmu->flags & PPMU_HAS_SIER)
+		sier = mfspr(SPRN_SIER);
+
+	if (ppmu->flags & PPMU_EBB) {
+		pr_info("MMCR2: %016lx EBBHR: %016lx\n",
+			mfspr(SPRN_MMCR2), mfspr(SPRN_EBBHR));
+		pr_info("EBBRR: %016lx BESCR: %016lx\n",
+			mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
+	}
+#endif
+	pr_info("SIAR:  %016lx SDAR:  %016lx SIER:  %016lx\n",
+		mfspr(SPRN_SIAR), sdar, sier);
+
+	local_irq_restore(flags);
+}
+
 /*
  * Check if a set of events can all go on the PMU at once.
  * If they can't, this will look at alternative codes for the events
-- 
1.8.3.2

^ permalink raw reply related

* RE: [PATCH 2/3] powerpc/85xx: Provide two functions to save/restore the core registers
From: Dongsheng.Wang @ 2014-01-20  6:03 UTC (permalink / raw)
  To: Scott Wood
  Cc: anton@enomsg.org, linuxppc-dev@lists.ozlabs.org,
	chenhui.zhao@freescale.com
In-Reply-To: <1389842249.24905.196.camel@snotra.buserror.net>

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bmNlcnRhaW50eSwgd2UgbmVlZCB0aGlzIGp1ZGdtZW50IHRvIGVuc3VyZSB0aGF0IG5vIGRhdGEg
aXMgbG9zdC4NCg0KVGhhbmtzLA0KLURvbmdzaGVuZw0K

^ permalink raw reply

* RE: [PATCH 3/3] powerpc/fsl: Use the new interface to save or restore registers
From: Dongsheng.Wang @ 2014-01-20  5:57 UTC (permalink / raw)
  To: Scott Wood
  Cc: anton@enomsg.org, linuxppc-dev@lists.ozlabs.org,
	chenhui.zhao@freescale.com
In-Reply-To: <1389842143.24905.195.camel@snotra.buserror.net>

PiA+ID4gPiBVc2UgZnNsX2NwdV9zdGF0ZV9zYXZlL2ZzbF9jcHVfc3RhdGVfcmVzdG9yZSB0byBz
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ZSB5b3UgY2FsbGluZyBhbnl0aGluZyB3aXRoICJmc2wiIGluIHRoZSBuYW1lIGZyb20gY29kZSB0
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dCB0aGlzPw0KPiANCj4gV2hhdCBhYm91dCBub24tRlNMIGJvb2tlIHN1Y2ggYXMgNDR4Pw0KPiAN
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aWF0ZWx5Lg0KPiANCkN1cnJlbnRseSBkb2VzIG5vdCBzdXBwb3J0LiBvayBjaGFuZ2UgdGhlIG5h
bWUgZmlyc3QsIGlmIGxhdGVyIHN1cHBvcnQsIGFuZA0KdGhlbiBhZ2FpbiB0byBtb2RpZnkgdGhl
IG5hbWUgb2YgdGhpcyBmdW5jdGlvbi4NCg0KSG93IGFib3V0IDg1eHhfY3B1X3N0YXRlX3Jlc3Rv
cmU/DQoNClRoYW5rcywNCi1Eb25nc2hlbmcNCg==

^ permalink raw reply

* Re: linuxppc-dev@lists.ozlabs.org
From: Olof Johansson @ 2014-01-20  4:16 UTC (permalink / raw)
  To: Christian Zigotzky; +Cc: linuxppc-dev
In-Reply-To: <52D970C0.3020600@xenosoft.de>

Hi,

On Fri, Jan 17, 2014 at 10:04 AM, Christian Zigotzky
<chzigotzky@xenosoft.de> wrote:

[Removed some fairly verbose patch description]

> diff -rupN linux-3.13/arch/powerpc/platforms/pasemi/Kconfig
> linux-3.13-nemo/arch/powerpc/platforms/pasemi/Kconfig
> --- linux-3.13/arch/powerpc/platforms/pasemi/Kconfig    2013-12-06
> 18:34:04.000000000 +0100
> +++ linux-3.13-nemo/arch/powerpc/platforms/pasemi/Kconfig 2013-12-14
> 10:31:19.896353725 +0100
> @@ -14,6 +14,13 @@ config PPC_PASEMI
>  menu "PA Semi PWRficient options"
>      depends on PPC_PASEMI
>
> +config PPC_PASEMI_SB600
> +       bool "Nemo SB600 South Bridge Support"
> +       depends on PPC_PASEMI
> +       select PPC_I8259
> +       help
> +       Workarounds for the SB600 South Bridge.
> +
>  config PPC_PASEMI_IOMMU
>      bool "PA Semi IOMMU support"
>      depends on PPC_PASEMI
>
> Is it possible to integrate the support of the Nemo board to the official
> kernel sources? Thanks a lot to this list for the help to solve the boot
> problems with the kernel 3.13. Sorry, my English isn't very well. I hope you
> understand my email. But I'll learn more English. I promise it gets better.

We'd be happy to integrate support for it, but you should expect to
have to rework the patches to a form where they will be to our liking.

Your english seems to be quite sufficient so far, there are many
kernel developers who do not have english as main language. Ask if you
need something clarified when we reply to you.

Unfortunately, this patch alone doesn't do much good -- it just adds a
kernel config option without telling us much about what it's doing. It
would make more sense to also include the code changes that the config
option will result in (or makefile changes and c file additions, if
any).

In this case, isn't the southbridge just another PCI-e device? I don't
see how we would need a machine-specific configuration option to
enable it, but seeing the code changes that go along with it would
help explain to us.


-Olof

^ permalink raw reply

* RE: [PATCH v9] clk: corenet: Adds the clock binding
From: Yuantian Tang @ 2014-01-20  2:26 UTC (permalink / raw)
  To: Scott Wood
  Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1390007187.24905.293.camel@snotra.buserror.net>

DQo+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+IEZyb206IFdvb2QgU2NvdHQtQjA3NDIx
DQo+IFNlbnQ6IDIwMTTlubQx5pyIMTjml6Ug5pif5pyf5YWtIDk6MDYNCj4gVG86IFRhbmcgWXVh
bnRpYW4tQjI5OTgzDQo+IENjOiBXb29kIFNjb3R0LUIwNzQyMTsgZ2FsYWtAa2VybmVsLmNyYXNo
aW5nLm9yZzsgbWFyay5ydXRsYW5kQGFybS5jb207DQo+IGRldmljZXRyZWVAdmdlci5rZXJuZWwu
b3JnOyBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsgTGkgWWFuZy1MZW8tDQo+IFI1ODQ3
Mg0KPiBTdWJqZWN0OiBSZTogW1BBVENIIHY5XSBjbGs6IGNvcmVuZXQ6IEFkZHMgdGhlIGNsb2Nr
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IHsNCj4gPiArCQljb21wYXRpYmxlID0gImZzbCxwNTAyMC1jbG9ja2dlbiIsICJmc2wscW9yaXEt
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PiANClNvcnJ5LCA6KA0KDQo+IEknbGwgZml4IHdoZW4gYXBwbHlpbmcuDQo+IA0KVGhhbmsgeW91
IHZlcnkgbXVjaC4NCg0KUmVnYXJkcywNCll1YW50aWFuDQoNCj4gLVNjb3R0DQo+IA0KDQo=

^ permalink raw reply

* [PATCH] powerpc: Make sure "cache" directory is removed when offlining cpu
From: Paul Mackerras @ 2014-01-18 10:14 UTC (permalink / raw)
  To: Benjamin Herrenschmidt, linuxppc-dev

The code in remove_cache_dir() is supposed to remove the "cache"
subdirectory from the sysfs directory for a CPU when that CPU is
being offlined.  It tries to do this by calling kobject_put() on
the kobject for the subdirectory.  However, the subdirectory only
gets removed once the last reference goes away, and the reference
being put here may well not be the last reference.  That means
that the "cache" subdirectory may still exist when the offlining
operation has finished.  If the same CPU subsequently gets onlined,
the code tries to add a new "cache" subdirectory.  If the old
subdirectory has not yet been removed, we get a WARN_ON in the
sysfs code, with stack trace, and an error message printed on the
console.  Further, we ultimately end up with an online cpu with no
"cache" subdirectory.

This fixes it by doing an explicit kobject_del() at the point where
we want the subdirectory to go away.  kobject_del() removes the sysfs
directory even though the object still exists in memory.  The object
will get freed at some point in the future.  A subsequent onlining
operation can create a new sysfs directory, even if the old object
still exists in memory, without causing any problems.

Cc: stable@vger.kernel.org # v3.0+
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
 arch/powerpc/kernel/cacheinfo.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index 6549327..bfb8236 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -794,6 +794,9 @@ static void remove_cache_dir(struct cache_dir *cache_dir)
 {
 	remove_index_dirs(cache_dir);
 
+	/* Remove cache dir from sysfs */
+	kobject_del(cache_dir->kobj);
+
 	kobject_put(cache_dir->kobj);
 
 	kfree(cache_dir);
-- 
1.8.5.2

^ permalink raw reply related

* [PATCH 2/2][v5] powerpc/config: Enable memory driver
From: Prabhakar Kushwaha @ 2014-01-18  6:21 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: scottwood, linux-kernel, Prabhakar Kushwaha

As Freescale IFC controller has been moved to driver to driver/memory.

So enable memory driver in powerpc config

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
 Changes for v2: Sending as it is
 Changes for v3: Sending as it is
 Changes for v4: Rebased to 
	git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git
 changes for v5:
 	- Rebased to branch next of 
	git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git

 arch/powerpc/configs/corenet32_smp_defconfig |    1 +
 arch/powerpc/configs/corenet64_smp_defconfig |    1 +
 arch/powerpc/configs/mpc85xx_defconfig       |    1 +
 arch/powerpc/configs/mpc85xx_smp_defconfig   |    1 +
 4 files changed, 4 insertions(+)

diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index bbd794d..087d437 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -142,6 +142,7 @@ CONFIG_RTC_DRV_DS3232=y
 CONFIG_RTC_DRV_CMOS=y
 CONFIG_UIO=y
 CONFIG_STAGING=y
+CONFIG_MEMORY=y
 CONFIG_VIRT_DRIVERS=y
 CONFIG_FSL_HV_MANAGER=y
 CONFIG_EXT2_FS=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 63508dd..25b03f8 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -129,6 +129,7 @@ CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_DMADEVICES=y
 CONFIG_FSL_DMA=y
+CONFIG_MEMORY=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_ISO9660_FS=m
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 83d3550..cba638c 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -216,6 +216,7 @@ CONFIG_RTC_DRV_CMOS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_DMADEVICES=y
 CONFIG_FSL_DMA=y
+CONFIG_MEMORY=y
 # CONFIG_NET_DMA is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 4b68629..e315b8a 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -217,6 +217,7 @@ CONFIG_RTC_DRV_CMOS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_DMADEVICES=y
 CONFIG_FSL_DMA=y
+CONFIG_MEMORY=y
 # CONFIG_NET_DMA is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH 1/2][v5] driver/memory:Move Freescale IFC driver to a common driver
From: Prabhakar Kushwaha @ 2014-01-18  6:21 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: scottwood, linux-kernel, Prabhakar Kushwaha

 Freescale IFC controller has been used for mpc8xxx. It will be used
 for ARM-based SoC as well. This patch moves the driver to driver/memory
 and fix the header file includes.

 Also remove module_platform_driver() and  instead call
 platform_driver_register() from subsys_initcall() to make sure this module
 has been loaded before MTD partition parsing starts.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
Changes for v2:
	- Move fsl_ifc in driver/memory

Changes for v3:
	- move device tree bindings to memory

Changes for v4: Rebased to 
	git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git

Changes for v5: 
	- Moved powerpc/Kconfig option to driver/memory


 .../{powerpc => memory-controllers}/fsl/ifc.txt    |    0
 arch/powerpc/Kconfig                               |    4 ----
 arch/powerpc/sysdev/Makefile                       |    1 -
 drivers/memory/Kconfig                             |    4 ++++
 drivers/memory/Makefile                            |    1 +
 {arch/powerpc/sysdev => drivers/memory}/fsl_ifc.c  |    8 ++++++--
 drivers/mtd/nand/fsl_ifc_nand.c                    |    2 +-
 .../include/asm => include/linux}/fsl_ifc.h        |    0
 8 files changed, 12 insertions(+), 8 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => memory-controllers}/fsl/ifc.txt (100%)
 rename {arch/powerpc/sysdev => drivers/memory}/fsl_ifc.c (98%)
 rename {arch/powerpc/include/asm => include/linux}/fsl_ifc.h (100%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
rename to Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index b44b52c..83fb8b3 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -725,10 +725,6 @@ config FSL_LBC
 	  controller.  Also contains some common code used by
 	  drivers for specific local bus peripherals.
 
-config FSL_IFC
-	bool
-        depends on FSL_SOC
-
 config FSL_GTM
 	bool
 	depends on PPC_83xx || QUICC_ENGINE || CPM2
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index f67ac90..afbcc37 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -21,7 +21,6 @@ obj-$(CONFIG_FSL_SOC)		+= fsl_soc.o fsl_mpic_err.o
 obj-$(CONFIG_FSL_PCI)		+= fsl_pci.o $(fsl-msi-obj-y)
 obj-$(CONFIG_FSL_PMC)		+= fsl_pmc.o
 obj-$(CONFIG_FSL_LBC)		+= fsl_lbc.o
-obj-$(CONFIG_FSL_IFC)		+= fsl_ifc.o
 obj-$(CONFIG_FSL_GTM)		+= fsl_gtm.o
 obj-$(CONFIG_FSL_85XX_CACHE_SRAM)	+= fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
 obj-$(CONFIG_SIMPLE_GPIO)	+= simple_gpio.o
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 29a11db..b33bb0e 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -50,4 +50,8 @@ config TEGRA30_MC
 	  analysis, especially for IOMMU/SMMU(System Memory Management
 	  Unit) module.
 
+config FSL_IFC
+	bool
+        depends on FSL_SOC
+
 endif
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index 969d923..f2bf25c 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -6,6 +6,7 @@ ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)		+= of_memory.o
 endif
 obj-$(CONFIG_TI_EMIF)		+= emif.o
+obj-$(CONFIG_FSL_IFC)		+= fsl_ifc.o
 obj-$(CONFIG_MVEBU_DEVBUS)	+= mvebu-devbus.o
 obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o
 obj-$(CONFIG_TEGRA30_MC)	+= tegra30-mc.o
diff --git a/arch/powerpc/sysdev/fsl_ifc.c b/drivers/memory/fsl_ifc.c
similarity index 98%
rename from arch/powerpc/sysdev/fsl_ifc.c
rename to drivers/memory/fsl_ifc.c
index d7fc722..135a950 100644
--- a/arch/powerpc/sysdev/fsl_ifc.c
+++ b/drivers/memory/fsl_ifc.c
@@ -30,8 +30,8 @@
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
+#include <linux/fsl_ifc.h>
 #include <asm/prom.h>
-#include <asm/fsl_ifc.h>
 
 struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
 EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
@@ -299,7 +299,11 @@ static struct platform_driver fsl_ifc_ctrl_driver = {
 	.remove      = fsl_ifc_ctrl_remove,
 };
 
-module_platform_driver(fsl_ifc_ctrl_driver);
+static int __init fsl_ifc_init(void)
+{
+	return platform_driver_register(&fsl_ifc_ctrl_driver);
+}
+subsys_initcall(fsl_ifc_init);
 
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Freescale Semiconductor");
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 4335577..865b323 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -30,7 +30,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand_ecc.h>
-#include <asm/fsl_ifc.h>
+#include <linux/fsl_ifc.h>
 
 #define FSL_IFC_V1_1_0	0x01010000
 #define ERR_BYTE		0xFF /* Value returned for read
diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/include/linux/fsl_ifc.h
similarity index 100%
rename from arch/powerpc/include/asm/fsl_ifc.h
rename to include/linux/fsl_ifc.h
-- 
1.7.9.5

^ permalink raw reply related

* Re: [PATCH 1/2][v3] driver/memory:Move Freescale IFC driver to a common driver
From: Prabhakar Kushwaha @ 2014-01-18  3:48 UTC (permalink / raw)
  To: Kumar Gala
  Cc: Scott Wood, Greg Kroah-Hartman, linuxppc-dev, linux-kernel,
	Arnd Bergmann
In-Reply-To: <E7780BC2-F914-4D0C-8AB9-9FE7437A5C48@kernel.crashing.org>


On 1/17/2014 10:38 PM, Kumar Gala wrote:
> On Jan 15, 2014, at 11:42 PM, Prabhakar Kushwaha <prabhakar@freescale.com> wrote:
>
>> Freescale IFC controller has been used for mpc8xxx. It will be used
>> for ARM-based SoC as well. This patch moves the driver to driver/memory
>> and fix the header file includes.
>>
>> Also remove module_platform_driver() and  instead call
>> platform_driver_register() from subsys_initcall() to make sure this module
>> has been loaded before MTD partition parsing starts.
>>
>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
>> Acked-by: Arnd Bergmann <arnd@arndb.de>
>> ---
>> Changes for v2:
>> 	- Move fsl_ifc in driver/memory
>>
>> Changes for v3:
>> 	- move device tree bindings to memory
>>
>> .../{powerpc => memory-controllers}/fsl/ifc.txt    |    0
>> arch/powerpc/sysdev/Makefile                       |    1 -
>> drivers/memory/Makefile                            |    1 +
>> {arch/powerpc/sysdev => drivers/memory}/fsl_ifc.c  |    8 ++++++--
>> drivers/mtd/nand/fsl_ifc_nand.c                    |    2 +-
>> .../include/asm => include/linux}/fsl_ifc.h        |    0
>> 6 files changed, 8 insertions(+), 4 deletions(-)
>> rename Documentation/devicetree/bindings/{powerpc => memory-controllers}/fsl/ifc.txt (100%)
>> rename {arch/powerpc/sysdev => drivers/memory}/fsl_ifc.c (98%)
>> rename {arch/powerpc/include/asm => include/linux}/fsl_ifc.h (100%)
> The Kconfig option for FSL_IFC should move into drivers/memory/Kconfig

Thanks Kumar for taking time and review this patch.

You are correct. I was checking sysdev/Kconfig  but it is defined in 
powerpc/Kconfig
I missed it :)

Regards,
Prabhakar

^ permalink raw reply

* Re: [PATCH] powerpc/configs: Enbale Freescale IFC controller
From: Prabhakar Kushwaha @ 2014-01-18  3:46 UTC (permalink / raw)
  To: Scott Wood, Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <1389984587.24905.249.camel@snotra.buserror.net>


On 1/18/2014 12:19 AM, Scott Wood wrote:
> On Fri, 2014-01-17 at 11:02 -0600, Kumar Gala wrote:
>> On Jan 17, 2014, at 12:09 AM, Prabhakar Kushwaha <prabhakar@freescale.=
com> wrote:
>>
>>> Currently IFC NAND driver is enabled in corenet32smp_defconfig. But I=
FC
>>> controller is not enabled
>>>
>>> So, Enable IFC controller in corenet32smp_defconfig.
>>>
>>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
>>> ---
>>> Based upon git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/li=
nux.git
>>> branch master
>>>
>>> arch/powerpc/configs/corenet32_smp_defconfig |    1 +
>>> 1 file changed, 1 insertion(+)
>> Shouldn=E2=80=99t the NAND driver get the IFC controller enabled by Kc=
onfig dependancies?
> Yes (by select, not dependencies).
>
> Prabhakar, was there an actual problem you saw before?  Did you run
> savedefconfig after making this change?
>
> CONFIG_FSL_IFC isn't even user-selectable (though it probably should be=
,
> as how else would it get enabled in the absence of NAND for catching NO=
R
> errors?).
>

Thanks Kumar and Scott for reviewing this patch.

Yes, it should be enabled by Kconfig dependency.   as we have
config FSL_IFC
     bool
         depends on FSL_SOC

The only reason I changed this code because i wanted all powerpc/configs=20
to be similar as they have CONFIG_FSL_IFC enabled by default.

arch/powerpc/configs/mpc85xx_smp_defconfig:54:CONFIG_FSL_IFC=3Dy
arch/powerpc/configs/corenet64_smp_defconfig:29:CONFIG_FSL_IFC=3Dy
arch/powerpc/configs/mpc85xx_defconfig:51:CONFIG_FSL_IFC=3Dy

So either I should add in corenet32smp_defconfig to make similar to other=
s.
or
remove from all.

I chose first option.

Regards,
Prabhakar

^ permalink raw reply

* [PATCH V3 3/3] powernv: Have uniform logging of errors in opal-elog.c
From: Deepthi Dharwar @ 2014-01-18  2:43 UTC (permalink / raw)
  To: benh, linuxppc-dev, mpe
In-Reply-To: <20140118024150.13537.11381.stgit@deepthi>

Currently some errors/info to be reported use
printk and the rest pr_fmt(). This patch
makes the complete error/event logging uniform.

Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/opal-elog.c |   14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c
index 0f67faa..78d3828 100644
--- a/arch/powerpc/platforms/powernv/opal-elog.c
+++ b/arch/powerpc/platforms/powernv/opal-elog.c
@@ -63,7 +63,7 @@ void opal_elog_ack(uint64_t ack_id)
 	struct opal_err_log *record, *next;
 	bool found = false;
 
-	printk(KERN_INFO "OPAL Log ACK=%llx", ack_id);
+	pr_info("OPAL Log ACK=%llx", ack_id);
 
 	/* once user acknowledge a log delete record from list */
 	spin_lock_irqsave(&opal_elog_lock, flags);
@@ -189,7 +189,7 @@ static void opal_elog_read(void)
 	/* read log size and log ID from OPAL */
 	rc = opal_get_elog_size(&log_id, &elog_size, &elog_type);
 	if (rc != OPAL_SUCCESS) {
-		pr_err("ELOG: Opal log read failed\n");
+		pr_err("Opal log read failed\n");
 		return;
 	}
 	if (elog_size >= OPAL_MAX_ERRLOG_SIZE)
@@ -203,7 +203,7 @@ static void opal_elog_read(void)
 	rc = opal_read_elog(__pa(err_log_data), elog_size, log_id);
 	if (rc != OPAL_SUCCESS) {
 		mutex_unlock(&err_log_data_mutex);
-		pr_err("ELOG: log read failed for log-id=%llx\n", log_id);
+		pr_err("Reading of log failed for log-id=%llx\n", log_id);
 		/* put back the free node. */
 		spin_lock_irqsave(&opal_elog_lock, flags);
 		list_add(&record->link, &elog_ack_list);
@@ -265,7 +265,7 @@ static int init_err_log_buffer(void)
 
 	buf_ptr = vmalloc(sizeof(struct opal_err_log) * MAX_NUM_RECORD);
 	if (!buf_ptr) {
-		printk(KERN_ERR "ELOG: failed to allocate memory.\n");
+		pr_err("Failed to allocate memory for error logging buffers.\n");
 		return -ENOMEM;
 	}
 	memset(buf_ptr, 0, sizeof(struct opal_err_log) * MAX_NUM_RECORD);
@@ -359,15 +359,13 @@ int __init opal_elog_init(void)
 
 	rc = sysfs_create_bin_file(opal_kobj, &opal_elog_attr);
 	if (rc) {
-		printk(KERN_ERR "ELOG: unable to create sysfs file"
-					"opal_elog (%d)\n", rc);
+		pr_err("Unable to create sysfs file opal_elog (%d)\n", rc);
 		return rc;
 	}
 
 	rc = sysfs_create_file(opal_kobj, &opal_elog_ack_attr.attr);
 	if (rc) {
-		printk(KERN_ERR "ELOG: unable to create sysfs file"
-			" opal_elog_ack (%d)\n", rc);
+		pr_err("Unable to create sysfs file opal_elog_ack (%d)\n", rc);
 		return rc;
 	}
 

^ permalink raw reply related

* [PATCH V3 2/3] powernv: Correct spell error in opal-elog.c
From: Deepthi Dharwar @ 2014-01-18  2:43 UTC (permalink / raw)
  To: benh, linuxppc-dev, mpe
In-Reply-To: <20140118024150.13537.11381.stgit@deepthi>

Correct spell error in opal-elog.c

Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
---
 arch/powerpc/platforms/powernv/opal-elog.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c
index 5aa2d86..0f67faa 100644
--- a/arch/powerpc/platforms/powernv/opal-elog.c
+++ b/arch/powerpc/platforms/powernv/opal-elog.c
@@ -26,7 +26,7 @@
 /* Maximum size of a single log on FSP is 16KB */
 #define OPAL_MAX_ERRLOG_SIZE	16384
 
-/* maximu number of records powernv can hold */
+/* Maximum number of records powernv platform can hold */
 #define MAX_NUM_RECORD	128
 
 struct opal_err_log {

^ permalink raw reply related

* [PATCH V3 1/3] powernv: Push critical error logs to FSP
From: Deepthi Dharwar @ 2014-01-18  2:43 UTC (permalink / raw)
  To: benh, linuxppc-dev, mpe
In-Reply-To: <20140118024150.13537.11381.stgit@deepthi>

This patch provides error logging interfaces to report critical
powernv error logs to FSP.
All the required information to dump the error is collected
at POWERNV level through error log interfaces
and then pushed on to FSP.

Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/opal.h                |  123 ++++++++++++++++++++++++
 arch/powerpc/platforms/powernv/opal-elog.c     |   76 +++++++++++++++
 arch/powerpc/platforms/powernv/opal-wrappers.S |    1 
 3 files changed, 200 insertions(+)

diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 013a696..51b8eb6 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -173,6 +173,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_SENSOR_READ			88
 #define OPAL_GET_PARAM				89
 #define OPAL_SET_PARAM				90
+#define OPAL_ELOG_SEND				92
 
 #ifndef __ASSEMBLY__
 
@@ -267,6 +268,119 @@ enum OpalMessageType {
 	OPAL_MSG_TYPE_MAX,
 };
 
+
+/* Classification of error/event type to be reported on OPAL */
+/* Platform Events/Errors: Report Machine Check Interrupt */
+#define OPAL_PLATFORM_ERR_EVT		0x01
+/* INPUT_OUTPUT: Report all I/O related events/errors */
+#define OPAL_INPUT_OUTPUT_ERR_EVT	0x02
+/* RESOURCE_DEALLOC: Hotplug events and errors */
+#define OPAL_RESOURCE_DEALLOC_ERR_EVT	0x03
+/* MISC: Miscellanous error */
+#define OPAL_MISC_ERR_EVT		0x04
+
+/* OPAL Subsystem IDs listed for reporting events/errors */
+#define OPAL_PROCESSOR_SUBSYSTEM	0x10
+#define OPAL_MEMORY_SUBSYSTEM		0x20
+#define OPAL_IO_SUBSYSTEM		0x30
+#define OPAL_IO_DEVICES			0x40
+#define OPAL_CEC_HARDWARE		0x50
+#define OPAL_POWER_COOLING		0x60
+#define OPAL_MISC_SUBSYSTEM		0x70
+#define OPAL_SURVEILLANCE_ERR		0x7A
+#define OPAL_PLATFORM_FIRMWARE		0x80
+#define OPAL_SOFTWARE			0x90
+#define OPAL_EXTERNAL_ENV		0xA0
+
+
+/*
+ * During reporting an event/error the following represents
+ * how serious the logged event/error is. (Severity)
+ */
+#define OPAL_INFO						0x00
+#define OPAL_RECOVERED_ERR_GENERAL				0x10
+
+/* 0x2X series is to denote set of Predictive Error */
+/* 0x20 Generic predictive error */
+#define OPAL_PREDICTIVE_ERR_GENERAL				0x20
+/* 0x21 Predictive error, degraded performance */
+#define OPAL_PREDICTIVE_ERR_DEGRADED_PERF			0x21
+/* 0x22 Predictive error, fault may be corrected after reboot */
+#define OPAL_PREDICTIVE_ERR_FAULT_RECTIFY_REBOOT		0x22
+/*
+ * 0x23 Predictive error, fault may be corrected after reboot,
+ * degraded performance
+ */
+#define OPAL_PREDICTIVE_ERR_FAULT_RECTIFY_BOOT_DEGRADE_PERF	0x23
+/* 0x24 Predictive error, loss of redundancy */
+#define OPAL_PREDICTIVE_ERR_LOSS_OF_REDUNDANCY			0x24
+
+/* 0x4X series for Unrecoverable Error */
+/* 0x40 Generic Unrecoverable error */
+#define OPAL_UNRECOVERABLE_ERR_GENERAL				0x40
+/* 0x41 Unrecoverable error bypassed with degraded performance */
+#define OPAL_UNRECOVERABLE_ERR_DEGRADE_PERF			0x41
+/* 0x44 Unrecoverable error bypassed with loss of redundancy */
+#define OPAL_UNRECOVERABLE_ERR_LOSS_REDUNDANCY			0x44
+/* 0x45 Unrecoverable error bypassed with loss of redundancy and performance */
+#define OPAL_UNRECOVERABLE_ERR_LOSS_REDUNDANCY_PERF		0x45
+/* 0x48 Unrecoverable error bypassed with loss of function */
+#define OPAL_UNRECOVERABLE_ERR_LOSS_OF_FUNCTION			0x48
+
+/*
+ * OPAL Event Sub-type
+ * This field provides additional information on the non-error
+ * event type
+ */
+#define OPAL_NA						0x00
+#define OPAL_MISCELLANEOUS_INFO_ONLY			0x01
+#define OPAL_PREV_REPORTED_ERR_RECTIFIED		0x10
+#define OPAL_SYS_RESOURCES_DECONFIG_BY_USER		0x20
+#define OPAL_SYS_RESOURCE_DECONFIG_PRIOR_ERR		0x21
+#define OPAL_RESOURCE_DEALLOC_EVENT_NOTIFY		0x22
+#define OPAL_CONCURRENT_MAINTENANCE_EVENT		0x40
+#define OPAL_CAPACITY_UPGRADE_EVENT			0x60
+#define OPAL_RESOURCE_SPARING_EVENT			0x70
+#define OPAL_DYNAMIC_RECONFIG_EVENT			0x80
+#define OPAL_NORMAL_SYS_PLATFORM_SHUTDOWN		0xD0
+#define OPAL_ABNORMAL_POWER_OFF				0xE0
+
+/* Max user dump size is 14K    */
+#define OPAL_LOG_MAX_DUMP       14336
+#define OPAL_USER_DATA_SZ	4
+
+/* Multiple user data sections */
+struct __attribute__((__packed__)) opal_user_data_section {
+	uint32_t tag;
+	uint16_t size;
+	uint16_t component_id;
+	char data_dump[OPAL_USER_DATA_SZ];
+};
+
+
+/*
+ * All the information regarding an error/event to be reported
+ * needs to populate this structure using pre-defined interfaces
+ * only
+ */
+struct __attribute__((__packed__)) opal_errorlog {
+
+	uint16_t component_id;
+	uint8_t error_event_type;
+	uint8_t subsystem_id;
+
+	uint8_t event_severity;
+	uint8_t event_subtype;
+	uint8_t user_section_count;
+	uint8_t elog_origin;
+
+	uint32_t user_section_size;
+	uint32_t reason_code;
+	uint32_t additional_info[4];
+
+	char user_data_dump[OPAL_LOG_MAX_DUMP];
+};
+
 /* Machine check related definitions */
 enum OpalMCE_Version {
 	OpalMCE_V1 = 1,
@@ -861,6 +975,15 @@ int64_t opal_get_elog_size(uint64_t *log_id, size_t *size, uint64_t *elog_type);
 int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
 int64_t opal_send_ack_elog(uint64_t log_id);
 void opal_resend_pending_logs(void);
+struct opal_errorlog *opal_elog_create(uint8_t opal_error_event_type,
+			uint16_t opal_component_id, uint8_t opal_subsystem_id,
+			uint8_t opal_event_severity, uint8_t opal_event_subtype,
+			uint32_t reason_code, uint32_t info0, uint32_t info1,
+			uint32_t info2, uint32_t info3);
+int opal_elog_update_user_dump(struct opal_errorlog *buf, unsigned char *data,
+						uint32_t tag, uint16_t size);
+int opal_commit_errorlog_to_fsp(struct opal_errorlog *buf);
+int opal_commit_log_to_fsp(void *buf);
 int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
 int64_t opal_manage_flash(uint8_t op);
 int64_t opal_update_flash(uint64_t blk_list);
diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c
index fc891ae..5aa2d86 100644
--- a/arch/powerpc/platforms/powernv/opal-elog.c
+++ b/arch/powerpc/platforms/powernv/opal-elog.c
@@ -8,6 +8,9 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#undef DEBUG
+#define pr_fmt(fmt) "ELOG: " fmt
+
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/of.h>
@@ -16,6 +19,7 @@
 #include <linux/fs.h>
 #include <linux/vmalloc.h>
 #include <linux/fcntl.h>
+#include <linux/mm.h>
 #include <asm/uaccess.h>
 #include <asm/opal.h>
 
@@ -272,6 +276,78 @@ static int init_err_log_buffer(void)
 	return 0;
 }
 
+/* Interface to be used by POWERNV to push the logs to FSP via Sapphire */
+struct opal_errorlog *opal_elog_create(uint8_t opal_error_event_type,
+			uint16_t opal_component_id, uint8_t opal_subsystem_id,
+			uint8_t opal_event_severity, uint8_t opal_event_subtype,
+			uint32_t reason_code, uint32_t info0, uint32_t info1,
+			uint32_t info2, uint32_t info3)
+{
+	struct opal_errorlog *buf;
+
+	buf = kzalloc(sizeof(struct opal_errorlog), GFP_KERNEL);
+	if (!buf) {
+		pr_err("Failed to allocate buffer for generating error log\n");
+		return NULL;
+	}
+
+	buf->error_event_type = opal_error_event_type;
+	buf->component_id = opal_component_id;
+	buf->subsystem_id = opal_subsystem_id;
+	buf->event_severity = opal_event_severity;
+	buf->event_subtype = opal_event_subtype;
+	buf->reason_code = reason_code;
+	buf->additional_info[0] = info0;
+	buf->additional_info[1] = info1;
+	buf->additional_info[2] = info2;
+	buf->additional_info[3] = info3;
+	return buf;
+}
+
+int opal_elog_update_user_dump(struct opal_errorlog *buf, unsigned char *data,
+						uint32_t tag, uint16_t size)
+{
+	char *buffer;
+	struct opal_user_data_section *tmp;
+
+	if (!buf) {
+		pr_err("Cannot update user data. Error log buffer is invalid");
+		return -1;
+	}
+
+	buffer = (char *)buf->user_data_dump + buf->user_section_size;
+	if ((buf->user_section_size + size) > OPAL_LOG_MAX_DUMP) {
+		pr_err("Size of user data overruns the buffer");
+		return -1;
+	}
+
+	tmp = (struct opal_user_data_section *)buffer;
+	tmp->tag = tag;
+	tmp->size = size + sizeof(struct opal_user_data_section)
+						- OPAL_USER_DATA_SZ;
+	memcpy(tmp->data_dump, data, size);
+
+	buf->user_section_size += tmp->size;
+	buf->user_section_count++;
+	return 0;
+}
+
+int opal_commit_errorlog_to_fsp(struct opal_errorlog *buf)
+{
+	int rc;
+
+	rc = opal_commit_log_to_fsp((void *)
+			(vmalloc_to_pfn(buf) << PAGE_SHIFT));
+	if (rc == OPAL_SUCCESS) {
+		/* If the log has been committed, free the buffer */
+		kfree(buf);
+		buf = NULL;
+	} else
+		pr_err("Error log could not be committed to FSP");
+
+	return rc;
+}
+
 /* Initialize error logging */
 int __init opal_elog_init(void)
 {
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index c4907aa..65c25277 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -136,3 +136,4 @@ OPAL_CALL(opal_sync_host_reboot,		OPAL_SYNC_HOST_REBOOT);
 OPAL_CALL(opal_sensor_read,			OPAL_SENSOR_READ);
 OPAL_CALL(opal_get_param,                       OPAL_GET_PARAM);
 OPAL_CALL(opal_set_param,                       OPAL_SET_PARAM);
+OPAL_CALL(opal_commit_log_to_fsp,		OPAL_ELOG_SEND);

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