* [PATCH] clk: mpc85xx: Update the driver to align to new clock bindings
From: Tang Yuantian @ 2014-01-21 1:32 UTC (permalink / raw)
To: mturquette; +Cc: Tang Yuantian, linuxppc-dev
From: Tang Yuantian <yuantian.tang@freescale.com>
The clock bindings for Freescale CoreNet platform are updated.
So, the driver needs to be updated accordingly.
The main changes include:
- Added a new node to present the input system clock
- Changed PLL and MUX's compatible string
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
---
drivers/clk/clk-ppc-corenet.c | 70 +++++++++++++++++++++++++++++--------------
1 file changed, 48 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index c4f76ed..8b284be 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -27,7 +27,6 @@ struct cmux_clk {
#define CLKSEL_ADJUST BIT(0)
#define to_cmux_clk(p) container_of(p, struct cmux_clk, hw)
-static void __iomem *base;
static unsigned int clocks_per_pll;
static int cmux_set_parent(struct clk_hw *hw, u8 idx)
@@ -100,7 +99,11 @@ static void __init core_mux_init(struct device_node *np)
pr_err("%s: could not allocate cmux_clk\n", __func__);
goto err_name;
}
- cmux_clk->reg = base + offset;
+ cmux_clk->reg = of_iomap(np, 0);
+ if (!cmux_clk->reg) {
+ pr_err("%s: could not map register\n", __func__);
+ goto err_clk;
+ }
node = of_find_compatible_node(NULL, NULL, "fsl,p4080-clockgen");
if (node && (offset >= 0x80))
@@ -143,38 +146,39 @@ err_name:
static void __init core_pll_init(struct device_node *np)
{
- u32 offset, mult;
+ u32 mult;
int i, rc, count;
const char *clk_name, *parent_name;
struct clk_onecell_data *onecell_data;
struct clk **subclks;
+ void __iomem *base;
- rc = of_property_read_u32(np, "reg", &offset);
- if (rc) {
- pr_err("%s: could not get reg property\n", np->name);
+ base = of_iomap(np, 0);
+ if (!base) {
+ pr_err("clk-ppc: iomap error\n");
return;
}
/* get the multiple of PLL */
- mult = ioread32be(base + offset);
+ mult = ioread32be(base);
/* check if this PLL is disabled */
if (mult & PLL_KILL) {
pr_debug("PLL:%s is disabled\n", np->name);
- return;
+ goto err_map;
}
mult = (mult >> 1) & 0x3f;
parent_name = of_clk_get_parent_name(np, 0);
if (!parent_name) {
pr_err("PLL: %s must have a parent\n", np->name);
- return;
+ goto err_map;
}
count = of_property_count_strings(np, "clock-output-names");
if (count < 0 || count > 4) {
pr_err("%s: clock is not supported\n", np->name);
- return;
+ goto err_map;
}
/* output clock number per PLL */
@@ -183,7 +187,7 @@ static void __init core_pll_init(struct device_node *np)
subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
if (!subclks) {
pr_err("%s: could not allocate subclks\n", __func__);
- return;
+ goto err_map;
}
onecell_data = kzalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
@@ -230,30 +234,52 @@ static void __init core_pll_init(struct device_node *np)
goto err_cell;
}
+ iounmap(base);
return;
err_cell:
kfree(onecell_data);
err_clks:
kfree(subclks);
+err_map:
+ iounmap(base);
+}
+
+static void __init sysclk_init(struct device_node *node)
+{
+ struct clk *clk;
+ const char *clk_name = node->name;
+ struct device_node *np = of_get_parent(node);
+ u32 rate;
+
+ if (!np) {
+ pr_err("ppc-clk: could not get parent node\n");
+ return;
+ }
+
+ if (of_property_read_u32(np, "clock-frequency", &rate)) {
+ of_node_put(node);
+ return;
+ }
+
+ of_property_read_string(np, "clock-output-names", &clk_name);
+
+ clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
+ if (!IS_ERR(clk))
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
}
static const struct of_device_id clk_match[] __initconst = {
- { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
- { .compatible = "fsl,core-pll-clock", .data = core_pll_init, },
- { .compatible = "fsl,core-mux-clock", .data = core_mux_init, },
+ { .compatible = "fsl,qoriq-sysclk-1.0", .data = sysclk_init, },
+ { .compatible = "fsl,qoriq-sysclk-2.0", .data = sysclk_init, },
+ { .compatible = "fsl,qoriq-core-pll-1.0", .data = core_pll_init, },
+ { .compatible = "fsl,qoriq-core-pll-2.0", .data = core_pll_init, },
+ { .compatible = "fsl,qoriq-core-mux-1.0", .data = core_mux_init, },
+ { .compatible = "fsl,qoriq-core-mux-2.0", .data = core_mux_init, },
{}
};
static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
{
- struct device_node *np;
-
- np = pdev->dev.of_node;
- base = of_iomap(np, 0);
- if (!base) {
- dev_err(&pdev->dev, "iomap error\n");
- return -ENOMEM;
- }
of_clk_init(clk_match);
return 0;
--
1.8.0
^ permalink raw reply related
* Re: [PATCH 0/4] powernv: kvm: numa fault improvement
From: Liu ping fan @ 2014-01-21 2:30 UTC (permalink / raw)
To: Aneesh Kumar K.V; +Cc: Paul Mackerras, linuxppc-dev, Alexander Graf, kvm-ppc
In-Reply-To: <87d2jm7j3d.fsf@linux.vnet.ibm.com>
On Mon, Jan 20, 2014 at 11:45 PM, Aneesh Kumar K.V
<aneesh.kumar@linux.vnet.ibm.com> wrote:
> Liu ping fan <kernelfans@gmail.com> writes:
>
>> On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf <agraf@suse.de> wrote:
>>>
>>> On 11.12.2013, at 09:47, Liu Ping Fan <kernelfans@gmail.com> wrote:
>>>
>>>> This series is based on Aneesh's series "[PATCH -V2 0/5] powerpc: mm: Numa faults support for ppc64"
>>>>
>>>> For this series, I apply the same idea from the previous thread "[PATCH 0/3] optimize for powerpc _PAGE_NUMA"
>>>> (for which, I still try to get a machine to show nums)
>>>>
>>>> But for this series, I think that I have a good justification -- the fact of heavy cost when switching context between guest and host,
>>>> which is well known.
>>>
>>> This cover letter isn't really telling me anything. Please put a proper description of what you're trying to achieve, why you're trying to achieve what you're trying and convince your readers that it's a good idea to do it the way you do it.
>>>
>> Sorry for the unclear message. After introducing the _PAGE_NUMA,
>> kvmppc_do_h_enter() can not fill up the hpte for guest. Instead, it
>> should rely on host's kvmppc_book3s_hv_page_fault() to call
>> do_numa_page() to do the numa fault check. This incurs the overhead
>> when exiting from rmode to vmode. My idea is that in
>> kvmppc_do_h_enter(), we do a quick check, if the page is right placed,
>> there is no need to exit to vmode (i.e saving htab, slab switching)
>
> Can you explain more. Are we looking at hcall from guest and
> hypervisor handling them in real mode ? If so why would guest issue a
> hcall on a pte entry that have PAGE_NUMA set. Or is this about
> hypervisor handling a missing hpte, because of host swapping this page
> out ? In that case how we end up in h_enter ? IIUC for that case we
> should get to kvmppc_hpte_hv_fault.
>
After setting _PAGE_NUMA, we should flush out all hptes both in host's
htab and guest's. So when guest tries to access memory, host finds
that there is not hpte ready for guest in guest's htab. And host
should raise dsi to guest. This incurs that guest ends up in h_enter.
And you can see in current code, we also try this quick path firstly.
Only if fail, we will resort to slow path -- kvmppc_hpte_hv_fault.
Thanks and regards,
Fan
>
>>
>>>> If my suppose is correct, will CCing kvm@vger.kernel.org from next version.
>>>
>>> This translates to me as "This is an RFC"?
>>>
>> Yes, I am not quite sure about it. I have no bare-metal to verify it.
>> So I hope at least, from the theory, it is correct.
>>
>
> -aneesh
>
^ permalink raw reply
* Re: [PATCH] slub: Don't throw away partial remote slabs if there is no local memory
From: Wanpeng Li @ 2014-01-21 2:20 UTC (permalink / raw)
To: Christoph Lameter
Cc: nacc, penberg, linux-mm, Han Pingtian, paulus, Anton Blanchard,
mpm, Joonsoo Kim, linuxppc-dev
In-Reply-To: <alpine.DEB.2.10.1401201612340.28048@nuc>
On Mon, Jan 20, 2014 at 04:13:30PM -0600, Christoph Lameter wrote:
>On Mon, 20 Jan 2014, Wanpeng Li wrote:
>
>> >+ enum zone_type high_zoneidx = gfp_zone(flags);
>> >
>> >+ if (!node_present_pages(searchnode)) {
>> >+ zonelist = node_zonelist(searchnode, flags);
>> >+ for_each_zone_zonelist(zone, z, zonelist, high_zoneidx) {
>> >+ searchnode = zone_to_nid(zone);
>> >+ if (node_present_pages(searchnode))
>> >+ break;
>> >+ }
>> >+ }
>> > object = get_partial_node(s, get_node(s, searchnode), c, flags);
>> > if (object || node != NUMA_NO_NODE)
>> > return object;
>> >
>>
>> The patch fix the bug. However, the kernel crashed very quickly after running
>> stress tests for a short while:
>
>This is not a good way of fixing it. How about not asking for memory from
>nodes that are memoryless? Use numa_mem_id() which gives you the next node
>that has memory instead of numa_node_id() (gives you the current node
>regardless if it has memory or not).
Thanks for your pointing out, I will do it and retest it later.
Regards,
Wanpeng Li
^ permalink raw reply
* Re: [PATCH 2/3] powerpc/85xx: Provide two functions to save/restore the core registers
From: Scott Wood @ 2014-01-21 1:06 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: anton@enomsg.org, linuxppc-dev@lists.ozlabs.org,
Zhao Chenhui-B35336
In-Reply-To: <6f81ef13c25744b685b99a3fbb304f1b@BN1PR03MB188.namprd03.prod.outlook.com>
On Mon, 2014-01-20 at 00:03 -0600, Wang Dongsheng-B40534 wrote:
> > > > > + /*
> > > > > + * Need to save float-point registers if MSR[FP] = 1.
> > > > > + */
> > > > > + mfmsr r12
> > > > > + andi. r12, r12, MSR_FP
> > > > > + beq 1f
> > > > > + do_sr_fpr_regs(save)
> > > >
> > > > C code should have already ensured that MSR[FP] is not 1 (and thus the FP
> > > > context has been saved).
> > > >
> > >
> > > Yes, right. But I mean if the FP still use in core save flow, we need to save
> > it.
> > > In this process, i don't care what other code do, we need to focus on not
> > losing
> > > valuable data.
> >
> > It is not allowed to use FP at that point.
> >
> If MSR[FP] not active, that is FP not allowed to use.
> But here is a normal judgment, if MSR[FP] is active, this means that the floating
> point module is being used. I offer is a function of the interface, we don't know
> where is the function will be called. Just because we call this function in the
> context of uncertainty, we need this judgment to ensure that no data is lost.
The whole point of calling enable_kernel_fp() in C code before
suspending is to ensure that the FP state gets saved. If FP is used
after that point it is a bug. If you're worried about such bugs, then
clear MSR[FP] after calling enable_kernel_fp(), rather than adding
redundant state saving.
-Scott
^ permalink raw reply
* Re: [PATCH] powerpc/configs: Enbale Freescale IFC controller
From: Scott Wood @ 2014-01-20 22:53 UTC (permalink / raw)
To: Prabhakar Kushwaha; +Cc: linuxppc-dev
In-Reply-To: <52D9F92C.3030003@freescale.com>
On Sat, 2014-01-18 at 09:16 +0530, Prabhakar Kushwaha wrote:
> On 1/18/2014 12:19 AM, Scott Wood wrote:
> > On Fri, 2014-01-17 at 11:02 -0600, Kumar Gala wrote:
> >> On Jan 17, 2014, at 12:09 AM, Prabhakar Kushwaha <prabhakar@freescale.com> wrote:
> >>
> >>> Currently IFC NAND driver is enabled in corenet32smp_defconfig. But IFC
> >>> controller is not enabled
> >>>
> >>> So, Enable IFC controller in corenet32smp_defconfig.
> >>>
> >>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
> >>> ---
> >>> Based upon git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git
> >>> branch master
> >>>
> >>> arch/powerpc/configs/corenet32_smp_defconfig | 1 +
> >>> 1 file changed, 1 insertion(+)
> >> Shouldn’t the NAND driver get the IFC controller enabled by Kconfig dependancies?
> > Yes (by select, not dependencies).
> >
> > Prabhakar, was there an actual problem you saw before? Did you run
> > savedefconfig after making this change?
> >
> > CONFIG_FSL_IFC isn't even user-selectable (though it probably should be,
> > as how else would it get enabled in the absence of NAND for catching NOR
> > errors?).
> >
>
> Thanks Kumar and Scott for reviewing this patch.
>
> Yes, it should be enabled by Kconfig dependency. as we have
> config FSL_IFC
> bool
> depends on FSL_SOC
>
> The only reason I changed this code because i wanted all powerpc/configs
> to be similar as they have CONFIG_FSL_IFC enabled by default.
>
> arch/powerpc/configs/mpc85xx_smp_defconfig:54:CONFIG_FSL_IFC=y
> arch/powerpc/configs/corenet64_smp_defconfig:29:CONFIG_FSL_IFC=y
> arch/powerpc/configs/mpc85xx_defconfig:51:CONFIG_FSL_IFC=y
>
> So either I should add in corenet32smp_defconfig to make similar to others.
> or
> remove from all.
>
> I chose first option.
Those other defconfigs are wrong, since they differ from what you'd get
after running "make savedefconfig".
-Scott
^ permalink raw reply
* Re: [PATCH RFC] powerpc/mpc85xx: add support for the kmp204x reference board
From: Scott Wood @ 2014-01-20 22:37 UTC (permalink / raw)
To: Valentin Longchamp; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <52DD50F7.1050107@keymile.com>
On Mon, 2014-01-20 at 17:38 +0100, Valentin Longchamp wrote:
> On 01/17/2014 10:48 PM, Scott Wood wrote:
> > On Fri, 2014-01-17 at 13:51 +0100, Valentin Longchamp wrote:
> >> Hi Scott,
> >>
> >> Thanks for you feedback.
> >>
> >> On 01/17/2014 12:35 AM, Scott Wood wrote:
> >>> On Thu, 2014-01-16 at 14:38 +0100, Valentin Longchamp wrote:
> >>>> This patch introduces the support for Keymile's kmp204x reference
> >>>> design. This design is based on Freescale's P2040/P2041 SoC.
> >>>>
> >>>> The peripherals used by this design are:
> >>>> - SPI NOR Flash as bootloader medium
> >>>> - NAND Flash with a ubi partition
> >>>> - 2 PCIe busses (hosts 1 and 3)
> >>>> - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
> >>>> - 4 Local Bus windows, with one dedicated to the QRIO reset/power mgmt
> >>>> FPGA
> >>>> - 2 HW I2C busses
> >>>> - last but not least, the mandatory serial port
> >>>>
> >>>> The patch also adds a defconfig file for this reference design and a DTS
> >>>> file for the kmcoge4 board which is the first one based on this
> >>>> reference design.
> >>>>
> >>>> To try to avoid code duplication, the support was added directly to the
> >>>> corenet_generic.c file.
> >>>>
> >>>> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> >>>> ---
> >>>> arch/powerpc/boot/dts/kmcoge4.dts | 165 ++++++++++++++++++
> >>>> arch/powerpc/configs/85xx/kmp204x_defconfig | 231 ++++++++++++++++++++++++++
> >>>> arch/powerpc/platforms/85xx/Kconfig | 14 ++
> >>>> arch/powerpc/platforms/85xx/Makefile | 1 +
> >>>> arch/powerpc/platforms/85xx/corenet_generic.c | 52 ++++++
> >>>> 5 files changed, 463 insertions(+)
> >>>> create mode 100644 arch/powerpc/boot/dts/kmcoge4.dts
> >>>> create mode 100644 arch/powerpc/configs/85xx/kmp204x_defconfig
> >>>>
> >>>> diff --git a/arch/powerpc/boot/dts/kmcoge4.dts b/arch/powerpc/boot/dts/kmcoge4.dts
> >>>> new file mode 100644
> >>>> index 0000000..c10df6d
> >>>> --- /dev/null
> >>>> +++ b/arch/powerpc/boot/dts/kmcoge4.dts
> >>>> @@ -0,0 +1,165 @@
> >>>> +/*
> >>>> + * Keymile kmcoge4 Device Tree Source, based on the P2041RDB DTS
> >>>> + *
> >>>> + * (C) Copyright 2014
> >>>> + * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
> >>>> + *
> >>>> + * Copyright 2011 Freescale Semiconductor Inc.
> >>>> + *
> >>>> + * This program is free software; you can redistribute it and/or modify it
> >>>> + * under the terms of the GNU General Public License as published by the
> >>>> + * Free Software Foundation; either version 2 of the License, or (at your
> >>>> + * option) any later version.
> >>>> + */
> >>>> +
> >>>> +/include/ "fsl/p2041si-pre.dtsi"
> >>>> +
> >>>> +/ {
> >>>> + model = "keymile,kmcoge4";
> >>>> + compatible = "keymile,kmp204x";
> >>>
> >>> Don't put wildcards in compatible.
> >>
> >> Well it's a wildcard in the sense that we support both the p2040 and the p2041,
> >> but it's also the name of the plaftorm, similarly to names like '85xx' or 'tqm85xx'.
> >
> > Names like 85xx are not allowed in device trees.
> >
> > With "p204x", what would happen if a p2042 were introduced, that were
> > not compatible?
>
> What would you suggest as a generic name for the architecture that supports both ?
>
> >
> > Why isn't the compatible "keymile,kmcoge4", like the model?
>
> Because kmcoge4 is the board that is based on the kmp204x architecture/design.
> We expect other boards (kmcoge7 for instance) based on the same kmp204x design.
The top-level compatible isn't for the "architecture" or the "design".
It's for the board. Surely there's something different about kmcoge7
versus kmcoge4 -- is it visible to software?
> You would prefer that I have the model and compatible stricly the same and add
> any future board into the compatible boards[] from corenet_generic ?
That's how it's usually done. Or, at least provide the board
architecture name as a secondary compatible after the board name.
> If possible I would like to be able to see the boards that are based on a
> similar design, that's what I wanted to achieve with this kmp204x name.
Is "kmp204x" an official name of the architecture, rather than a
generalization of "kmp2040" and "kmp2041"? If there were a p2042, and
you made a board for it, is there any chance it would be called kmp204x
even if it were very different from the p2040/p2041 board?
> >>>> + zl30343@1 {
> >>>> + compatible = "gen,spidev";
> >>>
> >>> Node names are supposed to be generic. Compatibles are supposed to be
> >>> specific.
> >>
> >> That's a very specific device for which we only have a userspace driver and for
> >> which we must use the generic kernel spidev driver.
> >
> > The device tree describes the hardware, not what driver you want to use.
> >
> > Plus, I don't see any driver that matches "gen,spidev" nor any binding
> > for it, and "gen" doesn't make sense as a vendor prefix. The only
> > instance of that string I can find in the Linux tree is in mgcoge.dts.
>
> Well it comes from mgcoge and that's why I have used this
>
> It's for usage with the spidev driver (driver/spi/spidev.c). I agree that the
> gen brings nothing. Would
>
> spidev@1 {
> compatible = "spidev";
>
> make more sense ?
It doesn't address any of the other comments.
> >>>> + lbc: localbus@ffe124000 {
> >>>> + reg = <0xf 0xfe124000 0 0x1000>;
> >>>> + ranges = <0 0 0xf 0xffa00000 0x00040000 /* LB 0 */
> >>>> + 1 0 0xf 0xfb000000 0x00010000 /* LB 1 */
> >>>> + 2 0 0xf 0xd0000000 0x10000000 /* LB 2 */
> >>>> + 3 0 0xf 0xe0000000 0x10000000>; /* LB 3 */
> >>>> +
> >>>> + nand@0,0 {
> >>>> + #address-cells = <1>;
> >>>> + #size-cells = <1>;
> >>>> + compatible = "fsl,elbc-fcm-nand";
> >>>> + reg = <0 0 0x40000>;
> >>>> +
> >>>> + partition@0 {
> >>>> + label = "ubi0";
> >>>> + reg = <0x0 0x8000000>;
> >>>> + };
> >>>> + };
> >>>> + };
> >>>
> >>> No nodes for those other chipselects?
> >>
> >> Well, there are nodes, but they are internally developed FPGAs and the drivers
> >> are not mainlined that's why I removed the nodes.
> >
> > The device tree describes the hardware, not what drivers are currently
> > mainlined in Linux.
>
> What do you want me to do: add the nodes for which there are no bindings ?
No, ideally you'd add bindings and nodes. I'm not going to insist on it
if bindings aren't ready, but please don't leave things out only because
there's no driver.
> I did this similarly to the situation with the FSL .dtsi that currently in
> mainline do not include the DPAA/QMAN/BMAN nodes.
What we've done with DPAA doesn't make a very good role model,
unfortunately.
-Scott
^ permalink raw reply
* Re: [PATCH] slub: Don't throw away partial remote slabs if there is no local memory
From: Christoph Lameter @ 2014-01-20 22:13 UTC (permalink / raw)
To: Wanpeng Li
Cc: nacc, penberg, linux-mm, Han Pingtian, paulus, Anton Blanchard,
mpm, Joonsoo Kim, linuxppc-dev
In-Reply-To: <52dce7fe.e5e6420a.5ff6.ffff84a0SMTPIN_ADDED_BROKEN@mx.google.com>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 1025 bytes --]
On Mon, 20 Jan 2014, Wanpeng Li wrote:
> >+ enum zone_type high_zoneidx = gfp_zone(flags);
> >
> >+ if (!node_present_pages(searchnode)) {
> >+ zonelist = node_zonelist(searchnode, flags);
> >+ for_each_zone_zonelist(zone, z, zonelist, high_zoneidx) {
> >+ searchnode = zone_to_nid(zone);
> >+ if (node_present_pages(searchnode))
> >+ break;
> >+ }
> >+ }
> > object = get_partial_node(s, get_node(s, searchnode), c, flags);
> > if (object || node != NUMA_NO_NODE)
> > return object;
> >
>
> The patch fix the bug. However, the kernel crashed very quickly after running
> stress tests for a short while:
This is not a good way of fixing it. How about not asking for memory from
nodes that are memoryless? Use numa_mem_id() which gives you the next node
that has memory instead of numa_node_id() (gives you the current node
regardless if it has memory or not).
[-- Attachment #2: Type: TEXT/PLAIN, Size: 4918 bytes --]
[ 287.464285] Unable to handle kernel paging request for data at address 0x00000001
[ 287.464289] Faulting instruction address: 0xc000000000445af8
[ 287.464294] Oops: Kernel access of bad area, sig: 11 [#1]
[ 287.464296] SMP NR_CPUS=2048 NUMA pSeries
[ 287.464301] Modules linked in: btrfs raid6_pq xor dm_service_time sg nfsv3 arc4 md4 rpcsec_gss_krb5 nfsv4 nls_utf8 cifs nfs fscache dns_resolver nf_conntrack_netbios_ns nf_conntrack_broadcast ipt_MASQUERADE ip6t_REJECT ipt_REJECT xt_conntrack ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw iptable_filter ip_tables ext4 mbcache jbd2 ibmvfc scsi_transport_fc ibmveth nx_crypto pseries_rng nfsd auth_rpcgss nfs_acl lockd binfmt_misc sunrpc uinput dm_multipath xfs libcrc32c sd_mod crc_t10dif crct10dif_common ibmvscsi scsi_transport_srp scsi_tgt dm_mirror dm_region_hash dm_log dm_mod
[ 287.464374] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-71.el7.91831.ppc64 #1
[ 287.464378] task: c000000000fde590 ti: c0000001fffd0000 task.ti: c0000000010a4000
[ 287.464382] NIP: c000000000445af8 LR: c000000000445bcc CTR: c000000000445b90
[ 287.464385] REGS: c0000001fffd38e0 TRAP: 0300 Not tainted (3.10.0-71.el7.91831.ppc64)
[ 287.464388] MSR: 8000000000009032 <SF,EE,ME,IR,DR,RI> CR: 88002084 XER: 00000001
[ 287.464397] SOFTE: 0
[ 287.464398] CFAR: c00000000000908c
[ 287.464401] DAR: 0000000000000001, DSISR: 40000000
[ 287.464403]
GPR00: d000000003649a04 c0000001fffd3b60 c0000000010a94d0 0000000000000003
GPR04: c00000018d841048 c0000001fffd3bd0 0000000000000012 d00000000364eff0
GPR08: c0000001fffd3bd0 0000000000000001 d00000000364d688 c000000000445b90
GPR12: d00000000364b960 c000000007e00000 00000000042ac510 0000000000000060
GPR16: 0000000000200000 00000000fffffb19 c000000001122100 0000000000000000
GPR20: c000000000a94680 c000000001122180 c000000000a94680 000000000000000a
GPR24: 0000000000000100 0000000000000000 0000000000000001 c0000001ef900000
GPR28: c0000001d6c066f0 c0000001aea03520 c0000001bc9a2640 c00000018d841680
[ 287.464447] NIP [c000000000445af8] .__dev_printk+0x28/0xc0
[ 287.464450] LR [c000000000445bcc] .dev_printk+0x3c/0x50
[ 287.464453] PACATMSCRATCH [8000000000009032]
[ 287.464455] Call Trace:
[ 287.464458] [c0000001fffd3b60] [c0000001fffd3c00] 0xc0000001fffd3c00 (unreliable)
[ 287.464467] [c0000001fffd3bf0] [d000000003649a04] .ibmvfc_scsi_done+0x334/0x3e0 [ibmvfc]
[ 287.464474] [c0000001fffd3cb0] [d0000000036495b8] .ibmvfc_handle_crq+0x2e8/0x320 [ibmvfc]
[ 287.464488] [c0000001fffd3d30] [d000000003649fe4] .ibmvfc_tasklet+0xd4/0x250 [ibmvfc]
[ 287.464494] [c0000001fffd3de0] [c00000000009b46c] .tasklet_action+0xcc/0x1b0
[ 287.464498] [c0000001fffd3e90] [c00000000009a668] .__do_softirq+0x148/0x360
[ 287.464503] [c0000001fffd3f90] [c0000000000218a8] .call_do_softirq+0x14/0x24
[ 287.464507] [c0000001fffcfdf0] [c0000000000107e0] .do_softirq+0xd0/0x100
[ 287.464511] [c0000001fffcfe80] [c00000000009aba8] .irq_exit+0x1b8/0x1d0
[ 287.464514] [c0000001fffcff10] [c000000000010410] .__do_irq+0xc0/0x1e0
[ 287.464518] [c0000001fffcff90] [c0000000000218cc] .call_do_irq+0x14/0x24
[ 287.464522] [c0000000010a76d0] [c0000000000105bc] .do_IRQ+0x8c/0x100
[ 287.464527] --- Exception: 501 at 0xffff
[ 287.464527] LR = .arch_local_irq_restore+0x74/0x90
[ 287.464533] [c0000000010a7770] [c000000000002494] hardware_interrupt_common+0x114/0x180 (unreliable)
[ 287.464540] --- Exception: 501 at .plpar_hcall_norets+0x84/0xd4
[ 287.464540] LR = .check_and_cede_processor+0x24/0x40
[ 287.464546] [c0000000010a7a60] [0000000000000001] 0x1 (unreliable)
[ 287.464550] [c0000000010a7ad0] [c000000000074ecc] .shared_cede_loop+0x2c/0x70
[ 287.464555] [c0000000010a7b50] [c0000000005538f4] .cpuidle_enter_state+0x64/0x150
[ 287.464559] [c0000000010a7c10] [c000000000553ad0] .cpuidle_idle_call+0xf0/0x300
[ 287.464563] [c0000000010a7cc0] [c0000000000695c0] .pseries_lpar_idle+0x10/0x50
[ 287.464568] [c0000000010a7d30] [c000000000016ee4] .arch_cpu_idle+0x64/0x150
[ 287.464572] [c0000000010a7db0] [c0000000000f6504] .cpu_startup_entry+0x1a4/0x2d0
[ 287.464577] [c0000000010a7e80] [c00000000000bd04] .rest_init+0x94/0xb0
[ 287.464582] [c0000000010a7ef0] [c000000000a044d0] .start_kernel+0x4b0/0x4cc
[ 287.464586] [c0000000010a7f90] [c000000000009d30] .start_here_common+0x20/0x70
[ 287.464589] Instruction dump:
[ 287.464591] 60000000 60420000 2c240000 7c6a1b78 41c20088 e9240090 88630001 7ca82b78
[ 287.464598] 2fa90000 3863ffd0 7c6307b4 419e002c <e8c90000> e8e40050 2fa70000 419e004c
[ 287.464606] ---[ end trace c469801a8c53d8f1 ]---
[ 287.466576]
[ 287.466582] Sending IPI to other CPUs
[ 287.468526] IPI complete
^ permalink raw reply
* Re: [PATCH] powerpc: hugetlb: replace __get_cpu_var with get_cpu_var
From: Scott Wood @ 2014-01-20 22:17 UTC (permalink / raw)
To: Tiejun Chen; +Cc: linuxppc-dev
In-Reply-To: <1390207175-2181-1-git-send-email-tiejun.chen@windriver.com>
On Mon, 2014-01-20 at 16:39 +0800, Tiejun Chen wrote:
> if (atomic_read(&tlb->mm->mm_users) < 2 ||
> cpumask_equal(mm_cpumask(tlb->mm),
> cpumask_of(smp_processor_id()))) {
> kmem_cache_free(hugepte_cache, hugepte);
> + put_cpu_var(hugepd_freelist_cur);
> return;
> }
>
Whitespace
> @@ -491,6 +492,7 @@ static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
> call_rcu_sched(&(*batchp)->rcu, hugepd_free_rcu_callback);
> *batchp = NULL;
> }
> + put_cpu_var(hugepd_freelist_cur);
> }
A blank line before "put_cpu_var" would be nice.
-Scott
^ permalink raw reply
* [PATCH] powerpc/kconfig: Remove TSI108_BRIDGE duplicates
From: Luis Henriques @ 2014-01-20 19:43 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Paul Bolle,
Michael Ellerman, Kumar Gala
Cc: linuxppc-dev, linux-kernel
The MPC7448HPC2 and PPC_HOLLY config options contain TSI108_BRIDGE
duplicates since commit:
commit 3490cba56f7f8a78ef4c94814c3181f09ce1e2ef
Author: Jon Loeliger <jdl@jdl.com>
Date: Wed Jan 23 12:42:50 2008 -0600
[POWERPC] Add initial iomega StorCenter board port.
This patch cleans these duplicates.
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
---
arch/powerpc/platforms/embedded6xx/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 302ba43..59bd9cd 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -34,7 +34,6 @@ config MPC7448HPC2
select TSI108_BRIDGE
select DEFAULT_UIMAGE
select PPC_UDBG_16550
- select TSI108_BRIDGE
help
Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga)
platform
@@ -44,7 +43,6 @@ config PPC_HOLLY
depends on EMBEDDED6xx
select TSI108_BRIDGE
select PPC_UDBG_16550
- select TSI108_BRIDGE
help
Select PPC_HOLLY if configuring for an IBM 750GX/CL Eval
Board with TSI108/9 bridge (Hickory/Holly)
--
1.8.3.2
Cheers,
--
Luis
^ permalink raw reply related
* [PATCH] powerpc/mpic: Fix build errors for CONFIG_MPIC_WEIRD
From: Luis Henriques @ 2014-01-20 19:42 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Grant Likely, Rob Herring,
Scott Wood, Wang Dongsheng, Jia Hongtao, Alexander Gordeev
Cc: devicetree, linuxppc-dev, linux-kernel
When CONFIG_MPIC_WEIRD is defined, the following build error occurs:
arch/powerpc/sysdev/mpic.c: In function 'mpic_set_irq_type':
arch/powerpc/sysdev/mpic.c:892:9: error: case label does not reduce to an integer constant
MPIC_INFO(VECPRI_POLARITY_POSITIVE):
^
arch/powerpc/sysdev/mpic.c:896:9: error: case label does not reduce to an integer constant
MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
^
arch/powerpc/sysdev/mpic.c:900:9: error: case label does not reduce to an integer constant
MPIC_INFO(VECPRI_POLARITY_POSITIVE):
^
arch/powerpc/sysdev/mpic.c:904:9: error: case label does not reduce to an integer constant
MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
^
This is because the case labels are built by accessing mpic->hw_set, and not an
integer constant.
Fixes: 446f6d06fab0 ("powerpc/mpic: Properly set default triggers")
Cc: <stable@vger.kernel.org> (3.4+)
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
---
arch/powerpc/sysdev/mpic.c | 34 +++++++++++++++-------------------
1 file changed, 15 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0e166ed..e7bf1a2 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -886,25 +886,21 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
/* Default: read HW settings */
if (flow_type == IRQ_TYPE_DEFAULT) {
- switch(vold & (MPIC_INFO(VECPRI_POLARITY_MASK) |
- MPIC_INFO(VECPRI_SENSE_MASK))) {
- case MPIC_INFO(VECPRI_SENSE_EDGE) |
- MPIC_INFO(VECPRI_POLARITY_POSITIVE):
- flow_type = IRQ_TYPE_EDGE_RISING;
- break;
- case MPIC_INFO(VECPRI_SENSE_EDGE) |
- MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
- flow_type = IRQ_TYPE_EDGE_FALLING;
- break;
- case MPIC_INFO(VECPRI_SENSE_LEVEL) |
- MPIC_INFO(VECPRI_POLARITY_POSITIVE):
- flow_type = IRQ_TYPE_LEVEL_HIGH;
- break;
- case MPIC_INFO(VECPRI_SENSE_LEVEL) |
- MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
- flow_type = IRQ_TYPE_LEVEL_LOW;
- break;
- }
+ unsigned int info;
+ info = vold & (MPIC_INFO(VECPRI_POLARITY_MASK) |
+ MPIC_INFO(VECPRI_SENSE_MASK));
+ if (info == (MPIC_INFO(VECPRI_SENSE_EDGE) |
+ MPIC_INFO(VECPRI_POLARITY_POSITIVE)))
+ flow_type = IRQ_TYPE_EDGE_RISING;
+ else if (info == (MPIC_INFO(VECPRI_SENSE_EDGE) |
+ MPIC_INFO(VECPRI_POLARITY_NEGATIVE)))
+ flow_type = IRQ_TYPE_EDGE_FALLING;
+ else if (info == (MPIC_INFO(VECPRI_SENSE_LEVEL) |
+ MPIC_INFO(VECPRI_POLARITY_POSITIVE)))
+ flow_type = IRQ_TYPE_LEVEL_HIGH;
+ else if (info == (MPIC_INFO(VECPRI_SENSE_LEVEL) |
+ MPIC_INFO(VECPRI_POLARITY_NEGATIVE)))
+ flow_type = IRQ_TYPE_LEVEL_LOW;
}
/* Apply to irq desc */
--
1.8.3.2
Cheers,
--
Luis
^ permalink raw reply related
* [PATCH] powerpc: Fix build dependencies for storcenter
From: Luis Henriques @ 2014-01-20 19:39 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Anton Blanchard,
Ian Munsie
Cc: linuxppc-dev, linux-kernel
This fixes a build failure that seems to be present since commit
commit b81f18e55e9f4ea81759bcb00fea295de679bbe8
Author: Tony Breeds <tony@bakeyournoodle.com>
Date: Tue Apr 3 15:00:39 2012 +0000
powerpc/boot: Only build board support files when required.
This is easily reproducible my using the storcenter_defconfig config file:
arch/powerpc/boot/cuboot-pq2.o: In function `pq2_platform_fixups':
cuboot-pq2.c:(.text+0x30c): undefined reference to `fsl_get_immr'
make[1]: *** [arch/powerpc/boot/cuImage.storcenter] Error 1
Fixes: b81f18e55e9f ("powerpc/boot: Only build board support files when required.")
Cc: Tony Breeds <tony@bakeyournoodle.com>
Cc: <stable@vger.kernel.org> (3.6+)
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
---
arch/powerpc/boot/Makefile | 2 +-
arch/powerpc/boot/wrapper | 5 ++++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 981d418..cf8e5db 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -95,7 +95,7 @@ src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
cuboot-c2k.c gamecube-head.S \
gamecube.c wii-head.S wii.c holly.c \
- prpmc2800.c
+ prpmc2800.c fsl-soc.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 2e1af74..4d90b98 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -190,9 +190,12 @@ cuboot*)
*5200*|*-motionpro)
platformo=$object/cuboot-52xx.o
;;
- *-pq2fads|*-ep8248e|*-mpc8272*|*-storcenter)
+ *-pq2fads|*-ep8248e|*-mpc8272*)
platformo=$object/cuboot-pq2.o
;;
+ *-storcenter)
+ platformo="$object/cuboot-pq2.o $object/fsl-soc.o"
+ ;;
*-mpc824*)
platformo=$object/cuboot-824x.o
;;
--
1.8.3.2
Cheers,
--
Luis
^ permalink raw reply related
* [PATCH] powerpc: Fix build dependencies for ep88xc
From: Luis Henriques @ 2014-01-20 19:37 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Anton Blanchard,
Ian Munsie, Tony Breeds
Cc: linuxppc-dev, linux-kernel
This fixes a build failure that seems to be present since commit
commit b81f18e55e9f4ea81759bcb00fea295de679bbe8
Author: Tony Breeds <tony@bakeyournoodle.com>
Date: Tue Apr 3 15:00:39 2012 +0000
powerpc/boot: Only build board support files when required.
This is easily reproducible my using the ep88xc_defconfig config file:
arch/powerpc/boot/wrapper.a(mpc8xx.o): In function `mpc885_get_clock':
/home/henrix/src/linux/arch/powerpc/boot/mpc8xx.c:30: undefined reference to `fsl_get_immr'
make[1]: *** [arch/powerpc/boot/dtbImage.ep88xc] Error 1
Fixes: b81f18e55e9f ("powerpc/boot: Only build board support files when required.")
Cc: Tony Breeds <tony@bakeyournoodle.com>
Cc: <stable@vger.kernel.org> (3.6+)
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
---
arch/powerpc/boot/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index ca7f08c..981d418 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -71,7 +71,7 @@ src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \
uartlite.c mpc52xx-psc.c
src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c
src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c
-src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c
+src-wlib-$(CONFIG_8xx) += mpc8xx.c fsl-soc.c planetcore.c
src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c
--
1.8.3.2
Cheers,
--
Luis
^ permalink raw reply related
* Re: [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Scott Wood @ 2014-01-20 18:30 UTC (permalink / raw)
To: Tiejun Chen; +Cc: linuxppc-dev
In-Reply-To: <1390207175-2181-2-git-send-email-tiejun.chen@windriver.com>
On Mon, 2014-01-20 at 16:39 +0800, Tiejun Chen wrote:
> AER driver needs to share this PCI err irq with EDAC, otherwise
> we can't register AER driver successfully as follows:
>
> genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
> Call Trace:
> [ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
> [ee063cf0] [c055fac4] dump_stack+0x78/0xa0
> [ee063d00] [c006e16c] __setup_irq+0x51c/0x540
> [ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
> [ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
> [ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
> [ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
> [ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
> [ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
> [ee063e30] [c02c1f94] driver_attach+0x24/0x40
> [ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
> [ee063e60] [c02c2d98] driver_register+0x88/0x140
> [ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
> [ee063e80] [c06fb14c] aer_service_init+0x28/0x38
> [ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
> [ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
> [ee063f30] [c0002ac4] kernel_init+0x14/0x130
> [ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
> aer: probe of 0000:00:00.0:pcie02 failed with error -16
> genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
> Call Trace:
> [ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
> [ee063cf0] [c055fac4] dump_stack+0x78/0xa0
> [ee063d00] [c006e16c] __setup_irq+0x51c/0x540
> [ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
> [ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
> [ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
> [ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
> [ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
> [ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
> [ee063e30] [c02c1f94] driver_attach+0x24/0x40
> [ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
> [ee063e60] [c02c2d98] driver_register+0x88/0x140
> [ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
> [ee063e80] [c06fb14c] aer_service_init+0x28/0x38
> [ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
> [ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
> [ee063f30] [c0002ac4] kernel_init+0x14/0x130
> [ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
> aer: probe of 0001:02:00.0:pcie02 failed with error -16
>
> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
> ---
> drivers/edac/mpc85xx_edac.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
This patch should be sent to the maintainer and list specified under
EDAC-MPC85XX.
> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> index fd46b0b..0dda7c4 100644
> --- a/drivers/edac/mpc85xx_edac.c
> +++ b/drivers/edac/mpc85xx_edac.c
> @@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
> if (edac_op_state == EDAC_OPSTATE_INT) {
> pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
> res = devm_request_irq(&op->dev, pdata->irq,
> - mpc85xx_pci_isr, IRQF_DISABLED,
> + mpc85xx_pci_isr, IRQF_SHARED |
> + IRQF_DISABLED,
> "[EDAC] PCI err", pci);
> if (res < 0) {
> printk(KERN_ERR
While you're touching this, perhaps remove IRQF_DISABLED which is a
deprecated no-op and will eventually be removed.
-Scott
^ permalink raw reply
* Re: [PATCH 02/13] ppc/cell: use get_unused_fd_flags(0) instead of get_unused_fd()
From: Yann Droneaud @ 2014-01-20 17:01 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: cbe-oss-dev, Yann Droneaud, linuxppc-dev, linux-kernel
In-Reply-To: <1389605449.1585.9.camel@localhost.localdomain>
Hi,
Le lundi 13 janvier 2014 à 10:30 +0100, Yann Droneaud a écrit :
> Le lundi 13 janvier 2014 à 10:06 +1100, Benjamin Herrenschmidt a écrit :
> > On Tue, 2013-07-02 at 18:39 +0200, Yann Droneaud wrote:
> > > Macro get_unused_fd() is used to allocate a file descriptor with
> > > default flags. Those default flags (0) can be "unsafe":
> > > O_CLOEXEC must be used by default to not leak file descriptor
> > > across exec().
> > >
> > > Instead of macro get_unused_fd(), functions anon_inode_getfd()
> > > or get_unused_fd_flags() should be used with flags given by userspace.
> > > If not possible, flags should be set to O_CLOEXEC to provide userspace
> > > with a default safe behavor.
> > >
> > > In a further patch, get_unused_fd() will be removed so that
> > > new code start using anon_inode_getfd() or get_unused_fd_flags()
> > > with correct flags.
> > >
> > > This patch replaces calls to get_unused_fd() with equivalent call to
> > > get_unused_fd_flags(0) to preserve current behavor for existing code.
> > >
> > > The hard coded flag value (0) should be reviewed on a per-subsystem basis,
> > > and, if possible, set to O_CLOEXEC.
> > >
> > > Signed-off-by: Yann Droneaud <ydroneaud@opteya.com>
> >
> > Should I merge this (v5 on patchwork) or let Al do it ?
> >
>
> Please merge it directly: patches from the previous patchsets were
> picked individually by each subsystem maintainer after proper review
> regarding setting close on exec flag by default.
>
> > Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >
>
> Thanks a lot.
> Note:
> latest patch (from v5 patchset) is at
> http://lkml.kernel.org/r/fe27abcfab5563d36a3e5e58ff36e5500c39be6a.1388952061.git.ydroneaud@opteya.com
> v5 patchset is at
> http://lkml.kernel.org/r/cover.1388952061.git.ydroneaud@opteya.com
>
I have not yet seen the patch in your trees at
https://git.kernel.org/cgit/linux/kernel/git/benh/powerpc.git/
I hope you would pick the patch, if possible in its latest version
(unfortunately I'm not able to give the link to the astest patch in
patchwork).
Regards.
--
Yann Droneaud
OPTEYA
^ permalink raw reply
* Re: [PATCH RFC] powerpc/mpc85xx: add support for the kmp204x reference board
From: Valentin Longchamp @ 2014-01-20 16:38 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1389995322.24905.275.camel@snotra.buserror.net>
On 01/17/2014 10:48 PM, Scott Wood wrote:
> On Fri, 2014-01-17 at 13:51 +0100, Valentin Longchamp wrote:
>> Hi Scott,
>>
>> Thanks for you feedback.
>>
>> On 01/17/2014 12:35 AM, Scott Wood wrote:
>>> On Thu, 2014-01-16 at 14:38 +0100, Valentin Longchamp wrote:
>>>> This patch introduces the support for Keymile's kmp204x reference
>>>> design. This design is based on Freescale's P2040/P2041 SoC.
>>>>
>>>> The peripherals used by this design are:
>>>> - SPI NOR Flash as bootloader medium
>>>> - NAND Flash with a ubi partition
>>>> - 2 PCIe busses (hosts 1 and 3)
>>>> - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
>>>> - 4 Local Bus windows, with one dedicated to the QRIO reset/power mgmt
>>>> FPGA
>>>> - 2 HW I2C busses
>>>> - last but not least, the mandatory serial port
>>>>
>>>> The patch also adds a defconfig file for this reference design and a DTS
>>>> file for the kmcoge4 board which is the first one based on this
>>>> reference design.
>>>>
>>>> To try to avoid code duplication, the support was added directly to the
>>>> corenet_generic.c file.
>>>>
>>>> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
>>>> ---
>>>> arch/powerpc/boot/dts/kmcoge4.dts | 165 ++++++++++++++++++
>>>> arch/powerpc/configs/85xx/kmp204x_defconfig | 231 ++++++++++++++++++++++++++
>>>> arch/powerpc/platforms/85xx/Kconfig | 14 ++
>>>> arch/powerpc/platforms/85xx/Makefile | 1 +
>>>> arch/powerpc/platforms/85xx/corenet_generic.c | 52 ++++++
>>>> 5 files changed, 463 insertions(+)
>>>> create mode 100644 arch/powerpc/boot/dts/kmcoge4.dts
>>>> create mode 100644 arch/powerpc/configs/85xx/kmp204x_defconfig
>>>>
>>>> diff --git a/arch/powerpc/boot/dts/kmcoge4.dts b/arch/powerpc/boot/dts/kmcoge4.dts
>>>> new file mode 100644
>>>> index 0000000..c10df6d
>>>> --- /dev/null
>>>> +++ b/arch/powerpc/boot/dts/kmcoge4.dts
>>>> @@ -0,0 +1,165 @@
>>>> +/*
>>>> + * Keymile kmcoge4 Device Tree Source, based on the P2041RDB DTS
>>>> + *
>>>> + * (C) Copyright 2014
>>>> + * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
>>>> + *
>>>> + * Copyright 2011 Freescale Semiconductor Inc.
>>>> + *
>>>> + * This program is free software; you can redistribute it and/or modify it
>>>> + * under the terms of the GNU General Public License as published by the
>>>> + * Free Software Foundation; either version 2 of the License, or (at your
>>>> + * option) any later version.
>>>> + */
>>>> +
>>>> +/include/ "fsl/p2041si-pre.dtsi"
>>>> +
>>>> +/ {
>>>> + model = "keymile,kmcoge4";
>>>> + compatible = "keymile,kmp204x";
>>>
>>> Don't put wildcards in compatible.
>>
>> Well it's a wildcard in the sense that we support both the p2040 and the p2041,
>> but it's also the name of the plaftorm, similarly to names like '85xx' or 'tqm85xx'.
>
> Names like 85xx are not allowed in device trees.
>
> With "p204x", what would happen if a p2042 were introduced, that were
> not compatible?
What would you suggest as a generic name for the architecture that supports both ?
>
> Why isn't the compatible "keymile,kmcoge4", like the model?
Because kmcoge4 is the board that is based on the kmp204x architecture/design.
We expect other boards (kmcoge7 for instance) based on the same kmp204x design.
You would prefer that I have the model and compatible stricly the same and add
any future board into the compatible boards[] from corenet_generic ?
If possible I would like to be able to see the boards that are based on a
similar design, that's what I wanted to achieve with this kmp204x name.
>
>>> I realize it's common practice, but it would be good to get away from
>>> putting partition layouts in the dts file. Alternatives include using
>>> mtdparts on the command line, or having U-Boot put the partition info
>>> into the dtb based on the mtdparts environment variable (there is
>>> existing code for this).
>>
>> I agree that u-boot also has to know about the addresses because it also
>> accesses these partitions.
>>
>> But I think it is clearer to have this in the device tree: I try to keep the
>> kernel command line small and I don't like having u-boot "fixing" the dtb at
>> runtime.
>
> The problem is that the dts source is often far removed from the actual
> programming of flash, and the partitioning can vary based on use case,
> or change for other reasons (e.g. there have been requests to change
> existing partition layouts to accommodate growth in U-Boot size).
>
> Ideally it wouldn't be in the device tree at all, but having U-Boot fix
> it up based on an environment variable is better than statically
> defining it in a file in the Linux tree.
>
>>>> + zl30343@1 {
>>>> + compatible = "gen,spidev";
>>>
>>> Node names are supposed to be generic. Compatibles are supposed to be
>>> specific.
>>
>> That's a very specific device for which we only have a userspace driver and for
>> which we must use the generic kernel spidev driver.
>
> The device tree describes the hardware, not what driver you want to use.
>
> Plus, I don't see any driver that matches "gen,spidev" nor any binding
> for it, and "gen" doesn't make sense as a vendor prefix. The only
> instance of that string I can find in the Linux tree is in mgcoge.dts.
Well it comes from mgcoge and that's why I have used this
It's for usage with the spidev driver (driver/spi/spidev.c). I agree that the
gen brings nothing. Would
spidev@1 {
compatible = "spidev";
make more sense ?
>
>>> That's why the node name is
>>> so specific and the compatible field very generic.
>
> Userspace can't search for a node by compatible?
>
>>>> + lbc: localbus@ffe124000 {
>>>> + reg = <0xf 0xfe124000 0 0x1000>;
>>>> + ranges = <0 0 0xf 0xffa00000 0x00040000 /* LB 0 */
>>>> + 1 0 0xf 0xfb000000 0x00010000 /* LB 1 */
>>>> + 2 0 0xf 0xd0000000 0x10000000 /* LB 2 */
>>>> + 3 0 0xf 0xe0000000 0x10000000>; /* LB 3 */
>>>> +
>>>> + nand@0,0 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + compatible = "fsl,elbc-fcm-nand";
>>>> + reg = <0 0 0x40000>;
>>>> +
>>>> + partition@0 {
>>>> + label = "ubi0";
>>>> + reg = <0x0 0x8000000>;
>>>> + };
>>>> + };
>>>> + };
>>>
>>> No nodes for those other chipselects?
>>
>> Well, there are nodes, but they are internally developed FPGAs and the drivers
>> are not mainlined that's why I removed the nodes.
>
> The device tree describes the hardware, not what drivers are currently
> mainlined in Linux.
What do you want me to do: add the nodes for which there are no bindings ?
I did this similarly to the situation with the FSL .dtsi that currently in
mainline do not include the DPAA/QMAN/BMAN nodes.
>
>>>> diff --git a/arch/powerpc/configs/85xx/kmp204x_defconfig b/arch/powerpc/configs/85xx/kmp204x_defconfig
>>>> new file mode 100644
>>>> index 0000000..3bbf4fa
>>>> --- /dev/null
>>>> +++ b/arch/powerpc/configs/85xx/kmp204x_defconfig
>>>
>>> Why does this board need its own defconfig?
>>
>> Apart from the different drivers and FS that we use (or don't use) on the
>> system,
>
> That is not generally a good reason for a separate defconfig. Just
> enable the drivers you need in the main defconfig, and don't worry about
> the drivers you don't need. You may want a smaller kernel for actual
> shipping products (though the changelog said this is a reference
> board...), but in mainline we want a small number of defconfigs that
> cover as many boards as possible (or at least, a reasonably small number
> and not one per board).
It's a reference design meaning that then all the further boards based on the
kmp204x design would reuse that defconfig. But I understand that you want to
avoid to multiply the number of defconfigs.
>
>> the most notable differences are:
>> - lowmem must be set to a bigger size so that we can ioremap the the total
>> memory requested for all of our PCIe devices
>> - CGROUPS is enabled because that's a mandatory feature for our systems
>> - NAND_ECC_BCH is enabled because it is used on all of our NAND devices
>
> I don't think there would be a problem adding CGROUPS or NAND_ECC_BCH to
> corenet32_smp_defconfig (though CGROUPS seems more like a use-case
> configuration than something to do with the board itself). The lowmem
> adjustment is probably a good reason, though I wish things like that
> could be specified as a defconfig that #includes corenet32_smp_defconfig
> and then just makes a couple changes.
>
Yes that would be a nice feature to have: even for me, I would love to be able
to rely on corenet32_smp_defconfig, include it and just add my changes.
>>> The whole point of corenet_generic.c is to avoid duplicating all of this
>>> stuff.
>>>
>>> Can't you just use corenet_generic as-is other than adding the
>>> compatible to boards[]? If not, explain why and put it in a different
>>> file.
>>>
>>
>> That's a valid point and I have to admit I have hesitated about that. I have
>> mostly based my work on the FSL SDK where every single board has a "dedicated" file.
>>
>> I agree that I do nothing different than the corenet_generic does and adding my
>> platform to the boards[] would be the same and you are right, I should use that
>> and avoid code duplication.
>>
>> The only thing that would "bother" me is thus the pr_info print from
>> *_gen_setup_arch(), it would be nice if somehow we could differentiate it or at
>> least make it more generic since the kmp204x boards are not strictly boards from
>> Freescale.
>
> Just remove the "from Freescale Semiconductor" part of the string.
>
OK.
^ permalink raw reply
* RE: [PATCH][v2] powerpc/pci: Fix IMMRBAR address
From: Roy Zang @ 2014-01-20 15:39 UTC (permalink / raw)
To: Minghuan.Lian@freescale.com, linuxppc-dev@lists.ozlabs.org
Cc: Scott Wood, Minghuan.Lian@freescale.com
In-Reply-To: <1390215260-28888-1-git-send-email-Minghuan.Lian@freescale.com>
> -----Original Message-----
> From: Minghuan Lian [mailto:Minghuan.Lian@freescale.com]
> Sent: Monday, January 20, 2014 4:54 AM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: Zang Roy-R61911; Wood Scott-B07421; Kumar Gala; Lian Minghuan-B31939
> Subject: [PATCH][v2] powerpc/pci: Fix IMMRBAR address
>=20
> For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
> So when getting base address, these bits should be masked,
> otherwise we may get incorrect base address.
>=20
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Acked.
Roy
^ permalink raw reply
* Re: [PATCH 0/4] powernv: kvm: numa fault improvement
From: Aneesh Kumar K.V @ 2014-01-20 15:45 UTC (permalink / raw)
To: Liu ping fan, Alexander Graf; +Cc: Paul Mackerras, linuxppc-dev, kvm-ppc
In-Reply-To: <CAFgQCTthThEtNEG7EOuYFCtOm46-br59u9QUNkxF0w-TM+RdJQ@mail.gmail.com>
Liu ping fan <kernelfans@gmail.com> writes:
> On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf <agraf@suse.de> wrote:
>>
>> On 11.12.2013, at 09:47, Liu Ping Fan <kernelfans@gmail.com> wrote:
>>
>>> This series is based on Aneesh's series "[PATCH -V2 0/5] powerpc: mm: Numa faults support for ppc64"
>>>
>>> For this series, I apply the same idea from the previous thread "[PATCH 0/3] optimize for powerpc _PAGE_NUMA"
>>> (for which, I still try to get a machine to show nums)
>>>
>>> But for this series, I think that I have a good justification -- the fact of heavy cost when switching context between guest and host,
>>> which is well known.
>>
>> This cover letter isn't really telling me anything. Please put a proper description of what you're trying to achieve, why you're trying to achieve what you're trying and convince your readers that it's a good idea to do it the way you do it.
>>
> Sorry for the unclear message. After introducing the _PAGE_NUMA,
> kvmppc_do_h_enter() can not fill up the hpte for guest. Instead, it
> should rely on host's kvmppc_book3s_hv_page_fault() to call
> do_numa_page() to do the numa fault check. This incurs the overhead
> when exiting from rmode to vmode. My idea is that in
> kvmppc_do_h_enter(), we do a quick check, if the page is right placed,
> there is no need to exit to vmode (i.e saving htab, slab switching)
Can you explain more. Are we looking at hcall from guest and
hypervisor handling them in real mode ? If so why would guest issue a
hcall on a pte entry that have PAGE_NUMA set. Or is this about
hypervisor handling a missing hpte, because of host swapping this page
out ? In that case how we end up in h_enter ? IIUC for that case we
should get to kvmppc_hpte_hv_fault.
>
>>> If my suppose is correct, will CCing kvm@vger.kernel.org from next version.
>>
>> This translates to me as "This is an RFC"?
>>
> Yes, I am not quite sure about it. I have no bare-metal to verify it.
> So I hope at least, from the theory, it is correct.
>
-aneesh
^ permalink raw reply
* Re: [PATCH 2/4] powernv: kvm: make _PAGE_NUMA take effect
From: Aneesh Kumar K.V @ 2014-01-20 15:22 UTC (permalink / raw)
To: Liu Ping Fan, linuxppc-dev, kvm-ppc; +Cc: Paul Mackerras, Alexander Graf
In-Reply-To: <1386751674-14136-3-git-send-email-pingfank@linux.vnet.ibm.com>
Liu Ping Fan <kernelfans@gmail.com> writes:
> To make _PAGE_NUMA take effect, we should force the checking when
> guest uses hypercall to setup hpte.
>
> Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
> ---
> arch/powerpc/kvm/book3s_hv_rm_mmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
> index 9c51544..af8602d 100644
> --- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
> +++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
> @@ -232,7 +232,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
> /* Look up the Linux PTE for the backing page */
> pte_size = psize;
> pte = lookup_linux_pte(pgdir, hva, writing, &pte_size);
> - if (pte_present(pte)) {
> + if (pte_present(pte) && !pte_numa(pte)) {
> if (writing && !pte_write(pte))
> /* make the actual HPTE be read-only */
> ptel = hpte_make_readonly(ptel);
How did we end up doing h_enter on a pte entry with pte_numa bit set ?
-aneesh
^ permalink raw reply
* Re: [PATCH 0/4] powernv: kvm: numa fault improvement
From: Alexander Graf @ 2014-01-20 14:48 UTC (permalink / raw)
To: Liu ping fan; +Cc: Paul Mackerras, linuxppc-dev, Aneesh Kumar K.V, kvm-ppc
In-Reply-To: <CAFgQCTthThEtNEG7EOuYFCtOm46-br59u9QUNkxF0w-TM+RdJQ@mail.gmail.com>
On 15.01.2014, at 07:36, Liu ping fan <kernelfans@gmail.com> wrote:
> On Thu, Jan 9, 2014 at 8:08 PM, Alexander Graf <agraf@suse.de> wrote:
>>=20
>> On 11.12.2013, at 09:47, Liu Ping Fan <kernelfans@gmail.com> wrote:
>>=20
>>> This series is based on Aneesh's series "[PATCH -V2 0/5] powerpc: =
mm: Numa faults support for ppc64"
>>>=20
>>> For this series, I apply the same idea from the previous thread =
"[PATCH 0/3] optimize for powerpc _PAGE_NUMA"
>>> (for which, I still try to get a machine to show nums)
>>>=20
>>> But for this series, I think that I have a good justification -- the =
fact of heavy cost when switching context between guest and host,
>>> which is well known.
>>=20
>> This cover letter isn't really telling me anything. Please put a =
proper description of what you're trying to achieve, why you're trying =
to achieve what you're trying and convince your readers that it's a good =
idea to do it the way you do it.
>>=20
> Sorry for the unclear message. After introducing the _PAGE_NUMA,
> kvmppc_do_h_enter() can not fill up the hpte for guest. Instead, it
> should rely on host's kvmppc_book3s_hv_page_fault() to call
> do_numa_page() to do the numa fault check. This incurs the overhead
> when exiting from rmode to vmode. My idea is that in
> kvmppc_do_h_enter(), we do a quick check, if the page is right placed,
> there is no need to exit to vmode (i.e saving htab, slab switching)
>=20
>>> If my suppose is correct, will CCing kvm@vger.kernel.org from next =
version.
>>=20
>> This translates to me as "This is an RFC"?
>>=20
> Yes, I am not quite sure about it. I have no bare-metal to verify it.
> So I hope at least, from the theory, it is correct.
Paul, could you please give this some thought and maybe benchmark it?
Alex
^ permalink raw reply
* [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Tiejun Chen @ 2014-01-20 8:39 UTC (permalink / raw)
To: scottwood; +Cc: linuxppc-dev
In-Reply-To: <1390207175-2181-1-git-send-email-tiejun.chen@windriver.com>
AER driver needs to share this PCI err irq with EDAC, otherwise
we can't register AER driver successfully as follows:
genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0000:00:00.0:pcie02 failed with error -16
genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0001:02:00.0:pcie02 failed with error -16
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
drivers/edac/mpc85xx_edac.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index fd46b0b..0dda7c4 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
if (edac_op_state == EDAC_OPSTATE_INT) {
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
res = devm_request_irq(&op->dev, pdata->irq,
- mpc85xx_pci_isr, IRQF_DISABLED,
+ mpc85xx_pci_isr, IRQF_SHARED |
+ IRQF_DISABLED,
"[EDAC] PCI err", pci);
if (res < 0) {
printk(KERN_ERR
--
1.7.9.5
^ permalink raw reply related
* [PATCH][v2] powerpc/pci: Fix IMMRBAR address
From: Minghuan Lian @ 2014-01-20 10:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Minghuan Lian, Zang Roy-R61911
For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
So when getting base address, these bits should be masked,
otherwise we may get incorrect base address.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
---
Change log:
v2:
Use PCI_BASE_ADDRESS_MEM_MASK instead of 0xfffffff0
arch/powerpc/sysdev/fsl_pci.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4dfd61d..252716d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -868,6 +868,14 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
pci_bus_read_config_dword(hose->bus,
PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
+
+ /*
+ * For PEXCSRBAR, bit 3-0 indicate prefetchable and
+ * address type. So when getting base address, these
+ * bits should be masked
+ */
+ base &= PCI_BASE_ADDRESS_MEM_MASK;
+
return base;
}
#endif
--
1.8.1.2
^ permalink raw reply related
* Re: [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Johannes Thumshirn @ 2014-01-20 9:31 UTC (permalink / raw)
To: Tiejun Chen; +Cc: scottwood, Borislav Petkov, linuxppc-dev, linux-edac
In-Reply-To: <1390208175-3656-1-git-send-email-tiejun.chen@windriver.com>
On Mon, Jan 20, 2014 at 04:56:15PM +0800, Tiejun Chen wrote:
> AER driver needs to share this PCI err irq with EDAC, otherwise
> we can't register AER driver successfully as follows:
>
> genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
> Call Trace:
> [ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
> [ee063cf0] [c055fac4] dump_stack+0x78/0xa0
> [ee063d00] [c006e16c] __setup_irq+0x51c/0x540
> [ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
> [ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
> [ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
> [ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
> [ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
> [ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
> [ee063e30] [c02c1f94] driver_attach+0x24/0x40
> [ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
> [ee063e60] [c02c2d98] driver_register+0x88/0x140
> [ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
> [ee063e80] [c06fb14c] aer_service_init+0x28/0x38
> [ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
> [ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
> [ee063f30] [c0002ac4] kernel_init+0x14/0x130
> [ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
> aer: probe of 0000:00:00.0:pcie02 failed with error -16
> genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
> Call Trace:
> [ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
> [ee063cf0] [c055fac4] dump_stack+0x78/0xa0
> [ee063d00] [c006e16c] __setup_irq+0x51c/0x540
> [ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
> [ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
> [ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
> [ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
> [ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
> [ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
> [ee063e30] [c02c1f94] driver_attach+0x24/0x40
> [ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
> [ee063e60] [c02c2d98] driver_register+0x88/0x140
> [ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
> [ee063e80] [c06fb14c] aer_service_init+0x28/0x38
> [ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
> [ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
> [ee063f30] [c0002ac4] kernel_init+0x14/0x130
> [ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
> aer: probe of 0001:02:00.0:pcie02 failed with error -16
>
> Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
> ---
> drivers/edac/mpc85xx_edac.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> index fd46b0b..0dda7c4 100644
> --- a/drivers/edac/mpc85xx_edac.c
> +++ b/drivers/edac/mpc85xx_edac.c
> @@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
> if (edac_op_state == EDAC_OPSTATE_INT) {
> pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
> res = devm_request_irq(&op->dev, pdata->irq,
> - mpc85xx_pci_isr, IRQF_DISABLED,
> + mpc85xx_pci_isr, IRQF_SHARED |
> + IRQF_DISABLED,
> "[EDAC] PCI err", pci);
> if (res < 0) {
> printk(KERN_ERR
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-edac" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Tiejun,
This is already floating around in linux-next and will hopefully be merged in
3.14.
Hope this helps.
^ permalink raw reply
* [PATCH] powerpc/mpc85xx: Update clock nodes in device tree
From: Yuantian.Tang @ 2014-01-20 8:26 UTC (permalink / raw)
To: b07421; +Cc: Tang Yuantian, linuxppc-dev
From: Tang Yuantian <yuantian.tang@freescale.com>
The following SoCs will be affected: p2041, p3041, p4080,
p5020, p5040, b4420, b4860, t4240
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/fsl/b4420si-post.dtsi | 36 +++++++++
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi | 2 +
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi | 36 +++++++++
arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 4 +
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 60 +++++++++++++++
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 4 +
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 61 +++++++++++++++
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi | 4 +
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 113 ++++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 8 ++
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 43 +++++++++++
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 2 +
arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 61 +++++++++++++++
arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi | 4 +
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 86 +++++++++++++++++++++
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | 12 +++
16 files changed, 536 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index 5a6615d..60566f99 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -86,6 +86,42 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
+ ranges = <0x0 0xe1000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-2.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-2.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>;
+ clock-names = "pll0", "pll0-div2", "pll0-div4",
+ "pll1", "pll1-div2", "pll1-div4";
+ clock-output-names = "cmux0";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index c6e451a..2419731 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -64,11 +64,13 @@
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 9813975..cbc354b 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -130,6 +130,42 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
+ ranges = <0x0 0xe1000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-2.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-2.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>;
+ clock-names = "pll0", "pll0-div2", "pll0-div4",
+ "pll1", "pll1-div2", "pll1-div4";
+ clock-output-names = "cmux0";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 9bc26b1..142ac86 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -64,21 +64,25 @@
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
+ clocks = <&mux0>;
next-level-cache = <&L2>;
};
};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index dc6cc5a..e2987a3 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -306,8 +306,68 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
+ ranges = <0x0 0xe1000 0x1000>;
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-1.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux0";
+ };
+
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux1";
+ };
+
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ };
+
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux3";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 7a2697d..22f3b14 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
cpu2: PowerPC,e500mc@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
cpu3: PowerPC,e500mc@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 3fa1e22..7af6d45 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -333,8 +333,69 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
+ ranges = <0x0 0xe1000 0x1000>;
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-1.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux0";
+ };
+
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux1";
+ };
+
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux2";
+ };
+
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux3";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
index c9ca2c3..468e8be 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -82,6 +82,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -90,6 +91,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -98,6 +100,7 @@
cpu2: PowerPC,e500mc@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -106,6 +109,7 @@
cpu3: PowerPC,e500mc@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 34769a7..2415e1f 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -353,8 +353,121 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
+ ranges = <0x0 0xe1000 0x1000>;
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-1.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+
+ pll2: pll2@840 {
+ #clock-cells = <1>;
+ reg = <0x840 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll2", "pll2-div2";
+ };
+
+ pll3: pll3@860 {
+ #clock-cells = <1>;
+ reg = <0x860 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll3", "pll3-div2";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux0";
+ };
+
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux1";
+ };
+
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux2";
+ };
+
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux3";
+ };
+
+ mux4: mux4@80 {
+ #clock-cells = <0>;
+ reg = <0x80 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+ clock-output-names = "cmux4";
+ };
+
+ mux5: mux5@a0 {
+ #clock-cells = <0>;
+ reg = <0xa0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+ clock-output-names = "cmux5";
+ };
+
+ mux6: mux6@c0 {
+ #clock-cells = <0>;
+ reg = <0xc0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+ clock-output-names = "cmux6";
+ };
+
+ mux7: mux7@e0 {
+ #clock-cells = <0>;
+ reg = <0xe0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
+ clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
+ clock-output-names = "cmux7";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index 493d9a0..0040b5a 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
cpu2: PowerPC,e500mc@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
cpu3: PowerPC,e500mc@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
@@ -113,6 +117,7 @@
cpu4: PowerPC,e500mc@4 {
device_type = "cpu";
reg = <4>;
+ clocks = <&mux4>;
next-level-cache = <&L2_4>;
L2_4: l2-cache {
next-level-cache = <&cpc>;
@@ -121,6 +126,7 @@
cpu5: PowerPC,e500mc@5 {
device_type = "cpu";
reg = <5>;
+ clocks = <&mux5>;
next-level-cache = <&L2_5>;
L2_5: l2-cache {
next-level-cache = <&cpc>;
@@ -129,6 +135,7 @@
cpu6: PowerPC,e500mc@6 {
device_type = "cpu";
reg = <6>;
+ clocks = <&mux6>;
next-level-cache = <&L2_6>;
L2_6: l2-cache {
next-level-cache = <&cpc>;
@@ -137,6 +144,7 @@
cpu7: PowerPC,e500mc@7 {
device_type = "cpu";
reg = <7>;
+ clocks = <&mux7>;
next-level-cache = <&L2_7>;
L2_7: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index bc3ae5a..2985de4 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -338,8 +338,51 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+ ranges = <0x0 0xe1000 0x1000>;
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-1.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux0";
+ };
+
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux1";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
index 8df47fc..fe1a2e6 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -88,6 +88,7 @@
cpu0: PowerPC,e5500@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -96,6 +97,7 @@
cpu1: PowerPC,e5500@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index a91897f..546a899 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -298,8 +298,69 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
+ ranges = <0x0 0xe1000 0x1000>;
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-1.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-1.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux0";
+ };
+
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux1";
+ };
+
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux2";
+ };
+
+ mux3: mux3@60 {
+ #clock-cells = <0>;
+ reg = <0x60 0x4>;
+ compatible = "fsl,qoriq-core-mux-1.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
+ clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
+ clock-output-names = "cmux3";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
index 40ca943..3674686 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e5500@0 {
device_type = "cpu";
reg = <0>;
+ clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e5500@1 {
device_type = "cpu";
reg = <1>;
+ clocks = <&mux1>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
@@ -97,6 +99,7 @@
cpu2: PowerPC,e5500@2 {
device_type = "cpu";
reg = <2>;
+ clocks = <&mux2>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
@@ -105,6 +108,7 @@
cpu3: PowerPC,e5500@3 {
device_type = "cpu";
reg = <3>;
+ clocks = <&mux3>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 4143a97..f99d74f 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -369,7 +369,93 @@
clockgen: global-utilities@e1000 {
compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
+ ranges = <0x0 0xe1000 0x1000>;
reg = <0xe1000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sysclk: sysclk {
+ #clock-cells = <0>;
+ compatible = "fsl,qoriq-sysclk-2.0";
+ clock-output-names = "sysclk";
+ };
+
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+ };
+
+ pll1: pll1@820 {
+ #clock-cells = <1>;
+ reg = <0x820 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+ };
+
+ pll2: pll2@840 {
+ #clock-cells = <1>;
+ reg = <0x840 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll2", "pll2-div2", "pll2-div4";
+ };
+
+ pll3: pll3@860 {
+ #clock-cells = <1>;
+ reg = <0x860 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll3", "pll3-div2", "pll3-div4";
+ };
+
+ pll4: pll4@880 {
+ #clock-cells = <1>;
+ reg = <0x880 0x4>;
+ compatible = "fsl,qoriq-core-pll-2.0";
+ clocks = <&sysclk>;
+ clock-output-names = "pll4", "pll4-div2", "pll4-div4";
+ };
+
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 0x4>;
+ compatible = "fsl,qoriq-core-mux-2.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>,
+ <&pll2 0>, <&pll2 1>, <&pll2 2>;
+ clock-names = "pll0", "pll0-div2", "pll0-div4",
+ "pll1", "pll1-div2", "pll1-div4",
+ "pll2", "pll2-div2", "pll2-div4";
+ clock-output-names = "cmux0";
+ };
+
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 0x4>;
+ compatible = "fsl,qoriq-core-mux-2.0";
+ clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+ <&pll1 0>, <&pll1 1>, <&pll1 2>,
+ <&pll2 0>, <&pll2 1>, <&pll2 2>;
+ clock-names = "pll0", "pll0-div2", "pll0-div4",
+ "pll1", "pll1-div2", "pll1-div4",
+ "pll2", "pll2-div2", "pll2-div4";
+ clock-output-names = "cmux1";
+ };
+
+ mux2: mux2@40 {
+ #clock-cells = <0>;
+ reg = <0x40 0x4>;
+ compatible = "fsl,qoriq-core-mux-2.0";
+ clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>,
+ <&pll4 0>, <&pll4 1>, <&pll4 2>;
+ clock-names = "pll3", "pll3-div2", "pll3-div4",
+ "pll4", "pll4-div2", "pll4-div4";
+ clock-output-names = "cmux2";
+ };
};
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
index a93c55a..0b8ccc5 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -67,61 +67,73 @@
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
+ clocks = <&mux0>;
next-level-cache = <&L2_1>;
};
cpu4: PowerPC,e6500@8 {
device_type = "cpu";
reg = <8 9>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu5: PowerPC,e6500@10 {
device_type = "cpu";
reg = <10 11>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu6: PowerPC,e6500@12 {
device_type = "cpu";
reg = <12 13>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu7: PowerPC,e6500@14 {
device_type = "cpu";
reg = <14 15>;
+ clocks = <&mux1>;
next-level-cache = <&L2_2>;
};
cpu8: PowerPC,e6500@16 {
device_type = "cpu";
reg = <16 17>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
cpu9: PowerPC,e6500@18 {
device_type = "cpu";
reg = <18 19>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
cpu10: PowerPC,e6500@20 {
device_type = "cpu";
reg = <20 21>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
cpu11: PowerPC,e6500@22 {
device_type = "cpu";
reg = <22 23>;
+ clocks = <&mux2>;
next-level-cache = <&L2_3>;
};
};
--
1.8.0
^ permalink raw reply related
* Re: [PATCH] slub: Don't throw away partial remote slabs if there is no local memory
From: Wanpeng Li @ 2014-01-20 9:10 UTC (permalink / raw)
To: Joonsoo Kim
Cc: cl, nacc, penberg, linux-mm, Han Pingtian, paulus,
Anton Blanchard, mpm, linuxppc-dev
In-Reply-To: <20140107074136.GA4011@lge.com>
[-- Attachment #1: Type: text/plain, Size: 1203 bytes --]
Hi Joonsoo,
On Tue, Jan 07, 2014 at 04:41:36PM +0900, Joonsoo Kim wrote:
[...]
>
>------------->8--------------------
>diff --git a/mm/slub.c b/mm/slub.c
>index c3eb3d3..a1f6dfa 100644
>--- a/mm/slub.c
>+++ b/mm/slub.c
>@@ -1672,7 +1672,19 @@ static void *get_partial(struct kmem_cache *s, gfp_t flags, int node,
> {
> void *object;
> int searchnode = (node == NUMA_NO_NODE) ? numa_node_id() : node;
>+ struct zonelist *zonelist;
>+ struct zoneref *z;
>+ struct zone *zone;
>+ enum zone_type high_zoneidx = gfp_zone(flags);
>
>+ if (!node_present_pages(searchnode)) {
>+ zonelist = node_zonelist(searchnode, flags);
>+ for_each_zone_zonelist(zone, z, zonelist, high_zoneidx) {
>+ searchnode = zone_to_nid(zone);
>+ if (node_present_pages(searchnode))
>+ break;
>+ }
>+ }
> object = get_partial_node(s, get_node(s, searchnode), c, flags);
> if (object || node != NUMA_NO_NODE)
> return object;
>
The patch fix the bug. However, the kernel crashed very quickly after running
stress tests for a short while:
[-- Attachment #2: oops --]
[-- Type: text/plain, Size: 4918 bytes --]
[ 287.464285] Unable to handle kernel paging request for data at address 0x00000001
[ 287.464289] Faulting instruction address: 0xc000000000445af8
[ 287.464294] Oops: Kernel access of bad area, sig: 11 [#1]
[ 287.464296] SMP NR_CPUS=2048 NUMA pSeries
[ 287.464301] Modules linked in: btrfs raid6_pq xor dm_service_time sg nfsv3 arc4 md4 rpcsec_gss_krb5 nfsv4 nls_utf8 cifs nfs fscache dns_resolver nf_conntrack_netbios_ns nf_conntrack_broadcast ipt_MASQUERADE ip6t_REJECT ipt_REJECT xt_conntrack ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw iptable_filter ip_tables ext4 mbcache jbd2 ibmvfc scsi_transport_fc ibmveth nx_crypto pseries_rng nfsd auth_rpcgss nfs_acl lockd binfmt_misc sunrpc uinput dm_multipath xfs libcrc32c sd_mod crc_t10dif crct10dif_common ibmvscsi scsi_transport_srp scsi_tgt dm_mirror dm_region_hash dm_log dm_mod
[ 287.464374] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-71.el7.91831.ppc64 #1
[ 287.464378] task: c000000000fde590 ti: c0000001fffd0000 task.ti: c0000000010a4000
[ 287.464382] NIP: c000000000445af8 LR: c000000000445bcc CTR: c000000000445b90
[ 287.464385] REGS: c0000001fffd38e0 TRAP: 0300 Not tainted (3.10.0-71.el7.91831.ppc64)
[ 287.464388] MSR: 8000000000009032 <SF,EE,ME,IR,DR,RI> CR: 88002084 XER: 00000001
[ 287.464397] SOFTE: 0
[ 287.464398] CFAR: c00000000000908c
[ 287.464401] DAR: 0000000000000001, DSISR: 40000000
[ 287.464403]
GPR00: d000000003649a04 c0000001fffd3b60 c0000000010a94d0 0000000000000003
GPR04: c00000018d841048 c0000001fffd3bd0 0000000000000012 d00000000364eff0
GPR08: c0000001fffd3bd0 0000000000000001 d00000000364d688 c000000000445b90
GPR12: d00000000364b960 c000000007e00000 00000000042ac510 0000000000000060
GPR16: 0000000000200000 00000000fffffb19 c000000001122100 0000000000000000
GPR20: c000000000a94680 c000000001122180 c000000000a94680 000000000000000a
GPR24: 0000000000000100 0000000000000000 0000000000000001 c0000001ef900000
GPR28: c0000001d6c066f0 c0000001aea03520 c0000001bc9a2640 c00000018d841680
[ 287.464447] NIP [c000000000445af8] .__dev_printk+0x28/0xc0
[ 287.464450] LR [c000000000445bcc] .dev_printk+0x3c/0x50
[ 287.464453] PACATMSCRATCH [8000000000009032]
[ 287.464455] Call Trace:
[ 287.464458] [c0000001fffd3b60] [c0000001fffd3c00] 0xc0000001fffd3c00 (unreliable)
[ 287.464467] [c0000001fffd3bf0] [d000000003649a04] .ibmvfc_scsi_done+0x334/0x3e0 [ibmvfc]
[ 287.464474] [c0000001fffd3cb0] [d0000000036495b8] .ibmvfc_handle_crq+0x2e8/0x320 [ibmvfc]
[ 287.464488] [c0000001fffd3d30] [d000000003649fe4] .ibmvfc_tasklet+0xd4/0x250 [ibmvfc]
[ 287.464494] [c0000001fffd3de0] [c00000000009b46c] .tasklet_action+0xcc/0x1b0
[ 287.464498] [c0000001fffd3e90] [c00000000009a668] .__do_softirq+0x148/0x360
[ 287.464503] [c0000001fffd3f90] [c0000000000218a8] .call_do_softirq+0x14/0x24
[ 287.464507] [c0000001fffcfdf0] [c0000000000107e0] .do_softirq+0xd0/0x100
[ 287.464511] [c0000001fffcfe80] [c00000000009aba8] .irq_exit+0x1b8/0x1d0
[ 287.464514] [c0000001fffcff10] [c000000000010410] .__do_irq+0xc0/0x1e0
[ 287.464518] [c0000001fffcff90] [c0000000000218cc] .call_do_irq+0x14/0x24
[ 287.464522] [c0000000010a76d0] [c0000000000105bc] .do_IRQ+0x8c/0x100
[ 287.464527] --- Exception: 501 at 0xffff
[ 287.464527] LR = .arch_local_irq_restore+0x74/0x90
[ 287.464533] [c0000000010a7770] [c000000000002494] hardware_interrupt_common+0x114/0x180 (unreliable)
[ 287.464540] --- Exception: 501 at .plpar_hcall_norets+0x84/0xd4
[ 287.464540] LR = .check_and_cede_processor+0x24/0x40
[ 287.464546] [c0000000010a7a60] [0000000000000001] 0x1 (unreliable)
[ 287.464550] [c0000000010a7ad0] [c000000000074ecc] .shared_cede_loop+0x2c/0x70
[ 287.464555] [c0000000010a7b50] [c0000000005538f4] .cpuidle_enter_state+0x64/0x150
[ 287.464559] [c0000000010a7c10] [c000000000553ad0] .cpuidle_idle_call+0xf0/0x300
[ 287.464563] [c0000000010a7cc0] [c0000000000695c0] .pseries_lpar_idle+0x10/0x50
[ 287.464568] [c0000000010a7d30] [c000000000016ee4] .arch_cpu_idle+0x64/0x150
[ 287.464572] [c0000000010a7db0] [c0000000000f6504] .cpu_startup_entry+0x1a4/0x2d0
[ 287.464577] [c0000000010a7e80] [c00000000000bd04] .rest_init+0x94/0xb0
[ 287.464582] [c0000000010a7ef0] [c000000000a044d0] .start_kernel+0x4b0/0x4cc
[ 287.464586] [c0000000010a7f90] [c000000000009d30] .start_here_common+0x20/0x70
[ 287.464589] Instruction dump:
[ 287.464591] 60000000 60420000 2c240000 7c6a1b78 41c20088 e9240090 88630001 7ca82b78
[ 287.464598] 2fa90000 3863ffd0 7c6307b4 419e002c <e8c90000> e8e40050 2fa70000 419e004c
[ 287.464606] ---[ end trace c469801a8c53d8f1 ]---
[ 287.466576]
[ 287.466582] Sending IPI to other CPUs
[ 287.468526] IPI complete
^ permalink raw reply
* [PATCH] powerpc: 85xx: EDAC PCI: request irq as IRQF_SHARED
From: Tiejun Chen @ 2014-01-20 8:56 UTC (permalink / raw)
To: scottwood; +Cc: linuxppc-dev, linux-edac
AER driver needs to share this PCI err irq with EDAC, otherwise
we can't register AER driver successfully as follows:
genirq: Flags mismatch irq 482. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0000:00:00.0:pcie02 failed with error -16
genirq: Flags mismatch irq 480. 00000080 (aerdrv) vs. 00000020 ([EDAC] PCI err)
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-148346-g2513817 #69
Call Trace:
[ee063cb0] [c00070c4] show_stack+0x44/0x160 (unreliable)
[ee063cf0] [c055fac4] dump_stack+0x78/0xa0
[ee063d00] [c006e16c] __setup_irq+0x51c/0x540
[ee063d40] [c006e264] request_threaded_irq+0xd4/0x150
[ee063d70] [c0280d10] aer_probe+0xe0/0x2a0
[ee063da0] [c027e590] pcie_port_probe_service+0x40/0x90
[ee063dc0] [c02c253c] driver_probe_device+0x8c/0x250
[ee063de0] [c02c27bc] __driver_attach+0xbc/0xc0
[ee063e00] [c02c0760] bus_for_each_dev+0x70/0xb0
[ee063e30] [c02c1f94] driver_attach+0x24/0x40
[ee063e40] [c02c1aec] bus_add_driver+0xfc/0x210
[ee063e60] [c02c2d98] driver_register+0x88/0x140
[ee063e70] [c027e4b4] pcie_port_service_register+0x64/0x80
[ee063e80] [c06fb14c] aer_service_init+0x28/0x38
[ee063e90] [c0002468] do_one_initcall+0x158/0x1b0
[ee063f00] [c06e291c] kernel_init_freeable+0x128/0x1d4
[ee063f30] [c0002ac4] kernel_init+0x14/0x130
[ee063f40] [c000f84c] ret_from_kernel_thread+0x5c/0x64
aer: probe of 0001:02:00.0:pcie02 failed with error -16
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
---
drivers/edac/mpc85xx_edac.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index fd46b0b..0dda7c4 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -297,7 +297,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op)
if (edac_op_state == EDAC_OPSTATE_INT) {
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
res = devm_request_irq(&op->dev, pdata->irq,
- mpc85xx_pci_isr, IRQF_DISABLED,
+ mpc85xx_pci_isr, IRQF_SHARED |
+ IRQF_DISABLED,
"[EDAC] PCI err", pci);
if (res < 0) {
printk(KERN_ERR
--
1.7.9.5
^ permalink raw reply related
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