* Re: [GIT PULL] tree-wide: clean up no longer required #include <linux/init.h>
From: Ingo Molnar @ 2014-02-05 6:41 UTC (permalink / raw)
To: Stephen Rothwell
Cc: linux-arch, linux-mips, linux-m68k, rusty, linux-ia64, kvm,
linux-s390, linuxppc-dev, x86, Paul Gortmaker, linux-alpha,
netdev, gregkh, sparclinux, akpm, Linus Torvalds,
linux-arm-kernel
In-Reply-To: <20140205172723.3fa841793b3fa3f3f534937f@canb.auug.org.au>
* Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi Ingo,
>
> On Wed, 5 Feb 2014 07:06:33 +0100 Ingo Molnar <mingo@kernel.org> wrote:
> >
> > So, if you meant Linus to pull it, you probably want to cite a real
> > Git URI along the lines of:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/paulg/init.git
>
> Paul provided the proper git url further down in the mail along with the
> usual pull request message (I guess he should have put that bit at the
> top).
Yeah, indeed, and it even comes with a signed tag, which is an extra
nice touch:
git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux.git tags/init-cleanup
(I guess the https was mentioned first to lower expectations.)
Thanks,
Ingo
^ permalink raw reply
* [V5 01/11] powerpc, perf: Re-arrange BHRB processing
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch cleans up some existing indentation problem and
re-organizes the BHRB processing code with an helper function
named `update_branch_entry` making it more readable. This patch
does not change any functionality.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 102 ++++++++++++++++++++--------------------
1 file changed, 52 insertions(+), 50 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 29b89e8..8a44dc1 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -400,11 +400,21 @@ static __u64 power_pmu_bhrb_to(u64 addr)
return target - (unsigned long)&instr + addr;
}
+/* Update individual branch entry */
+void update_branch_entry(struct cpu_hw_events *cpuhw, int u_index, u64 from, u64 to, int pred)
+{
+ cpuhw->bhrb_entries[u_index].from = from;
+ cpuhw->bhrb_entries[u_index].to = to;
+ cpuhw->bhrb_entries[u_index].mispred = pred;
+ cpuhw->bhrb_entries[u_index].predicted = ~pred;
+ return;
+}
+
/* Processing BHRB entries */
void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
{
u64 val;
- u64 addr;
+ u64 addr, tmp;
int r_index, u_index, pred;
r_index = 0;
@@ -415,62 +425,54 @@ void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
if (!val)
/* Terminal marker: End of valid BHRB entries */
break;
- else {
- addr = val & BHRB_EA;
- pred = val & BHRB_PREDICTION;
- if (!addr)
- /* invalid entry */
- continue;
+ addr = val & BHRB_EA;
+ pred = val & BHRB_PREDICTION;
- /* Branches are read most recent first (ie. mfbhrb 0 is
- * the most recent branch).
- * There are two types of valid entries:
- * 1) a target entry which is the to address of a
- * computed goto like a blr,bctr,btar. The next
- * entry read from the bhrb will be branch
- * corresponding to this target (ie. the actual
- * blr/bctr/btar instruction).
- * 2) a from address which is an actual branch. If a
- * target entry proceeds this, then this is the
- * matching branch for that target. If this is not
- * following a target entry, then this is a branch
- * where the target is given as an immediate field
- * in the instruction (ie. an i or b form branch).
- * In this case we need to read the instruction from
- * memory to determine the target/to address.
+ if (!addr)
+ /* invalid entry */
+ continue;
+
+ /* Branches are read most recent first (ie. mfbhrb 0 is
+ * the most recent branch).
+ * There are two types of valid entries:
+ * 1) a target entry which is the to address of a
+ * computed goto like a blr,bctr,btar. The next
+ * entry read from the bhrb will be branch
+ * corresponding to this target (ie. the actual
+ * blr/bctr/btar instruction).
+ * 2) a from address which is an actual branch. If a
+ * target entry proceeds this, then this is the
+ * matching branch for that target. If this is not
+ * following a target entry, then this is a branch
+ * where the target is given as an immediate field
+ * in the instruction (ie. an i or b form branch).
+ * In this case we need to read the instruction from
+ * memory to determine the target/to address.
+ */
+ if (val & BHRB_TARGET) {
+ /* Target branches use two entries
+ * (ie. computed gotos/XL form)
*/
+ tmp = addr;
+ /* Get from address in next entry */
+ val = read_bhrb(r_index++);
+ addr = val & BHRB_EA;
if (val & BHRB_TARGET) {
- /* Target branches use two entries
- * (ie. computed gotos/XL form)
- */
- cpuhw->bhrb_entries[u_index].to = addr;
- cpuhw->bhrb_entries[u_index].mispred = pred;
- cpuhw->bhrb_entries[u_index].predicted = ~pred;
-
- /* Get from address in next entry */
- val = read_bhrb(r_index++);
- addr = val & BHRB_EA;
- if (val & BHRB_TARGET) {
- /* Shouldn't have two targets in a
- row.. Reset index and try again */
- r_index--;
- addr = 0;
- }
- cpuhw->bhrb_entries[u_index].from = addr;
- } else {
- /* Branches to immediate field
- (ie I or B form) */
- cpuhw->bhrb_entries[u_index].from = addr;
- cpuhw->bhrb_entries[u_index].to =
- power_pmu_bhrb_to(addr);
- cpuhw->bhrb_entries[u_index].mispred = pred;
- cpuhw->bhrb_entries[u_index].predicted = ~pred;
+ /* Shouldn't have two targets in a
+ row.. Reset index and try again */
+ r_index--;
+ addr = 0;
}
- u_index++;
-
+ update_branch_entry(cpuhw, u_index, addr, tmp, pred);
+ } else {
+ /* Branches to immediate field
+ (ie I or B form) */
+ tmp = power_pmu_bhrb_to(addr);
+ update_branch_entry(cpuhw, u_index, addr, tmp, pred);
}
+ u_index++;
}
cpuhw->bhrb_stack.nr = u_index;
return;
--
1.7.11.7
^ permalink raw reply related
* [V5 02/11] perf: Add PERF_SAMPLE_BRANCH_COND
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch introduces new branch filter PERF_SAMPLE_BRANCH_COND which
will extend the existing perf ABI. Various architectures can provide
this functionality with either with HW filtering support (if present)
or with SW filtering of captured branch instructions.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Reviewed-by: Stephane Eranian <eranian@google.com>
---
include/uapi/linux/perf_event.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 853bc1c..696f69b4 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -163,8 +163,9 @@ enum perf_branch_sample_type {
PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7, /* transaction aborts */
PERF_SAMPLE_BRANCH_IN_TX = 1U << 8, /* in transaction */
PERF_SAMPLE_BRANCH_NO_TX = 1U << 9, /* not in transaction */
+ PERF_SAMPLE_BRANCH_COND = 1U << 10, /* conditional branches */
- PERF_SAMPLE_BRANCH_MAX = 1U << 10, /* non-ABI */
+ PERF_SAMPLE_BRANCH_MAX = 1U << 11, /* non-ABI */
};
#define PERF_SAMPLE_BRANCH_PLM_ALL \
--
1.7.11.7
^ permalink raw reply related
* [V5 00/11] perf: New conditional branch filter
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
This patchset is the re-spin of the original branch stack sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND branch filter. This patchset
also enables SW based branch filtering support for book3s powerpc platforms which
have PMU HW backed branch stack sampling support.
Summary of code changes in this patchset:
(1) Introduces a new PERF_SAMPLE_BRANCH_COND branch filter
(2) Add the "cond" branch filter options in the "perf record" tool
(3) Enable PERF_SAMPLE_BRANCH_COND in X86 platforms
(4) Enable PERF_SAMPLE_BRANCH_COND in POWER8 platform
(5) Update the documentation regarding "perf record" tool
(6) Add some new powerpc instruction analysis functions in code-patching library
(7) Enable SW based branch filter support for powerpc book3s
(8) Changed BHRB configuration in POWER8 to accommodate SW branch filters
With this new SW enablement, the branch filter support for book3s platforms have
been extended to include all these combinations discussed below with a sample test
application program (included here).
Changes in V2
=============
(1) Enabled PPC64 SW branch filtering support
(2) Incorporated changes required for all previous comments
Changes in V3
=============
(1) Split the SW branch filter enablement into multiple patches
(2) Added PMU neutral SW branch filtering code, PMU specific HW branch filtering code
(3) Added new instruction analysis functionality into powerpc code-patching library
(4) Changed name for some of the functions
(5) Fixed couple of spelling mistakes
(6) Changed code documentation in multiple places
Changes in V4
=============
(1) Changed the commit message for patch (01/10)
(2) Changed the patch (02/10) to accommodate review comments from Michael Ellerman
(3) Rebased the patchset against latest Linus's tree
Changes in V5
=============
(1) Added a precursor patch to cleanup the indentation problem in power_pmu_bhrb_read
(2) Added a precursor patch to re-arrange P8 PMU BHRB filter config which improved the clarity
(3) Merged the previous 10th patch into the 8th patch
(4) Moved SW based branch analysis code from core perf into code-patching library as suggested by Michael
(5) Simplified the logic in branch analysis library
(6) Fixed some ambiguities in documentation at various places
(7) Added some more in-code documentation blocks at various places
(8) Renamed some local variable and function names
(9) Fixed some indentation and white space errors in the code
(10) Implemented almost all the review comments and suggestions made by Michael Ellerman on V4 patchset
(11) Enabled privilege mode SW branch filter
(12) Simplified and generalized the SW implemented conditional branch filter
(13) PERF_SAMPLE_BRANCH_COND filter is now supported only through SW implementation
(14) Adjusted other patches to deal with the above changes
HW implemented branch filters
=============================
(1) perf record -j any_call -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... ....................... .................... ....................
#
7.85% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
5.66% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_2
5.65% cprog cprog [.] hw_1_1 cprog [.] symbol1
5.42% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_3
5.40% cprog cprog [.] callme cprog [.] hw_1_1
5.40% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
5.40% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_1
5.39% cprog cprog [.] sw_4_2 cprog [.] lr_addr
5.39% cprog cprog [.] callme cprog [.] sw_4_2
5.39% cprog [unknown] [.] 00000000 cprog [.] ctr_addr
5.38% cprog cprog [.] hw_1_2 cprog [.] symbol2
5.38% cprog cprog [.] callme cprog [.] hw_1_2
5.16% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
5.15% cprog cprog [.] callme cprog [.] sw_3_2
5.14% cprog cprog [.] callme cprog [.] hw_2_2
2.96% cprog cprog [.] callme cprog [.] sw_3_1
2.94% cprog cprog [.] callme cprog [.] hw_2_1
2.71% cprog cprog [.] main cprog [.] callme
2.71% cprog [unknown] [.] 00000000 cprog [.] lr_addr
2.70% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
2.70% cprog cprog [.] callme cprog [.] sw_4_1
0.09% cprog [unknown] [.] 0xf7ad76c4 [unknown] [.] 0xf7ac22c0
0.00% cprog libc-2.11.2.so [.] vfprintf libc-2.11.2.so [.] __errno_location
0.00% cprog libc-2.11.2.so [.] printf libc-2.11.2.so [.] vfprintf
0.00% cprog libc-2.11.2.so [.] _IO_file_doallocate libc-2.11.2.so [.] isatty
0.00% cprog libc-2.11.2.so [.] _IO_file_doallocate libc-2.11.2.so [.] mmap
0.00% cprog libc-2.11.2.so [.] isatty libc-2.11.2.so [.] tcgetattr
0.00% cprog cprog [.] main [unknown] [.] 0x10000950
0.00% cprog [unknown] [.] 00000000 libc-2.11.2.so [.] _IO_file_stat
0.00% cprog [unknown] [.] 0xf7acfca4 cprog [.] _fini
0.00% cprog [unknown] [k] 00000000 cprog [k] ctr_addr
0.00% cprog [unknown] [k] 00000000 cprog [k] lr_addr
SW implemented branch filters
=============================
(2) perf record -j cond -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... ...................... .................... ......................
#
25.82% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
12.66% cprog cprog [.] sw_4_2 cprog [.] lr_addr
12.63% cprog [unknown] [.] 00000000 cprog [.] callme
9.42% cprog cprog [.] hw_2_2 cprog [.] address2
9.39% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
4.91% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
4.91% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
3.35% cprog cprog [.] sw_3_1_3 cprog [.] sw_3_1
3.34% cprog cprog [.] sw_3_1_1 cprog [.] sw_3_1
3.31% cprog cprog [.] hw_1_2 cprog [.] symbol2
3.31% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
3.29% cprog cprog [.] hw_2_1 cprog [.] address1
3.27% cprog cprog [.] sw_3_1_2 cprog [.] sw_3_1
0.32% cprog [unknown] [.] 0xf7c62328 [unknown] [.] 0xf7c62320
0.01% cprog libc-2.11.2.so [.] vfprintf libc-2.11.2.so [.] vfprintf
0.01% cprog libc-2.11.2.so [.] _IO_file_xsputn libc-2.11.2.so [.] _IO_file_xsputn
0.01% cprog libc-2.11.2.so [.] _IO_default_xsputn libc-2.11.2.so [.] _IO_default_xsputn
0.01% cprog libc-2.11.2.so [.] strchrnul libc-2.11.2.so [.] strchrnul
0.01% cprog [unknown] [.] 00000000 libc-2.11.2.so [.] _IO_file_xsputn
0.01% cprog [unknown] [k] 00000000 cprog [k] callme
(3) perf record -j any_ret -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... ..................... .................... .....................
#
15.61% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
6.28% cprog cprog [.] symbol2 cprog [.] hw_1_2
6.28% cprog cprog [.] ctr_addr cprog [.] sw_4_1
6.26% cprog cprog [.] success_3_1_3 cprog [.] sw_3_1
6.24% cprog cprog [.] symbol1 cprog [.] hw_1_1
6.24% cprog cprog [.] sw_4_2 cprog [.] callme
6.21% cprog [unknown] [.] 00000000 cprog [.] callme
6.19% cprog cprog [.] lr_addr cprog [.] sw_4_2
3.16% cprog cprog [.] hw_1_2 cprog [.] callme
3.15% cprog cprog [.] success_3_1_1 cprog [.] sw_3_1
3.15% cprog cprog [.] sw_4_1 cprog [.] callme
3.14% cprog cprog [.] callme cprog [.] main
3.13% cprog cprog [.] hw_1_1 cprog [.] callme
3.13% cprog cprog [.] sw_3_1_1 cprog [.] sw_3_1
3.12% cprog cprog [.] back2 cprog [.] callme
3.12% cprog cprog [.] sw_3_1 cprog [.] callme
3.11% cprog cprog [.] back1 cprog [.] callme
3.11% cprog cprog [.] sw_3_1_2 cprog [.] sw_3_1
3.11% cprog cprog [.] sw_3_1_3 cprog [.] sw_3_1
3.10% cprog cprog [.] sw_3_2 cprog [.] callme
3.09% cprog cprog [.] success_3_1_2 cprog [.] sw_3_1
0.03% cprog [unknown] [.] 0x100009b0 [unknown] [.] 0xf7d5581c
0.01% cprog libc-2.11.2.so [.] _IO_file_overflow libc-2.11.2.so [.] _IO_file_xsputn
0.01% cprog libc-2.11.2.so [.] _IO_file_setbuf [unknown] [.] 0x0fee1084
0.01% cprog [unknown] [.] 0xf7d5589c libc-2.11.2.so [.] printf
0.01% cprog [unknown] [.] 00000000 libc-2.11.2.so [.] _IO_file_overflow
0.01% cprog [unknown] [.] 00000000 libc-2.11.2.so [.] _IO_file_setbuf
0.01% cprog [unknown] [k] 00000000 cprog [k] callme
(4) perf record -j ind_call -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... .............. .................... .....................
#
42.59% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
25.88% cprog cprog [.] sw_4_2 cprog [.] lr_addr
25.65% cprog [unknown] [.] 00000000 cprog [.] callme
5.58% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
0.23% cprog [unknown] [k] 00000000 cprog [k] callme
0.05% cprog [unknown] [.] 00000000 [unknown] [.] 0xf79fd740
0.03% cprog [unknown] [.] 00000000 libc-2.11.2.so [.] _IO_file_overflow
(5) perf record -j any_call,any_ret -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... ......................... .................... .....................
#
10.00% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
4.20% cprog cprog [.] sw_4_2 cprog [.] lr_addr
4.17% cprog cprog [.] lr_addr cprog [.] sw_4_2
4.16% cprog cprog [.] symbol1 cprog [.] hw_1_1
4.12% cprog [unknown] [.] 00000000 cprog [.] callme
4.12% cprog cprog [.] symbol2 cprog [.] hw_1_2
4.11% cprog cprog [.] success_3_1_3 cprog [.] sw_3_1
4.11% cprog cprog [.] ctr_addr cprog [.] sw_4_1
4.10% cprog cprog [.] sw_4_2 cprog [.] callme
2.42% cprog cprog [.] callme cprog [.] sw_4_2
2.40% cprog cprog [.] sw_3_1_3 cprog [.] sw_3_1
2.40% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_3
2.39% cprog cprog [.] hw_1_2 cprog [.] symbol2
2.39% cprog cprog [.] back1 cprog [.] callme
2.39% cprog cprog [.] sw_3_1_1 cprog [.] sw_3_1
2.39% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_1
2.39% cprog cprog [.] sw_3_1 cprog [.] callme
2.39% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
2.39% cprog cprog [.] callme cprog [.] hw_1_2
2.39% cprog cprog [.] callme cprog [.] sw_3_1
2.39% cprog cprog [.] sw_3_1_2 cprog [.] sw_3_1
2.39% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_2
2.38% cprog cprog [.] hw_1_1 cprog [.] symbol1
2.38% cprog cprog [.] callme cprog [.] hw_1_1
1.78% cprog cprog [.] back2 cprog [.] callme
1.78% cprog cprog [.] hw_1_1 cprog [.] callme
1.76% cprog cprog [.] success_3_1_2 cprog [.] sw_3_1
1.76% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
1.76% cprog cprog [.] sw_3_2 cprog [.] callme
1.76% cprog cprog [.] callme cprog [.] sw_3_2
1.73% cprog cprog [.] success_3_1_1 cprog [.] sw_3_1
1.73% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
1.73% cprog cprog [.] hw_1_2 cprog [.] callme
1.71% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
1.71% cprog cprog [.] sw_4_1 cprog [.] callme
1.71% cprog cprog [.] callme cprog [.] main
0.05% cprog [unknown] [k] 00000000 cprog [k] callme
0.03% cprog [unknown] [.] 0xf7aa9d4c [unknown] [.] 0xf7aa5f80
0.01% cprog libc-2.11.2.so [.] __errno_location libc-2.11.2.so [.] vfprintf
0.01% cprog libc-2.11.2.so [.] vfprintf libc-2.11.2.so [.] __errno_location
0.01% cprog libc-2.11.2.so [.] _IO_doallocbuf libc-2.11.2.so [.] _IO_file_overflow
0.01% cprog cprog [.] __do_global_dtors_aux [unknown] [.] 0xf7a9fc74
0.01% cprog [unknown] [.] 0xf7a9fca4 cprog [.] _fini
(6) perf record -j any_call,ind_call -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... ...................... .................... ......................
#
17.38% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
7.76% cprog cprog [.] sw_4_2 cprog [.] lr_addr
7.64% cprog [unknown] [.] 00000000 cprog [.] callme
6.00% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_1
6.00% cprog cprog [.] callme cprog [.] sw_3_1
5.98% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
5.97% cprog cprog [.] hw_1_1 cprog [.] symbol1
5.97% cprog cprog [.] hw_1_2 cprog [.] symbol2
5.97% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_3
5.97% cprog cprog [.] callme cprog [.] hw_1_1
5.97% cprog cprog [.] callme cprog [.] hw_1_2
5.96% cprog cprog [.] callme cprog [.] sw_4_2
5.95% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_2
1.83% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
1.82% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
1.82% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
1.82% cprog cprog [.] callme cprog [.] sw_3_2
0.14% cprog [unknown] [k] 00000000 cprog [k] callme
0.01% cprog libc-2.11.2.so [.] vfprintf libc-2.11.2.so [.] strchrnul
0.01% cprog libc-2.11.2.so [.] _IO_file_xsputn libc-2.11.2.so [.] _IO_default_xsputn
0.01% cprog libc-2.11.2.so [.] _IO_default_xsputn libc-2.11.2.so [.] _IO_file_overflow
0.01% cprog ld-2.11.2.so [.] calloc [unknown] [.] 0xf795b390
0.01% cprog [unknown] [.] 0x0fee00fc libc-2.11.2.so [.] _IO_file_overflow
0.01% cprog [unknown] [.] 00000000 ld-2.11.2.so [.] calloc
0.01% cprog [unknown] [.] 0xf794b41c [unknown] [.] 0xf794ab70
(7) perf record -j cond,any_ret -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... ...................... .................... ......................
#
12.43% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
4.91% cprog cprog [.] lr_addr cprog [.] sw_4_2
4.89% cprog [unknown] [.] 00000000 cprog [.] callme
4.87% cprog cprog [.] sw_4_2 cprog [.] lr_addr
4.87% cprog cprog [.] symbol1 cprog [.] hw_1_1
4.19% cprog cprog [.] hw_2_2 cprog [.] address2
4.19% cprog cprog [.] back2 cprog [.] callme
4.19% cprog cprog [.] sw_3_2 cprog [.] callme
4.18% cprog cprog [.] hw_1_1 cprog [.] callme
4.18% cprog cprog [.] success_3_1_2 cprog [.] sw_3_1
4.18% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
4.16% cprog cprog [.] sw_4_2 cprog [.] callme
4.13% cprog cprog [.] ctr_addr cprog [.] sw_4_1
4.12% cprog cprog [.] symbol2 cprog [.] hw_1_2
4.12% cprog cprog [.] success_3_1_3 cprog [.] sw_3_1
3.43% cprog cprog [.] callme cprog [.] main
3.42% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
3.41% cprog cprog [.] success_3_1_1 cprog [.] sw_3_1
3.41% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
3.41% cprog cprog [.] sw_4_1 cprog [.] callme
3.40% cprog cprog [.] hw_1_2 cprog [.] callme
0.73% cprog cprog [.] sw_3_1_3 cprog [.] sw_3_1
0.73% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
0.72% cprog cprog [.] hw_1_2 cprog [.] symbol2
0.72% cprog cprog [.] sw_3_1_1 cprog [.] sw_3_1
0.70% cprog cprog [.] hw_2_1 cprog [.] address1
0.70% cprog cprog [.] back1 cprog [.] callme
0.70% cprog cprog [.] sw_3_1_2 cprog [.] sw_3_1
0.70% cprog cprog [.] sw_3_1 cprog [.] callme
0.19% cprog [unknown] [.] 0xf7c12328 [unknown] [.] 0xf7c12320
0.01% cprog libc-2.11.2.so [.] __errno_location libc-2.11.2.so [.] vfprintf
0.01% cprog libc-2.11.2.so [.] vfprintf libc-2.11.2.so [.] vfprintf
0.01% cprog libc-2.11.2.so [.] _IO_file_overflow [unknown] [.] 0x0fee0100
0.01% cprog libc-2.11.2.so [.] _IO_default_xsputn libc-2.11.2.so [.] _IO_default_xsputn
0.01% cprog [unknown] [.] 00000000 libc-2.11.2.so [.] _IO_file_overflow
(8) perf record -j cond,ind_call -e branch-misses:u ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... .............. .................... .................
#
20.70% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
9.99% cprog cprog [.] sw_4_2 cprog [.] lr_addr
9.91% cprog [unknown] [.] 00000000 cprog [.] callme
9.45% cprog cprog [.] sw_3_1_3 cprog [.] sw_3_1
9.44% cprog cprog [.] hw_2_1 cprog [.] address1
9.43% cprog cprog [.] sw_3_1_1 cprog [.] sw_3_1
9.42% cprog cprog [.] hw_1_2 cprog [.] symbol2
9.42% cprog cprog [.] sw_3_1_2 cprog [.] sw_3_1
9.42% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
0.65% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
0.62% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
0.56% cprog cprog [.] hw_2_2 cprog [.] address2
0.55% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
0.29% cprog [unknown] [.] 0xf7f72328 [unknown] [.] 0xf7f72320
0.10% cprog [unknown] [k] 00000000 cprog [k] callme
0.02% cprog libc-2.11.2.so [.] _IO_setb libc-2.11.2.so [.] _IO_setb
(9) perf record -e branch-misses:u -j any_call,any_ret,ind_call,cond ./cprog
# Overhead Command Source Shared Object Source Symbol Target Shared Object Target Symbol
# ........ ....... .................... .................. .................... .......................
#
9.31% cprog [unknown] [.] 00000000 cprog [.] sw_3_1
4.04% cprog cprog [.] symbol1 cprog [.] hw_1_1
4.03% cprog cprog [.] lr_addr cprog [.] sw_4_2
4.03% cprog cprog [.] sw_4_2 cprog [.] lr_addr
4.00% cprog [unknown] [.] 00000000 cprog [.] callme
3.88% cprog cprog [.] ctr_addr cprog [.] sw_4_1
3.87% cprog cprog [.] sw_4_2 cprog [.] callme
3.86% cprog cprog [.] symbol2 cprog [.] hw_1_2
3.86% cprog cprog [.] success_3_1_3 cprog [.] sw_3_1
2.49% cprog cprog [.] sw_4_1 cprog [.] ctr_addr
2.47% cprog cprog [.] hw_1_1 cprog [.] symbol1
2.47% cprog cprog [.] sw_3_1_1 cprog [.] sw_3_1
2.47% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_1
2.47% cprog cprog [.] callme cprog [.] hw_1_1
2.47% cprog cprog [.] callme cprog [.] sw_3_1
2.47% cprog cprog [.] hw_1_2 cprog [.] symbol2
2.47% cprog cprog [.] hw_2_1 cprog [.] address1
2.47% cprog cprog [.] back1 cprog [.] callme
2.47% cprog cprog [.] sw_3_1_3 cprog [.] sw_3_1
2.47% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_3
2.47% cprog cprog [.] sw_3_1 cprog [.] callme
2.47% cprog cprog [.] callme cprog [.] hw_1_2
2.47% cprog cprog [.] callme cprog [.] sw_4_2
2.46% cprog cprog [.] sw_3_1_2 cprog [.] sw_3_1
2.46% cprog cprog [.] sw_3_1 cprog [.] sw_3_1_2
1.57% cprog cprog [.] success_3_1_2 cprog [.] sw_3_1
1.57% cprog cprog [.] sw_3_1 cprog [.] success_3_1_2
1.57% cprog cprog [.] hw_1_1 cprog [.] callme
1.56% cprog cprog [.] hw_2_2 cprog [.] address2
1.56% cprog cprog [.] back2 cprog [.] callme
1.56% cprog cprog [.] sw_3_2 cprog [.] callme
1.56% cprog cprog [.] callme cprog [.] sw_3_2
1.41% cprog cprog [.] success_3_1_1 cprog [.] sw_3_1
1.41% cprog cprog [.] sw_3_1 cprog [.] success_3_1_1
1.40% cprog cprog [.] sw_4_1 cprog [.] callme
1.39% cprog cprog [.] hw_1_2 cprog [.] callme
1.39% cprog cprog [.] sw_3_1 cprog [.] success_3_1_3
1.39% cprog cprog [.] callme cprog [.] main
0.14% cprog [unknown] [.] 0xf7d72328 [unknown] [.] 0xf7d72320
0.03% cprog [unknown] [k] 00000000 cprog [k] callme
0.01% cprog libc-2.11.2.so [.] _IO_doallocbuf libc-2.11.2.so [.] _IO_doallocbuf
0.01% cprog libc-2.11.2.so [.] printf cprog [.] main
0.01% cprog libc-2.11.2.so [.] _IO_doallocbuf libc-2.11.2.so [.] _IO_file_doallocate
0.01% cprog ld-2.11.2.so [.] malloc [unknown] [.] 0xf7d8b380
0.01% cprog cprog [.] main [unknown] [.] 0x0fe7f63c
0.01% cprog [unknown] [.] 0xf7d8b388 ld-2.11.2.so [.] __libc_memalign
0.01% cprog [unknown] [.] 00000000 ld-2.11.2.so [.] malloc
Please refer to the V4 version of the patchset to learn about the sample test case and it's makefile.
Anshuman Khandual (11):
powerpc, perf: Re-arrange BHRB processing
perf: Add PERF_SAMPLE_BRANCH_COND
powerpc, perf: Re-arrange PMU based branch filter processing in POWER8
perf, tool: Conditional branch filter 'cond' added to perf record
x86, perf: Add conditional branch filtering support
perf, documentation: Description for conditional branch filter
powerpc, perf: Change the name of HW PMU branch filter tracking variable
powerpc, lib: Add new branch analysis support functions
powerpc, perf: Enable SW filtering in branch stack sampling framework
power8, perf: Adapt BHRB PMU configuration to work with SW filters
powerpc, perf: Enable privilege mode SW branch filters
arch/powerpc/include/asm/code-patching.h | 16 ++
arch/powerpc/include/asm/perf_event_server.h | 6 +-
arch/powerpc/lib/code-patching.c | 80 +++++++
arch/powerpc/perf/core-book3s.c | 323 ++++++++++++++++++++++-----
arch/powerpc/perf/power8-pmu.c | 70 ++++--
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 5 +
include/uapi/linux/perf_event.h | 3 +-
tools/perf/Documentation/perf-record.txt | 3 +-
tools/perf/builtin-record.c | 1 +
9 files changed, 429 insertions(+), 78 deletions(-)
--
1.7.11.7
^ permalink raw reply
* [V5 03/11] powerpc, perf: Re-arrange PMU based branch filter processing in POWER8
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch does some code re-arrangements to make it clear that
it ignores any separate privilege level branch filter request
and does not support any combinations of HW PMU branch filters.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/perf/power8-pmu.c | 21 +++++++--------------
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index a3f7abd..8551f85 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -561,8 +561,6 @@ static int power8_generic_events[] = {
static u64 power8_bhrb_filter_map(u64 branch_sample_type)
{
- u64 pmu_bhrb_filter = 0;
-
/* BHRB and regular PMU events share the same privilege state
* filter configuration. BHRB is always recorded along with a
* regular PMU event. As the privilege state filter is handled
@@ -570,20 +568,15 @@ static u64 power8_bhrb_filter_map(u64 branch_sample_type)
* PMU event, we ignore any separate BHRB specific request.
*/
- /* No branch filter requested */
- if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY)
- return pmu_bhrb_filter;
-
- /* Invalid branch filter options - HW does not support */
- if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_RETURN)
- return -1;
+ /* Ignore user, kernel, hv bits */
+ branch_sample_type &= ~PERF_SAMPLE_BRANCH_PLM_ALL;
- if (branch_sample_type & PERF_SAMPLE_BRANCH_IND_CALL)
- return -1;
+ /* No branch filter requested */
+ if (branch_sample_type == PERF_SAMPLE_BRANCH_ANY)
+ return 0;
- if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_CALL) {
- pmu_bhrb_filter |= POWER8_MMCRA_IFM1;
- return pmu_bhrb_filter;
+ if (branch_sample_type == PERF_SAMPLE_BRANCH_ANY_CALL) {
+ return POWER8_MMCRA_IFM1;
}
/* Every thing else is unsupported */
--
1.7.11.7
^ permalink raw reply related
* [V5 04/11] perf, tool: Conditional branch filter 'cond' added to perf record
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Reviewed-by: Stephane Eranian <eranian@google.com>
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index 3c394bf..eb74bcd 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -589,6 +589,7 @@ static const struct branch_mode branch_modes[] = {
BRANCH_OPT("abort_tx", PERF_SAMPLE_BRANCH_ABORT_TX),
BRANCH_OPT("in_tx", PERF_SAMPLE_BRANCH_IN_TX),
BRANCH_OPT("no_tx", PERF_SAMPLE_BRANCH_NO_TX),
+ BRANCH_OPT("cond", PERF_SAMPLE_BRANCH_COND),
BRANCH_END
};
--
1.7.11.7
^ permalink raw reply related
* [V5 05/11] x86, perf: Add conditional branch filtering support
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch adds conditional branch filtering support,
enabling it for PERF_SAMPLE_BRANCH_COND in perf branch
stack sampling framework by utilizing an available
software filter X86_BR_JCC.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Reviewed-by: Stephane Eranian <eranian@google.com>
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index d82d155..9dd2459 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -384,6 +384,9 @@ static void intel_pmu_setup_sw_lbr_filter(struct perf_event *event)
if (br_type & PERF_SAMPLE_BRANCH_NO_TX)
mask |= X86_BR_NO_TX;
+ if (br_type & PERF_SAMPLE_BRANCH_COND)
+ mask |= X86_BR_JCC;
+
/*
* stash actual user request into reg, it may
* be used by fixup code for some CPU
@@ -678,6 +681,7 @@ static const int nhm_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
* NHM/WSM erratum: must include IND_JMP to capture IND_CALL
*/
[PERF_SAMPLE_BRANCH_IND_CALL] = LBR_IND_CALL | LBR_IND_JMP,
+ [PERF_SAMPLE_BRANCH_COND] = LBR_JCC,
};
static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
@@ -689,6 +693,7 @@ static const int snb_lbr_sel_map[PERF_SAMPLE_BRANCH_MAX] = {
[PERF_SAMPLE_BRANCH_ANY_CALL] = LBR_REL_CALL | LBR_IND_CALL
| LBR_FAR,
[PERF_SAMPLE_BRANCH_IND_CALL] = LBR_IND_CALL,
+ [PERF_SAMPLE_BRANCH_COND] = LBR_JCC,
};
/* core */
--
1.7.11.7
^ permalink raw reply related
* [V5 06/11] perf, documentation: Description for conditional branch filter
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Reviewed-by: Stephane Eranian <eranian@google.com>
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt
index c71b0f3..d460049 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -184,9 +184,10 @@ following filters are defined:
- in_tx: only when the target is in a hardware transaction
- no_tx: only when the target is not in a hardware transaction
- abort_tx: only when the target is a hardware transaction abort
+ - cond: conditional branches
+
-The option requires at least one branch type among any, any_call, any_ret, ind_call.
+The option requires at least one branch type among any, any_call, any_ret, ind_call, cond.
The privilege levels may be omitted, in which case, the privilege levels of the associated
event are applied to the branch filter. Both kernel (k) and hypervisor (hv) privilege
levels are subject to permissions. When sampling on multiple events, branch stack sampling
--
1.7.11.7
^ permalink raw reply related
* [V5 07/11] powerpc, perf: Change the name of HW PMU branch filter tracking variable
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch simply changes the name of the variable from 'bhrb_filter' to
'bhrb_hw_filter' in order to add one more variable which will track SW
filters in generic powerpc book3s code which will be implemented in the
subsequent patch. This patch does not change any functionality.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 8a44dc1..468f58c 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -47,7 +47,7 @@ struct cpu_hw_events {
int n_txn_start;
/* BHRB bits */
- u64 bhrb_filter; /* BHRB HW branch filter */
+ u64 bhrb_hw_filter; /* BHRB HW branch filter */
int bhrb_users;
void *bhrb_context;
struct perf_branch_stack bhrb_stack;
@@ -1161,7 +1161,7 @@ static void power_pmu_enable(struct pmu *pmu)
out:
if (cpuhw->bhrb_users)
- ppmu->config_bhrb(cpuhw->bhrb_filter);
+ ppmu->config_bhrb(cpuhw->bhrb_hw_filter);
local_irq_restore(flags);
}
@@ -1256,7 +1256,7 @@ nocheck:
out:
if (has_branch_stack(event)) {
power_pmu_bhrb_enable(event);
- cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
+ cpuhw->bhrb_hw_filter = ppmu->bhrb_filter_map(
event->attr.branch_sample_type);
}
@@ -1639,10 +1639,10 @@ static int power_pmu_event_init(struct perf_event *event)
err = power_check_constraints(cpuhw, events, cflags, n + 1);
if (has_branch_stack(event)) {
- cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
+ cpuhw->bhrb_hw_filter = ppmu->bhrb_filter_map(
event->attr.branch_sample_type);
- if(cpuhw->bhrb_filter == -1)
+ if(cpuhw->bhrb_hw_filter == -1)
return -EOPNOTSUPP;
}
--
1.7.11.7
^ permalink raw reply related
* [V5 08/11] powerpc, lib: Add new branch analysis support functions
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
Generic powerpc branch analysis support added in the code patching
library which will help the subsequent patch on SW based filtering
of branch records in perf.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/code-patching.h | 16 +++++++
arch/powerpc/lib/code-patching.c | 80 ++++++++++++++++++++++++++++++++
2 files changed, 96 insertions(+)
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 97e02f9..39919d4 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -22,6 +22,16 @@
#define BRANCH_SET_LINK 0x1
#define BRANCH_ABSOLUTE 0x2
+#define XL_FORM_LR 0x4C000020
+#define XL_FORM_CTR 0x4C000420
+#define XL_FORM_TAR 0x4C000460
+
+#define BO_ALWAYS 0x02800000
+#define BO_CTR 0x02000000
+#define BO_CRBI_OFF 0x00800000
+#define BO_CRBI_ON 0x01800000
+#define BO_CRBI_HINT 0x00400000
+
unsigned int create_branch(const unsigned int *addr,
unsigned long target, int flags);
unsigned int create_cond_branch(const unsigned int *addr,
@@ -56,4 +66,10 @@ static inline unsigned long ppc_function_entry(void *func)
#endif
}
+/* Perf branch filters */
+bool instr_is_return_branch(unsigned int instr);
+bool instr_is_conditional_branch(unsigned int instr);
+bool instr_is_func_call(unsigned int instr);
+bool instr_is_indirect_func_call(unsigned int instr);
+
#endif /* _ASM_POWERPC_CODE_PATCHING_H */
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index d5edbeb..a06f8b3 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -77,6 +77,7 @@ static unsigned int branch_opcode(unsigned int instr)
return (instr >> 26) & 0x3F;
}
+/* Forms of branch instruction */
static int instr_is_branch_iform(unsigned int instr)
{
return branch_opcode(instr) == 18;
@@ -87,6 +88,85 @@ static int instr_is_branch_bform(unsigned int instr)
return branch_opcode(instr) == 16;
}
+static int instr_is_branch_xlform(unsigned int instr)
+{
+ return branch_opcode(instr) == 19;
+}
+
+/* Classification of XL-form instruction */
+static int is_xlform_lr(unsigned int instr)
+{
+ return (instr & XL_FORM_LR) == XL_FORM_LR;
+}
+
+/* BO field analysis (B-form or XL-form) */
+static int is_bo_always(unsigned int instr)
+{
+ return (instr & BO_ALWAYS) == BO_ALWAYS;
+}
+
+/* Link bit is set */
+static int is_branch_link_set(unsigned int instr)
+{
+ return (instr & BRANCH_SET_LINK) == BRANCH_SET_LINK;
+}
+
+/*
+ * Generic software implemented branch filters used
+ * by perf branch stack sampling when PMU does not
+ * process them for some reason.
+ */
+
+/* PERF_SAMPLE_BRANCH_ANY_RETURN */
+bool instr_is_return_branch(unsigned int instr)
+{
+ /*
+ * Conditional and unconditional branch to LR register
+ * without seting the link register.
+ */
+ if (is_xlform_lr(instr) && !is_branch_link_set(instr))
+ return true;
+
+ return false;
+}
+
+/* PERF_SAMPLE_BRANCH_COND */
+bool instr_is_conditional_branch(unsigned int instr)
+{
+ /* I-form instruction - excluded */
+ if (instr_is_branch_iform(instr))
+ return false;
+
+ /* B-form or XL-form instruction */
+ if (instr_is_branch_bform(instr) || instr_is_branch_xlform(instr)) {
+
+ /* Not branch always */
+ if (!is_bo_always(instr))
+ return true;
+ }
+ return false;
+}
+
+/* PERF_SAMPLE_BRANCH_ANY_CALL */
+bool instr_is_func_call(unsigned int instr)
+{
+ /* LR should be set */
+ if (is_branch_link_set(instr))
+ return true;
+
+ return false;
+}
+
+/* PERF_SAMPLE_BRANCH_IND_CALL */
+bool instr_is_indirect_func_call(unsigned int instr)
+{
+ /* XL-form instruction with LR set */
+ if (instr_is_branch_xlform(instr) && is_branch_link_set(instr))
+ return true;
+
+ return false;
+}
+
int instr_is_relative_branch(unsigned int instr)
{
if (instr & BRANCH_ABSOLUTE)
--
1.7.11.7
^ permalink raw reply related
* [V5 09/11] powerpc, perf: Enable SW filtering in branch stack sampling framework
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch enables SW based post processing of BHRB captured branches
to be able to meet more user defined branch filtration criteria in perf
branch stack sampling framework. These changes increase the number of
branch filters and their valid combinations on any powerpc64 server
platform with BHRB support. Find the summary of code changes here.
(1) struct cpu_hw_events
Introduced two new variables track various filter values and mask
(a) bhrb_sw_filter Tracks SW implemented branch filter flags
(b) bhrb_filter Tracks both (SW and HW) branch filter flags
(2) Event creation
Kernel will figure out supported BHRB branch filters through a PMU call
back 'bhrb_filter_map'. This function will find out how many of the
requested branch filters can be supported in the PMU HW. It will not
try to invalidate any branch filter combinations. Event creation will not
error out because of lack of HW based branch filters. Meanwhile it will
track the overall supported branch filters in the 'bhrb_filter' variable.
Once the PMU call back returns kernel will process the user branch filter
request against available SW filters (bhrb_sw_filter_map) while looking
at the 'bhrb_filter'. During this phase all the branch filters which are
still pending from the user requested list will have to be supported in
SW failing which the event creation will error out.
(3) SW branch filter
During the BHRB data capture inside the PMU interrupt context, each
of the captured 'perf_branch_entry.from' will be checked for compliance
with applicable SW branch filters. If the entry does not conform to the
filter requirements, it will be discarded from the final perf branch
stack buffer.
(4) Supported SW based branch filters
(a) PERF_SAMPLE_BRANCH_ANY_RETURN
(b) PERF_SAMPLE_BRANCH_IND_CALL
(c) PERF_SAMPLE_BRANCH_ANY_CALL
(d) PERF_SAMPLE_BRANCH_COND
Please refer the patch to understand the classification of instructions
into these branch filter categories.
(5) Multiple branch filter semantics
Book3 sever implementation follows the same OR semantics (as implemented in
x86) while dealing with multiple branch filters at any point of time. SW
branch filter analysis is carried on the data set captured in the PMU HW.
So the resulting set of data (after applying the SW filters) will inherently
be an AND with the HW captured set. Hence any combination of HW and SW branch
filters will be invalid. HW based branch filters are more efficient and faster
compared to SW implemented branch filters. So at first the PMU should decide
whether it can support all the requested branch filters itself or not. In case
it can support all the branch filters in an OR manner, we dont apply any SW
branch filter on top of the HW captured set (which is the final set). This
preserves the OR semantic of multiple branch filters as required. But in case
where the PMU cannot support all the requested branch filters in an OR manner,
it should not apply any it's filters and leave it upto the SW to handle them
all. Its the PMU code's responsibility to uphold this protocol to be able to
conform to the overall OR semantic of perf branch stack sampling framework.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/perf_event_server.h | 6 +-
arch/powerpc/perf/core-book3s.c | 188 ++++++++++++++++++++++++++-
arch/powerpc/perf/power8-pmu.c | 2 +-
3 files changed, 187 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 3fd2f1b..f791bab 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -18,6 +18,10 @@
#define MAX_EVENT_ALTERNATIVES 8
#define MAX_LIMITED_HWCOUNTERS 2
+#define for_each_branch_sample_type(x) \
+ for ((x) = PERF_SAMPLE_BRANCH_USER; \
+ (x) < PERF_SAMPLE_BRANCH_MAX; (x) <<= 1)
+
/*
* This struct provides the constants and functions needed to
* describe the PMU on a particular POWER-family CPU.
@@ -34,7 +38,7 @@ struct power_pmu {
unsigned long *valp);
int (*get_alternatives)(u64 event_id, unsigned int flags,
u64 alt[]);
- u64 (*bhrb_filter_map)(u64 branch_sample_type);
+ u64 (*bhrb_filter_map)(u64 branch_sample_type, u64 *bhrb_filter);
void (*config_bhrb)(u64 pmu_bhrb_filter);
void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
int (*limited_pmc_event)(u64 event_id);
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 468f58c..05b7546 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -46,8 +46,9 @@ struct cpu_hw_events {
unsigned int group_flag;
int n_txn_start;
- /* BHRB bits */
u64 bhrb_hw_filter; /* BHRB HW branch filter */
+ u64 bhrb_sw_filter; /* BHRB SW branch filter */
+ u64 bhrb_filter; /* Branch filter mask */
int bhrb_users;
void *bhrb_context;
struct perf_branch_stack bhrb_stack;
@@ -410,6 +411,152 @@ void update_branch_entry(struct cpu_hw_events *cpuhw, int u_index, u64 from, u64
return;
}
+/*
+ * Instruction opcode analysis
+ *
+ * Analyse instruction opcodes and classify them
+ * into various branch filter options available.
+ * This follows the standard semantics of OR which
+ * means that instructions which conforms to `any`
+ * of the requested branch filters get picked up.
+ */
+static bool check_instruction(unsigned int *addr, u64 sw_filter)
+{
+ if (sw_filter & PERF_SAMPLE_BRANCH_ANY_RETURN) {
+ if (instr_is_return_branch(*addr))
+ return true;
+ }
+
+ if (sw_filter & PERF_SAMPLE_BRANCH_IND_CALL) {
+ if (instr_is_indirect_func_call(*addr))
+ return true;
+ }
+
+ if (sw_filter & PERF_SAMPLE_BRANCH_ANY_CALL) {
+ if (instr_is_func_call(*addr))
+ return true;
+ }
+
+ if (sw_filter & PERF_SAMPLE_BRANCH_COND) {
+ if (instr_is_conditional_branch(*addr))
+ return true;
+ }
+ return false;
+}
+
+/*
+ * Access the instruction contained in the address and check
+ * whether it complies with the applicable SW branch filters.
+ */
+static bool keep_branch(u64 from, u64 sw_filter)
+{
+ unsigned int instr;
+ bool ret;
+
+ /*
+ * The "from" branch for every branch record has to go
+ * through this filter verification. So this quick check
+ * here for no SW filters will improve performance.
+ */
+ if (sw_filter == 0)
+ return true;
+
+ if (is_kernel_addr(from)) {
+ return check_instruction((unsigned int *) from, sw_filter);
+ } else {
+ /*
+ * Userspace address needs to be
+ * copied first before analysis.
+ */
+ pagefault_disable();
+ ret = __get_user_inatomic(instr, (unsigned int __user *) from);
+
+ /*
+ * If the instruction could not be accessible
+ * from user space, we still 'okay' the entry.
+ */
+ if (ret) {
+ pagefault_enable();
+ return true;
+ }
+ pagefault_enable();
+ return check_instruction(&instr, sw_filter);
+ }
+}
+
+/*
+ * Validate whether all the requested branch filters
+ * are getting processed either in the PMU or in SW.
+ */
+static int all_filters_covered(u64 branch_sample_type, u64 bhrb_filter)
+{
+ u64 x;
+
+ if (bhrb_filter == PERF_SAMPLE_BRANCH_ANY)
+ return true;
+
+ for_each_branch_sample_type(x) {
+ if (!(branch_sample_type & x))
+ continue;
+ /*
+ * Privilege filter requests have been already
+ * taken care during the base PMU configuration.
+ */
+ if ((x == PERF_SAMPLE_BRANCH_USER)
+ || (x == PERF_SAMPLE_BRANCH_KERNEL)
+ || (x == PERF_SAMPLE_BRANCH_HV))
+ continue;
+
+ /*
+ * Requested filter not available either
+ * in PMU or in SW.
+ */
+ if (!(bhrb_filter & x))
+ return false;
+ }
+ return true;
+}
+
+/* SW implemented branch filters */
+static unsigned int power_sw_filter[] = { PERF_SAMPLE_BRANCH_ANY_CALL,
+ PERF_SAMPLE_BRANCH_COND,
+ PERF_SAMPLE_BRANCH_ANY_RETURN,
+ PERF_SAMPLE_BRANCH_IND_CALL };
+
+/*
+ * Required SW based branch filters
+ *
+ * This is called after figuring out what all branch filters the
+ * PMU HW supports for the requested branch filter set. Here we
+ * will go through all the SW implemented branch filters one by
+ * one and pick them up if its not already supported in the PMU.
+ */
+static u64 bhrb_sw_filter_map(u64 branch_sample_type, u64 *bhrb_filter)
+{
+ u64 branch_sw_filter = 0;
+ unsigned int i;
+
+ if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY) {
+ WARN_ON(*bhrb_filter != PERF_SAMPLE_BRANCH_ANY);
+ return branch_sw_filter;
+ }
+
+ /*
+ * PMU supported branch filters must be implemented in SW
+ * when the PMU is unable to process them for some reason.
+ */
+ for (i = 0; i < ARRAY_SIZE(power_sw_filter); i++) {
+ if (branch_sample_type & power_sw_filter[i]) {
+ if (!(*bhrb_filter & power_sw_filter[i])) {
+ branch_sw_filter |= power_sw_filter[i];
+ *bhrb_filter |= power_sw_filter[i];
+ }
+ }
+ }
+
+ return branch_sw_filter;
+}
+
/* Processing BHRB entries */
void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
{
@@ -472,6 +619,11 @@ void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
tmp = power_pmu_bhrb_to(addr);
update_branch_entry(cpuhw, u_index, addr, tmp, pred);
}
+
+ /* Apply SW branch filters and drop the entry if required */
+ if (!keep_branch(cpuhw->bhrb_entries[u_index].from,
+ cpuhw->bhrb_sw_filter))
+ u_index--;
u_index++;
}
cpuhw->bhrb_stack.nr = u_index;
@@ -1160,6 +1312,8 @@ static void power_pmu_enable(struct pmu *pmu)
}
out:
+
+ /* Enable PMU based branch filters */
if (cpuhw->bhrb_users)
ppmu->config_bhrb(cpuhw->bhrb_hw_filter);
@@ -1256,8 +1410,12 @@ nocheck:
out:
if (has_branch_stack(event)) {
power_pmu_bhrb_enable(event);
- cpuhw->bhrb_hw_filter = ppmu->bhrb_filter_map(
- event->attr.branch_sample_type);
+ cpuhw->bhrb_hw_filter = ppmu->bhrb_filter_map
+ (event->attr.branch_sample_type,
+ &cpuhw->bhrb_filter);
+ cpuhw->bhrb_sw_filter = bhrb_sw_filter_map
+ (event->attr.branch_sample_type,
+ &cpuhw->bhrb_filter);
}
perf_pmu_enable(event->pmu);
@@ -1638,11 +1796,27 @@ static int power_pmu_event_init(struct perf_event *event)
cpuhw = &get_cpu_var(cpu_hw_events);
err = power_check_constraints(cpuhw, events, cflags, n + 1);
+ /*
+ * BHRB branch filters implemented in PMU will take
+ * effect when we enable the event and data set
+ * collected thereafter will be compliant with those
+ * branch filters. Where as the SW branch filters will
+ * be applied during the post processing of BHRB data.
+ */
if (has_branch_stack(event)) {
- cpuhw->bhrb_hw_filter = ppmu->bhrb_filter_map(
- event->attr.branch_sample_type);
-
- if(cpuhw->bhrb_hw_filter == -1)
+ /* Query available PMU branch filter support */
+ cpuhw->bhrb_hw_filter = ppmu->bhrb_filter_map
+ (event->attr.branch_sample_type,
+ &cpuhw->bhrb_filter);
+
+ /* Query available SW branch filter support */
+ cpuhw->bhrb_sw_filter = bhrb_sw_filter_map
+ (event->attr.branch_sample_type,
+ &cpuhw->bhrb_filter);
+
+ /* Check overall coverage of branch filter request */
+ if(!all_filters_covered(event->attr.branch_sample_type,
+ cpuhw->bhrb_filter))
return -EOPNOTSUPP;
}
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 8551f85..ced0d90 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -559,7 +559,7 @@ static int power8_generic_events[] = {
[PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL,
};
-static u64 power8_bhrb_filter_map(u64 branch_sample_type)
+static u64 power8_bhrb_filter_map(u64 branch_sample_type, u64 *bhrb_filter)
{
/* BHRB and regular PMU events share the same privilege state
* filter configuration. BHRB is always recorded along with a
--
1.7.11.7
^ permalink raw reply related
* [V5 10/11] power8, perf: Adapt BHRB PMU configuration to work with SW filters
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
Powerpc kernel now supports SW based branch filters for book3s systems with some
specifc requirements while dealing with HW supported branch filters in order to
achieve overall OR semantics prevailing in perf branch stack sampling framework.
This patch adapts the BHRB branch filter configuration to meet those protocols.
POWER8 PMU can only handle one HW based branch filter request at any point of time.
For all other combinations PMU will pass it on to the SW.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/perf/power8-pmu.c | 50 ++++++++++++++++++++++++++++++++++++------
1 file changed, 43 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index ced0d90..e5e4529 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -561,6 +561,16 @@ static int power8_generic_events[] = {
static u64 power8_bhrb_filter_map(u64 branch_sample_type, u64 *bhrb_filter)
{
+ u64 x, pmu_bhrb_filter;
+ pmu_bhrb_filter = 0;
+ *bhrb_filter = 0;
+
+ /* No branch filter requested */
+ if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY) {
+ *bhrb_filter = PERF_SAMPLE_BRANCH_ANY;
+ return pmu_bhrb_filter;
+ }
+
/* BHRB and regular PMU events share the same privilege state
* filter configuration. BHRB is always recorded along with a
* regular PMU event. As the privilege state filter is handled
@@ -571,16 +581,42 @@ static u64 power8_bhrb_filter_map(u64 branch_sample_type, u64 *bhrb_filter)
/* Ignore user, kernel, hv bits */
branch_sample_type &= ~PERF_SAMPLE_BRANCH_PLM_ALL;
- /* No branch filter requested */
- if (branch_sample_type == PERF_SAMPLE_BRANCH_ANY)
- return 0;
+ /*
+ * P8 does not support oring of PMU HW branch filters. Hence
+ * if multiple branch filters are requested which includes filters
+ * supported in PMU, still go ahead and clear the PMU based HW branch
+ * filter component as in this case all the filters will be processed
+ * in SW.
+ */
- if (branch_sample_type == PERF_SAMPLE_BRANCH_ANY_CALL) {
- return POWER8_MMCRA_IFM1;
+ for_each_branch_sample_type(x) {
+ /* Ignore privilege branch filters */
+ if ((x == PERF_SAMPLE_BRANCH_USER)
+ || (x == PERF_SAMPLE_BRANCH_KERNEL)
+ || (x == PERF_SAMPLE_BRANCH_HV))
+ continue;
+
+ if (!(branch_sample_type & x))
+ continue;
+
+ /* Supported individual PMU branch filters */
+ if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY_CALL) {
+ branch_sample_type &= ~PERF_SAMPLE_BRANCH_ANY_CALL;
+ if (branch_sample_type) {
+ /* Multiple branch filters will be processed in SW */
+ pmu_bhrb_filter = 0;
+ *bhrb_filter = 0;
+ return pmu_bhrb_filter;
+ } else {
+ /* Individual branch filter will be processed in PMU */
+ pmu_bhrb_filter |= POWER8_MMCRA_IFM1;
+ *bhrb_filter |= PERF_SAMPLE_BRANCH_ANY_CALL;
+ return pmu_bhrb_filter;
+ }
+ }
}
- /* Every thing else is unsupported */
- return -1;
+ return pmu_bhrb_filter;
}
static void power8_config_bhrb(u64 pmu_bhrb_filter)
--
1.7.11.7
^ permalink raw reply related
* [V5 11/11] powerpc, perf: Enable privilege mode SW branch filters
From: Anshuman Khandual @ 2014-02-05 8:06 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: mikey, ak, eranian, michael, acme, sukadev, mingo
In-Reply-To: <1391587582-32028-1-git-send-email-khandual@linux.vnet.ibm.com>
This patch enables privilege mode SW branch filters. Also modifies
POWER8 PMU branch filter configuration so that the privilege mode
branch filter implemented as part of base PMU event configuration
is reflected in bhrb filter mask. As a result, the SW will skip and
not try to process the privilege mode branch filters itself.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 53 +++++++++++++++++++++++++++++++----------
arch/powerpc/perf/power8-pmu.c | 13 ++++++++--
2 files changed, 52 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 05b7546..54a9fa1 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -26,6 +26,9 @@
#define BHRB_PREDICTION 0x0000000000000001
#define BHRB_EA 0xFFFFFFFFFFFFFFFCUL
+#define POWER_ADDR_USER 0
+#define POWER_ADDR_KERNEL 1
+
struct cpu_hw_events {
int n_events;
int n_percpu;
@@ -448,10 +451,10 @@ static bool check_instruction(unsigned int *addr, u64 sw_filter)
* Access the instruction contained in the address and check
* whether it complies with the applicable SW branch filters.
*/
-static bool keep_branch(u64 from, u64 sw_filter)
+static bool keep_branch(u64 from, u64 to, u64 sw_filter)
{
unsigned int instr;
- bool ret;
+ bool to_plm, ret, flag;
/*
* The "from" branch for every branch record has to go
@@ -461,6 +464,37 @@ static bool keep_branch(u64 from, u64 sw_filter)
if (sw_filter == 0)
return true;
+ to_plm = is_kernel_addr(to) ? POWER_ADDR_KERNEL : POWER_ADDR_USER;
+
+ /*
+ * Applying privilege mode SW branch filters first on the
+ * 'to' address makes an AND semantic with the SW generic
+ * branch filters (OR with each other) being applied on the
+ * from address there after.
+ */
+
+ /* Ignore PERF_SAMPLE_BRANCH_HV */
+ sw_filter &= ~PERF_SAMPLE_BRANCH_HV;
+
+ /* Privilege mode branch filters for "TO" address */
+ if (sw_filter & PERF_SAMPLE_BRANCH_PLM_ALL) {
+ flag = false;
+
+ if (sw_filter & PERF_SAMPLE_BRANCH_USER) {
+ if(to_plm == POWER_ADDR_USER)
+ flag = true;
+ }
+
+ if (sw_filter & PERF_SAMPLE_BRANCH_KERNEL) {
+ if(to_plm == POWER_ADDR_KERNEL)
+ flag = true;
+ }
+
+ if (!flag)
+ return false;
+ }
+
+ /* Generic branch filters for "FROM" address */
if (is_kernel_addr(from)) {
return check_instruction((unsigned int *) from, sw_filter);
} else {
@@ -499,15 +533,6 @@ static int all_filters_covered(u64 branch_sample_type, u64 bhrb_filter)
if (!(branch_sample_type & x))
continue;
/*
- * Privilege filter requests have been already
- * taken care during the base PMU configuration.
- */
- if ((x == PERF_SAMPLE_BRANCH_USER)
- || (x == PERF_SAMPLE_BRANCH_KERNEL)
- || (x == PERF_SAMPLE_BRANCH_HV))
- continue;
-
- /*
* Requested filter not available either
* in PMU or in SW.
*/
@@ -518,7 +543,10 @@ static int all_filters_covered(u64 branch_sample_type, u64 bhrb_filter)
}
/* SW implemented branch filters */
-static unsigned int power_sw_filter[] = { PERF_SAMPLE_BRANCH_ANY_CALL,
+static unsigned int power_sw_filter[] = { PERF_SAMPLE_BRANCH_USER,
+ PERF_SAMPLE_BRANCH_KERNEL,
+ PERF_SAMPLE_BRANCH_HV,
+ PERF_SAMPLE_BRANCH_ANY_CALL,
PERF_SAMPLE_BRANCH_COND,
PERF_SAMPLE_BRANCH_ANY_RETURN,
PERF_SAMPLE_BRANCH_IND_CALL };
@@ -622,6 +650,7 @@ void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
/* Apply SW branch filters and drop the entry if required */
if (!keep_branch(cpuhw->bhrb_entries[u_index].from,
+ cpuhw->bhrb_entries[u_index].to,
cpuhw->bhrb_sw_filter))
u_index--;
u_index++;
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index e5e4529..e084937 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -575,9 +575,19 @@ static u64 power8_bhrb_filter_map(u64 branch_sample_type, u64 *bhrb_filter)
* filter configuration. BHRB is always recorded along with a
* regular PMU event. As the privilege state filter is handled
* in the basic PMC configuration of the accompanying regular
- * PMU event, we ignore any separate BHRB specific request.
+ * PMU event, we ignore any separate BHRB specific request. But
+ * this needs to be communicated with the branch filter mask.
*/
+ if (branch_sample_type & PERF_SAMPLE_BRANCH_USER)
+ *bhrb_filter |= PERF_SAMPLE_BRANCH_USER;
+
+ if (branch_sample_type & PERF_SAMPLE_BRANCH_KERNEL)
+ *bhrb_filter |= PERF_SAMPLE_BRANCH_KERNEL;
+
+ if (branch_sample_type & PERF_SAMPLE_BRANCH_HV)
+ *bhrb_filter |= PERF_SAMPLE_BRANCH_HV;
+
/* Ignore user, kernel, hv bits */
branch_sample_type &= ~PERF_SAMPLE_BRANCH_PLM_ALL;
@@ -605,7 +615,6 @@ static u64 power8_bhrb_filter_map(u64 branch_sample_type, u64 *bhrb_filter)
if (branch_sample_type) {
/* Multiple branch filters will be processed in SW */
pmu_bhrb_filter = 0;
- *bhrb_filter = 0;
return pmu_bhrb_filter;
} else {
/* Individual branch filter will be processed in PMU */
--
1.7.11.7
^ permalink raw reply related
* Re: [PATCH V2] power7, perf: Make some new raw event codes available in sysfs
From: Anshuman Khandual @ 2014-02-05 8:51 UTC (permalink / raw)
To: Linux PPC dev; +Cc: Michael Ellerman
In-Reply-To: <52C4F303.80007@linux.vnet.ibm.com>
On 01/02/2014 10:32 AM, Anshuman Khandual wrote:
> This patchset adds some missing event list for POWER7 PMU raw
> events which are exported through sysfs interface. Also updates
> the ABI documentation to add all the sysfs exported raw events.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> ---
> .../testing/sysfs-bus-event_source-devices-events | 517 +++++++++++++++++++++
> arch/powerpc/perf/power7-events-list.h | 10 +
> 2 files changed, 527 insertions(+)
Hey Michael,
Any updates on this patch ? This does not seem to be merged yet.
Regards
Anshuman
^ permalink raw reply
* Re: [RFC PATCH 01/10] KVM: PPC: BOOK3S: PR: Fix PURR and SPURR emulation
From: Alexander Graf @ 2014-02-05 9:15 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Aneesh Kumar K.V, kvm-ppc, kvm-devel
In-Reply-To: <20140131221743.GA12086@iris.ozlabs.ibm.com>
On 31.01.2014, at 23:17, Paul Mackerras <paulus@samba.org> wrote:
> On Fri, Jan 31, 2014 at 11:47:44AM +0100, Alexander Graf wrote:
>>=20
>> On 31.01.2014, at 11:38, Aneesh Kumar K.V =
<aneesh.kumar@linux.vnet.ibm.com> wrote:
>>=20
>>> Alexander Graf <agraf@suse.de> writes:
>>>=20
>>>> On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
>>>>> We definitely don't need to emulate mtspr, because both the =
registers
>>>>> are hypervisor resource.
>>>>=20
>>>> This patch description doesn't cover what the patch actually does. =
It=20
>>>> changes the implementation from "always tell the guest it uses =
100%" to=20
>>>> "give the guest an accurate amount of cpu time spent inside guest
>>>> context".
>>>=20
>>> Will fix that
>>>=20
>>>>=20
>>>> Also, I think we either go with full hyp semantics which means we =
also=20
>>>> emulate the offset or we go with no hyp awareness in the guest at =
all=20
>>>> which means we also don't emulate SPURR which is a hyp privileged
>>>> register.
>>>=20
>>> Can you clarify this ?
>>=20
>> In the 2.06 ISA SPURR is hypervisor privileged. That changed for 2.07 =
where it became supervisor privileged. So I suppose your patch is ok. =
When reviewing those patches I only had 2.06 around because power.org =
was broken.
>=20
> It's always been supervisor privilege for reading and hypervisor
> privilege for writing, ever since it was introduced in 2.05, and that
> hasn't changed. So I think what Aneesh is doing is correct.
This is what ISA 2.06B says:
308 SPURR hypv hypv 64 S
309 PURR hypv yes 64 S
And this is ISA 2.07:
308 SPURR hypv yes 64 S
309 PURR hypv yes 64 S
So as you can see, from 2.06 to 2.07 SPURR became supervisor readable. =
Either the spec is wrong, the respective POWER CPUs don't implement the =
spec correctly or "hypv" doesn't mean "hypv" but means "may be hypv or =
yes".
I think in the context of this patch it's perfectly reasonable to treat =
SPURR as supervisor readable.
Alex
^ permalink raw reply
* Re: [GIT PULL] tree-wide: clean up no longer required #include <linux/init.h>
From: Paul Gortmaker @ 2014-02-05 14:28 UTC (permalink / raw)
To: Ingo Molnar
Cc: linux-arch, Stephen Rothwell, linux-m68k, rusty, linux-ia64, kvm,
linux-mips, linuxppc-dev, x86, linux-alpha, netdev, gregkh,
sparclinux, akpm, Linus Torvalds, linux-arm-kernel, linux-s390
In-Reply-To: <20140205064150.GA31568@gmail.com>
[Re: [GIT PULL] tree-wide: clean up no longer required #include <linux/init.h>] On 05/02/2014 (Wed 07:41) Ingo Molnar wrote:
>
> * Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> > Hi Ingo,
> >
> > On Wed, 5 Feb 2014 07:06:33 +0100 Ingo Molnar <mingo@kernel.org> wrote:
> > >
> > > So, if you meant Linus to pull it, you probably want to cite a real
> > > Git URI along the lines of:
> > >
> > > git://git.kernel.org/pub/scm/linux/kernel/git/paulg/init.git
> >
> > Paul provided the proper git url further down in the mail along with the
> > usual pull request message (I guess he should have put that bit at the
> > top).
>
> Yeah, indeed, and it even comes with a signed tag, which is an extra
> nice touch:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux.git tags/init-cleanup
>
> (I guess the https was mentioned first to lower expectations.)
Just to clarify, the init.git was the repo of raw commits+series file
that was used for testing on linux next; now useless, except for showing
the last several weeks of history (hence the visual http link). The
signed tag [separate repo] is the application of those commits against
the 3.14-rc1 tag, which was the end goal from the beginning.
Does history matter? In the case of a cleanup like this, it does only
in the immediate context of this pull request; to help distinguish this
work from some short lived half baked idea that also had its testing
invalidated by arbitrarily rebasing onto the latest shiny tag.
I wouldn't have even mentioned the patch repo, except for the fact that
I know how Linus loves arbitrary rebases [and malformed pull requests] :)
Thanks,
Paul.
--
>
> Thanks,
>
> Ingo
^ permalink raw reply
* [PATCH v2] powerpc/eeh: drop taken reference to driver on eeh_rmv_device
From: Thadeu Lima de Souza Cascardo @ 2014-02-05 18:20 UTC (permalink / raw)
To: linuxppc-dev; +Cc: paulus, shangw, Thadeu Lima de Souza Cascardo
Commit f5c57710dd62dd06f176934a8b4b8accbf00f9f8 ("powerpc/eeh: Use
partial hotplug for EEH unaware drivers") introduces eeh_rmv_device,
which may grab a reference to a driver, but not release it.
That prevents a driver from being removed after it has gone through EEH
recovery.
This patch drops the reference if it was taken.
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
arch/powerpc/kernel/eeh_driver.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 7bb30dc..fdc679d 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -362,9 +362,13 @@ static void *eeh_rmv_device(void *data, void *userdata)
*/
if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
return NULL;
+
driver = eeh_pcid_get(dev);
- if (driver && driver->err_handler)
- return NULL;
+ if (driver) {
+ eeh_pcid_put(dev);
+ if (driver->err_handler)
+ return NULL;
+ }
/* Remove it from PCI subsystem */
pr_debug("EEH: Removing %s without EEH sensitive driver\n",
--
1.7.1
^ permalink raw reply related
* Re: [PATCH v2] powerpc/eeh: drop taken reference to driver on eeh_rmv_device
From: Nishanth Aravamudan @ 2014-02-05 18:43 UTC (permalink / raw)
To: Thadeu Lima de Souza Cascardo; +Cc: paulus, linuxppc-dev, shangw
In-Reply-To: <1391624445-9095-1-git-send-email-cascardo@linux.vnet.ibm.com>
On 05.02.2014 [16:20:45 -0200], Thadeu Lima de Souza Cascardo wrote:
> Commit f5c57710dd62dd06f176934a8b4b8accbf00f9f8 ("powerpc/eeh: Use
> partial hotplug for EEH unaware drivers") introduces eeh_rmv_device,
> which may grab a reference to a driver, but not release it.
>
> That prevents a driver from being removed after it has gone through EEH
> recovery.
>
> This patch drops the reference if it was taken.
>
> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
> Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
> ---
> arch/powerpc/kernel/eeh_driver.c | 8 ++++++--
> 1 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
> index 7bb30dc..fdc679d 100644
> --- a/arch/powerpc/kernel/eeh_driver.c
> +++ b/arch/powerpc/kernel/eeh_driver.c
> @@ -362,9 +362,13 @@ static void *eeh_rmv_device(void *data, void *userdata)
> */
> if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
> return NULL;
> +
This appears to be unnecessary whitespace change?
-Nish
> driver = eeh_pcid_get(dev);
> - if (driver && driver->err_handler)
> - return NULL;
> + if (driver) {
> + eeh_pcid_put(dev);
> + if (driver->err_handler)
> + return NULL;
> + }
>
> /* Remove it from PCI subsystem */
> pr_debug("EEH: Removing %s without EEH sensitive driver\n",
> --
> 1.7.1
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: [PATCH v2] powerpc/eeh: drop taken reference to driver on eeh_rmv_device
From: Thadeu Lima de Souza Cascardo @ 2014-02-05 19:08 UTC (permalink / raw)
To: Nishanth Aravamudan; +Cc: linuxppc-dev, paulus, shangw
In-Reply-To: <20140205184338.GA5433@linux.vnet.ibm.com>
On Wed, Feb 05, 2014 at 10:43:38AM -0800, Nishanth Aravamudan wrote:
> On 05.02.2014 [16:20:45 -0200], Thadeu Lima de Souza Cascardo wrote:
> > Commit f5c57710dd62dd06f176934a8b4b8accbf00f9f8 ("powerpc/eeh: Use
> > partial hotplug for EEH unaware drivers") introduces eeh_rmv_device,
> > which may grab a reference to a driver, but not release it.
> >
> > That prevents a driver from being removed after it has gone through EEH
> > recovery.
> >
> > This patch drops the reference if it was taken.
> >
> > Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
> > Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
> > ---
> > arch/powerpc/kernel/eeh_driver.c | 8 ++++++--
> > 1 files changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
> > index 7bb30dc..fdc679d 100644
> > --- a/arch/powerpc/kernel/eeh_driver.c
> > +++ b/arch/powerpc/kernel/eeh_driver.c
> > @@ -362,9 +362,13 @@ static void *eeh_rmv_device(void *data, void *userdata)
> > */
> > if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
> > return NULL;
> > +
>
> This appears to be unnecessary whitespace change?
>
> -Nish
>
Hi, Nish.
I originally add it there for readability, giving both more evidence to
the code below, where a driver reference is get and put, and to the code
above and its respective comment. Leaving those together could give the
impression the comment also applies to the code below.
But I have no strong feelings about that.
Ben, do you want me to send a new version?
Regards.
Cascardo.
> > driver = eeh_pcid_get(dev);
> > - if (driver && driver->err_handler)
> > - return NULL;
> > + if (driver) {
> > + eeh_pcid_put(dev);
> > + if (driver->err_handler)
> > + return NULL;
> > + }
> >
> > /* Remove it from PCI subsystem */
> > pr_debug("EEH: Removing %s without EEH sensitive driver\n",
> > --
> > 1.7.1
> >
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
> >
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: [PATCH] slub: Don't throw away partial remote slabs if there is no local memory
From: Christoph Lameter @ 2014-02-05 19:28 UTC (permalink / raw)
To: Nishanth Aravamudan
Cc: Han Pingtian, David Rientjes, penberg, linux-mm, paulus,
Anton Blanchard, mpm, Joonsoo Kim, linuxppc-dev, Wanpeng Li
In-Reply-To: <20140205001352.GC10101@linux.vnet.ibm.com>
On Tue, 4 Feb 2014, Nishanth Aravamudan wrote:
> > If the target node allocation fails (for whatever reason) then I would
> > recommend for simplicities sake to change the target node to
> > NUMA_NO_NODE and just take whatever is in the current cpu slab. A more
> > complex solution would be to look through partial lists in increasing
> > distance to find a partially used slab that is reasonable close to the
> > current node. Slab has logic like that in fallback_alloc(). Slubs
> > get_any_partial() function does something close to what you want.
>
> I apologize for my own ignorance, but I'm having trouble following.
> Anton's original patch did fallback to the current cpu slab, but I'm not
> sure any NUMA_NO_NODE change is necessary there. At the point we're
> deactivating the slab (in the current code, in __slab_alloc()), we have
> successfully allocated from somewhere, it's just not on the node we
> expected to be on.
Right so if we are ignoring the node then the simplest thing to do is to
not deactivate the current cpu slab but to take an object from it.
> So perhaps you are saying to make a change lower in the code? I'm not
> sure where it makes sense to change the target node in that case. I'd
> appreciate any guidance you can give.
This not an easy thing to do. If the current slab is not the right node
but would be the node from which the page allocator would be returning
memory then the current slab can still be allocated from. If the fallback
is to another node then the current cpu slab needs to be deactivated and
the allocation from that node needs to proceeed. Have a look at
fallback_alloc() in the slab allocator.
A allocation attempt from the page allocator can be restricted to a
specific node through GFP_THIS_NODE.
^ permalink raw reply
* Re: [PATCH 2/2] clocksource: Make clocksource register functions void
From: Thomas Gleixner @ 2014-02-05 20:39 UTC (permalink / raw)
To: Daniel Lezcano
Cc: linux-mips, Kevin Hilman, linux, Sekhar Nori, Paul Mackerras,
H. Peter Anvin, Yijing Wang, Daniel Walker,
Hans-Christian Egtvedt, Jonas Bonn, Kukjin Kim, Russell King,
Richard Weinberger, x86, Tony Lindgren, Ingo Molnar,
linux-arm-msm, David Brown, Haavard Skinnemoen, Mike Frysinger,
user-mode-linux-devel, Nicolas Ferre, Jeff Dike, Barry Song,
linux-samsung-soc, John Stultz, user-mode-linux-user, linux-omap,
linux-arm-kernel, davinci-linux-open-source, Michal Simek,
Jim Cromie, microblaze-uclinux, Hanjun Guo, linux-kernel,
Ralf Baechle, Tony Prisk, Bryan Huntsman, uclinux-dist-devel,
linuxppc-dev
In-Reply-To: <52E0D575.5050702@linaro.org>
On Thu, 23 Jan 2014, Daniel Lezcano wrote:
> On 01/23/2014 08:12 AM, Yijing Wang wrote:
> > Currently, clocksource_register() and __clocksource_register_scale()
> > functions always return 0, it's pointless, make functions void.
> > And remove the dead code that check the clocksource_register_hz()
> > return value.
> >
> > Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>
> Well, do we really want to change all these files to not take care of a return
> value ? What about is we have to check it again later ?
>
> I would recommend to investigate __clocksource_register_scale and the
> underneath functions if there is not an error to be returned in the call stack
> somewhere which is ignored today.
>
> The same applies for clocksource_register.
There is really no point in making it fail. It's so low level that
anything more than a proper printk/BUG/WARN is overkill.
Thanks,
tglx
^ permalink raw reply
* RE: [PATCH 2/2] clocksource: Make clocksource register functions void
From: Thomas Gleixner @ 2014-02-05 20:40 UTC (permalink / raw)
To: David Laight
Cc: linux-mips@linux-mips.org, x86@kernel.org, Kevin Hilman,
linux@lists.openrisc.net, Sekhar Nori, Michal Simek,
Paul Mackerras, Ralf Baechle, H. Peter Anvin, Yijing Wang,
Daniel Walker, Hans-Christian Egtvedt, Jonas Bonn, Kukjin Kim,
Russell King, Richard Weinberger, Daniel Lezcano, Tony Lindgren,
Ingo Molnar, microblaze-uclinux@itee.uq.edu.au, David Brown,
Haavard Skinnemoen, Mike Frysinger,
user-mode-linux-devel@lists.sourceforge.net,
linux-arm-msm@vger.kernel.org, Jeff Dike,
davinci-linux-open-source@linux.davincidsp.com,
linux-samsung-soc@vger.kernel.org, John Stultz,
user-mode-linux-user@lists.sourceforge.net,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Barry Song, Jim Cromie, Hanjun Guo, linux-kernel@vger.kernel.org,
Nicolas Ferre, 'Tony Prisk', Bryan Huntsman,
uclinux-dist-devel@blackfin.uclinux.org,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <063D6719AE5E284EB5DD2968C1650D6D46489C@AcuExch.aculab.com>
Yijing,
On Thu, 23 Jan 2014, David Laight wrote:
> From: Linuxppc-dev Tony Prisk
> > On 23/01/14 20:12, Yijing Wang wrote:
> > > Currently, clocksource_register() and __clocksource_register_scale()
> > > functions always return 0, it's pointless, make functions void.
> > > And remove the dead code that check the clocksource_register_hz()
> > > return value.
> > ......
> > > -static inline int clocksource_register_hz(struct clocksource *cs, u32 hz)
> > > +static inline void clocksource_register_hz(struct clocksource *cs, u32 hz)
> > > {
> > > return __clocksource_register_scale(cs, 1, hz);
> > > }
> >
> > This doesn't make sense - you are still returning a value on a function
> > declared void, and the return is now from a function that doesn't return
> > anything either ?!?!
> > Doesn't this throw a compile-time warning??
>
> It depends on the compiler.
> Recent gcc allow it.
> I don't know if it is actually valid C though.
>
> There is no excuse for it on lines like the above though.
Can you please resend with that fixed against 3.14-rc1 ?
Thanks,
tglx
^ permalink raw reply
* [PATCH 13/51] powerpc, sysfs: Fix CPU hotplug callback registration
From: Srivatsa S. Bhat @ 2014-02-05 22:06 UTC (permalink / raw)
To: paulus, oleg, rusty, peterz, tglx, akpm
Cc: ego, walken, linux, linux-kernel, Wang Dongsheng, Olof Johansson,
Madhavan Srinivasan, Paul Mackerras, Srivatsa S. Bhat, tj,
paulmck, linuxppc-dev, mingo
In-Reply-To: <20140205220251.19080.92336.stgit@srivatsabhat.in.ibm.com>
Subsystems that want to register CPU hotplug callbacks, as well as perform
initialization for the CPUs that are already online, often do it as shown
below:
get_online_cpus();
for_each_online_cpu(cpu)
init_cpu(cpu);
register_cpu_notifier(&foobar_cpu_notifier);
put_online_cpus();
This is wrong, since it is prone to ABBA deadlocks involving the
cpu_add_remove_lock and the cpu_hotplug.lock (when running concurrently
with CPU hotplug operations).
Instead, the correct and race-free way of performing the callback
registration is:
cpu_maps_update_begin();
for_each_online_cpu(cpu)
init_cpu(cpu);
/* Note the use of the double underscored version of the API */
__register_cpu_notifier(&foobar_cpu_notifier);
cpu_maps_update_done();
Fix the sysfs code in powerpc by using this latter form of callback
registration.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Wang Dongsheng <dongsheng.wang@freescale.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
---
arch/powerpc/kernel/sysfs.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 97e1dc9..c29ad44 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -975,7 +975,8 @@ static int __init topology_init(void)
int cpu;
register_nodes();
- register_cpu_notifier(&sysfs_cpu_nb);
+
+ cpu_maps_update_begin();
for_each_possible_cpu(cpu) {
struct cpu *c = &per_cpu(cpu_devices, cpu);
@@ -999,6 +1000,11 @@ static int __init topology_init(void)
if (cpu_online(cpu))
register_cpu_online(cpu);
}
+
+ __register_cpu_notifier(&sysfs_cpu_nb);
+
+ cpu_maps_update_done();
+
#ifdef CONFIG_PPC64
sysfs_create_dscr_default();
#endif /* CONFIG_PPC64 */
^ permalink raw reply related
* Re: [PATCH 4/8] powerpc: add hv_gpci interface header
From: Cody P Schafer @ 2014-02-05 23:14 UTC (permalink / raw)
To: Michael Ellerman, Linux PPC
Cc: Ingo Molnar, Paul Mackerras, Peter Zijlstra,
Arnaldo Carvalho de Melo, LKML
In-Reply-To: <20140201055807.267F12C00BA@ozlabs.org>
>> diff --git a/arch/powerpc/include/asm/hv_gpci.h b/arch/powerpc/include/asm/hv_gpci.h
>
> Any reason this can't just live in arch/powerpc/perf ?
>
Nope, it should be able to keep the header there for now. As this
interface allows determination of the HW topology, we may have some code
that exposes that (in sysfs) at some point, which doesn't really belong
in arch/powerpc/perf (though we could just put it there anyhow).
^ permalink raw reply
* [PATCH-next] powerpc: delete old PrPMC 280/2800 support
From: Paul Gortmaker @ 2014-02-06 1:35 UTC (permalink / raw)
To: linux-kernel; +Cc: Paul Gortmaker, Paul Mackerras, linuxppc-dev
This processor/memory module was mostly used on ATCA blades and
before that, on cPCI blades. It wasn't really user friendly, with
custom non u-boot bootloaders (powerboot/motload) and no real way
to recover corrupted boot flash (which was a common problem).
As such, it had its day back before the big ppc --> powerpc move
to device trees, and that was largely through commercial BSPs that
started to dry up around 2007.
Systems using one were largely in a "deploy and sustain" mode,
so interest in upgrading to new kernels in the field was nil.
Also, requiring 50A, 48V power supplies and a 2'x2'x2' ATCA
chassis largely rules out any hobbyist/enthusiast interest.
The point of all this, is that we might as well delete the in
kernel files relating to this platform. No point in continuing
to build it via walking the defconfigs or via linux-next testing.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
[The above description is not idle speculation based on 2nd hand
info -- I personally suffered with these platforms, and when faced
with a chance to take some for free vs. letting them go to e-waste,
I happily chose the latter option. So lets get this out early in
the 3.15 cycle so any objections have a full window to appear. ]
arch/powerpc/boot/Makefile | 5 +-
arch/powerpc/configs/prpmc2800_defconfig | 108 -----------------
arch/powerpc/platforms/embedded6xx/Kconfig | 8 --
arch/powerpc/platforms/embedded6xx/Makefile | 1 -
arch/powerpc/platforms/embedded6xx/prpmc2800.c | 156 -------------------------
5 files changed, 2 insertions(+), 276 deletions(-)
delete mode 100644 arch/powerpc/configs/prpmc2800_defconfig
delete mode 100644 arch/powerpc/platforms/embedded6xx/prpmc2800.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 90e9d9548660..a1f8c7f1ec60 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -54,7 +54,7 @@ zlib := inffast.c inflate.c inftrees.c
zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
zliblinuxheader := zlib.h zconf.h zutil.h
-$(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \
+$(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o): \
$(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
@@ -95,7 +95,7 @@ src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
cuboot-c2k.c gamecube-head.S \
gamecube.c wii-head.S wii.c holly.c \
- prpmc2800.c fixed-head.S mvme5100.c
+ fixed-head.S mvme5100.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -204,7 +204,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
-image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
diff --git a/arch/powerpc/configs/prpmc2800_defconfig b/arch/powerpc/configs/prpmc2800_defconfig
deleted file mode 100644
index cd80fb615d34..000000000000
--- a/arch/powerpc/configs/prpmc2800_defconfig
+++ /dev/null
@@ -1,108 +0,0 @@
-CONFIG_ALTIVEC=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_PPC_CHRP is not set
-# CONFIG_PPC_PMAC is not set
-CONFIG_EMBEDDED6xx=y
-CONFIG_PPC_PRPMC2800=y
-CONFIG_HIGHMEM=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BINFMT_MISC=y
-CONFIG_SPARSE_IRQ=y
-# CONFIG_SECCOMP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_PDC202XX_NEW=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_ATA=y
-CONFIG_SATA_MV=y
-CONFIG_MACINTOSH_DRIVERS=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_NET_PCI=y
-CONFIG_E100=y
-CONFIG_8139TOO=y
-# CONFIG_8139TOO_PIO is not set
-CONFIG_E1000=y
-CONFIG_MV643XX_ETH=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_MPSC=y
-CONFIG_SERIAL_MPSC_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_HID_DRAGONRISE=y
-CONFIG_HID_GYRATION=y
-CONFIG_HID_TWINHAN=y
-CONFIG_HID_NTRIG=y
-CONFIG_HID_ORTEK=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_HID_GREENASIA=y
-CONFIG_HID_SMARTJOYPLUS=y
-CONFIG_HID_TOPSEED=y
-CONFIG_HID_THRUSTMASTER=y
-CONFIG_THRUSTMASTER_FF=y
-CONFIG_HID_ZEROPLUS=y
-CONFIG_ZEROPLUS_FF=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_MAX6900=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_INOTIFY=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_CRC_T10DIF=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 6d3c7a9fd047..3fdc8bc6258f 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -49,14 +49,6 @@ config PPC_HOLLY
Select PPC_HOLLY if configuring for an IBM 750GX/CL Eval
Board with TSI108/9 bridge (Hickory/Holly)
-config PPC_PRPMC2800
- bool "Motorola-PrPMC2800"
- depends on EMBEDDED6xx
- select MV64X60
- select NOT_COHERENT_CACHE
- help
- This option enables support for the Motorola PrPMC2800 board
-
config PPC_C2K
bool "SBS/GEFanuc C2K board"
depends on EMBEDDED6xx
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index cdd48d402b93..f126a2a09981 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -5,7 +5,6 @@ obj-$(CONFIG_MPC7448HPC2) += mpc7448_hpc2.o
obj-$(CONFIG_LINKSTATION) += linkstation.o ls_uart.o
obj-$(CONFIG_STORCENTER) += storcenter.o
obj-$(CONFIG_PPC_HOLLY) += holly.o
-obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o
obj-$(CONFIG_PPC_C2K) += c2k.o
obj-$(CONFIG_USBGECKO_UDBG) += usbgecko_udbg.o
obj-$(CONFIG_GAMECUBE_COMMON) += flipper-pic.o
diff --git a/arch/powerpc/platforms/embedded6xx/prpmc2800.c b/arch/powerpc/platforms/embedded6xx/prpmc2800.c
deleted file mode 100644
index d455f08bea53..000000000000
--- a/arch/powerpc/platforms/embedded6xx/prpmc2800.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * Board setup routines for the Motorola PrPMC2800
- *
- * Author: Dale Farnsworth <dale@farnsworth.org>
- *
- * 2007 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/seq_file.h>
-
-#include <asm/machdep.h>
-#include <asm/prom.h>
-#include <asm/time.h>
-
-#include <mm/mmu_decl.h>
-
-#include <sysdev/mv64x60.h>
-
-#define MV64x60_MPP_CNTL_0 0x0000
-#define MV64x60_MPP_CNTL_2 0x0008
-
-#define MV64x60_GPP_IO_CNTL 0x0000
-#define MV64x60_GPP_LEVEL_CNTL 0x0010
-#define MV64x60_GPP_VALUE_SET 0x0018
-
-#define PLATFORM_NAME_MAX 32
-
-static char prpmc2800_platform_name[PLATFORM_NAME_MAX];
-
-static void __iomem *mv64x60_mpp_reg_base;
-static void __iomem *mv64x60_gpp_reg_base;
-
-static void __init prpmc2800_setup_arch(void)
-{
- struct device_node *np;
- phys_addr_t paddr;
- const unsigned int *reg;
-
- /*
- * ioremap mpp and gpp registers in case they are later
- * needed by prpmc2800_reset_board().
- */
- np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp");
- reg = of_get_property(np, "reg", NULL);
- paddr = of_translate_address(np, reg);
- of_node_put(np);
- mv64x60_mpp_reg_base = ioremap(paddr, reg[1]);
-
- np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp");
- reg = of_get_property(np, "reg", NULL);
- paddr = of_translate_address(np, reg);
- of_node_put(np);
- mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
-
-#ifdef CONFIG_PCI
- mv64x60_pci_init();
-#endif
-
- printk("Motorola %s\n", prpmc2800_platform_name);
-}
-
-static void prpmc2800_reset_board(void)
-{
- u32 temp;
-
- local_irq_disable();
-
- temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0);
- temp &= 0xFFFF0FFF;
- out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp);
-
- temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
- temp |= 0x00000004;
- out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
-
- temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
- temp |= 0x00000004;
- out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
-
- temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2);
- temp &= 0xFFFF0FFF;
- out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp);
-
- temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
- temp |= 0x00080000;
- out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
-
- temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
- temp |= 0x00080000;
- out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
-
- out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004);
-}
-
-static void prpmc2800_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- prpmc2800_reset_board();
-
- while (i-- > 0);
- panic("restart failed\n");
-}
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define PPRPM2800_COHERENCY_SETTING "off"
-#else
-#define PPRPM2800_COHERENCY_SETTING "on"
-#endif
-
-void prpmc2800_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "Vendor\t\t: Motorola\n");
- seq_printf(m, "coherency\t: %s\n", PPRPM2800_COHERENCY_SETTING);
-}
-
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init prpmc2800_probe(void)
-{
- unsigned long root = of_get_flat_dt_root();
- unsigned long len = PLATFORM_NAME_MAX;
- void *m;
-
- if (!of_flat_dt_is_compatible(root, "motorola,PrPMC2800"))
- return 0;
-
- /* Update ppc_md.name with name from dt */
- m = of_get_flat_dt_prop(root, "model", &len);
- if (m)
- strncpy(prpmc2800_platform_name, m,
- min((int)len, PLATFORM_NAME_MAX - 1));
-
- _set_L2CR(_get_L2CR() | L2CR_L2E);
- return 1;
-}
-
-define_machine(prpmc2800){
- .name = prpmc2800_platform_name,
- .probe = prpmc2800_probe,
- .setup_arch = prpmc2800_setup_arch,
- .init_early = mv64x60_init_early,
- .show_cpuinfo = prpmc2800_show_cpuinfo,
- .init_IRQ = mv64x60_init_irq,
- .get_irq = mv64x60_get_irq,
- .restart = prpmc2800_restart,
- .calibrate_decr = generic_calibrate_decr,
-};
--
1.8.5.2
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