* Re: [PATCH 1/2] Revert "KVM: PPC: Book3S HV: Add new state for transactional memory"
From: Paolo Bonzini @ 2014-03-10 10:51 UTC (permalink / raw)
To: Paul Mackerras, Aneesh Kumar K.V, Scott Wood
Cc: linuxppc-dev, agraf, kvm-ppc, kvm
In-Reply-To: <20140310105028.GA5934@iris.ozlabs.ibm.com>
Il 10/03/2014 11:50, Paul Mackerras ha scritto:
> We can either do this revert, or apply a patch removing the extra
> hunk, but one or the other should go in for 3.14 since it's quite
> broken as it is (that is, HV-mode KVM on powerpc is broken).
>
> Paolo, do you have a preference about revert vs. fix? Are you happy
> to take what Aneesh sent (in which case please add my acked-by and
> perhaps edit the commentary to say how the problem arose), or do you
> want a freshly-prepared patch, and if so against which branch?
I prefer a fix.
Paolo
^ permalink raw reply
* Re: [PATCH 1/2] Revert "KVM: PPC: Book3S HV: Add new state for transactional memory"
From: Paul Mackerras @ 2014-03-10 10:50 UTC (permalink / raw)
To: Aneesh Kumar K.V, Paolo Bonzini, Scott Wood
Cc: linuxppc-dev, agraf, kvm-ppc, kvm
In-Reply-To: <1394102170-22126-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Thu, Mar 06, 2014 at 04:06:09PM +0530, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>
> This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause
> the below crash in the host.
OK, I understand now what happened, which is this: when I sent out
that patch, I inadvertently included a hunk of extra code as a result
of not cleaning up a rebase properly. The next patch in the series
removed the extraneous hunk, but Alex didn't apply the next patch.
We can either do this revert, or apply a patch removing the extra
hunk, but one or the other should go in for 3.14 since it's quite
broken as it is (that is, HV-mode KVM on powerpc is broken).
Paolo, do you have a preference about revert vs. fix? Are you happy
to take what Aneesh sent (in which case please add my acked-by and
perhaps edit the commentary to say how the problem arose), or do you
want a freshly-prepared patch, and if so against which branch?
Thanks,
Paul.
^ permalink raw reply
* RE: rfc: checkpatch logical line continuations (was IBM Akebono: Add support for a new PHY interface to the IBM emac driver)
From: David Laight @ 2014-03-10 9:53 UTC (permalink / raw)
To: 'josh@joshtriplett.org', Joe Perches
Cc: Randy Dunlap, devicetree@vger.kernel.org, Dan Carpenter,
alistair@popple.id.au, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, Andrew Morton,
linuxppc-dev@lists.ozlabs.org, David Miller
In-Reply-To: <20140307213017.GA18769@cloud>
From: josh@joshtriplett.org
> On Fri, Mar 07, 2014 at 01:02:44PM -0800, Joe Perches wrote:
> > On Fri, 2014-03-07 at 15:41 -0500, David Miller wrote:
> > > From: Alistair Popple <alistair@popple.id.au>
> > > Date: Thu, 6 Mar 2014 14:52:25 +1100
> > >
> > > > + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> > > > + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
> > >
> > > When an expression spans multiple lines, the lines should end with
> > > operators rather than begin with them.
> >
> > That's not in CodingStyle currently.
>=20
> It's also not even remotely consistent across existing kernel code, and
> it isn't obvious that there's a general developer consensus on the
> "right" way to write it.
My personal preference (which counts for nothing here) is to put
the operators at the start of the continuation like in order to
make it more obvious that it is a continuation.
The netdev rules are particularly problematical for code like:
if (tst(foo, foo2, foo3, ...) && ....... &&
tst2(......) && tst3()) {
baz(....);
where a scan read of the LHS gives the wrong logic.
At least we don't have a coding style that allows very long lnes
an puts } and { on their own lines - leading to:
...
}
while (foo(...) && bar(...) && ..... /* very long line falls off sc=
reen */
{
int x;
Is that the top or bottom of a loop?
David
^ permalink raw reply
* Re: [PATCH] eeh_pseries: Missing break?
From: Gavin Shan @ 2014-03-08 16:37 UTC (permalink / raw)
To: Joe Perches; +Cc: linuxppc-dev, Gavin Shan, linux-kernel
In-Reply-To: <1394296003.6972.26.camel@joe-AO722>
On Sat, Mar 08, 2014 at 08:26:43AM -0800, Joe Perches wrote:
>On Sun, 2014-03-09 at 00:16 +0800, Gavin Shan wrote:
>> On Fri, Mar 07, 2014 at 04:31:32PM -0800, Joe Perches wrote:
.../...
>English usages of "double negatives" are different
>than other languages. "it wasn't unintentional"
>means the same thing as "it was intentional".
>
Sorry, typo :)
>> Could you have better commit log
>> and subject, then repost it?
>>
.../...
>From my perspective, you should write up a commit
>message of your own choice (I wouldn't use "we",
>but the rest seems OK) and add a Reported-by:
>
>All I did was notice it and bring it to your
>attention.
>
Ok. I will post it. Thanks!
Thanks,
Gavin
>> >---
>> >diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
>> >index 8a8f047..83da53f 100644
>> >--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
>> >+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
>> >@@ -460,14 +460,15 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
>> > case 5:
>> > if (rets[2]) {
>> > if (state) *state = rets[2];
>> > result = EEH_STATE_UNAVAILABLE;
>> > } else {
>> > result = EEH_STATE_NOT_SUPPORT;
>> > }
>> >+ break;
>> > default:
>> > result = EEH_STATE_NOT_SUPPORT;
>> > }
>> > } else {
>> > result = EEH_STATE_NOT_SUPPORT;
>> > }
>> >
>>
>> Thanks,
>> Gavin
>>
>
>
>
^ permalink raw reply
* Re: [PATCH] eeh_pseries: Missing break?
From: Joe Perches @ 2014-03-08 16:26 UTC (permalink / raw)
To: Gavin Shan; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20140308161647.GA24296@shangw.(null)>
On Sun, 2014-03-09 at 00:16 +0800, Gavin Shan wrote:
> On Fri, Mar 07, 2014 at 04:31:32PM -0800, Joe Perches wrote:
> >Looks like this is unintentional as the
> >result = EEH_STATE_UNAVAILABLE is being
> >overwritten by EEH_STATE_NOT_SUPPORT in the
> >fallthrough to the default case.
>
> Thanks, Joe. It wasn't unintentional.
Hi Gavin.
English usages of "double negatives" are different
than other languages. "it wasn't unintentional"
means the same thing as "it was intentional".
> Could you have better commit log
> and subject, then repost it?
>
> The format looks like:
>
> ---
>
> powerpc/eeh: Fix overwritten PE state
>
> In pseries_eeh_get_state(), we always have EEH_STATE_UNAVAILABLE
> overwritten by EEH_STATE_NOT_SUPPORT because of the missed "break"
> the patch fixes the issue.
>
> Signed-off-by: Joe Perches <joe@perches.com>
>From my perspective, you should write up a commit
message of your own choice (I wouldn't use "we",
but the rest seems OK) and add a Reported-by:
All I did was notice it and bring it to your
attention.
> ---
>
> With the better commit log/subject, please have:
>
> Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
>
> >---
> >diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
> >index 8a8f047..83da53f 100644
> >--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
> >+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
> >@@ -460,14 +460,15 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
> > case 5:
> > if (rets[2]) {
> > if (state) *state = rets[2];
> > result = EEH_STATE_UNAVAILABLE;
> > } else {
> > result = EEH_STATE_NOT_SUPPORT;
> > }
> >+ break;
> > default:
> > result = EEH_STATE_NOT_SUPPORT;
> > }
> > } else {
> > result = EEH_STATE_NOT_SUPPORT;
> > }
> >
>
> Thanks,
> Gavin
>
^ permalink raw reply
* Re: [PATCH] eeh_pseries: Missing break?
From: Gavin Shan @ 2014-03-08 16:16 UTC (permalink / raw)
To: Joe Perches; +Cc: linuxppc-dev, Gavin Shan, linux-kernel
In-Reply-To: <1394238692.16156.115.camel@joe-AO722>
On Fri, Mar 07, 2014 at 04:31:32PM -0800, Joe Perches wrote:
>Looks like this is unintentional as the
>result = EEH_STATE_UNAVAILABLE is being
>overwritten by EEH_STATE_NOT_SUPPORT in the
>fallthrough to the default case.
Thanks, Joe. It wasn't unintentional. Could you have better commit log
and subject, then repost it?
The format looks like:
---
powerpc/eeh: Fix overwritten PE state
In pseries_eeh_get_state(), we always have EEH_STATE_UNAVAILABLE
overwritten by EEH_STATE_NOT_SUPPORT because of the missed "break"
the patch fixes the issue.
Signed-off-by: Joe Perches <joe@perches.com>
---
With the better commit log/subject, please have:
Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
>---
>diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
>index 8a8f047..83da53f 100644
>--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
>+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
>@@ -460,14 +460,15 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
> case 5:
> if (rets[2]) {
> if (state) *state = rets[2];
> result = EEH_STATE_UNAVAILABLE;
> } else {
> result = EEH_STATE_NOT_SUPPORT;
> }
>+ break;
> default:
> result = EEH_STATE_NOT_SUPPORT;
> }
> } else {
> result = EEH_STATE_NOT_SUPPORT;
> }
>
Thanks,
Gavin
^ permalink raw reply
* [PATCH] eeh_pseries: Missing break?
From: Joe Perches @ 2014-03-08 0:31 UTC (permalink / raw)
To: Gavin Shan; +Cc: linuxppc-dev, linux-kernel
Looks like this is unintentional as the
result = EEH_STATE_UNAVAILABLE is being
overwritten by EEH_STATE_NOT_SUPPORT in the
fallthrough to the default case.
---
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 8a8f047..83da53f 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -460,14 +460,15 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
case 5:
if (rets[2]) {
if (state) *state = rets[2];
result = EEH_STATE_UNAVAILABLE;
} else {
result = EEH_STATE_NOT_SUPPORT;
}
+ break;
default:
result = EEH_STATE_NOT_SUPPORT;
}
} else {
result = EEH_STATE_NOT_SUPPORT;
}
^ permalink raw reply related
* Re: rfc: checkpatch logical line continuations (was IBM Akebono: Add support for a new PHY interface to the IBM emac driver)
From: Joe Perches @ 2014-03-07 23:15 UTC (permalink / raw)
To: Dan Carpenter
Cc: Randy Dunlap, devicetree, Dan Carpenter, alistair, josh,
linux-kernel, netdev, Andrew Morton, linuxppc-dev, David Miller
In-Reply-To: <20140307230420.GH29018@mwanda>
On Sat, 2014-03-08 at 02:04 +0300, Dan Carpenter wrote:
> On Fri, Mar 07, 2014 at 01:30:17PM -0800, josh@joshtriplett.org wrote:
> > On Fri, Mar 07, 2014 at 01:02:44PM -0800, Joe Perches wrote:
> > > On Fri, 2014-03-07 at 15:41 -0500, David Miller wrote:
> > > > From: Alistair Popple <alistair@popple.id.au>
> > > > Date: Thu, 6 Mar 2014 14:52:25 +1100
> > > >
> > > > > + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> > > > > + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
> > > >
> > > > When an expression spans multiple lines, the lines should end with
> > > > operators rather than begin with them.
> > >
> > > That's not in CodingStyle currently.
> >
> > It's also not even remotely consistent across existing kernel code, and
> > it isn't obvious that there's a general developer consensus on the
> > "right" way to write it.
> >
>
> We just had this discussion in staging and Greg modified the patch to
> put the operator at the end.
>
> https://lkml.org/lkml/2014/2/25/125
I remember and it's the reason I bring it up in a
more public way.
> It's like logical && and || operators which go at the end these days.
> I don't really want to have a lot of checkpatch churn to convert
> everything...
Nor I really. I simply would like a tool that lets
more core maintainers like David M avoid sending out
"do this, not that" type emails about patches.
I don't mind adding style checking that emits something
for patches and is quieter when scanning files.
^ permalink raw reply
* Re: rfc: checkpatch logical line continuations (was IBM Akebono: Add support for a new PHY interface to the IBM emac driver)
From: Dan Carpenter @ 2014-03-07 23:04 UTC (permalink / raw)
To: josh
Cc: Randy Dunlap, devicetree, Dan Carpenter, alistair, linux-kernel,
netdev, Joe Perches, Andrew Morton, linuxppc-dev, David Miller
In-Reply-To: <20140307213017.GA18769@cloud>
On Fri, Mar 07, 2014 at 01:30:17PM -0800, josh@joshtriplett.org wrote:
> On Fri, Mar 07, 2014 at 01:02:44PM -0800, Joe Perches wrote:
> > On Fri, 2014-03-07 at 15:41 -0500, David Miller wrote:
> > > From: Alistair Popple <alistair@popple.id.au>
> > > Date: Thu, 6 Mar 2014 14:52:25 +1100
> > >
> > > > + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> > > > + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
> > >
> > > When an expression spans multiple lines, the lines should end with
> > > operators rather than begin with them.
> >
> > That's not in CodingStyle currently.
>
> It's also not even remotely consistent across existing kernel code, and
> it isn't obvious that there's a general developer consensus on the
> "right" way to write it.
>
We just had this discussion in staging and Greg modified the patch to
put the operator at the end.
https://lkml.org/lkml/2014/2/25/125
It's like logical && and || operators which go at the end these days.
I don't really want to have a lot of checkpatch churn to convert
everything...
regards,
dan carpenter
^ permalink raw reply
* Re: rfc: checkpatch logical line continuations (was IBM Akebono: Add support for a new PHY interface to the IBM emac driver)
From: josh @ 2014-03-07 21:30 UTC (permalink / raw)
To: Joe Perches
Cc: Randy Dunlap, devicetree, Dan Carpenter, alistair, linux-kernel,
netdev, Andrew Morton, linuxppc-dev, David Miller
In-Reply-To: <1394226164.16156.96.camel@joe-AO722>
On Fri, Mar 07, 2014 at 01:02:44PM -0800, Joe Perches wrote:
> On Fri, 2014-03-07 at 15:41 -0500, David Miller wrote:
> > From: Alistair Popple <alistair@popple.id.au>
> > Date: Thu, 6 Mar 2014 14:52:25 +1100
> >
> > > + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> > > + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
> >
> > When an expression spans multiple lines, the lines should end with
> > operators rather than begin with them.
>
> That's not in CodingStyle currently.
It's also not even remotely consistent across existing kernel code, and
it isn't obvious that there's a general developer consensus on the
"right" way to write it.
> Right now, checkpatch emits a --strict only warning on "&&" or "||"
> at the beginning of line but that could be changed to any "$Operators"
>
> our $Arithmetic = qr{\+|-|\*|\/|%};
> our $Operators = qr{
> <=|>=|==|!=|
> =>|->|<<|>>|<|>|!|~|
> &&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
> }x;
>
> The ones that likely have a too high false positive rates
> are the negation "!" and bitwise "~".
I don't think warning about operators at start of line seems like a good
idea at all. There are plenty of cases where putting the operator at
the start of the line will produce a better result. (I'd actually
suggest that in *most* cases.)
> Also, using perl, it's hard to distinguish between a
> logical "&" and the address-of "&" as well as the
> multiplication "*" and indirection "*" so maybe those
> should be excluded too.
>
> And I think it should only be added as a --strict test.
Agreed, if even that.
- Josh Triplett
^ permalink raw reply
* Re: rfc: checkpatch logical line continuations (was IBM Akebono: Add support for a new PHY interface to the IBM emac driver)
From: Joe Perches @ 2014-03-07 21:45 UTC (permalink / raw)
To: josh
Cc: devicetree, Dan Carpenter, alistair, Randy Dunlap, linux-kernel,
netdev, Andrew Morton, linuxppc-dev, David Miller
In-Reply-To: <20140307213017.GA18769@cloud>
On Fri, 2014-03-07 at 13:30 -0800, josh@joshtriplett.org wrote:
> On Fri, Mar 07, 2014 at 01:02:44PM -0800, Joe Perches wrote:
> > On Fri, 2014-03-07 at 15:41 -0500, David Miller wrote:
> > > From: Alistair Popple <alistair@popple.id.au>
> > > Date: Thu, 6 Mar 2014 14:52:25 +1100
> > >
> > > > + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> > > > + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
> > >
> > > When an expression spans multiple lines, the lines should end with
> > > operators rather than begin with them.
> >
> > That's not in CodingStyle currently.
>
> It's also not even remotely consistent across existing kernel code, and
> it isn't obvious that there's a general developer consensus on the
> "right" way to write it.
I agree with that. Stuff that's not in CodingStyle generally
doesn't have a developer consensus.
> > Right now, checkpatch emits a --strict only warning on "&&" or "||"
> > at the beginning of line but that could be changed to any "$Operators"
> >
> > our $Arithmetic = qr{\+|-|\*|\/|%};
> > our $Operators = qr{
> > <=|>=|==|!=|
> > =>|->|<<|>>|<|>|!|~|
> > &&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
> > }x;
> >
> > The ones that likely have a too high false positive rates
> > are the negation "!" and bitwise "~".
>
> I don't think warning about operators at start of line seems like a good
> idea at all. There are plenty of cases where putting the operator at
> the start of the line will produce a better result. (I'd actually
> suggest that in *most* cases.)
>
> > Also, using perl, it's hard to distinguish between a
> > logical "&" and the address-of "&" as well as the
> > multiplication "*" and indirection "*" so maybe those
> > should be excluded too.
> >
> > And I think it should only be added as a --strict test.
>
> Agreed, if even that.
And probably made specific to net/ and drivers/net like
a few other comment style tests until such time as a
consensus exists.
^ permalink raw reply
* Re: rfc: checkpatch logical line continuations
From: David Miller @ 2014-03-07 21:23 UTC (permalink / raw)
To: joe
Cc: randy.dunlap, devicetree, error27, alistair, linux-kernel, josh,
netdev, akpm, linuxppc-dev
In-Reply-To: <1394226164.16156.96.camel@joe-AO722>
From: Joe Perches <joe@perches.com>
Date: Fri, 07 Mar 2014 13:02:44 -0800
> Right now, checkpatch emits a --strict only warning on "&&" or "||"
> at the beginning of line but that could be changed to any "$Operators"
>
> our $Arithmetic = qr{\+|-|\*|\/|%};
> our $Operators = qr{
> <=|>=|==|!=|
> =>|->|<<|>>|<|>|!|~|
> &&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
> }x;
>
> The ones that likely have a too high false positive rates
> are the negation "!" and bitwise "~".
Unary operators at the beginning of a line are perfectly fine,
it's the other ones that are the problem.
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2014-03-07 21:04 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev, Linux Kernel list
Hi Linus !
Here are a couple of powerpc fixes for 3.14. One is (another !) nasty TM
problem, we can crash the kernel by forking inside a transaction. The
other one is a simple fix for an alignment issue which can hurt in LE
mode.
Cheers,
Ben.
The following changes since commit e0cf957614976896111e676e5134ac98ee227d3d:
powerpc/powernv: Fix indirect XSCOM unmangling (2014-02-28 19:15:49 +1100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
for you to fetch changes up to a5b2cf5b1af424ee3dd9e3ce6d5cea18cb927e67:
powerpc: Align p_dyn, p_rela and p_st symbols (2014-03-07 13:50:19 +1100)
----------------------------------------------------------------
Anton Blanchard (1):
powerpc: Align p_dyn, p_rela and p_st symbols
Michael Neuling (1):
powerpc/tm: Fix crash when forking inside a transaction
arch/powerpc/kernel/process.c | 9 +++++++++
arch/powerpc/kernel/reloc_64.S | 1 +
2 files changed, 10 insertions(+)
^ permalink raw reply
* rfc: checkpatch logical line continuations (was IBM Akebono: Add support for a new PHY interface to the IBM emac driver)
From: Joe Perches @ 2014-03-07 21:02 UTC (permalink / raw)
To: David Miller
Cc: Randy Dunlap, devicetree, Dan Carpenter, alistair, linux-kernel,
Josh Triplett, netdev, Andrew Morton, linuxppc-dev
In-Reply-To: <20140307.154142.488351276799532264.davem@davemloft.net>
(added some cc's)
On Fri, 2014-03-07 at 15:41 -0500, David Miller wrote:
> From: Alistair Popple <alistair@popple.id.au>
> Date: Thu, 6 Mar 2014 14:52:25 +1100
>
> > + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> > + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
>
> When an expression spans multiple lines, the lines should end with
> operators rather than begin with them.
That's not in CodingStyle currently.
Right now, checkpatch emits a --strict only warning on "&&" or "||"
at the beginning of line but that could be changed to any "$Operators"
our $Arithmetic = qr{\+|-|\*|\/|%};
our $Operators = qr{
<=|>=|==|!=|
=>|->|<<|>>|<|>|!|~|
&&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
}x;
The ones that likely have a too high false positive rates
are the negation "!" and bitwise "~".
Also, using perl, it's hard to distinguish between a
logical "&" and the address-of "&" as well as the
multiplication "*" and indirection "*" so maybe those
should be excluded too.
And I think it should only be added as a --strict test.
^ permalink raw reply
* Re: [PATCH 2/5] IBM Akebono: Add support for a new PHY interface to the IBM emac driver
From: David Miller @ 2014-03-07 20:41 UTC (permalink / raw)
To: alistair; +Cc: netdev, linuxppc-dev, linux-kernel, devicetree
In-Reply-To: <1394077948-8395-3-git-send-email-alistair@popple.id.au>
From: Alistair Popple <alistair@popple.id.au>
Date: Thu, 6 Mar 2014 14:52:25 +1100
> + out_be32(dev->reg, in_be32(dev->reg) | WKUP_ETH_RGMIIEN
> + | WKUP_ETH_TX_OE | WKUP_ETH_RX_IE);
When an expression spans multiple lines, the lines should end with
operators rather than begin with them.
Also, it would be easier to read this call if parenthesis were put
around the third argument and then indented to match, f.e.:
out_be32(dev->reg, (in_be32(dev->reg) | WKUP_ETH_RGMIIEN |
WKUP_ETH_TX_OE | WKUP_ETH_RX_IE));
^ permalink raw reply
* Re: [PATCH v2 14/52] powerpc, sysfs: Fix CPU hotplug callback registration
From: Gautham R Shenoy @ 2014-03-07 6:21 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linux-arch, ego, walken, linux, akpm, Wang Dongsheng, peterz,
rusty, rjw, oleg, linux-kernel, Olof Johansson,
Madhavan Srinivasan, paulus, Srivatsa S. Bhat, tj, tglx, paulmck,
linuxppc-dev, mingo
In-Reply-To: <1394161051.26321.71.camel@pasglop>
Hello Ben,
On Fri, Mar 07, 2014 at 01:57:31PM +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2014-02-14 at 13:22 +0530, Srivatsa S. Bhat wrote:
> > Subsystems that want to register CPU hotplug callbacks, as well as perform
> > initialization for the CPUs that are already online, often do it as shown
> > below:
> >
> > get_online_cpus();
> >
> > for_each_online_cpu(cpu)
> > init_cpu(cpu);
> >
> > register_cpu_notifier(&foobar_cpu_notifier);
> >
> > put_online_cpus();
>
> This patch breaks a good half of my test configs with:
>
> /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c: In function 'topology_init':
> /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:979:2: error: implicit declaration of function 'cpu_notifier_register_begin' [-Werror=implicit-function-declaration]
> /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:1004:2: error: implicit declaration of function '__register_cpu_notifier' [-Werror=implicit-function-declaration]
> /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:1006:2: error: implicit declaration of function 'cpu_notifier_register_done' [-Werror=implicit-function-declaration]
> cc1: all warnings being treated as errors
> make[2]: *** [arch/powerpc/kernel/sysfs.o] Error 1
> make[2]: *** Waiting for unfinished jobs....
This patch depends on
"[PATCH v2 02/52] CPU hotplug: Provide lockless versions of callback registration functions"
of the series (Can be found here: https://lkml.org/lkml/2014/2/14/59).
This particular patch defines 'cpu_notifier_register_begin',
'__register_cpu_notifier', and 'cpu_notifier_register_done' in the
cpu-hotplug core. Are you seeing the build breakage with this patch on
?
--
Thanks and Regards
gautham.
^ permalink raw reply
* Re: [PATCH RFC/RFT v3 6/9] powerpc: move cacheinfo sysfs to generic cacheinfo infrastructure
From: Anshuman Khandual @ 2014-03-07 6:14 UTC (permalink / raw)
To: Sudeep Holla; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <531945D1.7010503@linux.vnet.ibm.com>
On 03/07/2014 09:36 AM, Anshuman Khandual wrote:
> On 02/19/2014 09:36 PM, Sudeep Holla wrote:
>> From: Sudeep Holla <sudeep.holla@arm.com>
>>
>> This patch removes the redundant sysfs cacheinfo code by making use of
>> the newly introduced generic cacheinfo infrastructure.
>>
>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
>> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> Cc: Paul Mackerras <paulus@samba.org>
>> Cc: linuxppc-dev@lists.ozlabs.org
>> ---
>> arch/powerpc/kernel/cacheinfo.c | 831 ++++++----------------------------------
>> arch/powerpc/kernel/cacheinfo.h | 8 -
>> arch/powerpc/kernel/sysfs.c | 4 -
>> 3 files changed, 109 insertions(+), 734 deletions(-)
>> delete mode 100644 arch/powerpc/kernel/cacheinfo.h
>>
>> diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
>> index 2912b87..05b7580 100644
>> --- a/arch/powerpc/kernel/cacheinfo.c
>> +++ b/arch/powerpc/kernel/cacheinfo.c
>> @@ -10,38 +10,10 @@
>> * 2 as published by the Free Software Foundation.
>> */
>>
>> +#include <linux/cacheinfo.h>
>> #include <linux/cpu.h>
>> -#include <linux/cpumask.h>
>> #include <linux/kernel.h>
>> -#include <linux/kobject.h>
>> -#include <linux/list.h>
>> -#include <linux/notifier.h>
>> #include <linux/of.h>
>> -#include <linux/percpu.h>
>> -#include <linux/slab.h>
>> -#include <asm/prom.h>
>> -
>> -#include "cacheinfo.h"
>> -
>> -/* per-cpu object for tracking:
>> - * - a "cache" kobject for the top-level directory
>> - * - a list of "index" objects representing the cpu's local cache hierarchy
>> - */
>> -struct cache_dir {
>> - struct kobject *kobj; /* bare (not embedded) kobject for cache
>> - * directory */
>> - struct cache_index_dir *index; /* list of index objects */
>> -};
>> -
>> -/* "index" object: each cpu's cache directory has an index
>> - * subdirectory corresponding to a cache object associated with the
>> - * cpu. This object's lifetime is managed via the embedded kobject.
>> - */
>> -struct cache_index_dir {
>> - struct kobject kobj;
>> - struct cache_index_dir *next; /* next index in parent directory */
>> - struct cache *cache;
>> -};
>>
>> /* Template for determining which OF properties to query for a given
>> * cache type */
>> @@ -60,11 +32,6 @@ struct cache_type_info {
>> const char *nr_sets_prop;
>> };
>>
>> -/* These are used to index the cache_type_info array. */
>> -#define CACHE_TYPE_UNIFIED 0
>> -#define CACHE_TYPE_INSTRUCTION 1
>> -#define CACHE_TYPE_DATA 2
>> -
>> static const struct cache_type_info cache_type_info[] = {
>> {
>> /* PowerPC Processor binding says the [di]-cache-*
>> @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_info[] = {
>> .nr_sets_prop = "d-cache-sets",
>> },
>> {
>> - .name = "Instruction",
>> - .size_prop = "i-cache-size",
>> - .line_size_props = { "i-cache-line-size",
>> - "i-cache-block-size", },
>> - .nr_sets_prop = "i-cache-sets",
>> - },
>> - {
>> .name = "Data",
>> .size_prop = "d-cache-size",
>> .line_size_props = { "d-cache-line-size",
>> "d-cache-block-size", },
>> .nr_sets_prop = "d-cache-sets",
>> },
>> + {
>> + .name = "Instruction",
>> + .size_prop = "i-cache-size",
>> + .line_size_props = { "i-cache-line-size",
>> + "i-cache-block-size", },
>> + .nr_sets_prop = "i-cache-sets",
>> + },
>> };
>
>
> Hey Sudeep,
>
> After applying this patch, the cache_type_info array looks like this.
>
> static const struct cache_type_info cache_type_info[] = {
> {
> /*
> * PowerPC Processor binding says the [di]-cache-*
> * must be equal on unified caches, so just use
> * d-cache properties.
> */
> .name = "Unified",
> .size_prop = "d-cache-size",
> .line_size_props = { "d-cache-line-size",
> "d-cache-block-size", },
> .nr_sets_prop = "d-cache-sets",
> },
> {
> .name = "Data",
> .size_prop = "d-cache-size",
> .line_size_props = { "d-cache-line-size",
> "d-cache-block-size", },
> .nr_sets_prop = "d-cache-sets",
> },
> {
> .name = "Instruction",
> .size_prop = "i-cache-size",
> .line_size_props = { "i-cache-line-size",
> "i-cache-block-size", },
> .nr_sets_prop = "i-cache-sets",
> },
> };
>
> and this function computes the the array index for any given cache type
> define for PowerPC.
>
> static inline int get_cacheinfo_idx(enum cache_type type)
> {
> if (type == CACHE_TYPE_UNIFIED)
> return 0;
> else
> return type;
> }
>
> These types are define in include/linux/cacheinfo.h as
>
> enum cache_type {
> CACHE_TYPE_NOCACHE = 0,
> CACHE_TYPE_INST = BIT(0), ---> 1
> CACHE_TYPE_DATA = BIT(1), ---> 2
> CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA,
> CACHE_TYPE_UNIFIED = BIT(2),
> };
>
> When it is UNIFIED we return index 0, which is correct. But the index
> for instruction and data cache seems to be swapped which wrong. This
> will fetch invalid properties for any given cache type.
>
> I have done some initial review and testing for this patch's impact on
> PowerPC (ppc64 POWER specifically). I am trying to do some code clean-up
> and re-arrangements. Will post out soon. Thanks !
It does not work correctly on POWER.
The new patchset adds some more attributes for every cache entry apart from
what we used to have on PowerPC before. From the ABI perspective, the old ones
should reflect the correct value in the same manner as before. Looks like
the generic code will make any attribute as "Unknown" if the arch code does
not populate them in the respective callback.
Here are some problems found on a POWER7 system
(1) L1 instruction cache (cpu<N>/cache/index1/)
====== Before patch ======
coherency_line_size: 128
level: 1
shared_cpu_map: 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,
00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,
00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,
00000000,00000000,00000000,00000000,00000f00
size: 32K
type: Instruction
===== After patch ========
coherency_line_size: Unknown ----> Wrong
level: 1
shared_cpu_map: 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,
00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,
00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,
00000000,00000000,00000000,00000000,00ffffff ----> Wrong
size: 0K ----> Wrong
type: Instruction
(2) L3 cache (cpu<N>/cache/index3/)
====== Before patch ======
number_of_sets: 1
size: 4096K
ways_of_associativity: 0
===== After patch ========
number_of_sets: 1
size: 4096K
ways_of_associativity: Unknown ----> Wrong
Need to revisit this implementation on PowerPC and figure out the cause of these problems.
^ permalink raw reply
* [PATCH 2/2] powerpc/powernv: hwmon driver for power values, fan rpm and temperature
From: Neelesh Gupta @ 2014-03-07 5:33 UTC (permalink / raw)
To: linuxppc-dev; +Cc: sbhat
In-Reply-To: <20140307053236.3547.55729.stgit@neelegup-tp-t420.in.ibm.com>
From: Shivaprasad G Bhat <sbhat@linux.vnet.ibm.com>
This patch adds basic kernel enablement for reading power values, fan
speed rpm and temperature values on powernv platforms which will
be exported to user space through sysfs interface.
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.vnet.ibm.com>
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
drivers/hwmon/Kconfig | 8 +
drivers/hwmon/Makefile | 1
drivers/hwmon/ibmpowernv.c | 529 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 538 insertions(+)
create mode 100644 drivers/hwmon/ibmpowernv.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 5ce43d8..ad4cdcb 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -557,6 +557,14 @@ config SENSORS_IBMPEX
This driver can also be built as a module. If so, the module
will be called ibmpex.
+config SENSORS_IBMPOWERNV
+ tristate "IBM PowerNv Platform temperature/power/fan sensor"
+ depends on PPC_POWERNV
+ default y
+ help
+ If you say yes here you get support for the temperature/fan/power
+ sensors on your platform.
+
config SENSORS_IIO_HWMON
tristate "Hwmon driver that uses channels specified via iio maps"
depends on IIO
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index ec7cde0..807e172 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o
obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o
obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o
obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o
+obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o
obj-$(CONFIG_SENSORS_IIO_HWMON) += iio_hwmon.o
obj-$(CONFIG_SENSORS_INA209) += ina209.o
obj-$(CONFIG_SENSORS_INA2XX) += ina2xx.o
diff --git a/drivers/hwmon/ibmpowernv.c b/drivers/hwmon/ibmpowernv.c
new file mode 100644
index 0000000..b7b1297
--- /dev/null
+++ b/drivers/hwmon/ibmpowernv.c
@@ -0,0 +1,529 @@
+/*
+ * hwmon driver for temperature/power/fan on IBM PowerNV platform
+ * Copyright (C) 2013 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <asm/opal.h>
+#include <linux/err.h>
+
+MODULE_DESCRIPTION("IBM PowerNV Platform power/temp/fan sensor hwmon module");
+MODULE_LICENSE("GPL");
+
+#define MAX_ATTR_LENGTH 32
+
+/* Device tree sensor name prefixes. The device tree has the names in the
+ * format "cooling-fan#2-faulted" where the "cooling-fan" is the sensor type,
+ * 2 is the sensor count, and "faulted" is the sensor data attribute type.
+ */
+#define DT_FAULT_ATTR_SUFFIX "faulted"
+#define DT_DATA_ATTR_SUFFIX "data"
+#define DT_THRESHOLD_ATTR_SUFFIX "thrs"
+
+enum sensors {
+ FAN,
+ TEMPERATURE,
+ POWERSUPPLY,
+ POWER,
+ MAX_SENSOR_TYPE,
+};
+
+enum attributes {
+ INPUT,
+ MINIMUM,
+ MAXIMUM,
+ FAULT,
+ MAX_ATTR_TYPES
+};
+
+static struct sensor_name {
+ char *name;
+ char *compaible;
+} sensor_names[] = {
+ {"fan-sensor", "ibm,opal-sensor-cooling-fan"},
+ {"amb-temp-sensor", "ibm,opal-sensor-amb-temp"},
+ {"power-sensor", "ibm,opal-sensor-power-supply"},
+ {"power", "ibm,opal-sensor-power"}
+};
+
+static const char * const attribute_type_table[] = {
+ "input",
+ "min",
+ "max",
+ "fault",
+ NULL
+};
+
+struct pdev_entry {
+ struct list_head list;
+ struct platform_device *pdev;
+ enum sensors type;
+};
+
+static LIST_HEAD(pdev_list);
+
+/* The sensors are categorised on type.
+ *
+ * The sensors of same type are categorised under a common platform device.
+ * So, The pdev is shared by all sensors of same type.
+ * Ex : temp1_input, temp1_max, temp2_input,temp2_max all share same platform
+ * device.
+ *
+ * "sensor_data" is the Platform device specific data.
+ * There is one hwmon_device instance for all the sensors of same type.
+ * This also holds the list of all sensors with same type but different
+ * attribute and index.
+ */
+struct sensor_specific_data {
+ u32 sensor_id; /* The hex value as in the device tree */
+ u32 sensor_index; /* The sensor instance index */
+ struct sensor_device_attribute sd_attr;
+ enum attributes attr_type;
+ char attr_name[64];
+};
+
+struct sensor_data {
+ struct device *hwmon_dev;
+ struct list_head sensor_list;
+ struct device_attribute name_attr;
+};
+
+struct sensor_entry {
+ struct list_head list;
+ struct sensor_specific_data *sensor_data;
+};
+
+static struct platform_device *powernv_sensor_get_pdev(enum sensors type)
+{
+ struct pdev_entry *p;
+ list_for_each_entry(p, &pdev_list, list)
+ if (p->type == type)
+ return p->pdev;
+
+ return NULL;
+}
+
+static struct sensor_specific_data *powernv_sensor_get_sensor_data(
+ struct sensor_data *pdata,
+ int index, enum attributes attr_type)
+{
+ struct sensor_entry *p;
+ list_for_each_entry(p, &pdata->sensor_list, list)
+ if ((p->sensor_data->sensor_index == index) &&
+ (attr_type == p->sensor_data->attr_type))
+ return p->sensor_data;
+
+ return NULL;
+}
+
+static ssize_t show_name(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+
+ return sprintf(buf, "%s\n", pdev->name);
+}
+
+/* Note: Data from the sensors for each sensor type needs to be converted to
+ * the dimension appropriate.
+ */
+static ssize_t show_sensor(struct device *dev,
+ struct device_attribute *devattr, char *buf)
+{
+ struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(devattr);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct sensor_data *pdata = platform_get_drvdata(pdev);
+ struct sensor_specific_data *tdata = NULL;
+ enum sensors sensor_type = pdev->id;
+ u32 x = -1;
+ int ret;
+
+ if (sd_attr && sd_attr->dev_attr.attr.name) {
+ char *pos = strchr(sd_attr->dev_attr.attr.name, '_');
+ int i;
+
+ for (i = 0; i < MAX_ATTR_TYPES; i++) {
+ if (strcmp(pos+1, attribute_type_table[i]) == 0) {
+ tdata = powernv_sensor_get_sensor_data(pdata,
+ sd_attr->index, i);
+ break;
+ }
+ }
+ }
+
+ if (tdata) {
+ ret = opal_get_sensor_data(tdata->sensor_id, &x);
+ if (ret)
+ x = -1;
+ }
+
+ if (sensor_type == TEMPERATURE && x > 0) {
+ /* Temperature comes in Degrees and convert it to
+ * milli-degrees.
+ */
+ x = x*1000;
+ } else if (sensor_type == POWER && x > 0) {
+ /* Power value comes in watts, convert to micro-watts */
+ x = x * 1000000;
+ }
+
+ return sprintf(buf, "%d\n", x);
+}
+
+static u32 get_sensor_index_from_name(const char *name)
+{
+ char *hash_position = strchr(name, '#');
+ u32 index = 0, copy_length;
+ char newbuf[8];
+
+ if (hash_position) {
+ copy_length = strchr(hash_position, '-') - hash_position - 1;
+ if (copy_length < sizeof(newbuf)) {
+ strncpy(newbuf, hash_position + 1, copy_length);
+ sscanf(newbuf, "%d", &index);
+ }
+ }
+
+ return index;
+}
+
+static inline void get_sensor_suffix_from_name(const char *name, char *suffix)
+{
+ char *dash_position = strrchr(name, '-');
+ if (dash_position)
+ strncpy(suffix, dash_position+1, MAX_ATTR_LENGTH);
+ else
+ strcpy(suffix,"");
+}
+
+static int get_sensor_attr_properties(const char *sensor_name,
+ enum sensors sensor_type, enum attributes *attr_type,
+ u32 *sensor_index)
+{
+ char suffix[MAX_ATTR_LENGTH];
+
+ *attr_type = MAX_ATTR_TYPES;
+ *sensor_index = get_sensor_index_from_name(sensor_name);
+ if (*sensor_index == 0)
+ return -EINVAL;
+
+ get_sensor_suffix_from_name(sensor_name, suffix);
+ if (strcmp(suffix, "") == 0)
+ return -EINVAL;
+
+ if (strcmp(suffix, DT_FAULT_ATTR_SUFFIX) == 0)
+ *attr_type = FAULT;
+ else if (strcmp(suffix, DT_DATA_ATTR_SUFFIX) == 0)
+ *attr_type = INPUT;
+ else if ((sensor_type == TEMPERATURE) &&
+ (strcmp(suffix, DT_THRESHOLD_ATTR_SUFFIX) == 0))
+ *attr_type = MAXIMUM;
+ else if ((sensor_type == FAN) &&
+ (strcmp(suffix, DT_THRESHOLD_ATTR_SUFFIX) == 0))
+ *attr_type = MINIMUM;
+ else
+ return -ENOENT;
+
+ if (((sensor_type == FAN) && ((*attr_type == INPUT) ||
+ (*attr_type == MINIMUM)))
+ || ((sensor_type == TEMPERATURE) && ((*attr_type == INPUT) ||
+ (*attr_type == MAXIMUM)))
+ || ((sensor_type == POWER) && ((*attr_type == INPUT))))
+ return 0;
+
+ return -ENOENT;
+}
+
+static int create_sensor_attr(struct sensor_specific_data *tdata,
+ struct device *dev, enum sensors sensor_type,
+ enum attributes attr_type)
+{
+ int err = 0;
+ char temp_file_prefix[50];
+ static const char *const file_name_format = "%s%d_%s";
+
+ tdata->attr_type = attr_type;
+
+ if (sensor_type == FAN)
+ strcpy(temp_file_prefix, "fan");
+ else if (sensor_type == TEMPERATURE)
+ strcpy(temp_file_prefix, "temp");
+ else if (sensor_type == POWERSUPPLY)
+ strcpy(temp_file_prefix, "powersupply");
+ else if (sensor_type == POWER)
+ strcpy(temp_file_prefix, "power");
+
+ snprintf(tdata->attr_name, sizeof(tdata->attr_name), file_name_format,
+ temp_file_prefix, tdata->sensor_index,
+ attribute_type_table[tdata->attr_type]);
+
+ sysfs_attr_init(&tdata->sd_attr.dev_attr.attr);
+ tdata->sd_attr.dev_attr.attr.name = tdata->attr_name;
+ tdata->sd_attr.dev_attr.attr.mode = S_IRUGO;
+ tdata->sd_attr.dev_attr.show = show_sensor;
+
+ tdata->sd_attr.index = tdata->sensor_index;
+ err = device_create_file(dev, &tdata->sd_attr.dev_attr);
+
+ return err;
+}
+
+static int create_name_attr(struct sensor_data *pdata,
+ struct device *dev)
+{
+ sysfs_attr_init(&pdata->name_attr.attr);
+ pdata->name_attr.attr.name = "name";
+ pdata->name_attr.attr.mode = S_IRUGO;
+ pdata->name_attr.show = show_name;
+ return device_create_file(dev, &pdata->name_attr);
+}
+
+static int create_platform_device(enum sensors sensor_type,
+ struct platform_device **pdev)
+{
+ struct pdev_entry *pdev_entry = NULL;
+ int err;
+
+ *pdev = platform_device_alloc(sensor_names[sensor_type].name,
+ sensor_type);
+ if (!*pdev) {
+ pr_err("Device allocation failed\n");
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
+ if (!pdev_entry) {
+ pr_err("Device allocation failed\n");
+ err = -ENOMEM;
+ goto exit_device_put;
+ }
+
+ err = platform_device_add(*pdev);
+ if (err) {
+ pr_err("Device addition failed (%d)\n", err);
+ goto exit_device_free;
+ }
+
+ pdev_entry->pdev = *pdev;
+ pdev_entry->type = (*pdev)->id;
+
+ list_add_tail(&pdev_entry->list, &pdev_list);
+
+ return 0;
+exit_device_free:
+ kfree(pdev_entry);
+exit_device_put:
+ platform_device_put(*pdev);
+exit:
+ return err;
+}
+
+static int create_sensor_data(struct platform_device *pdev)
+{
+ struct sensor_data *pdata = NULL;
+ int err = 0;
+
+ pdata = kzalloc(sizeof(struct sensor_data), GFP_KERNEL);
+ if (!pdata) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ err = create_name_attr(pdata, &pdev->dev);
+ if (err)
+ goto exit_free;
+
+ pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
+ if (IS_ERR(pdata->hwmon_dev)) {
+ err = PTR_ERR(pdata->hwmon_dev);
+ dev_err(&pdev->dev, "Class registration failed (%d)\n",
+ err);
+ goto exit_name;
+ }
+
+ INIT_LIST_HEAD(&pdata->sensor_list);
+ platform_set_drvdata(pdev, pdata);
+
+ return 0;
+
+exit_name:
+ device_remove_file(&pdev->dev, &pdata->name_attr);
+exit_free:
+ kfree(pdata);
+exit:
+ return err;
+}
+
+static void delete_sensor_attr(struct sensor_data *pdata)
+{
+ struct sensor_entry *s, *l;
+
+ list_for_each_entry_safe(s, l, &pdata->sensor_list, list) {
+ struct sensor_specific_data *tdata = s->sensor_data;
+ kfree(tdata);
+ list_del(&s->list);
+ kfree(s);
+ }
+}
+
+static int powernv_sensor_init(u32 sensor_id, const struct device_node *np,
+ enum sensors sensor_type, enum attributes attr_type,
+ u32 sensor_index)
+{
+ struct platform_device *pdev = powernv_sensor_get_pdev(sensor_type);
+ struct sensor_specific_data *tdata;
+ struct sensor_entry *sensor_entry;
+ struct sensor_data *pdata;
+ int err = 0;
+
+ if (!pdev) {
+ err = create_platform_device(sensor_type, &pdev);
+ if (err)
+ goto exit;
+
+ err = create_sensor_data(pdev);
+ if (err)
+ goto exit;
+ }
+
+ pdata = platform_get_drvdata(pdev);
+ if (!pdata) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ tdata = kzalloc(sizeof(struct sensor_specific_data), GFP_KERNEL);
+ if (!tdata) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ tdata->sensor_id = sensor_id;
+ tdata->sensor_index = sensor_index;
+
+ err = create_sensor_attr(tdata, &pdev->dev, sensor_type, attr_type);
+ if (err)
+ goto exit_free;
+
+ sensor_entry = kzalloc(sizeof(struct sensor_entry), GFP_KERNEL);
+ if (!sensor_entry) {
+ err = -ENOMEM;
+ goto exit_attr;
+ }
+
+ sensor_entry->sensor_data = tdata;
+
+ list_add_tail(&sensor_entry->list, &pdata->sensor_list);
+
+ return 0;
+exit_attr:
+ device_remove_file(&pdev->dev, &tdata->sd_attr.dev_attr);
+exit_free:
+ kfree(tdata);
+exit:
+ return err;
+}
+
+static void delete_unregister_sensors(void)
+{
+ struct pdev_entry *p, *n;
+
+ list_for_each_entry_safe(p, n, &pdev_list, list) {
+ struct sensor_data *pdata = platform_get_drvdata(p->pdev);
+ if (pdata) {
+ delete_sensor_attr(pdata);
+
+ hwmon_device_unregister(pdata->hwmon_dev);
+ kfree(pdata);
+ }
+ platform_device_unregister(p->pdev);
+ list_del(&p->list);
+ kfree(p);
+ }
+}
+
+static int __init powernv_hwmon_init(void)
+{
+ struct device_node *opal, *np = NULL;
+ enum attributes attr_type;
+ enum sensors type;
+ const u32 *sensor_id;
+ u32 sensor_index;
+ int err;
+
+ opal = of_find_node_by_path("/ibm,opal/sensors");
+ if (!opal) {
+ pr_err("%s: Opal 'sensors' node not found\n", __func__);
+ return -ENXIO;
+ }
+
+ for_each_child_of_node(opal, np) {
+ if (np->name == NULL)
+ continue;
+
+ for (type = 0; type < MAX_SENSOR_TYPE; type++)
+ if (of_device_is_compatible(np,
+ sensor_names[type].compaible))
+ break;
+
+ if (type == MAX_SENSOR_TYPE)
+ continue;
+
+ if (get_sensor_attr_properties(np->name, type, &attr_type,
+ &sensor_index))
+ continue;
+
+ sensor_id = of_get_property(np, "sensor-id", NULL);
+ if (!sensor_id) {
+ pr_info("%s: %s doesn't have sensor-id\n", __func__,
+ np->name);
+ continue;
+ }
+
+ err = powernv_sensor_init(*sensor_id, np, type, attr_type,
+ sensor_index);
+ if (err) {
+ of_node_put(opal);
+ goto exit;
+ }
+ }
+ of_node_put(opal);
+
+ return 0;
+exit:
+ delete_unregister_sensors();
+ return err;
+
+}
+
+static void powernv_hwmon_exit(void)
+{
+ delete_unregister_sensors();
+}
+
+module_init(powernv_hwmon_init);
+module_exit(powernv_hwmon_exit);
^ permalink raw reply related
* [PATCH 1/2] powerpc/powernv: Enable fetching of platform sensor data
From: Neelesh Gupta @ 2014-03-07 5:33 UTC (permalink / raw)
To: linuxppc-dev; +Cc: sbhat
In-Reply-To: <20140307053236.3547.55729.stgit@neelegup-tp-t420.in.ibm.com>
This patch enables fetching of various platform sensor data through
OPAL and expects a sensor handle from the driver to pass to OPAL.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/opal.h | 4 ++
arch/powerpc/platforms/powernv/Makefile | 2 -
arch/powerpc/platforms/powernv/opal-sensor.c | 64 ++++++++++++++++++++++++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1
4 files changed, 70 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/powernv/opal-sensor.c
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 60b3edc..a1cc4dd 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -159,6 +159,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
#define OPAL_GET_MSG 85
#define OPAL_CHECK_ASYNC_COMPLETION 86
#define OPAL_SYNC_HOST_REBOOT 87
+#define OPAL_SENSOR_READ 88
#define OPAL_GET_PARAM 89
#define OPAL_SET_PARAM 90
@@ -847,6 +848,8 @@ int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
size_t length);
int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
size_t length);
+int64_t opal_sensor_read(uint32_t sensor_hndl, int token,
+ uint32_t *sensor_data);
/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
@@ -875,6 +878,7 @@ extern int opal_async_get_token_interruptible(void);
extern int __opal_async_release_token(int token);
extern int opal_async_release_token(int token);
extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
+extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
extern void hvc_opal_init_early(void);
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index e6166d3..00ae938 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,6 +1,6 @@
obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o
obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o opal-sysparam.o
-obj-y += rng.o
+obj-y += rng.o opal-sensor.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_PCI) += pci.o pci-p5ioc2.o pci-ioda.o
diff --git a/arch/powerpc/platforms/powernv/opal-sensor.c b/arch/powerpc/platforms/powernv/opal-sensor.c
new file mode 100644
index 0000000..663cc9c
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-sensor.c
@@ -0,0 +1,64 @@
+/*
+ * PowerNV sensor code
+ *
+ * Copyright (C) 2013 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include <asm/opal.h>
+
+static DEFINE_MUTEX(opal_sensor_mutex);
+
+/*
+ * This will return sensor information to driver based on the requested sensor
+ * handle. A handle is an opaque id for the powernv, read by the driver from the
+ * device tree..
+ */
+int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data)
+{
+ int ret, token;
+ struct opal_msg msg;
+
+ token = opal_async_get_token_interruptible();
+ if (token < 0) {
+ pr_err("%s: Couldn't get the token, returning\n", __func__);
+ ret = token;
+ goto out;
+ }
+
+ mutex_lock(&opal_sensor_mutex);
+ ret = opal_sensor_read(sensor_hndl, token, sensor_data);
+ if (ret != OPAL_ASYNC_COMPLETION)
+ goto out_token;
+
+ ret = opal_async_wait_response(token, &msg);
+ if (ret) {
+ pr_err("%s: Failed to wait for the async response, %d\n",
+ __func__, ret);
+ goto out_token;
+ }
+
+ ret = msg.params[1];
+
+out_token:
+ mutex_unlock(&opal_sensor_mutex);
+ opal_async_release_token(token);
+out:
+ return ret;
+}
+EXPORT_SYMBOL_GPL(opal_get_sensor_data);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 0afdeca..4279e30 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -129,5 +129,6 @@ OPAL_CALL(opal_update_flash, OPAL_FLASH_UPDATE);
OPAL_CALL(opal_get_msg, OPAL_GET_MSG);
OPAL_CALL(opal_check_completion, OPAL_CHECK_ASYNC_COMPLETION);
OPAL_CALL(opal_sync_host_reboot, OPAL_SYNC_HOST_REBOOT);
+OPAL_CALL(opal_sensor_read, OPAL_SENSOR_READ);
OPAL_CALL(opal_get_param, OPAL_GET_PARAM);
OPAL_CALL(opal_set_param, OPAL_SET_PARAM);
^ permalink raw reply related
* [PATCH 0/2] Enable powernv based platform sensors
From: Neelesh Gupta @ 2014-03-07 5:33 UTC (permalink / raw)
To: linuxppc-dev; +Cc: sbhat
This patchset contains the enablement code to expose platform sensor data
on powernv platform. First patch fetches the sensor data from the firmware
and second patch being an hwmon driver, enables the sysfs interfaces.
---
Neelesh Gupta (1):
powerpc/powernv: Enable fetching of platform sensor data
Shivaprasad G Bhat (1):
powerpc/powernv: hwmon driver for power values, fan rpm and temperature
arch/powerpc/include/asm/opal.h | 4
arch/powerpc/platforms/powernv/Makefile | 2
arch/powerpc/platforms/powernv/opal-sensor.c | 64 +++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1
drivers/hwmon/Kconfig | 8
drivers/hwmon/Makefile | 1
drivers/hwmon/ibmpowernv.c | 529 ++++++++++++++++++++++++
7 files changed, 608 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/powernv/opal-sensor.c
create mode 100644 drivers/hwmon/ibmpowernv.c
--
Signature
^ permalink raw reply
* [PATCH] powerpc/powernv: Enable reading and updating of system parameters
From: Neelesh Gupta @ 2014-03-07 5:32 UTC (permalink / raw)
To: linuxppc-dev
This patch enables reading and updating of system parameters through
OPAL call.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/opal.h | 14 +
arch/powerpc/platforms/powernv/Makefile | 2
arch/powerpc/platforms/powernv/opal-sysparam.c | 290 ++++++++++++++++++++++++
arch/powerpc/platforms/powernv/opal-wrappers.S | 2
arch/powerpc/platforms/powernv/opal.c | 2
5 files changed, 309 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/powernv/opal-sysparam.c
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 90fad59..60b3edc 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -159,6 +159,8 @@ extern int opal_enter_rtas(struct rtas_args *args,
#define OPAL_GET_MSG 85
#define OPAL_CHECK_ASYNC_COMPLETION 86
#define OPAL_SYNC_HOST_REBOOT 87
+#define OPAL_GET_PARAM 89
+#define OPAL_SET_PARAM 90
#ifndef __ASSEMBLY__
@@ -398,6 +400,13 @@ enum OpalLPCAddressType {
OPAL_LPC_FW = 2,
};
+/* System parameter permission */
+enum OpalSysparamPerm {
+ OPAL_SYSPARAM_READ = 0x1,
+ OPAL_SYSPARAM_WRITE = 0x2,
+ OPAL_SYSPARAM_RW = (OPAL_SYSPARAM_READ | OPAL_SYSPARAM_WRITE),
+};
+
struct opal_msg {
uint32_t msg_type;
uint32_t reserved;
@@ -834,6 +843,10 @@ int64_t opal_update_flash(uint64_t blk_list);
int64_t opal_get_msg(uint64_t buffer, size_t size);
int64_t opal_check_completion(uint64_t buffer, size_t size, uint64_t token);
int64_t opal_sync_host_reboot(void);
+int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
+ size_t length);
+int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
+ size_t length);
/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
@@ -871,6 +884,7 @@ extern void opal_get_rtc_time(struct rtc_time *tm);
extern unsigned long opal_get_boot_time(void);
extern void opal_nvram_init(void);
extern void opal_flash_init(void);
+extern void opal_sys_param_init(void);
extern int opal_machine_check(struct pt_regs *regs);
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index c0f85ea..e6166d3 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,5 +1,5 @@
obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o
-obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
+obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o opal-sysparam.o
obj-y += rng.o
obj-$(CONFIG_SMP) += smp.o
diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c b/arch/powerpc/platforms/powernv/opal-sysparam.c
new file mode 100644
index 0000000..0bd249a
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-sysparam.c
@@ -0,0 +1,290 @@
+/*
+ * PowerNV system parameter code
+ *
+ * Copyright (C) 2013 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kobject.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/gfp.h>
+#include <linux/stat.h>
+#include <asm/opal.h>
+
+#define MAX_PARAM_DATA_LEN 64
+
+static DEFINE_MUTEX(opal_sysparam_mutex);
+static struct kobject *sysparam_kobj;
+static void *param_data_buf;
+
+struct param_attr {
+ struct list_head list;
+ u32 param_id;
+ u32 param_size;
+ struct kobj_attribute kobj_attr;
+};
+
+static int opal_get_sys_param(u32 param_id, u32 length, void *buffer)
+{
+ struct opal_msg msg;
+ int ret, token;
+
+ token = opal_async_get_token_interruptible();
+ if (token < 0) {
+ if (token != -ERESTARTSYS)
+ pr_err("%s: Couldn't get the token, returning\n",
+ __func__);
+ ret = token;
+ goto out;
+ }
+
+ ret = opal_get_param(token, param_id, (u64)buffer, length);
+ if (ret != OPAL_ASYNC_COMPLETION)
+ goto out_token;
+
+ ret = opal_async_wait_response(token, &msg);
+ if (ret) {
+ pr_err("%s: Failed to wait for the async response, %d\n",
+ __func__, ret);
+ goto out_token;
+ }
+
+ ret = msg.params[1];
+
+out_token:
+ opal_async_release_token(token);
+out:
+ return ret;
+}
+
+static int opal_set_sys_param(u32 param_id, u32 length, void *buffer)
+{
+ struct opal_msg msg;
+ int ret, token;
+
+ token = opal_async_get_token_interruptible();
+ if (token < 0) {
+ if (token != -ERESTARTSYS)
+ pr_err("%s: Couldn't get the token, returning\n",
+ __func__);
+ ret = token;
+ goto out;
+ }
+
+ ret = opal_set_param(token, param_id, (u64)buffer, length);
+
+ if (ret != OPAL_ASYNC_COMPLETION)
+ goto out_token;
+
+ ret = opal_async_wait_response(token, &msg);
+ if (ret) {
+ pr_err("%s: Failed to wait for the async response, %d\n",
+ __func__, ret);
+ goto out_token;
+ }
+
+ ret = msg.params[1];
+
+out_token:
+ opal_async_release_token(token);
+out:
+ return ret;
+}
+
+static ssize_t sys_param_show(struct kobject *kobj,
+ struct kobj_attribute *kobj_attr, char *buf)
+{
+ struct param_attr *attr = container_of(kobj_attr, struct param_attr,
+ kobj_attr);
+ int ret;
+
+ mutex_lock(&opal_sysparam_mutex);
+ ret = opal_get_sys_param(attr->param_id, attr->param_size,
+ param_data_buf);
+ if (ret)
+ goto out;
+
+ memcpy(buf, param_data_buf, attr->param_size);
+
+out:
+ mutex_unlock(&opal_sysparam_mutex);
+ return ret ? ret : attr->param_size;
+}
+
+static ssize_t sys_param_store(struct kobject *kobj,
+ struct kobj_attribute *kobj_attr, const char *buf, size_t count)
+{
+ struct param_attr *attr = container_of(kobj_attr, struct param_attr,
+ kobj_attr);
+ int ret;
+
+ mutex_lock(&opal_sysparam_mutex);
+ memcpy(param_data_buf, buf, count);
+ ret = opal_set_sys_param(attr->param_id, attr->param_size,
+ param_data_buf);
+ mutex_unlock(&opal_sysparam_mutex);
+ return ret ? ret : count;
+}
+
+void __init opal_sys_param_init(void)
+{
+ struct device_node *sysparam;
+ struct param_attr *attr;
+ u32 *id, *size;
+ int count, i;
+ u8 *perm;
+
+ if (!opal_kobj) {
+ pr_warn("SYSPARAM: opal kobject is not available\n");
+ goto out;
+ }
+
+ sysparam_kobj = kobject_create_and_add("sysparams", opal_kobj);
+ if (!sysparam_kobj) {
+ pr_err("SYSPARAM: Failed to create sysparam kobject\n");
+ goto out;
+ }
+
+ /* Allocate big enough buffer for any get/set transactions */
+ param_data_buf = kzalloc(MAX_PARAM_DATA_LEN, GFP_KERNEL);
+ if (!param_data_buf) {
+ pr_err("SYSPARAM: Failed to allocate memory for param data "
+ "buf\n");
+ goto out_kobj_put;
+ }
+
+ sysparam = of_find_node_by_path("/ibm,opal/sysparams");
+ if (!sysparam) {
+ pr_err("SYSPARAM: Opal sysparam node not found\n");
+ goto out_param_buf;
+ }
+
+ if (!of_device_is_compatible(sysparam, "ibm,opal-sysparams")) {
+ pr_err("SYSPARAM: Opal sysparam node not compatible\n");
+ goto out_node_put;
+ }
+
+ /* Number of parameters exposed through DT */
+ count = of_property_count_strings(sysparam, "param-name");
+ if (count < 0) {
+ pr_err("SYSPARAM: No string found of property param-name in "
+ "the node %s\n", sysparam->name);
+ goto out_node_put;
+ }
+
+ id = kzalloc(sizeof(*id) * count, GFP_KERNEL);
+ if (!id) {
+ pr_err("SYSPARAM: Failed to allocate memory to read parameter "
+ "id\n");
+ goto out_node_put;
+ }
+
+ size = kzalloc(sizeof(*size) * count, GFP_KERNEL);
+ if (!size) {
+ pr_err("SYSPARAM: Failed to allocate memory to read parameter "
+ "size\n");
+ goto out_free_id;
+ }
+
+ perm = kzalloc(sizeof(*perm) * count, GFP_KERNEL);
+ if (!perm) {
+ pr_err("SYSPARAM: Failed to allocate memory to read supported "
+ "action on the parameter");
+ goto out_free_size;
+ }
+
+ if (of_property_read_u32_array(sysparam, "param-id", id, count)) {
+ pr_err("SYSPARAM: Missing property param-id in the DT\n");
+ goto out_free_perm;
+ }
+
+ if (of_property_read_u32_array(sysparam, "param-len", size, count)) {
+ pr_err("SYSPARAM: Missing propery param-len in the DT\n");
+ goto out_free_perm;
+ }
+
+
+ if (of_property_read_u8_array(sysparam, "param-perm", perm, count)) {
+ pr_err("SYSPARAM: Missing propery param-perm in the DT\n");
+ goto out_free_perm;
+ }
+
+ attr = kzalloc(sizeof(*attr) * count, GFP_KERNEL);
+ if (!attr) {
+ pr_err("SYSPARAM: Failed to allocate memory for parameter "
+ "attributes\n");
+ goto out_free_perm;
+ }
+
+ /* For each of the parameters, populate the parameter attributes */
+ for (i = 0; i < count; i++) {
+ sysfs_attr_init(&attr[i].kobj_attr.attr);
+ attr[i].param_id = id[i];
+ attr[i].param_size = size[i];
+ if (of_property_read_string_index(sysparam, "param-name", i,
+ &attr[i].kobj_attr.attr.name))
+ continue;
+
+ /* If the parameter is read-only or read-write */
+ switch (perm[i] & 3) {
+ case OPAL_SYSPARAM_READ:
+ attr[i].kobj_attr.attr.mode = S_IRUGO;
+ break;
+ case OPAL_SYSPARAM_WRITE:
+ attr[i].kobj_attr.attr.mode = S_IWUGO;
+ break;
+ case OPAL_SYSPARAM_RW:
+ attr[i].kobj_attr.attr.mode = S_IRUGO | S_IWUGO;
+ break;
+ default:
+ break;
+ }
+
+ attr[i].kobj_attr.show = sys_param_show;
+ attr[i].kobj_attr.store = sys_param_store;
+
+ if (sysfs_create_file(sysparam_kobj, &attr[i].kobj_attr.attr)) {
+ pr_err("SYSPARAM: Failed to create sysfs file %s\n",
+ attr[i].kobj_attr.attr.name);
+ goto out_free_attr;
+ }
+ }
+
+ kfree(perm);
+ kfree(size);
+ kfree(id);
+ of_node_put(sysparam);
+ return;
+
+out_free_attr:
+ kfree(attr);
+out_free_perm:
+ kfree(perm);
+out_free_size:
+ kfree(size);
+out_free_id:
+ kfree(id);
+out_node_put:
+ of_node_put(sysparam);
+out_param_buf:
+ kfree(param_data_buf);
+out_kobj_put:
+ kobject_put(sysparam_kobj);
+out:
+ return;
+}
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 3e8829c..0afdeca 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -129,3 +129,5 @@ OPAL_CALL(opal_update_flash, OPAL_FLASH_UPDATE);
OPAL_CALL(opal_get_msg, OPAL_GET_MSG);
OPAL_CALL(opal_check_completion, OPAL_CHECK_ASYNC_COMPLETION);
OPAL_CALL(opal_sync_host_reboot, OPAL_SYNC_HOST_REBOOT);
+OPAL_CALL(opal_get_param, OPAL_GET_PARAM);
+OPAL_CALL(opal_set_param, OPAL_SET_PARAM);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index 65499ad..4fad36a 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -474,6 +474,8 @@ static int __init opal_init(void)
if (rc == 0) {
/* Setup code update interface */
opal_flash_init();
+ /* Setup system parameters interface */
+ opal_sys_param_init();
}
return 0;
^ permalink raw reply related
* [PATCH] powerpc/powernv: Infrastructure to support OPAL async completion
From: Neelesh Gupta @ 2014-03-07 5:30 UTC (permalink / raw)
To: linuxppc-dev
This patch adds support for notifying the clients of their request
completion. Clients request for the token before making OPAL call
and then wait for the response.
This patch uses messaging infrastructure to pull the data to linux
by registering itself for the message type OPAL_MSG_ASYNC_COMP.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/include/asm/opal.h | 12 +-
arch/powerpc/platforms/powernv/Makefile | 2
arch/powerpc/platforms/powernv/opal-async.c | 203 +++++++++++++++++++++++++++
3 files changed, 215 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/platforms/powernv/opal-async.c
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index ed82142..90fad59 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -83,6 +83,8 @@ extern int opal_enter_rtas(struct rtas_args *args,
#define OPAL_INTERNAL_ERROR -11
#define OPAL_BUSY_EVENT -12
#define OPAL_HARDWARE_FROZEN -13
+#define OPAL_WRONG_STATE -14
+#define OPAL_ASYNC_COMPLETION -15
/* API Tokens (in r0) */
#define OPAL_CONSOLE_WRITE 1
@@ -241,7 +243,9 @@ enum OpalPendingState {
};
enum OpalMessageType {
- OPAL_MSG_ASYNC_COMP = 0,
+ OPAL_MSG_ASYNC_COMP = 0, /* params[0] = token, params[1] = rc,
+ * additional params function-specific
+ */
OPAL_MSG_MEM_ERR,
OPAL_MSG_EPOW,
OPAL_MSG_SHUTDOWN,
@@ -853,6 +857,12 @@ extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
+extern int __opal_async_get_token(void);
+extern int opal_async_get_token_interruptible(void);
+extern int __opal_async_release_token(int token);
+extern int opal_async_release_token(int token);
+extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
+
extern void hvc_opal_init_early(void);
struct rtc_time;
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index 8d767fd..c0f85ea 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,4 +1,4 @@
-obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o
+obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o
obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
obj-y += rng.o
diff --git a/arch/powerpc/platforms/powernv/opal-async.c b/arch/powerpc/platforms/powernv/opal-async.c
new file mode 100644
index 0000000..cd0c135
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-async.c
@@ -0,0 +1,203 @@
+/*
+ * PowerNV OPAL asynchronous completion interfaces
+ *
+ * Copyright 2013 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/semaphore.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <linux/gfp.h>
+#include <linux/of.h>
+#include <asm/opal.h>
+
+#define N_ASYNC_COMPLETIONS 64
+
+static DECLARE_BITMAP(opal_async_complete_map, N_ASYNC_COMPLETIONS) = {~0UL};
+static DECLARE_BITMAP(opal_async_token_map, N_ASYNC_COMPLETIONS);
+static DECLARE_WAIT_QUEUE_HEAD(opal_async_wait);
+static DEFINE_SPINLOCK(opal_async_comp_lock);
+static struct semaphore opal_async_sem;
+static struct opal_msg *opal_async_responses;
+static unsigned int opal_max_async_tokens;
+
+int __opal_async_get_token(void)
+{
+ unsigned long flags;
+ int token;
+
+ spin_lock_irqsave(&opal_async_comp_lock, flags);
+ token = find_first_bit(opal_async_complete_map, opal_max_async_tokens);
+ if (token >= opal_max_async_tokens) {
+ token = -EBUSY;
+ goto out;
+ }
+
+ if (__test_and_set_bit(token, opal_async_token_map)) {
+ token = -EBUSY;
+ goto out;
+ }
+
+ __clear_bit(token, opal_async_complete_map);
+
+out:
+ spin_unlock_irqrestore(&opal_async_comp_lock, flags);
+ return token;
+}
+
+int opal_async_get_token_interruptible(void)
+{
+ int token;
+
+ /* Wait until a token is available */
+ if (down_interruptible(&opal_async_sem))
+ return -ERESTARTSYS;
+
+ token = __opal_async_get_token();
+ if (token < 0)
+ up(&opal_async_sem);
+
+ return token;
+}
+
+int __opal_async_release_token(int token)
+{
+ unsigned long flags;
+
+ if (token < 0 || token >= opal_max_async_tokens) {
+ pr_err("%s: Passed token is out of range, token %d\n",
+ __func__, token);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(&opal_async_comp_lock, flags);
+ __set_bit(token, opal_async_complete_map);
+ __clear_bit(token, opal_async_token_map);
+ spin_unlock_irqrestore(&opal_async_comp_lock, flags);
+
+ return 0;
+}
+
+int opal_async_release_token(int token)
+{
+ int ret;
+
+ ret = __opal_async_release_token(token);
+ if (ret)
+ return ret;
+
+ up(&opal_async_sem);
+
+ return 0;
+}
+
+int opal_async_wait_response(uint64_t token, struct opal_msg *msg)
+{
+ if (token >= opal_max_async_tokens) {
+ pr_err("%s: Invalid token passed\n", __func__);
+ return -EINVAL;
+ }
+
+ if (!msg) {
+ pr_err("%s: Invalid message pointer passed\n", __func__);
+ return -EINVAL;
+ }
+
+ wait_event(opal_async_wait, test_bit(token, opal_async_complete_map));
+ memcpy(msg, &opal_async_responses[token], sizeof(*msg));
+
+ return 0;
+}
+
+static int opal_async_comp_event(struct notifier_block *nb,
+ unsigned long msg_type, void *msg)
+{
+ struct opal_msg *comp_msg = msg;
+ unsigned long flags;
+
+ if (msg_type != OPAL_MSG_ASYNC_COMP)
+ return 0;
+
+ memcpy(&opal_async_responses[comp_msg->params[0]], comp_msg,
+ sizeof(*comp_msg));
+ spin_lock_irqsave(&opal_async_comp_lock, flags);
+ __set_bit(comp_msg->params[0], opal_async_complete_map);
+ spin_unlock_irqrestore(&opal_async_comp_lock, flags);
+
+ wake_up(&opal_async_wait);
+
+ return 0;
+}
+
+static struct notifier_block opal_async_comp_nb = {
+ .notifier_call = opal_async_comp_event,
+ .next = NULL,
+ .priority = 0,
+};
+
+static int __init opal_async_comp_init(void)
+{
+ struct device_node *opal_node;
+ const __be32 *async;
+ int err;
+
+ opal_node = of_find_node_by_path("/ibm,opal");
+ if (!opal_node) {
+ pr_err("%s: Opal node not found\n", __func__);
+ err = -ENOENT;
+ goto out;
+ }
+
+ async = of_get_property(opal_node, "opal-msg-async-num", NULL);
+ if (!async) {
+ pr_err("%s: %s has no opal-msg-async-num\n",
+ __func__, opal_node->full_name);
+ err = -ENOENT;
+ goto out_opal_node;
+ }
+
+ opal_max_async_tokens = be32_to_cpup(async);
+ if (opal_max_async_tokens > N_ASYNC_COMPLETIONS)
+ opal_max_async_tokens = N_ASYNC_COMPLETIONS;
+
+ err = opal_message_notifier_register(OPAL_MSG_ASYNC_COMP,
+ &opal_async_comp_nb);
+ if (err) {
+ pr_err("%s: Can't register OPAL event notifier (%d)\n",
+ __func__, err);
+ goto out_opal_node;
+ }
+
+ opal_async_responses = kzalloc(
+ sizeof(*opal_async_responses) * opal_max_async_tokens,
+ GFP_KERNEL);
+ if (!opal_async_responses) {
+ pr_err("%s: Out of memory, failed to do asynchronous "
+ "completion init\n", __func__);
+ err = -ENOMEM;
+ goto out_opal_node;
+ }
+
+ /* Initialize to 1 less than the maximum tokens available, as we may
+ * require to pop one during emergency through synchronous call to
+ * __opal_async_get_token()
+ */
+ sema_init(&opal_async_sem, opal_max_async_tokens - 1);
+
+out_opal_node:
+ of_node_put(opal_node);
+out:
+ return err;
+}
+subsys_initcall(opal_async_comp_init);
^ permalink raw reply related
* Re: [PATCH] kexec/powerpc: fix exporting memory limit
From: Nikita Yushchenko @ 2014-03-07 4:38 UTC (permalink / raw)
To: Michael Ellerman
Cc: yadviga, lugovskoy, kexec, linux-kernel, Paul Mackerras,
Anton Blanchard, Mahesh Salgaonkar, Hari Bathini, linuxppc-dev
In-Reply-To: <1394153258.21206.1.camel@concordia>
> On Thu, 2014-03-06 at 18:24 +0400, Nikita Yushchenko wrote:
> > When preparing dump-capturing kernel, kexec userspace tool needs to
> > know actual amount of memory used by the running kernel. This may
> > differ from extire available DRAM for a couple of reasons. To address
> > this issue, kdump kernel support code injects several attributes into
> > device tree that are later captured by userspace kexec tool via /proc
> > interface.
> >
> > One such attrubute is 'chosen/linux,memory_limit' that is used to pass
> > memory limit of the running kernel.
> >
> > This was initialized using kernel's 'memory_limit' variable, that is
> > set by early init code based on mem= kernel parameter and other
> > reasons.
> >
> > But there are cases when memory_limit variable does not contain proper
> > information. One such case is when !CONFIG_HIGHMEM kernel runs on
> > system with memory large enough not to fit into lowmem.
>
> Why doesn't the !CONFIG_HIGHMEM code update memory_limit to reflect
> reality.
I guess because memory_limit is used for ... well, memory limit, set by
mem=. And for the rest memblock is used (and it *is* updated).
And code elsewhere does use memblock, see e.g. numa_enforce_memory_limit()
in arch/powerpc/mm/numa.c
In MMU init (MMU_init() in arch/powerpc/mm/init_32.c -which is the point
where final memory configuration is set) memblock, not memory_limit, is
both used and updated.
^ permalink raw reply
* [PATCH 8/9] powerpc/85xx: add save/restore functions for core registers
From: Chenhui Zhao @ 2014-03-07 4:58 UTC (permalink / raw)
To: linuxppc-dev; +Cc: scottwood, linux-kernel, Jason.Jin
In-Reply-To: <1394168285-32275-1-git-send-email-chenhui.zhao@freescale.com>
From: Wang Dongsheng <dongsheng.wang@freescale.com>
Add booke_cpu_state_save() and booke_cpu_state_restore() functions which can be
used to save/restore CPU's registers in the case of deep sleep and hibernation.
Supported processors: E6500, E5500, E500MC, E500v2 and E500v1.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
---
arch/powerpc/include/asm/booke_save_regs.h | 96 ++++++++
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/kernel/booke_save_regs.S | 361 ++++++++++++++++++++++++++++
3 files changed, 458 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/booke_save_regs.h
create mode 100644 arch/powerpc/kernel/booke_save_regs.S
diff --git a/arch/powerpc/include/asm/booke_save_regs.h b/arch/powerpc/include/asm/booke_save_regs.h
new file mode 100644
index 0000000..87c357a
--- /dev/null
+++ b/arch/powerpc/include/asm/booke_save_regs.h
@@ -0,0 +1,96 @@
+/*
+ * Save/restore e500 series core registers
+ *
+ * Author: Wang Dongsheng <dongsheng.wang@freescale.com>
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_FSL_SLEEP_H
+#define __ASM_FSL_SLEEP_H
+
+/*
+ * 8 bytes for each register, which is compatible with
+ * both 32-bit and 64-bit registers
+ *
+ * Acronyms:
+ * dw(data width) 0x08
+ *
+ * Map:
+ * General-Purpose Registers
+ * GPR1(sp) 0
+ * GPR2 0x8 (dw * 1)
+ * GPR13 - GPR31 0x10 ~ 0xa0 (dw * 2 ~ dw * 20)
+ * Foating-point registers
+ * FPR14 - FPR31 0xa8 ~ 0x130 (dw * 21 ~ dw * 38)
+ * Registers for Branch Operations
+ * CR 0x138 (dw * 39)
+ * LR 0x140 (dw * 40)
+ * Processor Control Registers
+ * MSR 0x148 (dw * 41)
+ * EPCR 0x150 (dw * 42)
+ *
+ * Only e500, e500v2 need to save HID0 - HID1
+ * HID0 - HID1 0x158 ~ 0x160 (dw * 43 ~ dw * 44)
+ * Timer Registers
+ * TCR 0x168 (dw * 45)
+ * TB(64bit) 0x170 (dw * 46)
+ * TBU(32bit) 0x178 (dw * 47)
+ * TBL(32bit) 0x180 (dw * 48)
+ * Interrupt Registers
+ * IVPR 0x188 (dw * 49)
+ * IVOR0 - IVOR15 0x190 ~ 0x208 (dw * 50 ~ dw * 65)
+ * IVOR32 - IVOR41 0x210 ~ 0x258 (dw * 66 ~ dw * 75)
+ * Software-Use Registers
+ * SPRG1 0x260 (dw * 76), 64-bit need to save.
+ * SPRG3 0x268 (dw * 77), 32-bit need to save.
+ * MMU Registers
+ * PID0 - PID2 0x270 ~ 0x280 (dw * 78 ~ dw * 80)
+ * Debug Registers
+ * DBCR0 - DBCR2 0x288 ~ 0x298 (dw * 81 ~ dw * 83)
+ * IAC1 - IAC4 0x2a0 ~ 0x2b8 (dw * 84 ~ dw * 87)
+ * DAC1 - DAC2 0x2c0 ~ 0x2c8 (dw * 88 ~ dw * 89)
+ *
+ */
+
+#define SR_GPR1 0x000
+#define SR_GPR2 0x008
+#define SR_GPR13 0x010
+#define SR_FPR14 0x0a8
+#define SR_CR 0x138
+#define SR_LR 0x140
+#define SR_MSR 0x148
+#define SR_EPCR 0x150
+#define SR_HID0 0x158
+#define SR_TCR 0x168
+#define SR_TB 0x170
+#define SR_TBU 0x178
+#define SR_TBL 0x180
+#define SR_IVPR 0x188
+#define SR_IVOR0 0x190
+#define SR_IVOR32 0x210
+#define SR_SPRG1 0x260
+#define SR_SPRG3 0x268
+#define SR_PID0 0x270
+#define SR_DBCR0 0x288
+#define SR_IAC1 0x2a0
+#define SR_DAC1 0x2c0
+#define REGS_BUFFER_SIZE (SR_DAC1 + 0x10)
+
+/*
+ * hibernation and deepsleep save/restore different number of registers,
+ * use these flags to indicate.
+ */
+#define HIBERNATION_FLAG 1
+#define DEEPSLEEP_FLAG 2
+
+#ifndef __ASSEMBLY__
+extern void booke_cpu_state_save(void *buf, int type);
+extern void *booke_cpu_state_restore(void *buf, int type);
+#endif
+#endif
+
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index fcc9a89..64acae6 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp_booke.o
else
obj-$(CONFIG_HIBERNATION) += swsusp_$(CONFIG_WORD_SIZE).o
endif
+obj-$(CONFIG_E500) += booke_save_regs.o
obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_44x) += cpu_setup_44x.o
diff --git a/arch/powerpc/kernel/booke_save_regs.S b/arch/powerpc/kernel/booke_save_regs.S
new file mode 100644
index 0000000..9ccd576
--- /dev/null
+++ b/arch/powerpc/kernel/booke_save_regs.S
@@ -0,0 +1,361 @@
+/*
+ * Freescale Power Management, Save/Restore core state
+ *
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ * Author: Wang Dongsheng <dongsheng.wang@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/ppc_asm.h>
+#include <asm/booke_save_regs.h>
+
+/*
+ * Supported Core List:
+ * E500v1, E500v2, E500MC, E5500, E6500.
+ */
+
+/* Save/Restore register operation define */
+#define do_save_gpr_reg(reg, addr) \
+ PPC_STL reg, addr(r10)
+
+#define do_save_fpr_reg(reg, addr) \
+ stfd reg, addr(r10)
+
+#define do_save_spr_reg(reg, addr) \
+ mfspr r0, SPRN_##reg ;\
+ PPC_STL r0, addr(r10)
+
+#define do_save_special_reg(special, addr) \
+ mf##special r0 ;\
+ PPC_STL r0, addr(r10)
+
+#define do_restore_gpr_reg(reg, addr) \
+ PPC_LL reg, addr(r10)
+
+#define do_restore_fpr_reg(reg, addr) \
+ lfd reg, addr(r10)
+
+#define do_restore_spr_reg(reg, addr) \
+ PPC_LL r0, addr(r10) ;\
+ mtspr SPRN_##reg, r0
+
+#define do_restore_special_reg(special, addr) \
+ PPC_LL r0, addr(r10) ;\
+ mt##special r0
+
+#define do_sr_general_gpr_regs(func) \
+ do_##func##_gpr_reg(r1, SR_GPR1) ;\
+ do_##func##_gpr_reg(r2, SR_GPR2) ;\
+ do_##func##_gpr_reg(r13, SR_GPR13 + 0x00) ;\
+ do_##func##_gpr_reg(r14, SR_GPR13 + 0x08) ;\
+ do_##func##_gpr_reg(r15, SR_GPR13 + 0x10) ;\
+ do_##func##_gpr_reg(r16, SR_GPR13 + 0x18) ;\
+ do_##func##_gpr_reg(r17, SR_GPR13 + 0x20) ;\
+ do_##func##_gpr_reg(r18, SR_GPR13 + 0x28) ;\
+ do_##func##_gpr_reg(r19, SR_GPR13 + 0x30) ;\
+ do_##func##_gpr_reg(r20, SR_GPR13 + 0x38) ;\
+ do_##func##_gpr_reg(r21, SR_GPR13 + 0x40) ;\
+ do_##func##_gpr_reg(r22, SR_GPR13 + 0x48) ;\
+ do_##func##_gpr_reg(r23, SR_GPR13 + 0x50) ;\
+ do_##func##_gpr_reg(r24, SR_GPR13 + 0x58) ;\
+ do_##func##_gpr_reg(r25, SR_GPR13 + 0x60) ;\
+ do_##func##_gpr_reg(r26, SR_GPR13 + 0x68) ;\
+ do_##func##_gpr_reg(r27, SR_GPR13 + 0x70) ;\
+ do_##func##_gpr_reg(r28, SR_GPR13 + 0x78) ;\
+ do_##func##_gpr_reg(r29, SR_GPR13 + 0x80) ;\
+ do_##func##_gpr_reg(r30, SR_GPR13 + 0x88) ;\
+ do_##func##_gpr_reg(r31, SR_GPR13 + 0x90)
+
+#define do_sr_general_pcr_regs(func) \
+ do_##func##_spr_reg(EPCR, SR_EPCR) ;\
+ do_##func##_spr_reg(HID0, SR_HID0 + 0x00)
+
+#define do_sr_e500_pcr_regs(func) \
+ do_##func##_spr_reg(HID1, SR_HID0 + 0x08)
+
+#define do_sr_save_tb_regs \
+ do_save_spr_reg(TBRU, SR_TBU) ;\
+ do_save_spr_reg(TBRL, SR_TBL)
+
+#define do_sr_restore_tb_regs \
+ do_restore_spr_reg(TBWU, SR_TBU) ;\
+ do_restore_spr_reg(TBWL, SR_TBL)
+
+#define do_sr_general_time_regs(func) \
+ do_sr_##func##_tb_regs ;\
+ do_##func##_spr_reg(TCR, SR_TCR)
+
+#define do_sr_interrupt_regs(func) \
+ do_##func##_spr_reg(IVPR, SR_IVPR) ;\
+ do_##func##_spr_reg(IVOR0, SR_IVOR0 + 0x00) ;\
+ do_##func##_spr_reg(IVOR1, SR_IVOR0 + 0x08) ;\
+ do_##func##_spr_reg(IVOR2, SR_IVOR0 + 0x10) ;\
+ do_##func##_spr_reg(IVOR3, SR_IVOR0 + 0x18) ;\
+ do_##func##_spr_reg(IVOR4, SR_IVOR0 + 0x20) ;\
+ do_##func##_spr_reg(IVOR5, SR_IVOR0 + 0x28) ;\
+ do_##func##_spr_reg(IVOR6, SR_IVOR0 + 0x30) ;\
+ do_##func##_spr_reg(IVOR7, SR_IVOR0 + 0x38) ;\
+ do_##func##_spr_reg(IVOR8, SR_IVOR0 + 0x40) ;\
+ do_##func##_spr_reg(IVOR10, SR_IVOR0 + 0x50) ;\
+ do_##func##_spr_reg(IVOR11, SR_IVOR0 + 0x58) ;\
+ do_##func##_spr_reg(IVOR12, SR_IVOR0 + 0x60) ;\
+ do_##func##_spr_reg(IVOR13, SR_IVOR0 + 0x68) ;\
+ do_##func##_spr_reg(IVOR14, SR_IVOR0 + 0x70) ;\
+ do_##func##_spr_reg(IVOR15, SR_IVOR0 + 0x78)
+
+#define do_e500_sr_interrupt_regs(func) \
+ do_##func##_spr_reg(IVOR32, SR_IVOR32 + 0x00) ;\
+ do_##func##_spr_reg(IVOR33, SR_IVOR32 + 0x08) ;\
+ do_##func##_spr_reg(IVOR34, SR_IVOR32 + 0x10)
+
+#define do_e500mc_sr_interrupt_regs(func) \
+ do_##func##_spr_reg(IVOR9, SR_IVOR0 + 0x48) ;\
+ do_##func##_spr_reg(IVOR35, SR_IVOR32 + 0x18) ;\
+ do_##func##_spr_reg(IVOR36, SR_IVOR32 + 0x20) ;\
+ do_##func##_spr_reg(IVOR37, SR_IVOR32 + 0x28) ;\
+ do_##func##_spr_reg(IVOR38, SR_IVOR32 + 0x30) ;\
+ do_##func##_spr_reg(IVOR39, SR_IVOR32 + 0x38) ;\
+ do_##func##_spr_reg(IVOR40, SR_IVOR32 + 0x40) ;\
+ do_##func##_spr_reg(IVOR41, SR_IVOR32 + 0x48)
+
+#define do_e5500_sr_interrupt_regs(func) \
+ do_e500mc_sr_interrupt_regs(func)
+
+#define do_e6500_sr_interrupt_regs(func) \
+ do_##func##_spr_reg(IVOR32, SR_IVOR32 + 0x00) ;\
+ do_##func##_spr_reg(IVOR33, SR_IVOR32 + 0x08) ;\
+ do_e5500_sr_interrupt_regs(func)
+
+#define do_sr_general_software_regs(func) \
+ do_##func##_spr_reg(SPRG1, SR_SPRG1) ;\
+ do_##func##_spr_reg(SPRG3, SR_SPRG3) ;\
+ do_##func##_spr_reg(PID0, SR_PID0)
+
+#define do_sr_e500_mmu_regs(func) \
+ do_##func##_spr_reg(PID1, SR_PID0 + 0x08) ;\
+ do_##func##_spr_reg(PID2, SR_PID0 + 0x10)
+
+#define do_sr_debug_regs(func) \
+ do_##func##_spr_reg(DBCR0, SR_DBCR0 + 0x00) ;\
+ do_##func##_spr_reg(DBCR1, SR_DBCR0 + 0x08) ;\
+ do_##func##_spr_reg(DBCR2, SR_DBCR0 + 0x10) ;\
+ do_##func##_spr_reg(IAC1, SR_IAC1 + 0x00) ;\
+ do_##func##_spr_reg(IAC2, SR_IAC1 + 0x08) ;\
+ do_##func##_spr_reg(DAC1, SR_DAC1 + 0x00) ;\
+ do_##func##_spr_reg(DAC2, SR_DAC1 + 0x08)
+
+#define do_e6500_sr_debug_regs(func) \
+ do_##func##_spr_reg(IAC3, SR_IAC1 + 0x10) ;\
+ do_##func##_spr_reg(IAC4, SR_IAC1 + 0x18)
+
+ .section .text
+ .align 5
+booke_cpu_base_save:
+ do_sr_general_gpr_regs(save)
+ do_sr_general_pcr_regs(save)
+ do_sr_general_software_regs(save)
+1:
+ mfspr r5, SPRN_TBRU
+ do_sr_general_time_regs(save)
+ mfspr r6, SPRN_TBRU
+ cmpw r5, r6
+ bne 1b
+
+ blr
+
+booke_cpu_base_restore:
+ do_sr_general_gpr_regs(restore)
+ do_sr_general_pcr_regs(restore)
+ do_sr_general_software_regs(restore)
+
+ isync
+
+ /* Restore Time registers, clear tb lower to avoid wrap */
+ li r0, 0
+ mtspr SPRN_TBWL, r0
+ do_sr_general_time_regs(restore)
+
+ /* clear out status */
+ mfspr r0,SPRN_TSR
+ mtspr SPRN_TSR, r0
+
+ blr
+
+/* Base registers, e500v1, e500v2 need to do some special save/restore */
+e500_base_special_save:
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V1@l
+ cmpw r11, r12
+ beq 1f
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V2@l
+ cmpw r11, r12
+ bne 2f
+1:
+ do_sr_e500_pcr_regs(save)
+ do_sr_e500_mmu_regs(save)
+2:
+ blr
+
+e500_base_special_restore:
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V1@l
+ cmpw r11, r12
+ beq 1f
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V2@l
+ cmpw r11, r12
+ bne 2f
+1:
+ do_sr_e500_pcr_regs(save)
+ do_sr_e500_mmu_regs(save)
+2:
+ blr
+
+booke_cpu_append_save:
+ mfspr r0, SPRN_PVR
+ rlwinm r11, r0, 16, 16, 31
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E6500@l
+ cmpw r11, r12
+ beq e6500_append_save
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E5500@l
+ cmpw r11, r12
+ beq e5500_append_save
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500MC@l
+ cmpw r11, r12
+ beq e500mc_append_save
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V2@l
+ cmpw r11, r12
+ beq e500v2_append_save
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V1@l
+ cmpw r11, r12
+ beq e500v1_append_save
+ b 1f
+
+e6500_append_save:
+ do_e6500_sr_interrupt_regs(save)
+ do_e6500_sr_debug_regs(save)
+ b 1f
+
+e5500_append_save:
+ do_e5500_sr_interrupt_regs(save)
+ b 1f
+
+e500mc_append_save:
+ do_e500mc_sr_interrupt_regs(save)
+ b 1f
+
+e500v2_append_save:
+e500v1_append_save:
+ do_e500_sr_interrupt_regs(save)
+1:
+ do_sr_interrupt_regs(save)
+ do_sr_debug_regs(save)
+
+ blr
+
+booke_cpu_append_restore:
+ mfspr r0, SPRN_PVR
+ rlwinm r11, r0, 16, 16, 31
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E6500@l
+ cmpw r11, r12
+ beq e6500_append_restore
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E5500@l
+ cmpw r11, r12
+ beq e5500_append_restore
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500MC@l
+ cmpw r11, r12
+ beq e500mc_append_restore
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V2@l
+ cmpw r11, r12
+ beq e500v2_append_restore
+
+ lis r12, 0
+ ori r12, r12, PVR_VER_E500V1@l
+ cmpw r11, r12
+ beq e500v1_append_restore
+ b 1f
+
+e6500_append_restore:
+ do_e6500_sr_interrupt_regs(restore)
+ do_e6500_sr_debug_regs(restore)
+ b 1f
+
+e5500_append_restore:
+ do_e5500_sr_interrupt_regs(restore)
+ b 1f
+
+e500mc_append_restore:
+ do_e500mc_sr_interrupt_regs(restore)
+ b 1f
+
+e500v2_append_restore:
+e500v1_append_restore:
+ do_e500_sr_interrupt_regs(restore)
+1:
+ do_sr_interrupt_regs(restore)
+ do_sr_debug_regs(restore)
+ sync
+
+ blr
+
+/*
+ * r3 = the address of buffer
+ * r4 = type: HIBERNATION_FLAG or DEEPSLEEP_FLAG
+ */
+_GLOBAL(booke_cpu_state_save)
+ mflr r9
+ mr r10, r3
+
+ cmpwi r4, HIBERNATION_FLAG
+ beq 1f
+ bl booke_cpu_append_save
+1:
+ bl e500_base_special_save
+ bl booke_cpu_base_save
+
+ mtlr r9
+ blr
+
+/*
+ * r3 = the address of buffer
+ * r4 = type: HIBERNATION_FLAG or DEEPSLEEP_FLAG
+ */
+_GLOBAL(booke_cpu_state_restore)
+ mflr r9
+ mr r10, r3
+
+ cmpwi r4, HIBERNATION_FLAG
+ beq 1f
+
+ bl booke_cpu_append_restore
+1:
+ bl e500_base_special_restore
+ bl booke_cpu_base_restore
+
+ mtlr r9
+ blr
--
1.7.3
^ permalink raw reply related
* [PATCH 9/9] powerpc/pm: support deep sleep feature on T1040
From: Chenhui Zhao @ 2014-03-07 4:58 UTC (permalink / raw)
To: linuxppc-dev; +Cc: scottwood, linux-kernel, Jason.Jin
In-Reply-To: <1394168285-32275-1-git-send-email-chenhui.zhao@freescale.com>
From: Zhao Chenhui <chenhui.zhao@freescale.com>
T1040 supports deep sleep feature, which can switch off most parts of
the SoC when it is in deep sleep mode. This way, it becomes more
energy-efficient.
The DDR controller will also be powered off in deep sleep. Therefore,
the last stage (the latter part of fsl_dp_enter_low) will run without DDR
access. This piece of code and related TLBs will be prefetched.
Due to the different initialization code between 32-bit and 64-bit, they
have seperate resume entry and precedure.
The feature supports 32-bit and 64-bit kernel mode.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
---
arch/powerpc/include/asm/booke_save_regs.h | 3 +
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 17 ++
arch/powerpc/kernel/head_fsl_booke.S | 30 +++
arch/powerpc/platforms/85xx/Makefile | 2 +-
arch/powerpc/platforms/85xx/deepsleep.c | 201 +++++++++++++++++++
arch/powerpc/platforms/85xx/qoriq_pm.c | 38 ++++
arch/powerpc/platforms/85xx/sleep.S | 295 ++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.h | 7 +
8 files changed, 592 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/85xx/deepsleep.c
create mode 100644 arch/powerpc/platforms/85xx/sleep.S
diff --git a/arch/powerpc/include/asm/booke_save_regs.h b/arch/powerpc/include/asm/booke_save_regs.h
index 87c357a..37c1f6c 100644
--- a/arch/powerpc/include/asm/booke_save_regs.h
+++ b/arch/powerpc/include/asm/booke_save_regs.h
@@ -88,6 +88,9 @@
#define HIBERNATION_FLAG 1
#define DEEPSLEEP_FLAG 2
+#define CPLD_FLAG 1
+#define FPGA_FLAG 2
+
#ifndef __ASSEMBLY__
extern void booke_cpu_state_save(void *buf, int type);
extern void *booke_cpu_state_restore(void *buf, int type);
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index e59d6de..ea9bc28 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -318,6 +318,23 @@ flush_backside_L2_cache:
2:
blr
+#define CPC_CPCCSR0 0x0
+#define CPC_CPCCSR0_CPCFL 0x800
+
+/* r3 : the base address of CPC */
+_GLOBAL(fsl_flush_cpc_cache)
+ lwz r6, CPC_CPCCSR0(r3)
+ ori r6, r6, CPC_CPCCSR0_CPCFL
+ stw r6, CPC_CPCCSR0(r3)
+ sync
+
+ /* Wait until completing the flush */
+1: lwz r6, CPC_CPCCSR0(r3)
+ andi. r6, r6, CPC_CPCCSR0_CPCFL
+ bne 1b
+
+ blr
+
_GLOBAL(__flush_caches_e500v2)
mflr r0
bl flush_dcache_L1
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 20204fe..3285752 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -162,6 +162,19 @@ _ENTRY(__early_start)
#include "fsl_booke_entry_mapping.S"
#undef ENTRY_MAPPING_BOOT_SETUP
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_FSL_CORENET_RCPM)
+ /* if deep_sleep_flag != 0, jump to the deep sleep resume entry */
+ LOAD_REG_ADDR(r4, deep_sleep_flag)
+ lwz r3, 0(r4)
+ cmpwi r3, 0
+ beq 11f
+ /* clear deep_sleep_flag */
+ li r3, 0
+ stw r3, 0(r4)
+ b fsl_deepsleep_resume
+11:
+#endif
+
set_ivor:
/* Establish the interrupt vector offsets */
SET_IVOR(0, CriticalInput);
@@ -343,6 +356,23 @@ set_ivor:
lwz r11, 0(r12); /* Get Linux PTE */
#endif
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_FSL_CORENET_RCPM)
+_ENTRY(__entry_deep_sleep)
+/*
+ * Bootloader will jump to here when resuming from deep sleep.
+ * After executing the init code in fsl_booke_entry_mapping.S,
+ * will jump to the real resume entry.
+ */
+ li r8, 1
+ bl 12f
+12: mflr r9
+ addi r9, r9, (deep_sleep_flag - 12b)
+ stw r8, 0(r9)
+ b __early_start
+deep_sleep_flag:
+ .long 0
+#endif
+
/*
* Interrupt vector entry code
*
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 7fae817..9a4ea86 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -3,7 +3,7 @@
#
obj-$(CONFIG_SMP) += smp.o
ifeq ($(CONFIG_FSL_CORENET_RCPM), y)
-obj-$(CONFIG_SUSPEND) += qoriq_pm.o
+obj-$(CONFIG_SUSPEND) += qoriq_pm.o deepsleep.o sleep.o
endif
obj-y += common.o
diff --git a/arch/powerpc/platforms/85xx/deepsleep.c b/arch/powerpc/platforms/85xx/deepsleep.c
new file mode 100644
index 0000000..ddd7185
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/deepsleep.c
@@ -0,0 +1,201 @@
+/*
+ * Support deep sleep feature
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Author: Chenhui Zhao <chenhui.zhao@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <asm/machdep.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/booke_save_regs.h>
+
+#define SIZE_1MB 0x100000
+#define SIZE_2MB 0x200000
+
+#define CCSR_SCFG_DPSLPCR 0xfc000
+#define CCSR_SCFG_DPSLPCR_WDRR_EN 0x1
+#define CCSR_SCFG_SPARECR2 0xfc504
+#define CCSR_SCFG_SPARECR3 0xfc508
+
+#define CCSR_GPIO1_GPDIR 0x130000
+#define CCSR_GPIO1_GPODR 0x130004
+#define CCSR_GPIO1_GPDAT 0x130008
+#define CCSR_GPIO1_GPDIR_29 0x4
+
+/* 128 bytes buffer for restoring data broke by DDR training initialization */
+#define DDR_BUF_SIZE 128
+static u8 ddr_buff[DDR_BUF_SIZE] __aligned(64);
+
+static void *dcsr_base, *ccsr_base, *pld_base;
+static int pld_flag;
+
+int fsl_dp_iomap(void)
+{
+ struct device_node *np;
+ const u32 *prop;
+ int ret = 0;
+ u64 ccsr_phy_addr, dcsr_phy_addr;
+
+ np = of_find_node_by_type(NULL, "soc");
+ if (!np) {
+ pr_err("%s: Can't find the node of \"soc\"\n", __func__);
+ ret = -EINVAL;
+ goto ccsr_err;
+ }
+ prop = of_get_property(np, "ranges", NULL);
+ if (!prop) {
+ pr_err("%s: Can't find the property of \"ranges\"\n", __func__);
+ of_node_put(np);
+ ret = -EINVAL;
+ goto ccsr_err;
+ }
+ ccsr_phy_addr = of_translate_address(np, prop + 1);
+ ccsr_base = ioremap((phys_addr_t)ccsr_phy_addr, SIZE_2MB);
+ of_node_put(np);
+ if (!ccsr_base) {
+ ret = -ENOMEM;
+ goto ccsr_err;
+ }
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,dcsr");
+ if (!np) {
+ pr_err("%s: Can't find the node of \"fsl,dcsr\"\n", __func__);
+ ret = -EINVAL;
+ goto dcsr_err;
+ }
+ prop = of_get_property(np, "ranges", NULL);
+ if (!prop) {
+ pr_err("%s: Can't find the property of \"ranges\"\n", __func__);
+ of_node_put(np);
+ ret = -EINVAL;
+ goto dcsr_err;
+ }
+ dcsr_phy_addr = of_translate_address(np, prop + 1);
+ dcsr_base = ioremap((phys_addr_t)dcsr_phy_addr, SIZE_1MB);
+ of_node_put(np);
+ if (!dcsr_base) {
+ ret = -ENOMEM;
+ goto dcsr_err;
+ }
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,fpga-qixis");
+ if (np) {
+ pld_flag = FPGA_FLAG;
+ } else {
+ np = of_find_compatible_node(NULL, NULL, "fsl,p104xrdb-cpld");
+ if (np) {
+ pld_flag = CPLD_FLAG;
+ } else {
+ pr_err("%s: Can't find the FPGA/CPLD node\n",
+ __func__);
+ ret = -EINVAL;
+ goto pld_err;
+ }
+ }
+ pld_base = of_iomap(np, 0);
+ of_node_put(np);
+
+ return 0;
+
+pld_err:
+ iounmap(dcsr_base);
+dcsr_err:
+ iounmap(ccsr_base);
+ccsr_err:
+ ccsr_base = NULL;
+ dcsr_base = NULL;
+ pld_base = NULL;
+ return ret;
+}
+
+void fsl_dp_iounmap(void)
+{
+ if (dcsr_base) {
+ iounmap(dcsr_base);
+ dcsr_base = NULL;
+ }
+
+ if (ccsr_base) {
+ iounmap(ccsr_base);
+ ccsr_base = NULL;
+ }
+
+ if (pld_base) {
+ iounmap(pld_base);
+ pld_base = NULL;
+ }
+}
+
+static void fsl_dp_ddr_save(void *ccsr_base)
+{
+ u32 ddr_buff_addr;
+
+ /*
+ * DDR training initialization will break 128 bytes at the beginning
+ * of DDR, therefore, save them so that the bootloader will restore
+ * them. Assume that DDR is mapped to the address space started with
+ * CONFIG_PAGE_OFFSET.
+ */
+ memcpy(ddr_buff, (void *)CONFIG_PAGE_OFFSET, DDR_BUF_SIZE);
+
+ /* assume ddr_buff is in the physical address space of 4GB */
+ ddr_buff_addr = (u32)(__pa(ddr_buff) & 0xffffffff);
+
+ /*
+ * the bootloader will restore the first 128 bytes of DDR from
+ * the location indicated by the register SPARECR3
+ */
+ out_be32(ccsr_base + CCSR_SCFG_SPARECR3, ddr_buff_addr);
+}
+
+static void fsl_dp_set_resume_pointer(void *ccsr_base)
+{
+ u32 resume_addr;
+
+ /* the bootloader will finally jump to this address to return kernel */
+#ifdef CONFIG_PPC32
+ resume_addr = (u32)(__pa(__entry_deep_sleep));
+#else
+ resume_addr = (u32)(__pa(*(u64 *)__entry_deep_sleep) & 0xffffffff);
+#endif
+
+ /* use the register SPARECR2 to save the resume address */
+ out_be32(ccsr_base + CCSR_SCFG_SPARECR2, resume_addr);
+
+}
+
+int fsl_enter_epu_deepsleep(void)
+{
+
+ fsl_dp_ddr_save(ccsr_base);
+
+ fsl_dp_set_resume_pointer(ccsr_base);
+
+ /* enable Warm Device Reset request. */
+ setbits32(ccsr_base + CCSR_SCFG_DPSLPCR, CCSR_SCFG_DPSLPCR_WDRR_EN);
+
+ /* set GPIO1_29 as an output pin (not open-drain), and output 0 */
+ clrbits32(ccsr_base + CCSR_GPIO1_GPDAT, CCSR_GPIO1_GPDIR_29);
+ clrbits32(ccsr_base + CCSR_GPIO1_GPODR, CCSR_GPIO1_GPDIR_29);
+ setbits32(ccsr_base + CCSR_GPIO1_GPDIR, CCSR_GPIO1_GPDIR_29);
+
+ fsl_dp_fsm_setup(dcsr_base);
+
+ fsl_dp_enter_low(ccsr_base, dcsr_base, pld_base, pld_flag);
+
+ /* disable Warm Device Reset request */
+ clrbits32(ccsr_base + CCSR_SCFG_DPSLPCR, CCSR_SCFG_DPSLPCR_WDRR_EN);
+
+ fsl_dp_fsm_clean(dcsr_base);
+
+ return 0;
+}
diff --git a/arch/powerpc/platforms/85xx/qoriq_pm.c b/arch/powerpc/platforms/85xx/qoriq_pm.c
index 915b13b..5f2c016 100644
--- a/arch/powerpc/platforms/85xx/qoriq_pm.c
+++ b/arch/powerpc/platforms/85xx/qoriq_pm.c
@@ -20,6 +20,8 @@
#define FSL_SLEEP 0x1
#define FSL_DEEP_SLEEP 0x2
+int (*fsl_enter_deepsleep)(void);
+
/* specify the sleep state of the present platform */
int sleep_pm_state;
/* supported sleep modes by the present platform */
@@ -28,6 +30,7 @@ static unsigned int sleep_modes;
static int qoriq_suspend_enter(suspend_state_t state)
{
int ret = 0;
+ int cpu;
switch (state) {
case PM_SUSPEND_STANDBY:
@@ -39,6 +42,17 @@ static int qoriq_suspend_enter(suspend_state_t state)
break;
+ case PM_SUSPEND_MEM:
+
+ cpu = smp_processor_id();
+ qoriq_pm_ops->irq_mask(cpu);
+
+ ret = fsl_enter_deepsleep();
+
+ qoriq_pm_ops->irq_unmask(cpu);
+
+ break;
+
default:
ret = -EINVAL;
@@ -52,12 +66,30 @@ static int qoriq_suspend_valid(suspend_state_t state)
if (state == PM_SUSPEND_STANDBY && (sleep_modes & FSL_SLEEP))
return 1;
+ if (state == PM_SUSPEND_MEM && (sleep_modes & FSL_DEEP_SLEEP))
+ return 1;
+
return 0;
}
+static int qoriq_suspend_begin(suspend_state_t state)
+{
+ if (state == PM_SUSPEND_MEM)
+ return fsl_dp_iomap();
+
+ return 0;
+}
+
+static void qoriq_suspend_end(void)
+{
+ fsl_dp_iounmap();
+}
+
static const struct platform_suspend_ops qoriq_suspend_ops = {
.valid = qoriq_suspend_valid,
.enter = qoriq_suspend_enter,
+ .begin = qoriq_suspend_begin,
+ .end = qoriq_suspend_end,
};
static int __init qoriq_suspend_init(void)
@@ -71,6 +103,12 @@ static int __init qoriq_suspend_init(void)
if (np)
sleep_pm_state = PLAT_PM_LPM20;
+ np = of_find_compatible_node(NULL, NULL, "fsl,t1040-rcpm");
+ if (np) {
+ fsl_enter_deepsleep = fsl_enter_epu_deepsleep;
+ sleep_modes |= FSL_DEEP_SLEEP;
+ }
+
suspend_set_ops(&qoriq_suspend_ops);
return 0;
diff --git a/arch/powerpc/platforms/85xx/sleep.S b/arch/powerpc/platforms/85xx/sleep.S
new file mode 100644
index 0000000..95a5746
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/sleep.S
@@ -0,0 +1,295 @@
+/*
+ * Implement the low level part of deep sleep
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <asm/page.h>
+#include <asm/ppc_asm.h>
+#include <asm/reg.h>
+#include <asm/asm-offsets.h>
+#include <asm/booke_save_regs.h>
+#include <asm/mmu.h>
+
+#define FSLDELAY(count) \
+ li r3, (count)@l; \
+ slwi r3, r3, 10; \
+ mtctr r3; \
+101: nop; \
+ bdnz 101b;
+
+#define FSL_DIS_ALL_IRQ \
+ mfmsr r8; \
+ rlwinm r8, r8, 0, ~MSR_CE; \
+ rlwinm r8, r8, 0, ~MSR_ME; \
+ rlwinm r8, r8, 0, ~MSR_EE; \
+ rlwinm r8, r8, 0, ~MSR_DE; \
+ mtmsr r8; \
+ isync
+
+
+ .section .data
+ .align 6
+booke_regs_buffer:
+ .space REGS_BUFFER_SIZE
+
+ .section .txt
+ .align 6
+
+_GLOBAL(fsl_dp_enter_low)
+deepsleep_start:
+ LOAD_REG_ADDR(r9, buf_tmp)
+ PPC_STL r3, 0(r9)
+ PPC_STL r4, 8(r9)
+ PPC_STL r5, 16(r9)
+ PPC_STL r6, 24(r9)
+
+ LOAD_REG_ADDR(r3, booke_regs_buffer)
+ /* save the return address */
+ mflr r5
+ PPC_STL r5, SR_LR(r3)
+ mfmsr r5
+ PPC_STL r5, SR_MSR(r3)
+ li r4, DEEPSLEEP_FLAG
+ bl booke_cpu_state_save
+
+ LOAD_REG_ADDR(r9, buf_tmp)
+ PPC_LL r31, 0(r9)
+ PPC_LL r30, 8(r9)
+ PPC_LL r29, 16(r9)
+ PPC_LL r28, 24(r9)
+
+ /* flush caches */
+ LOAD_REG_ADDR(r3, cur_cpu_spec)
+ PPC_LL r3, 0(r3)
+ PPC_LL r3, CPU_FLUSH_CACHES(r3)
+ PPC_LCMPI 0, r3, 0
+ beq 6f
+#ifdef CONFIG_PPC64
+ PPC_LL r3, 0(r3)
+#endif
+ mtctr r3
+ bctrl
+6:
+#define CPC_OFFSET 0x10000
+ mr r3, r31
+ addis r3, r3, CPC_OFFSET@h
+ bl fsl_flush_cpc_cache
+
+ LOAD_REG_ADDR(r8, deepsleep_start)
+ LOAD_REG_ADDR(r9, deepsleep_end)
+
+ /* prefecth TLB */
+#define CCSR_GPIO1_GPDAT 0x130008
+#define CCSR_GPIO1_GPDAT_29 0x4
+ LOAD_REG_IMMEDIATE(r11, CCSR_GPIO1_GPDAT)
+ add r11, r31, r11
+ lwz r10, 0(r11)
+
+#define CCSR_RCPM_PCPH15SETR 0xe20b4
+#define CCSR_RCPM_PCPH15SETR_CORE0 0x1
+ LOAD_REG_IMMEDIATE(r12, CCSR_RCPM_PCPH15SETR)
+ add r12, r31, r12
+ lwz r10, 0(r12)
+
+#define CCSR_DDR_SDRAM_CFG_2 0x8114
+#define CCSR_DDR_SDRAM_CFG_2_FRC_SR 0x80000000
+ LOAD_REG_IMMEDIATE(r13, CCSR_DDR_SDRAM_CFG_2)
+ add r13, r31, r13
+ lwz r10, 0(r13)
+
+#define DCSR_EPU_EPGCR 0x000
+#define DCSR_EPU_EPGCR_GCE 0x80000000
+ li r14, DCSR_EPU_EPGCR
+ add r14, r30, r14
+ lwz r10, 0(r14)
+
+#define DCSR_EPU_EPECR15 0x33C
+#define DCSR_EPU_EPECR15_IC0 0x80000000
+ li r15, DCSR_EPU_EPECR15
+ add r15, r30, r15
+ lwz r10, 0(r15)
+
+#define CCSR_SCFG_QMCRDTRSTCR 0xfc40c
+#define CCSR_SCFG_QMCRDTRSTCR_CRDTRST 0x80000000
+ LOAD_REG_IMMEDIATE(r16, CCSR_SCFG_QMCRDTRSTCR)
+ add r16, r31, r16
+ lwz r10, 0(r16)
+
+/*
+ * There are two kind of register maps, one for CPLD and the other for FPGA
+ */
+#define CPLD_MISCCSR 0x17
+#define CPLD_MISCCSR_SLEEPEN 0x40
+#define QIXIS_PWR_CTL2 0x21
+#define QIXIS_PWR_CTL2_PCTL 0x2
+ PPC_LCMPI 0, r28, FPGA_FLAG
+ beq 20f
+ addi r29, r29, CPLD_MISCCSR
+20:
+ addi r29, r29, QIXIS_PWR_CTL2
+ lbz r10, 0(r29)
+
+ /* prefecth code to cache so that executing code after disable DDR */
+1: lwz r3, 0(r8)
+ addi r8, r8, 4
+ cmpw r8, r9
+ blt 1b
+ msync
+
+ FSL_DIS_ALL_IRQ
+
+ /*
+ * Place DDR controller in self refresh mode.
+ * From here on, DDR can't be access any more.
+ */
+ lwz r10, 0(r13)
+ oris r10, r10, CCSR_DDR_SDRAM_CFG_2_FRC_SR@h
+ stw r10, 0(r13)
+
+ /* can't call udelay() here, so use a macro to delay */
+ FSLDELAY(50)
+
+ /*
+ * Enable deep sleep signals by write external CPLD/FPGA register.
+ * The bootloader will disable them when wakeup from deep sleep.
+ */
+ lbz r10, 0(r29)
+ PPC_LCMPI 0, r28, FPGA_FLAG
+ beq 22f
+ ori r10, r10, CPLD_MISCCSR_SLEEPEN
+22:
+ ori r10, r10, QIXIS_PWR_CTL2_PCTL
+ stb r10, 0(r29)
+
+ /*
+ * Set GPIO1_29 to lock the signal MCKE down during deep sleep.
+ * The bootloader will clear it when wakeup.
+ */
+ lwz r10, 0(r11)
+ ori r10, r10, CCSR_GPIO1_GPDAT_29
+ stw r10, 0(r11)
+
+ FSLDELAY(10)
+
+ /* Clear the QMan CITI Credits */
+ lwz r10, 0(r16)
+ oris r10, r10, CCSR_SCFG_QMCRDTRSTCR_CRDTRST@h
+ stw r10, 0(r16)
+
+ /* Enable all EPU Counters */
+ li r10, 0
+ oris r10, r10, DCSR_EPU_EPGCR_GCE@h
+ stw r10, 0(r14)
+
+ /* Enable SCU15 to trigger on RCPM Concentrator 0 */
+ lwz r10, 0(r15)
+ oris r10, r10, DCSR_EPU_EPECR15_IC0@h
+ stw r10, 0(r15)
+
+ /* put Core0 in PH15 mode, trigger EPU FSM */
+ lwz r10, 0(r12)
+ ori r10, r10, CCSR_RCPM_PCPH15SETR_CORE0
+ stw r10, 0(r12)
+
+2:
+ b 2b
+
+ /*
+ * Leave some space to prevent prefeching instruction
+ * beyond deepsleep_end. The space also can be used as heap.
+ */
+buf_tmp:
+ .space 128
+ .align 6
+deepsleep_end:
+
+#ifdef CONFIG_PPC32
+_GLOBAL(fsl_deepsleep_resume)
+ /* disable interrupts */
+ FSL_DIS_ALL_IRQ
+
+ li r3, 0
+ mfspr r4, SPRN_PIR
+ bl call_setup_cpu
+
+ /* Load each CAM entry */
+ LOAD_REG_ADDR(r3, tlbcam_index)
+ lwz r3, 0(r3)
+ mtctr r3
+ li r0, 0
+3: mr r3, r0
+ bl loadcam_entry
+ addi r0, r0, 1
+ bdnz 3b
+
+ /* restore cpu registers */
+ LOAD_REG_ADDR(r3, booke_regs_buffer)
+ li r4, DEEPSLEEP_FLAG
+ bl booke_cpu_state_restore
+
+ LOAD_REG_ADDR(r3, booke_regs_buffer)
+ lwz r4, SR_MSR(r3)
+ mtmsr r4
+ lwz r4, SR_LR(r3)
+ mtlr r4
+
+ blr
+
+#else /* CONFIG_PPC32 */
+
+_GLOBAL(__entry_deep_sleep)
+ /* disable interrupts */
+ FSL_DIS_ALL_IRQ
+
+ /* switch to 64-bit mode */
+ bl .enable_64b_mode
+
+ /* set TOC pointer */
+ bl .relative_toc
+
+ /* setup initial TLBs, switch to kernel space ... */
+ bl .start_initialization_book3e
+
+ /* address space changed, set TOC pointer again */
+ bl .relative_toc
+
+ /* call a cpu state restore handler */
+ LOAD_REG_ADDR(r23, cur_cpu_spec)
+ ld r23,0(r23)
+ ld r23,CPU_SPEC_RESTORE(r23)
+ cmpdi 0,r23,0
+ beq 1f
+ ld r23,0(r23)
+ mtctr r23
+ bctrl
+1:
+ LOAD_REG_ADDR(r3, booke_regs_buffer)
+ li r4, DEEPSLEEP_FLAG
+ bl booke_cpu_state_restore
+
+ /* Load each CAM entry */
+ LOAD_REG_ADDR(r3, tlbcam_index)
+ lwz r3, 0(r3)
+ mtctr r3
+ li r0, 0
+3: mr r3, r0
+ bl loadcam_entry
+ addi r0, r0, 1
+ bdnz 3b
+
+ /* restore return address */
+ LOAD_REG_ADDR(r3, booke_regs_buffer)
+ ld r4, SR_MSR(r3)
+ mtmsr r4
+ ld r4, SR_LR(r3)
+ mtlr r4
+
+ blr
+
+#endif /* CONFIG_PPC32 */
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index eb83a30..7351c40 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -67,7 +67,14 @@ extern const struct fsl_pm_ops *qoriq_pm_ops;
#define PLAT_PM_SLEEP 20
#define PLAT_PM_LPM20 30
+extern int fsl_dp_iomap(void);
+extern void fsl_dp_iounmap(void);
+
extern int fsl_rcpm_init(void);
+extern int fsl_enter_epu_deepsleep(void);
+extern void fsl_dp_enter_low(void *ccsr_base, void *dcsr_base,
+ void *pld_base, int pld_flag);
+extern void __entry_deep_sleep(void);
extern void fsl_dp_fsm_setup(void *dcsr_base);
extern void fsl_dp_fsm_clean(void *dcsr_base);
--
1.7.3
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