* RE: [PATCH 2/2] Make the diu driver work without board level initilization
From: Jason.Jin @ 2014-04-01 7:28 UTC (permalink / raw)
To: Li.Xiubo@freescale.com, Scott Wood, timur@tabi.org
Cc: linux-fbdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1305603ae9b846d9bc4c78f21a8c0494@BY2PR03MB505.namprd03.prod.outlook.com>
> > + if (!diu_ops.set_pixel_clock) {
> > + data->pixelclk_reg =3D of_iomap(np, 1);
> > + if (!data->pixelclk_reg) {
> > + dev_err(&pdev->dev, "Cannot map pixelclk registers,
> please \
> > + provide the diu_ops for pixclk setting
> instead.\n");
>=20
> The error message should be in one line if possible, or it will hard to
> grep.
> If cannot, should split it into two or more lines, like:
> + dev_err(&pdev->dev, "Cannot map pixelclk registers,\n"
> + "please provide the diu_ops for pixclk setting
> instead.\n");
Thanks, This has been fixed in the update version, please help to review it=
at:
http://patchwork.ozlabs.org/patch/335225/
I forgot to add the V2 information in the subject in the update patch so th=
is may confuse the reviewer, sorry for that.
Best Regards,
Jason=20
^ permalink raw reply
* [PATCH REPOST v5 1/3] powernv, cpufreq: Select CPUFreq related Kconfig options for powernv
From: Gautham R. Shenoy @ 2014-04-01 7:13 UTC (permalink / raw)
To: Viresh Kumar, rjw, Benjamin Herrenschmidt
Cc: Gautham R. Shenoy, Linux PM list, linux-kernel, cpufreq,
linuxppc-dev, Anton Blanchard, srivatsa.bhat
In-Reply-To: <1396336408-20954-1-git-send-email-ego@linux.vnet.ibm.com>
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
Enable CPUFreq for PowerNV. Select "performance", "powersave",
"userspace" and "ondemand" governors. Choose "ondemand" to be the
default governor.
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
---
arch/powerpc/configs/pseries_defconfig | 1 +
arch/powerpc/configs/pseries_le_defconfig | 1 +
arch/powerpc/platforms/powernv/Kconfig | 6 ++++++
3 files changed, 8 insertions(+)
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 9ea8342b..a905063 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -306,3 +306,4 @@ CONFIG_KVM_BOOK3S_64=m
CONFIG_KVM_BOOK3S_64_HV=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
diff --git a/arch/powerpc/configs/pseries_le_defconfig b/arch/powerpc/configs/pseries_le_defconfig
index 3c84f9d..58e3dbf 100644
--- a/arch/powerpc/configs/pseries_le_defconfig
+++ b/arch/powerpc/configs/pseries_le_defconfig
@@ -301,3 +301,4 @@ CONFIG_CRYPTO_LZO=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig
index 895e8a2..c252ee9 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -11,6 +11,12 @@ config PPC_POWERNV
select PPC_UDBG_16550
select PPC_SCOM
select ARCH_RANDOM
+ select CPU_FREQ
+ select CPU_FREQ_GOV_PERFORMANCE
+ select CPU_FREQ_GOV_POWERSAVE
+ select CPU_FREQ_GOV_USERSPACE
+ select CPU_FREQ_GOV_ONDEMAND
+ select CPU_FREQ_GOV_CONSERVATIVE
default y
config PPC_POWERNV_RTAS
--
1.8.3.1
^ permalink raw reply related
* [PATCH REPOST v5 3/3] powernv, cpufreq: Use cpufreq_frequency_table.driver_data to store pstate ids
From: Gautham R. Shenoy @ 2014-04-01 7:13 UTC (permalink / raw)
To: Viresh Kumar, rjw, Benjamin Herrenschmidt
Cc: Gautham R. Shenoy, Linux PM list, linux-kernel, cpufreq,
linuxppc-dev, Anton Blanchard, srivatsa.bhat
In-Reply-To: <1396336408-20954-1-git-send-email-ego@linux.vnet.ibm.com>
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
The .driver_data field in the cpufreq_frequency_table was supposed to
be private to the drivers. However at some later point, it was being
used to indicate if the particular frequency in the table is the
BOOST_FREQUENCY. After patches [1] and [2], the .driver_data is once
again private to the driver. Thus we can safely use
cpufreq_frequency_table.driver_data to store pstate_ids instead of
having to maintain a separate array powernv_pstate_ids[] for this
purpose.
[1]:
Subject: cpufreq: don't print value of .driver_data from core
From : Viresh Kumar <viresh.kumar@ linaro.org>
url : http://marc.info/?l=linux-pm&m=139601421504709&w=2
[2]:
Subject: cpufreq: create another field .flags in cpufreq_frequency_table
From : Viresh Kumar <viresh.kumar@linaro.org>
url : http://marc.info/?l=linux-pm&m=139601416804702&w=2
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
---
drivers/cpufreq/powernv-cpufreq.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c
index e1e5197..9edccc6 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -33,7 +33,6 @@
#define POWERNV_MAX_PSTATES 256
static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
-static int powernv_pstate_ids[POWERNV_MAX_PSTATES+1];
/*
* Note: The set of pstates consists of contiguous integers, the
@@ -112,7 +111,7 @@ static int init_powernv_pstates(void)
pr_debug("PState id %d freq %d MHz\n", id, freq);
powernv_freqs[i].frequency = freq * 1000; /* kHz */
- powernv_pstate_ids[i] = id;
+ powernv_freqs[i].driver_data = id;
}
/* End of list marker entry */
powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
@@ -283,7 +282,7 @@ static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
{
struct powernv_smp_call_data freq_data;
- freq_data.pstate_id = powernv_pstate_ids[new_index];
+ freq_data.pstate_id = powernv_freqs[new_index].driver_data;
/*
* Use smp_call_function to send IPI and execute the
--
1.8.3.1
^ permalink raw reply related
* [PATCH REPOST v5 2/3] powernv, cpufreq: cpufreq driver for powernv platform
From: Gautham R. Shenoy @ 2014-04-01 7:13 UTC (permalink / raw)
To: Viresh Kumar, rjw, Benjamin Herrenschmidt
Cc: Gautham R. Shenoy, Linux PM list, linux-kernel, cpufreq,
linuxppc-dev, Anton Blanchard, srivatsa.bhat
In-Reply-To: <CAKohpo=jvswNPmUPEbS79bSp9ZWC1e3DjaEUX=O4CWMXfufHrw@mail.gmail.com>
From: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Backend driver to dynamically set voltage and frequency on
IBM POWER non-virtualized platforms. Power management SPRs
are used to set the required PState.
This driver works in conjunction with cpufreq governors
like 'ondemand' to provide a demand based frequency and
voltage setting on IBM POWER non-virtualized platforms.
PState table is obtained from OPAL v3 firmware through device
tree.
powernv_cpufreq back-end driver would parse the relevant device-tree
nodes and initialise the cpufreq subsystem on powernv platform.
The code was originally written by svaidy@linux.vnet.ibm.com. Over
time it was modified to accomodate bug-fixes as well as updates to the
the cpu-freq core. Relevant portions of the change logs corresponding
to those modifications are noted below:
* The policy->cpus needs to be populated in a hotplug-invariant
manner instead of using cpu_sibling_mask() which varies with
cpu-hotplug. This is because the cpufreq core code copies this
content into policy->related_cpus mask which should not vary on
cpu-hotplug. [Authored by srivatsa.bhat@linux.vnet.ibm.com]
* Create a helper routine that can return the cpu-frequency for the
corresponding pstate_id. Also, cache the values of the pstate_max,
pstate_min and pstate_nominal and nr_pstates in a static structure
so that they can be reused in the future to perform any
validations. [Authored by ego@linux.vnet.ibm.com]
* Create a driver attribute named cpuinfo_nominal_freq which creates
a sysfs read-only file named cpuinfo_nominal_freq. Export the
frequency corresponding to the nominal_pstate through this
interface.
Nominal frequency is the highest non-turbo frequency for the
platform. This is generally used for setting governor policies
from user space for optimal energy efficiency. [Authored by
ego@linux.vnet.ibm.com]
* Implement a powernv_cpufreq_get(unsigned int cpu) method which will
return the current operating frequency. Export this via the sysfs
interface cpuinfo_cur_freq by setting powernv_cpufreq_driver.get to
powernv_cpufreq_get(). [Authored by ego@linux.vnet.ibm.com]
[Change log updated by ego@linux.vnet.ibm.com]
Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/reg.h | 4 +
drivers/cpufreq/Kconfig.powerpc | 8 +
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/powernv-cpufreq.c | 342 ++++++++++++++++++++++++++++++++++++++
4 files changed, 355 insertions(+)
create mode 100644 drivers/cpufreq/powernv-cpufreq.c
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 1a36b8e..2189f8f 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -271,6 +271,10 @@
#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */
#define SPRN_IC 0x350 /* Virtual Instruction Count */
#define SPRN_VTB 0x351 /* Virtual Time Base */
+#define SPRN_PMICR 0x354 /* Power Management Idle Control Reg */
+#define SPRN_PMSR 0x355 /* Power Management Status Reg */
+#define SPRN_PMCR 0x374 /* Power Management Control Register */
+
/* HFSCR and FSCR bit numbers are the same */
#define FSCR_TAR_LG 8 /* Enable Target Address Register */
#define FSCR_EBB_LG 7 /* Enable Event Based Branching */
diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
index ca0021a..72564b7 100644
--- a/drivers/cpufreq/Kconfig.powerpc
+++ b/drivers/cpufreq/Kconfig.powerpc
@@ -54,3 +54,11 @@ config PPC_PASEMI_CPUFREQ
help
This adds the support for frequency switching on PA Semi
PWRficient processors.
+
+config POWERNV_CPUFREQ
+ tristate "CPU frequency scaling for IBM POWERNV platform"
+ depends on PPC_POWERNV
+ default y
+ help
+ This adds support for CPU frequency switching on IBM POWERNV
+ platform
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 7494565..0dbb963 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_PPC_CORENET_CPUFREQ) += ppc-corenet-cpufreq.o
obj-$(CONFIG_CPU_FREQ_PMAC) += pmac32-cpufreq.o
obj-$(CONFIG_CPU_FREQ_PMAC64) += pmac64-cpufreq.o
obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += pasemi-cpufreq.o
+obj-$(CONFIG_POWERNV_CPUFREQ) += powernv-cpufreq.o
##################################################################################
# Other platform drivers
diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c
new file mode 100644
index 0000000..e1e5197
--- /dev/null
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -0,0 +1,342 @@
+/*
+ * POWERNV cpufreq driver for the IBM POWER processors
+ *
+ * (C) Copyright IBM 2014
+ *
+ * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#define pr_fmt(fmt) "powernv-cpufreq: " fmt
+
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/cpumask.h>
+#include <linux/module.h>
+#include <linux/cpufreq.h>
+#include <linux/smp.h>
+#include <linux/of.h>
+
+#include <asm/cputhreads.h>
+#include <asm/reg.h>
+
+#define POWERNV_MAX_PSTATES 256
+
+static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
+static int powernv_pstate_ids[POWERNV_MAX_PSTATES+1];
+
+/*
+ * Note: The set of pstates consists of contiguous integers, the
+ * smallest of which is indicated by powernv_pstate_info.min, the
+ * largest of which is indicated by powernv_pstate_info.max.
+ *
+ * The nominal pstate is the highest non-turbo pstate in this
+ * platform. This is indicated by powernv_pstate_info.nominal.
+ */
+static struct powernv_pstate_info {
+ int min;
+ int max;
+ int nominal;
+ int nr_pstates;
+} powernv_pstate_info;
+
+/*
+ * Initialize the freq table based on data obtained
+ * from the firmware passed via device-tree
+ */
+static int init_powernv_pstates(void)
+{
+ struct device_node *power_mgt;
+ int i, pstate_min, pstate_max, pstate_nominal, nr_pstates = 0;
+ const __be32 *pstate_ids, *pstate_freqs;
+ u32 len_ids, len_freqs;
+
+ power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
+ if (!power_mgt) {
+ pr_warn("power-mgt node not found\n");
+ return -ENODEV;
+ }
+
+ if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
+ pr_warn("ibm,pstate-min node not found\n");
+ return -ENODEV;
+ }
+
+ if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
+ pr_warn("ibm,pstate-max node not found\n");
+ return -ENODEV;
+ }
+
+ if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
+ &pstate_nominal)) {
+ pr_warn("ibm,pstate-nominal not found\n");
+ return -ENODEV;
+ }
+ pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
+ pstate_nominal, pstate_max);
+
+ pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
+ if (!pstate_ids) {
+ pr_warn("ibm,pstate-ids not found\n");
+ return -ENODEV;
+ }
+
+ pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
+ &len_freqs);
+ if (!pstate_freqs) {
+ pr_warn("ibm,pstate-frequencies-mhz not found\n");
+ return -ENODEV;
+ }
+
+ WARN_ON(len_ids != len_freqs);
+ nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
+ if (!nr_pstates) {
+ pr_warn("No PStates found\n");
+ return -ENODEV;
+ }
+
+ pr_debug("NR PStates %d\n", nr_pstates);
+ for (i = 0; i < nr_pstates; i++) {
+ u32 id = be32_to_cpu(pstate_ids[i]);
+ u32 freq = be32_to_cpu(pstate_freqs[i]);
+
+ pr_debug("PState id %d freq %d MHz\n", id, freq);
+ powernv_freqs[i].frequency = freq * 1000; /* kHz */
+ powernv_pstate_ids[i] = id;
+ }
+ /* End of list marker entry */
+ powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
+
+ powernv_pstate_info.min = pstate_min;
+ powernv_pstate_info.max = pstate_max;
+ powernv_pstate_info.nominal = pstate_nominal;
+ powernv_pstate_info.nr_pstates = nr_pstates;
+
+ return 0;
+}
+
+/* Returns the CPU frequency corresponding to the pstate_id. */
+static unsigned int pstate_id_to_freq(int pstate_id)
+{
+ int i;
+
+ i = powernv_pstate_info.max - pstate_id;
+ BUG_ON(i >= powernv_pstate_info.nr_pstates || i < 0);
+
+ return powernv_freqs[i].frequency;
+}
+
+/*
+ * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
+ * the firmware
+ */
+static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
+ char *buf)
+{
+ return sprintf(buf, "%u\n",
+ pstate_id_to_freq(powernv_pstate_info.nominal));
+}
+
+struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
+ __ATTR_RO(cpuinfo_nominal_freq);
+
+static struct freq_attr *powernv_cpu_freq_attr[] = {
+ &cpufreq_freq_attr_scaling_available_freqs,
+ &cpufreq_freq_attr_cpuinfo_nominal_freq,
+ NULL,
+};
+
+/* Helper routines */
+
+/* Access helpers to power mgt SPR */
+
+static inline unsigned long get_pmspr(unsigned long sprn)
+{
+ switch (sprn) {
+ case SPRN_PMCR:
+ return mfspr(SPRN_PMCR);
+
+ case SPRN_PMICR:
+ return mfspr(SPRN_PMICR);
+
+ case SPRN_PMSR:
+ return mfspr(SPRN_PMSR);
+ }
+ BUG();
+}
+
+static inline void set_pmspr(unsigned long sprn, unsigned long val)
+{
+ switch (sprn) {
+ case SPRN_PMCR:
+ mtspr(SPRN_PMCR, val);
+ return;
+
+ case SPRN_PMICR:
+ mtspr(SPRN_PMICR, val);
+ return;
+ }
+ BUG();
+}
+
+/*
+ * Use objects of this type to query/update
+ * pstates on a remote CPU via smp_call_function.
+ */
+struct powernv_smp_call_data {
+ unsigned int freq;
+ int pstate_id;
+};
+
+/*
+ * powernv_read_cpu_freq: Reads the current frequency on this CPU.
+ *
+ * Called via smp_call_function.
+ *
+ * Note: The caller of the smp_call_function should pass an argument of
+ * the type 'struct powernv_smp_call_data *' along with this function.
+ *
+ * The current frequency on this CPU will be returned via
+ * ((struct powernv_smp_call_data *)arg)->freq;
+ */
+static void powernv_read_cpu_freq(void *arg)
+{
+ unsigned long pmspr_val;
+ s8 local_pstate_id;
+ struct powernv_smp_call_data *freq_data = arg;
+
+ pmspr_val = get_pmspr(SPRN_PMSR);
+
+ /*
+ * The local pstate id corresponds bits 48..55 in the PMSR.
+ * Note: Watch out for the sign!
+ */
+ local_pstate_id = (pmspr_val >> 48) & 0xFF;
+ freq_data->pstate_id = local_pstate_id;
+ freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
+
+ pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
+ raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
+ freq_data->freq);
+}
+
+/*
+ * powernv_cpufreq_get: Returns the CPU frequency as reported by the
+ * firmware for CPU 'cpu'. This value is reported through the sysfs
+ * file cpuinfo_cur_freq.
+ */
+unsigned int powernv_cpufreq_get(unsigned int cpu)
+{
+ struct powernv_smp_call_data freq_data;
+
+ smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
+ &freq_data, 1);
+
+ return freq_data.freq;
+}
+
+/*
+ * set_pstate: Sets the pstate on this CPU.
+ *
+ * This is called via an smp_call_function.
+ *
+ * The caller must ensure that freq_data is of the type
+ * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
+ * on this CPU should be present in freq_data->pstate_id.
+ */
+static void set_pstate(void *freq_data)
+{
+ unsigned long val;
+ unsigned long pstate_ul =
+ ((struct powernv_smp_call_data *) freq_data)->pstate_id;
+
+ val = get_pmspr(SPRN_PMCR);
+ val = val & 0x0000FFFFFFFFFFFFULL;
+
+ pstate_ul = pstate_ul & 0xFF;
+
+ /* Set both global(bits 56..63) and local(bits 48..55) PStates */
+ val = val | (pstate_ul << 56) | (pstate_ul << 48);
+
+ pr_debug("Setting cpu %d pmcr to %016lX\n",
+ raw_smp_processor_id(), val);
+ set_pmspr(SPRN_PMCR, val);
+}
+
+/*
+ * powernv_cpufreq_target_index: Sets the frequency corresponding to
+ * the cpufreq table entry indexed by new_index on the cpus in the
+ * mask policy->cpus
+ */
+static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
+ unsigned int new_index)
+{
+ struct powernv_smp_call_data freq_data;
+
+ freq_data.pstate_id = powernv_pstate_ids[new_index];
+
+ /*
+ * Use smp_call_function to send IPI and execute the
+ * mtspr on target CPU. We could do that without IPI
+ * if current CPU is within policy->cpus (core)
+ */
+ smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
+
+ return 0;
+}
+
+static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+ int base, i;
+
+ base = cpu_first_thread_sibling(policy->cpu);
+
+ for (i = 0; i < threads_per_core; i++)
+ cpumask_set_cpu(base + i, policy->cpus);
+
+ return cpufreq_table_validate_and_show(policy, powernv_freqs);
+}
+
+static struct cpufreq_driver powernv_cpufreq_driver = {
+ .name = "powernv-cpufreq",
+ .flags = CPUFREQ_CONST_LOOPS,
+ .init = powernv_cpufreq_cpu_init,
+ .verify = cpufreq_generic_frequency_table_verify,
+ .target_index = powernv_cpufreq_target_index,
+ .get = powernv_cpufreq_get,
+ .attr = powernv_cpu_freq_attr,
+};
+
+static int __init powernv_cpufreq_init(void)
+{
+ int rc = 0;
+
+ /* Discover pstates from device tree and init */
+ rc = init_powernv_pstates();
+ if (rc) {
+ pr_info("powernv-cpufreq disabled. System does not support PState control\n");
+ return rc;
+ }
+
+ return cpufreq_register_driver(&powernv_cpufreq_driver);
+}
+module_init(powernv_cpufreq_init);
+
+static void __exit powernv_cpufreq_exit(void)
+{
+ cpufreq_unregister_driver(&powernv_cpufreq_driver);
+}
+module_exit(powernv_cpufreq_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
--
1.8.3.1
^ permalink raw reply related
* Re: [PATCH 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation
From: Alexander Graf @ 2014-04-01 5:47 UTC (permalink / raw)
To: Scott Wood
Cc: Mihai Caraman, <linuxppc-dev@lists.ozlabs.org>,
<kvm@vger.kernel.org>, <kvm-ppc@vger.kernel.org>
In-Reply-To: <1396307005.20849.37.camel@snotra.buserror.net>
> Am 01.04.2014 um 01:03 schrieb Scott Wood <scottwood@freescale.com>:
>=20
>> On Mon, 2014-03-31 at 15:41 +0200, Alexander Graf wrote:
>>> On 03/26/2014 10:17 PM, Scott Wood wrote:
>>>> On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman wrote:
>>>> + /*
>>>> + * Another thread may rewrite the TLB entry in parallel, don't
>>>> + * execute from the address if the execute permission is not set
>>>> + */
>>=20
>> What happens when another thread rewrites the TLB entry in parallel?=20
>> Does tlbsx succeed? Does it fail? Do we see failure indicated somehow?=20=
>> Are the contents of the MAS registers consistent at this point or=20
>> inconsistent?
>=20
> If another thread rewrites the TLB entry, then we use the new TLB entry,
> just as if it had raced in hardware. This check ensures that we don't
> execute from the new TLB entry if it doesn't have execute permissions
> (just as hardware would).
>=20
> What happens if the new TLB entry is valid and executable, and the
> instruction pointed to is valid, but doesn't trap (and thus we don't
> have emulation for it)?
>=20
>> There has to be a good way to detect such a race and deal with it, no?
>=20
> How would you detect it? We don't get any information from the trap
> about what physical address the instruction was fetched from, or what
> the instruction was.
Ah, this is a guest race where the guest modifies exactly the TLB in questio=
n. I see.
Why would this ever happen in practice (in a case where we're not executing m=
alicious code)?
Alex
>=20
> -Scott
>=20
>=20
^ permalink raw reply
* RE: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
From: Dongsheng.Wang @ 2014-04-01 4:19 UTC (permalink / raw)
To: guangyu.chen@freescale.com
Cc: alsa-devel@alsa-project.org, broonie@kernel.org,
linux-kernel@vger.kernel.org, timur@tabi.org,
Li.Xiubo@freescale.com, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20140401033758.GB26925@MrMyself>
> -----Original Message-----
> From: Nicolin Chen [mailto:Guangyu.Chen@freescale.com]
> Sent: Tuesday, April 01, 2014 11:38 AM
> To: Wang Dongsheng-B40534
> Cc: broonie@kernel.org; alsa-devel@alsa-project.org; Xiubo Li-B47053; lin=
uxppc-
> dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; timur@tabi.org
> Subject: Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrup=
ts for
> Tx and Rx streams
>=20
> On Tue, Apr 01, 2014 at 11:48:16AM +0800, Wang Dongsheng-B40534 wrote:
> >
> >
> > > -----Original Message-----
> > > From: Nicolin Chen [mailto:Guangyu.Chen@freescale.com]
> > > Sent: Tuesday, April 01, 2014 11:14 AM
> > > To: Wang Dongsheng-B40534
> > > Cc: broonie@kernel.org; alsa-devel@alsa-project.org; Xiubo Li-B47053;
> linuxppc-
> > > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; timur@tabi.org
> > > Subject: Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable inte=
rrupts
> for
> > > Tx and Rx streams
> > >
> > > On Tue, Apr 01, 2014 at 11:25:02AM +0800, Wang Dongsheng-B40534 wrote=
:
> > > > > Subject: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable inte=
rrupts
> for
> > > Tx
> > > > > and Rx streams
> > > > >
> > > > > We only enable one side interrupt for each stream since over/unde=
rrun
> > > > > on the opposite stream would be resulted from what we previously =
did,
> > > > > enabling TERE but remaining FRDE disabled, even though the xrun o=
n the
> > > > > opposite direction will not break the current stream.
> > > > >
> > > > > Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
> > > > > Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
> > > > > ---
> > > > > sound/soc/fsl/fsl_sai.c | 8 ++++++--
> > > > > sound/soc/fsl/fsl_sai.h | 1 +
> > > > > 2 files changed, 7 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> > > > > index bdfd497..d64c33f 100644
> > > > > --- a/sound/soc/fsl/fsl_sai.c
> > > > > +++ b/sound/soc/fsl/fsl_sai.c
> > > > > @@ -397,4 +397,6 @@ static int fsl_sai_trigger(struct snd_pcm_sub=
stream
> > > > > *substream, int cmd,
> > > > >
> > > > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > > + FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
> > > > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > > FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
> > > > > break;
> > > > > @@ -404,4 +406,6 @@ static int fsl_sai_trigger(struct snd_pcm_sub=
stream
> > > > > *substream, int cmd,
> > > > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > > FSL_SAI_CSR_FRDE, 0);
> > > > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > > + FSL_SAI_CSR_xIE_MASK, 0);
> > > > >
> > > > > if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
> > > > > @@ -464,6 +468,6 @@ static int fsl_sai_dai_probe(struct snd_soc_d=
ai
> *cpu_dai)
> > > > > struct fsl_sai *sai =3D dev_get_drvdata(cpu_dai->dev);
> > > > >
> > > > > - regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff,
> FSL_SAI_FLAGS);
> > > > > - regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff,
> FSL_SAI_FLAGS);
> > > > > + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
> > > > > + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
> > > >
> > > > Why are you remove this macro? Don't use magic number.
> > >
> > > It's pretty clear that the so-called magic number is to clear the set=
tings
> > > in the registers for driver init as what this driver did at the first=
place
> > > -- no offense but I don't think you would ask this if you check the g=
it-log
> > > of the driver.
> > >
> > ~FSL_SAI_MASK is better than 0x0. And you also replace 0xffffffff.
>=20
> I would later send a patch to reset SAI for a true init instead of these =
lines
> but not within this patch as it's focusing on the interrupts enabling.
>=20
> So please don't grasp the mask here. Just let me continue.
>=20
:), fine.
Regards,
-Dongsheng
> Thank you,
> Nicolin Chen
^ permalink raw reply
* [PATCH v2 2/2] powerpc/powernv: Add invalid OPAL call
From: Joel Stanley @ 2014-04-01 3:58 UTC (permalink / raw)
To: benh, paulus, anton, shangw, hegdevasant, michael, mikey, stewart
Cc: linuxppc-dev
In-Reply-To: <1396324700-22457-1-git-send-email-joel@jms.id.au>
This call will not be understood by OPAL, and cause it to add an error
to it's log. Among other things, this is useful for testing the
behaviour of the log as it fills up.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/powerpc/include/asm/opal.h | 2 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
arch/powerpc/platforms/powernv/opal.c | 3 +++
3 files changed, 6 insertions(+)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 693bdc4..6a2c485 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -87,6 +87,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
#define OPAL_ASYNC_COMPLETION -15
/* API Tokens (in r0) */
+#define OPAL_INVALID_CALL -1
#define OPAL_CONSOLE_WRITE 1
#define OPAL_CONSOLE_READ 2
#define OPAL_RTC_READ 3
@@ -878,6 +879,7 @@ int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
size_t length);
int64_t opal_sensor_read(uint32_t sensor_hndl, int token,
uint32_t *sensor_data);
+int64_t opal_invalid_call(void);
/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 75c89df..2d8adb3 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -61,6 +61,7 @@ _STATIC(opal_return)
mtcr r4;
rfid
+OPAL_CALL(opal_invalid_call, OPAL_INVALID_CALL);
OPAL_CALL(opal_console_write, OPAL_CONSOLE_WRITE);
OPAL_CALL(opal_console_read, OPAL_CONSOLE_READ);
OPAL_CALL(opal_console_write_buffer_space, OPAL_CONSOLE_WRITE_BUFFER_SPACE);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index e6f14d7..4b7aced 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -607,3 +607,6 @@ void opal_shutdown(void)
mdelay(10);
}
}
+
+/* Export this so that test modules can use it */
+EXPORT_SYMBOL_GPL(opal_invalid_call);
--
1.9.1
^ permalink raw reply related
* [PATCH v2 1/2] powerpc/powernv: Add OPAL message log interface
From: Joel Stanley @ 2014-04-01 3:58 UTC (permalink / raw)
To: benh, paulus, anton, shangw, hegdevasant, michael, mikey, stewart
Cc: linuxppc-dev
In-Reply-To: <1396324700-22457-1-git-send-email-joel@jms.id.au>
OPAL provides an in-memory circular buffer containing a message log
populated with various runtime messages produced by the firmware.
Provide a sysfs interface /sys/firmware/opal/msglog for userspace to
view the messages.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/powerpc/include/asm/opal.h | 4 +
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/opal-msglog.c | 120 +++++++++++++++++++++++++++
arch/powerpc/platforms/powernv/opal.c | 4 +-
4 files changed, 128 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/powernv/opal-msglog.c
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index ffafab0..693bdc4 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -729,6 +729,9 @@ typedef struct oppanel_line {
/* /sys/firmware/opal */
extern struct kobject *opal_kobj;
+/* /ibm,opal */
+extern struct device_node *opal_node;
+
/* API functions */
int64_t opal_console_write(int64_t term_number, __be64 *length,
const uint8_t *buffer);
@@ -918,6 +921,7 @@ extern void opal_flash_init(void);
extern int opal_elog_init(void);
extern void opal_platform_dump_init(void);
extern void opal_sys_param_init(void);
+extern void opal_msglog_init(void);
extern int opal_machine_check(struct pt_regs *regs);
extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index f324ea0..63cebb9 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,6 +1,7 @@
obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o
obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
obj-y += rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o
+obj-y += opal-msglog.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_PCI) += pci.o pci-p5ioc2.o pci-ioda.o
diff --git a/arch/powerpc/platforms/powernv/opal-msglog.c b/arch/powerpc/platforms/powernv/opal-msglog.c
new file mode 100644
index 0000000..1bb25b9
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-msglog.c
@@ -0,0 +1,120 @@
+/*
+ * PowerNV OPAL in-memory console interface
+ *
+ * Copyright 2014 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/io.h>
+#include <asm/opal.h>
+#include <linux/debugfs.h>
+#include <linux/of.h>
+#include <linux/types.h>
+#include <asm/barrier.h>
+
+/* OPAL in-memory console. Defined in OPAL source at core/console.c */
+struct memcons {
+ __be64 magic;
+#define MEMCONS_MAGIC 0x6630696567726173L
+ __be64 obuf_phys;
+ __be64 ibuf_phys;
+ __be32 obuf_size;
+ __be32 ibuf_size;
+ __be32 out_pos;
+#define MEMCONS_OUT_POS_WRAP 0x80000000u
+#define MEMCONS_OUT_POS_MASK 0x00ffffffu
+ __be32 in_prod;
+ __be32 in_cons;
+};
+
+static ssize_t opal_msglog_read(struct file *file, struct kobject *kobj,
+ struct bin_attribute *bin_attr, char *to,
+ loff_t pos, size_t count)
+{
+ struct memcons *mc = bin_attr->private;
+ const char *conbuf;
+ size_t ret, first_read = 0;
+ uint32_t out_pos, avail;
+
+ if (!mc)
+ return -ENODEV;
+
+ out_pos = be32_to_cpu(ACCESS_ONCE(mc->out_pos));
+
+ /* Now we've read out_pos, put a barrier in before reading the new
+ * data it points to in conbuf. */
+ smp_rmb();
+
+ conbuf = phys_to_virt(be64_to_cpu(mc->obuf_phys));
+
+ /* When the buffer has wrapped, read from the out_pos marker to the end
+ * of the buffer, and then read the remaining data as in the un-wrapped
+ * case. */
+ if (out_pos & MEMCONS_OUT_POS_WRAP) {
+
+ out_pos &= MEMCONS_OUT_POS_MASK;
+ avail = be32_to_cpu(mc->obuf_size) - out_pos;
+
+ ret = memory_read_from_buffer(to, count, &pos,
+ conbuf + out_pos, avail);
+
+ if (ret < 0)
+ goto out;
+
+ first_read = ret;
+ to += first_read;
+ count -= first_read;
+ pos -= avail;
+ }
+
+ /* Sanity check. The firmware should not do this to us. */
+ if (out_pos > be32_to_cpu(mc->obuf_size)) {
+ pr_err("OPAL: memory console corruption. Aborting read.\n");
+ return -EINVAL;
+ }
+
+ ret = memory_read_from_buffer(to, count, &pos, conbuf, out_pos);
+
+ if (ret < 0)
+ goto out;
+
+ ret += first_read;
+out:
+ return ret;
+}
+
+static struct bin_attribute opal_msglog_attr = {
+ .attr = {.name = "msglog", .mode = 0444},
+ .read = opal_msglog_read
+};
+
+void __init opal_msglog_init(void)
+{
+ u64 mcaddr;
+ struct memcons *mc;
+
+ if (of_property_read_u64(opal_node, "ibm,opal-memcons", &mcaddr)) {
+ pr_warn("OPAL: Property ibm,opal-memcons not found, no message log\n");
+ return;
+ }
+
+ mc = phys_to_virt(mcaddr);
+ if (!mc) {
+ pr_warn("OPAL: memory console address is invalid\n");
+ return;
+ }
+
+ if (be64_to_cpu(mc->magic) != MEMCONS_MAGIC) {
+ pr_warn("OPAL: memory console version is invalid\n");
+ return;
+ }
+
+ opal_msglog_attr.private = mc;
+
+ if (sysfs_create_bin_file(opal_kobj, &opal_msglog_attr) != 0)
+ pr_warn("OPAL: sysfs file creation failed\n");
+}
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index e92f2f6..e6f14d7 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -46,7 +46,7 @@ struct mcheck_recoverable_range {
static struct mcheck_recoverable_range *mc_recoverable_range;
static int mc_recoverable_range_len;
-static struct device_node *opal_node;
+struct device_node *opal_node;
static DEFINE_SPINLOCK(opal_write_lock);
extern u64 opal_mc_secondary_handler[];
static unsigned int *opal_irqs;
@@ -574,6 +574,8 @@ static int __init opal_init(void)
opal_platform_dump_init();
/* Setup system parameters interface */
opal_sys_param_init();
+ /* Setup message log interface. */
+ opal_msglog_init();
}
return 0;
--
1.9.1
^ permalink raw reply related
* [PATCH v2 0/2] OPAL message log interface
From: Joel Stanley @ 2014-04-01 3:58 UTC (permalink / raw)
To: benh, paulus, anton, shangw, hegdevasant, michael, mikey, stewart
Cc: linuxppc-dev
These two patches add support for the message log, and expose a new OPAL call
called opal_invalid that allow me to cause OPAL to inject messages into the
log.
The naming is a bit mixed, as our device tree node is opal-memcons and I
retained the naming of the header structure 'struct memcons', but all other
references are to the OPAL message log.
They have been tested on a POWER7+ machine running some recent firmware.
Changes in V2:
The guts of the function used to read the console has been reworked. In doing
so, I've addressed the comments from Mikey and Ben:
- Added barrier between reading header and data
- Only read out_pos once
- Check the return code before adding it to the number of bytes read
Unlike V1, this version correctly reads out a wrapped buffer.
Joel Stanley (2):
powerpc/powernv: Add OPAL message log interface
powerpc/powernv: Add invalid OPAL call
arch/powerpc/include/asm/opal.h | 6 ++
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/opal-msglog.c | 120 +++++++++++++++++++++++++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
arch/powerpc/platforms/powernv/opal.c | 7 +-
5 files changed, 134 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/powernv/opal-msglog.c
--
1.9.1
^ permalink raw reply
* Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
From: Nicolin Chen @ 2014-04-01 3:37 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: alsa-devel@alsa-project.org, broonie@kernel.org,
linux-kernel@vger.kernel.org, timur@tabi.org, Xiubo Li-B47053,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <034c8b9a3822441dac07512ae2bbb1e7@BN1PR03MB188.namprd03.prod.outlook.com>
On Tue, Apr 01, 2014 at 11:48:16AM +0800, Wang Dongsheng-B40534 wrote:
>
>
> > -----Original Message-----
> > From: Nicolin Chen [mailto:Guangyu.Chen@freescale.com]
> > Sent: Tuesday, April 01, 2014 11:14 AM
> > To: Wang Dongsheng-B40534
> > Cc: broonie@kernel.org; alsa-devel@alsa-project.org; Xiubo Li-B47053; linuxppc-
> > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; timur@tabi.org
> > Subject: Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for
> > Tx and Rx streams
> >
> > On Tue, Apr 01, 2014 at 11:25:02AM +0800, Wang Dongsheng-B40534 wrote:
> > > > Subject: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for
> > Tx
> > > > and Rx streams
> > > >
> > > > We only enable one side interrupt for each stream since over/underrun
> > > > on the opposite stream would be resulted from what we previously did,
> > > > enabling TERE but remaining FRDE disabled, even though the xrun on the
> > > > opposite direction will not break the current stream.
> > > >
> > > > Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
> > > > Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
> > > > ---
> > > > sound/soc/fsl/fsl_sai.c | 8 ++++++--
> > > > sound/soc/fsl/fsl_sai.h | 1 +
> > > > 2 files changed, 7 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> > > > index bdfd497..d64c33f 100644
> > > > --- a/sound/soc/fsl/fsl_sai.c
> > > > +++ b/sound/soc/fsl/fsl_sai.c
> > > > @@ -397,4 +397,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> > > > *substream, int cmd,
> > > >
> > > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > + FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
> > > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
> > > > break;
> > > > @@ -404,4 +406,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> > > > *substream, int cmd,
> > > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > FSL_SAI_CSR_FRDE, 0);
> > > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > > + FSL_SAI_CSR_xIE_MASK, 0);
> > > >
> > > > if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
> > > > @@ -464,6 +468,6 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
> > > > struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
> > > >
> > > > - regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_FLAGS);
> > > > - regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_FLAGS);
> > > > + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
> > > > + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
> > >
> > > Why are you remove this macro? Don't use magic number.
> >
> > It's pretty clear that the so-called magic number is to clear the settings
> > in the registers for driver init as what this driver did at the first place
> > -- no offense but I don't think you would ask this if you check the git-log
> > of the driver.
> >
> ~FSL_SAI_MASK is better than 0x0. And you also replace 0xffffffff.
I would later send a patch to reset SAI for a true init instead of these lines
but not within this patch as it's focusing on the interrupts enabling.
So please don't grasp the mask here. Just let me continue.
Thank you,
Nicolin Chen
^ permalink raw reply
* RE: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
From: Dongsheng.Wang @ 2014-04-01 3:48 UTC (permalink / raw)
To: guangyu.chen@freescale.com
Cc: alsa-devel@alsa-project.org, broonie@kernel.org,
linux-kernel@vger.kernel.org, timur@tabi.org,
Li.Xiubo@freescale.com, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20140401031409.GA26925@MrMyself>
> -----Original Message-----
> From: Nicolin Chen [mailto:Guangyu.Chen@freescale.com]
> Sent: Tuesday, April 01, 2014 11:14 AM
> To: Wang Dongsheng-B40534
> Cc: broonie@kernel.org; alsa-devel@alsa-project.org; Xiubo Li-B47053; lin=
uxppc-
> dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; timur@tabi.org
> Subject: Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrup=
ts for
> Tx and Rx streams
>=20
> On Tue, Apr 01, 2014 at 11:25:02AM +0800, Wang Dongsheng-B40534 wrote:
> > > Subject: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrup=
ts for
> Tx
> > > and Rx streams
> > >
> > > We only enable one side interrupt for each stream since over/underrun
> > > on the opposite stream would be resulted from what we previously did,
> > > enabling TERE but remaining FRDE disabled, even though the xrun on th=
e
> > > opposite direction will not break the current stream.
> > >
> > > Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
> > > Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
> > > ---
> > > sound/soc/fsl/fsl_sai.c | 8 ++++++--
> > > sound/soc/fsl/fsl_sai.h | 1 +
> > > 2 files changed, 7 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> > > index bdfd497..d64c33f 100644
> > > --- a/sound/soc/fsl/fsl_sai.c
> > > +++ b/sound/soc/fsl/fsl_sai.c
> > > @@ -397,4 +397,6 @@ static int fsl_sai_trigger(struct snd_pcm_substre=
am
> > > *substream, int cmd,
> > >
> > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > + FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
> > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
> > > break;
> > > @@ -404,4 +406,6 @@ static int fsl_sai_trigger(struct snd_pcm_substre=
am
> > > *substream, int cmd,
> > > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > FSL_SAI_CSR_FRDE, 0);
> > > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > > + FSL_SAI_CSR_xIE_MASK, 0);
> > >
> > > if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
> > > @@ -464,6 +468,6 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *=
cpu_dai)
> > > struct fsl_sai *sai =3D dev_get_drvdata(cpu_dai->dev);
> > >
> > > - regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_F=
LAGS);
> > > - regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_F=
LAGS);
> > > + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
> > > + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
> >
> > Why are you remove this macro? Don't use magic number.
>=20
> It's pretty clear that the so-called magic number is to clear the setting=
s
> in the registers for driver init as what this driver did at the first pla=
ce
> -- no offense but I don't think you would ask this if you check the git-l=
og
> of the driver.
>=20
~FSL_SAI_MASK is better than 0x0. And you also replace 0xffffffff.
Regards,
-Dongsheng
> Thank you,
> Nicolin Chen
^ permalink raw reply
* Re: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
From: Nicolin Chen @ 2014-04-01 3:14 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: alsa-devel@alsa-project.org, broonie@kernel.org,
linux-kernel@vger.kernel.org, timur@tabi.org, Xiubo Li-B47053,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <d00e324f09954dcbb509f8c135ad51af@BN1PR03MB188.namprd03.prod.outlook.com>
On Tue, Apr 01, 2014 at 11:25:02AM +0800, Wang Dongsheng-B40534 wrote:
> > Subject: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx
> > and Rx streams
> >
> > We only enable one side interrupt for each stream since over/underrun
> > on the opposite stream would be resulted from what we previously did,
> > enabling TERE but remaining FRDE disabled, even though the xrun on the
> > opposite direction will not break the current stream.
> >
> > Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
> > Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
> > ---
> > sound/soc/fsl/fsl_sai.c | 8 ++++++--
> > sound/soc/fsl/fsl_sai.h | 1 +
> > 2 files changed, 7 insertions(+), 2 deletions(-)
> >
> > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> > index bdfd497..d64c33f 100644
> > --- a/sound/soc/fsl/fsl_sai.c
> > +++ b/sound/soc/fsl/fsl_sai.c
> > @@ -397,4 +397,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> > *substream, int cmd,
> >
> > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > + FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
> > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
> > break;
> > @@ -404,4 +406,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> > *substream, int cmd,
> > regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > FSL_SAI_CSR_FRDE, 0);
> > + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> > + FSL_SAI_CSR_xIE_MASK, 0);
> >
> > if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
> > @@ -464,6 +468,6 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
> > struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
> >
> > - regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_FLAGS);
> > - regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_FLAGS);
> > + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
> > + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
>
> Why are you remove this macro? Don't use magic number.
It's pretty clear that the so-called magic number is to clear the settings
in the registers for driver init as what this driver did at the first place
-- no offense but I don't think you would ask this if you check the git-log
of the driver.
Thank you,
Nicolin Chen
^ permalink raw reply
* RE: [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
From: Dongsheng.Wang @ 2014-04-01 3:25 UTC (permalink / raw)
To: guangyu.chen@freescale.com, broonie@kernel.org
Cc: alsa-devel@alsa-project.org, Li.Xiubo@freescale.com,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
timur@tabi.org
In-Reply-To: <1396322227-482-3-git-send-email-Guangyu.Chen@freescale.com>
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogTGludXhwcGMtZGV2IFtt
YWlsdG86bGludXhwcGMtZGV2LQ0KPiBib3VuY2VzK2I0MDUzND1mcmVlc2NhbGUuY29tQGxpc3Rz
Lm96bGFicy5vcmddIE9uIEJlaGFsZiBPZiBOaWNvbGluIENoZW4NCj4gU2VudDogVHVlc2RheSwg
QXByaWwgMDEsIDIwMTQgMTE6MTcgQU0NCj4gVG86IGJyb29uaWVAa2VybmVsLm9yZw0KPiBDYzog
YWxzYS1kZXZlbEBhbHNhLXByb2plY3Qub3JnOyBYaXVibyBMaS1CNDcwNTM7IGxpbnV4cHBjLWRl
dkBsaXN0cy5vemxhYnMub3JnOw0KPiBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnOyB0aW11
ckB0YWJpLm9yZw0KPiBTdWJqZWN0OiBbUEFUQ0ggYmlzZWN0IDIvMl0gQVNvQzogZnNsX3NhaTog
U2VwYXJhdGVseSBlbmFibGUgaW50ZXJydXB0cyBmb3IgVHgNCj4gYW5kIFJ4IHN0cmVhbXMNCj4g
DQo+IFdlIG9ubHkgZW5hYmxlIG9uZSBzaWRlIGludGVycnVwdCBmb3IgZWFjaCBzdHJlYW0gc2lu
Y2Ugb3Zlci91bmRlcnJ1bg0KPiBvbiB0aGUgb3Bwb3NpdGUgc3RyZWFtIHdvdWxkIGJlIHJlc3Vs
dGVkIGZyb20gd2hhdCB3ZSBwcmV2aW91c2x5IGRpZCwNCj4gZW5hYmxpbmcgVEVSRSBidXQgcmVt
YWluaW5nIEZSREUgZGlzYWJsZWQsIGV2ZW4gdGhvdWdoIHRoZSB4cnVuIG9uIHRoZQ0KPiBvcHBv
c2l0ZSBkaXJlY3Rpb24gd2lsbCBub3QgYnJlYWsgdGhlIGN1cnJlbnQgc3RyZWFtLg0KPiANCj4g
U2lnbmVkLW9mZi1ieTogTmljb2xpbiBDaGVuIDxHdWFuZ3l1LkNoZW5AZnJlZXNjYWxlLmNvbT4N
Cj4gQWNrZWQtYnk6IFhpdWJvIExpIDxMaS5YaXVib0BmcmVlc2NhbGUuY29tPg0KPiAtLS0NCj4g
IHNvdW5kL3NvYy9mc2wvZnNsX3NhaS5jIHwgOCArKysrKystLQ0KPiAgc291bmQvc29jL2ZzbC9m
c2xfc2FpLmggfCAxICsNCj4gIDIgZmlsZXMgY2hhbmdlZCwgNyBpbnNlcnRpb25zKCspLCAyIGRl
bGV0aW9ucygtKQ0KPiANCj4gZGlmZiAtLWdpdCBhL3NvdW5kL3NvYy9mc2wvZnNsX3NhaS5jIGIv
c291bmQvc29jL2ZzbC9mc2xfc2FpLmMNCj4gaW5kZXggYmRmZDQ5Ny4uZDY0YzMzZiAxMDA2NDQN
Cj4gLS0tIGEvc291bmQvc29jL2ZzbC9mc2xfc2FpLmMNCj4gKysrIGIvc291bmQvc29jL2ZzbC9m
c2xfc2FpLmMNCj4gQEAgLTM5Nyw0ICszOTcsNiBAQCBzdGF0aWMgaW50IGZzbF9zYWlfdHJpZ2dl
cihzdHJ1Y3Qgc25kX3BjbV9zdWJzdHJlYW0NCj4gKnN1YnN0cmVhbSwgaW50IGNtZCwNCj4gDQo+
ICAJCXJlZ21hcF91cGRhdGVfYml0cyhzYWktPnJlZ21hcCwgRlNMX1NBSV94Q1NSKHR4KSwNCj4g
KwkJCQkgICBGU0xfU0FJX0NTUl94SUVfTUFTSywgRlNMX1NBSV9GTEFHUyk7DQo+ICsJCXJlZ21h
cF91cGRhdGVfYml0cyhzYWktPnJlZ21hcCwgRlNMX1NBSV94Q1NSKHR4KSwNCj4gIAkJCQkgICBG
U0xfU0FJX0NTUl9GUkRFLCBGU0xfU0FJX0NTUl9GUkRFKTsNCj4gIAkJYnJlYWs7DQo+IEBAIC00
MDQsNCArNDA2LDYgQEAgc3RhdGljIGludCBmc2xfc2FpX3RyaWdnZXIoc3RydWN0IHNuZF9wY21f
c3Vic3RyZWFtDQo+ICpzdWJzdHJlYW0sIGludCBjbWQsDQo+ICAJCXJlZ21hcF91cGRhdGVfYml0
cyhzYWktPnJlZ21hcCwgRlNMX1NBSV94Q1NSKHR4KSwNCj4gIAkJCQkgICBGU0xfU0FJX0NTUl9G
UkRFLCAwKTsNCj4gKwkJcmVnbWFwX3VwZGF0ZV9iaXRzKHNhaS0+cmVnbWFwLCBGU0xfU0FJX3hD
U1IodHgpLA0KPiArCQkJCSAgIEZTTF9TQUlfQ1NSX3hJRV9NQVNLLCAwKTsNCj4gDQo+ICAJCWlm
ICghKHRjc3IgJiBGU0xfU0FJX0NTUl9GUkRFIHx8IHJjc3IgJiBGU0xfU0FJX0NTUl9GUkRFKSkg
ew0KPiBAQCAtNDY0LDYgKzQ2OCw2IEBAIHN0YXRpYyBpbnQgZnNsX3NhaV9kYWlfcHJvYmUoc3Ry
dWN0IHNuZF9zb2NfZGFpICpjcHVfZGFpKQ0KPiAgCXN0cnVjdCBmc2xfc2FpICpzYWkgPSBkZXZf
Z2V0X2RydmRhdGEoY3B1X2RhaS0+ZGV2KTsNCj4gDQo+IC0JcmVnbWFwX3VwZGF0ZV9iaXRzKHNh
aS0+cmVnbWFwLCBGU0xfU0FJX1RDU1IsIDB4ZmZmZmZmZmYsIEZTTF9TQUlfRkxBR1MpOw0KPiAt
CXJlZ21hcF91cGRhdGVfYml0cyhzYWktPnJlZ21hcCwgRlNMX1NBSV9SQ1NSLCAweGZmZmZmZmZm
LCBGU0xfU0FJX0ZMQUdTKTsNCj4gKwlyZWdtYXBfdXBkYXRlX2JpdHMoc2FpLT5yZWdtYXAsIEZT
TF9TQUlfVENTUiwgMHhmZmZmZmZmZiwgMHgwKTsNCj4gKwlyZWdtYXBfdXBkYXRlX2JpdHMoc2Fp
LT5yZWdtYXAsIEZTTF9TQUlfUkNTUiwgMHhmZmZmZmZmZiwgMHgwKTsNCg0KV2h5IGFyZSB5b3Ug
cmVtb3ZlIHRoaXMgbWFjcm8/IERvbid0IHVzZSBtYWdpYyBudW1iZXIuDQoNClJlZ2FyZHMsDQot
RG9uZ3NoZW5nDQo=
^ permalink raw reply
* [PATCH bisect 1/2] ASoC: fsl_sai: Fix buggy configurations in trigger()
From: Nicolin Chen @ 2014-04-01 3:17 UTC (permalink / raw)
To: broonie; +Cc: alsa-devel, Li.Xiubo, linuxppc-dev, linux-kernel, timur
In-Reply-To: <1396322227-482-1-git-send-email-Guangyu.Chen@freescale.com>
The current trigger() has two crucial problems:
1) The DMA request enabling operations (FSL_SAI_CSR_FRDE) for Tx and Rx are
now totally exclusive: It would fail to run simultaneous Tx-Rx cases.
2) The TERE disabling operation depends on an incorrect condition -- active
reference count that only gets increased in snd_pcm_open() and decreased
in snd_pcm_close(): The TERE would never get cleared.
So this patch overwrites the trigger function by following these rules:
A) We continue to support tx-async-while-rx-sync-to-tx case alone, which's
originally limited by this fsl_sai driver, but we make the code easy to
modify for the further support of the opposite case.
B) We enable both TE and RE for PLAYBACK stream or CAPTURE stream but only
enabling the DMA request bit (FSL_SAI_CSR_FRDE) of the current direction
due to the requirement of SAI -- For tx-async-while-rx-sync-to-tx case,
the receiver is enabled only when both the transmitter and receiver are
enabled.
Tested cases:
a) aplay test.wav -d5
b) arecord -r44100 -c2 -fS16_LE test.wav -d5
c) arecord -r44100 -c2 -fS16_LE -d5 | aplay
d) (aplay test2.wav &); sleep 1; arecord -r44100 -c2 -fS16_LE test.wav -d1
e) (arecord -r44100 -c2 -fS16_LE test.wav -d5 &); sleep 1; aplay test.wav -d1
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
---
sound/soc/fsl/fsl_sai.c | 35 +++++++++++++++++------------------
sound/soc/fsl/fsl_sai.h | 10 ++++++++++
2 files changed, 27 insertions(+), 18 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index f088545..bdfd497 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -366,4 +366,5 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
{
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
+ bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
u32 tcsr, rcsr;
@@ -380,12 +381,4 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
regmap_read(sai->regmap, FSL_SAI_RCSR, &rcsr);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- tcsr |= FSL_SAI_CSR_FRDE;
- rcsr &= ~FSL_SAI_CSR_FRDE;
- } else {
- rcsr |= FSL_SAI_CSR_FRDE;
- tcsr &= ~FSL_SAI_CSR_FRDE;
- }
-
/*
* It is recommended that the transmitter is the last enabled
@@ -396,20 +389,26 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- tcsr |= FSL_SAI_CSR_TERE;
- rcsr |= FSL_SAI_CSR_TERE;
+ if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
+ regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
+ FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
+ regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
+ FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
+ }
- regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
- regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
+ regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+ FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- if (!(cpu_dai->playback_active || cpu_dai->capture_active)) {
- tcsr &= ~FSL_SAI_CSR_TERE;
- rcsr &= ~FSL_SAI_CSR_TERE;
+ regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+ FSL_SAI_CSR_FRDE, 0);
+
+ if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
+ regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
+ FSL_SAI_CSR_TERE, 0);
+ regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
+ FSL_SAI_CSR_TERE, 0);
}
-
- regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
- regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
break;
default:
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index a264185..64b6fe7 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -36,4 +36,14 @@
#define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */
+#define FSL_SAI_xCSR(tx) (tx ? FSL_SAI_TCSR : FSL_SAI_RCSR)
+#define FSL_SAI_xCR1(tx) (tx ? FSL_SAI_TCR1 : FSL_SAI_RCR1)
+#define FSL_SAI_xCR2(tx) (tx ? FSL_SAI_TCR2 : FSL_SAI_RCR2)
+#define FSL_SAI_xCR3(tx) (tx ? FSL_SAI_TCR3 : FSL_SAI_RCR3)
+#define FSL_SAI_xCR4(tx) (tx ? FSL_SAI_TCR4 : FSL_SAI_RCR4)
+#define FSL_SAI_xCR5(tx) (tx ? FSL_SAI_TCR5 : FSL_SAI_RCR5)
+#define FSL_SAI_xDR(tx) (tx ? FSL_SAI_TDR : FSL_SAI_RDR)
+#define FSL_SAI_xFR(tx) (tx ? FSL_SAI_TFR : FSL_SAI_RFR)
+#define FSL_SAI_xMR(tx) (tx ? FSL_SAI_TMR : FSL_SAI_RMR)
+
/* SAI Transmit/Recieve Control Register */
#define FSL_SAI_CSR_TERE BIT(31)
--
1.8.4
^ permalink raw reply related
* [PATCH bisect 2/2] ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
From: Nicolin Chen @ 2014-04-01 3:17 UTC (permalink / raw)
To: broonie; +Cc: alsa-devel, Li.Xiubo, linuxppc-dev, linux-kernel, timur
In-Reply-To: <1396322227-482-1-git-send-email-Guangyu.Chen@freescale.com>
We only enable one side interrupt for each stream since over/underrun
on the opposite stream would be resulted from what we previously did,
enabling TERE but remaining FRDE disabled, even though the xrun on the
opposite direction will not break the current stream.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
---
sound/soc/fsl/fsl_sai.c | 8 ++++++--
sound/soc/fsl/fsl_sai.h | 1 +
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index bdfd497..d64c33f 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -397,4 +397,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+ FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
+ regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
break;
@@ -404,4 +406,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
FSL_SAI_CSR_FRDE, 0);
+ regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
+ FSL_SAI_CSR_xIE_MASK, 0);
if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
@@ -464,6 +468,6 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
- regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, FSL_SAI_FLAGS);
- regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, FSL_SAI_FLAGS);
+ regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
+ regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
FSL_SAI_MAXBURST_TX * 2);
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 64b6fe7..be26d46 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -59,4 +59,5 @@
#define FSL_SAI_CSR_FRF BIT(16)
#define FSL_SAI_CSR_xIE_SHIFT 8
+#define FSL_SAI_CSR_xIE_MASK (0x1f << FSL_SAI_CSR_xIE_SHIFT)
#define FSL_SAI_CSR_WSIE BIT(12)
#define FSL_SAI_CSR_SEIE BIT(11)
--
1.8.4
^ permalink raw reply related
* [PATCH bisect 0/2] ASoC: fsl_sai: Overwrite trigger()
From: Nicolin Chen @ 2014-04-01 3:17 UTC (permalink / raw)
To: broonie; +Cc: alsa-devel, Li.Xiubo, linuxppc-dev, linux-kernel, timur
This series of patches are bisected from the preivous version so as to
apply the PATCH-1 onto asoc-v3.15-4.
* The patches are generated by using '-U2' because the default '-U3'
would conflict the baseline without fsl_sai_isr patches.
Nicolin Chen (2):
ASoC: fsl_sai: Fix buggy configurations in trigger()
ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
sound/soc/fsl/fsl_sai.c | 43 +++++++++++++++++++++++--------------------
sound/soc/fsl/fsl_sai.h | 11 +++++++++++
2 files changed, 34 insertions(+), 20 deletions(-)
--
1.8.4
^ permalink raw reply
* RE: [PATCH 2/2] Make the diu driver work without board level initilization
From: Li.Xiubo @ 2014-04-01 2:57 UTC (permalink / raw)
To: Jason.Jin@freescale.com, Scott Wood, timur@tabi.org
Cc: linux-fbdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Jason.Jin@freescale.com
In-Reply-To: <1395920287-5204-1-git-send-email-Jason.Jin@freescale.com>
> @@ -1752,6 +1793,22 @@ static int fsl_diu_probe(struct platform_device *p=
dev)
> goto error;
> }
>=20
> + if (!diu_ops.set_pixel_clock) {
> + data->pixelclk_reg =3D of_iomap(np, 1);
> + if (!data->pixelclk_reg) {
> + dev_err(&pdev->dev, "Cannot map pixelclk registers, please \
> + provide the diu_ops for pixclk setting instead.\n");
The error message should be in one line if possible, or it will hard to gre=
p.
If cannot, should split it into two or more lines, like:
+ dev_err(&pdev->dev, "Cannot map pixelclk registers,\n"
+ "please provide the diu_ops for pixclk setting instead.\n");
Thanks,
BRs
Xiubo
^ permalink raw reply
* RE: [PATCH 2/2] Make the diu driver work without board level initilization
From: Dongsheng.Wang @ 2014-04-01 2:42 UTC (permalink / raw)
To: Jason.Jin@freescale.com, Scott Wood, timur@tabi.org
Cc: linux-fbdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Jason.Jin@freescale.com
In-Reply-To: <1395920287-5204-1-git-send-email-Jason.Jin@freescale.com>
DQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogTGludXhwcGMtZGV2IFtt
YWlsdG86bGludXhwcGMtZGV2LQ0KPiBib3VuY2VzK2I0MDUzND1mcmVlc2NhbGUuY29tQGxpc3Rz
Lm96bGFicy5vcmddIE9uIEJlaGFsZiBPZiBKYXNvbiBKaW4NCj4gU2VudDogVGh1cnNkYXksIE1h
cmNoIDI3LCAyMDE0IDc6MzggUE0NCj4gVG86IFdvb2QgU2NvdHQtQjA3NDIxOyB0aW11ckB0YWJp
Lm9yZw0KPiBDYzogbGludXgtZmJkZXZAdmdlci5rZXJuZWwub3JnOyBsaW51eHBwYy1kZXZAbGlz
dHMub3psYWJzLm9yZzsgTGkgWWFuZy1MZW8tDQo+IFI1ODQ3MjsgSmluIFpoZW5neGlvbmctUjY0
MTg4DQo+IFN1YmplY3Q6IFtQQVRDSCAyLzJdIE1ha2UgdGhlIGRpdSBkcml2ZXIgd29yayB3aXRo
b3V0IGJvYXJkIGxldmVsIGluaXRpbGl6YXRpb24NCj4gDQo+IFNvIGZhciB0aGUgRElVIGRyaXZl
ciBkb2VzIG5vdCBoYXZlIGEgbWVjaGFuaXNtIHRvIGRvIHRoZQ0KPiBib2FyZCBzcGVjaWZpYyBp
bml0aWFsaXphdGlvbi4gU28gb24gc29tZSBwbGF0Zm9ybXMsDQo+IHN1Y2ggYXMgUDEwMjIsIDg2
MTAgYW5kIDUxMjEsIFRoZSBib2FyZCBzcGVjaWZpYyBpbml0aWFsaXphdGlvbg0KPiBpcyBpbXBs
bWVudGVkIGluIHRoZSBwbGF0Zm9ybSBmaWxlIHN1Y2ggcDEwMjIyX2RzLg0KPiANCj4gQWN0dWFs
bHksIHRoZSBESVUgaXMgYWxyZWFkeSBpbnRpYWxpemVkIGluIHRoZSB1LWJvb3QsIHRoZSBwaW4g
c2hhcmluZw0KPiBhbmQgdGhlIHNpZ25hbCByb3V0aW5nIGFyZSBhbHNvIHNldCBpbiB1LWJvb3Qu
IFNvIHdlIGNhbiBsZXZlcmFnZSB0aGF0DQo+IGluIGtlcm5lbCBkcml2ZXIgdG8gYXZvaWQgYm9h
cmQgc2VwZWNpZmljIGluaXRpYWxpemF0aW9uLCBlc3BlY2lhbGx5DQo+IGZvciB0aGUgY29yZW5l
dCBwbGF0Zm9ybSwgd2hpY2ggaXMgdGhlIGFic3RyYWN0aW9uIGZvciBzZXJ2ZXJhbA0KPiBwbGF0
ZnJvbXMuDQo+IA0KPiBUaGUgcG90ZW50aWFsIHByb2JsZW0gaXMgdGhhdCB3aGVuIHRoZSBzeXN0
ZW0gd2FrZXVwIGZyb20gdGhlIGRlZXANCj4gc2xlZXAsIHNvbWUgcGxhdGZvcm0gc2V0dGluZ3Mg
bWF5IG5lZWQgdG8gYmUgcmUtaW5pdGlhbGl6ZWQuIFRoZSBDUExEDQo+IGFuZCBGUEdBIHNldHRp
bmdzIHdpbGwgYmUga2VwdCwgYnV0IHRoZSBwaXhlbCBjbG9jayByZWdpc3RlciB3aGljaA0KPiB1
c3VhbGx5IGxvY2F0ZSBhdCB0aGUgZ2xvYmFsIHV0aWxpdHkgc3BhY2UgbmVlZCB0byBiZSByZWlu
aXRpYWxpemVkLg0KPiANCj4gR2VuZXJhbGx5LCB0aGUgcGl4ZWwgY2xvY2sgc2V0dGluZyB3YXMg
aW1wbGVtZW50ZWQgaW4gdGhlIHBsYXRmb3JtDQo+IGZpbGUsIEJ1dCB0aGUgcGl4ZWwgY2xvY2sg
cmVnaXN0ZXIgaXRzZWxmIHNob3VsZCBiZSBwYXJ0IG9mIHRoZSBESVUNCj4gbW9kdWxlLCBBbmQg
Zm9yIFAxMDIyLDg2MTAgYW5kIFQxMDQwLCB0aGUgcGl4ZWwgY2xvY2sgcmVnaXN0ZXIgaGF2ZSB0
aGUNCj4gc2FtZSBzdHJ1Y3R1cmUsIFNvIHdlIGNhbiBjb25zaWRlciB0byBtb3ZlIHRoZSBwaXhl
bCBjbG9jayBzZXR0aW5nDQo+IGZyb20gdGhlIHBsYXRmb3JtIHRvIHRoZSBkaXUgZHJpdmVyLiBU
aGlzIHBhdGNoIHByb3ZpZGUgdGhlIG9wdGlvbnMNCj4gc2V0IHRoZSBwaXhlbCBjbG9jayBpbiB0
aGUgZGl1IGRyaXZlci4gQnV0IHRoZSBvcmlnaW5hbCBwbGF0Zm9ybSBwaXhlbA0KPiBjbG9jayBz
ZXR0aW5nIHN0aWwgY2FuIGJlIHVzZWQgZm9yIFAxMDIyLDg2MTAgYW5kIDUxMnggd2l0aG91dCBh
bnkNCj4gdXBkYXRlLiBUbyBpbXBsZW1lbnQgdGhlIHBpeGVsIGNsb2NrIHNldHRpbmcgaW4gdGhl
IGRpdSBkcml2ZXIuIHRoZQ0KPiBmb2xsb3dpbmcgdXBkYXRlIGluIHRoZSBkaXUgZHRzIG5vZGUg
d2FzIG5lZWRlZC4NCj4gZGlzcGxheTpkaXNwbGF5QDE4MDAwMCB7DQo+IAljb21wYXRpYmxlID0g
ImZzbCx0MTA0MC1kaXUiLCAiZnNsLGRpdSI7DQo+IC0JcmVnID0gPDB4MTgwMDAwIDEwMDA+Ow0K
PiArCXJlZyA9IDwweDE4MDAwMCAxMDAwIDB4ZmMwMjggND47DQo+ICsJcGl4Y2xrID0gPDAgMjU1
IDA+Ow0KPiAgCWludGVycnVwdHMgPSA8NzQgMiAwIDA+Ow0KPiB9DQo+IFRoZSAweGZjMDI4IGlz
IHRoZSBvZmZzZXQgZm9yIHBpeGVsIGNsb2NrIHJlZ2lzdGVyLiB0aGUgMyBzZWdtZW50IG9mDQo+
IHRoZSBwaXhjbGsgc3RhbmQgZm9yIHRoZSBQWENLRExZRElSLCB0aGUgbWF4IG9mIFBYQ0sgYW5k
IHRoZSBQWENLRExZDQo+IHdoaWNoIHdpbGwgYmUgdXNlZCBieSB0aGUgcGl4ZWwgY2xvY2sgcmVn
aXN0ZXIgc2V0dGluZy4NCj4gDQo+IFRoaXMgd2FzIHRlc3RlZCBvbiBUMTA0MCBwbGF0Zm9ybS4g
Rm9yIG90aGVyIHBsYXRmb3JtLCB0aGUgb3JpZ2luYWwNCj4gbm9kZSB0b2dldGhlciB3aXRoIHRo
ZSBwbGF0Zm9ybSBzZXR0aW5ncyBzdGlsbCBjYW4gd29yay4NCj4gDQo+IFNpZ25lZC1vZmYtYnk6
IEphc29uIEppbiA8SmFzb24uSmluQGZyZWVzY2FsZS5jb20+DQo+IC0tLQ0KPiBWMjogUmVtb3Zl
IHRoZSBwaXhlbCBjbG9jayByZWdpc3RlciBzYXZpbmcgZm9yIHN1c3BlbmQuDQo+IGFkZCB0aGUg
cGl4ZWwgY2xvY2sgc2V0dGluZyBpbiBkcml2ZXIuDQo+IA0KPiAgZHJpdmVycy92aWRlby9mc2wt
ZGl1LWZiLmMgfCA2MSArKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysr
Ky0tDQo+ICAxIGZpbGUgY2hhbmdlZCwgNTkgaW5zZXJ0aW9ucygrKSwgMiBkZWxldGlvbnMoLSkN
Cj4gDQo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3ZpZGVvL2ZzbC1kaXUtZmIuYyBiL2RyaXZlcnMv
dmlkZW8vZnNsLWRpdS1mYi5jDQo+IGluZGV4IDRiYzQ3MzAuLjc5MjAzOGYgMTAwNjQ0DQo+IC0t
LSBhL2RyaXZlcnMvdmlkZW8vZnNsLWRpdS1mYi5jDQo+ICsrKyBiL2RyaXZlcnMvdmlkZW8vZnNs
LWRpdS1mYi5jDQo+IEBAIC01MCw2ICs1MCw3IEBADQo+ICAjZGVmaW5lIElOVF9QQVJFUlIJMHgw
OAkvKiBEaXNwbGF5IHBhcmFtZXRlcnMgZXJyb3IgaW50ZXJydXB0ICovDQo+ICAjZGVmaW5lIElO
VF9MU19CRl9WUwkweDEwCS8qIExpbmVzIGJlZm9yZSB2c3luYy4gaW50ZXJydXB0ICovDQo+IA0K
PiArI2RlZmluZSBQSVhDTEtDUl9QWENLRU4gMHg4MDAwMDAwMA0KPiAgLyoNCj4gICAqIExpc3Qg
b2Ygc3VwcG9ydGVkIHZpZGVvIG1vZGVzDQo+ICAgKg0KPiBAQCAtMzcyLDYgKzM3Myw4IEBAIHN0
cnVjdCBmc2xfZGl1X2RhdGEgew0KPiAgCXVuc2lnbmVkIGludCBpcnE7DQo+ICAJZW51bSBmc2xf
ZGl1X21vbml0b3JfcG9ydCBtb25pdG9yX3BvcnQ7DQo+ICAJc3RydWN0IGRpdSBfX2lvbWVtICpk
aXVfcmVnOw0KPiArCXZvaWQgX19pb21lbSAqcGl4ZWxjbGtfcmVnOw0KPiArCXUzMiBwaXhjbGtj
clszXTsNCj4gIAlzcGlubG9ja190IHJlZ19sb2NrOw0KPiAgCXU4IGR1bW15X2FvaVs0ICogNCAq
IDRdOw0KPiAgCXN0cnVjdCBkaXVfYWQgZHVtbXlfYWQgX19hbGlnbmVkKDgpOw0KPiBAQCAtNDc5
LDcgKzQ4MiwxMCBAQCBzdGF0aWMgZW51bSBmc2xfZGl1X21vbml0b3JfcG9ydCBmc2xfZGl1X25h
bWVfdG9fcG9ydChjb25zdA0KPiBjaGFyICpzKQ0KPiAgCQkJcG9ydCA9IEZTTF9ESVVfUE9SVF9E
TFZEUzsNCj4gIAl9DQo+IA0KPiAtCXJldHVybiBkaXVfb3BzLnZhbGlkX21vbml0b3JfcG9ydChw
b3J0KTsNCj4gKwlpZiAoZGl1X29wcy52YWxpZF9tb25pdG9yX3BvcnQpDQo+ICsJCXJldHVybiBk
aXVfb3BzLnZhbGlkX21vbml0b3JfcG9ydChwb3J0KTsNCj4gKwllbHNlDQpSZW1vdmUgdGhpcyAi
ZWxzZSIsIG90aGVyd2lzZSBsb29rcyBnb29kLg0KDQpSZWdhcmRzLA0KLURvbmdzaGVuZw0KPiAr
CQlyZXR1cm4gcG9ydDsNCj4gIH0NCj4gDQoNCg==
^ permalink raw reply
* RE: [PATCH] ASoC: fsl_sai: Fix buggy configurations in trigger()
From: Li.Xiubo @ 2014-04-01 1:46 UTC (permalink / raw)
To: guangyu.chen@freescale.com, broonie@kernel.org
Cc: alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org, timur@tabi.org
In-Reply-To: <1396265962-19343-1-git-send-email-Guangyu.Chen@freescale.com>
> Subject: [PATCH] ASoC: fsl_sai: Fix buggy configurations in trigger()
>=20
> The current trigger() has two crucial problems:
> 1) The DMA request enabling operations (FSL_SAI_CSR_FRDE) for Tx and Rx a=
re
> now totally exclusive: It would fail to run simultaneous Tx-Rx cases.
> 2) The TERE disabling operation depends on an incorrect condition -- acti=
ve
> reference count that only gets increased in snd_pcm_open() and decreas=
ed
> in snd_pcm_close(): The TERE would never get cleared.
>=20
> So this patch overwrites the trigger function by following these rules:
> A) We continue to support tx-async-while-rx-sync-to-tx case alone, which'=
s
> originally limited by this fsl_sai driver, but we make the code easy t=
o
> modify for the further support of the opposite case.
> B) We enable both TE and RE for PLAYBACK stream or CAPTURE stream but onl=
y
> enabling the DMA request bit (FSL_SAI_CSR_FRDE) of the current directi=
on
> due to the requirement of SAI -- For tx-async-while-rx-sync-to-tx case=
,
> the receiver is enabled only when both the transmitter and receiver ar=
e
> enabled.
> C) We only enable one side interrupt for each stream since over/underrun
> on the opposite stream would be resulted from what we've done in rule =
B:
> enabling TERE but remaining FRDE disabled, even though the xrun on the
> opposite direction will not break the current stream.
>=20
> Tested cases:
> a) aplay test.wav -d5
> b) arecord -r44100 -c2 -fS16_LE test.wav -d5
> c) arecord -r44100 -c2 -fS16_LE -d5 | aplay
> d) (aplay test2.wav &); sleep 1; arecord -r44100 -c2 -fS16_LE test.wav -d=
1
> e) (arecord -r44100 -c2 -fS16_LE test.wav -d5 &); sleep 1; aplay test.wav=
-d1
>=20
> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
> ---
I have test it on my Vybird board.
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
Thanks,
BRs
Xiubo
> sound/soc/fsl/fsl_sai.c | 43 +++++++++++++++++++++++--------------------
> sound/soc/fsl/fsl_sai.h | 11 +++++++++++
> 2 files changed, 34 insertions(+), 20 deletions(-)
>=20
> diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> index f088545..d64c33f 100644
> --- a/sound/soc/fsl/fsl_sai.c
> +++ b/sound/soc/fsl/fsl_sai.c
> @@ -365,6 +365,7 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> *substream, int cmd,
> struct snd_soc_dai *cpu_dai)
> {
> struct fsl_sai *sai =3D snd_soc_dai_get_drvdata(cpu_dai);
> + bool tx =3D substream->stream =3D=3D SNDRV_PCM_STREAM_PLAYBACK;
> u32 tcsr, rcsr;
>=20
> /*
> @@ -379,14 +380,6 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> *substream, int cmd,
> regmap_read(sai->regmap, FSL_SAI_TCSR, &tcsr);
> regmap_read(sai->regmap, FSL_SAI_RCSR, &rcsr);
>=20
> - if (substream->stream =3D=3D SNDRV_PCM_STREAM_PLAYBACK) {
> - tcsr |=3D FSL_SAI_CSR_FRDE;
> - rcsr &=3D ~FSL_SAI_CSR_FRDE;
> - } else {
> - rcsr |=3D FSL_SAI_CSR_FRDE;
> - tcsr &=3D ~FSL_SAI_CSR_FRDE;
> - }
> -
> /*
> * It is recommended that the transmitter is the last enabled
> * and the first disabled.
> @@ -395,22 +388,32 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> *substream, int cmd,
> case SNDRV_PCM_TRIGGER_START:
> case SNDRV_PCM_TRIGGER_RESUME:
> case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
> - tcsr |=3D FSL_SAI_CSR_TERE;
> - rcsr |=3D FSL_SAI_CSR_TERE;
> + if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
> + regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
> + FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
> + regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
> + FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
> + }
>=20
> - regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
> - regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + FSL_SAI_CSR_xIE_MASK, FSL_SAI_FLAGS);
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
> break;
> case SNDRV_PCM_TRIGGER_STOP:
> case SNDRV_PCM_TRIGGER_SUSPEND:
> case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
> - if (!(cpu_dai->playback_active || cpu_dai->capture_active)) {
> - tcsr &=3D ~FSL_SAI_CSR_TERE;
> - rcsr &=3D ~FSL_SAI_CSR_TERE;
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + FSL_SAI_CSR_FRDE, 0);
> + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
> + FSL_SAI_CSR_xIE_MASK, 0);
> +
> + if (!(tcsr & FSL_SAI_CSR_FRDE || rcsr & FSL_SAI_CSR_FRDE)) {
> + regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
> + FSL_SAI_CSR_TERE, 0);
> + regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
> + FSL_SAI_CSR_TERE, 0);
> }
> -
> - regmap_write(sai->regmap, FSL_SAI_TCSR, tcsr);
> - regmap_write(sai->regmap, FSL_SAI_RCSR, rcsr);
> break;
> default:
> return -EINVAL;
> @@ -464,8 +467,8 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_=
dai)
> {
> struct fsl_sai *sai =3D dev_get_drvdata(cpu_dai->dev);
>=20
> - regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff,
> FSL_SAI_FLAGS);
> - regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff,
> FSL_SAI_FLAGS);
> + regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0);
> + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0);
> regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
> FSL_SAI_MAXBURST_TX * 2);
> regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
> diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
> index a264185..be26d46 100644
> --- a/sound/soc/fsl/fsl_sai.h
> +++ b/sound/soc/fsl/fsl_sai.h
> @@ -35,6 +35,16 @@
> #define FSL_SAI_RFR 0xc0 /* SAI Receive FIFO */
> #define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */
>=20
> +#define FSL_SAI_xCSR(tx) (tx ? FSL_SAI_TCSR : FSL_SAI_RCSR)
> +#define FSL_SAI_xCR1(tx) (tx ? FSL_SAI_TCR1 : FSL_SAI_RCR1)
> +#define FSL_SAI_xCR2(tx) (tx ? FSL_SAI_TCR2 : FSL_SAI_RCR2)
> +#define FSL_SAI_xCR3(tx) (tx ? FSL_SAI_TCR3 : FSL_SAI_RCR3)
> +#define FSL_SAI_xCR4(tx) (tx ? FSL_SAI_TCR4 : FSL_SAI_RCR4)
> +#define FSL_SAI_xCR5(tx) (tx ? FSL_SAI_TCR5 : FSL_SAI_RCR5)
> +#define FSL_SAI_xDR(tx) (tx ? FSL_SAI_TDR : FSL_SAI_RDR)
> +#define FSL_SAI_xFR(tx) (tx ? FSL_SAI_TFR : FSL_SAI_RFR)
> +#define FSL_SAI_xMR(tx) (tx ? FSL_SAI_TMR : FSL_SAI_RMR)
> +
> /* SAI Transmit/Recieve Control Register */
> #define FSL_SAI_CSR_TERE BIT(31)
> #define FSL_SAI_CSR_FR BIT(25)
> @@ -48,6 +58,7 @@
> #define FSL_SAI_CSR_FWF BIT(17)
> #define FSL_SAI_CSR_FRF BIT(16)
> #define FSL_SAI_CSR_xIE_SHIFT 8
> +#define FSL_SAI_CSR_xIE_MASK (0x1f << FSL_SAI_CSR_xIE_SHIFT)
> #define FSL_SAI_CSR_WSIE BIT(12)
> #define FSL_SAI_CSR_SEIE BIT(11)
> #define FSL_SAI_CSR_FEIE BIT(10)
> --
> 1.8.4
>=20
^ permalink raw reply
* Re: Bug in reclaim logic with exhausted nodes?
From: Nishanth Aravamudan @ 2014-04-01 1:33 UTC (permalink / raw)
To: Christoph Lameter; +Cc: linux-mm, mgorman, linuxppc-dev, anton, rientjes
In-Reply-To: <alpine.DEB.2.10.1403290038200.24286@nuc>
On 29.03.2014 [00:40:41 -0500], Christoph Lameter wrote:
> On Thu, 27 Mar 2014, Nishanth Aravamudan wrote:
>
> > > That looks to be the correct way to handle things. Maybe mark the node as
> > > offline or somehow not present so that the kernel ignores it.
> >
> > This is a SLUB condition:
> >
> > mm/slub.c::early_kmem_cache_node_alloc():
> > ...
> > page = new_slab(kmem_cache_node, GFP_NOWAIT, node);
> > ...
>
> So the page allocation from the node failed. We have a strange boot
> condition where the OS is aware of anode but allocations on that node
> fail.
Yep. The node exists, it's just fully exhausted at boot (due to the
presence of 16GB pages reserved at boot-time).
> > if (page_to_nid(page) != node) {
> > printk(KERN_ERR "SLUB: Unable to allocate memory from "
> > "node %d\n", node);
> > printk(KERN_ERR "SLUB: Allocating a useless per node structure "
> > "in order to be able to continue\n");
> > }
> > ...
> >
> > Since this is quite early, and we have not set up the nodemasks yet,
> > does it make sense to perhaps have a temporary init-time nodemask that
> > we set bits in here, and "fix-up" those nodes when we setup the
> > nodemasks?
>
> Please take care of this earlier than this. The page allocator in
> general should allow allocations from all nodes with memory during
> boot,
I'd appreciate a bit more guidance? I'm suggesting that in this case the
node functionally has no memory. So the page allocator should not allow
allocations from it -- except (I need to investigate this still)
userspace accessing the 16GB pages on that node, but that, I believe,
doesn't go through the page allocator at all, it's all from hugetlb
interfaces. It seems to me there is a bug in SLUB that we are noting
that we have a useless per-node structure for a given nid, but not
actually preventing requests to that node or reclaim because of those
allocations.
The page allocator is actually fine here, afaict. We've pulled out
memory from this node, even though it's present, so none is free. All of
that is working as expected, based upon the issue we've seen. The
problems start when we "force" (by way of a round-robin page allocation
request from /proc/sys/vm/nr_hugepages) a THISNODE allocation to come
from the exhausted node, which has no memory free, causing reclaim,
which progresses on other nodes, and thus never alleviates the
allocation failure (and can't).
I think there is a logical bug (even if it only occurs in this
particular corner case) where if reclaim progresses for a THISNODE
allocation, we don't check *where* the reclaim is progressing, and thus
may falsely be indicating that we have done some progress when in fact
the allocation that is causing reclaim will not possibly make any more
progress.
Thanks,
Nish
^ permalink raw reply
* Re: OOPS in hvc / virtconsole
From: Andy Lutomirski @ 2014-03-31 23:49 UTC (permalink / raw)
To: linux-kernel@vger.kernel.org, linuxppc-dev, virtio-dev,
virtualization
In-Reply-To: <CALCETrWuUcinbJ5v2LzaFWEg1vkBAB2H8rD9x0jccawwRwb4pQ@mail.gmail.com>
On Mon, Mar 31, 2014 at 3:31 PM, Andy Lutomirski <luto@amacapital.net> wrote:
> I'm running a Fedora distro kernel (3.13.7-200.fc20.x86_64) in kvm
> with these options:
>
> -chardev null,id=hvc0,signal=off
> -device virtio-serial-pci
> -device virtconsole,chardev=hvc0,name=virtme_console
> -append console=hvc0 console=ttyS0
> -nographic
>
> (There are more, but these are the interesting ones, I think.)
You can reproduce it by downloading this:
https://git.kernel.org/cgit/utils/kernel/virtme/virtme.git/commit/?h=crash-virtconsole&id=c55df415154e6331a1dc96a5e2ffcf5c684fc2f9
and running:
./virtme-run --installed-kernel 3.13.7-200.fc20.x86_64 --console
--qemu-opts -m 2048 -smp 2
Adjust the requested kernel version as appropriate.
--Andy
^ permalink raw reply
* Re: [PATCH 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation
From: Scott Wood @ 2014-03-31 23:03 UTC (permalink / raw)
To: Alexander Graf; +Cc: Mihai Caraman, linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <53397091.4050601@suse.de>
On Mon, 2014-03-31 at 15:41 +0200, Alexander Graf wrote:
> On 03/26/2014 10:17 PM, Scott Wood wrote:
> > On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman wrote:
> >> + /*
> >> + * Another thread may rewrite the TLB entry in parallel, don't
> >> + * execute from the address if the execute permission is not set
> >> + */
>
> What happens when another thread rewrites the TLB entry in parallel?
> Does tlbsx succeed? Does it fail? Do we see failure indicated somehow?
> Are the contents of the MAS registers consistent at this point or
> inconsistent?
If another thread rewrites the TLB entry, then we use the new TLB entry,
just as if it had raced in hardware. This check ensures that we don't
execute from the new TLB entry if it doesn't have execute permissions
(just as hardware would).
What happens if the new TLB entry is valid and executable, and the
instruction pointed to is valid, but doesn't trap (and thus we don't
have emulation for it)?
> There has to be a good way to detect such a race and deal with it, no?
How would you detect it? We don't get any information from the trap
about what physical address the instruction was fetched from, or what
the instruction was.
-Scott
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/powernv: Add OPAL message log interface
From: Joel Stanley @ 2014-03-31 22:52 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Stewart Smith, michael, Michael Neuling, shangw, hegdevasant,
paulus, Anton Blanchard, linuxppc-dev
In-Reply-To: <1396267178.11529.80.camel@pasglop>
On Mon, Mar 31, 2014 at 10:29 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
>> > + conbuf = phys_to_virt(be64_to_cpu(mc->obuf_phys));
>> > + wrapped = be32_to_cpu(mc->out_pos) & MEMCONS_OUT_POS_WRAP;
>> > + out_pos = be32_to_cpu(mc->out_pos) & MEMCONS_OUT_POS_MASK;
>> > +
>>
>> Are there ordering issues we need to think about here with reading
>> these? Can the messages be written on another CPU at the same time as
>> these are being read?
>
> Good point. out_pos should probably be read only once into a local
> variable using the ACCESS_ONCE macro, and then only be broken up.
I've got a V2 that fixes this and the other issues Mikey pointed out.
I found that the log would get corrupted from Linux's point of view
once full. Dumping the memory suggests that the contents of the
circular buffer is fine, and it's just our pointer (out_pos) that is
incorrect. It's not clear why this is happening; I'll do some more
testing before sending out the updated patch.
Cheers,
Joel
^ permalink raw reply
* Re: [PATCH] powerpc/le: enable RTAS events support
From: Stewart Smith @ 2014-03-31 22:49 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linux-kernel, paulus, anton, nfont, linuxppc-dev, Greg Kurz
In-Reply-To: <1396266973.11529.77.camel@pasglop>
Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
> On Mon, 2014-03-31 at 09:27 +1100, Stewart Smith wrote:
>> Greg Kurz <gkurz@linux.vnet.ibm.com> writes:
>> > struct rtas_error_log {
>> > +#ifdef __BIG_ENDIAN__
>> > + /* Byte 0 */
>> > unsigned long version:8; /* Architectural version */
>> > + /* Byte 1 */
>>
>> I think it would be great if we got rid of the usage of bitfields. As
>> soon as the mood of the compiler changes, this code is going to break.
>
> ... as would a whole pile of kernel code including filesystems :)
>
> Now, don't get me wrong, I hate bitfields as much as you do for the same
> reasons. However (unfortunately ?) we've somewhat painted ourselves into
> a corner here in kernel-land and I suspect gcc would have a very hard
> time changing the format considering how many people did just the same
> we did.
>
> Now if we were a userspace program, I would still insist on fixing it on
> the ground on not depending on gcc but this is the kernel ... we have
> more gcc'isms than spots on the face of a 14 yrs old..
A quick grep didn't show up anything that looked like on disk
formats... at least for anything I care about :)
Maybe I've spent too long writing code for more than one compiler :)
^ permalink raw reply
* OOPS in hvc / virtconsole
From: Andy Lutomirski @ 2014-03-31 22:31 UTC (permalink / raw)
To: linux-kernel@vger.kernel.org, linuxppc-dev, virtio-dev,
virtualization
I'm running a Fedora distro kernel (3.13.7-200.fc20.x86_64) in kvm
with these options:
-chardev null,id=hvc0,signal=off
-device virtio-serial-pci
-device virtconsole,chardev=hvc0,name=virtme_console
-append console=hvc0 console=ttyS0
-nographic
(There are more, but these are the interesting ones, I think.)
Note that virtio_console is modular, which might be a problem.
It blows up like this:
[ 0.443591] kernel tried to execute NX-protected page - exploit
attempt? (uid: 0)
[ 0.444004] BUG: unable to handle kernel paging request at ffffffff81d69c60
[ 0.444004] IP: [<ffffffff81d69c60>] hvc_console_setup+0x0/0x24
[ 0.444004] PGD 1c0f067 PUD 1c10063 PMD 7bcb9063 PTE 8000000001d69163
[ 0.444004] Oops: 0011 [#1] SMP
[ 0.444004] Modules linked in: virtio_pci virtio_console
9pnet_virtio virtio_ring virtio 9p 9pnet fscache
[ 0.444004] CPU: 0 PID: 71 Comm: kworker/0:3 Not tainted
3.13.7-200.fc20.x86_64 #1
[ 0.444004] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2011
[ 0.444004] Workqueue: events control_work_handler [virtio_console]
[ 0.444004] task: ffff88007bc04500 ti: ffff88007bcca000 task.ti:
ffff88007bcca000
[ 0.444004] RIP: 0010:[<ffffffff81d69c60>] [<ffffffff81d69c60>]
hvc_console_setup+0x0/0x24
[ 0.444004] RSP: 0018:ffff88007bccbd40 EFLAGS: 00010246
[ 0.444004] RAX: 0000000000000000 RBX: ffffffff81ca8a60 RCX: 0000000000000010
[ 0.444004] RDX: ffffffff81d69c60 RSI: 0000000000000000 RDI: ffffffff81ca8a60
[ 0.444004] RBP: ffff88007bccbd68 R08: ffffffff81ca8b10 R09: ffff88007c704000
[ 0.444004] R10: ffffffff813f1d24 R11: 0000000000000000 R12: ffffffff81f155a0
[ 0.444004] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
[ 0.444004] FS: 0000000000000000(0000) GS:ffff88007fc00000(0000)
knlGS:0000000000000000
[ 0.444004] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 0.444004] CR2: ffffffff81d69c60 CR3: 000000007bcc4000 CR4: 00000000000407f0
[ 0.444004] Stack:
[ 0.444004] ffffffff810bfdbb ffff88007c704000 0000000000000000
0000000000000000
[ 0.444004] ffffffffa0050880 ffff88007bccbda8 ffffffff813f1e84
ffff88007c704000
[ 0.444004] ffff88007bd4a300 ffff88007c6deac4 ffff88007c6dea90
ffff88007c481000
[ 0.444004] Call Trace:
[ 0.444004] [<ffffffff810bfdbb>] ? register_console+0x11b/0x370
[ 0.444004] [<ffffffff813f1e84>] hvc_alloc+0x1a4/0x330
[ 0.444004] [<ffffffffa004eb1b>] init_port_console+0x2b/0xe0
[virtio_console]
[ 0.444004] [<ffffffffa004fb2f>] control_work_handler+0x19f/0x3bc
[virtio_console]
[ 0.444004] [<ffffffff81087b76>] process_one_work+0x176/0x430
[ 0.444004] [<ffffffff810887ab>] worker_thread+0x11b/0x3a0
[ 0.444004] [<ffffffff81088690>] ? rescuer_thread+0x350/0x350
[ 0.444004] [<ffffffff8108f272>] kthread+0xd2/0xf0
[ 0.444004] [<ffffffff8108f1a0>] ? insert_kthread_work+0x40/0x40
[ 0.444004] [<ffffffff8169663c>] ret_from_fork+0x7c/0xb0
[ 0.444004] [<ffffffff8108f1a0>] ? insert_kthread_work+0x40/0x40
[ 0.444004] Code: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc
cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc
cc cc cc cc <cc> cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc
cc cc
[ 0.444004] RIP [<ffffffff81d69c60>] hvc_console_setup+0x0/0x24
[ 0.444004] RSP <ffff88007bccbd40>
[ 0.444004] CR2: ffffffff81d69c60
[ 0.444004] ---[ end trace c5e5a6cab58be5c6 ]---
[ 0.473583] BUG: unable to handle kernel paging request at ffffffffffffffd8
[ 0.474098] IP: [<ffffffff8108f810>] kthread_data+0x10/0x20
[ 0.474098] PGD 1c0f067 PUD 1c11067 PMD 0
[ 0.474098] Oops: 0000 [#2] SMP
[ 0.474098] Modules linked in: virtio_pci virtio_console
9pnet_virtio virtio_ring virtio 9p 9pnet fscache
[ 0.474098] CPU: 0 PID: 71 Comm: kworker/0:3 Tainted: G D
3.13.7-200.fc20.x86_64 #1
[ 0.474098] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2011
[ 0.474098] task: ffff88007bc04500 ti: ffff88007bcca000 task.ti:
ffff88007bcca000
[ 0.474098] RIP: 0010:[<ffffffff8108f810>] [<ffffffff8108f810>]
kthread_data+0x10/0x20
[ 0.474098] RSP: 0018:ffff88007bccb990 EFLAGS: 00010002
[ 0.474098] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 000000000000000a
[ 0.474098] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff88007bc04500
[ 0.474098] RBP: ffff88007bccb990 R08: ffff88007bc04590 R09: ffff88007fc17980
[ 0.474098] R10: ffffffff8106af9c R11: ffffea0001f1f800 R12: ffff88007fc14580
[ 0.474098] R13: 0000000000000000 R14: ffff88007bc044f0 R15: ffff88007bc04500
[ 0.474098] FS: 0000000000000000(0000) GS:ffff88007fc00000(0000)
knlGS:0000000000000000
[ 0.474098] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 0.474098] CR2: 0000000000000028 CR3: 000000007bcc4000 CR4: 00000000000407f0
[ 0.474098] Stack:
[ 0.474098] ffff88007bccb9a8 ffffffff81088e01 ffff88007bc04500
ffff88007bccba08
[ 0.474098] ffffffff8168ae09 ffff88007bc04500 ffff88007bccbfd8
0000000000014580
[ 0.474098] 0000000000014580 ffff88007bc04500 ffff88007bc04ab8
ffff88007bccb7b0
[ 0.474098] Call Trace:
[ 0.474098] [<ffffffff81088e01>] wq_worker_sleeping+0x11/0x90
[ 0.474098] [<ffffffff8168ae09>] __schedule+0x4a9/0x740
[ 0.474098] [<ffffffff8168b0c9>] schedule+0x29/0x70
[ 0.474098] [<ffffffff8106fca7>] do_exit+0x6a7/0xa20
[ 0.474098] [<ffffffff810be9f8>] ? console_unlock+0x1e8/0x3f0
[ 0.474098] [<ffffffff81d69c60>] ? vty_init+0x174/0x174
[ 0.474098] [<ffffffff8168f4ac>] oops_end+0x9c/0xe0
[ 0.474098] [<ffffffff81683092>] no_context+0x27e/0x28b
[ 0.474098] [<ffffffff81d69c60>] ? vty_init+0x174/0x174
[ 0.474098] [<ffffffff81683112>] __bad_area_nosemaphore+0x73/0x1ca
[ 0.474098] [<ffffffff813173af>] ? add_uevent_var+0x6f/0x110
[ 0.474098] [<ffffffff81d69c60>] ? vty_init+0x174/0x174
[ 0.474098] [<ffffffff8168327c>] bad_area_nosemaphore+0x13/0x15
[ 0.474098] [<ffffffff81691cda>] __do_page_fault+0x9a/0x530
[ 0.474098] [<ffffffff81413467>] ? get_device+0x17/0x30
[ 0.474098] [<ffffffff81418a45>] ? klist_class_dev_get+0x15/0x20
[ 0.474098] [<ffffffff81678cf2>] ? klist_add_tail+0x32/0x40
[ 0.474098] [<ffffffff81414c19>] ? device_add+0x219/0x640
[ 0.474098] [<ffffffff8169217e>] do_page_fault+0xe/0x10
[ 0.474098] [<ffffffff81691878>] do_async_page_fault+0x28/0xa0
[ 0.474098] [<ffffffff8168e938>] async_page_fault+0x28/0x30
[ 0.474098] [<ffffffff813f1d24>] ? hvc_alloc+0x44/0x330
[ 0.474098] [<ffffffff81d69c60>] ? vty_init+0x174/0x174
[ 0.474098] [<ffffffff81d69c60>] ? vty_init+0x174/0x174
[ 0.474098] [<ffffffff810bfdbb>] ? register_console+0x11b/0x370
[ 0.474098] [<ffffffff813f1e84>] hvc_alloc+0x1a4/0x330
[ 0.474098] [<ffffffffa004eb1b>] init_port_console+0x2b/0xe0
[virtio_console]
[ 0.474098] [<ffffffffa004fb2f>] control_work_handler+0x19f/0x3bc
[virtio_console]
[ 0.474098] [<ffffffff81087b76>] process_one_work+0x176/0x430
[ 0.474098] [<ffffffff810887ab>] worker_thread+0x11b/0x3a0
[ 0.474098] [<ffffffff81088690>] ? rescuer_thread+0x350/0x350
[ 0.474098] [<ffffffff8108f272>] kthread+0xd2/0xf0
[ 0.474098] [<ffffffff8108f1a0>] ? insert_kthread_work+0x40/0x40
[ 0.474098] [<ffffffff8169663c>] ret_from_fork+0x7c/0xb0
[ 0.474098] [<ffffffff8108f1a0>] ? insert_kthread_work+0x40/0x40
[ 0.474098] Code: 00 48 89 e5 5d 48 8b 40 c8 48 c1 e8 02 83 e0 01
c3 66 2e 0f 1f 84 00 00 00 00 00 66 66 66 66 90 48 8b 87 48 03 00 00
55 48 89 e5 <48> 8b 40 d8 5d c3 66 2e 0f 1f 84 00 00 00 00 00 66 66 66
66 90
[ 0.474098] RIP [<ffffffff8108f810>] kthread_data+0x10/0x20
[ 0.474098] RSP <ffff88007bccb990>
[ 0.474098] CR2: ffffffffffffffd8
[ 0.474098] ---[ end trace c5e5a6cab58be5c7 ]---
[ 0.474098] Fixing recursive fault but reboot is needed!
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox