* Re: [PATCH 0/3] dmaengine: mpc512x: add device tree binding document and DMA channel lookup
From: Alexander Popov @ 2014-06-08 18:48 UTC (permalink / raw)
To: Gerhard Sittig, Dan Williams, Vinod Koul, Lars-Peter Clausen,
Arnd Bergmann, Anatolij Gustschin, Andy Shevchenko,
Alexander Popov, linuxppc-dev, dmaengine, devicetree
In-Reply-To: <1400924009-23992-1-git-send-email-a13xp0p0v88@gmail.com>
2014-05-24 13:33 GMT+04:00 Alexander Popov <a13xp0p0v88@gmail.com>:
> This patch series introduces a device tree binding document for
> the MPC512x DMA controller and adds device tree based DMA channel lookup
> for it.
Hello, excuse me, could I have a feedback?
Should I fix anything?
Thanks a lot!
Alexander
> Alexander Popov (3):
> dmaengine: mpc512x: add device tree binding document
> dmaengine: of: add common xlate function for matching by channel id
> dmaengine: mpc512x: register for device tree channel lookup
>
> .../devicetree/bindings/dma/mpc512x-dma.txt | 40 ++++++++++++++++++++++
> arch/powerpc/boot/dts/mpc5121.dtsi | 1 +
> drivers/dma/mpc512x_dma.c | 13 ++++++-
> drivers/dma/of-dma.c | 35 +++++++++++++++++++
> include/linux/of_dma.h | 4 +++
> 5 files changed, 92 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/dma/mpc512x-dma.txt
>
> --
> 1.8.4.2
>
^ permalink raw reply
* Re: [PATCH 2/2] gpio: gpiolib: set gpiochip_remove retval to void
From: Ben Dooks @ 2014-06-08 23:18 UTC (permalink / raw)
To: Lars-Peter Clausen
Cc: Linux MIPS Mailing List, m, Linux-sh list, Linus Walleij,
platform-driver-x86, linux-leds@vger.kernel.org, driverdevel,
Alexandre Courbot, patches, linux-samsungsoc, Geert Uytterhoeven,
linux-input@vger.kernel.org, Linux Media Mailing List,
spear-devel, linux-gpio@vger.kernel.org, David Daney,
linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
linux-wireless, linux-kernel@vger.kernel.org, abdoulaye berthe,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <5388CB1B.3090802@metafoo.de>
On Fri, May 30, 2014 at 08:16:59PM +0200, Lars-Peter Clausen wrote:
> On 05/30/2014 07:33 PM, David Daney wrote:
> >On 05/30/2014 04:39 AM, Geert Uytterhoeven wrote:
> >>On Fri, May 30, 2014 at 1:30 PM, abdoulaye berthe <berthe.ab@gmail.com>
> >>wrote:
> >>>--- a/drivers/gpio/gpiolib.c
> >>>+++ b/drivers/gpio/gpiolib.c
> >>>@@ -1263,10 +1263,9 @@ static void gpiochip_irqchip_remove(struct
> >>>gpio_chip *gpiochip);
> >>> *
> >>> * A gpio_chip with any GPIOs still requested may not be removed.
> >>> */
> >>>-int gpiochip_remove(struct gpio_chip *chip)
> >>>+void gpiochip_remove(struct gpio_chip *chip)
> >>> {
> >>> unsigned long flags;
> >>>- int status = 0;
> >>> unsigned id;
> >>>
> >>> acpi_gpiochip_remove(chip);
> >>>@@ -1278,24 +1277,15 @@ int gpiochip_remove(struct gpio_chip *chip)
> >>> of_gpiochip_remove(chip);
> >>>
> >>> for (id = 0; id < chip->ngpio; id++) {
> >>>- if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags)) {
> >>>- status = -EBUSY;
> >>>- break;
> >>>- }
> >>>- }
> >>>- if (status == 0) {
> >>>- for (id = 0; id < chip->ngpio; id++)
> >>>- chip->desc[id].chip = NULL;
> >>>-
> >>>- list_del(&chip->list);
> >>>+ if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags))
> >>>+ panic("gpio: removing gpiochip with gpios still
> >>>requested\n");
> >>
> >>panic?
> >
> >NACK to the patch for this reason. The strongest thing you should do here
> >is WARN.
> >
> >That said, I am not sure why we need this whole patch set in the first place.
>
> Well, what currently happens when you remove a device that is a
> provider of a gpio_chip which is still in use, is that the kernel
> crashes. Probably with a rather cryptic error message. So this patch
> doesn't really change the behavior, but makes it more explicit what
> is actually wrong. And even if you replace the panic() by a WARN()
> it will again just crash slightly later.
>
> This is a design flaw in the GPIO subsystem that needs to be fixed.
Surely then the best way is to error out to the module unload and
stop the driver being unloaded?
--
Ben Dooks, ben@fluff.org, http://www.fluff.org/ben/
Large Hadron Colada: A large Pina Colada that makes the universe disappear.
^ permalink raw reply
* Re: [PATCH v2] powerpc/powernv: hwmon driver for power values, fan rpm and temperature
From: Neelesh Gupta @ 2014-06-09 8:15 UTC (permalink / raw)
To: Guenter Roeck, linuxppc-dev, jdelvare, lm-sensors; +Cc: sbhat
In-Reply-To: <53858F02.2020808@roeck-us.net>
On 05/28/2014 12:53 PM, Guenter Roeck wrote:
> On 05/19/2014 07:26 AM, Neelesh Gupta wrote:
>> This patch adds basic kernel enablement for reading power values, fan
>> speed rpm and temperature values on powernv platforms which will
>> be exported to user space through sysfs interface.
>>
>> Test results:
>> -------------
>> [root@tul163p1 ~]# sensors
>> ibmpowernv-isa-0000
>> Adapter: ISA adapter
>> fan1: 5487 RPM (min = 0 RPM)
>> fan2: 5152 RPM (min = 0 RPM)
>> fan3: 5590 RPM (min = 0 RPM)
>> fan4: 4963 RPM (min = 0 RPM)
>> fan5: 0 RPM (min = 0 RPM)
>> fan6: 0 RPM (min = 0 RPM)
>> fan7: 7488 RPM (min = 0 RPM)
>> fan8: 7944 RPM (min = 0 RPM)
>> temp1: +39.0°C (high = +0.0°C)
>> power1: 192.00 W
>>
>> [root@tul163p1 ~]# ls /sys/devices/platform/
>> alarmtimer ibmpowernv.0 rtc-generic serial8250 uevent
>> [root@tul163p1 ~]# ls /sys/devices/platform/ibmpowernv.0/
>> driver/ hwmon/ modalias subsystem/ uevent
>> [root@tul163p1 ~]# ls /sys/devices/platform/ibmpowernv.0/hwmon/hwmon0/
>> device fan2_min fan4_min fan6_min fan8_min power1_input
>> fan1_fault fan3_fault fan5_fault fan7_fault in1_fault subsystem
>> fan1_input fan3_input fan5_input fan7_input in2_fault
>> temp1_input
>> fan1_min fan3_min fan5_min fan7_min in3_fault temp1_max
>> fan2_fault fan4_fault fan6_fault fan8_fault in4_fault uevent
>> fan2_input fan4_input fan6_input fan8_input name
>> [root@tul163p1 ~]#
>> [root@tul163p1 ~]# ls /sys/class/hwmon/hwmon0/
>> device fan2_min fan4_min fan6_min fan8_min power1_input
>> fan1_fault fan3_fault fan5_fault fan7_fault in1_fault subsystem
>> fan1_input fan3_input fan5_input fan7_input in2_fault
>> temp1_input
>> fan1_min fan3_min fan5_min fan7_min in3_fault temp1_max
>> fan2_fault fan4_fault fan6_fault fan8_fault in4_fault uevent
>> fan2_input fan4_input fan6_input fan8_input name
>> [root@tul163p1 ~]#
>>
>
>
> The inX_fault attributes don't really make much sense. _fault
> attributes without
> _input attributes don't have any value and are, as you noticed, not
> displayed
> with the sensors command. Is this a problem in teh devicetree data or
> do you
> really have voltage faults without voltages ?
There is no issue with the device data, somehow I'm getting only the
_fault attribute
for the inX_ (power-supply) attributes.
>
>> Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
>> ---
>>
> Checkpatch says:
>
> total: 8 errors, 11 warnings, 389 lines checked
>
> NOTE: whitespace errors detected, you may wish to use
> scripts/cleanpatch or
> scripts/cleanfile
>
> which should really not happen at this point.
>
> Please make sure you follow CodingStyle. checkpatch --strict points to
> a number
> of additional violations.
>
> More comments inline.
Fixed all of these issues related to coding style.
>
>> Changes in v2
>> =============
>> - Generic use of devm_* functions in hwmon like using devm_kzalloc()
>> for dynamic
>> memory request, avoiding the need to explicit free of memory.
>> Adding 'struct attribute_group' as member of platform data
>> structure to be
>> populated and then passed to
>> devm_hwmon_device_register_with_groups().
>>
>> Note: Having an array of pointers of 'attribute_group' and each group
>> corresponds to 'enum sensors' type. Not completely sure, if it's
>> ideal or
>> could have just one group populated with attributes of sensor types?
>>
> Your call, really; whatever is easier for you. I won't dictate one or
> the other.
>
> Question though is what happens if one group is not populated. If I
> understand
> the code correctly this will result in the remaining groups to be
> 'dropped',
> ie not displayed at all.
Yes, should be fixed.
>
>> - 'ibmpowernv' is not hot-pluggable device so moving
>> 'platform_driver' callback
>> function (probe) as part of __init code.
>> - Fixed issues related to coding style.
>> - Other general comments in v1.
>>
>> drivers/hwmon/Kconfig | 8 +
>> drivers/hwmon/Makefile | 1
>> drivers/hwmon/ibmpowernv.c | 368
>> ++++++++++++++++++++++++++++++++++++++++++++
>
> You'll also need Documentation/hwmon/ibmpowernv and
> Documentation/devicetree/bindings/hwmon/ibmpowernv.
>
> The latter will need to get an Ack from the devicetree maintainers.
I'll do as required.
>> 3 files changed, 377 insertions(+)
>> create mode 100644 drivers/hwmon/ibmpowernv.c
>>
>> diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
>> index bc196f4..3e308fa 100644
>> --- a/drivers/hwmon/Kconfig
>> +++ b/drivers/hwmon/Kconfig
>> @@ -554,6 +554,14 @@ config SENSORS_IBMPEX
>> This driver can also be built as a module. If so, the module
>> will be called ibmpex.
>>
>> +config SENSORS_IBMPOWERNV
>> + tristate "IBM POWERNV platform sensors"
>> + depends on PPC_POWERNV
>> + default y
>> + help
>> + If you say yes here you get support for the temperature/fan/power
>> + sensors on your platform.
>> +
>> config SENSORS_IIO_HWMON
>> tristate "Hwmon driver that uses channels specified via iio maps"
>> depends on IIO
>> diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
>> index c48f987..199c401 100644
>> --- a/drivers/hwmon/Makefile
>> +++ b/drivers/hwmon/Makefile
>> @@ -71,6 +71,7 @@ obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o
>> obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o
>> obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o
>> obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o
>> +obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o
>> obj-$(CONFIG_SENSORS_IIO_HWMON) += iio_hwmon.o
>> obj-$(CONFIG_SENSORS_INA209) += ina209.o
>> obj-$(CONFIG_SENSORS_INA2XX) += ina2xx.o
>> diff --git a/drivers/hwmon/ibmpowernv.c b/drivers/hwmon/ibmpowernv.c
>> new file mode 100644
>> index 0000000..afce620
>> --- /dev/null
>> +++ b/drivers/hwmon/ibmpowernv.c
>> @@ -0,0 +1,368 @@
>> +/*
>> + * IBM PowerNV platform sensors for temperature/fan/power
>> + * Copyright (C) 2014 IBM
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program.
>> + */
>> +
>> +#include <linux/init.h>
>> +#include <linux/module.h>
>> +#include <linux/kernel.h>
>> +#include <linux/hwmon.h>
>> +#include <linux/hwmon-sysfs.h>
>> +#include <linux/of.h>
>> +#include <linux/slab.h>
>> +
>> +#include <linux/platform_device.h>
>> +#include <asm/opal.h>
>> +#include <linux/err.h>
>> +
>> +#define DRVNAME "ibmpowernv"
>> +#define MAX_ATTR_LEN 32
>> +
>> +/* Sensor suffix name from DT */
>> +#define DT_FAULT_ATTR_SUFFIX "faulted"
>> +#define DT_DATA_ATTR_SUFFIX "data"
>> +#define DT_THRESHOLD_ATTR_SUFFIX "thrs"
>> +
>> +/*
>> + * Enumerates all the types of sensors in the POWERNV platform and
>> does index
>> + * into 'struct sensor_group'
>> + */
>> +enum sensors {
>> + FAN,
>> + AMBIENT_TEMP,
>> + POWER_SUPPLY,
>> + POWER_INPUT,
>> + MAX_SENSOR_TYPE,
>> +};
>> +
>> +static struct sensor_group {
>> + const char *name;
>> + const char *compatible;
>> + struct attribute_group group;
>> + u32 attr_count;
>> +} sensor_groups[] = {
>> + {"fan", "ibm,opal-sensor-cooling-fan", {0}, 0},
>> + {"temp", "ibm,opal-sensor-amb-temp", {0}, 0},
>> + {"in", "ibm,opal-sensor-power-supply", {0}, 0},
>> + {"power", "ibm,opal-sensor-power", {0}, 0}
>> +};
>> +
> The '0' initializations should not be necessary.
>
>
>> +struct sensor_data {
>> + u32 id; /* An opaque id of the firmware for each sensor */
>> + enum sensors type;
>> + char name[MAX_ATTR_LEN];
>> + struct device_attribute dev_attr;
>> +};
>> +
>> +struct platform_data {
>> + const struct attribute_group *attr_groups[MAX_SENSOR_TYPE + 1];
>> + u32 sensors_count; /* Total count of sensors from each group */
>> +};
>> +
>> +/* Platform device representing all the ibmpowernv sensors */
>> +static struct platform_device *pdevice;
>> +
>> +static ssize_t show_sensor(struct device *dev, struct
>> device_attribute *devattr,
>> + char *buf)
>> +{
>> + struct sensor_data *sdata = container_of(devattr, struct
>> sensor_data,
>> + dev_attr);
>> + ssize_t ret;
>> + u32 x;
>> +
>> + ret = opal_get_sensor_data(sdata->id, &x);
>> + if (ret) {
>> + pr_err("%s: Failed to get opal sensor data\n", __func__);
>> + return ret;
>> + }
>> +
>> + /* Convert temperature to milli-degrees */
>> + if (sdata->type == AMBIENT_TEMP)
>> + x *= 1000;
>> + /* Convert power to micro-watts */
>> + else if (sdata->type == POWER_INPUT)
>> + x *= 1000000;
>> +
>> + return sprintf(buf, "%d\n", x);
>
> x is unsigned, so %u.
Done.
>
>> +}
>> +
>> +static void __init get_sensor_index_attr(const char *name, u32
>> *index, char *attr)
>> +{
>> + char *hash_pos = strchr(name, '#');
>> + char *dash_pos;
>> + u32 copy_len;
>> + char buf[8];
>> +
>> + memset(buf, 0, sizeof(buf));
>> + *index = 0;
>> + *attr = '\0';
>> +
>> + if (hash_pos) {
>> + dash_pos = strchr(hash_pos, '-');
>> + if (dash_pos) {
>> + copy_len = dash_pos - hash_pos - 1;
>> + if (copy_len < sizeof(buf)) {
>> + strncpy(buf, hash_pos + 1, copy_len);
>> + sscanf(buf, "%d", index);
>
> What if sscanf fails ? Might be an interesting exercise to try and create
> multiple sensors with index 0 (or, for that matter, with the same
> index value).
> Do you have any protection against bad input data ? Guess not; did you
> test
> what happens if you pass bad data to the driver (such as duplicate sensor
> entries) ?
Well, rewriting this function to return the error code if fails.
Next version will cover these test cases covered. Thanks.
>
>> + }
>> +
>> + strncpy(attr, dash_pos + 1, MAX_ATTR_LEN);
>> + }
>> + }
>> +}
>> +
>> +/*
>> + * This function translates the DT node name into the 'hwmon'
>> attribute name.
>> + * IBMPOWERNV device node appear like cooling-fan#2-data,
>> amb-temp#1-thrs etc.
>> + * which need to be mapped as fan2_input, temp1_max respectively before
>> + * populating them inside hwmon device class..
>> + */
>> +static int __init create_hwmon_attr_name(enum sensors type, const
>> char *node_name,
>> + char *hwmon_attr_name)
>> +{
>> + char attr_suffix[MAX_ATTR_LEN];
>> + char *attr_name;
>> + u32 index;
>> +
>> + get_sensor_index_attr(node_name, &index, attr_suffix);
>> + if (!index || !strlen(attr_suffix)) {
>> + pr_info("%s: Sensor device node name is invalid, name: %s\n",
>> + __func__, node_name);
>> + return -EINVAL;
>> + }
>> +
>> + if (!strcmp(attr_suffix, DT_FAULT_ATTR_SUFFIX))
>> + attr_name = "fault";
>> + else if(!strcmp(attr_suffix, DT_DATA_ATTR_SUFFIX))
>> + attr_name = "input";
>> + else if (!strcmp(attr_suffix, DT_THRESHOLD_ATTR_SUFFIX)) {
>> + if (type == AMBIENT_TEMP)
>> + attr_name = "max";
>> + else if (type == FAN)
>> + attr_name = "min";
>> + else
>> + return -ENOENT;
>> + } else
>> + return -ENOENT;
>> +
>> + snprintf(hwmon_attr_name, MAX_ATTR_LEN, "%s%d_%s",
>> + sensor_groups[type].name, index, attr_name);
>> + return 0;
>> +}
>> +
>> +static int __init populate_attr_groups(struct platform_device *pdev)
>> +{
>> + struct platform_data *pdata = platform_get_drvdata(pdev);
>> + const struct attribute_group **pgroups = pdata->attr_groups;
>> + struct device_node *opal, *np;
>> + enum sensors type;
>> + int err = 0;
>> +
>> + opal = of_find_node_by_path("/ibm,opal/sensors");
>> + if (!opal) {
>
> An obvious whitespace error here.
>
>> + pr_err("%s: Opal 'sensors' node not found\n", __func__);
>> + return -ENODEV;
>> + }
>> +
>> + for_each_child_of_node(opal, np) {
>> + if (np->name == NULL)
>> + continue;
>> +
>> + for (type = 0; type < MAX_SENSOR_TYPE; type++)
>> + if (of_device_is_compatible(np,
>> + sensor_groups[type].compatible)) {
>> + sensor_groups[type].attr_count++;
>> + break;
>> + }
>> + }
>
> You should be able to do
> of_node_put(opal);
>
> here. Then you can return immediately on error below.
Done.
>
>> +
>> + for (type = 0; type < MAX_SENSOR_TYPE; type++) {
>> + if (!sensor_groups[type].attr_count)
>> + continue;
>> +
>> + sensor_groups[type].group.attrs = devm_kzalloc(&pdev->dev,
>> + sizeof(struct attribute*) *
>> + (sensor_groups[type].attr_count + 1),
>> + GFP_KERNEL);
>> + if (!sensor_groups[type].group.attrs) {
>> + pr_err("%s: Failed to allocate memory for attribute"
>> + "array\n", __func__);
>
> devm_kzalloc() already dumps an error message. Same for all other
> memory error messages.
>
>> + err = -ENOMEM;
>> + goto exit_put_node;
>> + }
>> +
>> + pgroups[type] = &sensor_groups[type].group;
>> + pdata->sensors_count += sensor_groups[type].attr_count;
>> + sensor_groups[type].attr_count = 0;
>> + }
>> +
>> +exit_put_node:
>> + of_node_put(opal);
>> + return err;
>> +}
>> +
>> +/*
>> + * Iterate through the device tree for each child of sensor node,
>> create
>> + * a sysfs attribute file, the file is named by translating the DT
>> node name
>> + * to the name required by the higher 'hwmon' driver like
>> fan1_input, temp1_max
>> + * etc..
>> + */
>> +static int __init create_device_attrs(struct platform_device *pdev)
>> +{
>> + struct platform_data *pdata = platform_get_drvdata(pdev);
>> + const struct attribute_group **pgroups = pdata->attr_groups;
>> + struct device_node *opal, *np;
>> + struct sensor_data *sdata;
>> + const u32 *sensor_id;
>> + enum sensors type;
>> + u32 count = 0;
>> + int err = 0;
>> +
>> + opal = of_find_node_by_path("/ibm,opal/sensors");
>> + if (!opal) {
>> + pr_err("%s: Opal 'sensors' node not found\n", __func__);
>> + return -ENODEV;
>> + }
>> +
>> + sdata = devm_kzalloc(&pdev->dev, (pdata->sensors_count) *
>> + sizeof(*sdata), GFP_KERNEL);
>> + if (!sdata) {
>> + pr_err("%s: Failed to allocate memory for the sensor_data",
>> + __func__);
>> + err = -ENOMEM;
>> + goto exit_put_node;
>> + }
>> +
>> + for_each_child_of_node(opal, np) {
>> + if (np->name == NULL)
>> + continue;
>> +
>> + for (type = 0; type < MAX_SENSOR_TYPE; type++)
>> + if (of_device_is_compatible(np,
>> + sensor_groups[type].compatible))
>> + break;
>> +
>> + if (type == MAX_SENSOR_TYPE)
>> + continue;
>> +
>> + sensor_id = of_get_property(np, "sensor-id", NULL);
>> + if (!sensor_id) {
>> + pr_info("%s: %s doesn't have sensor-id\n", __func__,
>> + np->name);
>> + continue;
>> + }
>> +
> Consider using of_property_read_u32().
Okay.
>
>> + sdata[count].id = *sensor_id;
>> + sdata[count].type = type;
>> + err = create_hwmon_attr_name(type, np->name,
>> sdata[count].name);
>> + if (err)
>> + goto exit_put_node;
>> +
>> + sysfs_attr_init(&sdata[count].dev_attr.attr);
>> + sdata[count].dev_attr.attr.name = sdata[count].name;
>> + sdata[count].dev_attr.attr.mode = S_IRUGO;
>> + sdata[count].dev_attr.show = show_sensor;
>> +
>> + pgroups[type]->attrs[sensor_groups[type].attr_count++] =
>> + &sdata[count++].dev_attr.attr;
>> + }
>> +
>> +exit_put_node:
>> + of_node_put(opal);
>> + return err;
>> +}
>> +
>> +static int __init ibmpowernv_probe(struct platform_device *pdev)
>> +{
>> + struct platform_data *pdata;
>> + struct device *hwmon_dev;
>> + int err;
>> +
>> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
>> + if (!pdata)
>> + return -ENOMEM;
>> +
>> + platform_set_drvdata(pdev, pdata);
>> + pdata->sensors_count = 0;
>> + err = populate_attr_groups(pdev);
>> + if (err)
>> + return err;
>> +
>> + /* Create sysfs attribute file for each sensor found in the DT */
>
> Attribute data, not file
>
>> + err = create_device_attrs(pdev);
>> + if (err)
>> + return err;
>> +
>> + /* Finally, register with hwmon */
>> + hwmon_dev = devm_hwmon_device_register_with_groups(&pdev->dev,
>> DRVNAME,
>> + pdata,
>> + pdata->attr_groups);
>> +
>> + return PTR_ERR_OR_ZERO(hwmon_dev);
>> +}
>> +
>> +static struct platform_driver ibmpowernv_driver = {
>> + .driver = {
>> + .owner = THIS_MODULE,
>> + .name = DRVNAME,
>> + },
>> +};
>> +
>> +static int __init ibmpowernv_init(void)
>> +{
>> + int err;
>> +
>> + pdevice = platform_device_alloc(DRVNAME, 0);
>> + if (!pdevice) {
>> + pr_err("%s: Device allocation failed\n", __func__);
>> + err = -ENOMEM;
>> + goto exit;
>> + }
>> +
>> + err = platform_device_add(pdevice);
>> + if (err) {
>> + pr_err("%s: Device addition failed (%d)\n", __func__, err);
>> + goto exit_device_put;
>> + }
>> +
>> + err = platform_driver_probe(&ibmpowernv_driver, ibmpowernv_probe);
>> + if (err) {
>> + pr_err("%s: Platfrom driver probe failed\n", __func__);
>> + goto exit_device_del;
>> + }
>> +
>> + return 0;
>> +
>> +exit_device_del:
>> + platform_device_del(pdevice);
>> +exit_device_put:
>> + platform_device_put(pdevice);
>> +exit:
>> + return err;
>> +}
>> +
>> +static void __exit ibmpowernv_exit(void)
>> +{
>> + platform_driver_unregister(&ibmpowernv_driver);
>> + platform_device_unregister(pdevice);
>> +}
>> +
>> +MODULE_AUTHOR("Neelesh Gupta <neelegup@linux.vnet.ibm.com>");
>> +MODULE_DESCRIPTION("IBM POWERNV platform sensors");
>> +MODULE_LICENSE("GPL");
>> +
>> +module_init(ibmpowernv_init);
>> +module_exit(ibmpowernv_exit);
>>
>>
>>
>
^ permalink raw reply
* [PATCH] powerpc/powernv: fix endianness problems in EEH
From: Guo Chao @ 2014-06-09 8:58 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Guo Chao, Gavin Shan
EEH information fetched from OPAL need fix before using in LE environment.
To be included in sparse's endian check, declare them as __beXX and
access them by accessors.
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Guo Chao <yan@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/opal.h | 102 +++++++++++++++---------------
arch/powerpc/platforms/powernv/eeh-ioda.c | 36 ++++++-----
arch/powerpc/platforms/powernv/pci.c | 81 +++++++++++++++---------
3 files changed, 120 insertions(+), 99 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 4ccd1d4..a4c0acc 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -599,9 +599,9 @@ enum {
};
struct OpalIoPhbErrorCommon {
- uint32_t version;
- uint32_t ioType;
- uint32_t len;
+ __be32 version;
+ __be32 ioType;
+ __be32 len;
};
struct OpalIoP7IOCPhbErrorData {
@@ -671,64 +671,64 @@ enum {
struct OpalIoPhb3ErrorData {
struct OpalIoPhbErrorCommon common;
- uint32_t brdgCtl;
+ __be32 brdgCtl;
/* PHB3 UTL regs */
- uint32_t portStatusReg;
- uint32_t rootCmplxStatus;
- uint32_t busAgentStatus;
+ __be32 portStatusReg;
+ __be32 rootCmplxStatus;
+ __be32 busAgentStatus;
/* PHB3 cfg regs */
- uint32_t deviceStatus;
- uint32_t slotStatus;
- uint32_t linkStatus;
- uint32_t devCmdStatus;
- uint32_t devSecStatus;
+ __be32 deviceStatus;
+ __be32 slotStatus;
+ __be32 linkStatus;
+ __be32 devCmdStatus;
+ __be32 devSecStatus;
/* cfg AER regs */
- uint32_t rootErrorStatus;
- uint32_t uncorrErrorStatus;
- uint32_t corrErrorStatus;
- uint32_t tlpHdr1;
- uint32_t tlpHdr2;
- uint32_t tlpHdr3;
- uint32_t tlpHdr4;
- uint32_t sourceId;
+ __be32 rootErrorStatus;
+ __be32 uncorrErrorStatus;
+ __be32 corrErrorStatus;
+ __be32 tlpHdr1;
+ __be32 tlpHdr2;
+ __be32 tlpHdr3;
+ __be32 tlpHdr4;
+ __be32 sourceId;
- uint32_t rsv3;
+ __be32 rsv3;
/* Record data about the call to allocate a buffer */
- uint64_t errorClass;
- uint64_t correlator;
+ __be64 errorClass;
+ __be64 correlator;
- uint64_t nFir; /* 000 */
- uint64_t nFirMask; /* 003 */
- uint64_t nFirWOF; /* 008 */
+ __be64 nFir; /* 000 */
+ __be64 nFirMask; /* 003 */
+ __be64 nFirWOF; /* 008 */
/* PHB3 MMIO Error Regs */
- uint64_t phbPlssr; /* 120 */
- uint64_t phbCsr; /* 110 */
- uint64_t lemFir; /* C00 */
- uint64_t lemErrorMask; /* C18 */
- uint64_t lemWOF; /* C40 */
- uint64_t phbErrorStatus; /* C80 */
- uint64_t phbFirstErrorStatus; /* C88 */
- uint64_t phbErrorLog0; /* CC0 */
- uint64_t phbErrorLog1; /* CC8 */
- uint64_t mmioErrorStatus; /* D00 */
- uint64_t mmioFirstErrorStatus; /* D08 */
- uint64_t mmioErrorLog0; /* D40 */
- uint64_t mmioErrorLog1; /* D48 */
- uint64_t dma0ErrorStatus; /* D80 */
- uint64_t dma0FirstErrorStatus; /* D88 */
- uint64_t dma0ErrorLog0; /* DC0 */
- uint64_t dma0ErrorLog1; /* DC8 */
- uint64_t dma1ErrorStatus; /* E00 */
- uint64_t dma1FirstErrorStatus; /* E08 */
- uint64_t dma1ErrorLog0; /* E40 */
- uint64_t dma1ErrorLog1; /* E48 */
- uint64_t pestA[OPAL_PHB3_NUM_PEST_REGS];
- uint64_t pestB[OPAL_PHB3_NUM_PEST_REGS];
+ __be64 phbPlssr; /* 120 */
+ __be64 phbCsr; /* 110 */
+ __be64 lemFir; /* C00 */
+ __be64 lemErrorMask; /* C18 */
+ __be64 lemWOF; /* C40 */
+ __be64 phbErrorStatus; /* C80 */
+ __be64 phbFirstErrorStatus; /* C88 */
+ __be64 phbErrorLog0; /* CC0 */
+ __be64 phbErrorLog1; /* CC8 */
+ __be64 mmioErrorStatus; /* D00 */
+ __be64 mmioFirstErrorStatus; /* D08 */
+ __be64 mmioErrorLog0; /* D40 */
+ __be64 mmioErrorLog1; /* D48 */
+ __be64 dma0ErrorStatus; /* D80 */
+ __be64 dma0FirstErrorStatus; /* D88 */
+ __be64 dma0ErrorLog0; /* DC0 */
+ __be64 dma0ErrorLog1; /* DC8 */
+ __be64 dma1ErrorStatus; /* E00 */
+ __be64 dma1FirstErrorStatus; /* E08 */
+ __be64 dma1ErrorLog0; /* E40 */
+ __be64 dma1ErrorLog1; /* E48 */
+ __be64 pestA[OPAL_PHB3_NUM_PEST_REGS];
+ __be64 pestB[OPAL_PHB3_NUM_PEST_REGS];
};
typedef struct oppanel_line {
@@ -851,8 +851,8 @@ int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t erro
int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
int64_t opal_get_epow_status(__be64 *status);
int64_t opal_set_system_attention_led(uint8_t led_action);
-int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
- uint16_t *pci_error_type, uint16_t *severity);
+int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
+ __be16 *pci_error_type, __be16 *severity);
int64_t opal_pci_poll(uint64_t phb_id);
int64_t opal_return_cpu(void);
int64_t opal_reinit_cpus(uint64_t flags);
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index 753f08e..e0d6a3a 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -267,7 +267,7 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
{
s64 ret = 0;
u8 fstate;
- u16 pcierr;
+ __be16 pcierr;
u32 pe_no;
int result;
struct pci_controller *hose = pe->phb;
@@ -316,7 +316,7 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
result = 0;
result &= ~EEH_STATE_RESET_ACTIVE;
- if (pcierr != OPAL_EEH_PHB_ERROR) {
+ if (be16_to_cpu(pcierr) != OPAL_EEH_PHB_ERROR) {
result |= EEH_STATE_MMIO_ACTIVE;
result |= EEH_STATE_DMA_ACTIVE;
result |= EEH_STATE_MMIO_ENABLED;
@@ -706,8 +706,8 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
struct pci_controller *hose;
struct pnv_phb *phb;
struct eeh_pe *phb_pe;
- u64 frozen_pe_no;
- u16 err_type, severity;
+ __be64 frozen_pe_no;
+ __be16 err_type, severity;
long rc;
int ret = EEH_NEXT_ERR_NONE;
@@ -742,8 +742,8 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
}
/* If the PHB doesn't have error, stop processing */
- if (err_type == OPAL_EEH_NO_ERROR ||
- severity == OPAL_EEH_SEV_NO_ERROR) {
+ if (be16_to_cpu(err_type) == OPAL_EEH_NO_ERROR ||
+ be16_to_cpu(severity) == OPAL_EEH_SEV_NO_ERROR) {
pr_devel("%s: No error found on PHB#%x\n",
__func__, hose->global_number);
continue;
@@ -755,14 +755,14 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
* specific PHB.
*/
pr_devel("%s: Error (%d, %d, %llu) on PHB#%x\n",
- __func__, err_type, severity,
- frozen_pe_no, hose->global_number);
- switch (err_type) {
+ __func__, be16_to_cpu(err_type), be16_to_cpu(severity),
+ be64_to_cpu(frozen_pe_no), hose->global_number);
+ switch (be16_to_cpu(err_type)) {
case OPAL_EEH_IOC_ERROR:
- if (severity == OPAL_EEH_SEV_IOC_DEAD) {
+ if (be16_to_cpu(severity) == OPAL_EEH_SEV_IOC_DEAD) {
pr_err("EEH: dead IOC detected\n");
ret = EEH_NEXT_ERR_DEAD_IOC;
- } else if (severity == OPAL_EEH_SEV_INF) {
+ } else if (be16_to_cpu(severity) == OPAL_EEH_SEV_INF) {
pr_info("EEH: IOC informative error "
"detected\n");
ioda_eeh_hub_diag(hose);
@@ -771,17 +771,18 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
break;
case OPAL_EEH_PHB_ERROR:
- if (severity == OPAL_EEH_SEV_PHB_DEAD) {
+ if (be16_to_cpu(severity) == OPAL_EEH_SEV_PHB_DEAD) {
*pe = phb_pe;
pr_err("EEH: dead PHB#%x detected\n",
hose->global_number);
ret = EEH_NEXT_ERR_DEAD_PHB;
- } else if (severity == OPAL_EEH_SEV_PHB_FENCED) {
+ } else if (be16_to_cpu(severity) ==
+ OPAL_EEH_SEV_PHB_FENCED) {
*pe = phb_pe;
pr_err("EEH: fenced PHB#%x detected\n",
hose->global_number);
ret = EEH_NEXT_ERR_FENCED_PHB;
- } else if (severity == OPAL_EEH_SEV_INF) {
+ } else if (be16_to_cpu(severity) == OPAL_EEH_SEV_INF) {
pr_info("EEH: PHB#%x informative error "
"detected\n",
hose->global_number);
@@ -801,12 +802,13 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
* progress with recovery. We needn't report
* it again.
*/
- if (ioda_eeh_get_pe(hose, frozen_pe_no, pe)) {
+ if (ioda_eeh_get_pe(hose,
+ be64_to_cpu(frozen_pe_no), pe)) {
*pe = phb_pe;
pr_err("EEH: Escalated fenced PHB#%x "
"detected for PE#%llx\n",
hose->global_number,
- frozen_pe_no);
+ be64_to_cpu(frozen_pe_no));
ret = EEH_NEXT_ERR_FENCED_PHB;
} else if ((*pe)->state & EEH_PE_ISOLATED) {
ret = EEH_NEXT_ERR_NONE;
@@ -819,7 +821,7 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
break;
default:
pr_warn("%s: Unexpected error type %d\n",
- __func__, err_type);
+ __func__, be16_to_cpu(err_type));
}
/*
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index eefbfcc..f91a4e5 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -206,72 +206,91 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
data = (struct OpalIoPhb3ErrorData*)common;
pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n",
- hose->global_number, common->version);
+ hose->global_number, be32_to_cpu(common->version));
if (data->brdgCtl)
pr_info("brdgCtl: %08x\n",
- data->brdgCtl);
+ be32_to_cpu(data->brdgCtl));
if (data->portStatusReg || data->rootCmplxStatus ||
data->busAgentStatus)
pr_info("UtlSts: %08x %08x %08x\n",
- data->portStatusReg, data->rootCmplxStatus,
- data->busAgentStatus);
+ be32_to_cpu(data->portStatusReg),
+ be32_to_cpu(data->rootCmplxStatus),
+ be32_to_cpu(data->busAgentStatus));
if (data->deviceStatus || data->slotStatus ||
data->linkStatus || data->devCmdStatus ||
data->devSecStatus)
pr_info("RootSts: %08x %08x %08x %08x %08x\n",
- data->deviceStatus, data->slotStatus,
- data->linkStatus, data->devCmdStatus,
- data->devSecStatus);
+ be32_to_cpu(data->deviceStatus),
+ be32_to_cpu(data->slotStatus),
+ be32_to_cpu(data->linkStatus),
+ be32_to_cpu(data->devCmdStatus),
+ be32_to_cpu(data->devSecStatus));
if (data->rootErrorStatus || data->uncorrErrorStatus ||
data->corrErrorStatus)
pr_info("RootErrSts: %08x %08x %08x\n",
- data->rootErrorStatus, data->uncorrErrorStatus,
- data->corrErrorStatus);
+ be32_to_cpu(data->rootErrorStatus),
+ be32_to_cpu(data->uncorrErrorStatus),
+ be32_to_cpu(data->corrErrorStatus));
if (data->tlpHdr1 || data->tlpHdr2 ||
data->tlpHdr3 || data->tlpHdr4)
pr_info("RootErrLog: %08x %08x %08x %08x\n",
- data->tlpHdr1, data->tlpHdr2,
- data->tlpHdr3, data->tlpHdr4);
+ be32_to_cpu(data->tlpHdr1),
+ be32_to_cpu(data->tlpHdr2),
+ be32_to_cpu(data->tlpHdr3),
+ be32_to_cpu(data->tlpHdr4));
if (data->sourceId || data->errorClass ||
data->correlator)
pr_info("RootErrLog1: %08x %016llx %016llx\n",
- data->sourceId, data->errorClass,
- data->correlator);
+ be32_to_cpu(data->sourceId),
+ be64_to_cpu(data->errorClass),
+ be64_to_cpu(data->correlator));
if (data->nFir)
pr_info("nFir: %016llx %016llx %016llx\n",
- data->nFir, data->nFirMask,
- data->nFirWOF);
+ be64_to_cpu(data->nFir),
+ be64_to_cpu(data->nFirMask),
+ be64_to_cpu(data->nFirWOF));
if (data->phbPlssr || data->phbCsr)
pr_info("PhbSts: %016llx %016llx\n",
- data->phbPlssr, data->phbCsr);
+ be64_to_cpu(data->phbPlssr),
+ be64_to_cpu(data->phbCsr));
if (data->lemFir)
pr_info("Lem: %016llx %016llx %016llx\n",
- data->lemFir, data->lemErrorMask,
- data->lemWOF);
+ be64_to_cpu(data->lemFir),
+ be64_to_cpu(data->lemErrorMask),
+ be64_to_cpu(data->lemWOF));
if (data->phbErrorStatus)
pr_info("PhbErr: %016llx %016llx %016llx %016llx\n",
- data->phbErrorStatus, data->phbFirstErrorStatus,
- data->phbErrorLog0, data->phbErrorLog1);
+ be64_to_cpu(data->phbErrorStatus),
+ be64_to_cpu(data->phbFirstErrorStatus),
+ be64_to_cpu(data->phbErrorLog0),
+ be64_to_cpu(data->phbErrorLog1));
if (data->mmioErrorStatus)
pr_info("OutErr: %016llx %016llx %016llx %016llx\n",
- data->mmioErrorStatus, data->mmioFirstErrorStatus,
- data->mmioErrorLog0, data->mmioErrorLog1);
+ be64_to_cpu(data->mmioErrorStatus),
+ be64_to_cpu(data->mmioFirstErrorStatus),
+ be64_to_cpu(data->mmioErrorLog0),
+ be64_to_cpu(data->mmioErrorLog1));
if (data->dma0ErrorStatus)
pr_info("InAErr: %016llx %016llx %016llx %016llx\n",
- data->dma0ErrorStatus, data->dma0FirstErrorStatus,
- data->dma0ErrorLog0, data->dma0ErrorLog1);
+ be64_to_cpu(data->dma0ErrorStatus),
+ be64_to_cpu(data->dma0FirstErrorStatus),
+ be64_to_cpu(data->dma0ErrorLog0),
+ be64_to_cpu(data->dma0ErrorLog1));
if (data->dma1ErrorStatus)
pr_info("InBErr: %016llx %016llx %016llx %016llx\n",
- data->dma1ErrorStatus, data->dma1FirstErrorStatus,
- data->dma1ErrorLog0, data->dma1ErrorLog1);
+ be64_to_cpu(data->dma1ErrorStatus),
+ be64_to_cpu(data->dma1FirstErrorStatus),
+ be64_to_cpu(data->dma1ErrorLog0),
+ be64_to_cpu(data->dma1ErrorLog1));
for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
- if ((data->pestA[i] >> 63) == 0 &&
- (data->pestB[i] >> 63) == 0)
+ if ((be64_to_cpu(data->pestA[i]) >> 63) == 0 &&
+ (be64_to_cpu(data->pestB[i]) >> 63) == 0)
continue;
pr_info("PE[%3d] A/B: %016llx %016llx\n",
- i, data->pestA[i], data->pestB[i]);
+ i, be64_to_cpu(data->pestA[i]),
+ be64_to_cpu(data->pestB[i]));
}
}
@@ -284,7 +303,7 @@ void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,
return;
common = (struct OpalIoPhbErrorCommon *)log_buff;
- switch (common->ioType) {
+ switch (be32_to_cpu(common->ioType)) {
case OPAL_PHB_ERROR_DATA_TYPE_P7IOC:
pnv_pci_dump_p7ioc_diag_data(hose, common);
break;
@@ -293,7 +312,7 @@ void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,
break;
default:
pr_warn("%s: Unrecognized ioType %d\n",
- __func__, common->ioType);
+ __func__, be32_to_cpu(common->ioType));
}
}
--
1.9.1
^ permalink raw reply related
* Re: [PATCH 2/2] gpio: gpiolib: set gpiochip_remove retval to void
From: Lars-Peter Clausen @ 2014-06-09 11:29 UTC (permalink / raw)
To: Ben Dooks
Cc: Linux MIPS Mailing List, m, Linux-sh list, Linus Walleij,
platform-driver-x86, linux-leds@vger.kernel.org, driverdevel,
Alexandre Courbot, patches, linux-samsungsoc, Geert Uytterhoeven,
linux-input@vger.kernel.org, Linux Media Mailing List,
spear-devel, linux-gpio@vger.kernel.org, David Daney,
linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
linux-wireless, linux-kernel@vger.kernel.org, abdoulaye berthe,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20140608231823.GB10112@trinity.fluff.org>
On 06/09/2014 01:18 AM, Ben Dooks wrote:
> On Fri, May 30, 2014 at 08:16:59PM +0200, Lars-Peter Clausen wrote:
>> On 05/30/2014 07:33 PM, David Daney wrote:
>>> On 05/30/2014 04:39 AM, Geert Uytterhoeven wrote:
>>>> On Fri, May 30, 2014 at 1:30 PM, abdoulaye berthe <berthe.ab@gmail.com>
>>>> wrote:
>>>>> --- a/drivers/gpio/gpiolib.c
>>>>> +++ b/drivers/gpio/gpiolib.c
>>>>> @@ -1263,10 +1263,9 @@ static void gpiochip_irqchip_remove(struct
>>>>> gpio_chip *gpiochip);
>>>>> *
>>>>> * A gpio_chip with any GPIOs still requested may not be removed.
>>>>> */
>>>>> -int gpiochip_remove(struct gpio_chip *chip)
>>>>> +void gpiochip_remove(struct gpio_chip *chip)
>>>>> {
>>>>> unsigned long flags;
>>>>> - int status = 0;
>>>>> unsigned id;
>>>>>
>>>>> acpi_gpiochip_remove(chip);
>>>>> @@ -1278,24 +1277,15 @@ int gpiochip_remove(struct gpio_chip *chip)
>>>>> of_gpiochip_remove(chip);
>>>>>
>>>>> for (id = 0; id < chip->ngpio; id++) {
>>>>> - if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags)) {
>>>>> - status = -EBUSY;
>>>>> - break;
>>>>> - }
>>>>> - }
>>>>> - if (status == 0) {
>>>>> - for (id = 0; id < chip->ngpio; id++)
>>>>> - chip->desc[id].chip = NULL;
>>>>> -
>>>>> - list_del(&chip->list);
>>>>> + if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags))
>>>>> + panic("gpio: removing gpiochip with gpios still
>>>>> requested\n");
>>>>
>>>> panic?
>>>
>>> NACK to the patch for this reason. The strongest thing you should do here
>>> is WARN.
>>>
>>> That said, I am not sure why we need this whole patch set in the first place.
>>
>> Well, what currently happens when you remove a device that is a
>> provider of a gpio_chip which is still in use, is that the kernel
>> crashes. Probably with a rather cryptic error message. So this patch
>> doesn't really change the behavior, but makes it more explicit what
>> is actually wrong. And even if you replace the panic() by a WARN()
>> it will again just crash slightly later.
>>
>> This is a design flaw in the GPIO subsystem that needs to be fixed.
>
> Surely then the best way is to error out to the module unload and
> stop the driver being unloaded?
>
You can't error out on module unload, although that's not really relevant
here. gpiochip_remove() is typically called when the device that registered
the GPIO chip is unbound. And despite some remove() callbacks having a
return type of int you can not abort the removal of a device.
- Lars
^ permalink raw reply
* <fsl,qman-channel-id> in dts file
From: Tony @ 2014-06-09 11:43 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 159 bytes --]
How's the fsl,qman-channel-id value different for different targets ?
Is there any document on how this value is achieved ?
Or can it be any value ???
Alan.
[-- Attachment #2: Type: text/html, Size: 226 bytes --]
^ permalink raw reply
* Re: <fsl,qman-channel-id> in dts file
From: Emil Medve @ 2014-06-09 15:02 UTC (permalink / raw)
To: Tony, linuxppc-dev
In-Reply-To: <CAE1uq6vw0VSDUymckX51FyoJ8NH4Gsj3npfiYeZNff1Vq0cKsQ@mail.gmail.com>
Hello Tony,
On 06/09/2014 06:43 AM, Tony wrote:
> How's the fsl,qman-channel-id value different for different targets ?
Channel ids are assigned in hardware
> Is there any document on how this value is achieved ?
They are described in the RM of each SoC and in the DPAA RM
> Or can it be any value ???
Nope. It must be the right value or frames will end up in the wrong
portal or worse
Cheers,
^ permalink raw reply
* [patch] powerpc/spufs: remove duplicate SPUFS_CNTL_MAP_SIZE define
From: Dan Carpenter @ 2014-06-09 15:19 UTC (permalink / raw)
To: Jeremy Kerr
Cc: cbe-oss-dev, Arnd Bergmann, kernel-janitors, Paul Mackerras,
linuxppc-dev
The SPUFS_CNTL_MAP_SIZE define is cut and pasted twice so we can delete
the second instance.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 0ba3c95..bcfd6f0 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -35,7 +35,6 @@
#define SPUFS_PS_MAP_SIZE 0x20000
#define SPUFS_MFC_MAP_SIZE 0x1000
#define SPUFS_CNTL_MAP_SIZE 0x1000
-#define SPUFS_CNTL_MAP_SIZE 0x1000
#define SPUFS_SIGNAL_MAP_SIZE PAGE_SIZE
#define SPUFS_MSS_MAP_SIZE 0x1000
^ permalink raw reply related
* Re: <fsl,qman-channel-id> in dts file
From: Tony @ 2014-06-09 15:28 UTC (permalink / raw)
To: Emil Medve; +Cc: linuxppc-dev
In-Reply-To: <5395CC7C.4040608@Freescale.com>
[-- Attachment #1: Type: text/plain, Size: 742 bytes --]
Thank Emil.
Where can i find the details about a 'diff' of qman revisions ? The code i
ported doesnt support latest qman revision (REV3). Can i still work on qman
REV1.1 for all the latest targets ? (read t-series)
Regards
On Mon, Jun 9, 2014 at 8:32 PM, Emil Medve <Emilian.Medve@freescale.com>
wrote:
> Hello Tony,
>
>
> On 06/09/2014 06:43 AM, Tony wrote:
> > How's the fsl,qman-channel-id value different for different targets ?
>
> Channel ids are assigned in hardware
>
> > Is there any document on how this value is achieved ?
>
> They are described in the RM of each SoC and in the DPAA RM
>
> > Or can it be any value ???
>
> Nope. It must be the right value or frames will end up in the wrong
> portal or worse
>
>
> Cheers,
>
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^ permalink raw reply
* [patch] powerpc/cpm: remove duplicate FCC_GFMR_TTX define
From: Dan Carpenter @ 2014-06-09 15:18 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Paul Mackerras, linuxppc-dev, kernel-janitors
The FCC_GFMR_TTX define is cut and pasted twice so we can remove the
second instance.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h
index f42e9ba..7c8608b 100644
--- a/arch/powerpc/include/asm/cpm2.h
+++ b/arch/powerpc/include/asm/cpm2.h
@@ -489,7 +489,6 @@ typedef struct scc_trans {
#define FCC_GFMR_TCI ((uint)0x20000000)
#define FCC_GFMR_TRX ((uint)0x10000000)
#define FCC_GFMR_TTX ((uint)0x08000000)
-#define FCC_GFMR_TTX ((uint)0x08000000)
#define FCC_GFMR_CDP ((uint)0x04000000)
#define FCC_GFMR_CTSP ((uint)0x02000000)
#define FCC_GFMR_CDS ((uint)0x01000000)
^ permalink raw reply related
* Re: Build regressions/improvements in v3.15-rc8
From: Geert Uytterhoeven @ 2014-06-09 19:35 UTC (permalink / raw)
To: Linux Kernel Development; +Cc: Linux/PPC Development
In-Reply-To: <alpine.DEB.2.02.1406092134180.21165@ayla.of.borg>
On Mon, 9 Jun 2014, Geert Uytterhoeven wrote:
> JFYI, when comparing v3.15-rc8[1] to v3.15-rc7[3], the summaries are:
> - build errors: +4/-4
+ /scratch/kisskb/src/kernel/bounds.c: error: -mcall-aixdesc must be big endian: => 1:0
+ /scratch/kisskb/src/scripts/mod/devicetable-offsets.c: error: -mcall-aixdesc must be big endian: => 1:0
+ /scratch/kisskb/src/scripts/mod/empty.c: error: -mcall-aixdesc must be big endian: => 1:0
+ <stdin>: error: -mcall-aixdesc must be big endian: => 1:0
powerpc-randconfig
> [1] http://kisskb.ellerman.id.au/kisskb/head/7532/ (all 119 configs)
> [3] http://kisskb.ellerman.id.au/kisskb/head/7506/ (all 119 configs)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: NUMA topology question wrt. d4edc5b6
From: David Rientjes @ 2014-06-09 21:38 UTC (permalink / raw)
To: Srivatsa S. Bhat
Cc: Dave Hansen, Srikar Dronamraju, Nishanth Aravamudan,
linuxppc-dev@lists.ozlabs.org list, Linux MM, Aneesh Kumar K.V,
nfont, Cody P Schafer, Anton Blanchard
In-Reply-To: <537E6285.3050000@linux.vnet.ibm.com>
On Fri, 23 May 2014, Srivatsa S. Bhat wrote:
> diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
> index c920215..58e6469 100644
> --- a/arch/powerpc/include/asm/topology.h
> +++ b/arch/powerpc/include/asm/topology.h
> @@ -18,6 +18,7 @@ struct device_node;
> */
> #define RECLAIM_DISTANCE 10
>
> +#include <linux/nodemask.h>
> #include <asm/mmzone.h>
>
> static inline int cpu_to_node(int cpu)
> @@ -30,7 +31,7 @@ static inline int cpu_to_node(int cpu)
> * During early boot, the numa-cpu lookup table might not have been
> * setup for all CPUs yet. In such cases, default to node 0.
> */
> - return (nid < 0) ? 0 : nid;
> + return (nid < 0) ? first_online_node : nid;
> }
>
> #define parent_node(node) (node)
I wonder what would happen on ppc if we just returned NUMA_NO_NODE here
for cpus that have not been mapped (they shouldn't even be possible).
This would at least allow callers that do
kmalloc_node(..., cpu_to_node(cpu)) to be allocated on the local cpu
rather than on a perhaps offline or remote node 0.
It would seem better to catch callers that do
cpu_to_node(<not-possible-cpu>) rather than blindly return an online node.
^ permalink raw reply
* Re: Node 0 not necessary for powerpc?
From: David Rientjes @ 2014-06-09 21:47 UTC (permalink / raw)
To: Nishanth Aravamudan
Cc: Tejun Heo, linux-mm, tony.luck, anton, Christoph Lameter,
linuxppc-dev
In-Reply-To: <20140521195743.GA5755@linux.vnet.ibm.com>
On Wed, 21 May 2014, Nishanth Aravamudan wrote:
> For context: I was looking at why N_ONLINE was statically setting Node 0
> to be online, whether or not the topology is that way -- I've been
> getting several bugs lately where Node 0 is online, but has no CPUs and
> no memory on it, on powerpc.
>
> On powerpc, setup_per_cpu_areas calls into ___alloc_bootmem_node using
> NODE_DATA(cpu_to_node(cpu)).
>
> Currently, cpu_to_node() in arch/powerpc/include/asm/topology.h does:
>
> /*
> * During early boot, the numa-cpu lookup table might not have been
> * setup for all CPUs yet. In such cases, default to node 0.
> */
> return (nid < 0) ? 0 : nid;
>
> And so early at boot, if node 0 is not present, we end up accessing an
> unitialized NODE_DATA(). So this seems buggy (I'll contact the powerpc
> deveopers separately on that).
>
I think what this really wants to do is NODE_DATA(cpu_to_mem(cpu)) and I
thought ppc had the cpu-to-local-memory-node mappings correct?
^ permalink raw reply
* Re: [patch] powerpc/spufs: remove duplicate SPUFS_CNTL_MAP_SIZE define
From: Jeremy Kerr @ 2014-06-09 23:09 UTC (permalink / raw)
To: Dan Carpenter
Cc: cbe-oss-dev, Arnd Bergmann, kernel-janitors, Paul Mackerras,
linuxppc-dev
In-Reply-To: <20140609151917.GM9600@mwanda>
Hi Dan,
> The SPUFS_CNTL_MAP_SIZE define is cut and pasted twice so we can delete
> the second instance.
Looks good to me.
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Cheers,
Jeremy
^ permalink raw reply
* Re: [PATCH v9 3/3] drivers/vfio: EEH support for VFIO PCI device
From: Gavin Shan @ 2014-06-09 23:49 UTC (permalink / raw)
To: Alex Williamson; +Cc: aik, Gavin Shan, kvm-ppc, agraf, qiudayu, linuxppc-dev
In-Reply-To: <1402078804.14174.24.camel@ul30vt.home>
On Fri, Jun 06, 2014 at 12:20:04PM -0600, Alex Williamson wrote:
>On Fri, 2014-06-06 at 15:00 +1000, Gavin Shan wrote:
>> The patch adds new IOCTL commands for sPAPR VFIO container device
>> to support EEH functionality for PCI devices, which have been passed
>> through from host to somebody else via VFIO.
>>
>> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
>> Acked-by: Alexander Graf <agraf@suse.de>
>> ---
>> Documentation/vfio.txt | 87 +++++++++++++++++++++++++++++++++++--
>> drivers/vfio/Makefile | 1 +
>> drivers/vfio/pci/vfio_pci.c | 18 ++++++--
>> drivers/vfio/vfio_iommu_spapr_tce.c | 17 +++++++-
>> drivers/vfio/vfio_spapr_eeh.c | 87 +++++++++++++++++++++++++++++++++++++
>> include/linux/vfio.h | 23 ++++++++++
>> include/uapi/linux/vfio.h | 34 +++++++++++++++
>> 7 files changed, 259 insertions(+), 8 deletions(-)
>> create mode 100644 drivers/vfio/vfio_spapr_eeh.c
>>
>> diff --git a/Documentation/vfio.txt b/Documentation/vfio.txt
>> index b9ca023..3fa4538 100644
>> --- a/Documentation/vfio.txt
>> +++ b/Documentation/vfio.txt
>> @@ -305,7 +305,15 @@ faster, the map/unmap handling has been implemented in real mode which provides
>> an excellent performance which has limitations such as inability to do
>> locked pages accounting in real time.
>>
>> -So 3 additional ioctls have been added:
>> +4) According to sPAPR specification, A Partitionable Endpoint (PE) is an I/O
>> +subtree that can be treated as a unit for the purposes of partitioning and
>> +error recovery. A PE may be a single or multi-function IOA (IO Adapter), a
>> +function of a multi-function IOA, or multiple IOAs (possibly including switch
>> +and bridge structures above the multiple IOAs). PPC64 guests detect PCI errors
>> +and recover from them via EEH RTAS services, which works on the basis of
>> +additional ioctl commands.
>> +
>> +So 4 additional ioctls have been added:
>>
>> VFIO_IOMMU_SPAPR_TCE_GET_INFO - returns the size and the start
>> of the DMA window on the PCI bus.
>> @@ -316,9 +324,12 @@ So 3 additional ioctls have been added:
>>
>> VFIO_IOMMU_DISABLE - disables the container.
>>
>> + VFIO_EEH_PE_OP - provides an API for EEH setup, error detection and recovery.
>>
>> The code flow from the example above should be slightly changed:
>>
>> + struct vfio_eeh_pe_op pe_op = { .argsz = sizeof(pe_op) };
>> +
>> .....
>> /* Add the group to the container */
>> ioctl(group, VFIO_GROUP_SET_CONTAINER, &container);
>> @@ -342,9 +353,79 @@ The code flow from the example above should be slightly changed:
>> dma_map.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE;
>>
>> /* Check here is .iova/.size are within DMA window from spapr_iommu_info */
>> -
>> ioctl(container, VFIO_IOMMU_MAP_DMA, &dma_map);
>> - .....
>> +
>> + /* Get a file descriptor for the device */
>> + device = ioctl(group, VFIO_GROUP_GET_DEVICE_FD, "0000:06:0d.0");
>> +
>> + ....
>> +
>> + /* Gratuitous device reset and go... */
>> + ioctl(device, VFIO_DEVICE_RESET);
>> +
>> + /* Make sure EEH is supported */
>> + ioctl(container, VFIO_CHECK_EXTENSION, VFIO_EEH);
>> +
>> + /* Enable the EEH functionality on the device */
>> + pe_op.op = VFIO_EEH_PE_ENABLE;
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> +
>> + /* You're suggested to create additional data struct to represent
>> + * PE, and put child devices belonging to same IOMMU group to the
>> + * PE instance for later reference.
>> + */
>> +
>> + /* Check the PE's state and make sure it's in functional state */
>> + pe_op.op = VFIO_EEH_PE_GET_STATE;
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> +
>> + /* Save device state using pci_save_state().
>> + * EEH should be enabled on the specified device.
>> + */
>> +
>> + ....
>> +
>> + /* When 0xFF's returned from reading PCI config space or IO BARs
>> + * of the PCI device. Check the PE's state to see if that has been
>> + * frozen.
>> + */
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> +
>> + /* Waiting for pending PCI transactions to be completed and don't
>> + * produce any more PCI traffic from/to the affected PE until
>> + * recovery is finished.
>> + */
>> +
>> + /* Enable IO for the affected PE and collect logs. Usually, the
>> + * standard part of PCI config space, AER registers are dumped
>> + * as logs for further analysis.
>> + */
>> + pe_op.op = VFIO_EEH_PE_UNFREEZE_IO;
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> +
>> + /*
>> + * Issue PE reset: hot or fundamental reset. Usually, hot reset
>> + * is enough. However, the firmware of some PCI adapters would
>> + * require fundamental reset.
>> + */
>> + pe_op.op = VFIO_EEH_PE_RESET_HOT;
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> + pe_op.op = VFIO_EEH_PE_RESET_DEACTIVATE;
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> +
>> + /* Configure the PCI bridges for the affected PE */
>> + pe_op.op = VFIO_EEH_PE_CONFIGURE;
>> + ioctl(container, VFIO_EEH_PE_OP, &pe_op);
>> +
>> + /* Restored state we saved at initialization time. pci_restore_state()
>> + * is good enough as an example.
>> + */
>> +
>> + /* Hopefully, error is recovered successfully. Now, you can resume to
>> + * start PCI traffic to/from the affected PE.
>> + */
>> +
>> + ....
>>
>> -------------------------------------------------------------------------------
>>
>> diff --git a/drivers/vfio/Makefile b/drivers/vfio/Makefile
>> index 72bfabc..50e30bc 100644
>> --- a/drivers/vfio/Makefile
>> +++ b/drivers/vfio/Makefile
>> @@ -1,4 +1,5 @@
>> obj-$(CONFIG_VFIO) += vfio.o
>> obj-$(CONFIG_VFIO_IOMMU_TYPE1) += vfio_iommu_type1.o
>> obj-$(CONFIG_VFIO_IOMMU_SPAPR_TCE) += vfio_iommu_spapr_tce.o
>> +obj-$(CONFIG_EEH) += vfio_spapr_eeh.o
>> obj-$(CONFIG_VFIO_PCI) += pci/
>> diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
>> index 7ba0424..0122665 100644
>> --- a/drivers/vfio/pci/vfio_pci.c
>> +++ b/drivers/vfio/pci/vfio_pci.c
>> @@ -156,8 +156,10 @@ static void vfio_pci_release(void *device_data)
>> {
>> struct vfio_pci_device *vdev = device_data;
>>
>> - if (atomic_dec_and_test(&vdev->refcnt))
>> + if (atomic_dec_and_test(&vdev->refcnt)) {
>> + vfio_spapr_pci_eeh_release(vdev->pdev);
>> vfio_pci_disable(vdev);
>> + }
>>
>> module_put(THIS_MODULE);
>> }
>> @@ -165,19 +167,27 @@ static void vfio_pci_release(void *device_data)
>> static int vfio_pci_open(void *device_data)
>> {
>> struct vfio_pci_device *vdev = device_data;
>> + int ret;
>>
>> if (!try_module_get(THIS_MODULE))
>> return -ENODEV;
>>
>> if (atomic_inc_return(&vdev->refcnt) == 1) {
>> - int ret = vfio_pci_enable(vdev);
>> + ret = vfio_pci_enable(vdev);
>> + if (ret)
>> + goto error;
>> +
>> + ret = vfio_spapr_pci_eeh_open(vdev->pdev);
>> if (ret) {
>> - module_put(THIS_MODULE);
>> - return ret;
>> + vfio_pci_disable(vdev);
>> + goto error;
>> }
>> }
>>
>> return 0;
>> +error:
>> + module_put(THIS_MODULE);
>> + return ret;
>> }
>>
>> static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
>> diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c b/drivers/vfio/vfio_iommu_spapr_tce.c
>> index a84788b..730b4ef 100644
>> --- a/drivers/vfio/vfio_iommu_spapr_tce.c
>> +++ b/drivers/vfio/vfio_iommu_spapr_tce.c
>> @@ -156,7 +156,16 @@ static long tce_iommu_ioctl(void *iommu_data,
>>
>> switch (cmd) {
>> case VFIO_CHECK_EXTENSION:
>> - return (arg == VFIO_SPAPR_TCE_IOMMU) ? 1 : 0;
>> + switch (arg) {
>> + case VFIO_SPAPR_TCE_IOMMU:
>> + ret = 1;
>> + break;
>> + default:
>> + ret = vfio_spapr_iommu_eeh_ioctl(NULL, cmd, arg);
>> + break;
>> + }
>> +
>> + return (ret < 0) ? 0 : ret;
>>
>> case VFIO_IOMMU_SPAPR_TCE_GET_INFO: {
>> struct vfio_iommu_spapr_tce_info info;
>> @@ -283,6 +292,12 @@ static long tce_iommu_ioctl(void *iommu_data,
>> tce_iommu_disable(container);
>> mutex_unlock(&container->lock);
>> return 0;
>> + case VFIO_EEH_PE_OP:
>> + if (!container->tbl || !container->tbl->it_group)
>> + return -ENODEV;
>> +
>> + return vfio_spapr_iommu_eeh_ioctl(container->tbl->it_group,
>> + cmd, arg);
>> }
>>
>> return -ENOTTY;
>> diff --git a/drivers/vfio/vfio_spapr_eeh.c b/drivers/vfio/vfio_spapr_eeh.c
>> new file mode 100644
>> index 0000000..d438394
>> --- /dev/null
>> +++ b/drivers/vfio/vfio_spapr_eeh.c
>> @@ -0,0 +1,87 @@
>> +/*
>> + * EEH functionality support for VFIO devices. The feature is only
>> + * available on sPAPR compatible platforms.
>> + *
>> + * Copyright Gavin Shan, IBM Corporation 2014.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/uaccess.h>
>> +#include <linux/vfio.h>
>> +#include <asm/eeh.h>
>> +
>> +/* We might build address mapping here for "fast" path later */
>> +int vfio_spapr_pci_eeh_open(struct pci_dev *pdev)
>> +{
>> + return eeh_dev_open(pdev);
>> +}
>> +
>> +void vfio_spapr_pci_eeh_release(struct pci_dev *pdev)
>> +{
>> + eeh_dev_release(pdev);
>> +}
>> +
>> +long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
>> + unsigned int cmd, unsigned long arg)
>> +{
>> + struct eeh_pe *pe;
>> + struct vfio_eeh_pe_op op;
>> + unsigned long minsz;
>> + long ret = -EINVAL;
>> +
>> + switch (cmd) {
>> + case VFIO_CHECK_EXTENSION:
>> + if (arg == VFIO_EEH)
>> + ret = eeh_enabled() ? 1 : 0;
>> + else
>> + ret = 0;
>> + break;
>> + case VFIO_EEH_PE_OP:
>> + pe = eeh_iommu_group_to_pe(group);
>> + if (!pe)
>> + return -ENODEV;
>> +
>> + minsz = offsetofend(struct vfio_eeh_pe_op, op);
>> + if (copy_from_user(&op, (void __user *)arg, minsz))
>> + return -EFAULT;
>> + if (op.argsz < minsz)
>> + return -EINVAL;
>
>I'm running low on comments, but I found one more. flags should be
>tested as zero here or else we'll run into problems with adding new
>functionality later. The caller could leave it uninitialized and pass
>junk which would then break if we start using those flags. New
>userspace on an old kernel could also intentionally pass flag bits that
>we ignore and let through here.
>
Thanks, Alex. I'll fix in next revision. The QEMU part needs corresponding
changes (set flags to zero), which will be updated and sent separately.
>
>How are you expecting this to go in, an ack from me then pushed through
>AlexG's tree? Thanks,
>
I don't think it can catch 3.16 merge window. Perhaps, Patch[1/3] and
Patch[2/3] goes to Ben's tree and Patch[3/3] could be picked by AlexG
or you, but I'm not sure.
Thanks,
Gavin
>> +
>> + switch (op.op) {
>> + case VFIO_EEH_PE_DISABLE:
>> + ret = eeh_pe_set_option(pe, EEH_OPT_DISABLE);
>> + break;
>> + case VFIO_EEH_PE_ENABLE:
>> + ret = eeh_pe_set_option(pe, EEH_OPT_ENABLE);
>> + break;
>> + case VFIO_EEH_PE_UNFREEZE_IO:
>> + ret = eeh_pe_set_option(pe, EEH_OPT_THAW_MMIO);
>> + break;
>> + case VFIO_EEH_PE_UNFREEZE_DMA:
>> + ret = eeh_pe_set_option(pe, EEH_OPT_THAW_DMA);
>> + break;
>> + case VFIO_EEH_PE_GET_STATE:
>> + ret = eeh_pe_get_state(pe);
>> + break;
>> + case VFIO_EEH_PE_RESET_DEACTIVATE:
>> + ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE);
>> + break;
>> + case VFIO_EEH_PE_RESET_HOT:
>> + ret = eeh_pe_reset(pe, EEH_RESET_HOT);
>> + break;
>> + case VFIO_EEH_PE_RESET_FUNDAMENTAL:
>> + ret = eeh_pe_reset(pe, EEH_RESET_FUNDAMENTAL);
>> + break;
>> + case VFIO_EEH_PE_CONFIGURE:
>> + ret = eeh_pe_configure(pe);
>> + break;
>> + default:
>> + ret = -EINVAL;
>> + }
>> + }
>> +
>> + return ret;
>> +}
>> diff --git a/include/linux/vfio.h b/include/linux/vfio.h
>> index 81022a52..0d3bb8f 100644
>> --- a/include/linux/vfio.h
>> +++ b/include/linux/vfio.h
>> @@ -99,4 +99,27 @@ extern int vfio_external_user_iommu_id(struct vfio_group *group);
>> extern long vfio_external_check_extension(struct vfio_group *group,
>> unsigned long arg);
>>
>> +#ifdef CONFIG_EEH
>> +extern int vfio_spapr_pci_eeh_open(struct pci_dev *pdev);
>> +extern void vfio_spapr_pci_eeh_release(struct pci_dev *pdev);
>> +extern long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
>> + unsigned int cmd,
>> + unsigned long arg);
>> +#else
>> +static inline int vfio_spapr_pci_eeh_open(struct pci_dev *pdev)
>> +{
>> + return 0;
>> +}
>> +
>> +static inline void vfio_spapr_pci_eeh_release(struct pci_dev *pdev)
>> +{
>> +}
>> +
>> +static inline long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
>> + unsigned int cmd,
>> + unsigned long arg)
>> +{
>> + return -ENOTTY;
>> +}
>> +#endif /* CONFIG_EEH */
>> #endif /* VFIO_H */
>> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
>> index cb9023d..6612974 100644
>> --- a/include/uapi/linux/vfio.h
>> +++ b/include/uapi/linux/vfio.h
>> @@ -30,6 +30,9 @@
>> */
>> #define VFIO_DMA_CC_IOMMU 4
>>
>> +/* Check if EEH is supported */
>> +#define VFIO_EEH 5
>> +
>> /*
>> * The IOCTL interface is designed for extensibility by embedding the
>> * structure length (argsz) and flags into structures passed between
>> @@ -455,6 +458,37 @@ struct vfio_iommu_spapr_tce_info {
>>
>> #define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
>>
>> +/*
>> + * EEH PE operation struct provides ways to:
>> + * - enable/disable EEH functionality;
>> + * - unfreeze IO/DMA for frozen PE;
>> + * - read PE state;
>> + * - reset PE;
>> + * - configure PE.
>> + */
>> +struct vfio_eeh_pe_op {
>> + __u32 argsz;
>> + __u32 flags;
>> + __u32 op;
>> +};
>> +
>> +#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
>> +#define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */
>> +#define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */
>> +#define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */
>> +#define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */
>> +#define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */
>> +#define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */
>> +#define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */
>> +#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */
>> +#define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */
>> +#define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */
>> +#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
>> +#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
>> +#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
>> +
>> +#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
>> +
>> /* ***************************************************************** */
>>
>> #endif /* _UAPIVFIO_H */
>
>
>
^ permalink raw reply
* Re: [PATCH] powerpc/powernv: fix endianness problems in EEH
From: Gavin Shan @ 2014-06-10 0:28 UTC (permalink / raw)
To: Guo Chao; +Cc: linuxppc-dev, Gavin Shan
In-Reply-To: <1402304331-24167-1-git-send-email-yan@linux.vnet.ibm.com>
On Mon, Jun 09, 2014 at 04:58:51PM +0800, Guo Chao wrote:
>EEH information fetched from OPAL need fix before using in LE environment.
>To be included in sparse's endian check, declare them as __beXX and
>access them by accessors.
>
>Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
>
>Signed-off-by: Guo Chao <yan@linux.vnet.ibm.com>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
It looks good to me., but there are more diag-data needed to be
coverted: P7IOC diag-data and P7IOC PHB diag-data.
Thanks,
Gavin
>---
> arch/powerpc/include/asm/opal.h | 102 +++++++++++++++---------------
> arch/powerpc/platforms/powernv/eeh-ioda.c | 36 ++++++-----
> arch/powerpc/platforms/powernv/pci.c | 81 +++++++++++++++---------
> 3 files changed, 120 insertions(+), 99 deletions(-)
>
>diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
>index 4ccd1d4..a4c0acc 100644
>--- a/arch/powerpc/include/asm/opal.h
>+++ b/arch/powerpc/include/asm/opal.h
>@@ -599,9 +599,9 @@ enum {
> };
>
> struct OpalIoPhbErrorCommon {
>- uint32_t version;
>- uint32_t ioType;
>- uint32_t len;
>+ __be32 version;
>+ __be32 ioType;
>+ __be32 len;
> };
>
> struct OpalIoP7IOCPhbErrorData {
>@@ -671,64 +671,64 @@ enum {
> struct OpalIoPhb3ErrorData {
> struct OpalIoPhbErrorCommon common;
>
>- uint32_t brdgCtl;
>+ __be32 brdgCtl;
>
> /* PHB3 UTL regs */
>- uint32_t portStatusReg;
>- uint32_t rootCmplxStatus;
>- uint32_t busAgentStatus;
>+ __be32 portStatusReg;
>+ __be32 rootCmplxStatus;
>+ __be32 busAgentStatus;
>
> /* PHB3 cfg regs */
>- uint32_t deviceStatus;
>- uint32_t slotStatus;
>- uint32_t linkStatus;
>- uint32_t devCmdStatus;
>- uint32_t devSecStatus;
>+ __be32 deviceStatus;
>+ __be32 slotStatus;
>+ __be32 linkStatus;
>+ __be32 devCmdStatus;
>+ __be32 devSecStatus;
>
> /* cfg AER regs */
>- uint32_t rootErrorStatus;
>- uint32_t uncorrErrorStatus;
>- uint32_t corrErrorStatus;
>- uint32_t tlpHdr1;
>- uint32_t tlpHdr2;
>- uint32_t tlpHdr3;
>- uint32_t tlpHdr4;
>- uint32_t sourceId;
>+ __be32 rootErrorStatus;
>+ __be32 uncorrErrorStatus;
>+ __be32 corrErrorStatus;
>+ __be32 tlpHdr1;
>+ __be32 tlpHdr2;
>+ __be32 tlpHdr3;
>+ __be32 tlpHdr4;
>+ __be32 sourceId;
>
>- uint32_t rsv3;
>+ __be32 rsv3;
>
> /* Record data about the call to allocate a buffer */
>- uint64_t errorClass;
>- uint64_t correlator;
>+ __be64 errorClass;
>+ __be64 correlator;
>
>- uint64_t nFir; /* 000 */
>- uint64_t nFirMask; /* 003 */
>- uint64_t nFirWOF; /* 008 */
>+ __be64 nFir; /* 000 */
>+ __be64 nFirMask; /* 003 */
>+ __be64 nFirWOF; /* 008 */
>
> /* PHB3 MMIO Error Regs */
>- uint64_t phbPlssr; /* 120 */
>- uint64_t phbCsr; /* 110 */
>- uint64_t lemFir; /* C00 */
>- uint64_t lemErrorMask; /* C18 */
>- uint64_t lemWOF; /* C40 */
>- uint64_t phbErrorStatus; /* C80 */
>- uint64_t phbFirstErrorStatus; /* C88 */
>- uint64_t phbErrorLog0; /* CC0 */
>- uint64_t phbErrorLog1; /* CC8 */
>- uint64_t mmioErrorStatus; /* D00 */
>- uint64_t mmioFirstErrorStatus; /* D08 */
>- uint64_t mmioErrorLog0; /* D40 */
>- uint64_t mmioErrorLog1; /* D48 */
>- uint64_t dma0ErrorStatus; /* D80 */
>- uint64_t dma0FirstErrorStatus; /* D88 */
>- uint64_t dma0ErrorLog0; /* DC0 */
>- uint64_t dma0ErrorLog1; /* DC8 */
>- uint64_t dma1ErrorStatus; /* E00 */
>- uint64_t dma1FirstErrorStatus; /* E08 */
>- uint64_t dma1ErrorLog0; /* E40 */
>- uint64_t dma1ErrorLog1; /* E48 */
>- uint64_t pestA[OPAL_PHB3_NUM_PEST_REGS];
>- uint64_t pestB[OPAL_PHB3_NUM_PEST_REGS];
>+ __be64 phbPlssr; /* 120 */
>+ __be64 phbCsr; /* 110 */
>+ __be64 lemFir; /* C00 */
>+ __be64 lemErrorMask; /* C18 */
>+ __be64 lemWOF; /* C40 */
>+ __be64 phbErrorStatus; /* C80 */
>+ __be64 phbFirstErrorStatus; /* C88 */
>+ __be64 phbErrorLog0; /* CC0 */
>+ __be64 phbErrorLog1; /* CC8 */
>+ __be64 mmioErrorStatus; /* D00 */
>+ __be64 mmioFirstErrorStatus; /* D08 */
>+ __be64 mmioErrorLog0; /* D40 */
>+ __be64 mmioErrorLog1; /* D48 */
>+ __be64 dma0ErrorStatus; /* D80 */
>+ __be64 dma0FirstErrorStatus; /* D88 */
>+ __be64 dma0ErrorLog0; /* DC0 */
>+ __be64 dma0ErrorLog1; /* DC8 */
>+ __be64 dma1ErrorStatus; /* E00 */
>+ __be64 dma1FirstErrorStatus; /* E08 */
>+ __be64 dma1ErrorLog0; /* E40 */
>+ __be64 dma1ErrorLog1; /* E48 */
>+ __be64 pestA[OPAL_PHB3_NUM_PEST_REGS];
>+ __be64 pestB[OPAL_PHB3_NUM_PEST_REGS];
> };
>
> typedef struct oppanel_line {
>@@ -851,8 +851,8 @@ int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t erro
> int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
> int64_t opal_get_epow_status(__be64 *status);
> int64_t opal_set_system_attention_led(uint8_t led_action);
>-int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
>- uint16_t *pci_error_type, uint16_t *severity);
>+int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
>+ __be16 *pci_error_type, __be16 *severity);
> int64_t opal_pci_poll(uint64_t phb_id);
> int64_t opal_return_cpu(void);
> int64_t opal_reinit_cpus(uint64_t flags);
>diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
>index 753f08e..e0d6a3a 100644
>--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
>+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
>@@ -267,7 +267,7 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
> {
> s64 ret = 0;
> u8 fstate;
>- u16 pcierr;
>+ __be16 pcierr;
> u32 pe_no;
> int result;
> struct pci_controller *hose = pe->phb;
>@@ -316,7 +316,7 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
> result = 0;
> result &= ~EEH_STATE_RESET_ACTIVE;
>
>- if (pcierr != OPAL_EEH_PHB_ERROR) {
>+ if (be16_to_cpu(pcierr) != OPAL_EEH_PHB_ERROR) {
> result |= EEH_STATE_MMIO_ACTIVE;
> result |= EEH_STATE_DMA_ACTIVE;
> result |= EEH_STATE_MMIO_ENABLED;
>@@ -706,8 +706,8 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
> struct pci_controller *hose;
> struct pnv_phb *phb;
> struct eeh_pe *phb_pe;
>- u64 frozen_pe_no;
>- u16 err_type, severity;
>+ __be64 frozen_pe_no;
>+ __be16 err_type, severity;
> long rc;
> int ret = EEH_NEXT_ERR_NONE;
>
>@@ -742,8 +742,8 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
> }
>
> /* If the PHB doesn't have error, stop processing */
>- if (err_type == OPAL_EEH_NO_ERROR ||
>- severity == OPAL_EEH_SEV_NO_ERROR) {
>+ if (be16_to_cpu(err_type) == OPAL_EEH_NO_ERROR ||
>+ be16_to_cpu(severity) == OPAL_EEH_SEV_NO_ERROR) {
> pr_devel("%s: No error found on PHB#%x\n",
> __func__, hose->global_number);
> continue;
>@@ -755,14 +755,14 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
> * specific PHB.
> */
> pr_devel("%s: Error (%d, %d, %llu) on PHB#%x\n",
>- __func__, err_type, severity,
>- frozen_pe_no, hose->global_number);
>- switch (err_type) {
>+ __func__, be16_to_cpu(err_type), be16_to_cpu(severity),
>+ be64_to_cpu(frozen_pe_no), hose->global_number);
>+ switch (be16_to_cpu(err_type)) {
> case OPAL_EEH_IOC_ERROR:
>- if (severity == OPAL_EEH_SEV_IOC_DEAD) {
>+ if (be16_to_cpu(severity) == OPAL_EEH_SEV_IOC_DEAD) {
> pr_err("EEH: dead IOC detected\n");
> ret = EEH_NEXT_ERR_DEAD_IOC;
>- } else if (severity == OPAL_EEH_SEV_INF) {
>+ } else if (be16_to_cpu(severity) == OPAL_EEH_SEV_INF) {
> pr_info("EEH: IOC informative error "
> "detected\n");
> ioda_eeh_hub_diag(hose);
>@@ -771,17 +771,18 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
>
> break;
> case OPAL_EEH_PHB_ERROR:
>- if (severity == OPAL_EEH_SEV_PHB_DEAD) {
>+ if (be16_to_cpu(severity) == OPAL_EEH_SEV_PHB_DEAD) {
> *pe = phb_pe;
> pr_err("EEH: dead PHB#%x detected\n",
> hose->global_number);
> ret = EEH_NEXT_ERR_DEAD_PHB;
>- } else if (severity == OPAL_EEH_SEV_PHB_FENCED) {
>+ } else if (be16_to_cpu(severity) ==
>+ OPAL_EEH_SEV_PHB_FENCED) {
> *pe = phb_pe;
> pr_err("EEH: fenced PHB#%x detected\n",
> hose->global_number);
> ret = EEH_NEXT_ERR_FENCED_PHB;
>- } else if (severity == OPAL_EEH_SEV_INF) {
>+ } else if (be16_to_cpu(severity) == OPAL_EEH_SEV_INF) {
> pr_info("EEH: PHB#%x informative error "
> "detected\n",
> hose->global_number);
>@@ -801,12 +802,13 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
> * progress with recovery. We needn't report
> * it again.
> */
>- if (ioda_eeh_get_pe(hose, frozen_pe_no, pe)) {
>+ if (ioda_eeh_get_pe(hose,
>+ be64_to_cpu(frozen_pe_no), pe)) {
> *pe = phb_pe;
> pr_err("EEH: Escalated fenced PHB#%x "
> "detected for PE#%llx\n",
> hose->global_number,
>- frozen_pe_no);
>+ be64_to_cpu(frozen_pe_no));
> ret = EEH_NEXT_ERR_FENCED_PHB;
> } else if ((*pe)->state & EEH_PE_ISOLATED) {
> ret = EEH_NEXT_ERR_NONE;
>@@ -819,7 +821,7 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
> break;
> default:
> pr_warn("%s: Unexpected error type %d\n",
>- __func__, err_type);
>+ __func__, be16_to_cpu(err_type));
> }
>
> /*
>diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
>index eefbfcc..f91a4e5 100644
>--- a/arch/powerpc/platforms/powernv/pci.c
>+++ b/arch/powerpc/platforms/powernv/pci.c
>@@ -206,72 +206,91 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
>
> data = (struct OpalIoPhb3ErrorData*)common;
> pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n",
>- hose->global_number, common->version);
>+ hose->global_number, be32_to_cpu(common->version));
> if (data->brdgCtl)
> pr_info("brdgCtl: %08x\n",
>- data->brdgCtl);
>+ be32_to_cpu(data->brdgCtl));
> if (data->portStatusReg || data->rootCmplxStatus ||
> data->busAgentStatus)
> pr_info("UtlSts: %08x %08x %08x\n",
>- data->portStatusReg, data->rootCmplxStatus,
>- data->busAgentStatus);
>+ be32_to_cpu(data->portStatusReg),
>+ be32_to_cpu(data->rootCmplxStatus),
>+ be32_to_cpu(data->busAgentStatus));
> if (data->deviceStatus || data->slotStatus ||
> data->linkStatus || data->devCmdStatus ||
> data->devSecStatus)
> pr_info("RootSts: %08x %08x %08x %08x %08x\n",
>- data->deviceStatus, data->slotStatus,
>- data->linkStatus, data->devCmdStatus,
>- data->devSecStatus);
>+ be32_to_cpu(data->deviceStatus),
>+ be32_to_cpu(data->slotStatus),
>+ be32_to_cpu(data->linkStatus),
>+ be32_to_cpu(data->devCmdStatus),
>+ be32_to_cpu(data->devSecStatus));
> if (data->rootErrorStatus || data->uncorrErrorStatus ||
> data->corrErrorStatus)
> pr_info("RootErrSts: %08x %08x %08x\n",
>- data->rootErrorStatus, data->uncorrErrorStatus,
>- data->corrErrorStatus);
>+ be32_to_cpu(data->rootErrorStatus),
>+ be32_to_cpu(data->uncorrErrorStatus),
>+ be32_to_cpu(data->corrErrorStatus));
> if (data->tlpHdr1 || data->tlpHdr2 ||
> data->tlpHdr3 || data->tlpHdr4)
> pr_info("RootErrLog: %08x %08x %08x %08x\n",
>- data->tlpHdr1, data->tlpHdr2,
>- data->tlpHdr3, data->tlpHdr4);
>+ be32_to_cpu(data->tlpHdr1),
>+ be32_to_cpu(data->tlpHdr2),
>+ be32_to_cpu(data->tlpHdr3),
>+ be32_to_cpu(data->tlpHdr4));
> if (data->sourceId || data->errorClass ||
> data->correlator)
> pr_info("RootErrLog1: %08x %016llx %016llx\n",
>- data->sourceId, data->errorClass,
>- data->correlator);
>+ be32_to_cpu(data->sourceId),
>+ be64_to_cpu(data->errorClass),
>+ be64_to_cpu(data->correlator));
> if (data->nFir)
> pr_info("nFir: %016llx %016llx %016llx\n",
>- data->nFir, data->nFirMask,
>- data->nFirWOF);
>+ be64_to_cpu(data->nFir),
>+ be64_to_cpu(data->nFirMask),
>+ be64_to_cpu(data->nFirWOF));
> if (data->phbPlssr || data->phbCsr)
> pr_info("PhbSts: %016llx %016llx\n",
>- data->phbPlssr, data->phbCsr);
>+ be64_to_cpu(data->phbPlssr),
>+ be64_to_cpu(data->phbCsr));
> if (data->lemFir)
> pr_info("Lem: %016llx %016llx %016llx\n",
>- data->lemFir, data->lemErrorMask,
>- data->lemWOF);
>+ be64_to_cpu(data->lemFir),
>+ be64_to_cpu(data->lemErrorMask),
>+ be64_to_cpu(data->lemWOF));
> if (data->phbErrorStatus)
> pr_info("PhbErr: %016llx %016llx %016llx %016llx\n",
>- data->phbErrorStatus, data->phbFirstErrorStatus,
>- data->phbErrorLog0, data->phbErrorLog1);
>+ be64_to_cpu(data->phbErrorStatus),
>+ be64_to_cpu(data->phbFirstErrorStatus),
>+ be64_to_cpu(data->phbErrorLog0),
>+ be64_to_cpu(data->phbErrorLog1));
> if (data->mmioErrorStatus)
> pr_info("OutErr: %016llx %016llx %016llx %016llx\n",
>- data->mmioErrorStatus, data->mmioFirstErrorStatus,
>- data->mmioErrorLog0, data->mmioErrorLog1);
>+ be64_to_cpu(data->mmioErrorStatus),
>+ be64_to_cpu(data->mmioFirstErrorStatus),
>+ be64_to_cpu(data->mmioErrorLog0),
>+ be64_to_cpu(data->mmioErrorLog1));
> if (data->dma0ErrorStatus)
> pr_info("InAErr: %016llx %016llx %016llx %016llx\n",
>- data->dma0ErrorStatus, data->dma0FirstErrorStatus,
>- data->dma0ErrorLog0, data->dma0ErrorLog1);
>+ be64_to_cpu(data->dma0ErrorStatus),
>+ be64_to_cpu(data->dma0FirstErrorStatus),
>+ be64_to_cpu(data->dma0ErrorLog0),
>+ be64_to_cpu(data->dma0ErrorLog1));
> if (data->dma1ErrorStatus)
> pr_info("InBErr: %016llx %016llx %016llx %016llx\n",
>- data->dma1ErrorStatus, data->dma1FirstErrorStatus,
>- data->dma1ErrorLog0, data->dma1ErrorLog1);
>+ be64_to_cpu(data->dma1ErrorStatus),
>+ be64_to_cpu(data->dma1FirstErrorStatus),
>+ be64_to_cpu(data->dma1ErrorLog0),
>+ be64_to_cpu(data->dma1ErrorLog1));
>
> for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
>- if ((data->pestA[i] >> 63) == 0 &&
>- (data->pestB[i] >> 63) == 0)
>+ if ((be64_to_cpu(data->pestA[i]) >> 63) == 0 &&
>+ (be64_to_cpu(data->pestB[i]) >> 63) == 0)
> continue;
>
> pr_info("PE[%3d] A/B: %016llx %016llx\n",
>- i, data->pestA[i], data->pestB[i]);
>+ i, be64_to_cpu(data->pestA[i]),
>+ be64_to_cpu(data->pestB[i]));
> }
> }
>
>@@ -284,7 +303,7 @@ void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,
> return;
>
> common = (struct OpalIoPhbErrorCommon *)log_buff;
>- switch (common->ioType) {
>+ switch (be32_to_cpu(common->ioType)) {
> case OPAL_PHB_ERROR_DATA_TYPE_P7IOC:
> pnv_pci_dump_p7ioc_diag_data(hose, common);
> break;
>@@ -293,7 +312,7 @@ void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,
> break;
> default:
> pr_warn("%s: Unrecognized ioType %d\n",
>- __func__, common->ioType);
>+ __func__, be32_to_cpu(common->ioType));
> }
> }
>
>--
>1.9.1
>
^ permalink raw reply
* [PATCH v10 0/3] EEH Support for VFIO PCI Device
From: Gavin Shan @ 2014-06-10 1:41 UTC (permalink / raw)
To: kvm-ppc, linuxppc-dev; +Cc: aik, agraf, Gavin Shan, alex.williamson, qiudayu
EEH Support for VFIO PCI Device
The series of patches adds support EEH for PCI devices, which are passed
through to PowerKVM based guest via VFIO. The implementation is straightforward
based on the issues or problems we have to resolve to support EEH for PowerKVM
based guest.
- Emulation for EEH RTAS requests. All EEH RTAS requests goes to QEMU firstly.
If QEMU can't handle it, the request will be sent to host via newly introduced
VFIO container IOCTL command (VFIO_EEH_OP) and gets handled in host kernel.
The series of patches requires corresponding QEMU changes.
Change log
==========
v1 -> v2:
* EEH RTAS requests are routed to QEMU, and then possiblly to host kerenl.
The mechanism KVM in-kernel handling is dropped.
* Error injection is reimplemented based syscall, instead of KVM in-kerenl
handling. The logic for error injection token management is moved to
QEMU. The error injection request is routed to QEMU and then possiblly
to host kernel.
v2 -> v3:
* Make the fields in struct eeh_vfio_pci_addr, struct vfio_eeh_info based
on the comments from Alexey.
* Define macros for EEH VFIO operations (Alexey).
* Clear frozen state after successful PE reset.
* Merge original [PATCH 1/2/3] to one.
v3 -> v4:
* Remove the error injection from the patchset. Mike or I will work on that
later.
* Rename CONFIG_VFIO_EEH to VFIO_PCI_EEH.
* Rename the IOCTL command to VFIO_EEH_OP and it's handled by VFIO-PCI device
instead of VFIO container.
* Rename the IOCTL argument structure to "vfio_eeh_op" accordingly. Also, more
fields added to hold return values for RTAS requests.
* The address mapping stuff is totally removed. When opening or releasing VFIO
PCI device, notification sent to EEH to update the flags indicates the device
is passed to guest or not.
* Change pr_warn() to pr_debug() to avoid DOS as pointed by Alex.W
* Argument size check issue pointed by Alex.W.
v4 -> v5:
* Functions for VFIO PCI EEH support are moved to eeh.c and exported from there.
VFIO PCI driver just uses those functions to tackle IOCTL command VFIO_EEH_OP.
All of this is to make the code organized in a good way as suggested by Alex.G.
Another potential benefit is PowerNV/pSeries are sharing "eeh_ops" and same
infrastructure could possiblly work for KVM_PR and KVM_HV mode at the same time.
* Don't clear error injection registers after finishing PE reset as the patchset
is doing nothing related to error injection.
* Amending Documentation/vfio.txt, which was missed in last revision.
* No QEMU changes for this revision. "v4" works well. Also, remove "RFC" from the
subject as the design is basically recognized.
v5 -> v6:
* CONFIG_VFIO_PCI_EEH removed. Instead to use CONFIG_EEH.
* Split one ioctl command to 5.
* In eeh.c, description has been added for those exported functions. Also, the
functions have negative return values for error and information with other values.
All digital numbers have been replaced by macros defined in eeh.h. The comments,
including the function names have been amended not to mention "guest" or "vfio".
* Add one mutex to protect flag in eeh_dev_open()/release().
* More information on how to use those ioctl commands to Documentation/vfio.txt.
v6 -> v7:
* Remove ioctl command VFIO_EEH_PE_GET_ADDR, the PE address will be figured out
in userland (e.g. QEMU) as Alex.G suggested.
* Let sPAPR VFIO container process the ioctl commands as VFIO container is naturally
corresponds to IOMMU group (aka PE on sPAPR platform).
* All VFIO PCI EEH ioctl commands have "argsz+flags" for its companion data struct.
* For VFIO PCI EEH ioctl commands, ioctl() returns negative number to indicate error
or zero for success. Additinal output information is transported by the companion
data struct.
* Explaining PE in Documentation/vfio.txt, typo fixes, more comments suggested by
Alex.G.
* Split/merge patches according to suggestions from Alex.G and Alex.W.
* To have EEH stub in drivers/vfio/pci/, which was suggested by Alex.W.
* Define various EEH options as macros in vfio.h for userland to use.
v7 -> v8:
* Change ioctl commands back to combined one.
* EEH related logic was put into drivers/vfio/vfio_eeh.c, which is only built with
CONFIG_EEH. Otherwise, inline functions defined in include/linux/vfio.h
* Change vfio.txt according to the source code changes.
* Fix various comments from internal reviews by Alexey. Thanks to Alexey.
v8 -> v9:
* Remove unused macros in asm/include/eeh.h
* Missed to disable VFIO device on error from vfio_spapr_pci_eeh_open().
* Don't include unused header files in drivers/vfio/vfio_spapr_eeh.c
* Define inline PE state for VFIO_EEH_PE_GET_STATE.
v9 -> v10:
* Make sure we have zero struct vfio_eeh_pe_op::flags
Gavin Shan (3):
powerpc/eeh: Avoid event on passed PE
powerpc/eeh: EEH support for VFIO PCI device
drivers/vfio: EEH support for VFIO PCI device
Documentation/vfio.txt | 87 +++++++++-
arch/powerpc/include/asm/eeh.h | 19 ++
arch/powerpc/kernel/eeh.c | 276 ++++++++++++++++++++++++++++++
arch/powerpc/platforms/powernv/eeh-ioda.c | 3 +-
drivers/vfio/Makefile | 1 +
drivers/vfio/pci/vfio_pci.c | 18 +-
drivers/vfio/vfio_iommu_spapr_tce.c | 17 +-
drivers/vfio/vfio_spapr_eeh.c | 87 ++++++++++
include/linux/vfio.h | 23 +++
include/uapi/linux/vfio.h | 34 ++++
10 files changed, 556 insertions(+), 9 deletions(-)
create mode 100644 drivers/vfio/vfio_spapr_eeh.c
--
1.8.3.2
^ permalink raw reply
* [PATCH v10 1/3] powerpc/eeh: Avoid event on passed PE
From: Gavin Shan @ 2014-06-10 1:41 UTC (permalink / raw)
To: kvm-ppc, linuxppc-dev; +Cc: aik, agraf, Gavin Shan, alex.williamson, qiudayu
In-Reply-To: <1402364517-28561-1-git-send-email-gwshan@linux.vnet.ibm.com>
We must not handle EEH error on devices which are passed to somebody
else. Instead, we expect that the frozen device owner detects an EEH
error and recovers from it.
This avoids EEH error handling on passed through devices so the device
owner gets a chance to handle them.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/eeh.h | 7 +++++++
arch/powerpc/kernel/eeh.c | 8 ++++++++
arch/powerpc/platforms/powernv/eeh-ioda.c | 3 ++-
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 7782056..653d981 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -25,6 +25,7 @@
#include <linux/list.h>
#include <linux/string.h>
#include <linux/time.h>
+#include <linux/atomic.h>
struct pci_dev;
struct pci_bus;
@@ -84,6 +85,7 @@ struct eeh_pe {
int freeze_count; /* Times of froze up */
struct timeval tstamp; /* Time on first-time freeze */
int false_positives; /* Times of reported #ff's */
+ atomic_t pass_dev_cnt; /* Count of passed through devs */
struct eeh_pe *parent; /* Parent PE */
struct list_head child_list; /* Link PE to the child list */
struct list_head edevs; /* Link list of EEH devices */
@@ -93,6 +95,11 @@ struct eeh_pe {
#define eeh_pe_for_each_dev(pe, edev, tmp) \
list_for_each_entry_safe(edev, tmp, &pe->edevs, list)
+static inline bool eeh_pe_passed(struct eeh_pe *pe)
+{
+ return pe ? !!atomic_read(&pe->pass_dev_cnt) : false;
+}
+
/*
* The struct is used to trace EEH state for the associated
* PCI device node or PCI device. In future, it might
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 9c6b899..3bc8b12 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -400,6 +400,14 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
if (ret > 0)
return ret;
+ /*
+ * If the PE isn't owned by us, we shouldn't check the
+ * state. Instead, let the owner handle it if the PE has
+ * been frozen.
+ */
+ if (eeh_pe_passed(pe))
+ return 0;
+
/* If we already have a pending isolation event for this
* slot, we know it's bad already, we don't need to check.
* Do this checking under a lock; as multiple PCI devices
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index cab3e62..79193eb 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -892,7 +892,8 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
opal_pci_eeh_freeze_clear(phb->opal_id, frozen_pe_no,
OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
ret = EEH_NEXT_ERR_NONE;
- } else if ((*pe)->state & EEH_PE_ISOLATED) {
+ } else if ((*pe)->state & EEH_PE_ISOLATED ||
+ eeh_pe_passed(*pe)) {
ret = EEH_NEXT_ERR_NONE;
} else {
pr_err("EEH: Frozen PHB#%x-PE#%x (%s) detected\n",
--
1.8.3.2
^ permalink raw reply related
* [PATCH v10 3/3] drivers/vfio: EEH support for VFIO PCI device
From: Gavin Shan @ 2014-06-10 1:41 UTC (permalink / raw)
To: kvm-ppc, linuxppc-dev; +Cc: aik, agraf, Gavin Shan, alex.williamson, qiudayu
In-Reply-To: <1402364517-28561-1-git-send-email-gwshan@linux.vnet.ibm.com>
The patch adds new IOCTL commands for sPAPR VFIO container device
to support EEH functionality for PCI devices, which have been passed
through from host to somebody else via VFIO.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Alexander Graf <agraf@suse.de>
---
Documentation/vfio.txt | 87 +++++++++++++++++++++++++++++++++++--
drivers/vfio/Makefile | 1 +
drivers/vfio/pci/vfio_pci.c | 18 ++++++--
drivers/vfio/vfio_iommu_spapr_tce.c | 17 +++++++-
drivers/vfio/vfio_spapr_eeh.c | 87 +++++++++++++++++++++++++++++++++++++
include/linux/vfio.h | 23 ++++++++++
include/uapi/linux/vfio.h | 34 +++++++++++++++
7 files changed, 259 insertions(+), 8 deletions(-)
create mode 100644 drivers/vfio/vfio_spapr_eeh.c
diff --git a/Documentation/vfio.txt b/Documentation/vfio.txt
index b9ca023..96978ec 100644
--- a/Documentation/vfio.txt
+++ b/Documentation/vfio.txt
@@ -305,7 +305,15 @@ faster, the map/unmap handling has been implemented in real mode which provides
an excellent performance which has limitations such as inability to do
locked pages accounting in real time.
-So 3 additional ioctls have been added:
+4) According to sPAPR specification, A Partitionable Endpoint (PE) is an I/O
+subtree that can be treated as a unit for the purposes of partitioning and
+error recovery. A PE may be a single or multi-function IOA (IO Adapter), a
+function of a multi-function IOA, or multiple IOAs (possibly including switch
+and bridge structures above the multiple IOAs). PPC64 guests detect PCI errors
+and recover from them via EEH RTAS services, which works on the basis of
+additional ioctl commands.
+
+So 4 additional ioctls have been added:
VFIO_IOMMU_SPAPR_TCE_GET_INFO - returns the size and the start
of the DMA window on the PCI bus.
@@ -316,9 +324,12 @@ So 3 additional ioctls have been added:
VFIO_IOMMU_DISABLE - disables the container.
+ VFIO_EEH_PE_OP - provides an API for EEH setup, error detection and recovery.
The code flow from the example above should be slightly changed:
+ struct vfio_eeh_pe_op pe_op = { .argsz = sizeof(pe_op), .flags = 0 };
+
.....
/* Add the group to the container */
ioctl(group, VFIO_GROUP_SET_CONTAINER, &container);
@@ -342,9 +353,79 @@ The code flow from the example above should be slightly changed:
dma_map.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE;
/* Check here is .iova/.size are within DMA window from spapr_iommu_info */
-
ioctl(container, VFIO_IOMMU_MAP_DMA, &dma_map);
- .....
+
+ /* Get a file descriptor for the device */
+ device = ioctl(group, VFIO_GROUP_GET_DEVICE_FD, "0000:06:0d.0");
+
+ ....
+
+ /* Gratuitous device reset and go... */
+ ioctl(device, VFIO_DEVICE_RESET);
+
+ /* Make sure EEH is supported */
+ ioctl(container, VFIO_CHECK_EXTENSION, VFIO_EEH);
+
+ /* Enable the EEH functionality on the device */
+ pe_op.op = VFIO_EEH_PE_ENABLE;
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+
+ /* You're suggested to create additional data struct to represent
+ * PE, and put child devices belonging to same IOMMU group to the
+ * PE instance for later reference.
+ */
+
+ /* Check the PE's state and make sure it's in functional state */
+ pe_op.op = VFIO_EEH_PE_GET_STATE;
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+
+ /* Save device state using pci_save_state().
+ * EEH should be enabled on the specified device.
+ */
+
+ ....
+
+ /* When 0xFF's returned from reading PCI config space or IO BARs
+ * of the PCI device. Check the PE's state to see if that has been
+ * frozen.
+ */
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+
+ /* Waiting for pending PCI transactions to be completed and don't
+ * produce any more PCI traffic from/to the affected PE until
+ * recovery is finished.
+ */
+
+ /* Enable IO for the affected PE and collect logs. Usually, the
+ * standard part of PCI config space, AER registers are dumped
+ * as logs for further analysis.
+ */
+ pe_op.op = VFIO_EEH_PE_UNFREEZE_IO;
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+
+ /*
+ * Issue PE reset: hot or fundamental reset. Usually, hot reset
+ * is enough. However, the firmware of some PCI adapters would
+ * require fundamental reset.
+ */
+ pe_op.op = VFIO_EEH_PE_RESET_HOT;
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+ pe_op.op = VFIO_EEH_PE_RESET_DEACTIVATE;
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+
+ /* Configure the PCI bridges for the affected PE */
+ pe_op.op = VFIO_EEH_PE_CONFIGURE;
+ ioctl(container, VFIO_EEH_PE_OP, &pe_op);
+
+ /* Restored state we saved at initialization time. pci_restore_state()
+ * is good enough as an example.
+ */
+
+ /* Hopefully, error is recovered successfully. Now, you can resume to
+ * start PCI traffic to/from the affected PE.
+ */
+
+ ....
-------------------------------------------------------------------------------
diff --git a/drivers/vfio/Makefile b/drivers/vfio/Makefile
index 72bfabc..50e30bc 100644
--- a/drivers/vfio/Makefile
+++ b/drivers/vfio/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_VFIO) += vfio.o
obj-$(CONFIG_VFIO_IOMMU_TYPE1) += vfio_iommu_type1.o
obj-$(CONFIG_VFIO_IOMMU_SPAPR_TCE) += vfio_iommu_spapr_tce.o
+obj-$(CONFIG_EEH) += vfio_spapr_eeh.o
obj-$(CONFIG_VFIO_PCI) += pci/
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 7ba0424..0122665 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -156,8 +156,10 @@ static void vfio_pci_release(void *device_data)
{
struct vfio_pci_device *vdev = device_data;
- if (atomic_dec_and_test(&vdev->refcnt))
+ if (atomic_dec_and_test(&vdev->refcnt)) {
+ vfio_spapr_pci_eeh_release(vdev->pdev);
vfio_pci_disable(vdev);
+ }
module_put(THIS_MODULE);
}
@@ -165,19 +167,27 @@ static void vfio_pci_release(void *device_data)
static int vfio_pci_open(void *device_data)
{
struct vfio_pci_device *vdev = device_data;
+ int ret;
if (!try_module_get(THIS_MODULE))
return -ENODEV;
if (atomic_inc_return(&vdev->refcnt) == 1) {
- int ret = vfio_pci_enable(vdev);
+ ret = vfio_pci_enable(vdev);
+ if (ret)
+ goto error;
+
+ ret = vfio_spapr_pci_eeh_open(vdev->pdev);
if (ret) {
- module_put(THIS_MODULE);
- return ret;
+ vfio_pci_disable(vdev);
+ goto error;
}
}
return 0;
+error:
+ module_put(THIS_MODULE);
+ return ret;
}
static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c b/drivers/vfio/vfio_iommu_spapr_tce.c
index a84788b..730b4ef 100644
--- a/drivers/vfio/vfio_iommu_spapr_tce.c
+++ b/drivers/vfio/vfio_iommu_spapr_tce.c
@@ -156,7 +156,16 @@ static long tce_iommu_ioctl(void *iommu_data,
switch (cmd) {
case VFIO_CHECK_EXTENSION:
- return (arg == VFIO_SPAPR_TCE_IOMMU) ? 1 : 0;
+ switch (arg) {
+ case VFIO_SPAPR_TCE_IOMMU:
+ ret = 1;
+ break;
+ default:
+ ret = vfio_spapr_iommu_eeh_ioctl(NULL, cmd, arg);
+ break;
+ }
+
+ return (ret < 0) ? 0 : ret;
case VFIO_IOMMU_SPAPR_TCE_GET_INFO: {
struct vfio_iommu_spapr_tce_info info;
@@ -283,6 +292,12 @@ static long tce_iommu_ioctl(void *iommu_data,
tce_iommu_disable(container);
mutex_unlock(&container->lock);
return 0;
+ case VFIO_EEH_PE_OP:
+ if (!container->tbl || !container->tbl->it_group)
+ return -ENODEV;
+
+ return vfio_spapr_iommu_eeh_ioctl(container->tbl->it_group,
+ cmd, arg);
}
return -ENOTTY;
diff --git a/drivers/vfio/vfio_spapr_eeh.c b/drivers/vfio/vfio_spapr_eeh.c
new file mode 100644
index 0000000..f834b4c
--- /dev/null
+++ b/drivers/vfio/vfio_spapr_eeh.c
@@ -0,0 +1,87 @@
+/*
+ * EEH functionality support for VFIO devices. The feature is only
+ * available on sPAPR compatible platforms.
+ *
+ * Copyright Gavin Shan, IBM Corporation 2014.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/uaccess.h>
+#include <linux/vfio.h>
+#include <asm/eeh.h>
+
+/* We might build address mapping here for "fast" path later */
+int vfio_spapr_pci_eeh_open(struct pci_dev *pdev)
+{
+ return eeh_dev_open(pdev);
+}
+
+void vfio_spapr_pci_eeh_release(struct pci_dev *pdev)
+{
+ eeh_dev_release(pdev);
+}
+
+long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
+ unsigned int cmd, unsigned long arg)
+{
+ struct eeh_pe *pe;
+ struct vfio_eeh_pe_op op;
+ unsigned long minsz;
+ long ret = -EINVAL;
+
+ switch (cmd) {
+ case VFIO_CHECK_EXTENSION:
+ if (arg == VFIO_EEH)
+ ret = eeh_enabled() ? 1 : 0;
+ else
+ ret = 0;
+ break;
+ case VFIO_EEH_PE_OP:
+ pe = eeh_iommu_group_to_pe(group);
+ if (!pe)
+ return -ENODEV;
+
+ minsz = offsetofend(struct vfio_eeh_pe_op, op);
+ if (copy_from_user(&op, (void __user *)arg, minsz))
+ return -EFAULT;
+ if (op.argsz < minsz || op.flags)
+ return -EINVAL;
+
+ switch (op.op) {
+ case VFIO_EEH_PE_DISABLE:
+ ret = eeh_pe_set_option(pe, EEH_OPT_DISABLE);
+ break;
+ case VFIO_EEH_PE_ENABLE:
+ ret = eeh_pe_set_option(pe, EEH_OPT_ENABLE);
+ break;
+ case VFIO_EEH_PE_UNFREEZE_IO:
+ ret = eeh_pe_set_option(pe, EEH_OPT_THAW_MMIO);
+ break;
+ case VFIO_EEH_PE_UNFREEZE_DMA:
+ ret = eeh_pe_set_option(pe, EEH_OPT_THAW_DMA);
+ break;
+ case VFIO_EEH_PE_GET_STATE:
+ ret = eeh_pe_get_state(pe);
+ break;
+ case VFIO_EEH_PE_RESET_DEACTIVATE:
+ ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE);
+ break;
+ case VFIO_EEH_PE_RESET_HOT:
+ ret = eeh_pe_reset(pe, EEH_RESET_HOT);
+ break;
+ case VFIO_EEH_PE_RESET_FUNDAMENTAL:
+ ret = eeh_pe_reset(pe, EEH_RESET_FUNDAMENTAL);
+ break;
+ case VFIO_EEH_PE_CONFIGURE:
+ ret = eeh_pe_configure(pe);
+ break;
+ default:
+ ret = -EINVAL;
+ }
+ }
+
+ return ret;
+}
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index 81022a52..0d3bb8f 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -99,4 +99,27 @@ extern int vfio_external_user_iommu_id(struct vfio_group *group);
extern long vfio_external_check_extension(struct vfio_group *group,
unsigned long arg);
+#ifdef CONFIG_EEH
+extern int vfio_spapr_pci_eeh_open(struct pci_dev *pdev);
+extern void vfio_spapr_pci_eeh_release(struct pci_dev *pdev);
+extern long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
+ unsigned int cmd,
+ unsigned long arg);
+#else
+static inline int vfio_spapr_pci_eeh_open(struct pci_dev *pdev)
+{
+ return 0;
+}
+
+static inline void vfio_spapr_pci_eeh_release(struct pci_dev *pdev)
+{
+}
+
+static inline long vfio_spapr_iommu_eeh_ioctl(struct iommu_group *group,
+ unsigned int cmd,
+ unsigned long arg)
+{
+ return -ENOTTY;
+}
+#endif /* CONFIG_EEH */
#endif /* VFIO_H */
diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
index cb9023d..6612974 100644
--- a/include/uapi/linux/vfio.h
+++ b/include/uapi/linux/vfio.h
@@ -30,6 +30,9 @@
*/
#define VFIO_DMA_CC_IOMMU 4
+/* Check if EEH is supported */
+#define VFIO_EEH 5
+
/*
* The IOCTL interface is designed for extensibility by embedding the
* structure length (argsz) and flags into structures passed between
@@ -455,6 +458,37 @@ struct vfio_iommu_spapr_tce_info {
#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
+/*
+ * EEH PE operation struct provides ways to:
+ * - enable/disable EEH functionality;
+ * - unfreeze IO/DMA for frozen PE;
+ * - read PE state;
+ * - reset PE;
+ * - configure PE.
+ */
+struct vfio_eeh_pe_op {
+ __u32 argsz;
+ __u32 flags;
+ __u32 op;
+};
+
+#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
+#define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */
+#define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */
+#define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */
+#define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */
+#define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */
+#define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */
+#define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */
+#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */
+#define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */
+#define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */
+#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
+#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
+#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
+
+#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
+
/* ***************************************************************** */
#endif /* _UAPIVFIO_H */
--
1.8.3.2
^ permalink raw reply related
* [PATCH v10 2/3] powerpc/eeh: EEH support for VFIO PCI device
From: Gavin Shan @ 2014-06-10 1:41 UTC (permalink / raw)
To: kvm-ppc, linuxppc-dev; +Cc: aik, agraf, Gavin Shan, alex.williamson, qiudayu
In-Reply-To: <1402364517-28561-1-git-send-email-gwshan@linux.vnet.ibm.com>
The patch exports functions to be used by new VFIO ioctl command,
which will be introduced in subsequent patch, to support EEH
functinality for VFIO PCI devices.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/eeh.h | 12 ++
arch/powerpc/kernel/eeh.c | 268 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 280 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 653d981..b733044 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -173,6 +173,11 @@ enum {
#define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */
#define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */
#define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */
+#define EEH_PE_STATE_NORMAL 0 /* Normal state */
+#define EEH_PE_STATE_RESET 1 /* PE reset asserted */
+#define EEH_PE_STATE_STOPPED_IO_DMA 2 /* Frozen PE */
+#define EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA, Enabled IO */
+#define EEH_PE_STATE_UNAVAIL 5 /* Unavailable */
#define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */
#define EEH_RESET_HOT 1 /* Hot reset */
#define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */
@@ -280,6 +285,13 @@ void eeh_add_device_late(struct pci_dev *);
void eeh_add_device_tree_late(struct pci_bus *);
void eeh_add_sysfs_files(struct pci_bus *);
void eeh_remove_device(struct pci_dev *);
+int eeh_dev_open(struct pci_dev *pdev);
+void eeh_dev_release(struct pci_dev *pdev);
+struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group);
+int eeh_pe_set_option(struct eeh_pe *pe, int option);
+int eeh_pe_get_state(struct eeh_pe *pe);
+int eeh_pe_reset(struct eeh_pe *pe, int option);
+int eeh_pe_configure(struct eeh_pe *pe);
/**
* EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 3bc8b12..fc90df0 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -40,6 +40,7 @@
#include <asm/eeh.h>
#include <asm/eeh_event.h>
#include <asm/io.h>
+#include <asm/iommu.h>
#include <asm/machdep.h>
#include <asm/ppc-pci.h>
#include <asm/rtas.h>
@@ -108,6 +109,9 @@ struct eeh_ops *eeh_ops = NULL;
/* Lock to avoid races due to multiple reports of an error */
DEFINE_RAW_SPINLOCK(confirm_error_lock);
+/* Lock to protect passed flags */
+static DEFINE_MUTEX(eeh_dev_mutex);
+
/* Buffer for reporting pci register dumps. Its here in BSS, and
* not dynamically alloced, so that it ends up in RMO where RTAS
* can access it.
@@ -1106,6 +1110,270 @@ void eeh_remove_device(struct pci_dev *dev)
edev->mode &= ~EEH_DEV_SYSFS;
}
+/**
+ * eeh_dev_open - Increase count of pass through devices for PE
+ * @pdev: PCI device
+ *
+ * Increase count of passed through devices for the indicated
+ * PE. In the result, the EEH errors detected on the PE won't be
+ * reported. The PE owner will be responsible for detection
+ * and recovery.
+ */
+int eeh_dev_open(struct pci_dev *pdev)
+{
+ struct eeh_dev *edev;
+
+ mutex_lock(&eeh_dev_mutex);
+
+ /* No PCI device ? */
+ if (!pdev)
+ goto out;
+
+ /* No EEH device or PE ? */
+ edev = pci_dev_to_eeh_dev(pdev);
+ if (!edev || !edev->pe)
+ goto out;
+
+ /* Increase PE's pass through count */
+ atomic_inc(&edev->pe->pass_dev_cnt);
+ mutex_unlock(&eeh_dev_mutex);
+
+ return 0;
+out:
+ mutex_unlock(&eeh_dev_mutex);
+ return -ENODEV;
+}
+EXPORT_SYMBOL_GPL(eeh_dev_open);
+
+/**
+ * eeh_dev_release - Decrease count of pass through devices for PE
+ * @pdev: PCI device
+ *
+ * Decrease count of pass through devices for the indicated PE. If
+ * there is no passed through device in PE, the EEH errors detected
+ * on the PE will be reported and handled as usual.
+ */
+void eeh_dev_release(struct pci_dev *pdev)
+{
+ struct eeh_dev *edev;
+
+ mutex_lock(&eeh_dev_mutex);
+
+ /* No PCI device ? */
+ if (!pdev)
+ goto out;
+
+ /* No EEH device ? */
+ edev = pci_dev_to_eeh_dev(pdev);
+ if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))
+ goto out;
+
+ /* Decrease PE's pass through count */
+ atomic_dec(&edev->pe->pass_dev_cnt);
+ WARN_ON(atomic_read(&edev->pe->pass_dev_cnt) < 0);
+out:
+ mutex_unlock(&eeh_dev_mutex);
+}
+EXPORT_SYMBOL(eeh_dev_release);
+
+/**
+ * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
+ * @group: IOMMU group
+ *
+ * The routine is called to convert IOMMU group to EEH PE.
+ */
+struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group)
+{
+ struct iommu_table *tbl;
+ struct pci_dev *pdev = NULL;
+ struct eeh_dev *edev;
+ bool found = false;
+
+ /* No IOMMU group ? */
+ if (!group)
+ return NULL;
+
+ /* No PCI device ? */
+ for_each_pci_dev(pdev) {
+ tbl = get_iommu_table_base(&pdev->dev);
+ if (tbl && tbl->it_group == group) {
+ found = true;
+ break;
+ }
+ }
+ if (!found)
+ return NULL;
+
+ /* No EEH device or PE ? */
+ edev = pci_dev_to_eeh_dev(pdev);
+ if (!edev || !edev->pe)
+ return NULL;
+
+ return edev->pe;
+}
+
+/**
+ * eeh_pe_set_option - Set options for the indicated PE
+ * @pe: EEH PE
+ * @option: requested option
+ *
+ * The routine is called to enable or disable EEH functionality
+ * on the indicated PE, to enable IO or DMA for the frozen PE.
+ */
+int eeh_pe_set_option(struct eeh_pe *pe, int option)
+{
+ int ret = 0;
+
+ /* Invalid PE ? */
+ if (!pe)
+ return -ENODEV;
+
+ /*
+ * EEH functionality could possibly be disabled, just
+ * return error for the case. And the EEH functinality
+ * isn't expected to be disabled on one specific PE.
+ */
+ switch (option) {
+ case EEH_OPT_ENABLE:
+ if (eeh_enabled())
+ break;
+ ret = -EIO;
+ break;
+ case EEH_OPT_DISABLE:
+ break;
+ case EEH_OPT_THAW_MMIO:
+ case EEH_OPT_THAW_DMA:
+ if (!eeh_ops || !eeh_ops->set_option) {
+ ret = -ENOENT;
+ break;
+ }
+
+ ret = eeh_ops->set_option(pe, option);
+ break;
+ default:
+ pr_debug("%s: Option %d out of range (%d, %d)\n",
+ __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA);
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_set_option);
+
+/**
+ * eeh_pe_get_state - Retrieve PE's state
+ * @pe: EEH PE
+ *
+ * Retrieve the PE's state, which includes 3 aspects: enabled
+ * DMA, enabled IO and asserted reset.
+ */
+int eeh_pe_get_state(struct eeh_pe *pe)
+{
+ int result, ret = 0;
+ bool rst_active, dma_en, mmio_en;
+
+ /* Existing PE ? */
+ if (!pe)
+ return -ENODEV;
+
+ if (!eeh_ops || !eeh_ops->get_state)
+ return -ENOENT;
+
+ result = eeh_ops->get_state(pe, NULL);
+ rst_active = !!(result & EEH_STATE_RESET_ACTIVE);
+ dma_en = !!(result & EEH_STATE_DMA_ENABLED);
+ mmio_en = !!(result & EEH_STATE_MMIO_ENABLED);
+
+ if (rst_active)
+ ret = EEH_PE_STATE_RESET;
+ else if (dma_en && mmio_en)
+ ret = EEH_PE_STATE_NORMAL;
+ else if (!dma_en && !mmio_en)
+ ret = EEH_PE_STATE_STOPPED_IO_DMA;
+ else if (!dma_en && mmio_en)
+ ret = EEH_PE_STATE_STOPPED_DMA;
+ else
+ ret = EEH_PE_STATE_UNAVAIL;
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_get_state);
+
+/**
+ * eeh_pe_reset - Issue PE reset according to specified type
+ * @pe: EEH PE
+ * @option: reset type
+ *
+ * The routine is called to reset the specified PE with the
+ * indicated type, either fundamental reset or hot reset.
+ * PE reset is the most important part for error recovery.
+ */
+int eeh_pe_reset(struct eeh_pe *pe, int option)
+{
+ int ret = 0;
+
+ /* Invalid PE ? */
+ if (!pe)
+ return -ENODEV;
+
+ if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset)
+ return -ENOENT;
+
+ switch (option) {
+ case EEH_RESET_DEACTIVATE:
+ ret = eeh_ops->reset(pe, option);
+ if (ret)
+ break;
+
+ /*
+ * The PE is still in frozen state and we need to clear
+ * that. It's good to clear frozen state after deassert
+ * to avoid messy IO access during reset, which might
+ * cause recursive frozen PE.
+ */
+ ret = eeh_ops->set_option(pe, EEH_OPT_THAW_MMIO);
+ if (!ret)
+ ret = eeh_ops->set_option(pe, EEH_OPT_THAW_DMA);
+ if (!ret)
+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
+ break;
+ case EEH_RESET_HOT:
+ case EEH_RESET_FUNDAMENTAL:
+ ret = eeh_ops->reset(pe, option);
+ break;
+ default:
+ pr_debug("%s: Unsupported option %d\n",
+ __func__, option);
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_reset);
+
+/**
+ * eeh_pe_configure - Configure PCI bridges after PE reset
+ * @pe: EEH PE
+ *
+ * The routine is called to restore the PCI config space for
+ * those PCI devices, especially PCI bridges affected by PE
+ * reset issued previously.
+ */
+int eeh_pe_configure(struct eeh_pe *pe)
+{
+ int ret = 0;
+
+ /* Invalid PE ? */
+ if (!pe)
+ return -ENODEV;
+
+ /* Restore config space for the affected devices */
+ eeh_pe_restore_bars(pe);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_configure);
+
static int proc_eeh_show(struct seq_file *m, void *v)
{
if (!eeh_enabled()) {
--
1.8.3.2
^ permalink raw reply related
* [RFC PATCH V3 00/17] Enable SRIOV on POWER8
From: Wei Yang @ 2014-06-10 1:56 UTC (permalink / raw)
To: benh; +Cc: Wei Yang, linux-pci, gwshan, qiudayu, bhelgaas, yan, linuxppc-dev
This patch set enable the SRIOV on POWER8. This is not the final version, some
patches rely on un-merged patches.
The gerneral idea is put each VF in their own PE and allocated necessary
resources, like DMA/IOMMU_TABLE.
One thing special for VF PE is we use M64BT to cover the IOV BAR. This means
we need to do some hack on pci devices's resources.
1. Expand the IOV BAR properly.
2. Shift the IOV BAR properly.
3. IOV BAR alignment is the total size instead of an individual size.
4. Take the IOV BAR alignment into consideration in the sizing and assigning.
Test Environment:
The SRIOV device tested is Emulex Lancer and Mellanox ConnectX-3.
Examples on pass through a VF to guest through vfio:
1. install necessary modules
modprobe vfio
modprobe vfio-pci
2. retrieve the iommu_group the device belongs to
readlink /sys/bus/pci/devices/0000:06:0d.0/iommu_group
../../../../kernel/iommu_groups/26
This means it belongs to group 26
3. see how many devices under this iommu_group
ls ls /sys/kernel/iommu_groups/26/devices/
4. unbind the original driver and bind to vfio-pci driver
echo 0000:06:0d.0 > /sys/bus/pci/devices/0000:06:0d.0/driver/unbind
echo 1102 0002 > /sys/bus/pci/drivers/vfio-pci/new_id
Note: this should be done for each device in the same iommu_group
5. Start qemu and pass device through vfio
/home/ywywyang/git/qemu-impreza/ppc64-softmmu/qemu-system-ppc64 \
-M pseries -m 2048 -enable-kvm -nographic \
-drive file=/home/ywywyang/kvm/fc19.img \
-monitor telnet:localhost:5435,server,nowait -boot cd \
-device "spapr-pci-vfio-host-bridge,id=CXGB3,iommu=26,index=6"
Verify this is the exact VF response:
1. ping from a machine in the same subnet(the broadcast domain)
2. run arp -n on this machine
9.115.251.20 ether 00:00:c9:df:ed:bf C eth0
3. ifconfig in the guest
# ifconfig eth1
eth1: flags=4163<UP,BROADCAST,RUNNING,MULTICAST> mtu 1500
inet 9.115.251.20 netmask 255.255.255.0 broadcast 9.115.251.255
inet6 fe80::200:c9ff:fedf:edbf prefixlen 64 scopeid 0x20<link>
ether 00:00:c9:df:ed:bf txqueuelen 1000 (Ethernet)
RX packets 175 bytes 13278 (12.9 KiB)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 58 bytes 9276 (9.0 KiB)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0
4. They have the same MAC address
Note: make sure you shutdown other network interfaces in guest.
---
v2 -> v3:
1. change the return type of virtfn_bus/virtfn_devfn to int
change the name of these two functions to pci_iov_virtfn_bus/pci_iov_virtfn_devfn
2. reduce the second parameter or pcibios_sriov_disable()
3. use data instead of pe in "ppc/pnv: allocate pe->iommu_table dynamically"
4. rename __pci_sriov_resource_size to pcibios_sriov_resource_size
5. rename __pci_sriov_resource_alignment to pcibios_sriov_resource_alignment
v1 -> v2:
1. change the return value of virtfn_bus/virtfn_devfn to 0
2. move some TCE related marco definition to
arch/powerpc/platforms/powernv/pci.h
3. fix the __pci_sriov_resource_alignment on powernv platform
During the sizing stage, the IOV BAR is truncated to 0, which will
effect the order of allocation. Fix this, so that make sure BAR will be
allocated ordered by their alignment.
v0 -> v1:
1. Improve the change log for
"PCI: Add weak __pci_sriov_resource_size() interface"
"PCI: Add weak __pci_sriov_resource_alignment() interface"
"PCI: take additional IOV BAR alignment in sizing and assigning"
2. Wrap VF PE code in CONFIG_PCI_IOV
3. Did regression test on P7.
Wei Yang (17):
pci/iov: Export interface for retrieve VF's BDF
pci/of: Match PCI VFs to dev-tree nodes dynamically
ppc/pci: don't unset pci resources for VFs
PCI: SRIOV: add VF enable/disable hook
ppc/pnv: user macro to define the TCE size
ppc/pnv: allocate pe->iommu_table dynamically
ppc/pnv: Add function to deconfig a PE
PCI: Add weak pcibios_sriov_resource_size() interface
PCI: Add weak pcibios_sriov_resource_alignment() interface
PCI: take additional IOV BAR alignment in sizing and assigning
ppc/pnv: Expand VF resources according to the number of total_pe
powerpc/powernv: implement pcibios_sriov_resource_alignment on
powernv
powerpc/powernv: shift VF resource with an offset
ppc/pci: create/release dev-tree node for VFs
powerpc/powernv: allocate VF PE
ppc/pci: Expanding IOV BAR, with m64_per_iov supported
ppc/pnv: Group VF PE when IOV BAR is big on PHB3
arch/powerpc/include/asm/iommu.h | 3 +
arch/powerpc/include/asm/machdep.h | 7 +
arch/powerpc/include/asm/pci-bridge.h | 7 +
arch/powerpc/include/asm/tce.h | 3 +-
arch/powerpc/kernel/pci-common.c | 29 +
arch/powerpc/platforms/powernv/Kconfig | 1 +
arch/powerpc/platforms/powernv/pci-ioda.c | 824 +++++++++++++++++++++++++++--
arch/powerpc/platforms/powernv/pci.c | 22 +-
arch/powerpc/platforms/powernv/pci.h | 17 +-
drivers/pci/iov.c | 84 ++-
drivers/pci/pci.h | 21 -
drivers/pci/setup-bus.c | 66 ++-
include/linux/pci.h | 46 ++
13 files changed, 1041 insertions(+), 89 deletions(-)
--
1.7.9.5
^ permalink raw reply
* [RFC PATCH V3 01/17] pci/iov: Export interface for retrieve VF's BDF
From: Wei Yang @ 2014-06-10 1:56 UTC (permalink / raw)
To: benh; +Cc: Wei Yang, linux-pci, gwshan, qiudayu, bhelgaas, yan, linuxppc-dev
In-Reply-To: <1402365399-5121-1-git-send-email-weiyang@linux.vnet.ibm.com>
When implementing the SR-IOV on PowerNV platform, some resource reservation is
needed for VFs which don't exist at the bootup stage. To do the match between
resources and VFs, the code need to get the VF's BDF in advance.
In this patch, it exports the interface to retrieve VF's BDF:
* Make the virtfn_bus as an interface
* Make the virtfn_devfn as an interface
* rename them with more specific name
* code cleanup in pci_sriov_resource_alignment()
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
---
drivers/pci/iov.c | 26 +++++++-------------------
drivers/pci/pci.h | 21 ---------------------
include/linux/pci.h | 43 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 50 insertions(+), 40 deletions(-)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 9dce7c5..589ef7d 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -19,18 +19,6 @@
#define VIRTFN_ID_LEN 16
-static inline u8 virtfn_bus(struct pci_dev *dev, int id)
-{
- return dev->bus->number + ((dev->devfn + dev->sriov->offset +
- dev->sriov->stride * id) >> 8);
-}
-
-static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
-{
- return (dev->devfn + dev->sriov->offset +
- dev->sriov->stride * id) & 0xff;
-}
-
static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
{
struct pci_bus *child;
@@ -69,7 +57,7 @@ static int virtfn_add(struct pci_dev *dev, int id, int reset)
struct pci_bus *bus;
mutex_lock(&iov->dev->sriov->lock);
- bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
+ bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
if (!bus)
goto failed;
@@ -77,7 +65,7 @@ static int virtfn_add(struct pci_dev *dev, int id, int reset)
if (!virtfn)
goto failed0;
- virtfn->devfn = virtfn_devfn(dev, id);
+ virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
virtfn->vendor = dev->vendor;
pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
pci_setup_device(virtfn);
@@ -140,8 +128,8 @@ static void virtfn_remove(struct pci_dev *dev, int id, int reset)
struct pci_sriov *iov = dev->sriov;
virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
- virtfn_bus(dev, id),
- virtfn_devfn(dev, id));
+ pci_iov_virtfn_bus(dev, id),
+ pci_iov_virtfn_devfn(dev, id));
if (!virtfn)
return;
@@ -307,7 +295,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
iov->offset = offset;
iov->stride = stride;
- if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
+ if (pci_iov_virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
return -ENOMEM;
}
@@ -616,7 +604,7 @@ resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
if (!reg)
return 0;
- __pci_read_base(dev, type, &tmp, reg);
+ __pci_read_base(dev, type, &tmp, reg);
return resource_alignment(&tmp);
}
@@ -646,7 +634,7 @@ int pci_iov_bus_range(struct pci_bus *bus)
list_for_each_entry(dev, &bus->devices, bus_list) {
if (!dev->is_physfn)
continue;
- busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
+ busnr = pci_iov_virtfn_bus(dev, dev->sriov->total_VFs - 1);
if (busnr > max)
max = busnr;
}
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 4df38df..51f1f7c 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -223,27 +223,6 @@ static inline int pci_ari_enabled(struct pci_bus *bus)
void pci_reassigndev_resource_alignment(struct pci_dev *dev);
void pci_disable_bridge_window(struct pci_dev *dev);
-/* Single Root I/O Virtualization */
-struct pci_sriov {
- int pos; /* capability position */
- int nres; /* number of resources */
- u32 cap; /* SR-IOV Capabilities */
- u16 ctrl; /* SR-IOV Control */
- u16 total_VFs; /* total VFs associated with the PF */
- u16 initial_VFs; /* initial VFs associated with the PF */
- u16 num_VFs; /* number of VFs available */
- u16 offset; /* first VF Routing ID offset */
- u16 stride; /* following VF stride */
- u32 pgsz; /* page size for BAR alignment */
- u8 link; /* Function Dependency Link */
- u16 driver_max_VFs; /* max num VFs driver supports */
- struct pci_dev *dev; /* lowest numbered PF */
- struct pci_dev *self; /* this PF */
- struct mutex lock; /* lock for VF bus */
- struct work_struct mtask; /* VF Migration task */
- u8 __iomem *mstate; /* VF Migration State Array */
-};
-
#ifdef CONFIG_PCI_ATS
void pci_restore_ats_state(struct pci_dev *dev);
#else
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 33aa2ca..ddb1ca0 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -240,6 +240,27 @@ struct pci_vpd;
struct pci_sriov;
struct pci_ats;
+/* Single Root I/O Virtualization */
+struct pci_sriov {
+ int pos; /* capability position */
+ int nres; /* number of resources */
+ u32 cap; /* SR-IOV Capabilities */
+ u16 ctrl; /* SR-IOV Control */
+ u16 total_VFs; /* total VFs associated with the PF */
+ u16 initial_VFs; /* initial VFs associated with the PF */
+ u16 num_VFs; /* number of VFs available */
+ u16 offset; /* first VF Routing ID offset */
+ u16 stride; /* following VF stride */
+ u32 pgsz; /* page size for BAR alignment */
+ u8 link; /* Function Dependency Link */
+ u16 driver_max_VFs; /* max num VFs driver supports */
+ struct pci_dev *dev; /* lowest numbered PF */
+ struct pci_dev *self; /* this PF */
+ struct mutex lock; /* lock for VF bus */
+ struct work_struct mtask; /* VF Migration task */
+ u8 __iomem *mstate; /* VF Migration State Array */
+};
+
/*
* The pci_dev structure is used to describe PCI devices.
*/
@@ -1595,6 +1616,20 @@ int pci_ext_cfg_avail(void);
void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
#ifdef CONFIG_PCI_IOV
+static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
+{
+ if (!dev->is_physfn)
+ return -1;
+ return dev->bus->number + ((dev->devfn + dev->sriov->offset +
+ dev->sriov->stride * id) >> 8);
+}
+static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id)
+{
+ if (!dev->is_physfn)
+ return -1;
+ return (dev->devfn + dev->sriov->offset +
+ dev->sriov->stride * id) & 0xff;
+}
int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
void pci_disable_sriov(struct pci_dev *dev);
irqreturn_t pci_sriov_migration(struct pci_dev *dev);
@@ -1603,6 +1638,14 @@ int pci_vfs_assigned(struct pci_dev *dev);
int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
int pci_sriov_get_totalvfs(struct pci_dev *dev);
#else
+static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
+{
+ return -1;
+}
+static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id)
+{
+ return -1;
+}
static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
{ return -ENODEV; }
static inline void pci_disable_sriov(struct pci_dev *dev) { }
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH V3 02/17] pci/of: Match PCI VFs to dev-tree nodes dynamically
From: Wei Yang @ 2014-06-10 1:56 UTC (permalink / raw)
To: benh; +Cc: Wei Yang, linux-pci, gwshan, qiudayu, bhelgaas, yan, linuxppc-dev
In-Reply-To: <1402365399-5121-1-git-send-email-weiyang@linux.vnet.ibm.com>
As introduced by commit 98d9f30c82 ("pci/of: Match PCI devices to dev-tree nodes
dynamically"), we need to match PCI devices to their corresponding dev-tree
nodes. While for VFs, this step was missed.
This patch matches VFs' PCI devices to dev-tree nodes dynamically.
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
---
drivers/pci/iov.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 589ef7d..1d21f43 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -67,6 +67,7 @@ static int virtfn_add(struct pci_dev *dev, int id, int reset)
virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
virtfn->vendor = dev->vendor;
+ pci_set_of_node(virtfn);
pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
pci_setup_device(virtfn);
virtfn->dev.parent = dev->dev.parent;
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH V3 04/17] PCI: SRIOV: add VF enable/disable hook
From: Wei Yang @ 2014-06-10 1:56 UTC (permalink / raw)
To: benh; +Cc: Wei Yang, linux-pci, gwshan, qiudayu, bhelgaas, yan, linuxppc-dev
In-Reply-To: <1402365399-5121-1-git-send-email-weiyang@linux.vnet.ibm.com>
VFs are dynamically created/released when driver enable them. On some
platforms, like PowerNV, special resources are necessary to enable VFs.
This patch adds two hooks for platform initialization before creating the VFs.
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
---
drivers/pci/iov.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 1d21f43..cc87773 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -250,6 +250,11 @@ static void sriov_disable_migration(struct pci_dev *dev)
iounmap(iov->mstate);
}
+int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 vf_num)
+{
+ return 0;
+}
+
static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
{
int rc;
@@ -260,6 +265,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
struct pci_dev *pdev;
struct pci_sriov *iov = dev->sriov;
int bars = 0;
+ int retval;
if (!nr_virtfn)
return 0;
@@ -334,6 +340,12 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
if (nr_virtfn < initial)
initial = nr_virtfn;
+ if ((retval = pcibios_sriov_enable(dev, initial))) {
+ dev_err(&dev->dev, "Failure %d from pcibios_sriov_setup()\n",
+ retval);
+ return retval;
+ }
+
for (i = 0; i < initial; i++) {
rc = virtfn_add(dev, i, 0);
if (rc)
@@ -368,6 +380,11 @@ failed:
return rc;
}
+int __weak pcibios_sriov_disable(struct pci_dev *pdev)
+{
+ return 0;
+}
+
static void sriov_disable(struct pci_dev *dev)
{
int i;
@@ -382,6 +399,8 @@ static void sriov_disable(struct pci_dev *dev)
for (i = 0; i < iov->num_VFs; i++)
virtfn_remove(dev, i, 0);
+ pcibios_sriov_disable(dev);
+
iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
pci_cfg_access_lock(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
--
1.7.9.5
^ permalink raw reply related
* [RFC PATCH V3 03/17] ppc/pci: don't unset pci resources for VFs
From: Wei Yang @ 2014-06-10 1:56 UTC (permalink / raw)
To: benh; +Cc: Wei Yang, linux-pci, gwshan, qiudayu, bhelgaas, yan, linuxppc-dev
In-Reply-To: <1402365399-5121-1-git-send-email-weiyang@linux.vnet.ibm.com>
When the PCI_REASSIGN_ALL_RSRC is set, each resource for a pci_dev will be
unset. which means the pci core will reassign those resources.
While this behavior will clean up the resources information for VFs, whose
value is calculated in virtfn_add.
This patch adds a condition. If the pci_dev is a VF, skip the resource
unset process.
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
---
arch/powerpc/kernel/pci-common.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index d9476c1..c449a26 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -824,6 +824,12 @@ static void pcibios_fixup_resources(struct pci_dev *dev)
pci_name(dev));
return;
}
+
+#ifdef CONFIG_PCI_IOV
+ if (dev->is_virtfn)
+ return;
+#endif
+
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
struct resource *res = dev->resource + i;
struct pci_bus_region reg;
--
1.7.9.5
^ permalink raw reply related
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