* Re: [PATCH v3 1/2] flexcan: add err_irq handler for flexcan
From: Marc Kleine-Budde @ 2014-06-23 7:37 UTC (permalink / raw)
To: qiang.zhao@freescale.com, linuxppc-dev@lists.ozlabs.org,
linux-can@vger.kernel.org, wg@grandegger.com, Scott Wood
In-Reply-To: <d7e8cae0bc584530bedc8febf5476fcf@BLUPR03MB341.namprd03.prod.outlook.com>
[-- Attachment #1: Type: text/plain, Size: 2901 bytes --]
On 06/23/2014 09:26 AM, qiang.zhao@freescale.com wrote:
>
> On 06/23/2014 03:18 PM, Marc Kleine-Budde wrote:
>
>>
>> On 06/23/2014 09:11 AM, Zhao Qiang wrote:
>>> when flexcan is not physically linked, command 'cantest' will trigger
>>> an err_irq, add err_irq handler for it.
>>>
>>> Signed-off-by: Zhao Qiang <B45475@freescale.com>
>>> ---
>>> Changes for v2:
>>> - use a space instead of tab
>>> - use flexcan_poll_state instead of print Changes for v3:
>>> - return IRQ_HANDLED if err is triggered
>>> - stop transmitted packets when there is an err_interrupt
>>>
>>> drivers/net/can/flexcan.c | 35 ++++++++++++++++++++++++++++++++++-
>>> 1 file changed, 34 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
>>> index f425ec2..6802a25 100644
>>> --- a/drivers/net/can/flexcan.c
>>> +++ b/drivers/net/can/flexcan.c
>>> @@ -208,6 +208,7 @@ struct flexcan_priv {
>>> void __iomem *base;
>>> u32 reg_esr;
>>> u32 reg_ctrl_default;
>>> + unsigned int err_irq;
>>>
>>> struct clk *clk_ipg;
>>> struct clk *clk_per;
>>> @@ -744,6 +745,24 @@ static irqreturn_t flexcan_irq(int irq, void
>> *dev_id)
>>> return IRQ_HANDLED;
>>> }
>>>
>>> +static irqreturn_t flexcan_err_irq(int irq, void *dev_id) {
>>> + struct net_device *dev = dev_id;
>>> + struct flexcan_priv *priv = netdev_priv(dev);
>>> + struct flexcan_regs __iomem *regs = priv->base;
>>> + u32 reg_ctrl, reg_esr;
>>> +
>>> + reg_esr = flexcan_read(®s->esr);
>>> + reg_ctrl = flexcan_read(®s->ctrl);
>>> + if (reg_esr & FLEXCAN_ESR_TX_WRN) {
>>
>> When does the hardware trigger the interrupt?
>
> When there is no wire link between tx and rx, tx start transfer and doesn’t get the ack.
You are testing for the warning interrupt, not for the
FLEXCAN_ESR_ACK_ERR (which is triggered there isn't any ACK).
>>> + flexcan_write(reg_esr & ~FLEXCAN_ESR_TX_WRN, ®s->esr);
>>> + flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
>>> + netif_stop_queue(dev);
>>
>> Why are you stopping the txqueue?
>
> There is no wire link, tx can't transfer successfully.
You are testing for the warning interrupt, which is triggered if the
error counter increases from 95 to 96. And the error counter can
increase due to several reasons. No link is only one of them. If the CAN
core cannot transmit new packages any more the flow control in the
driver will take care.
What about calling the normal interrupt if er err_irq occurs, as this
function will take care of both normal and error interrupts anyway?
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 242 bytes --]
^ permalink raw reply
* Re: [RFC PATCH V3 08/17] PCI: Add weak pcibios_sriov_resource_size() interface
From: Wei Yang @ 2014-06-23 7:56 UTC (permalink / raw)
To: Gavin Shan
Cc: Wei Yang, benh, linux-pci, yan, bhelgaas, qiudayu, linuxppc-dev
In-Reply-To: <20140623054128.GA9831@shangw>
On Mon, Jun 23, 2014 at 03:41:28PM +1000, Gavin Shan wrote:
>On Tue, Jun 10, 2014 at 09:56:30AM +0800, Wei Yang wrote:
>>When retrieving sriov resource size in pci_sriov_resource_size(), it will
>>divide the total IOV resource size with the totalVF number. This is true for
>>most cases, while may not be correct on some specific platform.
>>
>>For example on powernv platform, in order to fix the IOV BAR into a hardware
>>alignment, the IOV resource size would be expended. This means the original
>>method couldn't work.
>>
>>This patch introduces a weak pcibios_sriov_resource_size() interface, which
>>gives platform a chance to implement specific method to calculate the sriov
>>resource size.
>>
>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>---
>> drivers/pci/iov.c | 27 +++++++++++++++++++++++++--
>> include/linux/pci.h | 3 +++
>> 2 files changed, 28 insertions(+), 2 deletions(-)
>>
>>diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
>>index cc87773..9fd4648 100644
>>--- a/drivers/pci/iov.c
>>+++ b/drivers/pci/iov.c
>>@@ -45,6 +45,30 @@ static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
>> pci_remove_bus(virtbus);
>> }
>>
>>+resource_size_t __weak pcibios_sriov_resource_size(struct pci_dev *dev, int resno)
>>+{
>>+ return 0;
>>+}
>>+
>
>Please define the prototype of weak function in header files (e.g.
>linux/include/pci.h) :-)
Missed, will add it.
>
>If you missed doing same thing for the weak functions added in the
>previous patches, you need fix it as well.
Yep.
>
>>+resource_size_t pci_sriov_resource_size(struct pci_dev *dev, int resno)
>>+{
>>+ u64 size;
>
>I guess it'd better to be "resource_size_t".
>
>>+ struct pci_sriov *iov;
>>+
>>+ if (!dev->is_physfn)
>>+ return 0;
>>+
>>+ size = pcibios_sriov_resource_size(dev, resno);
>>+ if (size != 0)
>>+ return size;
>>+
>>+ iov = dev->sriov;
>>+ size = resource_size(dev->resource + resno);
>>+ do_div(size, iov->total_VFs);
>>+
>>+ return size;
>>+}
>>+
>> static int virtfn_add(struct pci_dev *dev, int id, int reset)
>> {
>> int i;
>>@@ -81,8 +105,7 @@ static int virtfn_add(struct pci_dev *dev, int id, int reset)
>> continue;
>> virtfn->resource[i].name = pci_name(virtfn);
>> virtfn->resource[i].flags = res->flags;
>>- size = resource_size(res);
>>- do_div(size, iov->total_VFs);
>>+ size = pci_sriov_resource_size(dev, i + PCI_IOV_RESOURCES);
>> virtfn->resource[i].start = res->start + size * id;
>> virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
>> rc = request_resource(res, &virtfn->resource[i]);
>>diff --git a/include/linux/pci.h b/include/linux/pci.h
>>index ddb1ca0..315c150 100644
>>--- a/include/linux/pci.h
>>+++ b/include/linux/pci.h
>>@@ -1637,6 +1637,7 @@ int pci_num_vf(struct pci_dev *dev);
>> int pci_vfs_assigned(struct pci_dev *dev);
>> int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
>> int pci_sriov_get_totalvfs(struct pci_dev *dev);
>>+resource_size_t pci_sriov_resource_size(struct pci_dev *dev, int resno);
>> #else
>> static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
>> {
>>@@ -1658,6 +1659,8 @@ static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
>> { return 0; }
>> static inline int pci_sriov_get_totalvfs(struct pci_dev *dev)
>> { return 0; }
>>+static inline resource_size_t pci_sriov_resource_size(struct pci_dev *dev, int resno)
>>+{ return -1; }
>> #endif
>>
>> #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
>
>Thanks,
>Gavin
--
Richard Yang
Help you, Help me
^ permalink raw reply
* RE: [PATCH v3 1/2] flexcan: add err_irq handler for flexcan
From: qiang.zhao @ 2014-06-23 8:15 UTC (permalink / raw)
To: Marc Kleine-Budde, linuxppc-dev@lists.ozlabs.org,
linux-can@vger.kernel.org, wg@grandegger.com, Scott Wood
In-Reply-To: <53A7D92E.4060708@pengutronix.de>
T24gMDYvMjMvMjAxNCAwMzozNyBQTSwgTWFyYyBLbGVpbmUtQnVkZGUgd3JvdGU6DQoNCj4gLS0t
LS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogTWFyYyBLbGVpbmUtQnVkZGUgW21haWx0
bzpta2xAcGVuZ3V0cm9uaXguZGVdDQo+IFNlbnQ6IE1vbmRheSwgSnVuZSAyMywgMjAxNCAzOjM3
IFBNDQo+IFRvOiBaaGFvIFFpYW5nLUI0NTQ3NTsgbGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5v
cmc7IGxpbnV4LQ0KPiBjYW5Admdlci5rZXJuZWwub3JnOyB3Z0BncmFuZGVnZ2VyLmNvbTsgV29v
ZCBTY290dC1CMDc0MjENCj4gU3ViamVjdDogUmU6IFtQQVRDSCB2MyAxLzJdIGZsZXhjYW46IGFk
ZCBlcnJfaXJxIGhhbmRsZXIgZm9yIGZsZXhjYW4NCj4gDQo+IE9uIDA2LzIzLzIwMTQgMDk6MjYg
QU0sIHFpYW5nLnpoYW9AZnJlZXNjYWxlLmNvbSB3cm90ZToNCj4gPg0KPiA+IE9uIDA2LzIzLzIw
MTQgMDM6MTggUE0sIE1hcmMgS2xlaW5lLUJ1ZGRlIHdyb3RlOg0KPiA+DQo+ID4+DQo+ID4+IE9u
IDA2LzIzLzIwMTQgMDk6MTEgQU0sIFpoYW8gUWlhbmcgd3JvdGU6DQo+ID4+PiB3aGVuIGZsZXhj
YW4gaXMgbm90IHBoeXNpY2FsbHkgbGlua2VkLCBjb21tYW5kICdjYW50ZXN0JyB3aWxsDQo+ID4+
PiB0cmlnZ2VyIGFuIGVycl9pcnEsIGFkZCBlcnJfaXJxIGhhbmRsZXIgZm9yIGl0Lg0KPiA+Pj4N
Cj4gPj4+IFNpZ25lZC1vZmYtYnk6IFpoYW8gUWlhbmcgPEI0NTQ3NUBmcmVlc2NhbGUuY29tPg0K
PiA+Pj4gLS0tDQo+ID4+PiBDaGFuZ2VzIGZvciB2MjoNCj4gPj4+IAktIHVzZSBhIHNwYWNlIGlu
c3RlYWQgb2YgdGFiDQo+ID4+PiAJLSB1c2UgZmxleGNhbl9wb2xsX3N0YXRlIGluc3RlYWQgb2Yg
cHJpbnQgQ2hhbmdlcyBmb3IgdjM6DQo+ID4+PiAJLSByZXR1cm4gSVJRX0hBTkRMRUQgaWYgZXJy
IGlzIHRyaWdnZXJlZA0KPiA+Pj4gCS0gc3RvcCB0cmFuc21pdHRlZCBwYWNrZXRzIHdoZW4gdGhl
cmUgaXMgYW4gZXJyX2ludGVycnVwdA0KPiA+Pj4NCj4gPj4+ICBkcml2ZXJzL25ldC9jYW4vZmxl
eGNhbi5jIHwgMzUgKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKy0NCj4gPj4+ICAx
IGZpbGUgY2hhbmdlZCwgMzQgaW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQ0KPiA+Pj4NCj4g
Pj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL25ldC9jYW4vZmxleGNhbi5jIGIvZHJpdmVycy9uZXQv
Y2FuL2ZsZXhjYW4uYw0KPiA+Pj4gaW5kZXggZjQyNWVjMi4uNjgwMmEyNSAxMDA2NDQNCj4gPj4+
IC0tLSBhL2RyaXZlcnMvbmV0L2Nhbi9mbGV4Y2FuLmMNCj4gPj4+ICsrKyBiL2RyaXZlcnMvbmV0
L2Nhbi9mbGV4Y2FuLmMNCj4gPj4+IEBAIC0yMDgsNiArMjA4LDcgQEAgc3RydWN0IGZsZXhjYW5f
cHJpdiB7DQo+ID4+PiAgCXZvaWQgX19pb21lbSAqYmFzZTsNCj4gPj4+ICAJdTMyIHJlZ19lc3I7
DQo+ID4+PiAgCXUzMiByZWdfY3RybF9kZWZhdWx0Ow0KPiA+Pj4gKwl1bnNpZ25lZCBpbnQgZXJy
X2lycTsNCj4gPj4+DQo+ID4+PiAgCXN0cnVjdCBjbGsgKmNsa19pcGc7DQo+ID4+PiAgCXN0cnVj
dCBjbGsgKmNsa19wZXI7DQo+ID4+PiBAQCAtNzQ0LDYgKzc0NSwyNCBAQCBzdGF0aWMgaXJxcmV0
dXJuX3QgZmxleGNhbl9pcnEoaW50IGlycSwgdm9pZA0KPiA+PiAqZGV2X2lkKQ0KPiA+Pj4gIAly
ZXR1cm4gSVJRX0hBTkRMRUQ7DQo+ID4+PiAgfQ0KPiA+Pj4NCj4gPj4+ICtzdGF0aWMgaXJxcmV0
dXJuX3QgZmxleGNhbl9lcnJfaXJxKGludCBpcnEsIHZvaWQgKmRldl9pZCkgew0KPiA+Pj4gKwlz
dHJ1Y3QgbmV0X2RldmljZSAqZGV2ID0gZGV2X2lkOw0KPiA+Pj4gKwlzdHJ1Y3QgZmxleGNhbl9w
cml2ICpwcml2ID0gbmV0ZGV2X3ByaXYoZGV2KTsNCj4gPj4+ICsJc3RydWN0IGZsZXhjYW5fcmVn
cyBfX2lvbWVtICpyZWdzID0gcHJpdi0+YmFzZTsNCj4gPj4+ICsJdTMyIHJlZ19jdHJsLCByZWdf
ZXNyOw0KPiA+Pj4gKw0KPiA+Pj4gKwlyZWdfZXNyID0gZmxleGNhbl9yZWFkKCZyZWdzLT5lc3Ip
Ow0KPiA+Pj4gKwlyZWdfY3RybCA9IGZsZXhjYW5fcmVhZCgmcmVncy0+Y3RybCk7DQo+ID4+PiAr
CWlmIChyZWdfZXNyICYgRkxFWENBTl9FU1JfVFhfV1JOKSB7DQo+ID4+DQo+ID4+IFdoZW4gZG9l
cyB0aGUgaGFyZHdhcmUgdHJpZ2dlciB0aGUgaW50ZXJydXB0Pw0KPiA+DQo+ID4gV2hlbiB0aGVy
ZSBpcyBubyB3aXJlIGxpbmsgYmV0d2VlbiB0eCBhbmQgcngsIHR4IHN0YXJ0IHRyYW5zZmVyIGFu
ZA0KPiBkb2VzbuKAmXQgZ2V0IHRoZSBhY2suDQo+IA0KPiBZb3UgYXJlIHRlc3RpbmcgZm9yIHRo
ZSB3YXJuaW5nIGludGVycnVwdCwgbm90IGZvciB0aGUNCj4gRkxFWENBTl9FU1JfQUNLX0VSUiAo
d2hpY2ggaXMgdHJpZ2dlcmVkIHRoZXJlIGlzbid0IGFueSBBQ0spLg0KPiANCj4gPj4+ICsJCWZs
ZXhjYW5fd3JpdGUocmVnX2VzciAmIH5GTEVYQ0FOX0VTUl9UWF9XUk4sICZyZWdzLT5lc3IpOw0K
PiA+Pj4gKwkJZmxleGNhbl93cml0ZShyZWdfY3RybCAmIH5GTEVYQ0FOX0NUUkxfRVJSX01TSywg
JnJlZ3MtPmN0cmwpOw0KPiA+Pj4gKwkJbmV0aWZfc3RvcF9xdWV1ZShkZXYpOw0KPiA+Pg0KPiA+
PiBXaHkgYXJlIHlvdSBzdG9wcGluZyB0aGUgdHhxdWV1ZT8NCj4gPg0KPiA+IFRoZXJlIGlzIG5v
IHdpcmUgbGluaywgdHggY2FuJ3QgdHJhbnNmZXIgc3VjY2Vzc2Z1bGx5Lg0KPiANCj4gWW91IGFy
ZSB0ZXN0aW5nIGZvciB0aGUgd2FybmluZyBpbnRlcnJ1cHQsIHdoaWNoIGlzIHRyaWdnZXJlZCBp
ZiB0aGUNCj4gZXJyb3IgY291bnRlciBpbmNyZWFzZXMgZnJvbSA5NSB0byA5Ni4gQW5kIHRoZSBl
cnJvciBjb3VudGVyIGNhbiBpbmNyZWFzZQ0KPiBkdWUgdG8gc2V2ZXJhbCByZWFzb25zLiBObyBs
aW5rIGlzIG9ubHkgb25lIG9mIHRoZW0uIElmIHRoZSBDQU4gY29yZQ0KPiBjYW5ub3QgdHJhbnNt
aXQgbmV3IHBhY2thZ2VzIGFueSBtb3JlIHRoZSBmbG93IGNvbnRyb2wgaW4gdGhlIGRyaXZlciB3
aWxsDQo+IHRha2UgY2FyZS4NCg0KV2hlbiBUeCBlcnJvciBjb3VudGVyIGluY3JlYXNlcyBmcm9t
IDk1IHRvIDk2LCB0aGVyZSBtdXN0IGJlIGlzc3VlIGZvciB0eCwNClNvIHdoeSBjYW4ndCBJIHN0
b3AgdGhlIHR4cXVldWU/IA0KWW91IHNhaWQgdGhhdCB0aGVyZSBhcmUgc2V2ZXJhbCByZWFzb25z
LCB3b3VsZCB5b3UgbGlrZSB0byB0YWtlIHNvbWUgZXhhbXBsZXM/DQoNCj4gDQo+IFdoYXQgYWJv
dXQgY2FsbGluZyB0aGUgbm9ybWFsIGludGVycnVwdCBpZiBlciBlcnJfaXJxIG9jY3VycywgYXMg
dGhpcw0KPiBmdW5jdGlvbiB3aWxsIHRha2UgY2FyZSBvZiBib3RoIG5vcm1hbCBhbmQgZXJyb3Ig
aW50ZXJydXB0cyBhbnl3YXk/DQoNCkNhbGxpbmcgdGhlIG5vcm1hbCBpbnRlcnJ1cHQgZG9lc24n
dCB3b3JrLg0KDQo+IA0KPiBNYXJjDQo+IA0KPiAtLQ0KPiBQZW5ndXRyb25peCBlLksuICAgICAg
ICAgICAgICAgICAgfCBNYXJjIEtsZWluZS1CdWRkZSAgICAgICAgICAgfA0KPiBJbmR1c3RyaWFs
IExpbnV4IFNvbHV0aW9ucyAgICAgICAgfCBQaG9uZTogKzQ5LTIzMS0yODI2LTkyNCAgICAgfA0K
PiBWZXJ0cmV0dW5nIFdlc3QvRG9ydG11bmQgICAgICAgICAgfCBGYXg6ICAgKzQ5LTUxMjEtMjA2
OTE3LTU1NTUgfA0KPiBBbXRzZ2VyaWNodCBIaWxkZXNoZWltLCBIUkEgMjY4NiAgfCBodHRwOi8v
d3d3LnBlbmd1dHJvbml4LmRlICAgfA0KDQo=
^ permalink raw reply
* Re: [RFC PATCH V3 12/17] powerpc/powernv: implement pcibios_sriov_resource_alignment on powernv
From: Wei Yang @ 2014-06-23 8:21 UTC (permalink / raw)
To: Gavin Shan
Cc: Wei Yang, benh, linux-pci, yan, bhelgaas, qiudayu, linuxppc-dev
In-Reply-To: <20140623060947.GB12055@shangw>
On Mon, Jun 23, 2014 at 04:09:47PM +1000, Gavin Shan wrote:
>On Tue, Jun 10, 2014 at 09:56:34AM +0800, Wei Yang wrote:
>>This patch implements the pcibios_sriov_resource_alignment() on powernv
>>platform.
>>
>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>---
>> arch/powerpc/include/asm/machdep.h | 1 +
>> arch/powerpc/kernel/pci-common.c | 8 ++++++++
>> arch/powerpc/platforms/powernv/pci-ioda.c | 17 +++++++++++++++++
>> 3 files changed, 26 insertions(+)
>>
>>diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
>>index 2f2e770..3bbc55f 100644
>>--- a/arch/powerpc/include/asm/machdep.h
>>+++ b/arch/powerpc/include/asm/machdep.h
>>@@ -242,6 +242,7 @@ struct machdep_calls {
>> resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);
>> #ifdef CONFIG_PCI_IOV
>> resource_size_t (*__pci_sriov_resource_size)(struct pci_dev *, int resno);
>>+ resource_size_t (*__pci_sriov_resource_alignment)(struct pci_dev *, int resno, resource_size_t align);
>> #endif /* CONFIG_PCI_IOV */
>>
>> /* Called to shutdown machine specific hardware not already controlled
>>diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
>>index c4e2e92..35345ac 100644
>>--- a/arch/powerpc/kernel/pci-common.c
>>+++ b/arch/powerpc/kernel/pci-common.c
>>@@ -128,6 +128,14 @@ resource_size_t pcibios_sriov_resource_size(struct pci_dev *pdev, int resno)
>>
>> return 0;
>> }
>>+
>>+resource_size_t pcibios_sriov_resource_alignment(struct pci_dev *pdev, int resno, resource_size_t align)
>>+{
>>+ if (ppc_md.__pci_sriov_resource_alignment)
>>+ return ppc_md.__pci_sriov_resource_alignment(pdev, resno, align);
>>+
>>+ return 0;
>>+}
>> #endif /* CONFIG_PCI_IOV */
>>
>> static resource_size_t pcibios_io_size(const struct pci_controller *hose)
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 7dfad6a..b0ac851 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>@@ -1573,6 +1573,22 @@ static resource_size_t __pnv_pci_sriov_resource_size(struct pci_dev *pdev, int r
>>
>> return size;
>> }
>>+
>>+static resource_size_t __pnv_pci_sriov_resource_alignment(struct pci_dev *pdev, int resno,
>>+ resource_size_t align)
>
>The function could be "pcibios_sriov_resource_alignment()", but it's not a big deal.
>If you prefer the original one, then keep it :)
I guess you want to name it to pnv_pcibios_sriov_resource_alignment()?
pcibios_sriov_resource_alignment() is the general name for this function.
If yes, this is changed.
>
>>+{
>>+ struct pci_dn *pdn = pci_get_pdn(pdev);
>>+ resource_size_t iov_align;
>>+
>>+ iov_align = resource_size(&pdev->resource[resno]);
>>+ if (iov_align)
>>+ return iov_align;
>>+
>>+ if (pdn->vfs)
>>+ return pdn->vfs * align;
>>+
>>+ return align;
>>+}
>> #endif /* CONFIG_PCI_IOV */
>>
>> /* Prevent enabling devices for which we couldn't properly
>>@@ -1777,6 +1793,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
>> ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
>> #ifdef CONFIG_PCI_IOV
>> ppc_md.__pci_sriov_resource_size = __pnv_pci_sriov_resource_size;
>>+ ppc_md.__pci_sriov_resource_alignment = __pnv_pci_sriov_resource_alignment;
>> #endif /* CONFIG_PCI_IOV */
>> pci_add_flags(PCI_REASSIGN_ALL_RSRC);
>>
>
>Thanks,
>Gavin
--
Richard Yang
Help you, Help me
^ permalink raw reply
* Re: Build regressions/improvements in v3.16-rc2
From: Geert Uytterhoeven @ 2014-06-23 8:28 UTC (permalink / raw)
To: linux-kernel@vger.kernel.org; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1403511856-17875-1-git-send-email-geert@linux-m68k.org>
On Mon, Jun 23, 2014 at 10:24 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> JFYI, when comparing v3.16-rc2[1] to v3.16-rc1[3], the summaries are:
> - build errors: +1/-6
+ /scratch/kisskb/src/drivers/edac/ppc4xx_edac.c: error: request for
member 'dimm' in something not a structure or union: => 977:45
powerpc-randconfig
> [1] http://kisskb.ellerman.id.au/kisskb/head/7595/ (all 119 configs)
> [3] http://kisskb.ellerman.id.au/kisskb/head/7575/ (all 119 configs)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH v3 1/2] flexcan: add err_irq handler for flexcan
From: Marc Kleine-Budde @ 2014-06-23 8:31 UTC (permalink / raw)
To: qiang.zhao@freescale.com, linuxppc-dev@lists.ozlabs.org,
linux-can@vger.kernel.org, wg@grandegger.com, Scott Wood
In-Reply-To: <c0ae03364c7946bb8278bf20b03bab90@BLUPR03MB341.namprd03.prod.outlook.com>
[-- Attachment #1: Type: text/plain, Size: 2452 bytes --]
On 06/23/2014 10:15 AM, qiang.zhao@freescale.com wrote:
[...]
>>>>> + reg_esr = flexcan_read(®s->esr);
>>>>> + reg_ctrl = flexcan_read(®s->ctrl);
>>>>> + if (reg_esr & FLEXCAN_ESR_TX_WRN) {
>>>>
>>>> When does the hardware trigger the interrupt?
>>>
>>> When there is no wire link between tx and rx, tx start transfer and
>> doesn’t get the ack.
>>
>> You are testing for the warning interrupt, not for the
>> FLEXCAN_ESR_ACK_ERR (which is triggered there isn't any ACK).
>>
>>>>> + flexcan_write(reg_esr & ~FLEXCAN_ESR_TX_WRN, ®s->esr);
>>>>> + flexcan_write(reg_ctrl & ~FLEXCAN_CTRL_ERR_MSK, ®s->ctrl);
>>>>> + netif_stop_queue(dev);
>>>>
>>>> Why are you stopping the txqueue?
>>>
>>> There is no wire link, tx can't transfer successfully.
>>
>> You are testing for the warning interrupt, which is triggered if the
>> error counter increases from 95 to 96. And the error counter can increase
>> due to several reasons. No link is only one of them. If the CAN core
>> cannot transmit new packages any more the flow control in the driver will
>> take care.
>
> When Tx error counter increases from 95 to 96, there must be issue for tx,
> So why can't I stop the txqueue?
Why do you want to stop the queue? It's compliant with the CAN spec to
keep sending CAN frames if the error counter increases to 96. If there
isn't any problem with the CAN bus anymore, the TX error counters will
decrease with every successfully transmitted CAN frame.
> You said that there are several reasons, would you like to take some examples?
See CAN Error Confinement Rules in
http://www.can-wiki.info/doku.php?id=can_faq_erors
>> What about calling the normal interrupt if er err_irq occurs, as this
>> function will take care of both normal and error interrupts anyway?
>
> Calling the normal interrupt doesn't work.
Why?
flexcan_irq() if FLEXCAN_CTRL_TWRN_MSK is set and will schedule the NAPI
routine:
> if ((reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE) ||
> (reg_esr & FLEXCAN_ESR_ERR_STATE) ||
> flexcan_has_and_handle_berr(priv, reg_esr)) {
[...]
> napi_schedule(&priv->napi);
> }
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Industrial Linux Solutions | Phone: +49-231-2826-924 |
Vertretung West/Dortmund | Fax: +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de |
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 242 bytes --]
^ permalink raw reply
* Re: [RFC PATCH V3 07/17] ppc/pnv: Add function to deconfig a PE
From: Wei Yang @ 2014-06-23 9:07 UTC (permalink / raw)
To: Gavin Shan
Cc: Wei Yang, benh, linux-pci, yan, bhelgaas, qiudayu, linuxppc-dev
In-Reply-To: <20140623052721.GB7223@shangw>
On Mon, Jun 23, 2014 at 03:27:21PM +1000, Gavin Shan wrote:
>On Tue, Jun 10, 2014 at 09:56:29AM +0800, Wei Yang wrote:
>>On PowerNV platform, it will support dynamic PE allocation and deallocation.
>>
>>This patch adds a function to release those resources related to a PE.
>>
>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>---
>> arch/powerpc/platforms/powernv/pci-ioda.c | 77 +++++++++++++++++++++++++++++
>> 1 file changed, 77 insertions(+)
>>
>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>index 8ca3926..87cb3089 100644
>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>@@ -330,6 +330,83 @@ static struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
>> }
>> #endif /* CONFIG_PCI_MSI */
>>
>>+static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>>+{
>
>Richard, it seems that the deconfiguration is incomplete. Something seems
>missed: DMA, IO and MMIO, MSI. If I understand correctly, pnv_ioda_deconfigure_pe()
>won't tear down DMA, IO and MMIO, MSI properly. For MSI/MSIx, it wouldn't
>be a problem as the VF driver should disable them before calling this function.
>
Hmm... the deconfiguration function is the counterpart of the configuration
function, so it will release the resource which are allocated in
configuration. The DMA, IO/MMIO, MSI is not assigned in the configuration
function, so it would not proper to release those resources by this function.
>>+ struct pci_dev *parent;
>>+ uint8_t bcomp, dcomp, fcomp;
>>+ int64_t rc;
>>+ long rid_end, rid;
>
>Blank line needed here to separate variable declaration and logic. And I think
>we won't run into case "if (pe->pbus)" for now. So it's worthy to have some
>comments to explain it for a bit :-)
Ok.
>
>>+ if (pe->pbus) {
>>+ int count;
>>+
>>+ dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER;
>>+ fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER;
>>+ parent = pe->pbus->self;
>>+ if (pe->flags & PNV_IODA_PE_BUS_ALL)
>>+ count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1;
>>+ else
>>+ count = 1;
>>+
>>+ switch(count) {
>>+ case 1: bcomp = OpalPciBusAll; break;
>>+ case 2: bcomp = OpalPciBus7Bits; break;
>>+ case 4: bcomp = OpalPciBus6Bits; break;
>>+ case 8: bcomp = OpalPciBus5Bits; break;
>>+ case 16: bcomp = OpalPciBus4Bits; break;
>>+ case 32: bcomp = OpalPciBus3Bits; break;
>>+ default:
>>+ pr_err("%s: Number of subordinate busses %d"
>>+ " unsupported\n",
>>+ pci_name(pe->pbus->self), count);
>
>I guess it's not safe to do "pci_name(pe->pbus->self)" root root bus.
>
Ok, so there is a bug in the original code, will fix this.
>>+ /* Do an exact match only */
>>+ bcomp = OpalPciBusAll;
>>+ }
>>+ rid_end = pe->rid + (count << 8);
>>+ }else {
>
> } else {
>
>>+ parent = pe->pdev->bus->self;
>>+ bcomp = OpalPciBusAll;
>>+ dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER;
>>+ fcomp = OPAL_COMPARE_RID_FUNCTION_NUMBER;
>>+ rid_end = pe->rid + 1;
>>+ }
>>+
>>+ /* Disable MVT on IODA1 */
>>+ if (phb->type == PNV_PHB_IODA1) {
>>+ rc = opal_pci_set_mve_enable(phb->opal_id,
>>+ pe->mve_number, OPAL_DISABLE_MVE);
>>+ if (rc) {
>>+ pe_err(pe, "OPAL error %ld enabling MVE %d\n",
>>+ rc, pe->mve_number);
>>+ pe->mve_number = -1;
>>+ }
>>+ }
>>+ /* Clear the reverse map */
>>+ for (rid = pe->rid; rid < rid_end; rid++)
>>+ phb->ioda.pe_rmap[rid] = 0;
>>+
>>+ /* Release from all parents PELT-V */
>>+ while (parent) {
>>+ struct pci_dn *pdn = pci_get_pdn(parent);
>>+ if (pdn && pdn->pe_number != IODA_INVALID_PE) {
>>+ rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number,
>>+ pe->pe_number, OPAL_REMOVE_PE_FROM_DOMAIN);
>>+ /* XXX What to do in case of error ? */
>>+ }
>>+ parent = parent->bus->self;
>>+ }
>
>It seems that you missed removing the PE from its own PELTV, which was
>introduced by commit 631ad69 ("powerpc/powernv: Add PE to its own PELTV").
>
Sounds correct, this is missed.
>>+
>>+ /* Dissociate PE in PELT */
>>+ rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid,
>>+ bcomp, dcomp, fcomp, OPAL_UNMAP_PE);
>>+ if (rc)
>>+ pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc);
>>+
>>+ pe->pbus = NULL;
>>+ pe->pdev = NULL;
>>+
>>+ return 0;
>>+}
>>+
>> static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
>> {
>> struct pci_dev *parent;
>
>Thanks,
>Gavin
--
Richard Yang
Help you, Help me
^ permalink raw reply
* Re: [PATCH] fsl-rio: add support for mapping inbound windows
From: Martijn de Gouw @ 2014-06-23 13:57 UTC (permalink / raw)
To: Bounine, Alexandre
Cc: scottwood@freescale.com, stef.van.os@prodrive-technologies.com,
Martijn de Gouw, linuxppc-dev@lists.ozlabs.org, Wood, Barry
In-Reply-To: <8D983423E7EDF846BB3056827B8CC5D15CC9575C@corpmail1.na.ads.idt.com>
On 06/18/2014 05:17 PM, Bounine, Alexandre wrote:
> On Friday, June 13, 2014 7:09 AM Martijn de Gouw [mailto:martijn.de.gouw@prodrive-
> technologies.com] wrote:
>
>> Add support for mapping and unmapping of inbound rapidio windows.
>>
>> Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive.nl>
>> ---
> ... skip ...
>
>> +
>> +int fsl_map_inb_mem(struct rio_mport *mport, dma_addr_t lstart,
>> + u64 rstart, u32 size, u32 flags)
>> +{
>> + struct rio_priv *priv = mport->priv;
>> + u32 base_size;
>> + unsigned int base_size_log;
>> + u64 win_start, win_end;
>> + u32 riwar;
>> + int i;
>> +
>> + base_size_log = __ilog2(size) + ((size & (size - 1)) != 0);
>> + base_size = 1 << base_size_log;
>> +
>> + for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
>> + riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
>> + if ((riwar & RIWAR_ENABLE) == 0)
>> + break;
>> + /* check conflicting ranges */
>> + win_start = ((u64)(in_be32(&priv->inb_atmu_regs[i].riwbar) & RIWBAR_BADD_MASK))
>> + << RIWBAR_BADD_VAL_SHIFT;
>> + win_end = win_start + ((1 << ((riwar & RIWAR_SIZE_MASK) + 1)) - 1);
>> + if (rstart < win_end && (rstart + size) > win_start)
>> + return -EINVAL;
>> + }
>
> It looks like the check for conflicting ranges assumes sequential mapping requests only.
> This check will be missed if ATMU windows are dynamically mapped/unmapped out-of-order.
> Because the unmap callback is implemented please consider possibility of using ATMU windows
> in any order.
>
You are correct. I'll send a new patch which first check all enabled
windows for conflicts, before is searches for a free ATMU.
--
Martijn de Gouw
Engineer
Prodrive Technologies B.V.
Mobile: +31 63 17 76 161
Phone: +31 40 26 76 200
^ permalink raw reply
* [PATCH v2] fsl-rio: add support for mapping inbound windows
From: Martijn de Gouw @ 2014-06-23 14:11 UTC (permalink / raw)
To: Alexandre.Bounine
Cc: Martijn de Gouw, Martijn de Gouw, Barry.Wood, scottwood,
stef.van.os, linuxppc-dev
From: Martijn de Gouw <martijn.de.gouw@prodrive.nl>
Add support for mapping and unmapping of inbound rapidio windows.
Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive-technologies.com>
---
arch/powerpc/sysdev/fsl_rio.c | 92 +++++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_rio.h | 12 ++++++
2 files changed, 104 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index cf2b084..02fe69b 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -58,6 +58,19 @@
#define RIO_ISR_AACR 0x10120
#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
+#define RIWTAR_TRAD_VAL_SHIFT 12
+#define RIWTAR_TRAD_MASK 0x00FFFFFF
+#define RIWBAR_BADD_VAL_SHIFT 12
+#define RIWBAR_BADD_MASK 0x003FFFFF
+#define RIWAR_ENABLE 0x80000000
+#define RIWAR_TGINT_LOCAL 0x00F00000
+#define RIWAR_RDTYP_NO_SNOOP 0x00040000
+#define RIWAR_RDTYP_SNOOP 0x00050000
+#define RIWAR_WRTYP_NO_SNOOP 0x00004000
+#define RIWAR_WRTYP_SNOOP 0x00005000
+#define RIWAR_WRTYP_ALLOC 0x00006000
+#define RIWAR_SIZE_MASK 0x0000003F
+
#define __fsl_read_rio_config(x, addr, err, op) \
__asm__ __volatile__( \
"1: "op" %1,0(%2)\n" \
@@ -266,6 +279,80 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
return 0;
}
+static void fsl_rio_inbound_mem_init(struct rio_priv *priv)
+{
+ int i;
+
+ /* close inbound windows */
+ for (i = 0; i < RIO_INB_ATMU_COUNT; i++)
+ out_be32(&priv->inb_atmu_regs[i].riwar, 0);
+}
+
+int fsl_map_inb_mem(struct rio_mport *mport, dma_addr_t lstart,
+ u64 rstart, u32 size, u32 flags)
+{
+ struct rio_priv *priv = mport->priv;
+ u32 base_size;
+ unsigned int base_size_log;
+ u64 win_start, win_end;
+ u32 riwar;
+ int i;
+
+ base_size_log = __ilog2(size) + ((size & (size - 1)) != 0);
+ base_size = 1 << base_size_log;
+
+ /* check for conflicting ranges */
+ for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
+ riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
+ if ((riwar & RIWAR_ENABLE) == 0)
+ continue;
+ win_start = ((u64)(in_be32(&priv->inb_atmu_regs[i].riwbar) & RIWBAR_BADD_MASK))
+ << RIWBAR_BADD_VAL_SHIFT;
+ win_end = win_start + ((1 << ((riwar & RIWAR_SIZE_MASK) + 1)) - 1);
+ if (rstart < win_end && (rstart + size) > win_start)
+ return -EINVAL;
+ }
+
+ /* find unused atmu */
+ for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
+ riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
+ if ((riwar & RIWAR_ENABLE) == 0)
+ break;
+ }
+ if (i >= RIO_INB_ATMU_COUNT)
+ return -ENOMEM;
+
+ out_be32(&priv->inb_atmu_regs[i].riwtar, lstart >> RIWTAR_TRAD_VAL_SHIFT);
+ out_be32(&priv->inb_atmu_regs[i].riwbar, rstart >> RIWBAR_BADD_VAL_SHIFT);
+ out_be32(&priv->inb_atmu_regs[i].riwar, RIWAR_ENABLE | RIWAR_TGINT_LOCAL |
+ RIWAR_RDTYP_SNOOP | RIWAR_WRTYP_SNOOP | (base_size_log - 1));
+
+ return 0;
+}
+
+void fsl_unmap_inb_mem(struct rio_mport *mport, dma_addr_t lstart)
+{
+ u32 win_start_shift, base_start_shift;
+ struct rio_priv *priv = mport->priv;
+ u32 riwar, riwtar;
+ int i;
+
+ /* skip default window */
+ base_start_shift = lstart >> RIWTAR_TRAD_VAL_SHIFT;
+ for (i = 0; i < RIO_INB_ATMU_COUNT; i++) {
+ riwar = in_be32(&priv->inb_atmu_regs[i].riwar);
+ if ((riwar & RIWAR_ENABLE) == 0)
+ continue;
+
+ riwtar = in_be32(&priv->inb_atmu_regs[i].riwtar);
+ win_start_shift = riwtar & RIWTAR_TRAD_MASK;
+ if (win_start_shift == base_start_shift) {
+ out_be32(&priv->inb_atmu_regs[i].riwar, riwar & ~RIWAR_ENABLE);
+ return;
+ }
+ }
+}
+
void fsl_rio_port_error_handler(int offset)
{
/*XXX: Error recovery is not implemented, we just clear errors */
@@ -389,6 +476,8 @@ int fsl_rio_setup(struct platform_device *dev)
ops->add_outb_message = fsl_add_outb_message;
ops->add_inb_buffer = fsl_add_inb_buffer;
ops->get_inb_message = fsl_get_inb_message;
+ ops->map_inb = fsl_map_inb_mem;
+ ops->unmap_inb = fsl_unmap_inb_mem;
rmu_node = of_parse_phandle(dev->dev.of_node, "fsl,srio-rmu-handle", 0);
if (!rmu_node)
@@ -598,6 +687,8 @@ int fsl_rio_setup(struct platform_device *dev)
RIO_ATMU_REGS_PORT2_OFFSET));
priv->maint_atmu_regs = priv->atmu_regs + 1;
+ priv->inb_atmu_regs = (struct rio_inb_atmu_regs *)
+ (priv->regs_win + RIO_INB_ATMU_REGS_OFFSET);
/* Set to receive any dist ID for serial RapidIO controller. */
if (port->phy_type == RIO_PHY_SERIAL)
@@ -616,6 +707,7 @@ int fsl_rio_setup(struct platform_device *dev)
rio_law_start = range_start;
fsl_rio_setup_rmu(port, rmu_np[i]);
+ fsl_rio_inbound_mem_init(priv);
dbell->mport[i] = port;
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
index ae8e274..dad17f9 100644
--- a/arch/powerpc/sysdev/fsl_rio.h
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -50,9 +50,11 @@
#define RIO_S_DBELL_REGS_OFFSET 0x13400
#define RIO_S_PW_REGS_OFFSET 0x134e0
#define RIO_ATMU_REGS_DBELL_OFFSET 0x10C40
+#define RIO_INB_ATMU_REGS_OFFSET 0x10d60
#define MAX_MSG_UNIT_NUM 2
#define MAX_PORT_NUM 4
+#define RIO_INB_ATMU_COUNT 4
struct rio_atmu_regs {
u32 rowtar;
@@ -63,6 +65,15 @@ struct rio_atmu_regs {
u32 pad2[3];
};
+struct rio_inb_atmu_regs {
+ u32 riwtar;
+ u32 pad1;
+ u32 riwbar;
+ u32 pad2;
+ u32 riwar;
+ u32 pad3[3];
+};
+
struct rio_dbell_ring {
void *virt;
dma_addr_t phys;
@@ -99,6 +110,7 @@ struct rio_priv {
void __iomem *regs_win;
struct rio_atmu_regs __iomem *atmu_regs;
struct rio_atmu_regs __iomem *maint_atmu_regs;
+ struct rio_inb_atmu_regs __iomem *inb_atmu_regs;
void __iomem *maint_win;
void *rmm_handle; /* RapidIO message manager(unit) Handle */
};
--
1.7.10.4
^ permalink raw reply related
* Re: OF_DYNAMIC node lifecycle
From: Grant Likely @ 2014-06-23 14:48 UTC (permalink / raw)
To: Nathan Fontenot, Tyrel Datwyler
Cc: devicetree@vger.kernel.org, Pantelis Antoniou, linuxppc-dev
In-Reply-To: <53A30117.3010100@austin.ibm.com>
On Thu, 19 Jun 2014 10:26:15 -0500, Nathan Fontenot <nfont@austin.ibm.com> wrote:
> On 06/18/2014 03:07 PM, Grant Likely wrote:
> > Hi Nathan and Tyrel,
> >
> > I'm looking into lifecycle issues on nodes modified by OF_DYNAMIC, and
> > I'm hoping you can help me. Right now, pseries seems to be the only
> > user of OF_DYNAMIC, but making OF_DYNAMIC work has a huge impact on
> > the entire kernel because it requires all DT code to manage reference
> > counting with iterating over nodes. Most users simply get it wrong.
> > Pantelis did some investigation and found that the reference counts on
> > a running kernel are all over the place. I have my doubts that any
> > code really gets it right.
> >
> > The problem is that users need to know when it is appropriate to call
> > of_node_get()/of_node_put(). All list traversals that exit early need
> > an extra call to of_node_put(), and code that is searching for a node
> > in the tree and holding a reference to it needs to call of_node_get().
> >
> > I've got a few pseries questions:
> > - What are the changes being requested by pseries firmware? Is it only
> > CPUs and memory nodes, or does it manipulate things all over the tree?
>
> The short answer, everything.
:-)
> For pseries the two big actions that can change the device tree are
> adding/removing resources and partition migration.
>
> The most frequent updates to the device tree happen during resource
> (cpu, memory, and pci/phb) add and remove. During this process we add
> and remove the node and its properties from the device tree.
> - For memory on newer systems this just involves updating the
> ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory property. Older
> firmware levels add and remove the memroy@XXX nodes and their properties.
> - For cpus the cpus/PowerPC,POWERXXXX nodes and its properties are added
> or removed
> - For pci/phb the pci@XXXXX nodes and properties are added/removed.
>
> The less frequent operation of live partition migration (and suspend/resume)
> can update just about anything in the device tree. When this occurs and the
> systems starts after being migrated (or waking up after a suspend) we make
> a call to firmware to get updates to the device tree for the new hardware
> we are running on.
>
> > - How frequent are the changes? How many changes would be likely over
> > the runtime of the system?
>
> This can happen frequently.
Thanks, that is exactly the information that I want. I'm not so much
concerned with the addition or removal of nodes/properties, which is
actually pretty easy to handle. It is the lifecycle of allocations on
dynamic nodes that causes heartburn.
> > - Are you able to verify that removed nodes are actually able to be
> > freed correctly? Do you have any testcases for node removal?
>
> I have always tested this by doing resource add/remove, usually cpu and memory
> since it is the easiest.
Is that just testing the functionality, or do you have tests that check
if the memory gets freed?
> > I'm thinking very seriously about changing the locking semantics of DT
> > code entirely so that most users never have to worry about
> > of_node_get/put at all. If the DT code is switched to use rcu
> > primitives for tree iteration (which also means making DT code use
> > list_head, something I'm already investigating), then instead of
> > trying to figure out of_node_get/put rules, callers could use
> > rcu_read_lock()/rcu_read_unlock() to protect the region that is
> > searching over nodes, and only call of_node_get() if the node pointer
> > is needed outside the rcu read-side lock.
> >
>
> This sounds good. I like just taking the rcu lock around accessing the DT.
> Do we have many places where DT node pointers are held that require
> keeping the of_node_get/put calls? If this did exist perhaps we could
> update those places to look up the DT node every time instead of
> holding on to the pointer. We could just get rid of the reference counting
> altogether then.
There are a few, but I would be happy to restrict reference counting to
only those locations. Most places will decode the DT data, and then
throw away the reference. We /might/ even be able to do rcu_lock/unlock
around the entire probe path which would make it transparent to all
device drivers.
> > I'd really like to be rid of the node reference counting entirely, but
> > I can't figure out a way of doing that safely, so I'd settle for
> > making it a lot easier to get correct.
> >
>
> heh! I have often thought about adding reference counting to device tree
> properties.
You horrible, horrible man.
> I don't really want to but there are some properties that can
> get updated frequently (namely the one mentioned above for memory) that
> can also get pretty big, especially on systems with a lot of memory. We
> never free the memory for old versions of a device tree property. This is
> a pretty minor issue though and probably best suited for a separate
> discussion after resolving this.
We might be able to do some in-place modification of properties if the
size of the property doesn't change. That still leaves some nasty
lifecycle issues that need to be resolved though. It would require
swapping back and forth between memory for an old copy of the property
and a new one. Yes, this should be a separate discussion.
>
> Other than pseries, who else does dynamic device tree updating? Are we the
> only ones?
Right now you're the only ones. Pantelis has a series that adds bulk
changes to the device tree which are also removable (called overlays). I
also have a GSoC student working on the selftest code which will
dynamically add testcase data to the tree.
g.
^ permalink raw reply
* Re: OF_DYNAMIC node lifecycle
From: Grant Likely @ 2014-06-23 14:58 UTC (permalink / raw)
To: Pantelis Antoniou
Cc: devicetree, Steven Rostedt, linuxppc-dev, Tyrel Datwyler,
Thomas Gleixner
In-Reply-To: <43898B58-2EA7-42B5-A17A-27F16F2618A6@konsulko.com>
On Thu, 19 Jun 2014 11:33:20 +0300, Pantelis Antoniou <pantelis.antoniou@konsulko.com> wrote:
> Hi Grant,
>
> CCing Thomas Gleixner & Steven Rostedt, since they might have a few
> ideas...
>
> On Jun 18, 2014, at 11:07 PM, Grant Likely wrote:
>
> > Hi Nathan and Tyrel,
> >
> > I'm looking into lifecycle issues on nodes modified by OF_DYNAMIC, and
> > I'm hoping you can help me. Right now, pseries seems to be the only
> > user of OF_DYNAMIC, but making OF_DYNAMIC work has a huge impact on
> > the entire kernel because it requires all DT code to manage reference
> > counting with iterating over nodes. Most users simply get it wrong.
> > Pantelis did some investigation and found that the reference counts on
> > a running kernel are all over the place. I have my doubts that any
> > code really gets it right.
> >
> > The problem is that users need to know when it is appropriate to call
> > of_node_get()/of_node_put(). All list traversals that exit early need
> > an extra call to of_node_put(), and code that is searching for a node
> > in the tree and holding a reference to it needs to call of_node_get().
> >
>
> In hindsight it appears that drivers just can't get the lifecycle right.
> So we need to simplify things.
>
> > I've got a few pseries questions:
> > - What are the changes being requested by pseries firmware? Is it only
> > CPUs and memory nodes, or does it manipulate things all over the tree?
> > - How frequent are the changes? How many changes would be likely over
> > the runtime of the system?
> > - Are you able to verify that removed nodes are actually able to be
> > freed correctly? Do you have any testcases for node removal?
> >
> > I'm thinking very seriously about changing the locking semantics of DT
> > code entirely so that most users never have to worry about
> > of_node_get/put at all. If the DT code is switched to use rcu
> > primitives for tree iteration (which also means making DT code use
> > list_head, something I'm already investigating), then instead of
> > trying to figure out of_node_get/put rules, callers could use
> > rcu_read_lock()/rcu_read_unlock() to protect the region that is
> > searching over nodes, and only call of_node_get() if the node pointer
> > is needed outside the rcu read-side lock.
> >
> > I'd really like to be rid of the node reference counting entirely, but
> > I can't figure out a way of doing that safely, so I'd settle for
> > making it a lot easier to get correct.
> >
>
> Since we're going about changing things, how about that devtree_lock?
I believe rcu would pretty much eliminate the devtree_lock entirely. All
modifiers would need to grab a mutex to ensure there is only one writer
at any given time, but readers would have free reign to parse the tree
however they like.
DT writers would have to follow some strict rules about how to handle
nodes that are removed (ie. don't modify or of_node_put() them until
after rcu is syncronized), but the number of writers is very small and
we have control of all of them.
> We're using a raw_spinlock and we're always taking the lock with
> interrupts disabled.
>
> If we're going to make DT changes frequently during normal runtime
> and not only during boot time, those are bad for any kind of real-time
> performance.
>
> So the question is, do we really have code that access the live tree
> during atomic sections? Is that something we want? Enforcing this
> will make our lives easier, and we'll get the change to replace
> that spinlock with a mutex.
Yes, I believe the powerpc CPU hotplug code accesses the DT in atomic
sections. I cannot put my finger on the exact code however. Nathan might
know better. But, if I'm right, the whole problem goes away with RCU.
The design with RCU is to switch struct device_node and struct property
to use list_head and/or hlist_head with the _rcu accessors. They allow
items to be removed from a list without syncronizing with readers. Right
now we have two lists that need to be modified; the allnodes list and
the sibling list. I *think* it will be fine for the two list removals to
be non-atomic (there will be a brief period where the node can be found
on one list, but not the other) because it is a transient state already
accounted for in rcu read-side critical region.
That said, I've also got a design to remove the allnodes list entirely
and only work with the sibling list. I need to prototype this.
We'll also need a transition plan to move to RCU. I think the existing
iterators can be modified to do the rcu locking in-line, but still require
the of_node_get/put stuff (basically, so existing code continue to works
unchanged). Then we can add _rcu versions that drop the need for
of_node_get/put(). When everything is converted, the old iterators can
be dropped.
g.
^ permalink raw reply
* Re: OF_DYNAMIC node lifecycle
From: Pantelis Antoniou @ 2014-06-23 15:26 UTC (permalink / raw)
To: Grant Likely
Cc: devicetree, Steven Rostedt, linuxppc-dev, Tyrel Datwyler,
Thomas Gleixner
In-Reply-To: <20140623145844.DA6A3C40AE5@trevor.secretlab.ca>
Hi Grant,
On Jun 23, 2014, at 5:58 PM, Grant Likely wrote:
> On Thu, 19 Jun 2014 11:33:20 +0300, Pantelis Antoniou =
<pantelis.antoniou@konsulko.com> wrote:
>> Hi Grant,
>>=20
>> CCing Thomas Gleixner & Steven Rostedt, since they might have a few
>> ideas...
>>=20
>> On Jun 18, 2014, at 11:07 PM, Grant Likely wrote:
>>=20
>>> Hi Nathan and Tyrel,
>>>=20
>>> I'm looking into lifecycle issues on nodes modified by OF_DYNAMIC, =
and
>>> I'm hoping you can help me. Right now, pseries seems to be the only
>>> user of OF_DYNAMIC, but making OF_DYNAMIC work has a huge impact on
>>> the entire kernel because it requires all DT code to manage =
reference
>>> counting with iterating over nodes. Most users simply get it wrong.
>>> Pantelis did some investigation and found that the reference counts =
on
>>> a running kernel are all over the place. I have my doubts that any
>>> code really gets it right.
>>>=20
>>> The problem is that users need to know when it is appropriate to =
call
>>> of_node_get()/of_node_put(). All list traversals that exit early =
need
>>> an extra call to of_node_put(), and code that is searching for a =
node
>>> in the tree and holding a reference to it needs to call =
of_node_get().
>>>=20
>>=20
>> In hindsight it appears that drivers just can't get the lifecycle =
right.
>> So we need to simplify things.
>>=20
>>> I've got a few pseries questions:
>>> - What are the changes being requested by pseries firmware? Is it =
only
>>> CPUs and memory nodes, or does it manipulate things all over the =
tree?
>>> - How frequent are the changes? How many changes would be likely =
over
>>> the runtime of the system?
>>> - Are you able to verify that removed nodes are actually able to be
>>> freed correctly? Do you have any testcases for node removal?
>>>=20
>>> I'm thinking very seriously about changing the locking semantics of =
DT
>>> code entirely so that most users never have to worry about
>>> of_node_get/put at all. If the DT code is switched to use rcu
>>> primitives for tree iteration (which also means making DT code use
>>> list_head, something I'm already investigating), then instead of
>>> trying to figure out of_node_get/put rules, callers could use
>>> rcu_read_lock()/rcu_read_unlock() to protect the region that is
>>> searching over nodes, and only call of_node_get() if the node =
pointer
>>> is needed outside the rcu read-side lock.
>>>=20
>>> I'd really like to be rid of the node reference counting entirely, =
but
>>> I can't figure out a way of doing that safely, so I'd settle for
>>> making it a lot easier to get correct.
>>>=20
>>=20
>> Since we're going about changing things, how about that devtree_lock?
>=20
> I believe rcu would pretty much eliminate the devtree_lock entirely. =
All
> modifiers would need to grab a mutex to ensure there is only one =
writer
> at any given time, but readers would have free reign to parse the tree
> however they like.
>=20
> DT writers would have to follow some strict rules about how to handle
> nodes that are removed (ie. don't modify or of_node_put() them until
> after rcu is syncronized), but the number of writers is very small and
> we have control of all of them.
>=20
There's one final nitpick with transactions; we might need another=20
node/property flag marking the 'in-progress' state so that
can be skipped by iterators, but in general this looks good.
>> We're using a raw_spinlock and we're always taking the lock with
>> interrupts disabled.
>>=20
>> If we're going to make DT changes frequently during normal runtime
>> and not only during boot time, those are bad for any kind of =
real-time
>> performance.
>>=20
>> So the question is, do we really have code that access the live tree
>> during atomic sections? Is that something we want? Enforcing this
>> will make our lives easier, and we'll get the change to replace
>> that spinlock with a mutex.
>=20
> Yes, I believe the powerpc CPU hotplug code accesses the DT in atomic
> sections. I cannot put my finger on the exact code however. Nathan =
might
> know better. But, if I'm right, the whole problem goes away with RCU.
>=20
This is just bad. Why would you need to that?
> The design with RCU is to switch struct device_node and struct =
property
> to use list_head and/or hlist_head with the _rcu accessors. They allow
> items to be removed from a list without syncronizing with readers. =
Right
> now we have two lists that need to be modified; the allnodes list and
> the sibling list. I *think* it will be fine for the two list removals =
to
> be non-atomic (there will be a brief period where the node can be =
found
> on one list, but not the other) because it is a transient state =
already
> accounted for in rcu read-side critical region.
>=20
See above about transient states.
> That said, I've also got a design to remove the allnodes list entirely
> and only work with the sibling list. I need to prototype this.
>=20
In my original patchset for the overlays I used a single node as a root
and didn't deal with allnodes at all. So it can definitely can work.
> We'll also need a transition plan to move to RCU. I think the existing
> iterators can be modified to do the rcu locking in-line, but still =
require
> the of_node_get/put stuff (basically, so existing code continue to =
works
> unchanged). Then we can add _rcu versions that drop the need for
> of_node_get/put(). When everything is converted, the old iterators can
> be dropped.
>=20
Eventually yes. We're not close to that yet. I'd be happy if we get the=20=
lifecycle issues fixed right now (with of_node_get/put) and plan ahead.
I am sure we missed a few things, which we will come across.
> g.
Regards
-- Pantelis
^ permalink raw reply
* Re: [PATCH 1/3] PCI/MSI: Add pci_enable_msi_partial()
From: Alexander Gordeev @ 2014-06-23 20:11 UTC (permalink / raw)
To: linux-kernel, Bjorn Helgaas
Cc: linux-mips, linux-s390, linux-pci, x86, linux-doc, linux-ide,
iommu, xen-devel, linuxppc-dev
In-Reply-To: <4fef62a2e647a7c38e9f2a1ea4244b3506a85e2b.1402405331.git.agordeev@redhat.com>
Hi Bjorn,
Any feedback?
Thanks!
--
Regards,
Alexander Gordeev
agordeev@redhat.com
^ permalink raw reply
* Re: OF_DYNAMIC node lifecycle
From: Grant Likely @ 2014-06-23 20:21 UTC (permalink / raw)
To: Pantelis Antoniou
Cc: devicetree, Steven Rostedt, linuxppc-dev, Tyrel Datwyler,
Thomas Gleixner
In-Reply-To: <5213060A-74FB-4CD6-BF1C-4B7DCA98BE51@konsulko.com>
On Mon, 23 Jun 2014 18:26:04 +0300, Pantelis Antoniou <pantelis.antoniou@konsulko.com> wrote:
> On Jun 23, 2014, at 5:58 PM, Grant Likely wrote:
> > We'll also need a transition plan to move to RCU. I think the existing
> > iterators can be modified to do the rcu locking in-line, but still require
> > the of_node_get/put stuff (basically, so existing code continue to works
> > unchanged). Then we can add _rcu versions that drop the need for
> > of_node_get/put(). When everything is converted, the old iterators can
> > be dropped.
> >
>
> Eventually yes. We're not close to that yet. I'd be happy if we get the
> lifecycle issues fixed right now (with of_node_get/put) and plan ahead.
> I am sure we missed a few things, which we will come across.
If we agree on the plan to keep of_node_get/put, but strongly reduce the
usage by switching to RCU, then I'm generally okay with proceeding with
the overlay feature because I can see how it would work in the new
model.
g.
^ permalink raw reply
* Re: [PATCH v1 1/3] powerpc/powernv: Sync header with firmware
From: Benjamin Herrenschmidt @ 2014-06-23 21:10 UTC (permalink / raw)
To: Gavin Shan; +Cc: aik, qiudayu, linuxppc-dev, agraf, kvm-ppc
In-Reply-To: <1403489682-14841-2-git-send-email-gwshan@linux.vnet.ibm.com>
On Mon, 2014-06-23 at 12:14 +1000, Gavin Shan wrote:
> The patch synchronizes firmware header file (opal.h) for PCI error
> injection
The FW API you expose is not PCI specific. I haven't seen the
corresponding FW patches yet but I'm not fan of that single call
that collates unrelated things.
I much'd prefer see a opal_pci_err_inject that is specific to
IO(D)A errors, which takes a PHB ID and goes via the normal dispatch
to PHB ops inside OPAL. For the rest, especially core specific
injections, we can provide a separate dedicated call.
Cheers,
Ben.
> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/opal.h | 65 ++++++++++++++++++++++++++
> arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
> 2 files changed, 66 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
> index 66ad7a7..d982bb8 100644
> --- a/arch/powerpc/include/asm/opal.h
> +++ b/arch/powerpc/include/asm/opal.h
> @@ -175,6 +175,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
> #define OPAL_SET_PARAM 90
> #define OPAL_DUMP_RESEND 91
> #define OPAL_DUMP_INFO2 94
> +#define OPAL_ERR_INJECT 96
>
> #ifndef __ASSEMBLY__
>
> @@ -219,6 +220,69 @@ enum OpalPciErrorSeverity {
> OPAL_EEH_SEV_INF = 5
> };
>
> +enum OpalErrinjctType {
> + OpalErrinjctTypeFirst = 0,
> + OpalErrinjctTypeFatal = 1,
> + OpalErrinjctTypeRecoverRandomEvent = 2,
> + OpalErrinjctTypeRecoverSpecialEvent = 3,
> + OpalErrinjctTypeCorruptedPage = 4,
> + OpalErrinjctTypeCorruptedSlb = 5,
> + OpalErrinjctTypeTranslatorFailure = 6,
> + OpalErrinjctTypeIoaBusError = 7,
> + OpalErrinjctTypeIoaBusError64 = 8,
> + OpalErrinjctTypePlatformSpecific = 9,
> + OpalErrinjctTypeDcacheStart = 10,
> + OpalErrinjctTypeDcacheEnd = 11,
> + OpalErrinjctTypeIcacheStart = 12,
> + OpalErrinjctTypeIcacheEnd = 13,
> + OpalErrinjctTypeTlbStart = 14,
> + OpalErrinjctTypeTlbEnd = 15,
> + OpalErrinjctTypeUpstreamIoError = 16,
> + OpalErrinjctTypeLast = 17,
> +
> + /* IoaBusError & IoaBusError64 */
> + OpalEitIoaLoadMemAddr = 0,
> + OpalEitIoaLoadMemData = 1,
> + OpalEitIoaLoadIoAddr = 2,
> + OpalEitIoaLoadIoData = 3,
> + OpalEitIoaLoadConfigAddr = 4,
> + OpalEitIoaLoadConfigData = 5,
> + OpalEitIoaStoreMemAddr = 6,
> + OpalEitIoaStoreMemData = 7,
> + OpalEitIoaStoreIoAddr = 8,
> + OpalEitIoaStoreIoData = 9,
> + OpalEitIoaStoreConfigAddr = 10,
> + OpalEitIoaStoreConfigData = 11,
> + OpalEitIoaDmaReadMemAddr = 12,
> + OpalEitIoaDmaReadMemData = 13,
> + OpalEitIoaDmaReadMemMaster = 14,
> + OpalEitIoaDmaReadMemTarget = 15,
> + OpalEitIoaDmaWriteMemAddr = 16,
> + OpalEitIoaDmaWriteMemData = 17,
> + OpalEitIoaDmaWriteMemMaster = 18,
> + OpalEitIoaDmaWriteMemTarget = 19,
> +};
> +
> +struct OpalErrinjct {
> + int32_t type;
> + union {
> + struct {
> + uint32_t addr;
> + uint32_t mask;
> + uint64_t phb_id;
> + uint32_t pe;
> + uint32_t function;
> + } ioa;
> + struct {
> + uint64_t addr;
> + uint64_t mask;
> + uint64_t phb_id;
> + uint32_t pe;
> + uint32_t function;
> + } ioa64;
> + };
> +};
> +
> enum OpalShpcAction {
> OPAL_SHPC_GET_LINK_STATE = 0,
> OPAL_SHPC_GET_SLOT_STATE = 1
> @@ -870,6 +934,7 @@ int64_t opal_update_flash(uint64_t blk_list);
> int64_t opal_dump_init(uint8_t dump_type);
> int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
> int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
> +int64_t opal_err_injct(struct OpalErrinjct *ei);
> int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
> int64_t opal_dump_ack(uint32_t dump_id);
> int64_t opal_dump_resend_notification(void);
> diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
> index f531ffe..44b3d81 100644
> --- a/arch/powerpc/platforms/powernv/opal-wrappers.S
> +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
> @@ -136,6 +136,7 @@ OPAL_CALL(opal_resync_timebase, OPAL_RESYNC_TIMEBASE);
> OPAL_CALL(opal_dump_init, OPAL_DUMP_INIT);
> OPAL_CALL(opal_dump_info, OPAL_DUMP_INFO);
> OPAL_CALL(opal_dump_info2, OPAL_DUMP_INFO2);
> +OPAL_CALL(opal_err_injct, OPAL_ERR_INJECT);
> OPAL_CALL(opal_dump_read, OPAL_DUMP_READ);
> OPAL_CALL(opal_dump_ack, OPAL_DUMP_ACK);
> OPAL_CALL(opal_get_msg, OPAL_GET_MSG);
^ permalink raw reply
* Re: [PATCH v1 2/3] powerpc/powernv: Support PCI error injection
From: Benjamin Herrenschmidt @ 2014-06-23 21:05 UTC (permalink / raw)
To: Gavin Shan; +Cc: aik, qiudayu, linuxppc-dev, agraf, kvm-ppc
In-Reply-To: <1403489682-14841-3-git-send-email-gwshan@linux.vnet.ibm.com>
On Mon, 2014-06-23 at 12:14 +1000, Gavin Shan wrote:
> The patch implements one OPAL firmware sysfs file to support PCI error
> injection: "/sys/firmware/opal/errinjct", which will be used like the
> way described as follows.
>
> According to PAPR spec, there are 3 RTAS calls related to error injection:
> "ibm,open-errinjct": allocate token prior to doing error injection.
> "ibm,close-errinjct": release the token allocated from "ibm,open-errinjct".
> "ibm,errinjct": do error injection.
>
> Sysfs file /sys/firmware/opal/errinjct accepts strings that have fixed
> format "ei_token ...". For now, we only support 32-bits and 64-bits
> PCI error injection and they should have following strings written to
> /sys/firmware/opal/errinjct as follows. We don't have corresponding
> sysfs files for "ibm,open-errinjct" and "ibm,close-errinjct", which
> means that we rely on userland to maintain the token by itself.
Should we instead look into adding a file in the existing sysfs
directory of the specific PHB ?
Cheers,
Ben.
> 32-bits PCI error: "7:addr:mask:iommu_group_id:function".
> 64-bits PCI error: "8:addr:mask:iommu_group_id:function".
>
> The above "7" and "8" represent 32-bits and 64-bits PCI error seperately
> and "function" is one of the specific PCI errors (e.g. MMIO access address
> parity error), which are defined by PAPR spec.
>
> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/opal.h | 1 +
> arch/powerpc/platforms/powernv/Makefile | 2 +-
> arch/powerpc/platforms/powernv/opal-errinjct.c | 184 +++++++++++++++++++++++++
> arch/powerpc/platforms/powernv/opal.c | 2 +
> 4 files changed, 188 insertions(+), 1 deletion(-)
> create mode 100644 arch/powerpc/platforms/powernv/opal-errinjct.c
>
> diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
> index d982bb8..bf280d9 100644
> --- a/arch/powerpc/include/asm/opal.h
> +++ b/arch/powerpc/include/asm/opal.h
> @@ -985,6 +985,7 @@ extern int opal_elog_init(void);
> extern void opal_platform_dump_init(void);
> extern void opal_sys_param_init(void);
> extern void opal_msglog_init(void);
> +extern void opal_errinjct_init(void);
>
> extern int opal_machine_check(struct pt_regs *regs);
> extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
> diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
> index 63cebb9..4711de8 100644
> --- a/arch/powerpc/platforms/powernv/Makefile
> +++ b/arch/powerpc/platforms/powernv/Makefile
> @@ -1,7 +1,7 @@
> obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o
> obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
> obj-y += rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o
> -obj-y += opal-msglog.o
> +obj-y += opal-msglog.o opal-errinjct.o
>
> obj-$(CONFIG_SMP) += smp.o
> obj-$(CONFIG_PCI) += pci.o pci-p5ioc2.o pci-ioda.o
> diff --git a/arch/powerpc/platforms/powernv/opal-errinjct.c b/arch/powerpc/platforms/powernv/opal-errinjct.c
> new file mode 100644
> index 0000000..29c9e83
> --- /dev/null
> +++ b/arch/powerpc/platforms/powernv/opal-errinjct.c
> @@ -0,0 +1,184 @@
> +/*
> + * The file supports error injection, which works based on OPAL API.
> + * For now, we only support PCI error injection. We need support
> + * injecting other types of errors in future.
> + *
> + * Copyright Gavin Shan, IBM Corporation 2014.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/msi.h>
> +#include <linux/pci.h>
> +#include <linux/iommu.h>
> +#include <linux/random.h>
> +#include <linux/slab.h>
> +#include <linux/sysfs.h>
> +#include <linux/fs.h>
> +#include <linux/fcntl.h>
> +#include <linux/kobject.h>
> +
> +#include <asm/msi_bitmap.h>
> +#include <asm/iommu.h>
> +#include <asm/pci-bridge.h>
> +#include <asm/ppc-pci.h>
> +#include <asm/opal.h>
> +
> +#include "powernv.h"
> +#include "pci.h"
> +
> +static DEFINE_MUTEX(errinjct_mutex);
> +
> +static int errinjct_iommu_group_to_phb_and_pe(uint32_t iommu_grp_id,
> + uint64_t *phb_id,
> + uint32_t *pe_num)
> +{
> +#ifdef CONFIG_IOMMU_API
> + struct iommu_group *iommu_grp;
> + struct iommu_table *tbl;
> + struct pnv_ioda_pe *pe;
> +
> + iommu_grp = iommu_group_get_by_id(iommu_grp_id);
> + if (!iommu_grp)
> + return -ENODEV;
> +
> + tbl = iommu_group_get_iommudata(iommu_grp);
> + if (!tbl)
> + return -ENODEV;
> +
> + pe = container_of(tbl, struct pnv_ioda_pe, tce32_table);
> + if (!pe->phb)
> + return -ENODEV;
> +
> + *phb_id = pe->phb->opal_id;
> + *pe_num = pe->pe_number;
> +
> + return 0;
> +#endif
> +
> + return -ENXIO;
> +}
> +
> +static int errinjct_ioa_bus_error(const char *buf, struct OpalErrinjct *ei)
> +{
> + uint32_t iommu_grp_id;
> + int ret;
> +
> + /* Extract parameters */
> + ret = sscanf(buf, "%x:%x:%x:%x:%x",
> + &ei->type, &ei->ioa.addr,
> + &ei->ioa.mask, &iommu_grp_id, ei->ioa.function);
> + if (ret != 5)
> + return -EINVAL;
> +
> + /* Invalid function ? */
> + if (ei->ioa.function < OpalEitIoaLoadMemAddr ||
> + ei->ioa.function > OpalEitIoaDmaWriteMemTarget)
> + return -ERANGE;
> +
> + /* Retrieve PHB ID and PE number */
> + ret = errinjct_iommu_group_to_phb_and_pe(iommu_grp_id,
> + &ei->ioa.phb_id,
> + &ei->ioa.pe);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int errinjct_ioa_bus_error64(const char *buf, struct OpalErrinjct *ei)
> +{
> + uint32_t iommu_grp_id;
> + int ret;
> +
> + /* Extract parameter */
> + ret = sscanf(buf, "%x:%llx:%llx:%x:%x",
> + &ei->type, &ei->ioa64.addr,
> + &ei->ioa64.mask, &iommu_grp_id, &ei->ioa64.function);
> + if (ret != 5)
> + return -EINVAL;
> +
> + /* Invalid function ? */
> + if (ei->ioa64.function < OpalEitIoaLoadMemAddr ||
> + ei->ioa64.function > OpalEitIoaDmaWriteMemTarget)
> + return -ERANGE;
> +
> + /* Retrieve PHB ID and PE number */
> + ret = errinjct_iommu_group_to_phb_and_pe(iommu_grp_id,
> + &ei->ioa64.phb_id,
> + &ei->ioa64.pe);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static ssize_t errinjct_store(struct kobject *kobj,
> + struct kobj_attribute *attr,
> + const char *buf, size_t count)
> +{
> + struct OpalErrinjct ei;
> + int ret;
> + long rc;
> +
> + /* Extract common parameters */
> + ret = sscanf(buf, "%x", &ei.type);
> + if (ret != 1)
> + return -EINVAL;
> +
> + /* Error injection might be in progress */
> + if (!mutex_trylock(&errinjct_mutex))
> + return -EAGAIN;
> +
> + switch (ei.type) {
> + case OpalErrinjctTypeIoaBusError:
> + ret = errinjct_ioa_bus_error(buf, &ei);
> + break;
> + case OpalErrinjctTypeIoaBusError64:
> + ret = errinjct_ioa_bus_error64(buf, &ei);
> + break;
> + default:
> + ret = -ERANGE;
> + }
> +
> + /* Invalid parameters ? */
> + if (ret)
> + goto mutex_unlock_exit;
> +
> + /* OPAL call */
> + rc = opal_err_injct(&ei);
> + if (rc == OPAL_SUCCESS)
> + ret = count;
> + else
> + ret = -EIO;
> +
> +mutex_unlock_exit:
> + mutex_unlock(&errinjct_mutex);
> + return ret;
> +}
> +
> +static struct kobj_attribute errinjct_attr =
> + __ATTR(errinjct, 0600, NULL, errinjct_store);
> +
> +void __init opal_errinjct_init(void)
> +{
> + int ret;
> +
> + /* Make sure /sys/firmware/opal directory is created */
> + if (!opal_kobj) {
> + pr_warn("%s: opal kobject is not available\n",
> + __func__);
> + return;
> + }
> +
> + /* Create the sysfs files */
> + ret = sysfs_create_file(opal_kobj, &errinjct_attr.attr);
> + if (ret)
> + pr_warn("%s: Cannot create sysfs file (%d)\n",
> + __func__, ret);
> +}
> diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
> index 360ad80c..cb29bb5 100644
> --- a/arch/powerpc/platforms/powernv/opal.c
> +++ b/arch/powerpc/platforms/powernv/opal.c
> @@ -604,6 +604,8 @@ static int __init opal_init(void)
> opal_sys_param_init();
> /* Setup message log interface. */
> opal_msglog_init();
> + /* Setup error injection interface */
> + opal_errinjct_init();
> }
>
> return 0;
^ permalink raw reply
* Re: [RFC PATCH V3 12/17] powerpc/powernv: implement pcibios_sriov_resource_alignment on powernv
From: Gavin Shan @ 2014-06-23 23:29 UTC (permalink / raw)
To: Wei Yang
Cc: benh, linux-pci, Gavin Shan, yan, bhelgaas, qiudayu, linuxppc-dev
In-Reply-To: <20140623082142.GB4509@richard>
On Mon, Jun 23, 2014 at 04:21:42PM +0800, Wei Yang wrote:
>On Mon, Jun 23, 2014 at 04:09:47PM +1000, Gavin Shan wrote:
>>On Tue, Jun 10, 2014 at 09:56:34AM +0800, Wei Yang wrote:
>>>This patch implements the pcibios_sriov_resource_alignment() on powernv
>>>platform.
>>>
>>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>>---
>>> arch/powerpc/include/asm/machdep.h | 1 +
>>> arch/powerpc/kernel/pci-common.c | 8 ++++++++
>>> arch/powerpc/platforms/powernv/pci-ioda.c | 17 +++++++++++++++++
>>> 3 files changed, 26 insertions(+)
>>>
>>>diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
>>>index 2f2e770..3bbc55f 100644
>>>--- a/arch/powerpc/include/asm/machdep.h
>>>+++ b/arch/powerpc/include/asm/machdep.h
>>>@@ -242,6 +242,7 @@ struct machdep_calls {
>>> resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);
>>> #ifdef CONFIG_PCI_IOV
>>> resource_size_t (*__pci_sriov_resource_size)(struct pci_dev *, int resno);
>>>+ resource_size_t (*__pci_sriov_resource_alignment)(struct pci_dev *, int resno, resource_size_t align);
Both lines exceed 80 lines here :)
>>> #endif /* CONFIG_PCI_IOV */
>>>
>>> /* Called to shutdown machine specific hardware not already controlled
>>>diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
>>>index c4e2e92..35345ac 100644
>>>--- a/arch/powerpc/kernel/pci-common.c
>>>+++ b/arch/powerpc/kernel/pci-common.c
>>>@@ -128,6 +128,14 @@ resource_size_t pcibios_sriov_resource_size(struct pci_dev *pdev, int resno)
>>>
>>> return 0;
>>> }
>>>+
>>>+resource_size_t pcibios_sriov_resource_alignment(struct pci_dev *pdev, int resno, resource_size_t align)
>>>+{
>>>+ if (ppc_md.__pci_sriov_resource_alignment)
>>>+ return ppc_md.__pci_sriov_resource_alignment(pdev, resno, align);
>>>+
>>>+ return 0;
>>>+}
>>> #endif /* CONFIG_PCI_IOV */
>>>
>>> static resource_size_t pcibios_io_size(const struct pci_controller *hose)
>>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>>index 7dfad6a..b0ac851 100644
>>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>>@@ -1573,6 +1573,22 @@ static resource_size_t __pnv_pci_sriov_resource_size(struct pci_dev *pdev, int r
>>>
>>> return size;
>>> }
>>>+
>>>+static resource_size_t __pnv_pci_sriov_resource_alignment(struct pci_dev *pdev, int resno,
>>>+ resource_size_t align)
>>
>>The function could be "pcibios_sriov_resource_alignment()", but it's not a big deal.
>>If you prefer the original one, then keep it :)
>
>I guess you want to name it to pnv_pcibios_sriov_resource_alignment()?
>pcibios_sriov_resource_alignment() is the general name for this function.
>
>If yes, this is changed.
>
Nope, What I mean is to have something like this:
struct machdep_calls {
:
#ifdef CONFIG_PCI_IOV
resource_size_t (*pci_sriov_resource_size)(struct pci_dev *dev,
int resno);
resource_size_t (*pci_sriov_resource_alignment)(struct pci_dev *dev,
int resno,
resource_size_t align);
#endif
:
}
ppc_md.pci_sriov_resource_size = pnv_pci_iov_res_size;
ppc_md.pci_sriov_resource_alignment = pnv_pci_iov_res_alignment;
The point is not to have prefix "__" for callbacks in "struct machdep_calls".
ppc_md.__pci_sriov_resource_size is the first one that has prefix "__"
>>
>>>+{
>>>+ struct pci_dn *pdn = pci_get_pdn(pdev);
>>>+ resource_size_t iov_align;
>>>+
>>>+ iov_align = resource_size(&pdev->resource[resno]);
>>>+ if (iov_align)
>>>+ return iov_align;
>>>+
>>>+ if (pdn->vfs)
>>>+ return pdn->vfs * align;
>>>+
>>>+ return align;
>>>+}
>>> #endif /* CONFIG_PCI_IOV */
>>>
>>> /* Prevent enabling devices for which we couldn't properly
>>>@@ -1777,6 +1793,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
>>> ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
>>> #ifdef CONFIG_PCI_IOV
>>> ppc_md.__pci_sriov_resource_size = __pnv_pci_sriov_resource_size;
>>>+ ppc_md.__pci_sriov_resource_alignment = __pnv_pci_sriov_resource_alignment;
>>> #endif /* CONFIG_PCI_IOV */
>>> pci_add_flags(PCI_REASSIGN_ALL_RSRC);
>>>
Thanks,
Gavin
^ permalink raw reply
* Re: [PATCH v1 1/3] powerpc/powernv: Sync header with firmware
From: Gavin Shan @ 2014-06-23 23:44 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: aik, Gavin Shan, kvm-ppc, agraf, qiudayu, linuxppc-dev
In-Reply-To: <1403557814.4587.137.camel@pasglop>
On Tue, Jun 24, 2014 at 07:10:14AM +1000, Benjamin Herrenschmidt wrote:
>On Mon, 2014-06-23 at 12:14 +1000, Gavin Shan wrote:
>> The patch synchronizes firmware header file (opal.h) for PCI error
>> injection
>
>The FW API you expose is not PCI specific. I haven't seen the
>corresponding FW patches yet but I'm not fan of that single call
>that collates unrelated things.
>
>I much'd prefer see a opal_pci_err_inject that is specific to
>IO(D)A errors, which takes a PHB ID and goes via the normal dispatch
>to PHB ops inside OPAL. For the rest, especially core specific
>injections, we can provide a separate dedicated call.
>
Thanks, Ben. I'll change the firmware API to have a separate
API (opal_pci_err_inject) for PCI errors.
>Cheers,
>Ben.
>
Thanks,
Gavin
>> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
>> ---
>> arch/powerpc/include/asm/opal.h | 65 ++++++++++++++++++++++++++
>> arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
>> 2 files changed, 66 insertions(+)
>>
>> diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
>> index 66ad7a7..d982bb8 100644
>> --- a/arch/powerpc/include/asm/opal.h
>> +++ b/arch/powerpc/include/asm/opal.h
>> @@ -175,6 +175,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
>> #define OPAL_SET_PARAM 90
>> #define OPAL_DUMP_RESEND 91
>> #define OPAL_DUMP_INFO2 94
>> +#define OPAL_ERR_INJECT 96
>>
>> #ifndef __ASSEMBLY__
>>
>> @@ -219,6 +220,69 @@ enum OpalPciErrorSeverity {
>> OPAL_EEH_SEV_INF = 5
>> };
>>
>> +enum OpalErrinjctType {
>> + OpalErrinjctTypeFirst = 0,
>> + OpalErrinjctTypeFatal = 1,
>> + OpalErrinjctTypeRecoverRandomEvent = 2,
>> + OpalErrinjctTypeRecoverSpecialEvent = 3,
>> + OpalErrinjctTypeCorruptedPage = 4,
>> + OpalErrinjctTypeCorruptedSlb = 5,
>> + OpalErrinjctTypeTranslatorFailure = 6,
>> + OpalErrinjctTypeIoaBusError = 7,
>> + OpalErrinjctTypeIoaBusError64 = 8,
>> + OpalErrinjctTypePlatformSpecific = 9,
>> + OpalErrinjctTypeDcacheStart = 10,
>> + OpalErrinjctTypeDcacheEnd = 11,
>> + OpalErrinjctTypeIcacheStart = 12,
>> + OpalErrinjctTypeIcacheEnd = 13,
>> + OpalErrinjctTypeTlbStart = 14,
>> + OpalErrinjctTypeTlbEnd = 15,
>> + OpalErrinjctTypeUpstreamIoError = 16,
>> + OpalErrinjctTypeLast = 17,
>> +
>> + /* IoaBusError & IoaBusError64 */
>> + OpalEitIoaLoadMemAddr = 0,
>> + OpalEitIoaLoadMemData = 1,
>> + OpalEitIoaLoadIoAddr = 2,
>> + OpalEitIoaLoadIoData = 3,
>> + OpalEitIoaLoadConfigAddr = 4,
>> + OpalEitIoaLoadConfigData = 5,
>> + OpalEitIoaStoreMemAddr = 6,
>> + OpalEitIoaStoreMemData = 7,
>> + OpalEitIoaStoreIoAddr = 8,
>> + OpalEitIoaStoreIoData = 9,
>> + OpalEitIoaStoreConfigAddr = 10,
>> + OpalEitIoaStoreConfigData = 11,
>> + OpalEitIoaDmaReadMemAddr = 12,
>> + OpalEitIoaDmaReadMemData = 13,
>> + OpalEitIoaDmaReadMemMaster = 14,
>> + OpalEitIoaDmaReadMemTarget = 15,
>> + OpalEitIoaDmaWriteMemAddr = 16,
>> + OpalEitIoaDmaWriteMemData = 17,
>> + OpalEitIoaDmaWriteMemMaster = 18,
>> + OpalEitIoaDmaWriteMemTarget = 19,
>> +};
>> +
>> +struct OpalErrinjct {
>> + int32_t type;
>> + union {
>> + struct {
>> + uint32_t addr;
>> + uint32_t mask;
>> + uint64_t phb_id;
>> + uint32_t pe;
>> + uint32_t function;
>> + } ioa;
>> + struct {
>> + uint64_t addr;
>> + uint64_t mask;
>> + uint64_t phb_id;
>> + uint32_t pe;
>> + uint32_t function;
>> + } ioa64;
>> + };
>> +};
>> +
>> enum OpalShpcAction {
>> OPAL_SHPC_GET_LINK_STATE = 0,
>> OPAL_SHPC_GET_SLOT_STATE = 1
>> @@ -870,6 +934,7 @@ int64_t opal_update_flash(uint64_t blk_list);
>> int64_t opal_dump_init(uint8_t dump_type);
>> int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
>> int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
>> +int64_t opal_err_injct(struct OpalErrinjct *ei);
>> int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
>> int64_t opal_dump_ack(uint32_t dump_id);
>> int64_t opal_dump_resend_notification(void);
>> diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
>> index f531ffe..44b3d81 100644
>> --- a/arch/powerpc/platforms/powernv/opal-wrappers.S
>> +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
>> @@ -136,6 +136,7 @@ OPAL_CALL(opal_resync_timebase, OPAL_RESYNC_TIMEBASE);
>> OPAL_CALL(opal_dump_init, OPAL_DUMP_INIT);
>> OPAL_CALL(opal_dump_info, OPAL_DUMP_INFO);
>> OPAL_CALL(opal_dump_info2, OPAL_DUMP_INFO2);
>> +OPAL_CALL(opal_err_injct, OPAL_ERR_INJECT);
>> OPAL_CALL(opal_dump_read, OPAL_DUMP_READ);
>> OPAL_CALL(opal_dump_ack, OPAL_DUMP_ACK);
>> OPAL_CALL(opal_get_msg, OPAL_GET_MSG);
>
>
^ permalink raw reply
* Re: [PATCH v1 1/3] powerpc/powernv: Sync header with firmware
From: Benjamin Herrenschmidt @ 2014-06-23 23:50 UTC (permalink / raw)
To: Gavin Shan; +Cc: aik, qiudayu, linuxppc-dev, agraf, kvm-ppc
In-Reply-To: <20140623234427.GA4955@shangw>
On Tue, 2014-06-24 at 09:44 +1000, Gavin Shan wrote:
> >I much'd prefer see a opal_pci_err_inject that is specific to
> >IO(D)A errors, which takes a PHB ID and goes via the normal dispatch
> >to PHB ops inside OPAL. For the rest, especially core specific
> >injections, we can provide a separate dedicated call.
> >
>
> Thanks, Ben. I'll change the firmware API to have a separate
> API (opal_pci_err_inject) for PCI errors.
Also, how do we expose to Linux that the new API is supported ?
Linux shouldn't create the additional files if it isn't...
There are two ways, we can have a property in the DT of the PHB
indicating that it supports error injection or we can check for the
existence of the OPAL token at boot (there's an OPAL call to do that).
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH v1 2/3] powerpc/powernv: Support PCI error injection
From: Michael Neuling @ 2014-06-23 6:36 UTC (permalink / raw)
To: Gavin Shan; +Cc: aik, qiudayu, linuxppc-dev, agraf, kvm-ppc
In-Reply-To: <1403489682-14841-3-git-send-email-gwshan@linux.vnet.ibm.com>
On Mon, 2014-06-23 at 12:14 +1000, Gavin Shan wrote:
> The patch implements one OPAL firmware sysfs file to support PCI error
> injection: "/sys/firmware/opal/errinjct", which will be used like the
> way described as follows.
>=20
> According to PAPR spec, there are 3 RTAS calls related to error injection=
:
> "ibm,open-errinjct": allocate token prior to doing error injection.
> "ibm,close-errinjct": release the token allocated from "ibm,open-errinjct=
".
> "ibm,errinjct": do error injection.
>=20
> Sysfs file /sys/firmware/opal/errinjct accepts strings that have fixed
> format "ei_token ...". For now, we only support 32-bits and 64-bits
> PCI error injection and they should have following strings written to
> /sys/firmware/opal/errinjct as follows. We don't have corresponding
> sysfs files for "ibm,open-errinjct" and "ibm,close-errinjct", which
> means that we rely on userland to maintain the token by itself.
This sounds cool. =20
Can you document the sysfs interface in Documentation/powerpc?
Mikey
>=20
> 32-bits PCI error: "7:addr:mask:iommu_group_id:function".
> 64-bits PCI error: "8:addr:mask:iommu_group_id:function".
>=20
> The above "7" and "8" represent 32-bits and 64-bits PCI error seperately
> and "function" is one of the specific PCI errors (e.g. MMIO access addres=
s
> parity error), which are defined by PAPR spec.
>=20
> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/asm/opal.h | 1 +
> arch/powerpc/platforms/powernv/Makefile | 2 +-
> arch/powerpc/platforms/powernv/opal-errinjct.c | 184 +++++++++++++++++++=
++++++
> arch/powerpc/platforms/powernv/opal.c | 2 +
> 4 files changed, 188 insertions(+), 1 deletion(-)
> create mode 100644 arch/powerpc/platforms/powernv/opal-errinjct.c
>=20
> diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/o=
pal.h
> index d982bb8..bf280d9 100644
> --- a/arch/powerpc/include/asm/opal.h
> +++ b/arch/powerpc/include/asm/opal.h
> @@ -985,6 +985,7 @@ extern int opal_elog_init(void);
> extern void opal_platform_dump_init(void);
> extern void opal_sys_param_init(void);
> extern void opal_msglog_init(void);
> +extern void opal_errinjct_init(void);
> =20
> extern int opal_machine_check(struct pt_regs *regs);
> extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
> diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platf=
orms/powernv/Makefile
> index 63cebb9..4711de8 100644
> --- a/arch/powerpc/platforms/powernv/Makefile
> +++ b/arch/powerpc/platforms/powernv/Makefile
> @@ -1,7 +1,7 @@
> obj-y +=3D setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o
> obj-y +=3D opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
> obj-y +=3D rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o
> -obj-y +=3D opal-msglog.o
> +obj-y +=3D opal-msglog.o opal-errinjct.o
> =20
> obj-$(CONFIG_SMP) +=3D smp.o
> obj-$(CONFIG_PCI) +=3D pci.o pci-p5ioc2.o pci-ioda.o
> diff --git a/arch/powerpc/platforms/powernv/opal-errinjct.c b/arch/powerp=
c/platforms/powernv/opal-errinjct.c
> new file mode 100644
> index 0000000..29c9e83
> --- /dev/null
> +++ b/arch/powerpc/platforms/powernv/opal-errinjct.c
> @@ -0,0 +1,184 @@
> +/*
> + * The file supports error injection, which works based on OPAL API.
> + * For now, we only support PCI error injection. We need support
> + * injecting other types of errors in future.
> + *
> + * Copyright Gavin Shan, IBM Corporation 2014.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/msi.h>
> +#include <linux/pci.h>
> +#include <linux/iommu.h>
> +#include <linux/random.h>
> +#include <linux/slab.h>
> +#include <linux/sysfs.h>
> +#include <linux/fs.h>
> +#include <linux/fcntl.h>
> +#include <linux/kobject.h>
> +
> +#include <asm/msi_bitmap.h>
> +#include <asm/iommu.h>
> +#include <asm/pci-bridge.h>
> +#include <asm/ppc-pci.h>
> +#include <asm/opal.h>
> +
> +#include "powernv.h"
> +#include "pci.h"
> +
> +static DEFINE_MUTEX(errinjct_mutex);
> +
> +static int errinjct_iommu_group_to_phb_and_pe(uint32_t iommu_grp_id,
> + uint64_t *phb_id,
> + uint32_t *pe_num)
> +{
> +#ifdef CONFIG_IOMMU_API
> + struct iommu_group *iommu_grp;
> + struct iommu_table *tbl;
> + struct pnv_ioda_pe *pe;
> +
> + iommu_grp =3D iommu_group_get_by_id(iommu_grp_id);
> + if (!iommu_grp)
> + return -ENODEV;
> +
> + tbl =3D iommu_group_get_iommudata(iommu_grp);
> + if (!tbl)
> + return -ENODEV;
> +
> + pe =3D container_of(tbl, struct pnv_ioda_pe, tce32_table);
> + if (!pe->phb)
> + return -ENODEV;
> +
> + *phb_id =3D pe->phb->opal_id;
> + *pe_num =3D pe->pe_number;
> +
> + return 0;
> +#endif
> +
> + return -ENXIO;
> +}
> +
> +static int errinjct_ioa_bus_error(const char *buf, struct OpalErrinjct *=
ei)
> +{
> + uint32_t iommu_grp_id;
> + int ret;
> +
> + /* Extract parameters */
> + ret =3D sscanf(buf, "%x:%x:%x:%x:%x",
> + &ei->type, &ei->ioa.addr,
> + &ei->ioa.mask, &iommu_grp_id, ei->ioa.function);
> + if (ret !=3D 5)
> + return -EINVAL;
> +
> + /* Invalid function ? */
> + if (ei->ioa.function < OpalEitIoaLoadMemAddr ||
> + ei->ioa.function > OpalEitIoaDmaWriteMemTarget)
> + return -ERANGE;
> +
> + /* Retrieve PHB ID and PE number */
> + ret =3D errinjct_iommu_group_to_phb_and_pe(iommu_grp_id,
> + &ei->ioa.phb_id,
> + &ei->ioa.pe);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int errinjct_ioa_bus_error64(const char *buf, struct OpalErrinjct=
*ei)
> +{
> + uint32_t iommu_grp_id;
> + int ret;
> +
> + /* Extract parameter */
> + ret =3D sscanf(buf, "%x:%llx:%llx:%x:%x",
> + &ei->type, &ei->ioa64.addr,
> + &ei->ioa64.mask, &iommu_grp_id, &ei->ioa64.function);
> + if (ret !=3D 5)
> + return -EINVAL;
> +
> + /* Invalid function ? */
> + if (ei->ioa64.function < OpalEitIoaLoadMemAddr ||
> + ei->ioa64.function > OpalEitIoaDmaWriteMemTarget)
> + return -ERANGE;
> +
> + /* Retrieve PHB ID and PE number */
> + ret =3D errinjct_iommu_group_to_phb_and_pe(iommu_grp_id,
> + &ei->ioa64.phb_id,
> + &ei->ioa64.pe);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static ssize_t errinjct_store(struct kobject *kobj,
> + struct kobj_attribute *attr,
> + const char *buf, size_t count)
> +{
> + struct OpalErrinjct ei;
> + int ret;
> + long rc;
> +
> + /* Extract common parameters */
> + ret =3D sscanf(buf, "%x", &ei.type);
> + if (ret !=3D 1)
> + return -EINVAL;
> +
> + /* Error injection might be in progress */
> + if (!mutex_trylock(&errinjct_mutex))
> + return -EAGAIN;
> +
> + switch (ei.type) {
> + case OpalErrinjctTypeIoaBusError:
> + ret =3D errinjct_ioa_bus_error(buf, &ei);
> + break;
> + case OpalErrinjctTypeIoaBusError64:
> + ret =3D errinjct_ioa_bus_error64(buf, &ei);
> + break;
> + default:
> + ret =3D -ERANGE;
> + }
> +
> + /* Invalid parameters ? */
> + if (ret)
> + goto mutex_unlock_exit;
> +
> + /* OPAL call */
> + rc =3D opal_err_injct(&ei);
> + if (rc =3D=3D OPAL_SUCCESS)
> + ret =3D count;
> + else
> + ret =3D -EIO;
> +
> +mutex_unlock_exit:
> + mutex_unlock(&errinjct_mutex);
> + return ret;
> +}
> +
> +static struct kobj_attribute errinjct_attr =3D
> + __ATTR(errinjct, 0600, NULL, errinjct_store);
> +
> +void __init opal_errinjct_init(void)
> +{
> + int ret;
> +
> + /* Make sure /sys/firmware/opal directory is created */
> + if (!opal_kobj) {
> + pr_warn("%s: opal kobject is not available\n",
> + __func__);
> + return;
> + }
> +
> + /* Create the sysfs files */
> + ret =3D sysfs_create_file(opal_kobj, &errinjct_attr.attr);
> + if (ret)
> + pr_warn("%s: Cannot create sysfs file (%d)\n",
> + __func__, ret);
> +}
> diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platfor=
ms/powernv/opal.c
> index 360ad80c..cb29bb5 100644
> --- a/arch/powerpc/platforms/powernv/opal.c
> +++ b/arch/powerpc/platforms/powernv/opal.c
> @@ -604,6 +604,8 @@ static int __init opal_init(void)
> opal_sys_param_init();
> /* Setup message log interface. */
> opal_msglog_init();
> + /* Setup error injection interface */
> + opal_errinjct_init();
> }
> =20
> return 0;
^ permalink raw reply
* Re: [RFC PATCH V3 12/17] powerpc/powernv: implement pcibios_sriov_resource_alignment on powernv
From: Wei Yang @ 2014-06-24 1:24 UTC (permalink / raw)
To: Gavin Shan
Cc: Wei Yang, benh, linux-pci, yan, bhelgaas, qiudayu, linuxppc-dev
In-Reply-To: <20140623232922.GA4018@shangw>
On Tue, Jun 24, 2014 at 09:29:22AM +1000, Gavin Shan wrote:
>On Mon, Jun 23, 2014 at 04:21:42PM +0800, Wei Yang wrote:
>>On Mon, Jun 23, 2014 at 04:09:47PM +1000, Gavin Shan wrote:
>>>On Tue, Jun 10, 2014 at 09:56:34AM +0800, Wei Yang wrote:
>>>>This patch implements the pcibios_sriov_resource_alignment() on powernv
>>>>platform.
>>>>
>>>>Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>>>---
>>>> arch/powerpc/include/asm/machdep.h | 1 +
>>>> arch/powerpc/kernel/pci-common.c | 8 ++++++++
>>>> arch/powerpc/platforms/powernv/pci-ioda.c | 17 +++++++++++++++++
>>>> 3 files changed, 26 insertions(+)
>>>>
>>>>diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
>>>>index 2f2e770..3bbc55f 100644
>>>>--- a/arch/powerpc/include/asm/machdep.h
>>>>+++ b/arch/powerpc/include/asm/machdep.h
>>>>@@ -242,6 +242,7 @@ struct machdep_calls {
>>>> resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);
>>>> #ifdef CONFIG_PCI_IOV
>>>> resource_size_t (*__pci_sriov_resource_size)(struct pci_dev *, int resno);
>>>>+ resource_size_t (*__pci_sriov_resource_alignment)(struct pci_dev *, int resno, resource_size_t align);
>
>Both lines exceed 80 lines here :)
>
>>>> #endif /* CONFIG_PCI_IOV */
>>>>
>>>> /* Called to shutdown machine specific hardware not already controlled
>>>>diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
>>>>index c4e2e92..35345ac 100644
>>>>--- a/arch/powerpc/kernel/pci-common.c
>>>>+++ b/arch/powerpc/kernel/pci-common.c
>>>>@@ -128,6 +128,14 @@ resource_size_t pcibios_sriov_resource_size(struct pci_dev *pdev, int resno)
>>>>
>>>> return 0;
>>>> }
>>>>+
>>>>+resource_size_t pcibios_sriov_resource_alignment(struct pci_dev *pdev, int resno, resource_size_t align)
>>>>+{
>>>>+ if (ppc_md.__pci_sriov_resource_alignment)
>>>>+ return ppc_md.__pci_sriov_resource_alignment(pdev, resno, align);
>>>>+
>>>>+ return 0;
>>>>+}
>>>> #endif /* CONFIG_PCI_IOV */
>>>>
>>>> static resource_size_t pcibios_io_size(const struct pci_controller *hose)
>>>>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
>>>>index 7dfad6a..b0ac851 100644
>>>>--- a/arch/powerpc/platforms/powernv/pci-ioda.c
>>>>+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
>>>>@@ -1573,6 +1573,22 @@ static resource_size_t __pnv_pci_sriov_resource_size(struct pci_dev *pdev, int r
>>>>
>>>> return size;
>>>> }
>>>>+
>>>>+static resource_size_t __pnv_pci_sriov_resource_alignment(struct pci_dev *pdev, int resno,
>>>>+ resource_size_t align)
>>>
>>>The function could be "pcibios_sriov_resource_alignment()", but it's not a big deal.
>>>If you prefer the original one, then keep it :)
>>
>>I guess you want to name it to pnv_pcibios_sriov_resource_alignment()?
>>pcibios_sriov_resource_alignment() is the general name for this function.
>>
>>If yes, this is changed.
>>
>
>Nope, What I mean is to have something like this:
>
> struct machdep_calls {
> :
> #ifdef CONFIG_PCI_IOV
> resource_size_t (*pci_sriov_resource_size)(struct pci_dev *dev,
> int resno);
> resource_size_t (*pci_sriov_resource_alignment)(struct pci_dev *dev,
> int resno,
> resource_size_t align);
> #endif
> :
> }
>
> ppc_md.pci_sriov_resource_size = pnv_pci_iov_res_size;
> ppc_md.pci_sriov_resource_alignment = pnv_pci_iov_res_alignment;
>
>The point is not to have prefix "__" for callbacks in "struct machdep_calls".
>ppc_md.__pci_sriov_resource_size is the first one that has prefix "__"
Yep, will change the name.
>
>>>
>>>>+{
>>>>+ struct pci_dn *pdn = pci_get_pdn(pdev);
>>>>+ resource_size_t iov_align;
>>>>+
>>>>+ iov_align = resource_size(&pdev->resource[resno]);
>>>>+ if (iov_align)
>>>>+ return iov_align;
>>>>+
>>>>+ if (pdn->vfs)
>>>>+ return pdn->vfs * align;
>>>>+
>>>>+ return align;
>>>>+}
>>>> #endif /* CONFIG_PCI_IOV */
>>>>
>>>> /* Prevent enabling devices for which we couldn't properly
>>>>@@ -1777,6 +1793,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
>>>> ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
>>>> #ifdef CONFIG_PCI_IOV
>>>> ppc_md.__pci_sriov_resource_size = __pnv_pci_sriov_resource_size;
>>>>+ ppc_md.__pci_sriov_resource_alignment = __pnv_pci_sriov_resource_alignment;
>>>> #endif /* CONFIG_PCI_IOV */
>>>> pci_add_flags(PCI_REASSIGN_ALL_RSRC);
>>>>
>
>Thanks,
>Gavin
--
Richard Yang
Help you, Help me
^ permalink raw reply
* [PATCH] powerpc: Remove __arch_swab*
From: Benjamin Herrenschmidt @ 2014-06-24 2:28 UTC (permalink / raw)
To: linuxppc-dev
The generic code uses gcc built-ins which work fine so there's no benefit
in implementing our own anymore.
We can't completely remove the ld/st_le* functions as some historical
cruft still uses them, but that's next on the radar
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
index b9bd1ca..96f59de 100644
--- a/arch/powerpc/include/asm/swab.h
+++ b/arch/powerpc/include/asm/swab.h
@@ -9,10 +9,6 @@
#include <uapi/asm/swab.h>
-#ifdef __GNUC__
-#ifndef __powerpc64__
-#endif /* __powerpc64__ */
-
static __inline__ __u16 ld_le16(const volatile __u16 *addr)
{
__u16 val;
@@ -20,19 +16,12 @@ static __inline__ __u16 ld_le16(const volatile __u16 *addr)
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
return val;
}
-#define __arch_swab16p ld_le16
static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
{
__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
}
-static inline void __arch_swab16s(__u16 *addr)
-{
- st_le16(addr, *addr);
-}
-#define __arch_swab16s __arch_swab16s
-
static __inline__ __u32 ld_le32(const volatile __u32 *addr)
{
__u32 val;
@@ -40,42 +29,10 @@ static __inline__ __u32 ld_le32(const volatile __u32 *addr)
__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
return val;
}
-#define __arch_swab32p ld_le32
static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
{
__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
}
-static inline void __arch_swab32s(__u32 *addr)
-{
- st_le32(addr, *addr);
-}
-#define __arch_swab32s __arch_swab32s
-
-static inline __attribute_const__ __u16 __arch_swab16(__u16 value)
-{
- __u16 result;
-
- __asm__("rlwimi %0,%1,8,16,23"
- : "=r" (result)
- : "r" (value), "0" (value >> 8));
- return result;
-}
-#define __arch_swab16 __arch_swab16
-
-static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
-{
- __u32 result;
-
- __asm__("rlwimi %0,%1,24,16,23\n\t"
- "rlwimi %0,%1,8,8,15\n\t"
- "rlwimi %0,%1,24,0,7"
- : "=r" (result)
- : "r" (value), "0" (value >> 24));
- return result;
-}
-#define __arch_swab32 __arch_swab32
-
-#endif /* __GNUC__ */
#endif /* _ASM_POWERPC_SWAB_H */
^ permalink raw reply related
* Re: [PATCH 5/9] [arch/powerpc] replace obsolete strict_strto* calls
From: Benjamin Herrenschmidt @ 2014-06-24 2:32 UTC (permalink / raw)
To: Daniel Walter; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20140621120536.GA7372@google.com>
On Sat, 2014-06-21 at 13:05 +0100, Daniel Walter wrote:
> Replace strict_strto calls with more appropriate kstrto calls
>
> Signed-off-by: Daniel Walter <dwalter@google.com>
> ---
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
--
Should I put that in the powerpc tree ?
> arch/powerpc/kernel/setup_64.c | 6 +++---
> arch/powerpc/kernel/vio.c | 2 +-
> arch/powerpc/platforms/pseries/dlpar.c | 4 ++--
> arch/powerpc/platforms/pseries/mobility.c | 2 +-
> 4 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
> index ee082d7..5257166 100644
> --- a/arch/powerpc/kernel/setup_64.c
> +++ b/arch/powerpc/kernel/setup_64.c
> @@ -149,13 +149,13 @@ static void check_smt_enabled(void)
> else if (!strcmp(smt_enabled_cmdline, "off"))
> smt_enabled_at_boot = 0;
> else {
> - long smt;
> + int smt;
> int rc;
>
> - rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
> + rc = kstrtoint(smt_enabled_cmdline, 10, &smt);
> if (!rc)
> smt_enabled_at_boot =
> - min(threads_per_core, (int)smt);
> + min(threads_per_core, smt);
> }
> } else {
> dn = of_find_node_by_path("/options");
> diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
> index 904c661..5bfdab9 100644
> --- a/arch/powerpc/kernel/vio.c
> +++ b/arch/powerpc/kernel/vio.c
> @@ -977,7 +977,7 @@ static ssize_t viodev_cmo_desired_set(struct device *dev,
> size_t new_desired;
> int ret;
>
> - ret = strict_strtoul(buf, 10, &new_desired);
> + ret = kstrtoul(buf, 10, &new_desired);
> if (ret)
> return ret;
>
> diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
> index 022b38e..abc6892 100644
> --- a/arch/powerpc/platforms/pseries/dlpar.c
> +++ b/arch/powerpc/platforms/pseries/dlpar.c
> @@ -399,10 +399,10 @@ out:
> static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
> {
> struct device_node *dn, *parent;
> - unsigned long drc_index;
> + u32 drc_index;
> int rc;
>
> - rc = strict_strtoul(buf, 0, &drc_index);
> + rc = kstrtou32(buf, 0, &drc_index);
> if (rc)
> return -EINVAL;
>
> diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c
> index bde7eba..0694ac6 100644
> --- a/arch/powerpc/platforms/pseries/mobility.c
> +++ b/arch/powerpc/platforms/pseries/mobility.c
> @@ -319,7 +319,7 @@ static ssize_t migrate_store(struct class *class, struct class_attribute *attr,
> u64 streamid;
> int rc;
>
> - rc = strict_strtoull(buf, 0, &streamid);
> + rc = kstrtou64(buf, 0, &streamid);
> if (rc)
> return rc;
>
^ permalink raw reply
* Re: [PATCH 04/24] powerpc: check/return actual error on sysfs functions
From: Benjamin Herrenschmidt @ 2014-06-24 2:34 UTC (permalink / raw)
To: Greg KH; +Cc: Jeff Liu, paulus, linuxppc-dev, LKML
In-Reply-To: <20140617192334.GA4628@kroah.com>
On Tue, 2014-06-17 at 12:23 -0700, Greg KH wrote:
> On Tue, Jun 17, 2014 at 10:31:09PM +0800, Jeff Liu wrote:
> > From: Jie Liu <jeff.liu@oracle.com>
> >
> > Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > Cc: Paul Mackerras <paulus@samba.org>
> > Signed-off-by: Jie Liu <jeff.liu@oracle.com>
> > ---
> > arch/powerpc/platforms/powernv/opal-dump.c | 2 +-
> > arch/powerpc/platforms/powernv/opal-elog.c | 4 ++--
> > 2 files changed, 3 insertions(+), 3 deletions(-)
>
> Ben and Paul, please do not take this patch, it is incorrect.
Thanks, ignored :-)
Cheers,
Ben.
^ permalink raw reply
* [PATCH] qe: move qe from arch/powerpc to drivers
From: Zhao Qiang @ 2014-06-24 3:31 UTC (permalink / raw)
To: linuxppc-dev, B07421; +Cc: Zhao Qiang, R63061
ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
---
arch/powerpc/platforms/83xx/km83xx.c | 4 +--
arch/powerpc/platforms/83xx/misc.c | 2 +-
arch/powerpc/platforms/83xx/mpc832x_mds.c | 4 +--
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 4 +--
arch/powerpc/platforms/83xx/mpc836x_mds.c | 4 +--
arch/powerpc/platforms/83xx/mpc836x_rdk.c | 4 +--
arch/powerpc/platforms/85xx/common.c | 2 +-
arch/powerpc/platforms/85xx/corenet_generic.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 4 +--
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 4 +--
arch/powerpc/platforms/85xx/twr_p102x.c | 4 +--
arch/powerpc/platforms/Kconfig | 11 -------
arch/powerpc/sysdev/qe_lib/Kconfig | 18 -----------
arch/powerpc/sysdev/qe_lib/Makefile | 5 ----
arch/powerpc/sysdev/qe_lib/gpio.c | 2 +-
arch/powerpc/sysdev/qe_lib/usb.c | 4 +--
drivers/Kconfig | 1 +
drivers/Makefile | 1 +
drivers/net/ethernet/freescale/fsl_pq_mdio.c | 2 +-
drivers/net/ethernet/freescale/ucc_geth.c | 8 ++---
drivers/net/ethernet/freescale/ucc_geth.h | 8 ++---
drivers/qe/Kconfig | 35 ++++++++++++++++++++++
.../powerpc/sysdev/qe_lib => drivers/qe}/Makefile | 2 --
{arch/powerpc/sysdev/qe_lib => drivers/qe}/qe.c | 4 +--
{arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.c | 2 +-
{arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.h | 2 +-
{arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_io.c | 2 +-
{arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc.c | 6 ++--
.../sysdev/qe_lib => drivers/qe}/ucc_fast.c | 8 ++---
.../sysdev/qe_lib => drivers/qe}/ucc_slow.c | 8 ++---
drivers/s390/net/qeth_core_mpc.h | 2 +-
drivers/spi/spi-fsl-cpm.c | 2 +-
drivers/tty/serial/ucc_uart.c | 2 +-
drivers/usb/gadget/fsl_qe_udc.c | 2 +-
drivers/usb/host/fhci-hcd.c | 2 +-
drivers/usb/host/fhci-hub.c | 2 +-
drivers/usb/host/fhci-sched.c | 2 +-
drivers/usb/host/fhci.h | 4 +--
.../include/asm => include/linux}/immap_qe.h | 0
{arch/powerpc/include/asm => include/linux}/qe.h | 2 +-
.../powerpc/include/asm => include/linux}/qe_ic.h | 0
{arch/powerpc/include/asm => include/linux}/ucc.h | 4 +--
.../include/asm => include/linux}/ucc_fast.h | 6 ++--
.../include/asm => include/linux}/ucc_slow.h | 6 ++--
44 files changed, 102 insertions(+), 101 deletions(-)
create mode 100644 drivers/qe/Kconfig
copy {arch/powerpc/sysdev/qe_lib => drivers/qe}/Makefile (76%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe.c (99%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.c (99%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_ic.h (99%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/qe_io.c (99%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc.c (98%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc_fast.c (99%)
rename {arch/powerpc/sysdev/qe_lib => drivers/qe}/ucc_slow.c (98%)
rename {arch/powerpc/include/asm => include/linux}/immap_qe.h (100%)
rename {arch/powerpc/include/asm => include/linux}/qe.h (99%)
rename {arch/powerpc/include/asm => include/linux}/qe_ic.h (100%)
rename {arch/powerpc/include/asm => include/linux}/ucc.h (97%)
rename {arch/powerpc/include/asm => include/linux}/ucc_fast.h (99%)
rename {arch/powerpc/include/asm => include/linux}/ucc_slow.h (99%)
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c
index bf4c447..22c0d6d 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -37,8 +37,8 @@
#include <asm/udbg.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include "mpc83xx.h"
diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c
index 125336f..cbc82d8 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -17,7 +17,7 @@
#include <asm/io.h>
#include <asm/hw_irq.h>
#include <asm/ipic.h>
-#include <asm/qe_ic.h>
+#include <linux/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 8d76220..27dbf52 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -36,8 +36,8 @@
#include <asm/udbg.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include "mpc83xx.h"
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index eff5baa..616959a 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -25,8 +25,8 @@
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index 1a26d2f..cdc8165 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -44,8 +44,8 @@
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <sysdev/simple_gpio.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include "mpc83xx.h"
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
index b63b42d..c850c67 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_rdk.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
@@ -20,8 +20,8 @@
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index b564b5e..ec0bde9 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -9,7 +9,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include <sysdev/cpm2_pic.h>
#include "mpc85xx.h"
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 5db1e11..2a9ff3e 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -26,7 +26,7 @@
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <asm/ehv_pic.h>
-#include <asm/qe_ic.h>
+#include <linux/qe_ic.h>
#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index a392e94..016c936 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -47,8 +47,8 @@
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <sysdev/simple_gpio.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include <asm/mpic.h>
#include <asm/swiotlb.h>
#include <asm/fsl_guts.h>
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index e358bed..6d1ca89 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -25,8 +25,8 @@
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include <asm/fsl_guts.h>
#include <sysdev/fsl_soc.h>
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c
index 1eadb6d..d73a8d0 100644
--- a/arch/powerpc/platforms/85xx/twr_p102x.c
+++ b/arch/powerpc/platforms/85xx/twr_p102x.c
@@ -21,8 +21,8 @@
#include <asm/pci-bridge.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
-#include <asm/qe.h>
-#include <asm/qe_ic.h>
+#include <linux/qe.h>
+#include <linux/qe_ic.h>
#include <asm/fsl_guts.h>
#include <sysdev/fsl_soc.h>
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index bf9c6d4..b30657a 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -278,17 +278,6 @@ config TAU_AVERAGE
If in doubt, say N here.
-config QUICC_ENGINE
- bool "Freescale QUICC Engine (QE) Support"
- depends on FSL_SOC && PPC32
- select PPC_LIB_RHEAP
- select CRC32
- help
- The QUICC Engine (QE) is a new generation of communications
- coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
- Selecting this option means that you wish to build a kernel
- for a machine with a QE coprocessor.
-
config QE_GPIO
bool "QE GPIO support"
depends on QUICC_ENGINE
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig
index 3c25199..e77b5cc 100644
--- a/arch/powerpc/sysdev/qe_lib/Kconfig
+++ b/arch/powerpc/sysdev/qe_lib/Kconfig
@@ -2,24 +2,6 @@
# QE Communication options
#
-config UCC_SLOW
- bool
- default y if SERIAL_QE
- help
- This option provides qe_lib support to UCC slow
- protocols: UART, BISYNC, QMC
-
-config UCC_FAST
- bool
- default y if UCC_GETH
- help
- This option provides qe_lib support to UCC fast
- protocols: HDLC, Ethernet, ATM, transparent
-
-config UCC
- bool
- default y if UCC_FAST || UCC_SLOW
-
config QE_USB
bool
default y if USB_FSL_QE
diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/arch/powerpc/sysdev/qe_lib/Makefile
index f1855c1..ed3316e 100644
--- a/arch/powerpc/sysdev/qe_lib/Makefile
+++ b/arch/powerpc/sysdev/qe_lib/Makefile
@@ -1,10 +1,5 @@
#
# Makefile for the linux ppc-specific parts of QE
#
-obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
-
-obj-$(CONFIG_UCC) += ucc.o
-obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
-obj-$(CONFIG_UCC_FAST) += ucc_fast.o
obj-$(CONFIG_QE_USB) += usb.o
obj-$(CONFIG_QE_GPIO) += gpio.o
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c
index 521e67a..764bd93 100644
--- a/arch/powerpc/sysdev/qe_lib/gpio.c
+++ b/arch/powerpc/sysdev/qe_lib/gpio.c
@@ -21,7 +21,7 @@
#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/export.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
struct qe_gpio_chip {
struct of_mm_gpio_chip mm_gc;
diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c
index 27f23bd..d246a39 100644
--- a/arch/powerpc/sysdev/qe_lib/usb.c
+++ b/arch/powerpc/sysdev/qe_lib/usb.c
@@ -17,8 +17,8 @@
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/io.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
int qe_usb_clock_set(enum qe_clock clk, int rate)
{
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 0a0a90f..719d2d2 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -174,4 +174,5 @@ source "drivers/powercap/Kconfig"
source "drivers/mcb/Kconfig"
+source "drivers/qe/Kconfig"
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index d05d81b..75b0081 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -93,6 +93,7 @@ obj-$(CONFIG_SERIO) += input/serio/
obj-$(CONFIG_GAMEPORT) += input/gameport/
obj-$(CONFIG_INPUT) += input/
obj-$(CONFIG_I2O) += message/
+obj-$(CONFIG_QUICC_ENGINE) += qe/
obj-$(CONFIG_RTC_LIB) += rtc/
obj-y += i2c/ media/
obj-$(CONFIG_PPS) += pps/
diff --git a/drivers/net/ethernet/freescale/fsl_pq_mdio.c b/drivers/net/ethernet/freescale/fsl_pq_mdio.c
index 583e71a..d0222a6 100644
--- a/drivers/net/ethernet/freescale/fsl_pq_mdio.c
+++ b/drivers/net/ethernet/freescale/fsl_pq_mdio.c
@@ -28,7 +28,7 @@
#include <linux/of_device.h>
#include <asm/io.h>
-#include <asm/ucc.h> /* for ucc_set_qe_mux_mii_mng() */
+#include <linux/ucc.h> /* for ucc_set_qe_mux_mii_mng() */
#include "gianfar.h"
diff --git a/drivers/net/ethernet/freescale/ucc_geth.c b/drivers/net/ethernet/freescale/ucc_geth.c
index c8299c3..ee2f1ff 100644
--- a/drivers/net/ethernet/freescale/ucc_geth.c
+++ b/drivers/net/ethernet/freescale/ucc_geth.c
@@ -40,10 +40,10 @@
#include <asm/uaccess.h>
#include <asm/irq.h>
#include <asm/io.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
-#include <asm/ucc.h>
-#include <asm/ucc_fast.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
+#include <linux/ucc.h>
+#include <linux/ucc_fast.h>
#include <asm/machdep.h>
#include "ucc_geth.h"
diff --git a/drivers/net/ethernet/freescale/ucc_geth.h b/drivers/net/ethernet/freescale/ucc_geth.h
index 75f3371..15b64c0 100644
--- a/drivers/net/ethernet/freescale/ucc_geth.h
+++ b/drivers/net/ethernet/freescale/ucc_geth.h
@@ -22,11 +22,11 @@
#include <linux/list.h>
#include <linux/if_ether.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
-#include <asm/ucc.h>
-#include <asm/ucc_fast.h>
+#include <linux/ucc.h>
+#include <linux/ucc_fast.h>
#define DRV_DESC "QE UCC Gigabit Ethernet Controller"
#define DRV_NAME "ucc_geth"
diff --git a/drivers/qe/Kconfig b/drivers/qe/Kconfig
new file mode 100644
index 0000000..dc16e9a
--- /dev/null
+++ b/drivers/qe/Kconfig
@@ -0,0 +1,35 @@
+#
+# QE Communication options
+#
+menuconfig QUICC_ENGINE
+ bool "Freescale QUICC Engine (QE) Support"
+ depends on FSL_SOC && PPC32
+ select PPC_LIB_RHEAP
+ select CRC32
+ help
+ The QUICC Engine (QE) is a new generation of communications
+ coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
+ Selecting this option means that you wish to build a kernel
+ for a machine with a QE coprocessor.
+
+if QUICC_ENGINE
+
+config UCC_SLOW
+ bool
+ default y if SERIAL_QE
+ help
+ This option provides qe_lib support to UCC slow
+ protocols: UART, BISYNC, QMC
+
+config UCC_FAST
+ bool
+ default y if UCC_GETH
+ help
+ This option provides qe_lib support to UCC fast
+ protocols: HDLC, Ethernet, ATM, transparent
+
+config UCC
+ bool
+ default y if UCC_FAST || UCC_SLOW
+
+endif
diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/drivers/qe/Makefile
similarity index 76%
copy from arch/powerpc/sysdev/qe_lib/Makefile
copy to drivers/qe/Makefile
index f1855c1..874fe1a 100644
--- a/arch/powerpc/sysdev/qe_lib/Makefile
+++ b/drivers/qe/Makefile
@@ -6,5 +6,3 @@ obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
obj-$(CONFIG_UCC) += ucc.o
obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
obj-$(CONFIG_UCC_FAST) += ucc_fast.o
-obj-$(CONFIG_QE_USB) += usb.o
-obj-$(CONFIG_QE_GPIO) += gpio.o
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/drivers/qe/qe.c
similarity index 99%
rename from arch/powerpc/sysdev/qe_lib/qe.c
rename to drivers/qe/qe.c
index 238a07b..4f443f6 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/drivers/qe/qe.c
@@ -32,8 +32,8 @@
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
#include <asm/prom.h>
#include <asm/rheap.h>
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/drivers/qe/qe_ic.c
similarity index 99%
rename from arch/powerpc/sysdev/qe_lib/qe_ic.c
rename to drivers/qe/qe_ic.c
index b2b87c3..f7e3d55 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/drivers/qe/qe_ic.c
@@ -28,7 +28,7 @@
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/prom.h>
-#include <asm/qe_ic.h>
+#include <linux/qe_ic.h>
#include "qe_ic.h"
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.h b/drivers/qe/qe_ic.h
similarity index 99%
rename from arch/powerpc/sysdev/qe_lib/qe_ic.h
rename to drivers/qe/qe_ic.h
index efef7ab..d98a864 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.h
+++ b/drivers/qe/qe_ic.h
@@ -16,7 +16,7 @@
#ifndef _POWERPC_SYSDEV_QE_IC_H
#define _POWERPC_SYSDEV_QE_IC_H
-#include <asm/qe_ic.h>
+#include <linux/qe_ic.h>
#define NR_QE_IC_INTS 64
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/drivers/qe/qe_io.c
similarity index 99%
rename from arch/powerpc/sysdev/qe_lib/qe_io.c
rename to drivers/qe/qe_io.c
index d099941..6d1edc4 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/drivers/qe/qe_io.c
@@ -21,7 +21,7 @@
#include <linux/ioport.h>
#include <asm/io.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include <asm/prom.h>
#include <sysdev/fsl_soc.h>
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/drivers/qe/ucc.c
similarity index 98%
rename from arch/powerpc/sysdev/qe_lib/ucc.c
rename to drivers/qe/ucc.c
index 621575b..274f7b3 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/drivers/qe/ucc.c
@@ -21,9 +21,9 @@
#include <asm/irq.h>
#include <asm/io.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
-#include <asm/ucc.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
+#include <linux/ucc.h>
int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
{
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/drivers/qe/ucc_fast.c
similarity index 99%
rename from arch/powerpc/sysdev/qe_lib/ucc_fast.c
rename to drivers/qe/ucc_fast.c
index 65aaf15..d2c054a 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c
+++ b/drivers/qe/ucc_fast.c
@@ -21,11 +21,11 @@
#include <linux/export.h>
#include <asm/io.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
-#include <asm/ucc.h>
-#include <asm/ucc_fast.h>
+#include <linux/ucc.h>
+#include <linux/ucc_fast.h>
void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
{
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/drivers/qe/ucc_slow.c
similarity index 98%
rename from arch/powerpc/sysdev/qe_lib/ucc_slow.c
rename to drivers/qe/ucc_slow.c
index befaf11..25d909b 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c
+++ b/drivers/qe/ucc_slow.c
@@ -21,11 +21,11 @@
#include <linux/export.h>
#include <asm/io.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
-#include <asm/ucc.h>
-#include <asm/ucc_slow.h>
+#include <linux/ucc.h>
+#include <linux/ucc_slow.h>
u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
{
diff --git a/drivers/s390/net/qeth_core_mpc.h b/drivers/s390/net/qeth_core_mpc.h
index cf6a90e..27664c9 100644
--- a/drivers/s390/net/qeth_core_mpc.h
+++ b/drivers/s390/net/qeth_core_mpc.h
@@ -8,7 +8,7 @@
#ifndef __QETH_CORE_MPC_H__
#define __QETH_CORE_MPC_H__
-#include <asm/qeth.h>
+#include <linux/qeth.h>
#define IPA_PDU_HEADER_SIZE 0x40
#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
diff --git a/drivers/spi/spi-fsl-cpm.c b/drivers/spi/spi-fsl-cpm.c
index 54b0637..37114fc 100644
--- a/drivers/spi/spi-fsl-cpm.c
+++ b/drivers/spi/spi-fsl-cpm.c
@@ -22,7 +22,7 @@
#include <linux/dma-mapping.h>
#include <linux/of_address.h>
#include <asm/cpm.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include "spi-fsl-lib.h"
#include "spi-fsl-cpm.h"
diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
index d569ca5..862c0ec 100644
--- a/drivers/tty/serial/ucc_uart.c
+++ b/drivers/tty/serial/ucc_uart.c
@@ -31,7 +31,7 @@
#include <linux/dma-mapping.h>
#include <linux/fs_uart_pd.h>
-#include <asm/ucc_slow.h>
+#include <linux/ucc_slow.h>
#include <linux/firmware.h>
#include <asm/reg.h>
diff --git a/drivers/usb/gadget/fsl_qe_udc.c b/drivers/usb/gadget/fsl_qe_udc.c
index ad54833..126b9d1 100644
--- a/drivers/usb/gadget/fsl_qe_udc.c
+++ b/drivers/usb/gadget/fsl_qe_udc.c
@@ -38,7 +38,7 @@
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/otg.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include <asm/cpm.h>
#include <asm/dma.h>
#include <asm/reg.h>
diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c
index 1cf68ea..66b8cb0 100644
--- a/drivers/usb/host/fhci-hcd.c
+++ b/drivers/usb/host/fhci-hcd.c
@@ -31,7 +31,7 @@
#include <linux/of_platform.h>
#include <linux/of_gpio.h>
#include <linux/slab.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include <asm/fsl_gtm.h>
#include "fhci.h"
diff --git a/drivers/usb/host/fhci-hub.c b/drivers/usb/host/fhci-hub.c
index 6af2512..ee8ddfa 100644
--- a/drivers/usb/host/fhci-hub.c
+++ b/drivers/usb/host/fhci-hub.c
@@ -24,7 +24,7 @@
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/gpio.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include "fhci.h"
/* virtual root hub specific descriptor */
diff --git a/drivers/usb/host/fhci-sched.c b/drivers/usb/host/fhci-sched.c
index 95ca598..04b0706 100644
--- a/drivers/usb/host/fhci-sched.c
+++ b/drivers/usb/host/fhci-sched.c
@@ -25,7 +25,7 @@
#include <linux/io.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
-#include <asm/qe.h>
+#include <linux/qe.h>
#include <asm/fsl_gtm.h>
#include "fhci.h"
diff --git a/drivers/usb/host/fhci.h b/drivers/usb/host/fhci.h
index 154e6a0..13489c2 100644
--- a/drivers/usb/host/fhci.h
+++ b/drivers/usb/host/fhci.h
@@ -27,8 +27,8 @@
#include <linux/io.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
-#include <asm/qe.h>
-#include <asm/immap_qe.h>
+#include <linux/qe.h>
+#include <linux/immap_qe.h>
#define USB_CLOCK 48000000
diff --git a/arch/powerpc/include/asm/immap_qe.h b/include/linux/immap_qe.h
similarity index 100%
rename from arch/powerpc/include/asm/immap_qe.h
rename to include/linux/immap_qe.h
diff --git a/arch/powerpc/include/asm/qe.h b/include/linux/qe.h
similarity index 99%
rename from arch/powerpc/include/asm/qe.h
rename to include/linux/qe.h
index 32b9bfa..668ef6d 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/include/linux/qe.h
@@ -20,7 +20,7 @@
#include <linux/errno.h>
#include <linux/err.h>
#include <asm/cpm.h>
-#include <asm/immap_qe.h>
+#include <linux/immap_qe.h>
#define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */
#define QE_NUM_OF_BRGS 16
diff --git a/arch/powerpc/include/asm/qe_ic.h b/include/linux/qe_ic.h
similarity index 100%
rename from arch/powerpc/include/asm/qe_ic.h
rename to include/linux/qe_ic.h
diff --git a/arch/powerpc/include/asm/ucc.h b/include/linux/ucc.h
similarity index 97%
rename from arch/powerpc/include/asm/ucc.h
rename to include/linux/ucc.h
index 6927ac2..6d8d309 100644
--- a/arch/powerpc/include/asm/ucc.h
+++ b/include/linux/ucc.h
@@ -15,8 +15,8 @@
#ifndef __UCC_H__
#define __UCC_H__
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
#define STATISTICS
diff --git a/arch/powerpc/include/asm/ucc_fast.h b/include/linux/ucc_fast.h
similarity index 99%
rename from arch/powerpc/include/asm/ucc_fast.h
rename to include/linux/ucc_fast.h
index 72ea9ba..4abc034 100644
--- a/arch/powerpc/include/asm/ucc_fast.h
+++ b/include/linux/ucc_fast.h
@@ -16,10 +16,10 @@
#include <linux/kernel.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
-#include <asm/ucc.h>
+#include <linux/ucc.h>
/* Receive BD's status */
#define R_E 0x80000000 /* buffer empty */
diff --git a/arch/powerpc/include/asm/ucc_slow.h b/include/linux/ucc_slow.h
similarity index 99%
rename from arch/powerpc/include/asm/ucc_slow.h
rename to include/linux/ucc_slow.h
index c44131e..f1e0061 100644
--- a/arch/powerpc/include/asm/ucc_slow.h
+++ b/include/linux/ucc_slow.h
@@ -17,10 +17,10 @@
#include <linux/kernel.h>
-#include <asm/immap_qe.h>
-#include <asm/qe.h>
+#include <linux/immap_qe.h>
+#include <linux/qe.h>
-#include <asm/ucc.h>
+#include <linux/ucc.h>
/* transmit BD's status */
#define T_R 0x80000000 /* ready bit */
--
1.8.5
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox