* [PATCH 2/4] powerpc/eeh: Introduce eeh_ops::err_inject
From: Gavin Shan @ 2014-08-26 7:56 UTC (permalink / raw)
To: linuxppc-dev; +Cc: qiudayu, Gavin Shan
In-Reply-To: <1409039779-392-1-git-send-email-gwshan@linux.vnet.ibm.com>
From: Mike Qiu <qiudayu@linux.vnet.ibm.com>
The patch introduces eeh_ops::err_inject(), which allows to inject
specified errors to indicated PE for testing purpose. The functionality
isn't support on pSeries platform. On PowerNV, the functionality
relies on OPAL API opal_pci_err_inject().
Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/eeh.h | 2 ++
arch/powerpc/platforms/powernv/eeh-ioda.c | 38 ++++++++++++++++++++++++++++
arch/powerpc/platforms/powernv/eeh-powernv.c | 26 +++++++++++++++++++
arch/powerpc/platforms/powernv/pci.h | 2 ++
arch/powerpc/platforms/pseries/eeh_pseries.c | 1 +
5 files changed, 69 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index f98b1b5..1951d07 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -199,6 +199,8 @@ struct eeh_ops {
int (*wait_state)(struct eeh_pe *pe, int max_wait);
int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
int (*configure_bridge)(struct eeh_pe *pe);
+ int (*err_inject)(struct eeh_pe *pe, int type, int function,
+ unsigned long addr, unsigned long mask);
int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
int (*write_config)(struct device_node *dn, int where, int size, u32 val);
int (*next_error)(struct eeh_pe **pe);
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index f3027b9..18099c5 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -673,6 +673,43 @@ static int ioda_eeh_configure_bridge(struct eeh_pe *pe)
return 0;
}
+static int ioda_eeh_err_inject(struct eeh_pe *pe, int type, int function,
+ unsigned long addr, unsigned long mask)
+{
+ struct pci_controller *hose = pe->phb;
+ struct pnv_phb *phb = hose->private_data;
+ s64 ret;
+
+ /* Sanity check on error type */
+ if (type < OpalErrinjctTypeIoaBusError ||
+ type > OpalErrinjctTypeIoaBusError64 ||
+ function < OpalEjtIoaLoadMemAddr ||
+ function > OpalEjtIoaDmaWriteMemTarget) {
+ pr_warn("%s: Invalid error type %d-%d\n",
+ __func__, type, function);
+ return -ERANGE;
+ }
+
+ /* Firmware supports error injection ? */
+ ret = opal_check_token(OPAL_PCI_ERR_INJCT);
+ if (ret != OPAL_TOKEN_PRESENT) {
+ pr_warn("%s: Firmware not support error injection (%lld)\n",
+ __func__, ret);
+ return -ENXIO;
+ }
+
+ /* Do error injection */
+ ret = opal_pci_err_inject(phb->opal_id, pe->addr,
+ type, function, addr, mask);
+ if (ret != OPAL_SUCCESS) {
+ pr_warn("%s: Failure %lld injecting error to PHB#%x-PE#%x\n",
+ __func__, ret, hose->global_number, pe->addr);
+ return -EIO;
+ }
+
+ return 0;
+}
+
static void ioda_eeh_hub_diag_common(struct OpalIoP7IOCErrorData *data)
{
/* GEM */
@@ -994,5 +1031,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
.reset = ioda_eeh_reset,
.get_log = ioda_eeh_get_log,
.configure_bridge = ioda_eeh_configure_bridge,
+ .err_inject = ioda_eeh_err_inject,
.next_error = ioda_eeh_next_error
};
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index fd7a16f..f5b1424 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -359,6 +359,31 @@ static int powernv_eeh_configure_bridge(struct eeh_pe *pe)
}
/**
+ * powernv_pe_err_inject - Inject specified error to the indicated PE
+ * @pe: the indicated PE
+ * @type: error type
+ * @function: specific error type
+ * @addr: address
+ * @mask: address mask
+ *
+ * The routine is called to inject specified error, which is
+ * determined by @type and @function, to the indicated PE for
+ * testing purpose.
+ */
+static int powernv_eeh_err_inject(struct eeh_pe *pe, int type, int function,
+ unsigned long addr, unsigned long mask)
+{
+ struct pci_controller *hose = pe->phb;
+ struct pnv_phb *phb = hose->private_data;
+ int ret = -EEXIST;
+
+ if (phb->eeh_ops && phb->eeh_ops->err_inject)
+ ret = phb->eeh_ops->err_inject(pe, type, function, addr, mask);
+
+ return ret;
+}
+
+/**
* powernv_eeh_next_error - Retrieve next EEH error to handle
* @pe: Affected PE
*
@@ -414,6 +439,7 @@ static struct eeh_ops powernv_eeh_ops = {
.wait_state = powernv_eeh_wait_state,
.get_log = powernv_eeh_get_log,
.configure_bridge = powernv_eeh_configure_bridge,
+ .err_inject = powernv_eeh_err_inject,
.read_config = pnv_pci_cfg_read,
.write_config = pnv_pci_cfg_write,
.next_error = powernv_eeh_next_error,
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 48494d4..b54af34 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -85,6 +85,8 @@ struct pnv_eeh_ops {
int (*get_log)(struct eeh_pe *pe, int severity,
char *drv_log, unsigned long len);
int (*configure_bridge)(struct eeh_pe *pe);
+ int (*err_inject)(struct eeh_pe *pe, int type, int function,
+ unsigned long addr, unsigned long mask);
int (*next_error)(struct eeh_pe **pe);
};
#endif /* CONFIG_EEH */
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index b645dc6..4fc5ff9 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -731,6 +731,7 @@ static struct eeh_ops pseries_eeh_ops = {
.wait_state = pseries_eeh_wait_state,
.get_log = pseries_eeh_get_log,
.configure_bridge = pseries_eeh_configure_bridge,
+ .err_inject = NULL,
.read_config = pseries_eeh_read_config,
.write_config = pseries_eeh_write_config,
.next_error = NULL,
--
1.8.3.2
^ permalink raw reply related
* Re: [PATCH 0/5] kexec: minor fixups and enhancements
From: Dave Young @ 2014-08-26 7:41 UTC (permalink / raw)
To: Vivek Goyal
Cc: Geoff Levand, kexec, linux-kernel, Eric Biederman, Andrew Morton,
linuxppc-dev
In-Reply-To: <20140825165916.GC14379@redhat.com>
On 08/25/14 at 12:59pm, Vivek Goyal wrote:
> On Fri, Aug 22, 2014 at 06:39:47PM +0000, Geoff Levand wrote:
> > Hi,
> >
> > Here are a few minor fixups and enhancements for kexec support.
> >
> > Patch 3 and 4 that add preprocessor macros for the kimage list flags are
> > ones that I use in the arm64 kexec support I am working on, so it would
> > be nice for those to go in.
> >
> > Please consider.
>
> Hi Geoff,
>
> Does arm64 has secureboot? If yes, then it might make sense to
> enable the new syscall kexec_file_load() on arm64 instead of trying
> to make old syscall work first.
It will save efforts for efi support as well, for the in-kernel loader we do not
necessary to save the efi physical addresses or runtime ranges to sysfs and
passing them to 2nd kernel, we can just copy them in kernel.
Thanks
Dave
^ permalink raw reply
* [PATCH] powerpc/perf: Fix ABIv2 kernel backtraces
From: Anton Blanchard @ 2014-08-26 2:44 UTC (permalink / raw)
To: benh, paulus, mpe, sukadev, aneesh.kumar; +Cc: linuxppc-dev
ABIv2 kernels are failing to backtrace through the kernel. An example:
39.30% readseek2_proce [kernel.kallsyms] [k] find_get_entry
|
--- find_get_entry
__GI___libc_read
The problem is in valid_next_sp() where we check that the new stack
pointer is at least STACK_FRAME_OVERHEAD below the previous one.
ABIv1 has a minimum stack frame size of 112 bytes consisting of 48 bytes
and 64 bytes of parameter save area. ABIv2 changes that to 32 bytes
with no paramter save area.
STACK_FRAME_OVERHEAD is in theory the minimum stack frame size,
but we over 240 uses of it, some of which assume that it includes
space for the parameter area.
We need to work through all our stack defines and rationalise them
but let's fix perf now by creating STACK_FRAME_MIN_SIZE and using
in valid_next_sp(). This fixes the issue:
30.64% readseek2_proce [kernel.kallsyms] [k] find_get_entry
|
--- find_get_entry
pagecache_get_page
generic_file_read_iter
new_sync_read
vfs_read
sys_read
syscall_exit
__GI___libc_read
Cc: stable@vger.kernel.org # 3.16+
Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
---
Index: b/arch/powerpc/include/asm/ptrace.h
===================================================================
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -47,6 +47,12 @@
STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
#define STACK_FRAME_MARKER 12
+#if defined(_CALL_ELF) && _CALL_ELF == 2
+#define STACK_FRAME_MIN_SIZE 32
+#else
+#define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD
+#endif
+
/* Size of dummy stack frame allocated when calling signal handler. */
#define __SIGNAL_FRAMESIZE 128
#define __SIGNAL_FRAMESIZE32 64
@@ -60,6 +66,7 @@
#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
#define STACK_FRAME_MARKER 2
+#define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD
/* Size of stack frame allocated when calling signal handler. */
#define __SIGNAL_FRAMESIZE 64
Index: b/arch/powerpc/perf/callchain.c
===================================================================
--- a/arch/powerpc/perf/callchain.c
+++ b/arch/powerpc/perf/callchain.c
@@ -35,7 +35,7 @@ static int valid_next_sp(unsigned long s
return 0; /* must be 16-byte aligned */
if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD))
return 0;
- if (sp >= prev_sp + STACK_FRAME_OVERHEAD)
+ if (sp >= prev_sp + STACK_FRAME_MIN_SIZE)
return 1;
/*
* sp could decrease when we jump off an interrupt stack
^ permalink raw reply
* [PATCH v2] powerpc: fsl_pci: Add forced PCI Agent enumeration
From: Aaron Sierra @ 2014-08-25 23:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Minghuan Lian
In-Reply-To: <1335786600.106191.1409010734055.JavaMail.zimbra@xes-inc.com>
The following commit prevents the MPC8548E on the XPedite5200 PrPMC
module from enumerating its PCI/PCI-X bus:
powerpc/fsl-pci: use 'Header Type' to identify PCIE mode
The previous patch prevents any Freescale PCI-X bridge from enumerating
the bus, if it is hardware strapped into Agent mode.
In PCI-X, the Host is responsible for driving the PCI-X initialization
pattern to devices on the bus, so that they know whether to operate in
conventional PCI or PCI-X mode as well as what the bus timing will be.
For a PCI-X PrPMC, the pattern is driven by the mezzanine carrier it is
installed onto. Therefore, PrPMCs are PCI-X Agents, but one per system
may still enumerate the bus.
This patch causes the device node of any PCI/PCI-X bridge strapped into
Agent mode to be checked for the fsl,pci-agent-force-enum property. If
the property is present in the node, the bridge will be allowed to
enumerate the bus.
Cc: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
---
.../bindings/pci/fsl,pci-agent-force-enum.txt | 27 ++++++++++++++++++++++
arch/powerpc/sysdev/fsl_pci.c | 3 ++-
2 files changed, 29 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/pci/fsl,pci-agent-force-enum.txt
diff --git a/Documentation/devicetree/bindings/pci/fsl,pci-agent-force-enum.txt b/Documentation/devicetree/bindings/pci/fsl,pci-agent-force-enum.txt
new file mode 100644
index 0000000..d8ac4a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/fsl,pci-agent-force-enum.txt
@@ -0,0 +1,27 @@
+* Bus Enumeration by Freescale PCI-X Agent
+
+Typically any Freescale PCI-X bridge hardware strapped into Agent mode
+is prevented from enumerating the bus. The PrPMC form-factor requires
+all mezzanines to be PCI-X Agents, but one per system may still
+enumerate the bus.
+
+The property defined below will allow a PCI-X bridge to be used for bus
+enumeration despite being strapped into Agent mode.
+
+Required properties:
+- fsl,pci-agent-force-enum : There is no value associated with this
+ property. The property itself is treated as a boolean.
+
+Example:
+
+ /* PCI-X bridge known to be PrPMC Monarch */
+ pci0: pci@ef008000 {
+ fsl,pci-agent-force-enum;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ ...
+ ...
+ };
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4bd091a..d13663f 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -522,7 +522,8 @@ int fsl_add_bridge(struct platform_device *pdev, int is_primary)
} else {
/* For PCI read PROG to identify controller mode */
early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif);
- if ((progif & 1) == 1)
+ if ((progif & 1) &&
+ !of_property_read_bool(dev, "fsl,pci-agent-force-enum"))
goto no_bridge;
}
--
1.9.1
^ permalink raw reply related
* [PATCH 9/9] powerpc/powernv: Enter deepest supported idle state in offline
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel; +Cc: Shreyas B. Prabhu, linuxppc-dev, Paul Mackerras
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
Enter winkle during offline if supported, else revert to sleep or nap.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
---
arch/powerpc/platforms/powernv/smp.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 3ad31d2..e3fc2c9 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -169,8 +169,10 @@ static void pnv_smp_cpu_kill_self(void)
while (!generic_check_cpu_restart(cpu)) {
ppc64_runlatch_off();
- /* If sleep is supported, go to sleep, instead of nap */
- if (idle_states & IDLE_USE_SLEEP)
+ /* Go to deepest supported idle state */
+ if (idle_states & IDLE_USE_WINKLE)
+ power7_winkle();
+ else if (idle_states & IDLE_USE_SLEEP)
power7_sleep();
else
power7_nap(1);
--
1.9.0
^ permalink raw reply related
* [PATCH 8/9] powerpc/powernv: Discover and enable winkle
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel; +Cc: Shreyas B. Prabhu, linuxppc-dev, Paul Mackerras
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
Discover winkle from device tree. If supported make OPAL calls
necessary to save HIDs, HMEER, HSPRG0 and LPCR.
Also make OPAL call when the HID0 value is modified during
split/unsplit of cores.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/opal.h | 1 +
arch/powerpc/platforms/powernv/powernv.h | 1 +
arch/powerpc/platforms/powernv/setup.c | 75 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/powernv/subcore.c | 15 +++++++
4 files changed, 92 insertions(+)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index d376020..a77957f 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -778,6 +778,7 @@ extern struct device_node *opal_node;
#define IDLE_INST_NAP 0x00010000 /* nap instruction can be used */
#define IDLE_INST_SLEEP 0x00020000 /* sleep instruction can be used */
#define IDLE_INST_SLEEP_ER1 0x00080000 /* Use sleep with work around*/
+#define IDLE_INST_WINKLE 0x00040000 /* winkle instruction can be used */
/* API functions */
int64_t opal_invalid_call(void);
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h
index 31ece13..76b37f8 100644
--- a/arch/powerpc/platforms/powernv/powernv.h
+++ b/arch/powerpc/platforms/powernv/powernv.h
@@ -27,6 +27,7 @@ static inline int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
#define IDLE_USE_NAP (1UL << 0)
#define IDLE_USE_SLEEP (1UL << 1)
+#define IDLE_USE_WINKLE (1UL << 3)
extern unsigned int pnv_get_supported_cpuidle_states(void);
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index f45b52d..13c5e49 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -273,6 +273,65 @@ unsigned int pnv_get_supported_cpuidle_states(void)
return supported_cpuidle_states;
}
+int pnv_save_sprs_for_winkle(void)
+{
+ int cpu;
+ int rc;
+
+ /*
+ * hid0, hid1, hid4, hid5, hmeer and lpcr values are symmetric accross
+ * all cpus at boot. Get these reg values of current cpu and use the
+ * same accross all cpus.
+ */
+ uint64_t lpcr_val = mfspr(SPRN_LPCR);
+ uint64_t hid0_val = mfspr(SPRN_HID0);
+ uint64_t hid1_val = mfspr(SPRN_HID1);
+ uint64_t hid4_val = mfspr(SPRN_HID4);
+ uint64_t hid5_val = mfspr(SPRN_HID5);
+ uint64_t hmeer_val = mfspr(SPRN_HMEER);
+
+ for_each_possible_cpu(cpu) {
+ uint64_t pir = get_hard_smp_processor_id(cpu);
+ uint64_t local_paca_ptr = (uint64_t)&paca[cpu];
+
+ rc = opal_slw_set_reg(pir, SPRN_HSPRG0, local_paca_ptr);
+ if (rc != 0)
+ return rc;
+
+ rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val);
+ if (rc != 0)
+ return rc;
+
+ /* HIDs are per core registers */
+ if (cpu_thread_in_core(cpu) == 0) {
+
+ rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val);
+ if (rc != 0)
+ return rc;
+
+ rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val);
+ if (rc != 0)
+ return rc;
+
+ rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val);
+ if (rc != 0)
+ return rc;
+
+ rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val);
+ if (rc != 0)
+ return rc;
+
+ rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val);
+ if (rc != 0)
+ return rc;
+
+ }
+
+ }
+
+ return 0;
+
+}
static int __init pnv_probe_idle_states(void)
{
struct device_node *power_mgt;
@@ -318,6 +377,22 @@ static int __init pnv_probe_idle_states(void)
supported_cpuidle_states |= IDLE_USE_SLEEP;
need_fastsleep_workaround = 1;
}
+
+ if (flags & IDLE_INST_WINKLE) {
+ /*
+ * If winkle is supported, save HSPRG0, HIDs and LPCR
+ * contents via OPAL. Enable winkle only if this
+ * succeeds.
+ */
+ int opal_ret_val = pnv_save_sprs_for_winkle();
+
+ if (!opal_ret_val)
+ supported_cpuidle_states |= IDLE_USE_WINKLE;
+ else
+ pr_warn("opal: opal_slw_set_reg failed with rc=%d, disabling winkle\n",
+ opal_ret_val);
+ }
+
}
return 0;
diff --git a/arch/powerpc/platforms/powernv/subcore.c b/arch/powerpc/platforms/powernv/subcore.c
index 894ecb3..47c70666e 100644
--- a/arch/powerpc/platforms/powernv/subcore.c
+++ b/arch/powerpc/platforms/powernv/subcore.c
@@ -24,6 +24,7 @@
#include <asm/smp.h>
#include "subcore.h"
+#include "powernv.h"
/*
@@ -159,6 +160,18 @@ static void wait_for_sync_step(int step)
mb();
}
+static void update_hid_in_slw(u64 hid0)
+{
+ u64 idle_states = pnv_get_supported_cpuidle_states();
+
+ if (idle_states & IDLE_USE_WINKLE) {
+ /* OPAL call to patch slw with the new HID0 value */
+ u64 cpu_pir = hard_smp_processor_id();
+
+ opal_slw_set_reg(cpu_pir, SPRN_HID0, hid0);
+ }
+}
+
static void unsplit_core(void)
{
u64 hid0, mask;
@@ -178,6 +191,7 @@ static void unsplit_core(void)
hid0 = mfspr(SPRN_HID0);
hid0 &= ~HID0_POWER8_DYNLPARDIS;
mtspr(SPRN_HID0, hid0);
+ update_hid_in_slw(hid0);
while (mfspr(SPRN_HID0) & mask)
cpu_relax();
@@ -214,6 +228,7 @@ static void split_core(int new_mode)
hid0 = mfspr(SPRN_HID0);
hid0 |= HID0_POWER8_DYNLPARDIS | split_parms[i].value;
mtspr(SPRN_HID0, hid0);
+ update_hid_in_slw(hid0);
/* Wait for it to happen */
while (!(mfspr(SPRN_HID0) & split_parms[i].mask))
--
1.9.0
^ permalink raw reply related
* [PATCH 7/9] powerpc/powernv: Add winkle infrastructure
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel; +Cc: Shreyas B. Prabhu, linuxppc-dev, Paul Mackerras
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
Winkle causes power to be gated off to the entire chiplet. Hence the
hypervisor/firmware state in the entire chiplet is lost.
This patch adds necessary infrastructure to support winkle. Specifically
does following:
- Before entering winkle, save state of registers that need to be
restored on wake up (SDR1, HFSCR)
- SRR1 bits 46:47 which is used to identify which power saving mode cpu
woke up from is '11' for both winkle and sleep. Hence introduce a flag
in PACA to distinguish b/w winkle and sleep.
- Upon waking up, restore all saved registers, recover slb
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Suggested-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/machdep.h | 1 +
arch/powerpc/include/asm/paca.h | 3 ++
arch/powerpc/include/asm/ppc-opcode.h | 2 +
arch/powerpc/include/asm/processor.h | 2 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kernel/exceptions-64s.S | 4 +-
arch/powerpc/kernel/idle.c | 11 +++++
arch/powerpc/kernel/idle_power7.S | 81 +++++++++++++++++++++++++++++++++-
arch/powerpc/platforms/powernv/setup.c | 24 ++++++++++
9 files changed, 126 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index f37014f..0a3ced9 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -301,6 +301,7 @@ struct machdep_calls {
/* Idle handlers */
void (*setup_idle)(void);
unsigned long (*power7_sleep)(void);
+ unsigned long (*power7_winkle)(void);
};
extern void e500_idle(void);
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index a5139ea..3358f09 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -158,6 +158,9 @@ struct paca_struct {
* early exception handler for use by high level C handler
*/
struct opal_machine_check_event *opal_mc_evt;
+
+ /* Flag to distinguish b/w sleep and winkle */
+ u8 offline_state;
#endif
#ifdef CONFIG_PPC_BOOK3S_64
/* Exclusive emergency stack pointer for machine check exception. */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 6f85362..5155be7 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -194,6 +194,7 @@
#define PPC_INST_NAP 0x4c000364
#define PPC_INST_SLEEP 0x4c0003a4
+#define PPC_INST_WINKLE 0x4c0003e4
/* A2 specific instructions */
#define PPC_INST_ERATWE 0x7c0001a6
@@ -374,6 +375,7 @@
#define PPC_NAP stringify_in_c(.long PPC_INST_NAP)
#define PPC_SLEEP stringify_in_c(.long PPC_INST_SLEEP)
+#define PPC_WINKLE stringify_in_c(.long PPC_INST_WINKLE)
/* BHRB instructions */
#define PPC_CLRBHRB stringify_in_c(.long PPC_INST_CLRBHRB)
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 41953cd..00e3df9 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -455,6 +455,8 @@ extern void arch_setup_idle(void);
extern void power7_nap(int check_irq);
extern unsigned long power7_sleep(void);
extern unsigned long __power7_sleep(void);
+extern unsigned long power7_winkle(void);
+extern unsigned long __power7_winkle(void);
extern void flush_instruction_cache(void);
extern void hard_reset_now(void);
extern void poweroff_now(void);
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 9d7dede..ea98817 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -731,6 +731,7 @@ int main(void)
DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
+ DEFINE(PACAOFFLINESTATE, offsetof(struct paca_struct, offline_state));
#endif
return 0;
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index c64f3cc0..6c6db2b 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -133,8 +133,8 @@ BEGIN_FTR_SECTION
b power7_wakeup_noloss
2: b power7_wakeup_loss
- /* Fast Sleep wakeup on PowerNV */
-8: b power7_wakeup_tb_loss
+ /* Fast Sleep / Winkle wakeup on PowerNV */
+8: b power7_wakeup_hv_state_loss
9:
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 1f268e0..ed46217 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -98,6 +98,17 @@ unsigned long power7_sleep(void)
return ret;
}
+unsigned long power7_winkle(void)
+{
+ unsigned long ret;
+
+ if (ppc_md.power7_winkle)
+ ret = ppc_md.power7_winkle();
+ else
+ ret = __power7_winkle();
+ return ret;
+}
+
int powersave_nap;
#ifdef CONFIG_SYSCTL
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index c3481c9..87b2556 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -18,6 +18,13 @@
#include <asm/hw_irq.h>
#include <asm/kvm_book3s_asm.h>
#include <asm/opal.h>
+#include <asm/mmu-hash64.h>
+
+/*
+ * Use volatile GPRs' space to save essential SPRs before entering winkle
+ */
+#define _SDR1 GPR3
+#define _TSCR GPR4
#undef DEBUG
@@ -39,6 +46,7 @@
* Pass requested state in r3:
* 0 - nap
* 1 - sleep
+ * 2 - winkle
*
* To check IRQ_HAPPENED in r4
* 0 - don't check
@@ -109,9 +117,27 @@ _GLOBAL(power7_enter_nap_mode)
#endif
cmpwi cr0,r3,1
beq 2f
+ cmpwi cr0,r3,2
+ beq 3f
IDLE_STATE_ENTER_SEQ(PPC_NAP)
/* No return */
-2: IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
+2:
+ li r4,1
+ stb r4,PACAOFFLINESTATE(r13)
+ IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
+ /* No return */
+
+3:
+ mfspr r4,SPRN_SDR1
+ std r4,_SDR1(r1)
+
+ mfspr r4,SPRN_TSCR
+ std r4,_TSCR(r1)
+
+ /* Enter winkle */
+ li r4,0
+ stb r4,PACAOFFLINESTATE(r13)
+ IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
/* No return */
_GLOBAL(power7_idle)
@@ -187,6 +213,59 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
20: nop;
+_GLOBAL(__power7_winkle)
+ li r3,2
+ li r4,1
+ b power7_powersave_common
+ /* No return */
+
+_GLOBAL(power7_wakeup_hv_state_loss)
+ /* Check paca flag to diffentiate b/w fast sleep and winkle */
+ lbz r4,PACAOFFLINESTATE(13)
+ cmpwi cr0,r4,0
+ bne power7_wakeup_tb_loss
+
+ ld r2,PACATOC(r13);
+ ld r1,PACAR1(r13)
+
+ bl __restore_cpu_power8
+
+ /* Time base re-sync */
+ li r3,OPAL_RESYNC_TIMEBASE
+ bl opal_call_realmode;
+
+ /* Restore SLB from PACA */
+ ld r8,PACA_SLBSHADOWPTR(r13)
+
+ .rept SLB_NUM_BOLTED
+ li r3, SLBSHADOW_SAVEAREA
+ LDX_BE r5, r8, r3
+ addi r3, r3, 8
+ LDX_BE r6, r8, r3
+ andis. r7,r5,SLB_ESID_V@h
+ beq 1f
+ slbmte r6,r5
+1: addi r8,r8,16
+ .endr
+
+ ld r4,_SDR1(r1)
+ mtspr SPRN_SDR1,r4
+
+ ld r4,_TSCR(r1)
+ mtspr SPRN_TSCR,r4
+
+ REST_NVGPRS(r1)
+ REST_GPR(2, r1)
+ ld r3,_CCR(r1)
+ ld r4,_MSR(r1)
+ ld r5,_NIP(r1)
+ addi r1,r1,INT_FRAME_SIZE
+ mtcr r3
+ mfspr r3,SPRN_SRR1 /* Return SRR1 */
+ mtspr SPRN_SRR1,r4
+ mtspr SPRN_SRR0,r5
+ rfid
+
_GLOBAL(power7_wakeup_tb_loss)
ld r2,PACATOC(r13);
ld r1,PACAR1(r13)
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 9d9a898..f45b52d 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -370,6 +370,29 @@ static unsigned long pnv_power7_sleep(void)
return srr1;
}
+/*
+ * We need to keep track of offline cpus also for calling
+ * fastsleep workaround appropriately
+ */
+static unsigned long pnv_power7_winkle(void)
+{
+ int cpu, primary_thread;
+ unsigned long srr1;
+
+ cpu = smp_processor_id();
+ primary_thread = cpu_first_thread_sibling(cpu);
+
+ if (need_fastsleep_workaround) {
+ pnv_apply_fastsleep_workaround(1, primary_thread);
+ srr1 = __power7_winkle();
+ pnv_apply_fastsleep_workaround(0, primary_thread);
+ } else {
+ srr1 = __power7_winkle();
+ }
+ return srr1;
+}
+
+
static void __init pnv_setup_machdep_opal(void)
{
ppc_md.get_boot_time = opal_get_boot_time;
@@ -384,6 +407,7 @@ static void __init pnv_setup_machdep_opal(void)
ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
ppc_md.setup_idle = pnv_setup_idle;
ppc_md.power7_sleep = pnv_power7_sleep;
+ ppc_md.power7_winkle = pnv_power7_winkle;
}
#ifdef CONFIG_PPC_POWERNV_RTAS
--
1.9.0
^ permalink raw reply related
* [PATCH 6/9] powerpc: Adding macro for accessing Thread Switch Control Register
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel; +Cc: Shreyas B. Prabhu, linuxppc-dev, Paul Mackerras
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/reg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 0c05059..cb65a73 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -371,6 +371,7 @@
#define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */
#define SPRN_DBAT7U 0x23E /* Data BAT 7 Upper Register */
#define SPRN_PPR 0x380 /* SMT Thread status Register */
+#define SPRN_TSCR 0x399 /* Thread Switch Control Register */
#define SPRN_DEC 0x016 /* Decrement Register */
#define SPRN_DER 0x095 /* Debug Enable Regsiter */
--
1.9.0
^ permalink raw reply related
* [PATCH 5/9] powerpc/powernv: Add OPAL call to save and restore
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel; +Cc: Shreyas B. Prabhu, linuxppc-dev, Paul Mackerras
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
PORE can be programmed to restore hypervisor registers when waking up
from deep cpu idle states like winkle.
Add call to pass SPR address and value to OPAL, which in turn will
program PORE to restore the register state.
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Suggested-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/opal.h | 2 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 166d572..d376020 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -150,6 +150,7 @@ struct opal_sg_list {
#define OPAL_PCI_EEH_FREEZE_SET 97
#define OPAL_HANDLE_HMI 98
#define OPAL_CONFIG_IDLE_STATE 99
+#define OPAL_SLW_SET_REG 100
#define OPAL_REGISTER_DUMP_REGION 101
#define OPAL_UNREGISTER_DUMP_REGION 102
@@ -978,6 +979,7 @@ extern int opal_handle_hmi_exception(struct pt_regs *regs);
extern void opal_shutdown(void);
extern int opal_resync_timebase(void);
int64_t opal_config_idle_state(uint64_t state, uint64_t enter);
+int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
extern void opal_lpc_init(void);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 8d1e724..12e5d46 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -246,5 +246,6 @@ OPAL_CALL(opal_get_param, OPAL_GET_PARAM);
OPAL_CALL(opal_set_param, OPAL_SET_PARAM);
OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
OPAL_CALL(opal_config_idle_state, OPAL_CONFIG_IDLE_STATE);
+OPAL_CALL(opal_slw_set_reg, OPAL_SLW_SET_REG);
OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);
--
1.9.0
^ permalink raw reply related
* [PATCH 4/9] powerpc/powernv/cpuidle: Add workaround to enable fastsleep
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel
Cc: Shreyas B. Prabhu, linux-pm, Rafael J. Wysocki, Paul Mackerras,
Preeti U Murthy, linuxppc-dev
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
From: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this fencing between L2 and
L3 caches get delayed by a cpu cycle. This can delay L3 response to
the other cpus if they request for data during this time. Thus they
would fetch the same data from the memory which could lead to data
corruption if L3 cache is not flushed.
The cpu idle states save power at a core level and not at a thread level.
Hence powersavings is based on the shallowest idle state that a thread
of a core is in. The above issue in fastsleep will arise only when
all the threads in a core either enter fastsleep or some of them enter
any deeper idle states, with only a few being in fastsleep. This patch
therefore implements a workaround this bug by ensuring
that, each time a cpu goes to fastsleep, it checks if it is the last
thread in the core to enter fastsleep. If so, it needs to make an opal
call to get around the above mentioned fastsleep problem in the hardware
before issuing the sleep instruction.
Similarly when a thread in a core comes out of fastsleep, it needs
to verify if its the first thread in the core to come out of fastsleep
and issue the opal call to revert the changes made while entering
fastsleep.
For the same reason mentioned above we need to take care of offline threads
as well since we allow them to enter fastsleep and with support for
deep winkle soon coming in they can enter winkle as well. We therefore
ensure that even offline threads make the above mentioned opal calls
similarly, so that as long as the threads in a core are in and
idle state >= fastsleep, we have the workaround in place. Whenever a
thread comes out of either of these states, it needs to verify if the
opal call has been made and if so it will revert it. For now this patch
ensures that offline threads enter fastsleep.
We need to be able to synchronize the cpus in a core which are entering
and exiting fastsleep so as to ensure that the last thread in the core
to enter fastsleep and the first to exit fastsleep *only* issue the opal
call. To do so, we need a per-core lock and counter. The counter is
required to keep track of the number of threads in a core which are in
idle state >= fastsleep. To make the implementation of this simple, we
introduce a per-cpu lock and counter and every thread always takes the
primary thread's lock, modifies the primary thread's counter. This
effectively makes them per-core entities.
But the workaround is abstracted in the powernv core code and neither
the hotplug path nor the cpuidle driver need to bother about it. All
they need to know is if fastsleep, with error or no error is present as
an idle state.
Cc: linux-pm@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/machdep.h | 3 +
arch/powerpc/include/asm/opal.h | 3 +
arch/powerpc/include/asm/processor.h | 4 +-
arch/powerpc/kernel/idle.c | 19 ++++
arch/powerpc/kernel/idle_power7.S | 2 +-
arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
arch/powerpc/platforms/powernv/setup.c | 139 ++++++++++++++++++-------
drivers/cpuidle/cpuidle-powernv.c | 8 +-
8 files changed, 140 insertions(+), 39 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index b125cea..f37014f 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -298,6 +298,9 @@ struct machdep_calls {
#ifdef CONFIG_MEMORY_HOTREMOVE
int (*remove_memory)(u64, u64);
#endif
+ /* Idle handlers */
+ void (*setup_idle)(void);
+ unsigned long (*power7_sleep)(void);
};
extern void e500_idle(void);
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 28b8342..166d572 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -149,6 +149,7 @@ struct opal_sg_list {
#define OPAL_DUMP_INFO2 94
#define OPAL_PCI_EEH_FREEZE_SET 97
#define OPAL_HANDLE_HMI 98
+#define OPAL_CONFIG_IDLE_STATE 99
#define OPAL_REGISTER_DUMP_REGION 101
#define OPAL_UNREGISTER_DUMP_REGION 102
@@ -775,6 +776,7 @@ extern struct device_node *opal_node;
/* Flags used for idle state discovery from the device tree */
#define IDLE_INST_NAP 0x00010000 /* nap instruction can be used */
#define IDLE_INST_SLEEP 0x00020000 /* sleep instruction can be used */
+#define IDLE_INST_SLEEP_ER1 0x00080000 /* Use sleep with work around*/
/* API functions */
int64_t opal_invalid_call(void);
@@ -975,6 +977,7 @@ extern int opal_handle_hmi_exception(struct pt_regs *regs);
extern void opal_shutdown(void);
extern int opal_resync_timebase(void);
+int64_t opal_config_idle_state(uint64_t state, uint64_t enter);
extern void opal_lpc_init(void);
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index dda7ac4..41953cd 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -451,8 +451,10 @@ extern unsigned long cpuidle_disable;
enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
extern int powersave_nap; /* set if nap mode can be used in idle loop */
+extern void arch_setup_idle(void);
extern void power7_nap(int check_irq);
-extern void power7_sleep(void);
+extern unsigned long power7_sleep(void);
+extern unsigned long __power7_sleep(void);
extern void flush_instruction_cache(void);
extern void hard_reset_now(void);
extern void poweroff_now(void);
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index d7216c9..1f268e0 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -32,6 +32,9 @@
#include <asm/machdep.h>
#include <asm/runlatch.h>
#include <asm/smp.h>
+#include <asm/cputhreads.h>
+#include <asm/firmware.h>
+#include <asm/opal.h>
unsigned long cpuidle_disable = IDLE_NO_OVERRIDE;
@@ -78,6 +81,22 @@ void arch_cpu_idle(void)
HMT_medium();
ppc64_runlatch_on();
}
+void arch_setup_idle(void)
+{
+ if (ppc_md.setup_idle)
+ ppc_md.setup_idle();
+}
+
+unsigned long power7_sleep(void)
+{
+ unsigned long ret;
+
+ if (ppc_md.power7_sleep)
+ ret = ppc_md.power7_sleep();
+ else
+ ret = __power7_sleep();
+ return ret;
+}
int powersave_nap;
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index be05841..c3481c9 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -129,7 +129,7 @@ _GLOBAL(power7_nap)
b power7_powersave_common
/* No return */
-_GLOBAL(power7_sleep)
+_GLOBAL(__power7_sleep)
li r3,1
li r4,1
b power7_powersave_common
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 2e6ce1b..8d1e724 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -245,5 +245,6 @@ OPAL_CALL(opal_sensor_read, OPAL_SENSOR_READ);
OPAL_CALL(opal_get_param, OPAL_GET_PARAM);
OPAL_CALL(opal_set_param, OPAL_SET_PARAM);
OPAL_CALL(opal_handle_hmi, OPAL_HANDLE_HMI);
+OPAL_CALL(opal_config_idle_state, OPAL_CONFIG_IDLE_STATE);
OPAL_CALL(opal_register_dump_region, OPAL_REGISTER_DUMP_REGION);
OPAL_CALL(opal_unregister_dump_region, OPAL_UNREGISTER_DUMP_REGION);
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 2dca1d8..9d9a898 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -36,9 +36,20 @@
#include <asm/opal.h>
#include <asm/kexec.h>
#include <asm/smp.h>
+#include <asm/cputhreads.h>
#include "powernv.h"
+/* Per-cpu structures to keep track of cpus of a core that
+ * are in idle states >= fastsleep so as to call opal for
+ * sleep setup when the entire core is ready to go to fastsleep.
+ *
+ * We need sometihng similar to a per-core lock. For now we
+ * achieve this by taking the lock of the primary thread in the core.
+ */
+static DEFINE_PER_CPU(spinlock_t, fastsleep_override_lock);
+static DEFINE_PER_CPU(int, fastsleep_cnt);
+
static void __init pnv_setup_arch(void)
{
set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
@@ -254,35 +265,8 @@ static unsigned long pnv_memory_block_size(void)
}
#endif
-static void __init pnv_setup_machdep_opal(void)
-{
- ppc_md.get_boot_time = opal_get_boot_time;
- ppc_md.get_rtc_time = opal_get_rtc_time;
- ppc_md.set_rtc_time = opal_set_rtc_time;
- ppc_md.restart = pnv_restart;
- ppc_md.power_off = pnv_power_off;
- ppc_md.halt = pnv_halt;
- ppc_md.machine_check_exception = opal_machine_check;
- ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
- ppc_md.hmi_exception_early = opal_hmi_exception_early;
- ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
-}
-
-#ifdef CONFIG_PPC_POWERNV_RTAS
-static void __init pnv_setup_machdep_rtas(void)
-{
- if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
- ppc_md.get_boot_time = rtas_get_boot_time;
- ppc_md.get_rtc_time = rtas_get_rtc_time;
- ppc_md.set_rtc_time = rtas_set_rtc_time;
- }
- ppc_md.restart = rtas_restart;
- ppc_md.power_off = rtas_power_off;
- ppc_md.halt = rtas_halt;
-}
-#endif /* CONFIG_PPC_POWERNV_RTAS */
-
static unsigned int supported_cpuidle_states;
+static int need_fastsleep_workaround;
unsigned int pnv_get_supported_cpuidle_states(void)
{
@@ -292,12 +276,13 @@ unsigned int pnv_get_supported_cpuidle_states(void)
static int __init pnv_probe_idle_states(void)
{
struct device_node *power_mgt;
- struct property *prop;
int dt_idle_states;
- u32 *flags;
+ const __be32 *idle_state_flags;
+ u32 len_flags, flags;
int i;
supported_cpuidle_states = 0;
+ need_fastsleep_workaround = 0;
if (cpuidle_disable != IDLE_NO_OVERRIDE)
return 0;
@@ -311,21 +296,28 @@ static int __init pnv_probe_idle_states(void)
return 0;
}
- prop = of_find_property(power_mgt, "ibm,cpu-idle-state-flags", NULL);
- if (!prop) {
+ idle_state_flags = of_get_property(power_mgt,
+ "ibm,cpu-idle-state-flags", &len_flags);
+ if (!idle_state_flags) {
pr_warn("DT-PowerMgmt: missing ibm,cpu-idle-state-flags\n");
return 0;
}
- dt_idle_states = prop->length / sizeof(u32);
- flags = (u32 *) prop->value;
+ dt_idle_states = len_flags / sizeof(u32);
for (i = 0; i < dt_idle_states; i++) {
- if (flags[i] & IDLE_INST_NAP)
+
+ flags = be32_to_cpu(idle_state_flags[i]);
+ if (flags & IDLE_INST_NAP)
supported_cpuidle_states |= IDLE_USE_NAP;
- if (flags[i] & IDLE_INST_SLEEP)
+ if (flags & IDLE_INST_SLEEP)
supported_cpuidle_states |= IDLE_USE_SLEEP;
+
+ if (flags & IDLE_INST_SLEEP_ER1) {
+ supported_cpuidle_states |= IDLE_USE_SLEEP;
+ need_fastsleep_workaround = 1;
+ }
}
return 0;
@@ -333,6 +325,81 @@ static int __init pnv_probe_idle_states(void)
subsys_initcall(pnv_probe_idle_states);
+static void pnv_setup_idle(void)
+{
+ int cpu;
+
+ for_each_possible_cpu(cpu) {
+ spin_lock_init(&per_cpu(fastsleep_override_lock, cpu));
+ per_cpu(fastsleep_cnt, cpu) = threads_per_core;
+ }
+}
+
+static void
+pnv_apply_fastsleep_workaround(bool enter_fastsleep, int primary_thread)
+{
+ if (enter_fastsleep) {
+ spin_lock(&per_cpu(fastsleep_override_lock, primary_thread));
+ if (--(per_cpu(fastsleep_cnt, primary_thread)) == 0)
+ opal_config_idle_state(1, 1);
+ spin_unlock(&per_cpu(fastsleep_override_lock, primary_thread));
+ } else {
+ spin_lock(&per_cpu(fastsleep_override_lock, primary_thread));
+ if ((per_cpu(fastsleep_cnt, primary_thread)) == 0)
+ opal_config_idle_state(1, 0);
+ per_cpu(fastsleep_cnt, primary_thread)++;
+ spin_unlock(&per_cpu(fastsleep_override_lock, primary_thread));
+ }
+}
+
+static unsigned long pnv_power7_sleep(void)
+{
+ int cpu, primary_thread;
+ unsigned long srr1;
+
+ cpu = smp_processor_id();
+ primary_thread = cpu_first_thread_sibling(cpu);
+
+ if (need_fastsleep_workaround) {
+ pnv_apply_fastsleep_workaround(1, primary_thread);
+ srr1 = __power7_sleep();
+ pnv_apply_fastsleep_workaround(0, primary_thread);
+ } else {
+ srr1 = __power7_sleep();
+ }
+ return srr1;
+}
+
+static void __init pnv_setup_machdep_opal(void)
+{
+ ppc_md.get_boot_time = opal_get_boot_time;
+ ppc_md.get_rtc_time = opal_get_rtc_time;
+ ppc_md.set_rtc_time = opal_set_rtc_time;
+ ppc_md.restart = pnv_restart;
+ ppc_md.power_off = pnv_power_off;
+ ppc_md.halt = pnv_halt;
+ ppc_md.machine_check_exception = opal_machine_check;
+ ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
+ ppc_md.hmi_exception_early = opal_hmi_exception_early;
+ ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
+ ppc_md.setup_idle = pnv_setup_idle;
+ ppc_md.power7_sleep = pnv_power7_sleep;
+}
+
+#ifdef CONFIG_PPC_POWERNV_RTAS
+static void __init pnv_setup_machdep_rtas(void)
+{
+ if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
+ ppc_md.get_boot_time = rtas_get_boot_time;
+ ppc_md.get_rtc_time = rtas_get_rtc_time;
+ ppc_md.set_rtc_time = rtas_set_rtc_time;
+ }
+ ppc_md.restart = rtas_restart;
+ ppc_md.power_off = rtas_power_off;
+ ppc_md.halt = rtas_halt;
+}
+#endif /* CONFIG_PPC_POWERNV_RTAS */
+
static int __init pnv_probe(void)
{
unsigned long root = of_get_flat_dt_root();
diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c
index 3ceff53..92ad134 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -18,6 +18,7 @@
#include <asm/firmware.h>
#include <asm/opal.h>
#include <asm/runlatch.h>
+#include <asm/processor.h>
/* Flags and constants used in PowerNV platform */
@@ -210,7 +211,8 @@ static int powernv_add_idle_states(void)
nr_idle_states++;
}
- if (flags & IDLE_INST_SLEEP) {
+ if ((flags & IDLE_INST_SLEEP_ER1) ||
+ (flags & IDLE_INST_SLEEP)) {
/* Add FASTSLEEP state */
strcpy(powernv_states[nr_idle_states].name, "FastSleep");
strcpy(powernv_states[nr_idle_states].desc, "FastSleep");
@@ -264,6 +266,10 @@ static int __init powernv_processor_idle_init(void)
register_cpu_notifier(&setup_hotplug_notifier);
printk(KERN_DEBUG "powernv_idle_driver registered\n");
+
+ /* If any idle states require special
+ * initializations before cpuidle kicks in */
+ arch_setup_idle();
return 0;
}
--
1.9.0
^ permalink raw reply related
* [PATCH 3/9] powerpc/kvm/book3s_hv: Enable CPUs to run guest after waking up from fast-sleep
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel
Cc: Shreyas B. Prabhu, Paul Mackerras, Preeti U Murthy, linuxppc-dev
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
When guests have to be launched, the secondary threads which are offline
are woken up to run the guests. Today these threads wake up from nap
and check if they have to run guests. Now that the offline secondary
threads can go to fastsleep or going ahead a deeper idle state such as winkle,
add this check in the wakeup from any of the deep idle states path as well.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Suggested-by: "Srivatsa S. Bhat" <srivatsa@mit.edu>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
[ Changelog added by <preeti@linux.vnet.ibm.com> ]
Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
---
arch/powerpc/kernel/exceptions-64s.S | 35 ++++++++++++++++-------------------
1 file changed, 16 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 050f79a..c64f3cc0 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -100,25 +100,8 @@ system_reset_pSeries:
SET_SCRATCH0(r13)
#ifdef CONFIG_PPC_P7_NAP
BEGIN_FTR_SECTION
- /* Running native on arch 2.06 or later, check if we are
- * waking up from nap. We only handle no state loss and
- * supervisor state loss. We do -not- handle hypervisor
- * state loss at this time.
- */
- mfspr r13,SPRN_SRR1
- rlwinm. r13,r13,47-31,30,31
- beq 9f
- /* waking up from powersave (nap) state */
- cmpwi cr1,r13,2
- /* Total loss of HV state is fatal, we could try to use the
- * PIR to locate a PACA, then use an emergency stack etc...
- * OPAL v3 based powernv platforms have new idle states
- * which fall in this catagory.
- */
- bgt cr1,8f
GET_PACA(r13)
-
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
li r0,KVM_HWTHREAD_IN_KERNEL
stb r0,HSTATE_HWTHREAD_STATE(r13)
@@ -131,13 +114,27 @@ BEGIN_FTR_SECTION
1:
#endif
+ /* Running native on arch 2.06 or later, check if we are
+ * waking up from nap. We only handle no state loss and
+ * supervisor state loss. We do -not- handle hypervisor
+ * state loss at this time.
+ */
+ mfspr r13,SPRN_SRR1
+ rlwinm. r13,r13,47-31,30,31
+ beq 9f
+
+ /* waking up from powersave (nap) state */
+ cmpwi cr1,r13,2
+ GET_PACA(r13)
+
+ bgt cr1,8f
+
beq cr1,2f
b power7_wakeup_noloss
2: b power7_wakeup_loss
/* Fast Sleep wakeup on PowerNV */
-8: GET_PACA(r13)
- b power7_wakeup_tb_loss
+8: b power7_wakeup_tb_loss
9:
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
--
1.9.0
^ permalink raw reply related
* [PATCH 1/9] powerpc/powernv: Enable Offline CPUs to enter deep idle states
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel
Cc: Shreyas B. Prabhu, Srivatsa S. Bhat, linux-pm, Rafael J. Wysocki,
Paul Mackerras, Preeti U. Murthy, linuxppc-dev
In-Reply-To: <1408989673-14137-1-git-send-email-shreyas@linux.vnet.ibm.com>
From: "Srivatsa S. Bhat" <srivatsa@MIT.EDU>
The offline cpus should enter deep idle states so as to gain maximum
powersavings when the entire core is offline. To do so the offline path
must be made aware of the available deepest idle state. Hence probe the
device tree for the possible idle states in powernv core code and
expose the deepest idle state through flags.
Since the device tree is probed by the cpuidle driver as well, move
the parameters required to discover the idle states into an appropriate
common place to both the driver and the powernv core code.
Another point is that fastsleep idle state may require workarounds in
the kernel to function properly. This workaround is introduced in the
subsequent patches. However neither the cpuidle driver or the hotplug
path need be bothered about this workaround.
They will be taken care of by the core powernv code.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: linux-pm@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Srivatsa S. Bhat <srivatsa@MIT.EDU>
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
[ Changelog modified by preeti@linux.vnet.ibm.com ]
Signed-off-by: Preeti U. Murthy <preeti@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/opal.h | 4 +++
arch/powerpc/platforms/powernv/powernv.h | 7 +++++
arch/powerpc/platforms/powernv/setup.c | 51 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/powernv/smp.c | 11 ++++++-
drivers/cpuidle/cpuidle-powernv.c | 7 ++---
5 files changed, 75 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 86055e5..28b8342 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -772,6 +772,10 @@ extern struct kobject *opal_kobj;
/* /ibm,opal */
extern struct device_node *opal_node;
+/* Flags used for idle state discovery from the device tree */
+#define IDLE_INST_NAP 0x00010000 /* nap instruction can be used */
+#define IDLE_INST_SLEEP 0x00020000 /* sleep instruction can be used */
+
/* API functions */
int64_t opal_invalid_call(void);
int64_t opal_console_write(int64_t term_number, __be64 *length,
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h
index 75501bf..31ece13 100644
--- a/arch/powerpc/platforms/powernv/powernv.h
+++ b/arch/powerpc/platforms/powernv/powernv.h
@@ -23,6 +23,13 @@ static inline int pnv_pci_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
}
#endif
+/* Flags to indicate which of the CPU idle states are available for use */
+
+#define IDLE_USE_NAP (1UL << 0)
+#define IDLE_USE_SLEEP (1UL << 1)
+
+extern unsigned int pnv_get_supported_cpuidle_states(void);
+
extern void pnv_lpc_init(void);
bool cpu_core_split_required(void);
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 5a0e2dc..2dca1d8 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -282,6 +282,57 @@ static void __init pnv_setup_machdep_rtas(void)
}
#endif /* CONFIG_PPC_POWERNV_RTAS */
+static unsigned int supported_cpuidle_states;
+
+unsigned int pnv_get_supported_cpuidle_states(void)
+{
+ return supported_cpuidle_states;
+}
+
+static int __init pnv_probe_idle_states(void)
+{
+ struct device_node *power_mgt;
+ struct property *prop;
+ int dt_idle_states;
+ u32 *flags;
+ int i;
+
+ supported_cpuidle_states = 0;
+
+ if (cpuidle_disable != IDLE_NO_OVERRIDE)
+ return 0;
+
+ if (!firmware_has_feature(FW_FEATURE_OPALv3))
+ return 0;
+
+ power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
+ if (!power_mgt) {
+ pr_warn("opal: PowerMgmt Node not found\n");
+ return 0;
+ }
+
+ prop = of_find_property(power_mgt, "ibm,cpu-idle-state-flags", NULL);
+ if (!prop) {
+ pr_warn("DT-PowerMgmt: missing ibm,cpu-idle-state-flags\n");
+ return 0;
+ }
+
+ dt_idle_states = prop->length / sizeof(u32);
+ flags = (u32 *) prop->value;
+
+ for (i = 0; i < dt_idle_states; i++) {
+ if (flags[i] & IDLE_INST_NAP)
+ supported_cpuidle_states |= IDLE_USE_NAP;
+
+ if (flags[i] & IDLE_INST_SLEEP)
+ supported_cpuidle_states |= IDLE_USE_SLEEP;
+ }
+
+ return 0;
+}
+
+subsys_initcall(pnv_probe_idle_states);
+
static int __init pnv_probe(void)
{
unsigned long root = of_get_flat_dt_root();
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 5fcfcf4..3ad31d2 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -149,6 +149,7 @@ static int pnv_smp_cpu_disable(void)
static void pnv_smp_cpu_kill_self(void)
{
unsigned int cpu;
+ unsigned long idle_states;
/* Standard hot unplug procedure */
local_irq_disable();
@@ -159,13 +160,21 @@ static void pnv_smp_cpu_kill_self(void)
generic_set_cpu_dead(cpu);
smp_wmb();
+ idle_states = pnv_get_supported_cpuidle_states();
+
/* We don't want to take decrementer interrupts while we are offline,
* so clear LPCR:PECE1. We keep PECE2 enabled.
*/
mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
while (!generic_check_cpu_restart(cpu)) {
ppc64_runlatch_off();
- power7_nap(1);
+
+ /* If sleep is supported, go to sleep, instead of nap */
+ if (idle_states & IDLE_USE_SLEEP)
+ power7_sleep();
+ else
+ power7_nap(1);
+
ppc64_runlatch_on();
/* Reenable IRQs briefly to clear the IPI that woke us */
diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c
index a64be57..23d2743 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -16,13 +16,12 @@
#include <asm/machdep.h>
#include <asm/firmware.h>
+#include <asm/opal.h>
#include <asm/runlatch.h>
/* Flags and constants used in PowerNV platform */
#define MAX_POWERNV_IDLE_STATES 8
-#define IDLE_USE_INST_NAP 0x00010000 /* Use nap instruction */
-#define IDLE_USE_INST_SLEEP 0x00020000 /* Use sleep instruction */
struct cpuidle_driver powernv_idle_driver = {
.name = "powernv_idle",
@@ -185,7 +184,7 @@ static int powernv_add_idle_states(void)
for (i = 0; i < dt_idle_states; i++) {
flags = be32_to_cpu(idle_state_flags[i]);
- if (flags & IDLE_USE_INST_NAP) {
+ if (flags & IDLE_INST_NAP) {
/* Add NAP state */
strcpy(powernv_states[nr_idle_states].name, "Nap");
strcpy(powernv_states[nr_idle_states].desc, "Nap");
@@ -196,7 +195,7 @@ static int powernv_add_idle_states(void)
nr_idle_states++;
}
- if (flags & IDLE_USE_INST_SLEEP) {
+ if (flags & IDLE_INST_SLEEP) {
/* Add FASTSLEEP state */
strcpy(powernv_states[nr_idle_states].name, "FastSleep");
strcpy(powernv_states[nr_idle_states].desc, "FastSleep");
--
1.9.0
^ permalink raw reply related
* [PATCH 0/9] powerpc/powernv: Support for fastsleep and winkle
From: Shreyas B. Prabhu @ 2014-08-25 18:01 UTC (permalink / raw)
To: linux-kernel
Cc: devicetree, Srivatsa S. Bhat, linux-pm, Shreyas B. Prabhu,
Rafael J. Wysocki, Grant Likely, Rob Herring, Paul Mackerras,
Preeti U. Murthy, linuxppc-dev
Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this fencing between L2 and
L3 caches get delayed by a cpu cycle. This can delay L3 response to
the other cpus if they request for data during this time. Thus they
would fetch the same data from the memory which could lead to data
corruption if L3 cache is not flushed.
Patch 4 adds support to work around this.
'Deep Winkle' is a deeper idle state where core and private L2 are powered
off. While it offers higher power savings, it is at the cost of losing
hypervisor register state and higher latency.
Patch 5-9 adds support for winkle and uses it for offline cpus.
Patch 1 - Moves parameters required discover idle states to a location
common to both cpuidle driver and powernv core code
Patch 2 - Populates idle state details from device tree
Patch 3 - Enables cpus to run guest after waking up from fastsleep/winkle
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Srivatsa S. Bhat <srivatsa@MIT.EDU>
Cc: Preeti U. Murthy <preeti@linux.vnet.ibm.com>
Cc: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: devicetree@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Preeti U Murthy (2):
cpuidle/powernv: Populate cpuidle state details by querying the
device-tree
powerpc/powernv/cpuidle: Add workaround to enable fastsleep
Shreyas B. Prabhu (6):
powerpc/kvm/book3s_hv: Enable CPUs to run guest after waking up from
fast-sleep
powerpc/powernv: Add OPAL call to save and restore
powerpc: Adding macro for accessing Thread Switch Control Register
powerpc/powernv: Add winkle infrastructure
powerpc/powernv: Discover and enable winkle
powerpc/powernv: Enter deepest supported idle state in offline
Srivatsa S. Bhat (1):
powerpc/powernv: Enable Offline CPUs to enter deep idle states
arch/powerpc/include/asm/machdep.h | 4 +
arch/powerpc/include/asm/opal.h | 10 ++
arch/powerpc/include/asm/paca.h | 3 +
arch/powerpc/include/asm/ppc-opcode.h | 2 +
arch/powerpc/include/asm/processor.h | 6 +-
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kernel/exceptions-64s.S | 37 ++---
arch/powerpc/kernel/idle.c | 30 ++++
arch/powerpc/kernel/idle_power7.S | 83 +++++++++-
arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +
arch/powerpc/platforms/powernv/powernv.h | 8 +
arch/powerpc/platforms/powernv/setup.c | 217 +++++++++++++++++++++++++
arch/powerpc/platforms/powernv/smp.c | 13 +-
arch/powerpc/platforms/powernv/subcore.c | 15 ++
drivers/cpuidle/cpuidle-powernv.c | 40 ++++-
16 files changed, 439 insertions(+), 33 deletions(-)
--
1.9.0
^ permalink raw reply
* [PATCH 0/9] powerpc/powernv: Support for fastsleep and winkle
From: Shreyas B. Prabhu @ 2014-08-25 17:57 UTC (permalink / raw)
To: linux-kernel
Cc: devicetree, Srivatsa S. Bhat, linux-pm, Shreyas B. Prabhu,
Rafael J. Wysocki, Grant Likely, Rob Herring, Paul Mackerras,
Preeti U. Murthy, linuxppc-dev
Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this fencing between L2 and
L3 caches get delayed by a cpu cycle. This can delay L3 response to
the other cpus if they request for data during this time. Thus they
would fetch the same data from the memory which could lead to data
corruption if L3 cache is not flushed.
Patch 4 adds support to work around this.
'Deep Winkle' is a deeper idle state where core and private L2 are powered
off. While it offers higher power savings, it is at the cost of losing
hypervisor register state and higher latency.
Patch 5-9 adds support for winkle and uses it for offline cpus.
Patch 1 - Moves parameters required discover idle states to a location
common to both cpuidle driver and powernv core code
Patch 2 - Populates idle state details from device tree
Patch 3 - Enables cpus to run guest after waking up from fastsleep/winkle
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Srivatsa S. Bhat <srivatsa@MIT.EDU>
Cc: Preeti U. Murthy <preeti@linux.vnet.ibm.com>
Cc: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: devicetree@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Preeti U Murthy (2):
cpuidle/powernv: Populate cpuidle state details by querying the
device-tree
powerpc/powernv/cpuidle: Add workaround to enable fastsleep
Shreyas B. Prabhu (6):
powerpc/kvm/book3s_hv: Enable CPUs to run guest after waking up from
fast-sleep
powerpc/powernv: Add OPAL call to save and restore
powerpc: Adding macro for accessing Thread Switch Control Register
powerpc/powernv: Add winkle infrastructure
powerpc/powernv: Discover and enable winkle
powerpc/powernv: Enter deepest supported idle state in offline
Srivatsa S. Bhat (1):
powerpc/powernv: Enable Offline CPUs to enter deep idle states
arch/powerpc/include/asm/machdep.h | 4 +
arch/powerpc/include/asm/opal.h | 10 ++
arch/powerpc/include/asm/paca.h | 3 +
arch/powerpc/include/asm/ppc-opcode.h | 2 +
arch/powerpc/include/asm/processor.h | 6 +-
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kernel/exceptions-64s.S | 37 ++---
arch/powerpc/kernel/idle.c | 30 ++++
arch/powerpc/kernel/idle_power7.S | 83 +++++++++-
arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +
arch/powerpc/platforms/powernv/powernv.h | 8 +
arch/powerpc/platforms/powernv/setup.c | 217 +++++++++++++++++++++++++
arch/powerpc/platforms/powernv/smp.c | 13 +-
arch/powerpc/platforms/powernv/subcore.c | 15 ++
drivers/cpuidle/cpuidle-powernv.c | 40 ++++-
16 files changed, 439 insertions(+), 33 deletions(-)
--
1.9.0
^ permalink raw reply
* Re: [PATCH 4/5] kexec: Add IND_FLAGS macro
From: Vivek Goyal @ 2014-08-25 17:54 UTC (permalink / raw)
To: Geoff Levand
Cc: kexec, linux-kernel, Eric Biederman, Andrew Morton, linuxppc-dev
In-Reply-To: <c2d710e956591376b08bcbc3f904efd9b0c8b912.1408731991.git.geoff@infradead.org>
On Fri, Aug 22, 2014 at 06:39:47PM +0000, Geoff Levand wrote:
> Add a new kexec preprocessor macro IND_FLAGS, which is the bitwise OR of
> all the possible kexec IND_ kimage_entry indirection flags.
>
> Having this macro allows for simplified code in the prosessing of the
> kexec kimage_entry items.
>
> Signed-off-by: Geoff Levand <geoff@infradead.org>
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Vivek
> ---
> include/linux/kexec.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/linux/kexec.h b/include/linux/kexec.h
> index 8c628ca..a4758f9 100644
> --- a/include/linux/kexec.h
> +++ b/include/linux/kexec.h
> @@ -10,6 +10,7 @@
> #define IND_INDIRECTION (1 << IND_INDIRECTION_BIT)
> #define IND_DONE (1 << IND_DONE_BIT)
> #define IND_SOURCE (1 << IND_SOURCE_BIT)
> +#define IND_FLAGS (IND_DESTINATION | IND_INDIRECTION | IND_DONE | IND_SOURCE)
>
> #if !defined(__ASSEMBLY__)
>
> --
> 1.9.1
>
>
>
> _______________________________________________
> kexec mailing list
> kexec@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kexec
^ permalink raw reply
* Re: [PATCH 3/5] kexec: Add bit definitions for kimage entry flags
From: Vivek Goyal @ 2014-08-25 17:52 UTC (permalink / raw)
To: Geoff Levand
Cc: kexec, linux-kernel, Eric Biederman, Andrew Morton, linuxppc-dev
In-Reply-To: <b13fc1b6d923e7063746f34968bd2f1c4cb09002.1408731991.git.geoff@infradead.org>
On Fri, Aug 22, 2014 at 06:39:47PM +0000, Geoff Levand wrote:
> Define new kexec preprocessor macros IND_*_BIT that define the bit position of
> the kimage entry flags. Change the existing IND_* flag macros to be defined as
> bit shifts of the corresponding IND_*_BIT macros. Also wrap all C language code
> in kexec.h with #if !defined(__ASSEMBLY__) so assembly files can include kexec.h
> to get the IND_* and IND_*_BIT macros.
>
> Some CPU instruction sets have tests for bit position which are convenient in
> implementing routines that operate on the kimage entry list. The addition of
> these bit position macros in a common location will avoid duplicate definitions
> and the chance that changes to the IND_* flags will not be propagated to
> assembly files.
>
> Signed-off-by: Geoff Levand <geoff@infradead.org>
Looks good to me.
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Vivek
> ---
> include/linux/kexec.h | 19 +++++++++++++++----
> 1 file changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/include/linux/kexec.h b/include/linux/kexec.h
> index 4b2a0e1..8c628ca 100644
> --- a/include/linux/kexec.h
> +++ b/include/linux/kexec.h
> @@ -1,6 +1,18 @@
> #ifndef LINUX_KEXEC_H
> #define LINUX_KEXEC_H
>
> +#define IND_DESTINATION_BIT 0
> +#define IND_INDIRECTION_BIT 1
> +#define IND_DONE_BIT 2
> +#define IND_SOURCE_BIT 3
> +
> +#define IND_DESTINATION (1 << IND_DESTINATION_BIT)
> +#define IND_INDIRECTION (1 << IND_INDIRECTION_BIT)
> +#define IND_DONE (1 << IND_DONE_BIT)
> +#define IND_SOURCE (1 << IND_SOURCE_BIT)
> +
> +#if !defined(__ASSEMBLY__)
> +
> #include <uapi/linux/kexec.h>
>
> #ifdef CONFIG_KEXEC
> @@ -64,10 +76,6 @@
> */
>
> typedef unsigned long kimage_entry_t;
> -#define IND_DESTINATION 0x1
> -#define IND_INDIRECTION 0x2
> -#define IND_DONE 0x4
> -#define IND_SOURCE 0x8
>
> struct kexec_segment {
> /*
> @@ -312,4 +320,7 @@ struct task_struct;
> static inline void crash_kexec(struct pt_regs *regs) { }
> static inline int kexec_should_crash(struct task_struct *p) { return 0; }
> #endif /* CONFIG_KEXEC */
> +
> +#endif /* !defined(__ASSEBMLY__) */
> +
> #endif /* LINUX_KEXEC_H */
> --
> 1.9.1
>
>
>
> _______________________________________________
> kexec mailing list
> kexec@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kexec
^ permalink raw reply
* Re: [PATCH 2/5] kexec: Simplify conditional
From: Vivek Goyal @ 2014-08-25 17:42 UTC (permalink / raw)
To: Geoff Levand
Cc: kexec, linux-kernel, Eric Biederman, Andrew Morton, linuxppc-dev
In-Reply-To: <5a3bbdeb26cd8891f2b9de1ce05dbacfc282f7d1.1408731991.git.geoff@infradead.org>
On Fri, Aug 22, 2014 at 06:39:47PM +0000, Geoff Levand wrote:
> Simplify the code around one of the conditionals in the kexec_load
> syscall routine.
>
> The original code was confusing with a redundant check on KEXEC_ON_CRASH
> and comments outside of the conditional block. This change switches the
> order of the conditional check, and cleans up the comments for the
> conditional. There is no functional change to the code.
>
> Signed-off-by: Geoff Levand <geoff@infradead.org>
This is simple reorganization.
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Vivek
> ---
> kernel/kexec.c | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/kernel/kexec.c b/kernel/kexec.c
> index 0b49a0a..d04b56e 100644
> --- a/kernel/kexec.c
> +++ b/kernel/kexec.c
> @@ -1282,19 +1282,22 @@ SYSCALL_DEFINE4(kexec_load, unsigned long, entry, unsigned long, nr_segments,
> if (nr_segments > 0) {
> unsigned long i;
>
> - /* Loading another kernel to reboot into */
> - if ((flags & KEXEC_ON_CRASH) == 0)
> - result = kimage_alloc_init(&image, entry, nr_segments,
> - segments, flags);
> - /* Loading another kernel to switch to if this one crashes */
> - else if (flags & KEXEC_ON_CRASH) {
> - /* Free any current crash dump kernel before
> + if (flags & KEXEC_ON_CRASH) {
> + /*
> + * Loading another kernel to switch to if this one
> + * crashes. Free any current crash dump kernel before
> * we corrupt it.
> */
> +
> kimage_free(xchg(&kexec_crash_image, NULL));
> result = kimage_alloc_init(&image, entry, nr_segments,
> segments, flags);
> crash_map_reserved_pages();
> + } else {
> + /* Loading another kernel to reboot into. */
> +
> + result = kimage_alloc_init(&image, entry, nr_segments,
> + segments, flags);
> }
> if (result)
> goto out;
> --
> 1.9.1
>
>
>
> _______________________________________________
> kexec mailing list
> kexec@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kexec
^ permalink raw reply
* Re: [PATCH 1/5] kexec: Fix make headers_check
From: Vivek Goyal @ 2014-08-25 17:22 UTC (permalink / raw)
To: Geoff Levand
Cc: Paul Bolle, maximilian attems, kexec, linux-kernel,
Eric Biederman, Andrew Morton, linuxppc-dev
In-Reply-To: <115373b6ac68ee7a305975896e1c4971e8e51d4c.1408731991.git.geoff@infradead.org>
On Fri, Aug 22, 2014 at 06:39:47PM +0000, Geoff Levand wrote:
> Remove the unneded declaration for a kexec_load() routine.
>
> Fixes errors like these when running 'make headers_check':
>
> include/uapi/linux/kexec.h: userspace cannot reference function or variable defined in the kernel
>
> Signed-off-by: Geoff Levand <geoff@infradead.org>
I think Paul Bolle tried to remove this in the past and maximilian
had objections.
http://lists.infradead.org/pipermail/kexec/2014-January/010902.html
I can't see that how exporting kernel prototype helps here. kexec-tools
seems to be using syscall(__NR_kexec_load) directly for non-xen case. So
I would be fine with removing this definition. Just trying to make sure
that it does not break any other library or users of this declaration.
Thanks
Vivek
> ---
> include/uapi/linux/kexec.h | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/include/uapi/linux/kexec.h b/include/uapi/linux/kexec.h
> index 6925f5b..99048e5 100644
> --- a/include/uapi/linux/kexec.h
> +++ b/include/uapi/linux/kexec.h
> @@ -55,12 +55,6 @@ struct kexec_segment {
> size_t memsz;
> };
>
> -/* Load a new kernel image as described by the kexec_segment array
> - * consisting of passed number of segments at the entry-point address.
> - * The flags allow different useage types.
> - */
> -extern int kexec_load(void *, size_t, struct kexec_segment *,
> - unsigned long int);
> #endif /* __KERNEL__ */
>
> #endif /* _UAPILINUX_KEXEC_H */
> --
> 1.9.1
>
>
>
> _______________________________________________
> kexec mailing list
> kexec@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kexec
^ permalink raw reply
* Re: [PATCH 0/5] kexec: minor fixups and enhancements
From: Vivek Goyal @ 2014-08-25 16:59 UTC (permalink / raw)
To: Geoff Levand
Cc: kexec, linux-kernel, Eric Biederman, Andrew Morton, linuxppc-dev
In-Reply-To: <cover.1408731991.git.geoff@infradead.org>
On Fri, Aug 22, 2014 at 06:39:47PM +0000, Geoff Levand wrote:
> Hi,
>
> Here are a few minor fixups and enhancements for kexec support.
>
> Patch 3 and 4 that add preprocessor macros for the kimage list flags are
> ones that I use in the arm64 kexec support I am working on, so it would
> be nice for those to go in.
>
> Please consider.
Hi Geoff,
Does arm64 has secureboot? If yes, then it might make sense to
enable the new syscall kexec_file_load() on arm64 instead of trying
to make old syscall work first.
Thanks
Vivek
>
> -Geoff
>
> The following changes since commit 7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9:
>
> Linux 3.17-rc1 (2014-08-16 10:40:26 -0600)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/geoff.levand/linux-kexec.git for-kexec
>
> for you to fetch changes up to dc3c63e69815e00dce5454bd50e2991e9ea33f64:
>
> powerpc/kexec: Use global IND_FLAGS macro (2014-08-22 11:15:18 -0700)
>
> ----------------------------------------------------------------
> Geoff Levand (5):
> kexec: Fix make headers_check
> kexec: Simplify conditional
> kexec: Add bit definitions for kimage entry flags
> kexec: Add IND_FLAGS macro
> powerpc/kexec: Use global IND_FLAGS macro
>
> arch/powerpc/kernel/machine_kexec_64.c | 2 --
> include/linux/kexec.h | 20 ++++++++++++++++----
> include/uapi/linux/kexec.h | 6 ------
> kernel/kexec.c | 17 ++++++++++-------
> 4 files changed, 26 insertions(+), 19 deletions(-)
>
> --
> 1.9.1
>
>
> _______________________________________________
> kexec mailing list
> kexec@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kexec
^ permalink raw reply
* [PATCH] Add private HCALL to inform updated RTAS base and entry
From: Aravinda Prasad @ 2014-08-25 13:00 UTC (permalink / raw)
To: aik, linuxppc-dev; +Cc: mahesh, benh, paulus, Nikunj A. Dadhania
This patch adds a private HCALL to inform qemu the updated
rtas-base and rtas-entry address when OS invokes the call
"instantiate-rtas". This is required as qemu allocates the
error reporting structure in RTAS space upon a machine check
exception and hence needs to know the updated RTAS.
Enhancements to qemu to handle the private HCALL, prepare
error log and invoke machine check notification routine
are in a separate patch.
Signed-off-by: Nikunj A. Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
---
board-qemu/slof/rtas.fs | 6 +++++-
lib/libhvcall/hvcall.code | 6 ++++++
lib/libhvcall/hvcall.in | 1 +
lib/libhvcall/libhvcall.h | 4 +++-
4 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/board-qemu/slof/rtas.fs b/board-qemu/slof/rtas.fs
index 41e30c2..c081b57 100644
--- a/board-qemu/slof/rtas.fs
+++ b/board-qemu/slof/rtas.fs
@@ -174,7 +174,11 @@ rtas-node set-node
: instantiate-rtas ( adr -- entry )
dup rtas-base swap rtas-size move
- rtas-entry rtas-base - +
+ dup rtas-entry rtas-base - +
+ 2dup hv-rtas-update 0 <> IF
+ ." Failed to update RTAS " cr
+ THEN
+ nip
;
device-end
diff --git a/lib/libhvcall/hvcall.code b/lib/libhvcall/hvcall.code
index 744469f..0ff50f2 100644
--- a/lib/libhvcall/hvcall.code
+++ b/lib/libhvcall/hvcall.code
@@ -111,6 +111,12 @@ PRIM(hv_X2d_cas)
TOS.u = hv_cas(vec, buf, size);
MIRP
+PRIM(hv_X2d_rtas_X2d_update)
+ unsigned long rtas_entry = TOS.u; POP;
+ unsigned long rtas_base = TOS.u;
+ TOS.u = hv_generic(KVMPPC_H_RTAS_UPDATE, rtas_base, rtas_entry);
+MIRP
+
PRIM(get_X2d_print_X2d_version)
unsigned long addr = TOS.u; POP;
get_print_banner(addr);
diff --git a/lib/libhvcall/hvcall.in b/lib/libhvcall/hvcall.in
index e99d6d1..4437b77 100644
--- a/lib/libhvcall/hvcall.in
+++ b/lib/libhvcall/hvcall.in
@@ -30,4 +30,5 @@ cod(RX!)
cod(hv-logical-memop)
cod(hv-cas)
+cod(hv-rtas-update)
cod(get-print-version)
diff --git a/lib/libhvcall/libhvcall.h b/lib/libhvcall/libhvcall.h
index 6356a62..193b738 100644
--- a/lib/libhvcall/libhvcall.h
+++ b/lib/libhvcall/libhvcall.h
@@ -24,7 +24,9 @@
#define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1)
/* Client Architecture support */
#define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2)
-#define KVMPPC_HCALL_MAX KVMPPC_H_CAS
+#define KVMPPC_H_RTAS_UPDATE (KVMPPC_HCALL_BASE + 0x3)
+#define KVMPPC_H_REPORT_MC_ERR (KVMPPC_HCALL_BASE + 0x4)
+#define KVMPPC_HCALL_MAX KVMPPC_H_NMI_MCE
#ifndef __ASSEMBLY__
^ permalink raw reply related
* Re: [PATCH v3] arch: Kconfig: Let all architectures set endian explicitly
From: Chen Gang @ 2014-08-25 12:26 UTC (permalink / raw)
To: Ralf Baechle
Cc: linux-m32r-ja, linux-mips, linux-m68k, a-jacquiot,
catalin.marinas, linux, will.deacon, dhowells, jcmvbkbc, paulus,
hpa, sparclinux, linux-hexagon, linux-s390, gxt, Jean Delvare,
egtvedt, jonas, Liqin Chen, jesper.nilsson, linux-am33-list,
linux, linux-c6x-dev, David S. Miller, linux-xtensa, takata, x86,
jejb, torvalds, linux-sh, mingo, Geert Uytterhoeven, Lennox Wu,
msalter, mattst88, hskinnemoen, fenghua.yu, james.hogan,
Arnd Bergmann, realmz6, heiko.carstens, jdike, linux-alpha,
adi-buildroot-devel, cmetcalf, starvik, linux-m32r, ink,
user-mode-linux-user, tglx, linux-metag, linux-arm-kernel, rth,
chris, Michal Simek, tony.luck, linux-ia64, linux-parisc,
linux-cris-kernel, vgupta, linux-kernel@vger.kernel.org, rkuo,
user-mode-linux-devel, Richard Weinberger, Martin Schwidefsky,
linux390, akpm, yasutake.koichi, linuxppc-dev, deller
In-Reply-To: <53F9A48F.3020803@gmail.com>
Hello all:
It seems no any additional rejections for it. I guess, I need split the
'big' patch into pieces, and each send to its' related mailing list, so
let it not like a spam. And the schedule may like:
- Firstly, send patch for "init/Kconfig" to add CPU_*_ENDIAN. If pass
checking (hope it can be passed checking), then
- Send each related patch to each related architectures which already
knew their ENDIAN attributes in config time (24 patches, I guess),
then
- Make patch for Kbuild to support __BUILDING_TIME_BIG_ENDIAN__, and
pass checking (hope I can finish), then
- Finish left architectures which need __BUILDING_TIME_BIG_ENDIAN__
(4 patches, I guess).
Welcome any ideas, suggestions, or completions. And if no additional
reply, I shall not send any additional information any more to avoid
spam to other members.
Thanks.
On 08/24/2014 04:38 PM, Chen Gang wrote:
> Hello Maintainers:
>
> Is this patch OK? If it pass basic checking, please let me know, and I
> shall try to make another related patch for KBuild (I can do nothing
> related with Kbuild, before get confirmation for this patch).
>
> Thanks.
>
> On 8/15/14 17:01, Chen Gang wrote:
>>
>>
>> On 8/15/14 6:14, Chen Gang wrote:
>>> On 08/15/2014 02:04 AM, Ralf Baechle wrote:
>>>>
>>>
>>> OK, thanks, I assumes when support both endian, the default choice is
>>> CPU_BIG_ENDIAN, although no default value for choice (originally, I did
>>> worry about it).
>>>
>>>> So I think you can just drop the MIPS segment from your patch.
>>>>
>>>
>>> If what I assumes is correct, what you said sounds reasonable to me.
>>>
>>>
>>
>> So for me, it is harmless to add CPU_*_ENDIAN explicitly, and can let
>> other members don't need think of.
>>
>> By the way, for sh, it is almost the same case, except it contents the
>> default value, for me, it is clear enough, so I skip sh architecture in
>> this patch.
>>
>>
>> Thanks
>>
>
--
Chen Gang
Open, share, and attitude like air, water, and life which God blessed
^ permalink raw reply
* [PATCH] powerpc: configs: Add VFAT file-system configs
From: Nikhil Badola @ 2014-08-25 11:10 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nikhil Badola, Ramneek Mehresh
Add CONFIG_NLS_CODEPAGE_437, CONFIG_NLS_CODEPAGE_850,
CONFIG_NLS_ISO8859_1 in default configs for 85xx
and 86xx socs. Required for mounting vfat file-systems
on USB devices
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
---
arch/powerpc/configs/corenet32_smp_defconfig | 2 ++
arch/powerpc/configs/corenet64_smp_defconfig | 2 ++
arch/powerpc/configs/mpc85xx_defconfig | 3 +++
arch/powerpc/configs/mpc85xx_smp_defconfig | 3 +++
arch/powerpc/configs/mpc86xx_defconfig | 3 +++
5 files changed, 13 insertions(+)
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 6a3c58a..688e9e4 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -165,6 +165,8 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=m
CONFIG_MAGIC_SYSRQ=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 4b07bad..f54eb44 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -157,6 +157,8 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=m
CONFIG_CRC_T10DIF=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index fa1bfd3..8b2d759 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -227,6 +227,9 @@ CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_HUGETLBFS=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 0b452eb..a3003b2 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -228,6 +228,9 @@ CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_HUGETLBFS=y
diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
index 35595ea..fc58aa8 100644
--- a/arch/powerpc/configs/mpc86xx_defconfig
+++ b/arch/powerpc/configs/mpc86xx_defconfig
@@ -145,6 +145,9 @@ CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_ISO8859_1=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_ADFS_FS=m
--
1.7.11.7
^ permalink raw reply related
* Re: [PATCH] cpufreq: powernv: Register the driver with reboot notifier
From: Viresh Kumar @ 2014-08-25 10:41 UTC (permalink / raw)
To: Preeti U Murthy
Cc: Shilpasri G Bhat, linux-pm@vger.kernel.org, Rafael J. Wysocki,
Linux Kernel Mailing List, Shilpasri G Bhat,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <CAKohpokMXSC_oTbg1b0adPxFsht7aZJd61YwSpzqsUi=KOAwXw@mail.gmail.com>
On 25 August 2014 16:00, Viresh Kumar <viresh.kumar@linaro.org> wrote:
> Its not that I am doubting if this will work or not. But this Hack is using
> routines not meant for this purpose. And that being a core routine,
> things aren't that straightforward anymore.
Well if you want a working HACK for solving this, what about following ?
diff --git a/drivers/cpufreq/powernv-cpufreq.c
b/drivers/cpufreq/powernv-cpufreq.c
index af49688..d6a1742 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -34,6 +34,7 @@
#define POWERNV_MAX_PSTATES 256
static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
+static bool rebooting;
/*
* Note: The set of pstates consists of contiguous integers, the
@@ -283,6 +284,9 @@ static int powernv_cpufreq_target_index(struct
cpufreq_policy *policy,
{
struct powernv_smp_call_data freq_data;
+ if (unlikely(rebooting))
+ return -EBUSY;
+
freq_data.pstate_id = powernv_freqs[new_index].driver_data;
/*
@@ -317,6 +321,19 @@ static struct cpufreq_driver powernv_cpufreq_driver = {
.attr = powernv_cpu_freq_attr,
};
+static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
+ unsigned long action, void *unused)
+{
+ /* TODO: Get policy & index */
+ powernv_cpufreq_target_index(policy, index);
+ rebooting = true;
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block powernv_cpufreq_reboot_nb = {
+ .notifier_call = powernv_cpufreq_reboot_notifier,
+};
+
static int __init powernv_cpufreq_init(void)
{
int rc = 0;
@@ -328,12 +345,15 @@ static int __init powernv_cpufreq_init(void)
return rc;
}
- return cpufreq_register_driver(&powernv_cpufreq_driver);
+ rc = cpufreq_register_driver(&powernv_cpufreq_driver);
+ register_reboot_notifier(&powernv_cpufreq_reboot_nb);
+ return rc;
}
module_init(powernv_cpufreq_init);
static void __exit powernv_cpufreq_exit(void)
{
+ unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
cpufreq_unregister_driver(&powernv_cpufreq_driver);
}
module_exit(powernv_cpufreq_exit);
^ permalink raw reply related
* Re: [PATCH] cpufreq: powernv: Register the driver with reboot notifier
From: Viresh Kumar @ 2014-08-25 10:30 UTC (permalink / raw)
To: Preeti U Murthy
Cc: Shilpasri G Bhat, linux-pm@vger.kernel.org, Rafael J. Wysocki,
Linux Kernel Mailing List, Shilpasri G Bhat,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <53F6AF66.10204@linux.vnet.ibm.com>
On 22 August 2014 08:18, Preeti U Murthy <preeti@linux.vnet.ibm.com> wrote:
> At the moment this looks like the best way forward. We need to do this
> cleanly by ensuring that we stop the governors and then call into the
> driver to deal with the cpu frequency in its own way during reboot. The
> best way to do this would be by calling this routine. Either this or
> cpufreq_suspend() should be called in the reboot path generically. The
> latter might not be an enticing option for other platforms.
Its not that I am doubting if this will work or not. But this Hack is using
routines not meant for this purpose. And that being a core routine,
things aren't that straightforward anymore.
@Rafael: Ping!!
^ permalink raw reply
* [PATCH v2] powerpc: Fix warning reported by verify_cpu_node_mapping()
From: Li Zhong @ 2014-08-25 7:22 UTC (permalink / raw)
To: Nishanth Aravamudan; +Cc: Michael Ellerman, PowerPC email list, Paul Mackerras
In-Reply-To: <20140822220406.GA20951@linux.vnet.ibm.com>
With commit 2fabf084b, during boottime, cpu_numa_callback() is called
earlier(before their online) for each cpu, and verify_cpu_node_mapping()
uses cpu_to_node() to check whether siblings are in the same node.
It skips the checking for siblings that are not online yet. So the only
check done here is for the bootcpu, which is online at that time. But
the per-cpu numa_node cpu_to_node() uses hasn't been set up yet (which
will be set up in smp_prepare_cpus()).
So I saw something like following reported:
[ 0.000000] CPU thread siblings 1/2/3 and 0 don't belong to the same
node!
As we don't actually do the checking during this early stage, so maybe
we could directly call numa_setup_cpu() in do_init_bootmem().
Also, as Nish suggested, here it's better to use present cpu mask
instead of possible mask to avoid warning in numa_setup_cpu().
Signed-off-by: Li Zhong <zhong@linux.vnet.ibm.com>
---
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index d7737a5..3a9061e 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1127,9 +1127,8 @@ void __init do_init_bootmem(void)
* even before we online them, so that we can use cpu_to_{node,mem}
* early in boot, cf. smp_prepare_cpus().
*/
- for_each_possible_cpu(cpu) {
- cpu_numa_callback(&ppc64_numa_nb, CPU_UP_PREPARE,
- (void *)(unsigned long)cpu);
+ for_each_present_cpu(cpu) {
+ numa_setup_cpu((unsigned long)cpu);
}
}
^ permalink raw reply related
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