* [PATCH 07/11] powerpc/64s: Add support for RFI flush of L1-D cache
From: Michael Ellerman @ 2018-01-08 16:54 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, tglx, peterz, npiggin, anton, mikey, oohall, paulus
In-Reply-To: <20180108165453.26066-1-mpe@ellerman.id.au>
On some CPUs we can prevent the Meltdown vulnerability by flushing the
L1-D cache on exit from kernel to user mode, and from hypervisor to
guest.
This is known to be the case on at least Power7, Power8 and Power9. At
this time we do not know the status of the vulnerability on other CPUs
such as the 970 (Apple G5), pasemi CPUs (AmigaOne X1000) or Freescale
CPUs. As more information comes to light we can enable this, or other
mechanisms on those CPUs.
The vulnerability occurs when the load of an architecturally
inaccessible memory region (eg. userspace load of kernel memory) is
speculatively executed to the point where its result can influence the
address of a subsequent speculatively executed load.
In order for that to happen, the first load must hit in the L1,
because before the load is sent to the L2 the permission check is
performed. Therefore if no kernel addresses hit in the L1 the
vulnerability can not occur. We can ensure that is the case by
flushing the L1 whenever we return to userspace. Similarly for
hypervisor vs guest.
In order to flush the L1-D cache on exit, we add a section of nops at
each (h)rfi location that returns to a lower privileged context, and
patch that with some sequence. Newer firmwares are able to advertise
to us that there is a special nop instruction that flushes the L1-D.
If we do not see that advertised, we fall back to doing a displacement
flush in software.
For guest kernels we support migration between some CPU versions, and
different CPUs may use different flush instructions. So that we are
prepared to migrate to a machine with a different flush instruction
activated, we may have to patch more than one flush instruction at
boot if the hypervisor tells us to.
In the end this patch is mostly the work of Nicholas Piggin and
Michael Ellerman. However a cast of thousands contributed to analysis
of the issue, earlier versions of the patch, back ports testing etc.
Many thanks to all of them.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/include/asm/exception-64s.h | 40 ++++++++++++---
arch/powerpc/include/asm/feature-fixups.h | 13 +++++
arch/powerpc/include/asm/paca.h | 10 ++++
arch/powerpc/include/asm/setup.h | 13 +++++
arch/powerpc/kernel/asm-offsets.c | 5 ++
arch/powerpc/kernel/exceptions-64s.S | 82 +++++++++++++++++++++++++++++++
arch/powerpc/kernel/setup_64.c | 75 ++++++++++++++++++++++++++++
arch/powerpc/kernel/vmlinux.lds.S | 9 ++++
arch/powerpc/lib/feature-fixups.c | 41 ++++++++++++++++
9 files changed, 280 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index dfc56daed98b..7197b179c1b1 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -74,34 +74,58 @@
*/
#define EX_R3 EX_DAR
-/* Macros for annotating the expected destination of (h)rfid */
+/*
+ * Macros for annotating the expected destination of (h)rfid
+ *
+ * The nop instructions allow us to insert one or more instructions to flush the
+ * L1-D cache when returning to userspace or a guest.
+ */
+#define RFI_FLUSH_SLOT \
+ RFI_FLUSH_FIXUP_SECTION; \
+ nop; \
+ nop; \
+ nop
#define RFI_TO_KERNEL \
rfid
#define RFI_TO_USER \
- rfid
+ RFI_FLUSH_SLOT; \
+ rfid; \
+ b rfi_flush_fallback
#define RFI_TO_USER_OR_KERNEL \
- rfid
+ RFI_FLUSH_SLOT; \
+ rfid; \
+ b rfi_flush_fallback
#define RFI_TO_GUEST \
- rfid
+ RFI_FLUSH_SLOT; \
+ rfid; \
+ b rfi_flush_fallback
#define HRFI_TO_KERNEL \
hrfid
#define HRFI_TO_USER \
- hrfid
+ RFI_FLUSH_SLOT; \
+ hrfid; \
+ b hrfi_flush_fallback
#define HRFI_TO_USER_OR_KERNEL \
- hrfid
+ RFI_FLUSH_SLOT; \
+ hrfid; \
+ b hrfi_flush_fallback
#define HRFI_TO_GUEST \
- hrfid
+ RFI_FLUSH_SLOT; \
+ hrfid; \
+ b hrfi_flush_fallback
#define HRFI_TO_UNKNOWN \
- hrfid
+ RFI_FLUSH_SLOT; \
+ hrfid; \
+ b hrfi_flush_fallback
#ifdef CONFIG_RELOCATABLE
#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index 8f88f771cc55..1e82eb3caabd 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -187,7 +187,20 @@ label##3: \
FTR_ENTRY_OFFSET label##1b-label##3b; \
.popsection;
+#define RFI_FLUSH_FIXUP_SECTION \
+951: \
+ .pushsection __rfi_flush_fixup,"a"; \
+ .align 2; \
+952: \
+ FTR_ENTRY_OFFSET 951b-952b; \
+ .popsection;
+
+
#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
+extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;
+
void apply_feature_fixups(void);
void setup_feature_keys(void);
#endif
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 3892db93b837..23ac7fc0af23 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -232,6 +232,16 @@ struct paca_struct {
struct sibling_subcore_state *sibling_subcore_state;
#endif
#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+ /*
+ * rfi fallback flush must be in its own cacheline to prevent
+ * other paca data leaking into the L1d
+ */
+ u64 exrfi[EX_SIZE] __aligned(0x80);
+ void *rfi_flush_fallback_area;
+ u64 l1d_flush_congruence;
+ u64 l1d_flush_sets;
+#endif
};
extern void copy_mm_to_paca(struct mm_struct *mm);
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index cf00ec26303a..469b7fdc9be4 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -39,6 +39,19 @@ static inline void pseries_big_endian_exceptions(void) {}
static inline void pseries_little_endian_exceptions(void) {}
#endif /* CONFIG_PPC_PSERIES */
+void rfi_flush_enable(bool enable);
+
+/* These are bit flags */
+enum l1d_flush_type {
+ L1D_FLUSH_NONE = 0x1,
+ L1D_FLUSH_FALLBACK = 0x2,
+ L1D_FLUSH_ORI = 0x4,
+ L1D_FLUSH_MTTRIG = 0x8,
+};
+
+void __init setup_rfi_flush(enum l1d_flush_type, bool enable);
+void do_rfi_flush_fixups(enum l1d_flush_type types);
+
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 3f6316bcde4e..a6c72f720e8a 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -237,6 +237,11 @@ int main(void)
OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
OFFSET(PACA_IN_MCE, paca_struct, in_mce);
OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
+ OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
+ OFFSET(PACA_EXRFI, paca_struct, exrfi);
+ OFFSET(PACA_L1D_FLUSH_CONGRUENCE, paca_struct, l1d_flush_congruence);
+ OFFSET(PACA_L1D_FLUSH_SETS, paca_struct, l1d_flush_sets);
+
#endif
OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index ed356194f09c..f7ebaac5849b 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1449,6 +1449,88 @@ masked_##_H##interrupt: \
b .; \
MASKED_DEC_HANDLER(_H)
+TRAMP_REAL_BEGIN(rfi_flush_fallback)
+ SET_SCRATCH0(r13);
+ GET_PACA(r13);
+ std r9,PACA_EXRFI+EX_R9(r13)
+ std r10,PACA_EXRFI+EX_R10(r13)
+ std r11,PACA_EXRFI+EX_R11(r13)
+ std r12,PACA_EXRFI+EX_R12(r13)
+ std r8,PACA_EXRFI+EX_R13(r13)
+ mfctr r9
+ ld r10,PACA_RFI_FLUSH_FALLBACK_AREA(r13)
+ ld r11,PACA_L1D_FLUSH_SETS(r13)
+ ld r12,PACA_L1D_FLUSH_CONGRUENCE(r13)
+ /*
+ * The load adresses are at staggered offsets within cachelines,
+ * which suits some pipelines better (on others it should not
+ * hurt.
+ */
+ addi r12,r12,8
+ mtctr r11
+ DCBT_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
+
+ /* order ld/st prior to dcbt stop all streams with flushing */
+ sync
+1: li r8,0
+ .rept 8 /* 8-way set associative */
+ ldx r11,r10,r8
+ add r8,r8,r12
+ add r8,r8,r11 /* r11 will be 0, but this creates a dependency */
+ .endr
+ addi r10,r10,128 /* 128 byte cache line */
+ bdnz 1b
+
+ mtctr r9
+ ld r9,PACA_EXRFI+EX_R9(r13)
+ ld r10,PACA_EXRFI+EX_R10(r13)
+ ld r11,PACA_EXRFI+EX_R11(r13)
+ ld r12,PACA_EXRFI+EX_R12(r13)
+ ld r8,PACA_EXRFI+EX_R13(r13)
+ GET_SCRATCH0(r13);
+ rfid
+
+TRAMP_REAL_BEGIN(hrfi_flush_fallback)
+ SET_SCRATCH0(r13);
+ GET_PACA(r13);
+ std r9,PACA_EXRFI+EX_R9(r13)
+ std r10,PACA_EXRFI+EX_R10(r13)
+ std r11,PACA_EXRFI+EX_R11(r13)
+ std r12,PACA_EXRFI+EX_R12(r13)
+ std r8,PACA_EXRFI+EX_R13(r13)
+ mfctr r9
+ ld r10,PACA_RFI_FLUSH_FALLBACK_AREA(r13)
+ ld r11,PACA_L1D_FLUSH_SETS(r13)
+ ld r12,PACA_L1D_FLUSH_CONGRUENCE(r13)
+ /*
+ * The load adresses are at staggered offsets within cachelines,
+ * which suits some pipelines better (on others it should not
+ * hurt.
+ */
+ addi r12,r12,8
+ mtctr r11
+ DCBT_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
+
+ /* order ld/st prior to dcbt stop all streams with flushing */
+ sync
+1: li r8,0
+ .rept 8 /* 8-way set associative */
+ ldx r11,r10,r8
+ add r8,r8,r12
+ add r8,r8,r11 /* r11 will be 0, but this creates a dependency */
+ .endr
+ addi r10,r10,128 /* 128 byte cache line */
+ bdnz 1b
+
+ mtctr r9
+ ld r9,PACA_EXRFI+EX_R9(r13)
+ ld r10,PACA_EXRFI+EX_R10(r13)
+ ld r11,PACA_EXRFI+EX_R11(r13)
+ ld r12,PACA_EXRFI+EX_R12(r13)
+ ld r8,PACA_EXRFI+EX_R13(r13)
+ GET_SCRATCH0(r13);
+ hrfid
+
/*
* Real mode exceptions actually use this too, but alternate
* instruction code patches (which end up in the common .text area)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index d3124c302146..d26b11816b8f 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -799,3 +799,78 @@ static int __init disable_hardlockup_detector(void)
return 0;
}
early_initcall(disable_hardlockup_detector);
+
+#ifdef CONFIG_PPC_BOOK3S_64
+static enum l1d_flush_type enabled_flush_types;
+static void *l1d_flush_fallback_area;
+bool rfi_flush;
+
+static void do_nothing(void *unused)
+{
+ /*
+ * We don't need to do the flush explicitly, just enter+exit kernel is
+ * sufficient, the RFI exit handlers will do the right thing.
+ */
+}
+
+void rfi_flush_enable(bool enable)
+{
+ if (rfi_flush == enable)
+ return;
+
+ if (enable) {
+ do_rfi_flush_fixups(enabled_flush_types);
+ on_each_cpu(do_nothing, NULL, 1);
+ } else
+ do_rfi_flush_fixups(L1D_FLUSH_NONE);
+
+ rfi_flush = enable;
+}
+
+void __init setup_rfi_flush(enum l1d_flush_type types, bool enable)
+{
+ if (types & L1D_FLUSH_FALLBACK) {
+ int cpu;
+ u64 l1d_size = ppc64_caches.l1d.size;
+ u64 limit = min(safe_stack_limit(), ppc64_rma_size);
+
+ pr_info("rfi-flush: Using fallback displacement flush\n");
+
+ /*
+ * Align to L1d size, and size it at 2x L1d size, to
+ * catch possible hardware prefetch runoff. We don't
+ * have a recipe for load patterns to reliably avoid
+ * the prefetcher.
+ */
+ l1d_flush_fallback_area =
+ __va(memblock_alloc_base(l1d_size * 2, l1d_size, limit));
+ memset(l1d_flush_fallback_area, 0, l1d_size * 2);
+
+ for_each_possible_cpu(cpu) {
+ /*
+ * The fallback flush is currently coded for 8-way
+ * associativity. Different associativity is possible,
+ * but it will be treated as 8-way and may not evict
+ * the lines as effectively.
+ *
+ * 128 byte lines are mandatory.
+ */
+ u64 c = l1d_size / 8;
+
+ paca[cpu].rfi_flush_fallback_area = l1d_flush_fallback_area;
+ paca[cpu].l1d_flush_congruence = c;
+ paca[cpu].l1d_flush_sets = c / 128;
+ }
+ }
+
+ if (types & L1D_FLUSH_ORI)
+ pr_info("rfi-flush: Using ori type flush\n");
+
+ if (types & L1D_FLUSH_MTTRIG)
+ pr_info("rfi-flush: Using mttrig type flush\n");
+
+ enabled_flush_types = types;
+
+ rfi_flush_enable(enable);
+}
+#endif /* CONFIG_PPC_BOOK3S_64 */
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 51e4ec92ade1..6507138ebe10 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -132,6 +132,15 @@ SECTIONS
/* Read-only data */
RO_DATA(PAGE_SIZE)
+#ifdef CONFIG_PPC64
+ . = ALIGN(8);
+ __rfi_flush_fixup : AT(ADDR(__rfi_flush_fixup) - LOAD_OFFSET) {
+ __start___rfi_flush_fixup = .;
+ *(__rfi_flush_fixup)
+ __stop___rfi_flush_fixup = .;
+ }
+#endif
+
EXCEPTION_TABLE(0)
NOTES :kernel :notes
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 41cf5ae273cf..a95ea007d654 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -116,6 +116,47 @@ void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
}
}
+#ifdef CONFIG_PPC_BOOK3S_64
+void do_rfi_flush_fixups(enum l1d_flush_type types)
+{
+ unsigned int instrs[3], *dest;
+ long *start, *end;
+ int i;
+
+ start = PTRRELOC(&__start___rfi_flush_fixup),
+ end = PTRRELOC(&__stop___rfi_flush_fixup);
+
+ instrs[0] = 0x60000000; /* nop */
+ instrs[1] = 0x60000000; /* nop */
+ instrs[2] = 0x60000000; /* nop */
+
+ if (types & L1D_FLUSH_FALLBACK)
+ /* b .+16 to fallback flush */
+ instrs[0] = 0x48000010;
+
+ i = 0;
+ if (types & L1D_FLUSH_ORI) {
+ instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */
+ instrs[i++] = 0x63de0000; /* ori 30,30,0 L1d flush*/
+ }
+
+ if (types & L1D_FLUSH_MTTRIG)
+ instrs[i++] = 0x7c12dba6; /* mtspr TRIG2,r0 (SPR #882) */
+
+ for (i = 0; start < end; start++, i++) {
+ dest = (void *)start + *start;
+
+ pr_devel("patching dest %lx\n", (unsigned long)dest);
+
+ patch_instruction(dest, instrs[0]);
+ patch_instruction(dest + 1, instrs[1]);
+ patch_instruction(dest + 2, instrs[2]);
+ }
+
+ printk(KERN_DEBUG "rfi-flush: patched %d locations\n", i);
+}
+#endif /* CONFIG_PPC_BOOK3S_64 */
+
void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
{
long *start, *end;
--
2.14.3
^ permalink raw reply related
* [PATCH 09/11] powerpc/64s: Allow control of RFI flush via sysfs
From: Michael Ellerman @ 2018-01-08 16:54 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, tglx, peterz, npiggin, anton, mikey, oohall, paulus
In-Reply-To: <20180108165453.26066-1-mpe@ellerman.id.au>
From: Nicholas Piggin <npiggin@gmail.com>
Expose the state of the RFI flush (enabled/disabled) via sysfs, and
allow it to be enabled/dissabled at runtime.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/setup.h | 2 ++
arch/powerpc/kernel/sysfs.c | 41 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 43 insertions(+)
diff --git a/arch/powerpc/kernel/setup.h b/arch/powerpc/kernel/setup.h
index 21c18071d9d5..493b03b0a966 100644
--- a/arch/powerpc/kernel/setup.h
+++ b/arch/powerpc/kernel/setup.h
@@ -61,4 +61,6 @@ void kvm_cma_reserve(void);
static inline void kvm_cma_reserve(void) { };
#endif
+extern bool rfi_flush;
+
#endif /* __ARCH_POWERPC_KERNEL_SETUP_H */
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index b8d4a1dac39f..8c19d014cffc 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -20,6 +20,7 @@
#include <asm/firmware.h>
#include "cacheinfo.h"
+#include "setup.h"
#ifdef CONFIG_PPC64
#include <asm/paca.h>
@@ -496,6 +497,43 @@ static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
static DEVICE_ATTR(purr, 0400, show_purr, store_purr);
static DEVICE_ATTR(pir, 0400, show_pir, NULL);
+#ifdef CONFIG_PPC_BOOK3S_64
+static ssize_t show_rfi_flush(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return sprintf(buf, "%d\n", rfi_flush ? 1 : 0);
+}
+
+static ssize_t __used store_rfi_flush(struct device *dev,
+ struct device_attribute *attr, const char *buf,
+ size_t count)
+{
+ int val;
+ int ret = 0;
+
+ ret = sscanf(buf, "%d", &val);
+ if (ret != 1)
+ return -EINVAL;
+
+ if (val == 1)
+ rfi_flush_enable(true);
+ else if (val == 0)
+ rfi_flush_enable(false);
+ else
+ return -EINVAL;
+
+ return count;
+}
+
+static DEVICE_ATTR(rfi_flush, 0600,
+ show_rfi_flush, store_rfi_flush);
+
+static void sysfs_create_rfi_flush(void)
+{
+ device_create_file(cpu_subsys.dev_root, &dev_attr_rfi_flush);
+}
+#endif /* CONFIG_PPC_BOOK3S_64 */
+
/*
* This is the system wide DSCR register default value. Any
* change to this default value through the sysfs interface
@@ -1047,6 +1085,9 @@ static int __init topology_init(void)
WARN_ON(r < 0);
#ifdef CONFIG_PPC64
sysfs_create_dscr_default();
+#ifdef CONFIG_PPC_BOOK3S
+ sysfs_create_rfi_flush();
+#endif
#endif /* CONFIG_PPC64 */
return 0;
--
2.14.3
^ permalink raw reply related
* [PATCH 06/11] powerpc/64s: Convert slb_miss_common to use RFI_TO_USER/KERNEL
From: Michael Ellerman @ 2018-01-08 16:54 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, tglx, peterz, npiggin, anton, mikey, oohall, paulus
In-Reply-To: <20180108165453.26066-1-mpe@ellerman.id.au>
From: Nicholas Piggin <npiggin@gmail.com>
In the SLB miss handler we may be returning to user or kernel. We need
to add a check early on and save the result in the cr4 register, and
then we bifurcate the return path based on that.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/exceptions-64s.S | 29 ++++++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 5502b0147c4e..ed356194f09c 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -598,6 +598,9 @@ EXC_COMMON_BEGIN(slb_miss_common)
stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
+ andi. r9,r11,MSR_PR // Check for exception from userspace
+ cmpdi cr4,r9,MSR_PR // And save the result in CR4 for later
+
/*
* Test MSR_RI before calling slb_allocate_realmode, because the
* MSR in r11 gets clobbered. However we still want to allocate
@@ -624,9 +627,32 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
/* All done -- return from exception. */
+ bne cr4,1f /* returning to kernel */
+
+.machine push
+.machine "power4"
+ mtcrf 0x80,r9
+ mtcrf 0x08,r9 /* MSR[PR] indication is in cr4 */
+ mtcrf 0x04,r9 /* MSR[RI] indication is in cr5 */
+ mtcrf 0x02,r9 /* I/D indication is in cr6 */
+ mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
+.machine pop
+
+ RESTORE_CTR(r9, PACA_EXSLB)
+ RESTORE_PPR_PACA(PACA_EXSLB, r9)
+ mr r3,r12
+ ld r9,PACA_EXSLB+EX_R9(r13)
+ ld r10,PACA_EXSLB+EX_R10(r13)
+ ld r11,PACA_EXSLB+EX_R11(r13)
+ ld r12,PACA_EXSLB+EX_R12(r13)
+ ld r13,PACA_EXSLB+EX_R13(r13)
+ RFI_TO_USER
+ b . /* prevent speculative execution */
+1:
.machine push
.machine "power4"
mtcrf 0x80,r9
+ mtcrf 0x08,r9 /* MSR[PR] indication is in cr4 */
mtcrf 0x04,r9 /* MSR[RI] indication is in cr5 */
mtcrf 0x02,r9 /* I/D indication is in cr6 */
mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
@@ -640,9 +666,10 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
ld r11,PACA_EXSLB+EX_R11(r13)
ld r12,PACA_EXSLB+EX_R12(r13)
ld r13,PACA_EXSLB+EX_R13(r13)
- rfid
+ RFI_TO_KERNEL
b . /* prevent speculative execution */
+
2: std r3,PACA_EXSLB+EX_DAR(r13)
mr r3,r12
mfspr r11,SPRN_SRR0
--
2.14.3
^ permalink raw reply related
* [PATCH 08/11] powerpc/64s: Support disabling RFI flush with no_rfi_flush and nopti
From: Michael Ellerman @ 2018-01-08 16:54 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, tglx, peterz, npiggin, anton, mikey, oohall, paulus
In-Reply-To: <20180108165453.26066-1-mpe@ellerman.id.au>
Because there may be some performance overhead of the RFI flush, add
kernel command line options to disable it.
We add a sensibly named 'no_rfi_flush' option, but we also hijack the
x86 option 'nopti'. The RFI flush is not the same as KPTI, but if we
see 'nopti' we can guess that the user is trying to avoid any overhead
of Meltdown mitigations, and it means we don't have to educate every
one about a different command line option.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/setup_64.c | 24 +++++++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index d26b11816b8f..8f90b0b4f5ac 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -803,8 +803,29 @@ early_initcall(disable_hardlockup_detector);
#ifdef CONFIG_PPC_BOOK3S_64
static enum l1d_flush_type enabled_flush_types;
static void *l1d_flush_fallback_area;
+static bool no_rfi_flush;
bool rfi_flush;
+static int __init handle_no_rfi_flush(char *p)
+{
+ pr_info("rfi-flush: disabled on command line.");
+ no_rfi_flush = true;
+ return 0;
+}
+early_param("no_rfi_flush", handle_no_rfi_flush);
+
+/*
+ * The RFI flush is not KPTI, but because users will see doco that says to use
+ * nopti we hijack that option here to also disable the RFI flush.
+ */
+static int __init handle_no_pti(char *p)
+{
+ pr_info("rfi-flush: disabling due to 'nopti' on command line.\n");
+ handle_no_rfi_flush(NULL);
+ return 0;
+}
+early_param("nopti", handle_no_pti);
+
static void do_nothing(void *unused)
{
/*
@@ -871,6 +892,7 @@ void __init setup_rfi_flush(enum l1d_flush_type types, bool enable)
enabled_flush_types = types;
- rfi_flush_enable(enable);
+ if (!no_rfi_flush)
+ rfi_flush_enable(enable);
}
#endif /* CONFIG_PPC_BOOK3S_64 */
--
2.14.3
^ permalink raw reply related
* [PATCH 10/11] powerpc/pseries: Query hypervisor for RFI flush settings
From: Michael Ellerman @ 2018-01-08 16:54 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, tglx, peterz, npiggin, anton, mikey, oohall, paulus
In-Reply-To: <20180108165453.26066-1-mpe@ellerman.id.au>
From: Michael Neuling <mikey@neuling.org>
A new hypervisor call is available which tells the guest settings
related to the RFI flush. Use it to query the appropriate flush
instruction(s), and whether the flush is required.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/platforms/pseries/setup.c | 35 ++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 28b286df0e91..db76963e693d 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -459,6 +459,39 @@ static void __init find_and_init_phbs(void)
of_pci_check_probe_only();
}
+static void pseries_setup_rfi_flush(void)
+{
+ struct h_cpu_char_result result;
+ enum l1d_flush_type types;
+ bool enable;
+ long rc;
+
+ /* Enable by default */
+ enable = true;
+
+ rc = plpar_get_cpu_characteristics(&result);
+ if (rc == H_SUCCESS) {
+ types = L1D_FLUSH_NONE;
+
+ if (result.character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
+ types |= L1D_FLUSH_MTTRIG;
+ if (result.character & H_CPU_CHAR_L1D_FLUSH_ORI30)
+ types |= L1D_FLUSH_ORI;
+
+ /* Use fallback if nothing set in hcall */
+ if (types == L1D_FLUSH_NONE)
+ types = L1D_FLUSH_FALLBACK;
+
+ if (!(result.behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
+ enable = false;
+ } else {
+ /* Default to fallback if case hcall is not available */
+ types = L1D_FLUSH_FALLBACK;
+ }
+
+ setup_rfi_flush(types, enable);
+}
+
static void __init pSeries_setup_arch(void)
{
set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
@@ -476,6 +509,8 @@ static void __init pSeries_setup_arch(void)
fwnmi_init();
+ pseries_setup_rfi_flush();
+
/* By default, only probe PCI (can be overridden by rtas_pci) */
pci_add_flags(PCI_PROBE_ONLY);
--
2.14.3
^ permalink raw reply related
* [PATCH 11/11] powerpc/powernv: Check device-tree for RFI flush settings
From: Michael Ellerman @ 2018-01-08 16:54 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-kernel, tglx, peterz, npiggin, anton, mikey, oohall, paulus
In-Reply-To: <20180108165453.26066-1-mpe@ellerman.id.au>
From: Oliver O'Halloran <oohall@gmail.com>
New device-tree properties are available which tell the hypervisor
settings related to the RFI flush. Use them to determine the
appropriate flush instruction to use, and whether the flush is
required.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/platforms/powernv/setup.c | 49 ++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index 1edfbc1e40f4..4fb21e17504a 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -37,13 +37,62 @@
#include <asm/kexec.h>
#include <asm/smp.h>
#include <asm/tm.h>
+#include <asm/setup.h>
#include "powernv.h"
+static void pnv_setup_rfi_flush(void)
+{
+ struct device_node *np, *fw_features;
+ enum l1d_flush_type type;
+ int enable;
+
+ /* Default to fallback in case fw-features are not available */
+ type = L1D_FLUSH_FALLBACK;
+ enable = 1;
+
+ np = of_find_node_by_name(NULL, "ibm,opal");
+ fw_features = of_get_child_by_name(np, "fw-features");
+ of_node_put(np);
+
+ if (fw_features) {
+ np = of_get_child_by_name(fw_features, "inst-l1d-flush-trig2");
+ if (np && of_property_read_bool(np, "enabled"))
+ type = L1D_FLUSH_MTTRIG;
+
+ of_node_put(np);
+
+ np = of_get_child_by_name(fw_features, "inst-l1d-flush-ori30,30,0");
+ if (np && of_property_read_bool(np, "enabled"))
+ type = L1D_FLUSH_ORI;
+
+ of_node_put(np);
+
+ /* Enable unless firmware says NOT to */
+ enable = 2;
+ np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-hv-1-to-0");
+ if (np && of_property_read_bool(np, "disabled"))
+ enable--;
+
+ of_node_put(np);
+
+ np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-pr-0-to-1");
+ if (np && of_property_read_bool(np, "disabled"))
+ enable--;
+
+ of_node_put(np);
+ of_node_put(fw_features);
+ }
+
+ setup_rfi_flush(type, enable > 0);
+}
+
static void __init pnv_setup_arch(void)
{
set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
+ pnv_setup_rfi_flush();
+
/* Initialize SMP */
pnv_smp_init();
--
2.14.3
^ permalink raw reply related
* Re: [PATCH 1/6] cxlflash: Reset command ioasc
From: Uma Krishnan @ 2018-01-08 16:59 UTC (permalink / raw)
To: Matthew R. Ochs
Cc: Andrew Donnellan, James Bottomley, linux-scsi, Martin K. Petersen,
Frederic Barrat, Manoj N. Kumar, linuxppc-dev, Christophe Lombard
In-Reply-To: <20180107193604.GB45065@p8tul1-build.aus.stglabs.ibm.com>
> On Jan 7, 2018, at 1:36 PM, Matthew R. Ochs =
<mrochs@linux.vnet.ibm.com> wrote:
>=20
> On Thu, Jan 04, 2018 at 05:33:48PM +1100, Andrew Donnellan wrote:
>> On 04/01/18 09:54, Uma Krishnan wrote:
>>> In the event of a command failure, cxlflash returns the failure to =
the
>>> upper layers to process. After processing the error, when the =
command is
>>> queued again, the private command structure will not be zeroed and =
the
>>> ioasc could be stale. Per the SISLite specification, the AFU only =
sets the
>>> ioasc in the presence of a failure. Thus, even though the original =
command
>>> succeeds the second time, the command is considered a failure due to =
stale
>>> ioasc. This cycle repeats indefinitely and can cause a hang or IO =
failure.
>>>=20
>>> To fix the issue, clear the ioasc before queuing any command.
>>>=20
>>> Fixes: 479ad8e9d48c ("scsi: cxlflash: Remove zeroing of private =
command
>>> data")
>>> Signed-off-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com>
>>=20
>> Should this go to stable?
>=20
> Not a bad idea.
>=20
I will forward the patch to stable once the patch is in next/master.=20
Unless there is a need to send a V2. Thanks for pointing out Andrew !!=
^ permalink raw reply
* Re: [PATCH 03/11] powerpc/64s: Simple RFI macro conversions
From: Peter Zijlstra @ 2018-01-08 17:09 UTC (permalink / raw)
To: Michael Ellerman
Cc: linuxppc-dev, linux-kernel, tglx, npiggin, anton, mikey, oohall,
paulus
In-Reply-To: <20180108165453.26066-3-mpe@ellerman.id.au>
On Tue, Jan 09, 2018 at 03:54:45AM +1100, Michael Ellerman wrote:
> diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S b/arch/powerpc/kvm/book3s_rmhandlers.S
> index 42a4b237df5f..34a5adeff084 100644
> --- a/arch/powerpc/kvm/book3s_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_rmhandlers.S
> @@ -46,6 +46,9 @@
>
> #define FUNC(name) name
>
> +#define RFI_TO_KERNEL RFI
> +#define RFI_TO_GUEST RFI
> +
> .macro INTERRUPT_TRAMPOLINE intno
>
> .global kvmppc_trampoline_\intno
Leftovers? The previous patch seems to define all that in common
headers, why redefine here again?
^ permalink raw reply
* [PATCH V2] powerpc/kernel: Add 'ibm,thread-groups' property for CPU allocation
From: Michael Bringmann @ 2018-01-08 17:19 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
Add code to parse the new property 'ibm,thread-groups" when it is
present. The content of this property explicitly defines the number
of threads per core as well as the PowerPC 'threads_core_mask'.
The design provides a common device-tree for both P9 normal core and
P9 fused core systems. The new property has been observed to be
available on P9 pHyp systems, but it is not always present on
OpenPower BMC systems.
The property updates the kernel to know which CPUs/threads of each
core are actually present, and then use the map when adding cores
to the system at boot, or during hotplug operations.
* Previously, the information about the number of threads per core
was inferred solely from the "ibm,ppc-interrupt-server#s" property
in the system device tree.
* Also previous to this property, The mask of threads per CPU was
inferred to be a strict linear series from 0..(nthreads-1).
* After reading the "ibm,thread-group" property, we can determine
the number of threads per core to be the 'bitmask weight' of the
CPU thread mask.
* Also after reading the property, we can determine which of the
possible threads we are allowed to online for each CPU. It is no
longer a simple linear sequence, but may be discontinuous e.g.
activate threads 1,2,3,5,6,7 on a core instead of 0-5 sequentially.
Implementation of the "ibm,thread-groups" property is spread across
a few files in the powerpc specific code:
* prom.c: Parse the property and create 'ppc_thread_group_mask'.
Use the mask in operation of early_init_dt_scan_cpus().
* setup-common.c: Import 'ppc_thread_group_mask' and use the value
in the operation of cpu_init_thread_core_maps(), and
smp_setup_cpu_maps.
* hotplug-cpu.c: Use 'ppc_thread_group_mask' in several locations
where the code previously expected to iterate over a
linear series of active threads (0..nthreads-1).
Note that the "ibm,thread-groups" property also includes semantics
of 'thread-group' i.e. define one or more subgroups of the available
threads, each group of threads to be used for a specific class of
task. Translating thread group semantics into Linux kernel features
is TBD.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
---
Changes in V2:
-- Add more information and examples to the patch description.
-- Rename 'pseries_thread_group_mask' to 'ppc_thread_group_mask'
-- Remove unnecessary debug message complaining about absence of
property.
-- Reduce indent complexity of early_init_dt_scan_cpus().
---
arch/powerpc/include/asm/cputhreads.h | 2 +
arch/powerpc/kernel/prom.c | 74 ++++++++++++++++++++++++++
arch/powerpc/kernel/setup-common.c | 30 +++++++----
arch/powerpc/platforms/pseries/hotplug-cpu.c | 13 ++++-
4 files changed, 107 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index d71a909..8e444d4 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
@@ -31,6 +31,8 @@
#define threads_core_mask (*get_cpu_mask(0))
#endif
+extern cpumask_t ppc_thread_group_mask;
+
/* cpu_thread_mask_to_cores - Return a cpumask of one per cores
* hit by the argument
*
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index b15bae2..0a49231 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -68,6 +68,9 @@
#define DBG(fmt...)
#endif
+cpumask_t ppc_thread_group_mask;
+EXPORT_SYMBOL(ppc_thread_group_mask);
+
#ifdef CONFIG_PPC64
int __initdata iommu_is_off;
int __initdata iommu_force_on;
@@ -303,6 +306,71 @@ static void __init check_cpu_feature_properties(unsigned long node)
}
}
+static void __init early_init_setup_thread_group_mask(unsigned long node,
+ cpumask_t *thread_group_mask)
+{
+ const __be32 *thrgrp;
+ int len, rc = 0;
+ u32 cc_type = 0, no_split = 0, thr_per_split = 0;
+ int j, k;
+
+ cpumask_clear(thread_group_mask);
+
+ thrgrp = of_get_flat_dt_prop(node, "ibm,thread-groups", &len);
+ if (!thrgrp)
+ return;
+
+ /* Process the thread groups for the Core thread mask */
+ /* Characteristic type per table */
+ cc_type = of_read_number(thrgrp++, 1);
+
+ /*
+ * 1 : Group shares common L1, translation cache, and
+ * instruction data flow
+ * >1 : Reserved
+ */
+ if (cc_type != 1) {
+ rc = -EINVAL;
+ goto endit;
+ }
+
+ /* No. splits */
+ no_split = of_read_number(thrgrp++, 1);
+ if (no_split == 0) {
+ rc = -EINVAL;
+ goto endit;
+ }
+
+ /* Threads per split */
+ thr_per_split = of_read_number(thrgrp++, 1);
+ if (thr_per_split == 0) {
+ rc = -EINVAL;
+ goto endit;
+ }
+
+ DBG("INFO: Node %d; ibm,thread-group "
+ "(cc_t=%d, no_spl=%d, thr_p_spl=%d)\n",
+ (int)node, (int)cc_type, (int)no_split,
+ (int)thr_per_split);
+
+ for (j = 0; j < no_split; j++) {
+ for (k = 0; k < thr_per_split; k++) {
+ u32 t = of_read_number(thrgrp++, 1);
+
+ cpumask_set_cpu(t, thread_group_mask);
+ DBG("INFO: Node %d; enable thread %d\n",
+ (int)node, (int)t);
+ }
+ }
+
+endit:
+ if (rc) {
+ DBG("WARNING: Node %d; error processing "
+ "ibm,thread-group property\n", (int)node);
+ cpumask_setall(thread_group_mask);
+ }
+}
+
static int __init early_init_dt_scan_cpus(unsigned long node,
const char *uname, int depth,
void *data)
@@ -326,11 +394,17 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
nthreads = len / sizeof(int);
+ /* Figure out the thread subset */
+ early_init_setup_thread_group_mask(node, &ppc_thread_group_mask);
+
/*
* Now see if any of these threads match our boot cpu.
* NOTE: This must match the parsing done in smp_setup_cpu_maps.
*/
for (i = 0; i < nthreads; i++) {
+ if (!cpumask_test_cpu(i % nthreads, &ppc_thread_group_mask))
+ continue;
+
/*
* version 2 of the kexec param format adds the phys cpuid of
* booted proc.
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 2075322..53cadcd 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -427,13 +427,16 @@ void __init check_for_initrd(void)
EXPORT_SYMBOL_GPL(threads_shift);
EXPORT_SYMBOL_GPL(threads_core_mask);
-static void __init cpu_init_thread_core_maps(int tpc)
+static void __init cpu_init_thread_core_maps(int tpc,
+ cpumask_t *thread_group_mask)
{
+ cpumask_t work_mask;
int i;
threads_per_core = tpc;
threads_per_subcore = tpc;
cpumask_clear(&threads_core_mask);
+ cpumask_clear(&work_mask);
/* This implementation only supports power of 2 number of threads
* for simplicity and performance
@@ -442,14 +445,14 @@ static void __init cpu_init_thread_core_maps(int tpc)
BUG_ON(tpc != (1 << threads_shift));
for (i = 0; i < tpc; i++)
- cpumask_set_cpu(i, &threads_core_mask);
+ cpumask_set_cpu(i, &work_mask);
+ cpumask_and(&threads_core_mask, &work_mask, thread_group_mask);
printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
tpc, tpc > 1 ? "s" : "");
printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
}
-
/**
* setup_cpu_maps - initialize the following cpu maps:
* cpu_possible_mask
@@ -503,17 +506,24 @@ void __init smp_setup_cpu_maps(void)
for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
bool avail;
- DBG(" thread %d -> cpu %d (hard id %d)\n",
- j, cpu, be32_to_cpu(intserv[j]));
-
avail = of_device_is_available(dn);
if (!avail)
avail = !of_property_match_string(dn,
"enable-method", "spin-table");
- set_cpu_present(cpu, avail);
- set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
- set_cpu_possible(cpu, true);
+ DBG(" thread %d -> cpu %d (hard id %d)\n",
+ j, cpu, be32_to_cpu(intserv[j]));
+
+ if (cpumask_test_cpu(cpu % nthreads,
+ &ppc_thread_group_mask)) {
+ set_cpu_present(cpu, avail);
+ set_hard_smp_processor_id(cpu,
+ be32_to_cpu(intserv[j]));
+ set_cpu_possible(cpu, true);
+ } else {
+ set_cpu_present(cpu, false);
+ set_cpu_possible(cpu, false);
+ }
cpu++;
}
}
@@ -572,7 +582,7 @@ void __init smp_setup_cpu_maps(void)
* every CPU in the system. If that is not the case, then some code
* here will have to be reworked
*/
- cpu_init_thread_core_maps(nthreads);
+ cpu_init_thread_core_maps(nthreads, &ppc_thread_group_mask);
/* Now that possible cpus are set, set nr_cpu_ids for later use */
setup_nr_cpu_ids();
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index a7d14aa7..4125eaa 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -36,6 +36,7 @@
#include <asm/xics.h>
#include <asm/xive.h>
#include <asm/plpar_wrappers.h>
+#include <asm/cputhreads.h>
#include "pseries.h"
#include "offline_states.h"
@@ -258,8 +259,10 @@ static int pseries_add_processor(struct device_node *np)
zalloc_cpumask_var(&tmp, GFP_KERNEL);
nthreads = len / sizeof(u32);
- for (i = 0; i < nthreads; i++)
- cpumask_set_cpu(i, tmp);
+ for (i = 0; i < nthreads; i++) {
+ if (cpumask_test_cpu(i % nthreads, &ppc_thread_group_mask))
+ cpumask_set_cpu(i, tmp);
+ }
cpu_maps_update_begin();
@@ -324,6 +327,8 @@ static void pseries_remove_processor(struct device_node *np)
cpu_maps_update_begin();
for (i = 0; i < nthreads; i++) {
+ if (!cpumask_test_cpu(i % nthreads, &ppc_thread_group_mask))
+ continue;
thread = be32_to_cpu(intserv[i]);
for_each_present_cpu(cpu) {
if (get_hard_smp_processor_id(cpu) != thread)
@@ -356,6 +361,8 @@ static int dlpar_online_cpu(struct device_node *dn)
cpu_maps_update_begin();
for (i = 0; i < nthreads; i++) {
+ if (!cpumask_test_cpu(i % nthreads, &ppc_thread_group_mask))
+ continue;
thread = be32_to_cpu(intserv[i]);
for_each_present_cpu(cpu) {
if (get_hard_smp_processor_id(cpu) != thread)
@@ -522,6 +529,8 @@ static int dlpar_offline_cpu(struct device_node *dn)
cpu_maps_update_begin();
for (i = 0; i < nthreads; i++) {
+ if (!cpumask_test_cpu(i % nthreads, &ppc_thread_group_mask))
+ continue;
thread = be32_to_cpu(intserv[i]);
for_each_present_cpu(cpu) {
if (get_hard_smp_processor_id(cpu) != thread)
^ permalink raw reply related
* Re: [PATCH 09/11] powerpc/64s: Allow control of RFI flush via sysfs
From: Thomas Gleixner @ 2018-01-08 17:20 UTC (permalink / raw)
To: Michael Ellerman
Cc: linuxppc-dev, LKML, Peter Zijlstra, npiggin, Anton Blanchard,
mikey, oohall, Paul Mackerras, Greg KH
In-Reply-To: <20180108165453.26066-9-mpe@ellerman.id.au>
On Tue, 9 Jan 2018, Michael Ellerman wrote:
Sorry, I wasn't aware about your efforts and did not cc you. I've just
queued a more generic sysfs interface for this whole mess:
https://lkml.kernel.org/r/20180107214913.096657732@linutronix.de
It should be simple to extend for write and it would be great if all
affected architectures could share it.
Thanks,
tglx
^ permalink raw reply
* [PATCH V3 0/3] powerpc/hotplug: Fix affinity assoc for LPAR migration
From: Michael Bringmann @ 2018-01-08 17:31 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
The migration of LPARs across Power systems affects many attributes
including that of the associativity of memory blocks and CPUs. The
patches in this set execute when a system is coming up fresh upon a
migration target. They are intended to,
* Recognize changes to the associativity of memory and CPUs recorded
in internal data structures when compared to the latest copies in
the device tree (e.g. ibm,dynamic-memory, ibm,dynamic-memory-v2,
cpus),
* Recognize changes to the associativity mapping (e.g. ibm,
associativity-lookup-arrays), locate all assigned memory blocks
corresponding to each changed row, and readd all such blocks.
* Generate calls to other code layers to reset the data structures
related to associativity of the CPUs and memory.
* Re-register the 'changed' entities into the target system.
Re-registration of CPUs and memory blocks mostly entails acting as
if they have been newly hot-added into the target system.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Michael Bringmann (3):
hotplug/mobility: Apply assoc lookup updates for Post Migration Topo
postmigration/memory: Review assoc lookup array changes
postmigration/memory: Associativity & 'ibm,dynamic-memory-v2'
---
Changes in V3:
-- Rename pseries_update_drconf_cpu to pseries_update_cpu
-- Simplify code to update CPU nodes during mobility checks.
Remove functions to generate extra HP_ELOG messages in favor
of direct function calls to dlpar_cpu_readd_by_index, or
dlpar_memory_readd_by_index.
-- Move check for "cpu" node type from pseries_update_cpu to
pseries_smp_notifier in 'hotplug-cpu.c'
-- Remove functions 'pseries_memory_readd_by_index' and
'pseries_cpu_readd_by_index' as no longer needed outside of
'mobility.c'.
^ permalink raw reply
* [PATCH V3 1/3] hotplug/mobility: Apply assoc updates for Post Migration Topo
From: Michael Bringmann @ 2018-01-08 17:32 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
In-Reply-To: <0658ebca-aa3c-9251-9d74-b645633a750a@linux.vnet.ibm.com>
hotplug/mobility: Recognize more changes to the associativity of
memory blocks described by the 'ibm,dynamic-memory' and 'cpu'
properties when processing the topology of LPARS in Post Migration
events. Previous efforts only recognized whether a memory block's
assignment had changed in the property. Changes here include:
* Checking the aa_index values of the old/new properties and 'readd'
any block for which the setting has changed.
* Checking for changes in cpu associativity and making 'readd' calls
when differences are observed.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
---
Changes in V3:
-- Simplify code to update CPU nodes during mobility checks.
Remove functions to generate extra HP_ELOG messages in favor
of direct function calls to dlpar_cpu_readd_by_index.
-- Move check for "cpu" node type from pseries_update_cpu to
pseries_smp_notifier in 'hotplug-cpu.c'
-- Remove functions 'pseries_memory_readd_by_index' and
'pseries_cpu_readd_by_index' as no longer needed outside of
'mobility.c'.
---
arch/powerpc/platforms/pseries/hotplug-cpu.c | 69 +++++++++++++++++++++++
arch/powerpc/platforms/pseries/hotplug-memory.c | 7 ++
2 files changed, 76 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index a7d14aa7..64e29d76 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -636,6 +636,27 @@ static int dlpar_cpu_remove_by_index(u32 drc_index)
return rc;
}
+static int dlpar_cpu_readd_by_index(u32 drc_index)
+{
+ int rc = 0;
+
+ pr_info("Attempting to update CPU, drc index %x\n", drc_index);
+
+ if (dlpar_cpu_remove_by_index(drc_index))
+ rc = -EINVAL;
+ else if (dlpar_cpu_add(drc_index))
+ rc = -EINVAL;
+
+ if (rc)
+ pr_info("Failed to update cpu at drc_index %lx\n",
+ (unsigned long int)drc_index);
+ else
+ pr_info("CPU at drc_index %lx was updated\n",
+ (unsigned long int)drc_index);
+
+ return rc;
+}
+
static int find_dlpar_cpus_to_remove(u32 *cpu_drcs, int cpus_to_remove)
{
struct device_node *dn;
@@ -826,6 +847,9 @@ int dlpar_cpu(struct pseries_hp_errorlog *hp_elog)
else
rc = -EINVAL;
break;
+ case PSERIES_HP_ELOG_ACTION_READD:
+ rc = dlpar_cpu_readd_by_index(drc_index);
+ break;
default:
pr_err("Invalid action (%d) specified\n", hp_elog->action);
rc = -EINVAL;
@@ -876,12 +900,53 @@ static ssize_t dlpar_cpu_release(const char *buf, size_t count)
#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
+static int pseries_update_cpu(struct of_reconfig_data *pr)
+{
+ u32 old_entries, new_entries;
+ __be32 *p, *old_assoc, *new_assoc;
+ int rc = 0;
+
+ /* So far, we only handle the 'ibm,associativity' property,
+ * here.
+ * The first int of the property is the number of domains
+ * described. This is followed by an array of level values.
+ */
+ p = (__be32 *) pr->old_prop->value;
+ if (!p)
+ return -EINVAL;
+ old_entries = be32_to_cpu(*p++);
+ old_assoc = p;
+
+ p = (__be32 *)pr->prop->value;
+ if (!p)
+ return -EINVAL;
+ new_entries = be32_to_cpu(*p++);
+ new_assoc = p;
+
+ if (old_entries == new_entries) {
+ int sz = old_entries * sizeof(int);
+
+ if (!memcmp(old_assoc, new_assoc, sz))
+ rc = dlpar_cpu_readd_by_index(
+ be32_to_cpu(pr->dn->phandle));
+
+ } else {
+ rc = dlpar_cpu_readd_by_index(
+ be32_to_cpu(pr->dn->phandle));
+ }
+
+ return rc;
+}
+
static int pseries_smp_notifier(struct notifier_block *nb,
unsigned long action, void *data)
{
struct of_reconfig_data *rd = data;
int err = 0;
+ if (strcmp(pr->dn->type, "cpu"))
+ return notifier_from_errno(err);
+
switch (action) {
case OF_RECONFIG_ATTACH_NODE:
err = pseries_add_processor(rd->dn);
@@ -889,6 +954,10 @@ static int pseries_smp_notifier(struct notifier_block *nb,
case OF_RECONFIG_DETACH_NODE:
pseries_remove_processor(rd->dn);
break;
+ case OF_RECONFIG_UPDATE_PROPERTY:
+ if (!strcmp(rd->prop->name, "ibm,associativity"))
+ err = pseries_update_cpu(rd);
+ break;
}
return notifier_from_errno(err);
}
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 1d48ab4..0e2ae20 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -1160,6 +1160,13 @@ static int pseries_update_drconf_memory(struct of_reconfig_data *pr)
memblock_size);
rc = (rc < 0) ? -EINVAL : 0;
break;
+ } else if ((be32_to_cpu(old_drmem[i].aa_index) !=
+ be32_to_cpu(new_drmem[i].aa_index)) &&
+ (be32_to_cpu(new_drmem[i].flags) &
+ DRCONF_MEM_ASSIGNED)) {
+ rc = dlpar_memory_readd_by_index(
+ be32_to_cpu(new_drmem[i].drc_index),
+ pr->prop);
}
}
return rc;
^ permalink raw reply related
* [PATCH V3 2/3] postmigration/memory: Review assoc lookup array changes
From: Michael Bringmann @ 2018-01-08 17:32 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
In-Reply-To: <0658ebca-aa3c-9251-9d74-b645633a750a@linux.vnet.ibm.com>
postmigration/memory: In an LPAR migration scenario, the property
"ibm,associativity-lookup-arrays" may change. In the event that a
row of the array differs, locate all assigned memory blocks with that
'aa_index' and 're-add' them to the system memory block data structures.
In the process of the 're-add', the appropriate entry of the property
'ibm,dynamic-memory' would be updated as well as any other applicable
system data structures.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
---
Changes in V3:
-- Simplify code to update memory nodes during mobility checks.
Remove functions to generate extra HP_ELOG messages in favor
of direct function calls to dlpar_memory_readd_by_index.
---
arch/powerpc/platforms/pseries/hotplug-memory.c | 121 +++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 0e2ae20..04208b0 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -1172,6 +1172,124 @@ static int pseries_update_drconf_memory(struct of_reconfig_data *pr)
return rc;
}
+struct assoc_arrays {
+ u32 n_arrays;
+ u32 array_sz;
+ const __be32 *arrays;
+};
+
+static int pseries_update_ala_memory_aai(int aa_index,
+ struct property *dmprop)
+{
+ struct of_drconf_cell *drmem;
+ u32 entries;
+ __be32 *p;
+ int i;
+ int rc = 0;
+
+ p = (__be32 *) dmprop->value;
+ if (!p)
+ return -EINVAL;
+
+ /* The first int of the property is the number of lmb's
+ * described by the property. This is followed by an array
+ * of of_drconf_cell entries. Get the number of entries
+ * and skip to the array of of_drconf_cell's.
+ */
+ entries = be32_to_cpu(*p++);
+ drmem = (struct of_drconf_cell *)p;
+
+ for (i = 0; i < entries; i++) {
+ if ((be32_to_cpu(drmem[i].aa_index) != aa_index) &&
+ (be32_to_cpu(drmem[i].flags) & DRCONF_MEM_ASSIGNED)) {
+ rc = dlpar_memory_readd_by_index(
+ be32_to_cpu(drmem[i].drc_index),
+ dmprop);
+ }
+ }
+
+ return rc;
+}
+
+static int pseries_update_ala_memory(struct of_reconfig_data *pr)
+{
+ struct assoc_arrays new_ala, old_ala;
+ struct device_node *dn;
+ struct property *dmprop;
+ __be32 *p;
+ int i, lim;
+
+ if (rtas_hp_event)
+ return 0;
+
+ dn = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
+ if (!dn)
+ return -ENODEV;
+
+ dmprop = of_find_property(dn, "ibm,dynamic-memory", NULL);
+ if (!dmprop) {
+ of_node_put(dn);
+ return -ENODEV;
+ }
+
+ /*
+ * The layout of the ibm,associativity-lookup-arrays
+ * property is a number N indicating the number of
+ * associativity arrays, followed by a number M
+ * indicating the size of each associativity array,
+ * followed by a list of N associativity arrays.
+ */
+
+ p = (__be32 *) pr->old_prop->value;
+ if (!p) {
+ of_node_put(dn);
+ return -EINVAL;
+ }
+ old_ala.n_arrays = of_read_number(p++, 1);
+ old_ala.array_sz = of_read_number(p++, 1);
+ old_ala.arrays = p;
+
+ p = (__be32 *) pr->prop->value;
+ if (!p) {
+ of_node_put(dn);
+ return -EINVAL;
+ }
+ new_ala.n_arrays = of_read_number(p++, 1);
+ new_ala.array_sz = of_read_number(p++, 1);
+ new_ala.arrays = p;
+
+ lim = (new_ala.n_arrays > old_ala.n_arrays) ? old_ala.n_arrays :
+ new_ala.n_arrays;
+
+ if (old_ala.array_sz == new_ala.array_sz) {
+
+ for (i = 0; i < lim; i++) {
+ int index = (i * new_ala.array_sz);
+
+ if (!memcmp(&old_ala.arrays[index],
+ &new_ala.arrays[index],
+ new_ala.array_sz))
+ continue;
+
+ pseries_update_ala_memory_aai(i, dmprop);
+ }
+
+ for (i = lim; i < new_ala.n_arrays; i++)
+ pseries_update_ala_memory_aai(i, dmprop);
+
+ } else {
+ /* Update all entries representing these rows;
+ * as all rows have different sizes, none can
+ * have equivalent values.
+ */
+ for (i = 0; i < lim; i++)
+ pseries_update_ala_memory_aai(i, dmprop);
+ }
+
+ of_node_put(dn);
+ return 0;
+}
+
static int pseries_memory_notifier(struct notifier_block *nb,
unsigned long action, void *data)
{
@@ -1188,6 +1306,9 @@ static int pseries_memory_notifier(struct notifier_block *nb,
case OF_RECONFIG_UPDATE_PROPERTY:
if (!strcmp(rd->prop->name, "ibm,dynamic-memory"))
err = pseries_update_drconf_memory(rd);
+ if (!strcmp(rd->prop->name,
+ "ibm,associativity-lookup-arrays"))
+ err = pseries_update_ala_memory(rd);
break;
}
return notifier_from_errno(err);
^ permalink raw reply related
* [PATCH V3 3/3] postmigration/memory: Associativity & ibm,dynamic-memory-v2
From: Michael Bringmann @ 2018-01-08 17:32 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
In-Reply-To: <0658ebca-aa3c-9251-9d74-b645633a750a@linux.vnet.ibm.com>
postmigration/memory: Now apply changes to the associativity of memory
blocks described by the 'ibm,dynamic-memory-v2' property regarding
the topology of LPARS in Post Migration events.
* Extend the previous work done for the 'ibm,associativity-lookup-array'
to apply to either property 'ibm,dynamic-memory' or
'ibm,dynamic-memory-v2', whichever is present.
* Add new code to parse the 'ibm,dynamic-memory-v2' property looking
for differences in block 'assignment', associativity indexes per
block, and any other difference currently known.
When block differences are recognized, the memory block may be removed,
added, or updated depending upon the state of the new device tree
property and differences from the migrated value of the property.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
---
Changes in V3:
-- Remove unnecessary spacing changes from patch.
-- Improve patch description.
---
arch/powerpc/include/asm/prom.h | 12 ++
arch/powerpc/platforms/pseries/hotplug-memory.c | 169 ++++++++++++++++++++++-
2 files changed, 172 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index 825bd59..e16ef0f 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -92,6 +92,18 @@ struct of_drconf_cell {
u32 flags;
};
+/* The of_drconf_cell_v2 struct defines the layout of the LMB array
+ * specified in the device tree property
+ * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory-v2
+ */
+struct of_drconf_cell_v2 {
+ u32 num_seq_lmbs;
+ u64 base_address;
+ u32 drc_index;
+ u32 aa_index;
+ u32 flags;
+} __attribute__((packed));
+
#define DRCONF_MEM_ASSIGNED 0x00000008
#define DRCONF_MEM_AI_INVALID 0x00000040
#define DRCONF_MEM_RESERVED 0x00000080
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 04208b0..d406b41 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -1172,14 +1172,111 @@ static int pseries_update_drconf_memory(struct of_reconfig_data *pr)
return rc;
}
+static inline int pseries_memory_v2_find_drc(u32 drc_index,
+ u64 *base_addr, unsigned long memblock_size,
+ struct of_drconf_cell_v2 **drmem,
+ struct of_drconf_cell_v2 *last_drmem)
+{
+ struct of_drconf_cell_v2 *dm = (*drmem);
+
+ while (dm < last_drmem) {
+ if ((be32_to_cpu(dm->drc_index) <= drc_index) &&
+ (drc_index <= (be32_to_cpu(dm->drc_index)+
+ be32_to_cpu(dm->num_seq_lmbs)-1))) {
+ int offset = drc_index - be32_to_cpu(dm->drc_index);
+ (*base_addr) = be64_to_cpu(dm->base_address) +
+ (offset * memblock_size);
+ break;
+ } else if (drc_index > (be32_to_cpu(dm->drc_index)+
+ be32_to_cpu(dm->num_seq_lmbs)-1)) {
+ dm++;
+ (*drmem) = dm;
+ } else if (be32_to_cpu(dm->drc_index) > drc_index) {
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+static int pseries_update_drconf_memory_v2(struct of_reconfig_data *pr)
+{
+ struct of_drconf_cell_v2 *new_drmem, *old_drmem, *last_old_drmem;
+ unsigned long memblock_size;
+ u32 new_entries, old_entries;
+ u64 old_base_addr;
+ __be32 *p;
+ int i, rc = 0;
+
+ if (rtas_hp_event)
+ return 0;
+
+ memblock_size = pseries_memory_block_size();
+ if (!memblock_size)
+ return -EINVAL;
+
+ /* The first int of the property is the number of lmb's
+ * described by the property. This is followed by an array
+ * of of_drconf_cell_v2 entries. Get the number of entries
+ * and skip to the array of of_drconf_cell_v2's.
+ */
+ p = (__be32 *) pr->old_prop->value;
+ if (!p)
+ return -EINVAL;
+ old_entries = be32_to_cpu(*p++);
+ old_drmem = (struct of_drconf_cell_v2 *)p;
+ last_old_drmem = old_drmem +
+ (sizeof(struct of_drconf_cell_v2) * old_entries);
+
+ p = (__be32 *)pr->prop->value;
+ new_entries = be32_to_cpu(*p++);
+ new_drmem = (struct of_drconf_cell_v2 *)p;
+
+ for (i = 0; i < new_entries; i++) {
+ int j;
+ u32 new_drc_index = be32_to_cpu(new_drmem->drc_index);
+
+ for (j = 0; j < new_drmem->num_seq_lmbs; j++) {
+ if (!pseries_memory_v2_find_drc(new_drc_index+j,
+ &old_base_addr,
+ memblock_size,
+ &old_drmem,
+ last_old_drmem)) {
+ if ((be32_to_cpu(old_drmem->flags) &
+ DRCONF_MEM_ASSIGNED) &&
+ (!(be32_to_cpu(new_drmem->flags) &
+ DRCONF_MEM_ASSIGNED))) {
+ rc = pseries_remove_memblock(
+ old_base_addr,
+ memblock_size);
+ } else if ((!(be32_to_cpu(old_drmem->flags) &
+ DRCONF_MEM_ASSIGNED)) &&
+ (be32_to_cpu(new_drmem->flags) &
+ DRCONF_MEM_ASSIGNED)) {
+ rc = memblock_add(
+ old_base_addr, memblock_size);
+ } else if ((be32_to_cpu(old_drmem->aa_index) !=
+ be32_to_cpu(new_drmem->aa_index)) &&
+ (be32_to_cpu(new_drmem->flags) &
+ DRCONF_MEM_ASSIGNED)) {
+ pseries_memory_readd_by_index(
+ new_drc_index+j);
+ }
+ }
+ }
+ }
+
+ return 0;
+}
+
struct assoc_arrays {
u32 n_arrays;
u32 array_sz;
const __be32 *arrays;
};
-static int pseries_update_ala_memory_aai(int aa_index,
- struct property *dmprop)
+static int pseries_update_ala_memory_aai_v1(int aa_index,
+ struct property *dmprop)
{
struct of_drconf_cell *drmem;
u32 entries;
@@ -1211,11 +1308,47 @@ static int pseries_update_ala_memory_aai(int aa_index,
return rc;
}
+static int pseries_update_ala_memory_aai_v2(int aa_index,
+ struct property *dmprop)
+{
+ struct of_drconf_cell_v2 *drmem;
+ u32 entries;
+ __be32 *p;
+ int i;
+
+ p = (__be32 *) dmprop->value;
+ if (!p)
+ return -EINVAL;
+
+ /* The first int of the property is the number of lmb's
+ * described by the property. This is followed by an array
+ * of of_drconf_cell_v2 entries. Get the number of entries
+ * and skip to the array of of_drconf_cell_v2's.
+ */
+ entries = be32_to_cpu(*p++);
+ drmem = (struct of_drconf_cell_v2 *)p;
+
+ for (i = 0; i < entries; i++) {
+ if ((be32_to_cpu(drmem[i].aa_index) != aa_index) &&
+ (be32_to_cpu(drmem[i].flags) & DRCONF_MEM_ASSIGNED)) {
+ int j;
+ int lim = be32_to_cpu(drmem->num_seq_lmbs);
+ u32 drc_index = be32_to_cpu(drmem->drc_index);
+
+ for (j = 0; j < lim; j++)
+ pseries_memory_readd_by_index(drc_index+j);
+ }
+ }
+
+ return 0;
+}
+
static int pseries_update_ala_memory(struct of_reconfig_data *pr)
{
struct assoc_arrays new_ala, old_ala;
struct device_node *dn;
struct property *dmprop;
+ bool v1 = true;
__be32 *p;
int i, lim;
@@ -1228,8 +1361,13 @@ static int pseries_update_ala_memory(struct of_reconfig_data *pr)
dmprop = of_find_property(dn, "ibm,dynamic-memory", NULL);
if (!dmprop) {
- of_node_put(dn);
--
Michael W. Bringmann
Linux Technology Center
IBM Corporation
Tie-Line 363-5196
External: (512) 286-5196
Cell: (512) 466-0650
mwb@linux.vnet.ibm.com
- return -ENODEV;
+ v1 = false;
+ dmprop = of_find_property(dn, "ibm,dynamic-memory-v2",
+ NULL);
+ if (!dmprop) {
+ of_node_put(dn);
+ return -ENODEV;
+ }
}
/*
@@ -1271,19 +1409,30 @@ static int pseries_update_ala_memory(struct of_reconfig_data *pr)
new_ala.array_sz))
continue;
- pseries_update_ala_memory_aai(i, dmprop);
+ if (v1)
+ pseries_update_ala_memory_aai_v1(i, dmprop);
+ else
+ pseries_update_ala_memory_aai_v2(i, dmprop);
}
- for (i = lim; i < new_ala.n_arrays; i++)
- pseries_update_ala_memory_aai(i, dmprop);
+ for (i = lim; i < new_ala.n_arrays; i++) {
+ if (v1)
+ pseries_update_ala_memory_aai_v1(i, dmprop);
+ else
+ pseries_update_ala_memory_aai_v2(i, dmprop);
+ }
} else {
/* Update all entries representing these rows;
* as all rows have different sizes, none can
* have equivalent values.
*/
- for (i = 0; i < lim; i++)
- pseries_update_ala_memory_aai(i, dmprop);
+ for (i = 0; i < lim; i++) {
+ if (v1)
+ pseries_update_ala_memory_aai_v1(i, dmprop);
+ else
+ pseries_update_ala_memory_aai_v2(i, dmprop);
+ }
}
of_node_put(dn);
@@ -1306,6 +1455,8 @@ static int pseries_memory_notifier(struct notifier_block *nb,
case OF_RECONFIG_UPDATE_PROPERTY:
if (!strcmp(rd->prop->name, "ibm,dynamic-memory"))
err = pseries_update_drconf_memory(rd);
+ if (!strcmp(rd->prop->name, "ibm,dynamic-memory-v2"))
+ err = pseries_update_drconf_memory_v2(rd);
if (!strcmp(rd->prop->name,
"ibm,associativity-lookup-arrays"))
err = pseries_update_ala_memory(rd);
^ permalink raw reply related
* Re: [net] Revert "net: core: maybe return -EEXIST in __dev_alloc_name"
From: David Miller @ 2018-01-08 17:36 UTC (permalink / raw)
To: mpe; +Cc: linux, michael, j, netdev, johannes, linuxppc-dev, johannes.berg
In-Reply-To: <874lnx2fqj.fsf@concordia.ellerman.id.au>
From: Michael Ellerman <mpe@ellerman.id.au>
Date: Mon, 08 Jan 2018 14:26:12 +1100
> I don't see it in rc7, will it get to Linus sometime before the
> release?
I will do what I can to make sure it does, it is in my GIT tree.
^ permalink raw reply
* Re: [PATCH V2] powerpc/pseries: Invalidate numa_cpu_lookup_table on cpu remove
From: Nathan Fontenot @ 2018-01-08 17:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <151253089428.9767.11338558114386276250.stgit@ltcalpine2-lp14.aus.stglabs.ibm.com>
Hi Michael,
I hadn't seen any update on this patch, just wanted to make sure you saw it.
-Nathan
On 12/05/2017 09:33 PM, Nathan Fontenot wrote:
> When DLPAR removing a CPU we need to invalidate its entry in the
> numa_cpu_lookup_table. There is no guarantee that on a subsequent
> DLPAR add of the CPU the associativity will be the same and thus it
> could be in a different node. Invalidating the entry in the
> numa_cpu_lookup_table causes the associativity to be read from the
> device tree at the time of the add.
>
> The current behavior of not invalidating the CPUs entry in the
> numa_cpu_lookup_table can result in scenarios where the the topology
> layout of CPUs in the partition does not match the device tree
> or the topology reported by the HMC.
>
> This patch move the update_numa_cpu_lookup_table to topology.h so it is
> available outside of numa.c. A call to this routine is added in
> pseries_remove_processor().
>
> Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
> ---
>
> Updates for V2: Move the invalidation from unmap_cpu_from_node to
> pseries_remove_processor, the former routine is also called during cpu
> offline and we do not want to invalidate during cpu offline.
>
> arch/powerpc/include/asm/topology.h | 5 +++++
> arch/powerpc/mm/numa.c | 5 -----
> arch/powerpc/platforms/pseries/hotplug-cpu.c | 2 ++
> 3 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
> index 88187c285c70..1c02e6900f78 100644
> --- a/arch/powerpc/include/asm/topology.h
> +++ b/arch/powerpc/include/asm/topology.h
> @@ -44,6 +44,11 @@ extern int sysfs_add_device_to_node(struct device *dev, int nid);
> extern void sysfs_remove_device_from_node(struct device *dev, int nid);
> extern int numa_update_cpu_topology(bool cpus_locked);
>
> +static inline void update_numa_cpu_lookup_table(unsigned int cpu, int node)
> +{
> + numa_cpu_lookup_table[cpu] = node;
> +}
> +
> static inline int early_cpu_to_node(int cpu)
> {
> int nid;
> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
> index adb6364f4091..09be66fcea68 100644
> --- a/arch/powerpc/mm/numa.c
> +++ b/arch/powerpc/mm/numa.c
> @@ -142,11 +142,6 @@ static void reset_numa_cpu_lookup_table(void)
> numa_cpu_lookup_table[cpu] = -1;
> }
>
> -static void update_numa_cpu_lookup_table(unsigned int cpu, int node)
> -{
> - numa_cpu_lookup_table[cpu] = node;
> -}
> -
> static void map_cpu_to_node(int cpu, int node)
> {
> update_numa_cpu_lookup_table(cpu, node);
> diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
> index a7d14aa7bb7c..09083ad82f7a 100644
> --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
> +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
> @@ -36,6 +36,7 @@
> #include <asm/xics.h>
> #include <asm/xive.h>
> #include <asm/plpar_wrappers.h>
> +#include <asm/topology.h>
>
> #include "pseries.h"
> #include "offline_states.h"
> @@ -331,6 +332,7 @@ static void pseries_remove_processor(struct device_node *np)
> BUG_ON(cpu_online(cpu));
> set_cpu_present(cpu, false);
> set_hard_smp_processor_id(cpu, -1);
> + update_numa_cpu_lookup_table(cpu, -1);
> break;
> }
> if (cpu >= nr_cpu_ids)
>
^ permalink raw reply
* [PATCH RESEND 0/1] Implements MMIO emulation for lvx/stvx instructions
From: Jose Ricardo Ziviani @ 2018-01-08 18:29 UTC (permalink / raw)
To: linuxppc-dev; +Cc: kvm-ppc, paulus
This patch implements MMIO emulation for two instructions: lvx and stvx.
NOTE: I'm resending copying now kvm-ppc@vger.kernel.org.
Thanks.
Jose Ricardo Ziviani (1):
KVM: PPC: Book3S: Add MMIO emulation for VMX instructions
arch/powerpc/include/asm/kvm_host.h | 2 +
arch/powerpc/include/asm/kvm_ppc.h | 4 +
arch/powerpc/include/asm/ppc-opcode.h | 6 ++
arch/powerpc/kvm/emulate_loadstore.c | 32 +++++++
arch/powerpc/kvm/powerpc.c | 162 ++++++++++++++++++++++++++++++----
5 files changed, 189 insertions(+), 17 deletions(-)
--
2.14.1
^ permalink raw reply
* [PATCH RESEND 1/1] KVM: PPC: Book3S: Add MMIO emulation for VMX instructions
From: Jose Ricardo Ziviani @ 2018-01-08 18:29 UTC (permalink / raw)
To: linuxppc-dev; +Cc: kvm-ppc, paulus
In-Reply-To: <20180108182931.355-1-joserz@linux.vnet.ibm.com>
This patch provides the MMIO load/store vector indexed
X-Form emulation.
Instructions implemented: lvx, stvx
Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/kvm_host.h | 2 +
arch/powerpc/include/asm/kvm_ppc.h | 4 +
arch/powerpc/include/asm/ppc-opcode.h | 6 ++
arch/powerpc/kvm/emulate_loadstore.c | 32 +++++++
arch/powerpc/kvm/powerpc.c | 162 ++++++++++++++++++++++++++++++----
5 files changed, 189 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 3aa5b577cd60..2c14a78c61a4 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -690,6 +690,7 @@ struct kvm_vcpu_arch {
u8 mmio_vsx_offset;
u8 mmio_vsx_copy_type;
u8 mmio_vsx_tx_sx_enabled;
+ u8 mmio_vmx_copy_nums;
u8 osi_needed;
u8 osi_enabled;
u8 papr_enabled;
@@ -800,6 +801,7 @@ struct kvm_vcpu_arch {
#define KVM_MMIO_REG_QPR 0x0040
#define KVM_MMIO_REG_FQPR 0x0060
#define KVM_MMIO_REG_VSX 0x0080
+#define KVM_MMIO_REG_VMX 0x00a0
#define __KVM_HAVE_ARCH_WQP
#define __KVM_HAVE_CREATE_DEVICE
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 941c2a3f231b..28c203003519 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -81,6 +81,10 @@ extern int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu,
extern int kvmppc_handle_vsx_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
unsigned int rt, unsigned int bytes,
int is_default_endian, int mmio_sign_extend);
+extern int kvmppc_handle_load128_by2x64(struct kvm_run *run,
+ struct kvm_vcpu *vcpu, unsigned int rt, int is_default_endian);
+extern int kvmppc_handle_store128_by2x64(struct kvm_run *run,
+ struct kvm_vcpu *vcpu, unsigned int rs, int is_default_endian);
extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
u64 val, unsigned int bytes,
int is_default_endian);
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index ce0930d68857..a51febca08c5 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -156,6 +156,12 @@
#define OP_31_XOP_LFDX 599
#define OP_31_XOP_LFDUX 631
+/* VMX Vector Load Instructions */
+#define OP_31_XOP_LVX 103
+
+/* VMX Vector Store Instructions */
+#define OP_31_XOP_STVX 231
+
#define OP_LWZ 32
#define OP_STFS 52
#define OP_STFSU 53
diff --git a/arch/powerpc/kvm/emulate_loadstore.c b/arch/powerpc/kvm/emulate_loadstore.c
index af833531af31..40fbc14809cb 100644
--- a/arch/powerpc/kvm/emulate_loadstore.c
+++ b/arch/powerpc/kvm/emulate_loadstore.c
@@ -58,6 +58,18 @@ static bool kvmppc_check_vsx_disabled(struct kvm_vcpu *vcpu)
}
#endif /* CONFIG_VSX */
+#ifdef CONFIG_ALTIVEC
+static bool kvmppc_check_altivec_disabled(struct kvm_vcpu *vcpu)
+{
+ if (!(kvmppc_get_msr(vcpu) & MSR_VEC)) {
+ kvmppc_core_queue_vec_unavail(vcpu);
+ return true;
+ }
+
+ return false;
+}
+#endif /* CONFIG_ALTIVEC */
+
/*
* XXX to do:
* lfiwax, lfiwzx
@@ -98,6 +110,7 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
vcpu->arch.mmio_vsx_copy_type = KVMPPC_VSX_COPY_NONE;
vcpu->arch.mmio_sp64_extend = 0;
vcpu->arch.mmio_sign_extend = 0;
+ vcpu->arch.mmio_vmx_copy_nums = 0;
switch (get_op(inst)) {
case 31:
@@ -459,6 +472,25 @@ int kvmppc_emulate_loadstore(struct kvm_vcpu *vcpu)
rs, 4, 1);
break;
#endif /* CONFIG_VSX */
+
+#ifdef CONFIG_ALTIVEC
+ case OP_31_XOP_LVX:
+ if (kvmppc_check_altivec_disabled(vcpu))
+ return EMULATE_DONE;
+ vcpu->arch.mmio_vmx_copy_nums = 2;
+ emulated = kvmppc_handle_load128_by2x64(run, vcpu,
+ KVM_MMIO_REG_VMX|rt, 1);
+ break;
+
+ case OP_31_XOP_STVX:
+ if (kvmppc_check_altivec_disabled(vcpu))
+ return EMULATE_DONE;
+ vcpu->arch.mmio_vmx_copy_nums = 2;
+ emulated = kvmppc_handle_store128_by2x64(run, vcpu,
+ rs, 1);
+ break;
+#endif /* CONFIG_ALTIVEC */
+
default:
emulated = EMULATE_FAIL;
break;
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 1915e86cef6f..7d0f60359ee0 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -832,23 +832,7 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod);
}
-#ifdef CONFIG_VSX
-static inline int kvmppc_get_vsr_dword_offset(int index)
-{
- int offset;
-
- if ((index != 0) && (index != 1))
- return -1;
-
-#ifdef __BIG_ENDIAN
- offset = index;
-#else
- offset = 1 - index;
-#endif
-
- return offset;
-}
-
+#ifdef CONFIG_ALTIVEC
static inline int kvmppc_get_vsr_word_offset(int index)
{
int offset;
@@ -864,6 +848,40 @@ static inline int kvmppc_get_vsr_word_offset(int index)
return offset;
}
+static inline void kvmppc_set_vmx_dword(struct kvm_vcpu *vcpu,
+ u64 gpr)
+{
+ int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK;
+ u64 hi = gpr >> 32;
+ u64 lo = gpr & 0xffffffff;
+
+ if (vcpu->arch.mmio_vmx_copy_nums == 1) {
+ VCPU_VSX_VR(vcpu, index).u[kvmppc_get_vsr_word_offset(2)] = hi;
+ VCPU_VSX_VR(vcpu, index).u[kvmppc_get_vsr_word_offset(3)] = lo;
+ } else if (vcpu->arch.mmio_vmx_copy_nums == 2) {
+ VCPU_VSX_VR(vcpu, index).u[kvmppc_get_vsr_word_offset(0)] = hi;
+ VCPU_VSX_VR(vcpu, index).u[kvmppc_get_vsr_word_offset(1)] = lo;
+ }
+}
+#endif /* CONFIG_ALTIVEC */
+
+#ifdef CONFIG_VSX
+static inline int kvmppc_get_vsr_dword_offset(int index)
+{
+ int offset;
+
+ if ((index != 0) && (index != 1))
+ return -1;
+
+#ifdef __BIG_ENDIAN
+ offset = index;
+#else
+ offset = 1 - index;
+#endif
+
+ return offset;
+}
+
static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu,
u64 gpr)
{
@@ -1027,6 +1045,11 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu,
KVMPPC_VSX_COPY_DWORD_LOAD_DUMP)
kvmppc_set_vsr_dword_dump(vcpu, gpr);
break;
+#endif
+#ifdef CONFIG_ALTIVEC
+ case KVM_MMIO_REG_VMX:
+ kvmppc_set_vmx_dword(vcpu, gpr);
+ break;
#endif
default:
BUG();
@@ -1307,6 +1330,99 @@ static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu,
}
#endif /* CONFIG_VSX */
+#ifdef CONFIG_ALTIVEC
+/* handle quadword load access in two halves */
+int kvmppc_handle_load128_by2x64(struct kvm_run *run, struct kvm_vcpu *vcpu,
+ unsigned int rt, int is_default_endian)
+{
+ enum emulation_result emulated = EMULATE_DONE;
+
+ while (vcpu->arch.mmio_vmx_copy_nums) {
+ emulated = __kvmppc_handle_load(run, vcpu, rt, 8,
+ is_default_endian, 0);
+ if (emulated != EMULATE_DONE)
+ break;
+
+ vcpu->arch.mmio_vmx_copy_nums--;
+ }
+ return emulated;
+}
+
+static inline int kvmppc_get_vmx_data(struct kvm_vcpu *vcpu, int rs, u64 *val)
+{
+
+ if (vcpu->arch.mmio_vmx_copy_nums == 1) {
+ *val = VCPU_VSX_VR(vcpu, rs).u[kvmppc_get_vsr_word_offset(2)];
+ *val = (*val << 32) | VCPU_VSX_VR(vcpu, rs).
+ u[kvmppc_get_vsr_word_offset(3)];
+ return 0;
+ } else if (vcpu->arch.mmio_vmx_copy_nums == 2) {
+ *val = VCPU_VSX_VR(vcpu, rs).u[kvmppc_get_vsr_word_offset(0)];
+ *val = (*val << 32) | VCPU_VSX_VR(vcpu, rs).
+ u[kvmppc_get_vsr_word_offset(1)];
+ return 0;
+ }
+ return -1;
+}
+
+/* handle quadword store in two halves */
+int kvmppc_handle_store128_by2x64(struct kvm_run *run, struct kvm_vcpu *vcpu,
+ unsigned int rs, int is_default_endian)
+{
+ u64 val = 0;
+ enum emulation_result emulated = EMULATE_DONE;
+
+ vcpu->arch.io_gpr = rs;
+
+ while (vcpu->arch.mmio_vmx_copy_nums) {
+ if (kvmppc_get_vmx_data(vcpu, rs, &val) == -1)
+ return EMULATE_FAIL;
+
+ emulated = kvmppc_handle_store(run, vcpu, val, 8,
+ is_default_endian);
+ if (emulated != EMULATE_DONE)
+ break;
+
+ vcpu->arch.mmio_vmx_copy_nums--;
+ }
+ return emulated;
+}
+
+static int kvmppc_emulate_mmio_vmx_loadstore(struct kvm_vcpu *vcpu,
+ struct kvm_run *run)
+{
+ enum emulation_result emulated = EMULATE_FAIL;
+ int r;
+
+ vcpu->arch.paddr_accessed += run->mmio.len;
+
+ if (!vcpu->mmio_is_write) {
+ emulated = kvmppc_handle_load128_by2x64(run, vcpu,
+ vcpu->arch.io_gpr, 1);
+ } else {
+ emulated = kvmppc_handle_store128_by2x64(run, vcpu,
+ vcpu->arch.io_gpr, 1);
+ }
+
+ switch (emulated) {
+ case EMULATE_DO_MMIO:
+ run->exit_reason = KVM_EXIT_MMIO;
+ r = RESUME_HOST;
+ break;
+ case EMULATE_FAIL:
+ pr_info("KVM: MMIO emulation failed (VMX repeat)\n");
+ run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+ run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
+ r = RESUME_HOST;
+ break;
+ default:
+ r = RESUME_GUEST;
+ break;
+ }
+ return r;
+}
+#endif /* CONFIG_ALTIVEC */
+
int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
{
int r = 0;
@@ -1425,6 +1541,18 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
return r;
}
}
+#endif
+#ifdef CONFIG_ALTIVEC
+ if (vcpu->arch.mmio_vmx_copy_nums > 0)
+ vcpu->arch.mmio_vmx_copy_nums--;
+
+ if (vcpu->arch.mmio_vmx_copy_nums > 0) {
+ r = kvmppc_emulate_mmio_vmx_loadstore(vcpu, run);
+ if (r == RESUME_HOST) {
+ vcpu->mmio_needed = 1;
+ return r;
+ }
+ }
#endif
} else if (vcpu->arch.osi_needed) {
u64 *gprs = run->osi.gprs;
--
2.14.1
^ permalink raw reply related
* Re: [PATCH V8 1/3] powerpc/nodes: Ensure enough nodes avail for operations
From: Nathan Fontenot @ 2018-01-08 19:13 UTC (permalink / raw)
To: Michael Bringmann, linuxppc-dev
In-Reply-To: <4faec177-a704-1404-c7ae-7f064153de2b@linux.vnet.ibm.com>
On 11/28/2017 04:58 PM, Michael Bringmann wrote:
> On powerpc systems which allow 'hot-add' of CPU or memory resources,
> it may occur that the new resources are to be inserted into nodes
> that were not used for these resources at bootup. In the kernel,
> any node that is used must be defined and initialized. These empty
> nodes may occur when,
>
> * Dedicated vs. shared resources. Shared resources require
> information such as the VPHN hcall for CPU assignment to nodes.
> Associativity decisions made based on dedicated resource rules,
> such as associativity properties in the device tree, may vary
> from decisions made using the values returned by the VPHN hcall.
> * memoryless nodes at boot. Nodes need to be defined as 'possible'
> at boot for operation with other code modules. Previously, the
> powerpc code would limit the set of possible nodes to those which
> have memory assigned at boot, and were thus online. Subsequent
> add/remove of CPUs or memory would only work with this subset of
> possible nodes.
> * memoryless nodes with CPUs at boot. Due to the previous restriction
> on nodes, nodes that had CPUs but no memory were being collapsed
> into other nodes that did have memory at boot. In practice this
> meant that the node assignment presented by the runtime kernel
> differed from the affinity and associativity attributes presented
> by the device tree or VPHN hcalls. Nodes that might be known to
> the pHyp were not 'possible' in the runtime kernel because they did
> not have memory at boot.
>
> This patch ensures that sufficient nodes are defined to support
> configuration requirements after boot, as well as at boot. This
> patch set fixes a couple of problems.
>
> * Nodes known to powerpc to be memoryless at boot, but to have
> CPUs in them are allowed to be 'possible' and 'online'. Memory
> allocations for those nodes are taken from another node that does
> have memory until and if memory is hot-added to the node.
> * Nodes which have no resources assigned at boot, but which may still
> be referenced subsequently by affinity or associativity attributes,
> are kept in the list of 'possible' nodes for powerpc. Hot-add of
> memory or CPUs to the system can reference these nodes and bring
> them online instead of redirecting to one of the set of nodes that
> were known to have memory at boot.
>
> This patch extracts the value of the lowest domain level (number of
> allocable resources) from the device tree property
> "ibm,max-associativity-domains" to use as the maximum number of nodes
> to setup as possibly available in the system. This new setting will
> override the instruction,
>
> nodes_and(node_possible_map, node_possible_map, node_online_map);
>
> presently seen in the function arch/powerpc/mm/numa.c:initmem_init().
>
> If the "ibm,max-associativity-domains" property is not present at boot,
> no operation will be performed to define or enable additional nodes, or
> enable the above 'nodes_and()'.
>
> Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
> ---
> Changes in V8:
> -- Remove unneeded pr_info() statement
> ---
> arch/powerpc/mm/numa.c | 37 ++++++++++++++++++++++++++++++++++---
> 1 file changed, 34 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
> index adb6364f..735e3fd 100644
> --- a/arch/powerpc/mm/numa.c
> +++ b/arch/powerpc/mm/numa.c
> @@ -892,6 +892,34 @@ static void __init setup_node_data(int nid, u64 start_pfn, u64 end_pfn)
> NODE_DATA(nid)->node_spanned_pages = spanned_pages;
> }
>
> +static void __init find_possible_nodes(void)
> +{
> + struct device_node *rtas;
> + u32 numnodes, i;
> +
> + if (min_common_depth <= 0)
> + return;
> +
> + rtas = of_find_node_by_path("/rtas");
> + if (!rtas)
> + return;
> +
> + if (of_property_read_u32_index(rtas,
> + "ibm,max-associativity-domains",
> + min_common_depth, &numnodes))
> + goto out;
> +
> + for (i = 0; i < numnodes; i++) {
> + if (!node_possible(i)) {
> + setup_node_data(i, 0, 0);
> + node_set(i, node_possible_map);
> + }
> + }
> +
> +out:
> + of_node_put(rtas);
> +}
> +
> void __init initmem_init(void)
> {
> int nid, cpu;
> @@ -905,12 +933,15 @@ void __init initmem_init(void)
> memblock_dump_all();
>
> /*
> - * Reduce the possible NUMA nodes to the online NUMA nodes,
> - * since we do not support node hotplug. This ensures that we
> - * lower the maximum NUMA node ID to what is actually present.
> + * Modify the set of possible NUMA nodes to reflect information
> + * available about the set of online nodes, and the set of nodes
> + * that we expect to make use of for this platform's affinity
> + * calculations.
> */
> nodes_and(node_possible_map, node_possible_map, node_online_map);
>
> + find_possible_nodes();
> +
> for_each_online_node(nid) {
> unsigned long start_pfn, end_pfn;
>
^ permalink raw reply
* Re: [PATCH V8 2/3] poserpc/initnodes: Ensure nodes initialized for hotplug
From: Nathan Fontenot @ 2018-01-08 19:14 UTC (permalink / raw)
To: Michael Bringmann, linuxppc-dev
In-Reply-To: <ebf6e441-6d56-5150-6171-b56c0937a3b6@linux.vnet.ibm.com>
On 11/28/2017 04:58 PM, Michael Bringmann wrote:
> On powerpc systems which allow 'hot-add' of CPU, it may occur that
> the new resources are to be inserted into nodes that were not used
> for memory resources at bootup. Many different configurations of
> PowerPC resources may need to be supported depending upon the
> environment. Important characteristics of the nodes and operating
> environment include:
>
> * Dedicated vs. shared CPUs. Shared CPUs require information such
> as the VPHN hcall for CPU assignment to nodes, since shared CPUs
> have their affinity set to node 0 at boot and when hot-added.
> Associativity decisions made based on dedicated resource rules,
> such as associativity properties in the device tree, may vary from
> decisions made using the values returned by the VPHN hcall.
> * memoryless nodes at boot. Nodes need to be defined as 'possible'
> at boot for operation with other code modules. Previously, the
> powerpc code would limit the set of possible nodes to those which
> have memory assigned at boot, and were thus online. Subsequent
> add/remove of CPUs or memory would only work with this subset of
> possible nodes.
> * memoryless nodes with CPUs at boot. Due to the previous restriction
> on nodes, nodes that had CPUs but no memory were being collapsed
> into other nodes that did have memory at boot. In practice this
> meant that the node assignment presented by the runtime kernel
> differed from the affinity and associativity attributes presented
> by the device tree or VPHN hcalls. Nodes that might be known to
> the pHyp were not 'possible' in the runtime kernel because they did
> not have memory at boot.
>
> This patch fixes some problems encountered at runtime with
> configurations that support memory-less nodes, or that hot-add CPUs
> into nodes that are memoryless during system execution after boot.
> The problems of interest include,
>
> * Nodes known to powerpc to be memoryless at boot, but to have
> CPUs in them are allowed to be 'possible' and 'online'. Memory
> allocations for those nodes are taken from another node that does
> have memory until and if memory is hot-added to the node.
> * Nodes which have no resources assigned at boot, but which may still
> be referenced subsequently by affinity or associativity attributes,
> are kept in the list of 'possible' nodes for powerpc. Hot-add of
> memory or CPUs to the system can reference these nodes and bring
> them online instead of redirecting the references to one of the set
> of nodes known to have memory at boot.
>
> Note that this software operates under the context of CPU hotplug.
> We are not doing memory hotplug in this code, but rather updating
> the kernel's CPU topology (i.e. arch_update_cpu_topology /
> numa_update_cpu_topology). We are initializing a node that may be
> used by CPUs or memory before it can be referenced as invalid by a
> CPU hotplug operation. CPU hotplug operations are protected by a
> range of APIs including cpu_maps_update_begin/cpu_maps_update_done,
> cpus_read/write_lock / cpus_read/write_unlock, device locks, and more.
> Memory hotplug operations, including try_online_node, are protected
> by mem_hotplug_begin/mem_hotplug_done, device locks, and more. In
> the case of CPUs being hot-added to a previously memoryless node, the
> try_online_node operation occurs wholly within the CPU locks with no
> overlap. Using HMC hot-add/hot-remove operations, we have been able
> to add and remove CPUs to any possible node without failures. HMC
> operations involve a degree self-serialization, though.
>
> Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
> ---
> Changes in V8:
> -- Clarify 'resources' as CPUs in patch description regarding
> VPHN call. Add another clause to statement mentioning that
> shared CPUs start in node 0, and are finally assigned per
> VPHN information.
> -- Rename 'find_cpu_nid' to 'find_and_online_cpu_nid' for better
> clarity of its function.
> -- Restore '__init' tag to definition of 'setup_node_data'
> ---
> arch/powerpc/mm/numa.c | 49 ++++++++++++++++++++++++++++++++++++++----------
> 1 file changed, 39 insertions(+), 10 deletions(-)
>
> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
> index 735e3fd..6b08dd8 100644
> --- a/arch/powerpc/mm/numa.c
> +++ b/arch/powerpc/mm/numa.c
> @@ -551,7 +551,7 @@ static int numa_setup_cpu(unsigned long lcpu)
> nid = of_node_to_nid_single(cpu);
>
> out_present:
> - if (nid < 0 || !node_online(nid))
> + if (nid < 0 || !node_possible(nid))
> nid = first_online_node;
>
> map_cpu_to_node(lcpu, nid);
> @@ -910,10 +910,8 @@ static void __init find_possible_nodes(void)
> goto out;
>
> for (i = 0; i < numnodes; i++) {
> - if (!node_possible(i)) {
> - setup_node_data(i, 0, 0);
> + if (!node_possible(i))
> node_set(i, node_possible_map);
> - }
> }
>
> out:
> @@ -1309,6 +1307,42 @@ static long vphn_get_associativity(unsigned long cpu,
> return rc;
> }
>
> +static inline int find_and_online_cpu_nid(int cpu)
> +{
> + __be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
> + int new_nid;
> +
> + /* Use associativity from first thread for all siblings */
> + vphn_get_associativity(cpu, associativity);
> + new_nid = associativity_to_nid(associativity);
> + if (new_nid < 0 || !node_possible(new_nid))
> + new_nid = first_online_node;
> +
> + if (NODE_DATA(new_nid) == NULL) {
> +#ifdef CONFIG_MEMORY_HOTPLUG
> + /*
> + * Need to ensure that NODE_DATA is initialized
> + * for a node from available memory (see
> + * memblock_alloc_try_nid). If unable to init
> + * the node, then default to nearest node that
> + * has memory installed.
> + */
> + if (try_online_node(new_nid))
> + new_nid = first_online_node;
> +#else
> + /*
> + * Default to using the nearest node that has
> + * memory installed. Otherwise, it would be
> + * necessary to patch the kernel MM code to deal
> + * with more memoryless-node error conditions.
> + */
> + new_nid = first_online_node;
> +#endif
> + }
> +
> + return new_nid;
> +}
> +
> /*
> * Update the CPU maps and sysfs entries for a single CPU when its NUMA
> * characteristics change. This function doesn't perform any locking and is
> @@ -1376,7 +1410,6 @@ int numa_update_cpu_topology(bool cpus_locked)
> {
> unsigned int cpu, sibling, changed = 0;
> struct topology_update_data *updates, *ud;
> - __be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
> cpumask_t updated_cpus;
> struct device *dev;
> int weight, new_nid, i = 0;
> @@ -1414,11 +1447,7 @@ int numa_update_cpu_topology(bool cpus_locked)
> continue;
> }
>
> - /* Use associativity from first thread for all siblings */
> - vphn_get_associativity(cpu, associativity);
> - new_nid = associativity_to_nid(associativity);
> - if (new_nid < 0 || !node_online(new_nid))
> - new_nid = first_online_node;
> + new_nid = find_and_online_cpu_nid(cpu);
>
> if (new_nid == numa_cpu_lookup_table[cpu]) {
> cpumask_andnot(&cpu_associativity_changes_mask,
>
^ permalink raw reply
* Re: [PATCH V8 3/3] hotplug/cpu: Fix crash with memoryless nodes
From: Nathan Fontenot @ 2018-01-08 19:15 UTC (permalink / raw)
To: Michael Bringmann, linuxppc-dev
In-Reply-To: <55ff4b6a-7f43-e171-d214-cf10d466aa71@linux.vnet.ibm.com>
On 11/28/2017 04:58 PM, Michael Bringmann wrote:
> On powerpc systems with shared configurations of CPUs and memory and
> memoryless nodes at boot, an event ordering problem was observed on
> a SLES12 build platforms with the hot-add of CPUs to the memoryless
> nodes.
>
> * The most common error occurred when the memory SLAB driver attempted
> to reference the memoryless node to which a CPU was being added
> before the kernel had finished initializing all of the data structures
> for the CPU and exited 'device_online' under DLPAR/hot-add.
>
> Normally the memoryless node would be initialized through the call
> path device_online ... arch_update_cpu_topology ... find_cpu_nid
> ... try_online_node. This patch ensures that the powerpc node will
> be initialized as early as possible, even if it was memoryless and
> CPU-less at the point when we are trying to hot-add a new CPU to it.
>
> Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
> ---
> Changes in V8:
> -- Change a 'printk(KERN_INFO ...)' statement to be a pr_debug()
> statement.
> -- Rename 'find_cpu_nid' to 'find_and_online_cpu_nid' for better
> clarity of its function.
> ---
> arch/powerpc/mm/numa.c | 4 +++-
> arch/powerpc/platforms/pseries/hotplug-cpu.c | 3 +++
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
> index 6b08dd8..a182f9e 100644
> --- a/arch/powerpc/mm/numa.c
> +++ b/arch/powerpc/mm/numa.c
> @@ -1307,7 +1307,7 @@ static long vphn_get_associativity(unsigned long cpu,
> return rc;
> }
>
> -static inline int find_and_online_cpu_nid(int cpu)
> +int find_and_online_cpu_nid(int cpu)
> {
> __be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
> int new_nid;
> @@ -1340,6 +1340,8 @@ static inline int find_and_online_cpu_nid(int cpu)
> #endif
> }
>
> + pr_debug("%s:%d cpu %d nid %d\n", __FUNCTION__, __LINE__,
> + cpu, new_nid);
> return new_nid;
> }
>
> diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
> index a7d14aa7..dceb514 100644
> --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
> +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
> @@ -340,6 +340,8 @@ static void pseries_remove_processor(struct device_node *np)
> cpu_maps_update_done();
> }
>
> +extern int find_and_online_cpu_nid(int cpu);
> +
> static int dlpar_online_cpu(struct device_node *dn)
> {
> int rc = 0;
> @@ -364,6 +366,7 @@ static int dlpar_online_cpu(struct device_node *dn)
> != CPU_STATE_OFFLINE);
> cpu_maps_update_done();
> timed_topology_update(1);
> + find_and_online_cpu_nid(cpu);
> rc = device_online(get_cpu_device(cpu));
> if (rc)
> goto out;
>
^ permalink raw reply
* Re: revamp vmem_altmap / dev_pagemap handling V3
From: Dan Williams @ 2018-01-08 19:44 UTC (permalink / raw)
To: Christoph Hellwig
Cc: linux-nvdimm, X86 ML, Linux Kernel Mailing List, Michal Hocko,
Linux MM, Jérôme Glisse, linuxppc-dev
In-Reply-To: <20180108112646.GA7204@lst.de>
On Mon, Jan 8, 2018 at 3:26 AM, Christoph Hellwig <hch@lst.de> wrote:
> Any chance to get this fully reviewed and picked up before the
> end of the merge window?
I'm fine carrying these through the nvdimm tree, but I'd need an ack
from the mm folks for all the code touches related to arch_add_memory.
^ permalink raw reply
* Re: revamp vmem_altmap / dev_pagemap handling V3
From: Michal Hocko @ 2018-01-08 20:25 UTC (permalink / raw)
To: Dan Williams
Cc: Christoph Hellwig, linux-nvdimm, X86 ML,
Linux Kernel Mailing List, Linux MM, Jérôme Glisse,
linuxppc-dev
In-Reply-To: <CAPcyv4hHipDHP5LZCgym5szqiUSCxG9wQUbRO_qe8T+USaZi9Q@mail.gmail.com>
On Mon 08-01-18 11:44:02, Dan Williams wrote:
> On Mon, Jan 8, 2018 at 3:26 AM, Christoph Hellwig <hch@lst.de> wrote:
> > Any chance to get this fully reviewed and picked up before the
> > end of the merge window?
>
> I'm fine carrying these through the nvdimm tree, but I'd need an ack
> from the mm folks for all the code touches related to arch_add_memory.
I am sorry to be slow here but I am out of time right now - yeah having
a lot of fun kaiser time. I didn't get to look at these patches at all
yet but the changelog suggests that you want to remove vmem_altmap.
I've had plans to (ab)use this for self hosted struct pages for memory
hotplug http://lkml.kernel.org/r/20170801124111.28881-1-mhocko@kernel.org
That work is stalled though because it is buggy and I was too busy to
finish that work. Anyway, if you believe that removing vmem_altmap is a
good step in general I will find another way. I wasn't really happy how
the whole thing is grafted to the memory hotplug and (ab)used it only
because it was handy and ready for reuse.
Anyway if you need a review of mm parts from me, you will have to wait
some more. If this requires some priority then go ahead and merge
it. Times are just too crazy right now.
Sorry about that.
--
Michal Hocko
SUSE Labs
^ permalink raw reply
* [RFC 0/3] powerpc/hotplug: Fix affinity assoc for LPAR migration
From: Michael Bringmann @ 2018-01-08 20:30 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
The migration of LPARs across Power systems affects many attributes
including that of the associativity of memory blocks and CPUs. The
patches in this set execute when a system is coming up fresh upon a
migration target. They are intended to,
* Recognize changes to the associativity of memory and CPUs recorded
in internal data structures when compared to the latest copies in
the device tree (e.g. ibm,dynamic-memory, ibm,dynamic-memory-v2,
cpus),
* Recognize changes to the associativity mapping (e.g. ibm,
associativity-lookup-arrays), locate all assigned memory blocks
corresponding to each changed row, and readd all such blocks.
* Generate calls to other code layers to reset the data structures
related to associativity of the CPUs and memory.
* Re-register the 'changed' entities into the target system.
Re-registration of CPUs and memory blocks mostly entails acting as
if they have been newly hot-added into the target system.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
Michael Bringmann (3):
hotplug/mobility: Apply assoc lookup updates for Post Migration Topo
postmigration/memory: Review assoc lookup array changes
postmigration/memory: Associativity & 'ibm,dynamic-memory-v2'
---
Changes in RFC:
-- Rename pseries_update_drconf_cpu to pseries_update_cpu
-- Simplify code to update CPU nodes during mobility checks.
Remove functions to generate extra HP_ELOG messages in favor
of direct function calls to dlpar_cpu_readd_by_index, or
dlpar_memory_readd_by_index.
-- Move check for "cpu" node type from pseries_update_cpu to
pseries_smp_notifier in 'hotplug-cpu.c'
-- Remove functions 'pseries_memory_readd_by_index' and
'pseries_cpu_readd_by_index' as no longer needed outside of
'mobility.c'.
-- Update patch for recent checkin compatibility
-- Resubmit as RFC pending further integration with LMB changes
by Nathan Fontenot
^ permalink raw reply
* [RFC 1/3] hotplug/mobility: Apply assoc updates for Post Migration Topo
From: Michael Bringmann @ 2018-01-08 20:31 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Michael Bringmann, Nathan Fontenot
In-Reply-To: <f07a1d2c-46df-f0c3-e1d2-6d605883ce9f@linux.vnet.ibm.com>
hotplug/mobility: Recognize more changes to the associativity of
memory blocks described by the 'ibm,dynamic-memory' and 'cpu'
properties when processing the topology of LPARS in Post Migration
events. Previous efforts only recognized whether a memory block's
assignment had changed in the property. Changes here include:
* Checking the aa_index values of the old/new properties and 'readd'
any block for which the setting has changed.
* Checking for changes in cpu associativity and making 'readd' calls
when differences are observed.
Signed-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>
---
Changes in RFC:
-- Simplify code to update CPU nodes during mobility checks.
Remove functions to generate extra HP_ELOG messages in favor
of direct function calls to dlpar_cpu_readd_by_index.
-- Move check for "cpu" node type from pseries_update_cpu to
pseries_smp_notifier in 'hotplug-cpu.c'
-- Remove functions 'pseries_memory_readd_by_index' and
'pseries_cpu_readd_by_index' as no longer needed outside of
'mobility.c'.
-- Update patch for recent checkin compatibility
-- Resubmit as RFC pending further integration with LMB changes
by Nathan Fontenot
---
arch/powerpc/platforms/pseries/hotplug-cpu.c | 69 +++++++++++++++++++++++
arch/powerpc/platforms/pseries/hotplug-memory.c | 7 ++
2 files changed, 76 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index a7d14aa7..91ef22a 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -636,6 +636,27 @@ static int dlpar_cpu_remove_by_index(u32 drc_index)
return rc;
}
+static int dlpar_cpu_readd_by_index(u32 drc_index)
+{
+ int rc = 0;
+
+ pr_info("Attempting to update CPU, drc index %x\n", drc_index);
+
+ if (dlpar_cpu_remove_by_index(drc_index))
+ rc = -EINVAL;
+ else if (dlpar_cpu_add(drc_index))
+ rc = -EINVAL;
+
+ if (rc)
+ pr_info("Failed to update cpu at drc_index %lx\n",
+ (unsigned long int)drc_index);
+ else
+ pr_info("CPU at drc_index %lx was updated\n",
+ (unsigned long int)drc_index);
+
+ return rc;
+}
+
static int find_dlpar_cpus_to_remove(u32 *cpu_drcs, int cpus_to_remove)
{
struct device_node *dn;
@@ -826,6 +847,9 @@ int dlpar_cpu(struct pseries_hp_errorlog *hp_elog)
else
rc = -EINVAL;
break;
+ case PSERIES_HP_ELOG_ACTION_READD:
+ rc = dlpar_cpu_readd_by_index(drc_index);
+ break;
default:
pr_err("Invalid action (%d) specified\n", hp_elog->action);
rc = -EINVAL;
@@ -876,12 +900,53 @@ static ssize_t dlpar_cpu_release(const char *buf, size_t count)
#endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
+static int pseries_update_cpu(struct of_reconfig_data *pr)
+{
+ u32 old_entries, new_entries;
+ __be32 *p, *old_assoc, *new_assoc;
+ int rc = 0;
+
+ /* So far, we only handle the 'ibm,associativity' property,
+ * here.
+ * The first int of the property is the number of domains
+ * described. This is followed by an array of level values.
+ */
+ p = (__be32 *) pr->old_prop->value;
+ if (!p)
+ return -EINVAL;
+ old_entries = be32_to_cpu(*p++);
+ old_assoc = p;
+
+ p = (__be32 *)pr->prop->value;
+ if (!p)
+ return -EINVAL;
+ new_entries = be32_to_cpu(*p++);
+ new_assoc = p;
+
+ if (old_entries == new_entries) {
+ int sz = old_entries * sizeof(int);
+
+ if (!memcmp(old_assoc, new_assoc, sz))
+ rc = dlpar_cpu_readd_by_index(
+ be32_to_cpu(pr->dn->phandle));
+
+ } else {
+ rc = dlpar_cpu_readd_by_index(
+ be32_to_cpu(pr->dn->phandle));
+ }
+
+ return rc;
+}
+
static int pseries_smp_notifier(struct notifier_block *nb,
unsigned long action, void *data)
{
struct of_reconfig_data *rd = data;
int err = 0;
+ if (strcmp(rd->dn->type, "cpu"))
+ return notifier_from_errno(err);
+
switch (action) {
case OF_RECONFIG_ATTACH_NODE:
err = pseries_add_processor(rd->dn);
@@ -889,6 +954,10 @@ static int pseries_smp_notifier(struct notifier_block *nb,
case OF_RECONFIG_DETACH_NODE:
pseries_remove_processor(rd->dn);
break;
+ case OF_RECONFIG_UPDATE_PROPERTY:
+ if (!strcmp(rd->prop->name, "ibm,associativity"))
+ err = pseries_update_cpu(rd);
+ break;
}
return notifier_from_errno(err);
}
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 1d48ab4..0e2ae20 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -1160,6 +1160,13 @@ static int pseries_update_drconf_memory(struct of_reconfig_data *pr)
memblock_size);
rc = (rc < 0) ? -EINVAL : 0;
break;
+ } else if ((be32_to_cpu(old_drmem[i].aa_index) !=
+ be32_to_cpu(new_drmem[i].aa_index)) &&
+ (be32_to_cpu(new_drmem[i].flags) &
+ DRCONF_MEM_ASSIGNED)) {
+ rc = dlpar_memory_readd_by_index(
+ be32_to_cpu(new_drmem[i].drc_index),
+ pr->prop);
}
}
return rc;
^ permalink raw reply related
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