* Re: [PATCH v3 14/17] ASoC: fsl_ssi: Clean up _fsl_ssi_set_dai_fmt()
From: Nicolin Chen @ 2018-01-15 21:40 UTC (permalink / raw)
To: Maciej S. Szmigiero
Cc: timur, linux-kernel, linuxppc-dev, alsa-devel, lgirdwood,
fabio.estevam, caleb, arnaud.mouiche, lukma, kernel
In-Reply-To: <88551d87-1b76-9a30-6781-1d0b6479b317@maciej.szmigiero.name>
On Mon, Jan 15, 2018 at 10:16:28PM +0100, Maciej S. Szmigiero wrote:
> > * Removing TXBIT0 configurations since this bit is set to 1 as its
> > reset value and there is no use case so far to unset it. And it
> > is safe to remove since regmap_update_bits() won't touch it.
>
> I didn't get any response to a comment I've written about the point
I neglected the comments in the middle. Sorry. Will add it back then.
^ permalink raw reply
* Re: [PATCH v3 16/17] ASoC: fsl_ssi: Move DT related code to a separate probe()
From: Nicolin Chen @ 2018-01-15 21:32 UTC (permalink / raw)
To: Maciej S. Szmigiero
Cc: timur, broonie, linux-kernel, linuxppc-dev, alsa-devel, lgirdwood,
fabio.estevam, caleb, arnaud.mouiche, lukma, kernel
In-Reply-To: <0be4b57d-cb28-896a-3d97-f36316a351c5@maciej.szmigiero.name>
On Mon, Jan 15, 2018 at 10:16:39PM +0100, Maciej S. Szmigiero wrote:
> > /* Check if being used in AC97 mode */
> > sprop = of_get_property(np, "fsl,mode", NULL);
> > - if (sprop) {
> > - if (!strcmp(sprop, "ac97-slave"))
> > - ssi->dai_fmt = FSLSSI_AC97_DAIFMT;
> > + if (sprop && !strcmp(sprop, "ac97-slave")) {
> > + ssi->dai_fmt = FSLSSI_AC97_DAIFMT;
> > +
> > + ret = of_property_read_u32(np, "cell-index", &ssi->card_idx);
> > + if (ret) {
> > + dev_err(dev, "failed to get SSI index property\n");
> > + return -EINVAL;
> > + }
> > + strcpy(ssi->card_name, "ac97-codec");
> > }
> >
> > /* Select DMA or FIQ */
> > ssi->use_dma = !of_property_read_bool(np, "fsl,fiq-stream-filter");
> >
> > + /* In synchronous mode, STCK and STFS ports are used by RX as well */
> > + if (!of_find_property(np, "fsl,ssi-asynchronous", NULL))
> > + ssi->synchronous = true;
>
> You are setting ssi->synchronous in the AC'97 mode here, the old code
> didn't do that (see the next patch hunk below).
Will modify this part. Thanks
^ permalink raw reply
* Re: DPAA Ethernet traffice troubles with Linux kernel
From: mad skateman @ 2018-01-15 21:32 UTC (permalink / raw)
To: Christian Zigotzky
Cc: Joakim Tjernlund, linuxppc-dev@lists.ozlabs.org,
madalin.bucur@nxp.com, netdev@vger.kernel.org
In-Reply-To: <32f11c91-9529-180a-a8cf-9f380f853b99@xenosoft.de>
Some extra info:
When Ubuntu boots, Eth0 (192.168.22.44) is not brought up automaticly..
When i bring up eth0 by hand, its still not active..
root@X5000LNX:/home/skateman# ifconfig eth0 up
root@X5000LNX:/home/skateman# ping 192.168.22.44
connect: Network is unreachable
When i use mii-tool too Kick the tranceiver... it comes alive.. i can
ping the eth0 itself
root@X5000LNX:/home/skateman# mii-tool -R eth0
resetting the transceiver...
root@X5000LNX:/home/skateman# ping 192.168.22.44
PING 192.168.22.44 (192.168.22.44) 56(84) bytes of data.
64 bytes from 192.168.22.44: icmp_seq=3D1 ttl=3D64 time=3D0.045 ms
64 bytes from 192.168.22.44: icmp_seq=3D2 ttl=3D64 time=3D0.046 ms
64 bytes from 192.168.22.44: icmp_seq=3D3 ttl=3D64 time=3D0.047 ms
64 bytes from 192.168.22.44: icmp_seq=3D4 ttl=3D64 time=3D0.048 ms
eth0 Link encap:Ethernet HWaddr 00:04:9f:01:02:03
inet addr:192.168.22.44 Bcast:192.168.22.255 Mask:255.255.255.0
inet6 addr: fe80::c84b:9f6b:f2f6:8933/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:48 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 (0.0 B) TX bytes:7600 (7.6 KB)
Memory:fe4e6000-fe4e6fff
Not realy sure why the Tranceiver is not brought up directly when linux sta=
rts..
On 1/15/18, Christian Zigotzky <chzigotzky@xenosoft.de> wrote:
> Sorry, I have forgotten the download link. Please test it with the DPAA
> Ethernet.
>> Hi All,
>>
>> I compiled the RC8 of kernel 4.15 with Joakim's patch for the AmigaOne
>> X5000 today. Many thanks to Joakim for the mdio patch.
>>
>> Download: http://www.xenosoft.de/uImage-4.15-rc8_with_mdio_patch.tar.gz
>>
>> Please test it on your X5000.
>>
>> Thanks,
>> Christian
>>
>>
>> On 15 January 2018 at 5:59PM, Joakim Tjernlund wrote:
>>>>
>>>> Hi,
>>>>
>>>> Please use text logs instead of pictures next time, it's easier to
>>>> read.
>>>> The errors you see are related to missing MAC addresses for the unused
>>>> interfaces, you can ignore these are they are not relevant for the
>>>> issue
>>>> you encounter. Normally the unused interfaces should have status
>>>> disabled
>>>> in the device tree but there is not a big deal if they fail like that.
>>>> As I've advised Jamie on the other thread, please try to connect the
>>>> device
>>>> back 2 back to a known good machine and determine what is broken -
>>>> Rx/Tx?
>>>> Is there another software version that does work on these machines?
>>> Hi, just saw this and thought of a small patch I just wrote for mdio
>>> bus, o idea
>>> if it is relevant but here goes:
>>>
>>> =C2=A0From fe0b98d54a79779482700676331b4d10a0f3cada Mon Sep 17 00:00:00=
2001
>>> From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>>> Date: Sun, 14 Jan 2018 21:27:20 +0100
>>> Subject: [PATCH] of_mdiobus_register: Continue after error
>>>
>>> of_mdiobus_register unregister itself if one phy fails to register
>>> which is bad for system having all its PHYs on the same MDIO bus.
>>> Just log the error and continue with the remaining PHYs instead.
>>>
>>> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>>> ---
>>> =C2=A0 drivers/of/of_mdio.c | 6 ++++--
>>> =C2=A0 1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
>>> index 98258583abb0..76ff28a41dad 100644
>>> --- a/drivers/of/of_mdio.c
>>> +++ b/drivers/of/of_mdio.c
>>> @@ -229,7 +229,8 @@ int of_mdiobus_register(struct mii_bus *mdio,
>>> struct device_node *np)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 rc =3D of_mdiobus_register_device(mdio, child, addr);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (rc)
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 got=
o unregister;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pr_=
warn(FW_WARN
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 "%pOF: Failed to register MDIO device.\n", child);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!scanphys)
>>> @@ -253,7 +254,8 @@ int of_mdiobus_register(struct mii_bus *mdio,
>>> struct device_node *np)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 if (of_mdiobus_child_is_phy(child)) {
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 rc =3D of_mdiobus_register_phy(mdio, chil=
d, addr);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (rc)
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 goto unregister;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pr_warn(FW_WARN
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "%pOF=
: Failed to register MDIO PHY.\n", child);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 }
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>
>>
>
>
^ permalink raw reply
* Re: [PATCH v3 16/17] ASoC: fsl_ssi: Move DT related code to a separate probe()
From: Maciej S. Szmigiero @ 2018-01-15 21:16 UTC (permalink / raw)
To: Nicolin Chen
Cc: timur, broonie, linux-kernel, linuxppc-dev, alsa-devel, lgirdwood,
fabio.estevam, caleb, arnaud.mouiche, lukma, kernel
In-Reply-To: <1515990087-11598-17-git-send-email-nicoleotsuka@gmail.com>
On 15.01.2018 05:21, Nicolin Chen wrote:
> This patch cleans up probe() function by moving all Device Tree
> related code into a separate function. It allows the probe() to
> be Device Tree independent. This will be very useful for future
> integration of imx-ssi driver which has similar functionalities
> while exists only because it supports non-DT cases.
>
> This patch also moves symmetric_channels of AC97 from the probe
> to the structure snd_soc_dai_driver for simplification.
>
> Additionally, since PowerPC and AC97 use the same pdev pointer
> to register a platform device, this patch also unifies related
> code.
>
> Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
> Tested-by: Caleb Crome <caleb@crome.org>
> ---
> sound/soc/fsl/fsl_ssi.c | 202 +++++++++++++++++++++++++-----------------------
> 1 file changed, 107 insertions(+), 95 deletions(-)
>
> diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
> index 20889d8..d2072de 100644
> --- a/sound/soc/fsl/fsl_ssi.c
> +++ b/sound/soc/fsl/fsl_ssi.c
> @@ -1366,41 +1365,102 @@ static void fsl_ssi_imx_clean(struct platform_device *pdev, struct fsl_ssi *ssi)
> clk_disable_unprepare(ssi->clk);
> }
>
> -static int fsl_ssi_probe(struct platform_device *pdev)
> +static int fsl_ssi_probe_from_dt(struct fsl_ssi *ssi)
> {
> - struct fsl_ssi *ssi;
> - int ret = 0;
> - struct device_node *np = pdev->dev.of_node;
> - struct device *dev = &pdev->dev;
> + struct device *dev = ssi->dev;
> + struct device_node *np = dev->of_node;
> const struct of_device_id *of_id;
> const char *p, *sprop;
> const uint32_t *iprop;
> - struct resource *res;
> - void __iomem *iomem;
> - char name[64];
> - struct regmap_config regconfig = fsl_ssi_regconfig;
> + u32 dmas[4];
> + int ret;
>
> of_id = of_match_device(fsl_ssi_ids, dev);
> if (!of_id || !of_id->data)
> return -EINVAL;
>
> - ssi = devm_kzalloc(dev, sizeof(*ssi), GFP_KERNEL);
> - if (!ssi)
> - return -ENOMEM;
> -
> ssi->soc = of_id->data;
> - ssi->dev = dev;
> +
> + ret = of_property_match_string(np, "clock-names", "ipg");
> + /* Get error code if not found */
> + ssi->has_ipg_clk_name = ret >= 0;
>
> /* Check if being used in AC97 mode */
> sprop = of_get_property(np, "fsl,mode", NULL);
> - if (sprop) {
> - if (!strcmp(sprop, "ac97-slave"))
> - ssi->dai_fmt = FSLSSI_AC97_DAIFMT;
> + if (sprop && !strcmp(sprop, "ac97-slave")) {
> + ssi->dai_fmt = FSLSSI_AC97_DAIFMT;
> +
> + ret = of_property_read_u32(np, "cell-index", &ssi->card_idx);
> + if (ret) {
> + dev_err(dev, "failed to get SSI index property\n");
> + return -EINVAL;
> + }
> + strcpy(ssi->card_name, "ac97-codec");
> }
>
> /* Select DMA or FIQ */
> ssi->use_dma = !of_property_read_bool(np, "fsl,fiq-stream-filter");
>
> + /* In synchronous mode, STCK and STFS ports are used by RX as well */
> + if (!of_find_property(np, "fsl,ssi-asynchronous", NULL))
> + ssi->synchronous = true;
You are setting ssi->synchronous in the AC'97 mode here, the old code
didn't do that (see the next patch hunk below).
Since in the previous patch you have replaced cpu_dai_drv.symmetric_rates
with ssi->synchronous this will likely break asymmetric rate support in
the AC'97 mode, since the driver will use STCCR for programming of both
playback and capture.
The next patch in this series (17) also looks affected by this change.
> @@ -1444,24 +1500,13 @@ static int fsl_ssi_probe(struct platform_device *pdev)
> return ssi->irq;
> }
>
> - /* Set software limitations for synchronous mode */
> - if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) {
> - if (!fsl_ssi_is_ac97(ssi)) {
> - ssi->cpu_dai_drv.symmetric_rates = 1;
> - ssi->cpu_dai_drv.symmetric_samplebits = 1;
> - ssi->synchronous = true;
> - }
You can see it here that the old code didn't set ssi->synchronous in the
AC'97 mode.
Maciej
^ permalink raw reply
* Re: [PATCH v3 14/17] ASoC: fsl_ssi: Clean up _fsl_ssi_set_dai_fmt()
From: Maciej S. Szmigiero @ 2018-01-15 21:16 UTC (permalink / raw)
To: Nicolin Chen
Cc: timur, linux-kernel, linuxppc-dev, alsa-devel, lgirdwood,
fabio.estevam, caleb, arnaud.mouiche, lukma, kernel
In-Reply-To: <1515990087-11598-15-git-send-email-nicoleotsuka@gmail.com>
On 15.01.2018 05:21, Nicolin Chen wrote:
> The _fsl_ssi_set_dai_fmt() is a helper function being called from
> fsl_ssi_set_dai_fmt() as an ASoC operation and fsl_ssi_hw_init()
> mainly for AC97 format initialization.
>
> This patch cleans the _fsl_ssi_set_dai_fmt() in following ways:
> * Removing *dev pointer in the parameters as it's included in the
> *ssi pointer of struct fsl_ssi.
> * Using regmap_update_bits() instead of regmap_read() with masking
> the value manually.
> * Removing TXBIT0 configurations since this bit is set to 1 as its
> reset value and there is no use case so far to unset it. And it
> is safe to remove since regmap_update_bits() won't touch it.
I didn't get any response to a comment I've written about the point
above during the previous patch iteration:> The old code set this bit in any mode other than AC'97 (where the
> hardware always treats this bit as set regardless of the actual value).
> I would play safe here and not rely on this bit being set by a SSI
> reset on all SSI models.
Maciej
> * Moving baudclk check to the switch-case routine to skip the I2S
> master check. And moving SxCCR.DC settings after baudclk check.
> * Adding format settings for SND_SOC_DAIFMT_AC97 like others.
>
> Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
> Tested-by: Caleb Crome <caleb@crome.org>
> ---
> Changelog
> v3
> * Put CBM_CFS behind the baudclk check to keep the same program
> flow as before
>
> sound/soc/fsl/fsl_ssi.c | 73 ++++++++++++++++++++++---------------------------
> 1 file changed, 33 insertions(+), 40 deletions(-)
>
^ permalink raw reply
* Re: DPAA Ethernet traffice troubles with Linux kernel
From: mad skateman @ 2018-01-15 20:21 UTC (permalink / raw)
To: Christian Zigotzky
Cc: Joakim Tjernlund, linuxppc-dev@lists.ozlabs.org,
madalin.bucur@nxp.com, netdev@vger.kernel.org
In-Reply-To: <32f11c91-9529-180a-a8cf-9f380f853b99@xenosoft.de>
Hi All,
I have been testing with the rc8 kernel as Christian sugested.
At this moment still the same issues..
Here some of my finding...
A dump of dmesg regarding the FSL_DPAA:
[ 4.597949] libphy: Fixed MDIO Bus: probed
[ 4.599095] libphy: Freescale PowerQUICC MII Bus: probed
[ 4.609108] libphy: Freescale PowerQUICC MII Bus: probed
[ 4.609995] libphy: Freescale PowerQUICC MII Bus: probed
[ 4.610689] libphy: Freescale PowerQUICC MII Bus: probed
[ 4.611623] libphy: Freescale PowerQUICC MII Bus: probed
[ 4.612470] libphy: Freescale XGMAC MDIO Bus: probed
[ 4.617710] fsl_dpaa_mac ffe4e6000.ethernet: FMan dTSEC version: 0x08240=
101
[ 4.618335] fsl_dpaa_mac ffe4e6000.ethernet: FMan MAC address:
00:04:9f:01:02:03
[ 4.618653] fsl_dpaa_mac ffe4e8000.ethernet: FMan dTSEC version: 0x08240=
101
[ 4.619042] fsl_dpaa_mac ffe4e8000.ethernet: FMan MAC address:
00:04:9f:01:02:04
[ 4.619294] fsl_dpaa_mac ffe4e0000.ethernet:
of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e0000) failed
[ 4.619505] fsl_dpaa_mac: probe of ffe4e0000.ethernet failed with error =
-22
[ 4.619673] fsl_dpaa_mac ffe4e2000.ethernet:
of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e2000) failed
[ 4.619878] fsl_dpaa_mac: probe of ffe4e2000.ethernet failed with error =
-22
[ 4.620048] fsl_dpaa_mac ffe4e4000.ethernet:
of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e4000) failed
[ 4.620258] fsl_dpaa_mac: probe of ffe4e4000.ethernet failed with error =
-22
[ 4.625078] fsl_dpaa_mac ffe4f0000.ethernet:
of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@f0000) failed
[ 4.630001] fsl_dpaa_mac: probe of ffe4f0000.ethernet failed with error =
-22
[ 4.637015] fsl_dpaa_mac ffe4e6000.ethernet eth0: Probed interface eth0
[ 4.643933] fsl_dpaa_mac ffe4e8000.ethernet eth1: Probed interface eth1
This all seems correct! The probed mac`s are the one`s as put in Uboot:
Ethaddr and Eth1addr
The Eth0 and Eth1 are also probed.
When eth0 is brought up... it is unable to get an ip adress from the
dhcp server.
eth0 Link encap:Ethernet HWaddr 00:04:9f:01:02:03
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:510 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 (0.0 B) TX bytes:102556 (102.5 KB)
Memory:fe4e6000-fe4e6fff
When using mii-tool for a double check:
mii-tool -l eth0
eth0: negotiated 1000baseT-FD flow-control, link ok
and when using ethtool
ethtool eth0
Settings for eth0:
Supported ports: [ MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Advertised pause frame use: Symmetric Receive-only
Advertised auto-negotiation: Yes
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Half 1000baseT/Full
Link partner advertised pause frame use: Symmetric Receive-only
Link partner advertised auto-negotiation: Yes
Speed: 1000Mb/s
Duplex: Full
Port: MII
PHYAD: 3
Transceiver: external
Auto-negotiation: on
Current message level: 0x00000037 (55)
drv probe link ifdown ifup
Link detected: yes
RX packets always stay 0 ?
Will continiue to get more info...
On 1/15/18, Christian Zigotzky <chzigotzky@xenosoft.de> wrote:
> Sorry, I have forgotten the download link. Please test it with the DPAA
> Ethernet.
>> Hi All,
>>
>> I compiled the RC8 of kernel 4.15 with Joakim's patch for the AmigaOne
>> X5000 today. Many thanks to Joakim for the mdio patch.
>>
>> Download: http://www.xenosoft.de/uImage-4.15-rc8_with_mdio_patch.tar.gz
>>
>> Please test it on your X5000.
>>
>> Thanks,
>> Christian
>>
>>
>> On 15 January 2018 at 5:59PM, Joakim Tjernlund wrote:
>>>>
>>>> Hi,
>>>>
>>>> Please use text logs instead of pictures next time, it's easier to
>>>> read.
>>>> The errors you see are related to missing MAC addresses for the unused
>>>> interfaces, you can ignore these are they are not relevant for the
>>>> issue
>>>> you encounter. Normally the unused interfaces should have status
>>>> disabled
>>>> in the device tree but there is not a big deal if they fail like that.
>>>> As I've advised Jamie on the other thread, please try to connect the
>>>> device
>>>> back 2 back to a known good machine and determine what is broken -
>>>> Rx/Tx?
>>>> Is there another software version that does work on these machines?
>>> Hi, just saw this and thought of a small patch I just wrote for mdio
>>> bus, o idea
>>> if it is relevant but here goes:
>>>
>>> =C2=A0From fe0b98d54a79779482700676331b4d10a0f3cada Mon Sep 17 00:00:00=
2001
>>> From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>>> Date: Sun, 14 Jan 2018 21:27:20 +0100
>>> Subject: [PATCH] of_mdiobus_register: Continue after error
>>>
>>> of_mdiobus_register unregister itself if one phy fails to register
>>> which is bad for system having all its PHYs on the same MDIO bus.
>>> Just log the error and continue with the remaining PHYs instead.
>>>
>>> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>>> ---
>>> =C2=A0 drivers/of/of_mdio.c | 6 ++++--
>>> =C2=A0 1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
>>> index 98258583abb0..76ff28a41dad 100644
>>> --- a/drivers/of/of_mdio.c
>>> +++ b/drivers/of/of_mdio.c
>>> @@ -229,7 +229,8 @@ int of_mdiobus_register(struct mii_bus *mdio,
>>> struct device_node *np)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 rc =3D of_mdiobus_register_device(mdio, child, addr);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (rc)
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 got=
o unregister;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pr_=
warn(FW_WARN
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 "%pOF: Failed to register MDIO device.\n", child);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!scanphys)
>>> @@ -253,7 +254,8 @@ int of_mdiobus_register(struct mii_bus *mdio,
>>> struct device_node *np)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 if (of_mdiobus_child_is_phy(child)) {
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 rc =3D of_mdiobus_register_phy(mdio, chil=
d, addr);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (rc)
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 goto unregister;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pr_warn(FW_WARN
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "%pOF=
: Failed to register MDIO PHY.\n", child);
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 }
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }
>>
>>
>
>
^ permalink raw reply
* [PATCH for 4.16 02/10] powerpc: membarrier: Skip memory barrier in switch_mm() (v7)
From: Mathieu Desnoyers @ 2018-01-15 19:10 UTC (permalink / raw)
To: Ingo Molnar, Peter Zijlstra
Cc: linux-kernel, linux-api, Andy Lutomirski, Paul E . McKenney,
Boqun Feng, Andrew Hunter, Maged Michael, Avi Kivity,
Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
Dave Watson, Thomas Gleixner, H . Peter Anvin, Andrea Parri,
Russell King, Greg Hackmann, Will Deacon, David Sehr,
Linus Torvalds, x86, Mathieu Desnoyers, Alan Stern,
Alexander Viro, Nicholas Piggin, linuxppc-dev, linux-arch
In-Reply-To: <20180115191104.12437-1-mathieu.desnoyers@efficios.com>
Allow PowerPC to skip the full memory barrier in switch_mm(), and
only issue the barrier when scheduling into a task belonging to a
process that has registered to use expedited private.
Threads targeting the same VM but which belong to different thread
groups is a tricky case. It has a few consequences:
It turns out that we cannot rely on get_nr_threads(p) to count the
number of threads using a VM. We can use
(atomic_read(&mm->mm_users) == 1 && get_nr_threads(p) == 1)
instead to skip the synchronize_sched() for cases where the VM only has
a single user, and that user only has a single thread.
It also turns out that we cannot use for_each_thread() to set
thread flags in all threads using a VM, as it only iterates on the
thread group.
Therefore, test the membarrier state variable directly rather than
relying on thread flags. This means
membarrier_register_private_expedited() needs to set the
MEMBARRIER_STATE_PRIVATE_EXPEDITED flag, issue synchronize_sched(), and
only then set MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY which allows
private expedited membarrier commands to succeed.
membarrier_arch_switch_mm() now tests for the
MEMBARRIER_STATE_PRIVATE_EXPEDITED flag.
Changes since v1:
- Use test_ti_thread_flag(next, ...) instead of test_thread_flag() in
powerpc membarrier_arch_sched_in(), given that we want to specifically
check the next thread state.
- Add missing ARCH_HAS_MEMBARRIER_HOOKS in Kconfig.
- Use task_thread_info() to pass thread_info from task to
*_ti_thread_flag().
Changes since v2:
- Move membarrier_arch_sched_in() call to finish_task_switch().
- Check for NULL t->mm in membarrier_arch_fork().
- Use membarrier_sched_in() in generic code, which invokes the
arch-specific membarrier_arch_sched_in(). This fixes allnoconfig
build on PowerPC.
- Move asm/membarrier.h include under CONFIG_MEMBARRIER, fixing
allnoconfig build on PowerPC.
- Build and runtime tested on PowerPC.
Changes since v3:
- Simply rely on copy_mm() to copy the membarrier_private_expedited mm
field on fork.
- powerpc: test thread flag instead of reading
membarrier_private_expedited in membarrier_arch_fork().
- powerpc: skip memory barrier in membarrier_arch_sched_in() if coming
from kernel thread, since mmdrop() implies a full barrier.
- Set membarrier_private_expedited to 1 only after arch registration
code, thus eliminating a race where concurrent commands could succeed
when they should fail if issued concurrently with process
registration.
- Use READ_ONCE() for membarrier_private_expedited field access in
membarrier_private_expedited. Matches WRITE_ONCE() performed in
process registration.
Changes since v4:
- Move powerpc hook from sched_in() to switch_mm(), based on feedback
from Nicholas Piggin.
Changes since v5:
- Rebase on v4.14-rc6.
- Fold "Fix: membarrier: Handle CLONE_VM + !CLONE_THREAD correctly on
powerpc (v2)"
Changes since v6:
- Rename MEMBARRIER_STATE_SWITCH_MM to MEMBARRIER_STATE_PRIVATE_EXPEDITED.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
CC: Peter Zijlstra <peterz@infradead.org>
CC: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
CC: Boqun Feng <boqun.feng@gmail.com>
CC: Andrew Hunter <ahh@google.com>
CC: Maged Michael <maged.michael@gmail.com>
CC: Avi Kivity <avi@scylladb.com>
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
CC: Michael Ellerman <mpe@ellerman.id.au>
CC: Dave Watson <davejwatson@fb.com>
CC: Alan Stern <stern@rowland.harvard.edu>
CC: Will Deacon <will.deacon@arm.com>
CC: Andy Lutomirski <luto@kernel.org>
CC: Ingo Molnar <mingo@redhat.com>
CC: Alexander Viro <viro@zeniv.linux.org.uk>
CC: Nicholas Piggin <npiggin@gmail.com>
CC: linuxppc-dev@lists.ozlabs.org
CC: linux-arch@vger.kernel.org
---
MAINTAINERS | 1 +
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/membarrier.h | 26 ++++++++++++++++++++++++++
arch/powerpc/mm/mmu_context.c | 7 +++++++
include/linux/sched/mm.h | 13 ++++++++++++-
init/Kconfig | 3 +++
kernel/sched/core.c | 10 ----------
kernel/sched/membarrier.c | 8 ++++++++
8 files changed, 58 insertions(+), 11 deletions(-)
create mode 100644 arch/powerpc/include/asm/membarrier.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 18994806e441..c2f0d9a48a10 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8931,6 +8931,7 @@ L: linux-kernel@vger.kernel.org
S: Supported
F: kernel/sched/membarrier.c
F: include/uapi/linux/membarrier.h
+F: arch/powerpc/include/asm/membarrier.h
MEMORY MANAGEMENT
L: linux-mm@kvack.org
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index c51e6ce42e7a..a63adb082c0a 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -140,6 +140,7 @@ config PPC
select ARCH_HAS_FORTIFY_SOURCE
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_PMEM_API if PPC64
+ select ARCH_HAS_MEMBARRIER_HOOKS
select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE
select ARCH_HAS_SG_CHAIN
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
diff --git a/arch/powerpc/include/asm/membarrier.h b/arch/powerpc/include/asm/membarrier.h
new file mode 100644
index 000000000000..98ff4f1fcf2b
--- /dev/null
+++ b/arch/powerpc/include/asm/membarrier.h
@@ -0,0 +1,26 @@
+#ifndef _ASM_POWERPC_MEMBARRIER_H
+#define _ASM_POWERPC_MEMBARRIER_H
+
+static inline void membarrier_arch_switch_mm(struct mm_struct *prev,
+ struct mm_struct *next,
+ struct task_struct *tsk)
+{
+ /*
+ * Only need the full barrier when switching between processes.
+ * Barrier when switching from kernel to userspace is not
+ * required here, given that it is implied by mmdrop(). Barrier
+ * when switching from userspace to kernel is not needed after
+ * store to rq->curr.
+ */
+ if (likely(!(atomic_read(&next->membarrier_state) &
+ MEMBARRIER_STATE_PRIVATE_EXPEDITED) || !prev))
+ return;
+
+ /*
+ * The membarrier system call requires a full memory barrier
+ * after storing to rq->curr, before going back to user-space.
+ */
+ smp_mb();
+}
+
+#endif /* _ASM_POWERPC_MEMBARRIER_H */
diff --git a/arch/powerpc/mm/mmu_context.c b/arch/powerpc/mm/mmu_context.c
index d60a62bf4fc7..0ab297c4cfad 100644
--- a/arch/powerpc/mm/mmu_context.c
+++ b/arch/powerpc/mm/mmu_context.c
@@ -12,6 +12,7 @@
#include <linux/mm.h>
#include <linux/cpu.h>
+#include <linux/sched/mm.h>
#include <asm/mmu_context.h>
@@ -58,6 +59,10 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
*
* On the read side the barrier is in pte_xchg(), which orders
* the store to the PTE vs the load of mm_cpumask.
+ *
+ * This full barrier is needed by membarrier when switching
+ * between processes after store to rq->curr, before user-space
+ * memory accesses.
*/
smp_mb();
@@ -80,6 +85,8 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
if (new_on_cpu)
radix_kvm_prefetch_workaround(next);
+ else
+ membarrier_arch_switch_mm(prev, next, tsk);
/*
* The actual HW switching method differs between the various
diff --git a/include/linux/sched/mm.h b/include/linux/sched/mm.h
index 3d49b91b674d..1754396795f6 100644
--- a/include/linux/sched/mm.h
+++ b/include/linux/sched/mm.h
@@ -215,14 +215,25 @@ static inline void memalloc_noreclaim_restore(unsigned int flags)
#ifdef CONFIG_MEMBARRIER
enum {
MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY = (1U << 0),
- MEMBARRIER_STATE_SWITCH_MM = (1U << 1),
+ MEMBARRIER_STATE_PRIVATE_EXPEDITED = (1U << 1),
};
+#ifdef CONFIG_ARCH_HAS_MEMBARRIER_HOOKS
+#include <asm/membarrier.h>
+#endif
+
static inline void membarrier_execve(struct task_struct *t)
{
atomic_set(&t->mm->membarrier_state, 0);
}
#else
+#ifdef CONFIG_ARCH_HAS_MEMBARRIER_HOOKS
+static inline void membarrier_arch_switch_mm(struct mm_struct *prev,
+ struct mm_struct *next,
+ struct task_struct *tsk)
+{
+}
+#endif
static inline void membarrier_execve(struct task_struct *t)
{
}
diff --git a/init/Kconfig b/init/Kconfig
index a9a2e2c86671..2d118b6adee2 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1412,6 +1412,9 @@ config USERFAULTFD
Enable the userfaultfd() system call that allows to intercept and
handle page faults in userland.
+config ARCH_HAS_MEMBARRIER_HOOKS
+ bool
+
config EMBEDDED
bool "Embedded system"
option allnoconfig_y
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 644fa2e3d993..524b705892db 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -2653,16 +2653,6 @@ static struct rq *finish_task_switch(struct task_struct *prev)
prev_state = prev->state;
vtime_task_switch(prev);
perf_event_task_sched_in(prev, current);
- /*
- * The membarrier system call requires a full memory barrier
- * after storing to rq->curr, before going back to user-space.
- *
- * TODO: This smp_mb__after_unlock_lock can go away if PPC end
- * up adding a full barrier to switch_mm(), or we should figure
- * out if a smp_mb__after_unlock_lock is really the proper API
- * to use.
- */
- smp_mb__after_unlock_lock();
finish_lock_switch(rq, prev);
finish_arch_post_lock_switch();
diff --git a/kernel/sched/membarrier.c b/kernel/sched/membarrier.c
index 9bcbacba82a8..678577267a9a 100644
--- a/kernel/sched/membarrier.c
+++ b/kernel/sched/membarrier.c
@@ -118,6 +118,14 @@ static void membarrier_register_private_expedited(void)
if (atomic_read(&mm->membarrier_state)
& MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY)
return;
+ atomic_or(MEMBARRIER_STATE_PRIVATE_EXPEDITED, &mm->membarrier_state);
+ if (!(atomic_read(&mm->mm_users) == 1 && get_nr_threads(p) == 1)) {
+ /*
+ * Ensure all future scheduler executions will observe the
+ * new thread flag state for this process.
+ */
+ synchronize_sched();
+ }
atomic_or(MEMBARRIER_STATE_PRIVATE_EXPEDITED_READY,
&mm->membarrier_state);
}
--
2.11.0
^ permalink raw reply related
* DPAA Ethernet traffice troubles with Linux kernel
From: Christian Zigotzky @ 2018-01-15 19:09 UTC (permalink / raw)
To: Joakim Tjernlund, linuxppc-dev@lists.ozlabs.org,
madalin.bucur@nxp.com, madskateman@gmail.com
Cc: netdev@vger.kernel.org
In-Reply-To: <346361be-ce30-6a13-c154-5192d2668723@xenosoft.de>
Sorry, I have forgotten the download link. Please test it with the DPAA
Ethernet.
> Hi All,
>
> I compiled the RC8 of kernel 4.15 with Joakim's patch for the AmigaOne
> X5000 today. Many thanks to Joakim for the mdio patch.
>
> Download: http://www.xenosoft.de/uImage-4.15-rc8_with_mdio_patch.tar.gz
>
> Please test it on your X5000.
>
> Thanks,
> Christian
>
>
> On 15 January 2018 at 5:59PM, Joakim Tjernlund wrote:
>>>
>>> Hi,
>>>
>>> Please use text logs instead of pictures next time, it's easier to
>>> read.
>>> The errors you see are related to missing MAC addresses for the unused
>>> interfaces, you can ignore these are they are not relevant for the
>>> issue
>>> you encounter. Normally the unused interfaces should have status
>>> disabled
>>> in the device tree but there is not a big deal if they fail like that.
>>> As I've advised Jamie on the other thread, please try to connect the
>>> device
>>> back 2 back to a known good machine and determine what is broken -
>>> Rx/Tx?
>>> Is there another software version that does work on these machines?
>> Hi, just saw this and thought of a small patch I just wrote for mdio
>> bus, o idea
>> if it is relevant but here goes:
>>
>> From fe0b98d54a79779482700676331b4d10a0f3cada Mon Sep 17 00:00:00 2001
>> From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>> Date: Sun, 14 Jan 2018 21:27:20 +0100
>> Subject: [PATCH] of_mdiobus_register: Continue after error
>>
>> of_mdiobus_register unregister itself if one phy fails to register
>> which is bad for system having all its PHYs on the same MDIO bus.
>> Just log the error and continue with the remaining PHYs instead.
>>
>> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
>> ---
>> drivers/of/of_mdio.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
>> index 98258583abb0..76ff28a41dad 100644
>> --- a/drivers/of/of_mdio.c
>> +++ b/drivers/of/of_mdio.c
>> @@ -229,7 +229,8 @@ int of_mdiobus_register(struct mii_bus *mdio,
>> struct device_node *np)
>> else
>> rc = of_mdiobus_register_device(mdio, child, addr);
>> if (rc)
>> - goto unregister;
>> + pr_warn(FW_WARN
>> + "%pOF: Failed to register MDIO device.\n", child);
>> }
>> if (!scanphys)
>> @@ -253,7 +254,8 @@ int of_mdiobus_register(struct mii_bus *mdio,
>> struct device_node *np)
>> if (of_mdiobus_child_is_phy(child)) {
>> rc = of_mdiobus_register_phy(mdio, child, addr);
>> if (rc)
>> - goto unregister;
>> + pr_warn(FW_WARN
>> + "%pOF: Failed to register MDIO PHY.\n", child);
>> }
>> }
>> }
>
>
^ permalink raw reply
* DPAA Ethernet traffice troubles with Linux kernel
From: Christian Zigotzky @ 2018-01-15 19:03 UTC (permalink / raw)
To: Joakim Tjernlund, linuxppc-dev@lists.ozlabs.org,
madalin.bucur@nxp.com, madskateman@gmail.com
Cc: netdev@vger.kernel.org
In-Reply-To: <1516035556.18795.71.camel@infinera.com>
Hi All,
I compiled the RC8 of kernel 4.15 with Joakim's patch for the AmigaOne
X5000 today. Many thanks to Joakim for the mdio patch.
Please test it on your X5000.
Thanks,
Christian
On 15 January 2018 at 5:59PM, Joakim Tjernlund wrote:
>>
>> Hi,
>>
>> Please use text logs instead of pictures next time, it's easier to read.
>> The errors you see are related to missing MAC addresses for the unused
>> interfaces, you can ignore these are they are not relevant for the issue
>> you encounter. Normally the unused interfaces should have status disabled
>> in the device tree but there is not a big deal if they fail like that.
>> As I've advised Jamie on the other thread, please try to connect the device
>> back 2 back to a known good machine and determine what is broken - Rx/Tx?
>> Is there another software version that does work on these machines?
> Hi, just saw this and thought of a small patch I just wrote for mdio bus, o idea
> if it is relevant but here goes:
>
> From fe0b98d54a79779482700676331b4d10a0f3cada Mon Sep 17 00:00:00 2001
> From: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> Date: Sun, 14 Jan 2018 21:27:20 +0100
> Subject: [PATCH] of_mdiobus_register: Continue after error
>
> of_mdiobus_register unregister itself if one phy fails to register
> which is bad for system having all its PHYs on the same MDIO bus.
> Just log the error and continue with the remaining PHYs instead.
>
> Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
> ---
> drivers/of/of_mdio.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
> index 98258583abb0..76ff28a41dad 100644
> --- a/drivers/of/of_mdio.c
> +++ b/drivers/of/of_mdio.c
> @@ -229,7 +229,8 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
> else
> rc = of_mdiobus_register_device(mdio, child, addr);
> if (rc)
> - goto unregister;
> + pr_warn(FW_WARN
> + "%pOF: Failed to register MDIO device.\n", child);
> }
>
> if (!scanphys)
> @@ -253,7 +254,8 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
> if (of_mdiobus_child_is_phy(child)) {
> rc = of_mdiobus_register_phy(mdio, child, addr);
> if (rc)
> - goto unregister;
> + pr_warn(FW_WARN
> + "%pOF: Failed to register MDIO PHY.\n", child);
> }
> }
> }
^ permalink raw reply
* Re: [PATCH v6 01/24] x86/mm: Define CONFIG_SPF
From: Laurent Dufour @ 2018-01-15 18:37 UTC (permalink / raw)
To: Thomas Gleixner
Cc: paulmck, peterz, akpm, kirill, ak, mhocko, dave, jack,
Matthew Wilcox, benh, mpe, paulus, Ingo Molnar, hpa, Will Deacon,
Sergey Senozhatsky, Andrea Arcangeli, Alexei Starovoitov,
kemi.wang, sergey.senozhatsky.work, linux-kernel, linux-mm, haren,
khandual, npiggin, bsingharora, Tim Chen, linuxppc-dev, x86
In-Reply-To: <alpine.DEB.2.20.1801151846110.2143@nanos>
On 15/01/2018 18:49, Thomas Gleixner wrote:
> On Mon, 15 Jan 2018, Laurent Dufour wrote:
>> On 12/01/2018 19:57, Thomas Gleixner wrote:
>>> On Fri, 12 Jan 2018, Laurent Dufour wrote:
>>>
>>>> Introduce CONFIG_SPF which turns on the Speculative Page Fault handler when
>>>> building for 64bits with SMP.
>>>>
>>>> Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com>
>>>> ---
>>>> arch/x86/Kconfig | 4 ++++
>>>> 1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>>>> index a317d5594b6a..d74353b85aaf 100644
>>>> --- a/arch/x86/Kconfig
>>>> +++ b/arch/x86/Kconfig
>>>> @@ -2882,6 +2882,10 @@ config X86_DMA_REMAP
>>>> config HAVE_GENERIC_GUP
>>>> def_bool y
>>>>
>>>> +config SPF
>>>> + def_bool y
>>>> + depends on X86_64 && SMP
>>>
>>> Can you please put that into a generic place as
>>>
>>> config SPF
>>> bool
>>>
>>> and let the architectures select it.
>>
>> I'll change that to let the architectures (x86 and ppc64 currently)
>> selecting it, but the definition will remain in the arch/xxx/Kconfig file
>> since it depends on the architecture support in the page fault handler.
>
> Errm. No.
>
> config SPECULATIVE_PAGE_FAULT
> bool
>
> goes into a generic config file, e.g. mm/Kconfig
>
> Each architecture which implements support does:
>
> select SPECULATIVE_PAGE_FAULT
>
> in arch/xxx/Kconfig
Oh ok, I think I got it this time ;)
Will do this way, this will be smarter.
Thanks a lot,
Laurent.
^ permalink raw reply
* Re: [PATCH v3 00/17] ASoC: fsl_ssi: Clean up - program flow level
From: Caleb Crome @ 2018-01-15 18:35 UTC (permalink / raw)
To: Nicolin Chen
Cc: Timur Tabi, Mark Brown, mail, linux-kernel, linuxppc-dev,
alsa-devel, Liam Girdwood, Fabio Estevam, Arnaud Mouiche, lukma,
Sascha Hauer
In-Reply-To: <1515990087-11598-1-git-send-email-nicoleotsuka@gmail.com>
On Sun, Jan 14, 2018 at 8:21 PM, Nicolin Chen <nicoleotsuka@gmail.com> wrote:
> ==Change log==
> v3
> * Reworked the series by taking suggestions from Maciej
> + Added PATCH-01 to make RX and TX more clearly defined
> + Replaced "bool dir" with "int dir" in PATCH-04
> + Replaced "!dir" with "int adir" in PATCH-05
> + Put CBM_CFS behind the baudclk check to keep the same
> program flow in PATCH-14
> + Removed all cpu_dai_drv changes in PATCH-15
> v2
> * Reworked the series by taking suggestions from Maciej
> + Added PATCH-01 to keep all ssi->i2s_net updated
> + Replaced bool tx with bool dir in PATCH-03 and PATCH-06
> + Moved all initial register configurations from dai probe() to
> platform probe() so as to let AC97 CODEC successfully probe.
> * Added Tested-by from Caleb for TDM test cases.
>
> ==Background==
> The fsl_ssi driver was designed for PPC originally and then it has
> been updated to support different modes for i.MX Series, including
> SDMA, I2S Master mode, AC97 and older i.MXs with FIQ, by different
> contributors for different use cases in different coding styles.
>
> Additionally, in order to fix/work-around hardware bugs and design
> flaws, the driver made a lot of compromise so now its program flow
> looks very complicated and it's getting hard to maintain or update.
>
> So I am going to clean up the driver on both coding style level and
> program flow level.
>
> ==Introduction==
> This series of patches is the second set to clean up fsl_ssi driver
> in the program flow level. Any patch here may impact a fundamental
> test case like playback or record.
>
> ==Verification==
> This series of patches require fully tested. I have done such tests
> on i.MX6SoloX with WM8962 using imx_v6_v7_defconfig as:
> - Playback via I2S Master and Slave mode
> - Record via I2S Master and Slave mode
> - Simultaneous playback and record via I2S Master and Slave mode
> - Background playback with foreground record (starting at different
> time) via I2S Master and Slave mode
> - Background record with foreground playback (starting at different
> time) via I2S Master and Slave mode
> * All tests above by hacking offline_config to true in imx51.
>
> Caleb has tested v1 with TDM lookback tests on i.MX6.
>
> Example of uncovered tests: AC97, PowerPC and FIQ.
>
> Nicolin Chen (17):
> ASoC: fsl_ssi: Redefine RX and TX macros
> ASoC: fsl_ssi: Keep ssi->i2s_net updated
> ASoC: fsl_ssi: Clean up set_dai_tdm_slot()
> ASoC: fsl_ssi: Maintain a mask of active streams
> ASoC: fsl_ssi: Rename fsl_ssi_disable_val macro
> ASoC: fsl_ssi: Clear FIFO directly in fsl_ssi_config()
> ASoC: fsl_ssi: Clean up helper functions of trigger()
> ASoC: fsl_ssi: Add DAIFMT define for AC97
> ASoC: fsl_ssi: Clean up fsl_ssi_setup_regvals()
> ASoC: fsl_ssi: Set xFEN0 and xFEN1 together
> ASoC: fsl_ssi: Use snd_soc_init_dma_data instead
> ASoC: fsl_ssi: Move one-time configurations to probe()
> ASoC: fsl_ssi: Setup AC97 in fsl_ssi_hw_init()
> ASoC: fsl_ssi: Clean up _fsl_ssi_set_dai_fmt()
> ASoC: fsl_ssi: Add bool synchronous to mark synchronous mode
> ASoC: fsl_ssi: Move DT related code to a separate probe()
> ASoC: fsl_ssi: Use ssi->streams instead of reading register
>
> sound/soc/fsl/fsl_ssi.c | 733 ++++++++++++++++++++++++------------------------
> sound/soc/fsl/fsl_ssi.h | 3 -
> 2 files changed, 370 insertions(+), 366 deletions(-)
>
> --
> 2.7.4
>
tested v3...
Tested-by: Caleb Crome <caleb@crome.org>
^ permalink raw reply
* Re: [PATCH v6 01/24] x86/mm: Define CONFIG_SPF
From: Thomas Gleixner @ 2018-01-15 17:49 UTC (permalink / raw)
To: Laurent Dufour
Cc: paulmck, peterz, akpm, kirill, ak, mhocko, dave, jack,
Matthew Wilcox, benh, mpe, paulus, Ingo Molnar, hpa, Will Deacon,
Sergey Senozhatsky, Andrea Arcangeli, Alexei Starovoitov,
kemi.wang, sergey.senozhatsky.work, linux-kernel, linux-mm, haren,
khandual, npiggin, bsingharora, Tim Chen, linuxppc-dev, x86
In-Reply-To: <753d7b28-3d7e-0c01-0386-8dad161f88ea@linux.vnet.ibm.com>
On Mon, 15 Jan 2018, Laurent Dufour wrote:
> On 12/01/2018 19:57, Thomas Gleixner wrote:
> > On Fri, 12 Jan 2018, Laurent Dufour wrote:
> >
> >> Introduce CONFIG_SPF which turns on the Speculative Page Fault handler when
> >> building for 64bits with SMP.
> >>
> >> Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com>
> >> ---
> >> arch/x86/Kconfig | 4 ++++
> >> 1 file changed, 4 insertions(+)
> >>
> >> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> >> index a317d5594b6a..d74353b85aaf 100644
> >> --- a/arch/x86/Kconfig
> >> +++ b/arch/x86/Kconfig
> >> @@ -2882,6 +2882,10 @@ config X86_DMA_REMAP
> >> config HAVE_GENERIC_GUP
> >> def_bool y
> >>
> >> +config SPF
> >> + def_bool y
> >> + depends on X86_64 && SMP
> >
> > Can you please put that into a generic place as
> >
> > config SPF
> > bool
> >
> > and let the architectures select it.
>
> I'll change that to let the architectures (x86 and ppc64 currently)
> selecting it, but the definition will remain in the arch/xxx/Kconfig file
> since it depends on the architecture support in the page fault handler.
Errm. No.
config SPECULATIVE_PAGE_FAULT
bool
goes into a generic config file, e.g. mm/Kconfig
Each architecture which implements support does:
select SPECULATIVE_PAGE_FAULT
in arch/xxx/Kconfig
Thanks,
tglx
^ permalink raw reply
* Re: [PATCH v6 16/24] mm: Protect mm_rb tree with a rwlock
From: Laurent Dufour @ 2018-01-15 17:42 UTC (permalink / raw)
To: Matthew Wilcox
Cc: paulmck, peterz, akpm, kirill, ak, mhocko, dave, jack, benh, mpe,
paulus, Thomas Gleixner, Ingo Molnar, hpa, Will Deacon,
Sergey Senozhatsky, Andrea Arcangeli, Alexei Starovoitov,
kemi.wang, sergey.senozhatsky.work, linux-kernel, linux-mm, haren,
khandual, npiggin, bsingharora, Tim Chen, linuxppc-dev, x86
In-Reply-To: <20180112184821.GB7590@bombadil.infradead.org>
Hi Matthew,
Thanks for reviewing this series.
On 12/01/2018 19:48, Matthew Wilcox wrote:
> On Fri, Jan 12, 2018 at 06:26:00PM +0100, Laurent Dufour wrote:
>> -static void __vma_rb_erase(struct vm_area_struct *vma, struct rb_root *root)
>> +static void __vma_rb_erase(struct vm_area_struct *vma, struct mm_struct *mm)
>> {
>> + struct rb_root *root = &mm->mm_rb;
>> /*
>> * Note rb_erase_augmented is a fairly large inline function,
>> * so make sure we instantiate it only once with our desired
>> * augmented rbtree callbacks.
>> */
>> +#ifdef CONFIG_SPF
>> + write_lock(&mm->mm_rb_lock);
>> +#endif
>> rb_erase_augmented(&vma->vm_rb, root, &vma_gap_callbacks);
>> +#ifdef CONFIG_SPF
>> + write_unlock(&mm->mm_rb_lock); /* wmb */
>> +#endif
>
> I can't say I love this. Have you considered:
>
> #ifdef CONFIG_SPF
> #define vma_rb_write_lock(mm) write_lock(&mm->mm_rb_lock)
> #define vma_rb_write_unlock(mm) write_unlock(&mm->mm_rb_lock)
> #else
> #define vma_rb_write_lock(mm) do { } while (0)
> #define vma_rb_write_unlock(mm) do { } while (0)
> #endif
I haven't consider this, but this sounds to be smarter. I'll do that.
> Also, SPF is kind of uninformative. CONFIG_MM_SPF might be better?
> Or perhaps even CONFIG_SPECULATIVE_PAGE_FAULT, just to make it really
> painful to do these one-liner ifdefs that make the code so hard to read.
Thomas also complained about that, and I agree, SPF is quite cryptic. This
being said, I don't think that CONFIG_MM_SPF will be far better, so I'll
change this define to CONFIG_SPECULATIVE_PAGE_FAULT, even if it's longer,
it should not be too much present in the code.
Thanks,
Laurent.
^ permalink raw reply
* Re: [PATCH v6 01/24] x86/mm: Define CONFIG_SPF
From: Laurent Dufour @ 2018-01-15 17:37 UTC (permalink / raw)
To: Thomas Gleixner
Cc: paulmck, peterz, akpm, kirill, ak, mhocko, dave, jack,
Matthew Wilcox, benh, mpe, paulus, Ingo Molnar, hpa, Will Deacon,
Sergey Senozhatsky, Andrea Arcangeli, Alexei Starovoitov,
kemi.wang, sergey.senozhatsky.work, linux-kernel, linux-mm, haren,
khandual, npiggin, bsingharora, Tim Chen, linuxppc-dev, x86
In-Reply-To: <alpine.DEB.2.20.1801121955150.2371@nanos>
Hi Thomas,
Thanks for reviewing this series.
On 12/01/2018 19:57, Thomas Gleixner wrote:
> On Fri, 12 Jan 2018, Laurent Dufour wrote:
>
>> Introduce CONFIG_SPF which turns on the Speculative Page Fault handler when
>> building for 64bits with SMP.
>>
>> Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com>
>> ---
>> arch/x86/Kconfig | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>> index a317d5594b6a..d74353b85aaf 100644
>> --- a/arch/x86/Kconfig
>> +++ b/arch/x86/Kconfig
>> @@ -2882,6 +2882,10 @@ config X86_DMA_REMAP
>> config HAVE_GENERIC_GUP
>> def_bool y
>>
>> +config SPF
>> + def_bool y
>> + depends on X86_64 && SMP
>
> Can you please put that into a generic place as
>
> config SPF
> bool
>
> and let the architectures select it.
I'll change that to let the architectures (x86 and ppc64 currently)
selecting it, but the definition will remain in the arch/xxx/Kconfig file
since it depends on the architecture support in the page fault handler.
> Also SPF could be bit more elaborate and self explaining for the causual
> reader. 3 letter acronyms are reserved for non existing agencies.
That's true 3 letter acronyms are already reserved...
I'll change it to CONFIG_SPECULATIVE_PAGE_FAULT as suggested by Matthew Wilcox.
Thanks,
Laurent.
^ permalink raw reply
* Re: DPAA Ethernet traffice troubles with Linux kernel
From: Joakim Tjernlund @ 2018-01-15 16:59 UTC (permalink / raw)
To: linuxppc-dev@lists.ozlabs.org, madalin.bucur@nxp.com,
madskateman@gmail.com
Cc: netdev@vger.kernel.org
In-Reply-To: <DB3PR0402MB3849EEF00D71FF7A230B70C3ECEB0@DB3PR0402MB3849.eurprd04.prod.outlook.com>
T24gVGh1LCAxOTcwLTAxLTAxIGF0IDAwOjAwICswMDAwLCBNYWRhbGluLWNyaXN0aWFuIEJ1Y3Vy
IHdyb3RlOg0KPiBDQVVUSU9OOiBUaGlzIGVtYWlsIG9yaWdpbmF0ZWQgZnJvbSBvdXRzaWRlIG9m
IHRoZSBvcmdhbml6YXRpb24uIERvIG5vdCBjbGljayBsaW5rcyBvciBvcGVuIGF0dGFjaG1lbnRz
IHVubGVzcyB5b3UgcmVjb2duaXplIHRoZSBzZW5kZXIgYW5kIGtub3cgdGhlIGNvbnRlbnQgaXMg
c2FmZS4NCj4gDQo+IA0KPiA+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+ID4gRnJvbTog
TGludXhwcGMtZGV2IFttYWlsdG86bGludXhwcGMtZGV2LQ0KPiA+IGJvdW5jZXMrbWFkYWxpbi5i
dWN1cj1ueHAuY29tQGxpc3RzLm96bGFicy5vcmddIE9uIEJlaGFsZiBPZiBtYWQgc2thdGVtYW4N
Cj4gPiBTZW50OiBXZWRuZXNkYXksIEphbnVhcnkgMTAsIDIwMTggMTA6MzkgUE0NCj4gPiBUbzog
bGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmcNCj4gPiBTdWJqZWN0OiBEUEFBIEV0aGVybmV0
IHRyYWZmaWNlIHRyb3VibGVzIHdpdGggTGludXgga2VybmVsDQo+ID4gDQo+ID4gSGkgbGludXgg
ZGV2cywNCj4gPiANCj4gPiBMaWtlIG1lbnRpb25lZCBpbiB0aGlzIHRocmVhZA0KPiA+IGh0dHBz
Oi8vbGlzdHMub3psYWJzLm9yZy9waXBlcm1haWwvbGludXhwcGMtZGV2LzIwMTgtSmFudWFyeS8x
Njc2MzAuaHRtbA0KPiA+IGkgYWxzbyBleHBlcmllbmNlIHRoZSBleGFjdCBzYW1lIGlzc3Vlcy4N
Cj4gPiBJIGFtIGFsc28gdHJ5aW5nIHRvIGZpbmQgb3V0IHdoeSB0aGUgbmV0d29yayB0cmFmZmlj
IGlzIG5vdCBmbG93aW5nDQo+ID4gdGhlIHdheSBpdCBzaG91bGQgKG91dCBmb3IgZXhhbXBsZSAp
Lg0KPiA+IA0KPiA+IE15IGxpbnV4IGtub3dsZWRnZSBpcyB2ZXJ5IGJhc2ljIGJ1dCBpIGhvcGUg
aSBjYW4gY29udHJpYnV0ZSBhbnl3YXkuDQo+ID4gDQo+ID4gSSBhbSB1c2luZyB0aGUgQW1pZ2FP
bmUgWDUwMDAgd2l0aCBhIFA1MDIwDQo+ID4gTW9zdCBkZXRhaWxlZCB0ZWNobmljYWwgaW5mb3Jt
YXRpb24gcmVnYXJkaW5nIHRoaXMgaXNzdWUgY2FuIGJlIGZvdW5kDQo+ID4gaW4gdGhlIFRocmVh
ZCBieSBKYW1pZSBLcnVlZ2VyIG1lbnRpb25lZCBhYm92ZS4NCj4gPiANCj4gPiBJbiB0aGlzIHNj
cmVlbnNob3QsIHRoZSBFVEgwIGFuZCBFVEgxIHNlZW0gdXAgYW5kIHJ1bm5pbmcgKHByb2JlZCkg
Li4NCj4gPiBldmVuIGR1ZSB0byB0aGUgRlNMX0RQQUFfTUFDIGVycm9yIG1lc3NhZ2VzIHRoYXQg
RE1FU0cgc2hvd3MuDQo+ID4gaHR0cDovL3d3dy5za2F0ZW1hbi5ubC93cC1jb250ZW50L3VwbG9h
ZHMvMjAxOC8wMS9TY3JlZW5zaG90LWF0LTIwMTgtMDEtMDgtMjFfMjJfMDZfRVRIX05JQ19FUlJP
Ui5wbmcNCj4gPiANCj4gPiBodHRwOi8vd3d3LnNrYXRlbWFuLm5sL3dwLWNvbnRlbnQvdXBsb2Fk
cy8yMDE4LzAxL1NjcmVlbnNob3QtYXQtMjAxOC0wMS0wOC0yMl8xNl8yOC5wbmcNCj4gPiANCj4g
PiBJIHdhcyBhYmxlIHRvIHVzZSBzb21lIHRvb2xpbmcgbGlrZSBFVEhUT09MIHRvIGFkanVzdCBz
b21lIHNldHRpbmdzDQo+ID4gYW5kIGNoZWNrIGlmIHRoZSBpbnRlcmZhY2UgcmVzcG9uZGVkLiBU
aGlzIGFsbCBzZWVtcyBmaW5lLg0KPiA+IA0KPiA+IEhvcGUgdGhhdCBzb21lb25lIGNhbiBmaW5k
IGEgZml4LCBzbyB0aGUgRXRoZXJuZXQgYWRhcHRlciBjYW4gYmUgdXNlZC4NCj4gPiANCj4gPiBU
aGFua3MhIQ0KPiANCj4gSGksDQo+IA0KPiBQbGVhc2UgdXNlIHRleHQgbG9ncyBpbnN0ZWFkIG9m
IHBpY3R1cmVzIG5leHQgdGltZSwgaXQncyBlYXNpZXIgdG8gcmVhZC4NCj4gVGhlIGVycm9ycyB5
b3Ugc2VlIGFyZSByZWxhdGVkIHRvIG1pc3NpbmcgTUFDIGFkZHJlc3NlcyBmb3IgdGhlIHVudXNl
ZA0KPiBpbnRlcmZhY2VzLCB5b3UgY2FuIGlnbm9yZSB0aGVzZSBhcmUgdGhleSBhcmUgbm90IHJl
bGV2YW50IGZvciB0aGUgaXNzdWUNCj4geW91IGVuY291bnRlci4gTm9ybWFsbHkgdGhlIHVudXNl
ZCBpbnRlcmZhY2VzIHNob3VsZCBoYXZlIHN0YXR1cyBkaXNhYmxlZA0KPiBpbiB0aGUgZGV2aWNl
IHRyZWUgYnV0IHRoZXJlIGlzIG5vdCBhIGJpZyBkZWFsIGlmIHRoZXkgZmFpbCBsaWtlIHRoYXQu
DQo+IEFzIEkndmUgYWR2aXNlZCBKYW1pZSBvbiB0aGUgb3RoZXIgdGhyZWFkLCBwbGVhc2UgdHJ5
IHRvIGNvbm5lY3QgdGhlIGRldmljZQ0KPiBiYWNrIDIgYmFjayB0byBhIGtub3duIGdvb2QgbWFj
aGluZSBhbmQgZGV0ZXJtaW5lIHdoYXQgaXMgYnJva2VuIC0gUngvVHg/DQo+IElzIHRoZXJlIGFu
b3RoZXIgc29mdHdhcmUgdmVyc2lvbiB0aGF0IGRvZXMgd29yayBvbiB0aGVzZSBtYWNoaW5lcz8N
Cg0KSGksIGp1c3Qgc2F3IHRoaXMgYW5kIHRob3VnaHQgb2YgYSBzbWFsbCBwYXRjaCBJIGp1c3Qg
d3JvdGUgZm9yIG1kaW8gYnVzLCBvIGlkZWENCmlmIGl0IGlzIHJlbGV2YW50IGJ1dCBoZXJlIGdv
ZXM6DQoNCkZyb20gZmUwYjk4ZDU0YTc5Nzc5NDgyNzAwNjc2MzMxYjRkMTBhMGYzY2FkYSBNb24g
U2VwIDE3IDAwOjAwOjAwIDIwMDENCkZyb206IEpvYWtpbSBUamVybmx1bmQgPGpvYWtpbS50amVy
bmx1bmRAaW5maW5lcmEuY29tPg0KRGF0ZTogU3VuLCAxNCBKYW4gMjAxOCAyMToyNzoyMCArMDEw
MA0KU3ViamVjdDogW1BBVENIXSBvZl9tZGlvYnVzX3JlZ2lzdGVyOiBDb250aW51ZSBhZnRlciBl
cnJvcg0KDQpvZl9tZGlvYnVzX3JlZ2lzdGVyIHVucmVnaXN0ZXIgaXRzZWxmIGlmIG9uZSBwaHkg
ZmFpbHMgdG8gcmVnaXN0ZXINCndoaWNoIGlzIGJhZCBmb3Igc3lzdGVtIGhhdmluZyBhbGwgaXRz
IFBIWXMgb24gdGhlIHNhbWUgTURJTyBidXMuDQpKdXN0IGxvZyB0aGUgZXJyb3IgYW5kIGNvbnRp
bnVlIHdpdGggdGhlIHJlbWFpbmluZyBQSFlzIGluc3RlYWQuDQoNClNpZ25lZC1vZmYtYnk6IEpv
YWtpbSBUamVybmx1bmQgPGpvYWtpbS50amVybmx1bmRAaW5maW5lcmEuY29tPg0KLS0tDQogZHJp
dmVycy9vZi9vZl9tZGlvLmMgfCA2ICsrKystLQ0KIDEgZmlsZSBjaGFuZ2VkLCA0IGluc2VydGlv
bnMoKyksIDIgZGVsZXRpb25zKC0pDQoNCmRpZmYgLS1naXQgYS9kcml2ZXJzL29mL29mX21kaW8u
YyBiL2RyaXZlcnMvb2Yvb2ZfbWRpby5jDQppbmRleCA5ODI1ODU4M2FiYjAuLjc2ZmYyOGE0MWRh
ZCAxMDA2NDQNCi0tLSBhL2RyaXZlcnMvb2Yvb2ZfbWRpby5jDQorKysgYi9kcml2ZXJzL29mL29m
X21kaW8uYw0KQEAgLTIyOSw3ICsyMjksOCBAQCBpbnQgb2ZfbWRpb2J1c19yZWdpc3RlcihzdHJ1
Y3QgbWlpX2J1cyAqbWRpbywgc3RydWN0IGRldmljZV9ub2RlICpucCkNCiAJCWVsc2UNCiAJCQly
YyA9IG9mX21kaW9idXNfcmVnaXN0ZXJfZGV2aWNlKG1kaW8sIGNoaWxkLCBhZGRyKTsNCiAJCWlm
IChyYykNCi0JCQlnb3RvIHVucmVnaXN0ZXI7DQorCQkJcHJfd2FybihGV19XQVJODQorCQkJCSIl
cE9GOiBGYWlsZWQgdG8gcmVnaXN0ZXIgTURJTyBkZXZpY2UuXG4iLCBjaGlsZCk7DQogCX0NCiAN
CiAJaWYgKCFzY2FucGh5cykNCkBAIC0yNTMsNyArMjU0LDggQEAgaW50IG9mX21kaW9idXNfcmVn
aXN0ZXIoc3RydWN0IG1paV9idXMgKm1kaW8sIHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApDQogCQkJ
aWYgKG9mX21kaW9idXNfY2hpbGRfaXNfcGh5KGNoaWxkKSkgew0KIAkJCQlyYyA9IG9mX21kaW9i
dXNfcmVnaXN0ZXJfcGh5KG1kaW8sIGNoaWxkLCBhZGRyKTsNCiAJCQkJaWYgKHJjKQ0KLQkJCQkJ
Z290byB1bnJlZ2lzdGVyOw0KKwkJCQkJcHJfd2FybihGV19XQVJODQorCQkJCQkJIiVwT0Y6IEZh
aWxlZCB0byByZWdpc3RlciBNRElPIFBIWS5cbiIsIGNoaWxkKTsNCiAJCQl9DQogCQl9DQogCX0N
Ci0tIA0KMi4xMy42
^ permalink raw reply
* RE: DPAA Ethernet traffice troubles with Linux kernel
From: Madalin-cristian Bucur @ 2018-01-15 16:38 UTC (permalink / raw)
To: mad skateman, linuxppc-dev@lists.ozlabs.org; +Cc: netdev@vger.kernel.org
In-Reply-To: <CAHkrCmFCzPd_a1UmyfuZHKM4hXvou0uO0FYoG5bd_fxE8QMueg@mail.gmail.com>
PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBMaW51eHBwYy1kZXYgW21haWx0
bzpsaW51eHBwYy1kZXYtDQo+IGJvdW5jZXMrbWFkYWxpbi5idWN1cj1ueHAuY29tQGxpc3RzLm96
bGFicy5vcmddIE9uIEJlaGFsZiBPZiBtYWQgc2thdGVtYW4NCj4gU2VudDogV2VkbmVzZGF5LCBK
YW51YXJ5IDEwLCAyMDE4IDEwOjM5IFBNDQo+IFRvOiBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJz
Lm9yZw0KPiBTdWJqZWN0OiBEUEFBIEV0aGVybmV0IHRyYWZmaWNlIHRyb3VibGVzIHdpdGggTGlu
dXgga2VybmVsDQo+IA0KPiBIaSBsaW51eCBkZXZzLA0KPiANCj4gTGlrZSBtZW50aW9uZWQgaW4g
dGhpcyB0aHJlYWQNCj4gaHR0cHM6Ly9saXN0cy5vemxhYnMub3JnL3BpcGVybWFpbC9saW51eHBw
Yy1kZXYvMjAxOC1KYW51YXJ5LzE2NzYzMC5odG1sDQo+IGkgYWxzbyBleHBlcmllbmNlIHRoZSBl
eGFjdCBzYW1lIGlzc3Vlcy4NCj4gSSBhbSBhbHNvIHRyeWluZyB0byBmaW5kIG91dCB3aHkgdGhl
IG5ldHdvcmsgdHJhZmZpYyBpcyBub3QgZmxvd2luZw0KPiB0aGUgd2F5IGl0IHNob3VsZCAob3V0
IGZvciBleGFtcGxlICkuDQo+IA0KPiBNeSBsaW51eCBrbm93bGVkZ2UgaXMgdmVyeSBiYXNpYyBi
dXQgaSBob3BlIGkgY2FuIGNvbnRyaWJ1dGUgYW55d2F5Lg0KPiANCj4gSSBhbSB1c2luZyB0aGUg
QW1pZ2FPbmUgWDUwMDAgd2l0aCBhIFA1MDIwDQo+IE1vc3QgZGV0YWlsZWQgdGVjaG5pY2FsIGlu
Zm9ybWF0aW9uIHJlZ2FyZGluZyB0aGlzIGlzc3VlIGNhbiBiZSBmb3VuZA0KPiBpbiB0aGUgVGhy
ZWFkIGJ5IEphbWllIEtydWVnZXIgbWVudGlvbmVkIGFib3ZlLg0KPiANCj4gSW4gdGhpcyBzY3Jl
ZW5zaG90LCB0aGUgRVRIMCBhbmQgRVRIMSBzZWVtIHVwIGFuZCBydW5uaW5nIChwcm9iZWQpIC4u
DQo+IGV2ZW4gZHVlIHRvIHRoZSBGU0xfRFBBQV9NQUMgZXJyb3IgbWVzc2FnZXMgdGhhdCBETUVT
RyBzaG93cy4NCj4gaHR0cDovL3d3dy5za2F0ZW1hbi5ubC93cC1jb250ZW50L3VwbG9hZHMvMjAx
OC8wMS9TY3JlZW5zaG90LWF0LTIwMTgtMDEtMDgtMjFfMjJfMDZfRVRIX05JQ19FUlJPUi5wbmcN
Cj4gDQo+IGh0dHA6Ly93d3cuc2thdGVtYW4ubmwvd3AtY29udGVudC91cGxvYWRzLzIwMTgvMDEv
U2NyZWVuc2hvdC1hdC0yMDE4LTAxLTA4LTIyXzE2XzI4LnBuZw0KPiANCj4gSSB3YXMgYWJsZSB0
byB1c2Ugc29tZSB0b29saW5nIGxpa2UgRVRIVE9PTCB0byBhZGp1c3Qgc29tZSBzZXR0aW5ncw0K
PiBhbmQgY2hlY2sgaWYgdGhlIGludGVyZmFjZSByZXNwb25kZWQuIFRoaXMgYWxsIHNlZW1zIGZp
bmUuDQo+IA0KPiBIb3BlIHRoYXQgc29tZW9uZSBjYW4gZmluZCBhIGZpeCwgc28gdGhlIEV0aGVy
bmV0IGFkYXB0ZXIgY2FuIGJlIHVzZWQuDQo+IA0KPiBUaGFua3MhIQ0KDQpIaSwNCg0KUGxlYXNl
IHVzZSB0ZXh0IGxvZ3MgaW5zdGVhZCBvZiBwaWN0dXJlcyBuZXh0IHRpbWUsIGl0J3MgZWFzaWVy
IHRvIHJlYWQuDQpUaGUgZXJyb3JzIHlvdSBzZWUgYXJlIHJlbGF0ZWQgdG8gbWlzc2luZyBNQUMg
YWRkcmVzc2VzIGZvciB0aGUgdW51c2VkDQppbnRlcmZhY2VzLCB5b3UgY2FuIGlnbm9yZSB0aGVz
ZSBhcmUgdGhleSBhcmUgbm90IHJlbGV2YW50IGZvciB0aGUgaXNzdWUNCnlvdSBlbmNvdW50ZXIu
IE5vcm1hbGx5IHRoZSB1bnVzZWQgaW50ZXJmYWNlcyBzaG91bGQgaGF2ZSBzdGF0dXMgZGlzYWJs
ZWQNCmluIHRoZSBkZXZpY2UgdHJlZSBidXQgdGhlcmUgaXMgbm90IGEgYmlnIGRlYWwgaWYgdGhl
eSBmYWlsIGxpa2UgdGhhdC4NCkFzIEkndmUgYWR2aXNlZCBKYW1pZSBvbiB0aGUgb3RoZXIgdGhy
ZWFkLCBwbGVhc2UgdHJ5IHRvIGNvbm5lY3QgdGhlIGRldmljZQ0KYmFjayAyIGJhY2sgdG8gYSBr
bm93biBnb29kIG1hY2hpbmUgYW5kIGRldGVybWluZSB3aGF0IGlzIGJyb2tlbiAtIFJ4L1R4Pw0K
SXMgdGhlcmUgYW5vdGhlciBzb2Z0d2FyZSB2ZXJzaW9uIHRoYXQgZG9lcyB3b3JrIG9uIHRoZXNl
IG1hY2hpbmVzPw0KDQpNYWRhbGluDQo=
^ permalink raw reply
* Re: [PATCH V2] powerpc/kernel: Add 'ibm, thread-groups' property for CPU allocation
From: Michael Bringmann @ 2018-01-15 15:01 UTC (permalink / raw)
To: linuxppc-dev, Nathan Fontenot, Michael Ellerman
In-Reply-To: <87tvvqbi82.fsf@concordia.ellerman.id.au>
On 01/12/2018 08:33 PM, Michael Ellerman wrote:
> Nathan Fontenot <nfont@linux.vnet.ibm.com> writes:
...
>>
>> One thing I don't see addressed in the comments or in the code is
>> migration support. I think we need to update the thread group mask
>> post-migration to reflect the threads per core on the new system.
>
> Normally I'd agree with you, but I don't see any prospect of the kernel
> surviving if the threads per core changes across a migration. We'll have
> data structures allocated based on the old value and things will
> definitely crash if the value increases. If it shrinks maybe we'd get
> away with it, but either way is dicey.
>
> If there's an expectation that we'll be able to migrate between systems
> with different settings then we have a much bigger problem.
>
> cheers
>
>
>From what I recall of my tests a few months ago, the device-tree is read in
and flattened before the kernel starts processing the migration state.
I am trying to get access to a couple of P9 systems on which I may test
migration to verify the ordering of events between initializing the kernel
and post-migration processing.
Regards,
--
Michael W. Bringmann
Linux Technology Center
IBM Corporation
Tie-Line 363-5196
External: (512) 286-5196
Cell: (512) 466-0650
mwb@linux.vnet.ibm.com
^ permalink raw reply
* [PATCH v7 2/2] cxl: read PHB indications from the device tree
From: Philippe Bergheaud @ 2018-01-15 13:39 UTC (permalink / raw)
To: linuxppc-dev; +Cc: fbarrat, clombard, benh, Philippe Bergheaud
In-Reply-To: <20180115133937.13063-1-felix@linux.vnet.ibm.com>
Configure the P9 XSL_DSNCTL register with PHB indications found
in the device tree, or else use legacy hard-coded values.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
---
Changelog:
v2: New patch. Use the new device tree property "ibm,phb-indications".
v3: No change.
v4: No functional change.
Drop cosmetic fix in comment.
v5: get_phb_indications():
- make static variables local to function.
- return static variable values by arguments.
v6: get_phb_indications():
- acquire a mutex before setting the phb indications.
v7: get_phb_indications():
cxl_get_xsl9_dsnctl():
- return -ENODEV instead of -1.
This patch depends on the following skiboot patch:
https://patchwork.ozlabs.org/patch/858324/
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/cxllib.c | 2 +-
drivers/misc/cxl/pci.c | 50 ++++++++++++++++++++++++++++++++++++++++++-----
3 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index e46a4062904a..5a6e9a921c2b 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -1062,7 +1062,7 @@ int cxl_psl_purge(struct cxl_afu *afu);
int cxl_calc_capp_routing(struct pci_dev *dev, u64 *chipid,
u32 *phb_index, u64 *capp_unit_id);
int cxl_slot_is_switched(struct pci_dev *dev);
-int cxl_get_xsl9_dsnctl(u64 capp_unit_id, u64 *reg);
+int cxl_get_xsl9_dsnctl(struct pci_dev *dev, u64 capp_unit_id, u64 *reg);
u64 cxl_calculate_sr(bool master, bool kernel, bool real_mode, bool p9);
void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx);
diff --git a/drivers/misc/cxl/cxllib.c b/drivers/misc/cxl/cxllib.c
index dc9bc1807fdf..61f80d586279 100644
--- a/drivers/misc/cxl/cxllib.c
+++ b/drivers/misc/cxl/cxllib.c
@@ -99,7 +99,7 @@ int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg)
if (rc)
return rc;
- rc = cxl_get_xsl9_dsnctl(capp_unit_id, &cfg->dsnctl);
+ rc = cxl_get_xsl9_dsnctl(dev, capp_unit_id, &cfg->dsnctl);
if (rc)
return rc;
if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 19969ee86d6f..89840181fc03 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -409,21 +409,61 @@ int cxl_calc_capp_routing(struct pci_dev *dev, u64 *chipid,
return 0;
}
-int cxl_get_xsl9_dsnctl(u64 capp_unit_id, u64 *reg)
+static DEFINE_MUTEX(indications_mutex);
+
+static int get_phb_indications(struct pci_dev *dev, u64* capiind, u64 *asnind,
+ u64 *nbwind)
+{
+ static u64 nbw, asn, capi = 0;
+ struct device_node *np;
+ const __be32 *prop;
+
+ if (!capi) {
+ mutex_lock(&indications_mutex);
+ if (!capi) {
+ if (!(np = pnv_pci_get_phb_node(dev))) {
+ mutex_unlock(&indications_mutex);
+ return -ENODEV;
+ }
+
+ prop = of_get_property(np, "ibm,phb-indications", NULL);
+ if (!prop) {
+ nbw = 0x0300UL; /* legacy values */
+ asn = 0x0400UL;
+ capi = 0x0200UL;
+ } else {
+ nbw = (u64)be32_to_cpu(prop[2]);
+ asn = (u64)be32_to_cpu(prop[1]);
+ capi = (u64)be32_to_cpu(prop[0]);
+ }
+ of_node_put(np);
+ }
+ mutex_unlock(&indications_mutex);
+ }
+ *capiind = capi;
+ *asnind = asn;
+ *nbwind = nbw;
+ return 0;
+}
+
+int cxl_get_xsl9_dsnctl(struct pci_dev *dev, u64 capp_unit_id, u64 *reg)
{
u64 xsl_dsnctl;
+ u64 capiind, asnind, nbwind;
/*
* CAPI Identifier bits [0:7]
* bit 61:60 MSI bits --> 0
* bit 59 TVT selector --> 0
*/
+ if (get_phb_indications(dev, &capiind, &asnind, &nbwind))
+ return -ENODEV;
/*
* Tell XSL where to route data to.
* The field chipid should match the PHB CAPI_CMPM register
*/
- xsl_dsnctl = ((u64)0x2 << (63-7)); /* Bit 57 */
+ xsl_dsnctl = (capiind << (63-15)); /* Bit 57 */
xsl_dsnctl |= (capp_unit_id << (63-15));
/* nMMU_ID Defaults to: b’000001001’*/
@@ -437,14 +477,14 @@ int cxl_get_xsl9_dsnctl(u64 capp_unit_id, u64 *reg)
* nbwind=0x03, bits [57:58], must include capi indicator.
* Not supported on P9 DD1.
*/
- xsl_dsnctl |= ((u64)0x03 << (63-47));
+ xsl_dsnctl |= (nbwind << (63-55));
/*
* Upper 16b address bits of ASB_Notify messages sent to the
* system. Need to match the PHB’s ASN Compare/Mask Register.
* Not supported on P9 DD1.
*/
- xsl_dsnctl |= ((u64)0x04 << (63-55));
+ xsl_dsnctl |= asnind;
}
*reg = xsl_dsnctl;
@@ -464,7 +504,7 @@ static int init_implementation_adapter_regs_psl9(struct cxl *adapter,
if (rc)
return rc;
- rc = cxl_get_xsl9_dsnctl(capp_unit_id, &xsl_dsnctl);
+ rc = cxl_get_xsl9_dsnctl(dev, capp_unit_id, &xsl_dsnctl);
if (rc)
return rc;
--
2.15.1
^ permalink raw reply related
* [PATCH v7 1/2] powerpc/powernv: Enable tunneled operations
From: Philippe Bergheaud @ 2018-01-15 13:39 UTC (permalink / raw)
To: linuxppc-dev; +Cc: fbarrat, clombard, benh, Philippe Bergheaud
P9 supports PCI tunneled operations (atomics and as_notify). This
patch adds support for tunneled operations on powernv, with a new
API, to be called by device drivers:
pnv_pci_get_tunnel_ind()
Tell driver the 16-bit ASN indication used by kernel.
pnv_pci_set_tunnel_bar()
Tell kernel the Tunnel BAR Response address used by driver.
This function uses two new OPAL calls, as the PBCQ Tunnel BAR
register is configured by skiboot.
pnv_pci_get_as_notify_info()
Return the ASN info of the thread to be woken up.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
---
Changelog:
v2: Do not set the ASN indication. Get it from the device tree.
v3: Make pnv_pci_get_phb_node() available when compiling without cxl.
v4: Add pnv_pci_get_as_notify_info().
Rebase opal call numbers on skiboot 5.9.6.
v5: pnv_pci_get_tunnel_ind():
- fix node reference count
pnv_pci_get_as_notify_info():
- fail if task == NULL
- read pid from mm->context.id
- explain that thread.tidr require CONFIG_PPC64
v6: pnv_pci_get_tunnel_ind():
- check if radix is enabled, or else return an error
pnv_pci_get_as_notify_info():
- remove a capi-specific comment, irrelevant for pci
v7: pnv_pci_set_tunnel_bar():
- setting the tunnel bar more than once with the same value
is not an error
This patch depends on the following skiboot patches:
https://patchwork.ozlabs.org/patch/858324/
https://patchwork.ozlabs.org/patch/858325/
---
arch/powerpc/include/asm/opal-api.h | 4 +-
arch/powerpc/include/asm/opal.h | 2 +
arch/powerpc/include/asm/pnv-pci.h | 5 ++
arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +
arch/powerpc/platforms/powernv/pci-cxl.c | 8 --
arch/powerpc/platforms/powernv/pci.c | 107 +++++++++++++++++++++++++
6 files changed, 119 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h
index 233c7504b1f2..b901f4d9f009 100644
--- a/arch/powerpc/include/asm/opal-api.h
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -201,7 +201,9 @@
#define OPAL_SET_POWER_SHIFT_RATIO 155
#define OPAL_SENSOR_GROUP_CLEAR 156
#define OPAL_PCI_SET_P2P 157
-#define OPAL_LAST 157
+#define OPAL_PCI_GET_PBCQ_TUNNEL_BAR 159
+#define OPAL_PCI_SET_PBCQ_TUNNEL_BAR 160
+#define OPAL_LAST 160
/* Device tree flags */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 0c545f7fc77b..8705e422b893 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -198,6 +198,8 @@ int64_t opal_unregister_dump_region(uint32_t id);
int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
+int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr);
+int64_t opal_pci_set_pbcq_tunnel_bar(uint64_t phb_id, uint64_t addr);
int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
uint64_t msg_len);
int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
diff --git a/arch/powerpc/include/asm/pnv-pci.h b/arch/powerpc/include/asm/pnv-pci.h
index 3e5cf251ad9a..c69de3276b5e 100644
--- a/arch/powerpc/include/asm/pnv-pci.h
+++ b/arch/powerpc/include/asm/pnv-pci.h
@@ -29,6 +29,11 @@ extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
extern int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target,
u64 desc);
+extern int pnv_pci_get_tunnel_ind(struct pci_dev *dev, uint64_t *ind);
+extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,
+ int enable);
+extern int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid,
+ u32 *pid, u32 *tid);
int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);
int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
unsigned int virq);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 6f4b00a2ac46..5da790fb7fef 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -320,3 +320,5 @@ OPAL_CALL(opal_set_powercap, OPAL_SET_POWERCAP);
OPAL_CALL(opal_get_power_shift_ratio, OPAL_GET_POWER_SHIFT_RATIO);
OPAL_CALL(opal_set_power_shift_ratio, OPAL_SET_POWER_SHIFT_RATIO);
OPAL_CALL(opal_sensor_group_clear, OPAL_SENSOR_GROUP_CLEAR);
+OPAL_CALL(opal_pci_get_pbcq_tunnel_bar, OPAL_PCI_GET_PBCQ_TUNNEL_BAR);
+OPAL_CALL(opal_pci_set_pbcq_tunnel_bar, OPAL_PCI_SET_PBCQ_TUNNEL_BAR);
diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c b/arch/powerpc/platforms/powernv/pci-cxl.c
index 94498a04558b..cee003de63af 100644
--- a/arch/powerpc/platforms/powernv/pci-cxl.c
+++ b/arch/powerpc/platforms/powernv/pci-cxl.c
@@ -16,14 +16,6 @@
#include "pci.h"
-struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
-
- return of_node_get(hose->dn);
-}
-EXPORT_SYMBOL(pnv_pci_get_phb_node);
-
int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)
{
struct pci_controller *hose = pci_bus_to_host(dev->bus);
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 5422f4a6317c..ac454c6ef08c 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -18,6 +18,7 @@
#include <linux/io.h>
#include <linux/msi.h>
#include <linux/iommu.h>
+#include <linux/sched/mm.h>
#include <asm/sections.h>
#include <asm/io.h>
@@ -38,6 +39,7 @@
#include "pci.h"
static DEFINE_MUTEX(p2p_mutex);
+static DEFINE_MUTEX(tunnel_mutex);
int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id)
{
@@ -1092,6 +1094,111 @@ int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target, u64 desc)
}
EXPORT_SYMBOL_GPL(pnv_pci_set_p2p);
+struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+ return of_node_get(hose->dn);
+}
+EXPORT_SYMBOL(pnv_pci_get_phb_node);
+
+int pnv_pci_get_tunnel_ind(struct pci_dev *dev, u64 *asnind)
+{
+ struct device_node *np;
+ const __be32 *prop;
+
+ if (!radix_enabled())
+ return -ENXIO;
+
+ if (!(np = pnv_pci_get_phb_node(dev)))
+ return -ENXIO;
+
+ prop = of_get_property(np, "ibm,phb-indications", NULL);
+ of_node_put(np);
+
+ if (!prop || !prop[1])
+ return -ENXIO;
+
+ *asnind = (u64)be32_to_cpu(prop[1]);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pnv_pci_get_tunnel_ind);
+
+int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
+{
+ __be64 val;
+ struct pci_controller *hose;
+ struct pnv_phb *phb;
+ u64 tunnel_bar;
+ int rc;
+
+ if (!opal_check_token(OPAL_PCI_GET_PBCQ_TUNNEL_BAR))
+ return -ENXIO;
+ if (!opal_check_token(OPAL_PCI_SET_PBCQ_TUNNEL_BAR))
+ return -ENXIO;
+
+ hose = pci_bus_to_host(dev->bus);
+ phb = hose->private_data;
+
+ mutex_lock(&tunnel_mutex);
+ rc = opal_pci_get_pbcq_tunnel_bar(phb->opal_id, &val);
+ if (rc != OPAL_SUCCESS) {
+ rc = -EIO;
+ goto out;
+ }
+ tunnel_bar = be64_to_cpu(val);
+ if (enable) {
+ /*
+ * Only one device per PHB can use atomics.
+ * Our policy is first-come, first-served.
+ */
+ if (tunnel_bar) {
+ if (tunnel_bar != addr)
+ rc = -EBUSY;
+ goto out;
+ }
+ } else {
+ /*
+ * The device that owns atomics and wants to release
+ * them must pass the same address with enable == 0.
+ */
+ if (tunnel_bar != addr) {
+ rc = -EPERM;
+ goto out;
+ }
+ addr = 0x0ULL;
+ }
+ rc = opal_pci_set_pbcq_tunnel_bar(phb->opal_id, addr);
+ rc = opal_error_code(rc);
+out:
+ mutex_unlock(&tunnel_mutex);
+ return rc;
+}
+EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);
+
+#ifdef CONFIG_PPC64 /* for thread.tidr */
+int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
+ u32 *tid)
+{
+ struct mm_struct *mm = NULL;
+
+ if (task == NULL)
+ return -EINVAL;
+
+ mm = get_task_mm(task);
+ if (mm == NULL)
+ return -EINVAL;
+
+ *pid = mm->context.id;
+ mmput(mm);
+
+ *tid = task->thread.tidr;
+ *lpid = mfspr(SPRN_LPID);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pnv_pci_get_as_notify_info);
+#endif
+
void pnv_pci_shutdown(void)
{
struct pci_controller *hose;
--
2.15.1
^ permalink raw reply related
* [PATCH] powerpc/pseries: include linux/types.h in asm/hvcall.h
From: Michal Suchanek @ 2018-01-15 13:30 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
Philippe Ombredanne, Cédric Le Goater, David Gibson,
Thomas Falcon, Michal Suchanek, Tobin C. Harding, Michael Neuling,
linuxppc-dev, linux-kernel
Commit 6e032b350cd1 ("powerpc/powernv: Check device-tree for RFI flush
settings") uses u64 in asm/hvcall.h without including linux/types.h
This breaks hvcall.h users that do not include the header themselves.
Fixes: 6e032b350cd1 ("powerpc/powernv: Check device-tree for RFI flush
settings")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
---
arch/powerpc/include/asm/hvcall.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index f0461618bf7b..eca3f9c68907 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -353,6 +353,7 @@
#define PROC_TABLE_GTSE 0x01
#ifndef __ASSEMBLY__
+#include <linux/types.h>
/**
* plpar_hcall_norets: - Make a pseries hypervisor call with no return arguments
--
2.13.6
^ permalink raw reply related
* Re: [PATCH v10 13/17] powerpc/64s: Add support to mask perf interrupts and replay them
From: Nicholas Piggin @ 2018-01-15 13:23 UTC (permalink / raw)
To: Madhavan Srinivasan; +Cc: mpe, benh, anton, paulus, linuxppc-dev
In-Reply-To: <1513742157-28768-14-git-send-email-maddy@linux.vnet.ibm.com>
On Wed, 20 Dec 2017 09:25:53 +0530
Madhavan Srinivasan <maddy@linux.vnet.ibm.com> wrote:
> Two new bit mask field "IRQ_DISABLE_MASK_PMU" is introduced to support
> the masking of PMI and "IRQ_DISABLE_MASK_ALL" to aid interrupt masking
> checking.
>
> Couple of new irq #defs "PACA_IRQ_PMI" and "SOFTEN_VALUE_0xf0*" added
> to use in the exception code to check for PMI interrupts.
>
> In the masked_interrupt handler, for PMIs we reset the MSR[EE] and
> return. In the __check_irq_replay(), replay the PMI interrupt by
> calling performance_monitor_common handler.
I think we need to add all interrupt types which clear MSR[EE] in their
masked handler to the test in may_hard_irq_disable(), otherwise EE can
be enabled before all such pending interrupts are replayed.
We should define all such interrupts in a mask and use that in
may_hard_irq_disable() and corresponding place in masked_##_H##interrupt:
Thanks,
Nick
^ permalink raw reply
* RE: DPAA Ethernet problems with mainstream Linux kernels
From: Madalin-cristian Bucur @ 2018-01-15 10:44 UTC (permalink / raw)
To: Jamie Krueger, linuxppc-dev@lists.ozlabs.org; +Cc: netdev@vger.kernel.org
In-Reply-To: <d7478110-68ae-34b3-51c5-487bb3e12527@bitbybitsoftwaregroup.com>
PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBKYW1pZSBLcnVlZ2VyIFttYWls
dG86amFtaWVAYml0YnliaXRzb2Z0d2FyZWdyb3VwLmNvbV0NCj4gU2VudDogRnJpZGF5LCBKYW51
YXJ5IDEyLCAyMDE4IDY6MzYgUE0NCj4gVG86IE1hZGFsaW4tY3Jpc3RpYW4gQnVjdXIgPG1hZGFs
aW4uYnVjdXJAbnhwLmNvbT47IGxpbnV4cHBjLQ0KPiBkZXZAbGlzdHMub3psYWJzLm9yZw0KPiBD
YzogbmV0ZGV2QHZnZXIua2VybmVsLm9yZw0KPiBTdWJqZWN0OiBSZTogRFBBQSBFdGhlcm5ldCBw
cm9ibGVtcyB3aXRoIG1haW5zdHJlYW0gTGludXgga2VybmVscw0KPiANCj4gT24gMDEvMTIvMjAx
OCAwODoyMiBBTSwgTWFkYWxpbi1jcmlzdGlhbiBCdWN1ciB3cm90ZToNCj4gPj4gLS0tLS1Pcmln
aW5hbCBNZXNzYWdlLS0tLS0NCj4gPj4gRnJvbTogTGludXhwcGMtZGV2IFttYWlsdG86bGludXhw
cGMtZGV2LQ0KPiA+PiBib3VuY2VzK21hZGFsaW4uYnVjdXI9bnhwLmNvbUBsaXN0cy5vemxhYnMu
b3JnXSBPbiBCZWhhbGYgT2YgSmFtaWUNCj4gS3J1ZWdlcg0KPiA+PiBTZW50OiBXZWRuZXNkYXks
IEphbnVhcnkgMTAsIDIwMTggNTo1NyBQTQ0KPiA+PiBUbzogbGludXhwcGMtZGV2QGxpc3RzLm96
bGFicy5vcmcNCj4gPj4gU3ViamVjdDogRFBBQSBFdGhlcm5ldCBwcm9ibGVtcyB3aXRoIG1haW5z
dHJlYW0gTGludXgga2VybmVscw0KPiA+Pg0KPiA+PiBIZWxsbyBhbGwgQCBsaW51eHBwYy1kZXYs
DQo+ID4+DQo+ID4+IEkgaGF2ZSBiZWVuIHdvcmtpbmcgd2l0aCBhIHRlYW0gb2YgcGVvcGxlIG1h
aW50YWluaW5nIFBvd2VyUEMNCj4gPj4gTGludXggZm9yIHRoZSBuZXcgQW1pZ2FPTkUgWDUwMDAv
MjAgKGEgRnJlZXNjYWxlIHA1MDIwIFNvQyBiYXNlZA0KPiA+PiBtYWNoaW5lKS4NCj4gPj4NCj4g
Pj4gV2UgYXJlIHRyeWluZyB0byBkZXRlcm1pbmUgd2h5IHRoZSBzdWJtaXR0ZWQgRGF0YSBQYXRo
IEFjY2VsZXJhdGlvbg0KPiA+PiBBcmNoaXRlY3R1cmUgKERQQUEpIEV0aGVybmV0IERyaXZlciBp
cyBub3QgZnVsbHkgZnVuY3Rpb25hbCB3aXRoDQo+ID4+IHRoZSBtYWluc3RyZWFtIExpbnV4IGtl
cm5lbHMuDQo+ID4gSGkgSmFtaWUsDQo+IEhpIE1hZGFsaW4sDQo+ID4gV2UgYXJlIHRlc3Rpbmcg
dGhlIERQQUEgZHJpdmVyIG9uIHNldmVyYWwgRFMgYW5kIFJEQiBwbGF0Zm9ybXMgYW5kIGl0DQo+
ID4gaXMgd29ya2luZyBwcm9wZXJseS4gVGhlIGlzc3VlcyB5b3UgZW5jb3VudGVyIHdpdGggaXQg
b24gdGhlIFg1MDAwLzIwDQo+ID4gYXJlIGxpa2VseSBjYXVzZWQgYnkgc29tZSBpc3N1ZXMgc3Bl
Y2lmaWMgdG8gdGhhdCBwYXJ0aWN1bGFyIHBsYXRmb3JtLg0KPiBJdCBpcyBnb29kIHRvIGhlYXIg
dGhhdCB0aGUgRFBBQSBkcml2ZXIgaXMgZnVuY3Rpb25pbmcgY29ycmVjdGx5DQo+IG9uIHRoZSBy
ZWZlcmVuY2UgcGxhdGZvcm1zLiBJIGFtIHBvc2l0aXZlIHlvdSBhcmUgY29ycmVjdCB0aGF0DQo+
IHRoZSBpc3N1ZSBpcyB0aGUgZGlmZmVyZW5jZSBpbiBpbXBsZW1lbnRhdGlvbiBvbiB0aGUgWDUw
MDAvMjANCj4gKEN5cnVzKSBtb3RoZXJib2FyZCwgYXMgY29tcGFyZWQgdG8gdGhlIHJlZmVyZW5j
ZSBib2FyZHMuDQo+IA0KPiBDYW4geW91IHZlcmlmeSB3aGljaCBMaW51eCBLZXJuZWwgc291cmNl
cyB5b3VyIHRlc3RzIGFyZSBiZWluZw0KPiBwZXJmb3JtZWQgb24/IFdlIGhhdmUgYmVlbiB0ZXN0
aW5nIHVzaW5nIHRoZSBtYWluc3RyZWFtDQo+IExpbnV4IHNvdXJjZXMgdXAgdG8gbGludXgtNC4x
NS1yYzYgdGh1cyBmYXIuDQoNCkxhdGVzdCBydW4gaXMgb24gNC4xNS4wLXJjNy0wMDIwMC1nYzky
YTlhNC4NCg0KPiA+IFRoZSBkZXZpY2UgdHJlZSB0aGF0IHlvdSBtZW50aW9uLCBjeXJ1c19wNTAy
MC5ldGguZHRzIGlzIG5vdCBmb3VuZCBpbg0KPiA+IHRoZSBMaW51eCBrZXJuZWwgc291cmNlcy4g
VGhlIGN5cnVzX3A1MDIwLmR0cyBmaWxlIGZyb20gdGhlIGZzbCBwcGMNCj4gPiBkZXZpY2UgdHJl
ZSBmb2xkZXIgZG9lcyBub3QgaW5jbHVkZSB0aGUgUEhZIGluZm9ybWF0aW9uIGZvciB0aGUgRFBB
QQ0KPiA+IGludGVyZmFjZXMuIFRoZSBwcm9ibGVtcyB0aGF0IHlvdSBleHBlcmllbmNlIG1heSBi
ZSBjYXVzZWQgYnkgc29tZQ0KPiA+IGlzc3VlcyB3aXRoIHRoZSBQSFkgY29uZmlndXJhdGlvbiAo
aS5lLiBpbnRlcm5hbCBkZWxheSkuDQo+IFRoZSBjeXJ1c19wNTAyMC5ldGguZHRzIGlzIGEgbW9k
aWZpZWQgdmVyc2lvbiBvZiB0aGUgY3lydXNfcDUwMjAuZHRzLA0KPiB3aGljaCBvZiBjb3Vyc2Ug
d2FzIGJhc2VkIG9mZiB0aGUgb3JpZ2luYWwgcDUwMjBkcy5kdHMgZmlsZS4gQXMgeW91DQo+IG5v
dGVkLCB0aGUgY3VycmVudCBjeXJ1c19wNTAyMC5kdHMgZmlsZSBpcyBpbmNvbXBsZXRlLCBhbmQg
ZG9lcyBub3QNCj4gbWFwIHRoZSBFdGhlcm5ldCBjb25uZWN0aW9ucyBwcm9wZXJseS4NCj4gDQo+
IFRoZSBjeXJ1c19wNTAyMC5ldGguZHRzIGZpbGUsIGFsb25nIHdpdGggaXQncyBjeXJ1cy1wcmUu
ZHRzaSBkZXBlbmRlbnQNCj4gZmlsZSwgYXJlIGFuIGF0dGVtcHQgdG8gY29ycmVjdGx5IGRlZmlu
ZSB0aGUgRXRoZXJuZXQgaGFyZHdhcmUsIGFzIGl0IGlzDQo+IGltcGxlbWVudGVkIG9uIHRoZSBY
NTAwMC8yMC4NCj4gDQo+ICoqIEkgaGF2ZSBhdHRhY2hlZCBib3RoIHRoZSBjeXJ1c19wNTAyMC5l
dGguZHRzIGFuZCBjeXJ1cy1wcmUuZHRzaQ0KPiAgwqDCoMKgwqAgZmlsZXMgd2l0aCB0aGlzIGVt
YWlsIGZvciBjb21wYXJpc29uLiBQbGVhc2UgbGV0IG1lIGtub3cgaWYgeW91IHNlZQ0KPiAgwqDC
oMKgwqAgYW55IGNvcnJlY3Rpb25zIHRoYXQgc2hvdWxkIGJlIG1hZGUgdG8gZWl0aGVyIGZpbGUu
DQoNCkF0IGEgZmlyc3QgZ2xhbmNlIHRoZXkgbG9vayBmaW5lIHRvIG1lLg0KDQo+IEkgYW0gbm90
IHN1cmUgd2hhdCBQSFkgaGFyZHdhcmUvY29uZmlndXJhdGlvbiB5b3UgYXJlIHVzaW5nIG9uIHRo
ZQ0KPiBEUyBhbmQgUkRCIHBsYXRmb3JtcywgYnV0IEkgY2FuIGNvbmZpcm0gdGhhdCBBbWlnYU9O
RSBYNTAwMC8yMA0KPiAoQ3lydXMgTW90aGVyYm9hcmQgd2l0aCBwNTAyMCBTb0MpLCBoYXMgZFRT
RUMgNCBhbmQgZFRTRUMgNQ0KPiB3aXJlZCB0byB0d28gTWljcmVsIEtTWjkwMjFSTiBHaWdhYml0
IEV0aGVybmV0IFBIWXMsIHVzaW5nIHRoZQ0KPiBSR01JSSBwcm90b2NvbC4NCg0KU2luY2UgaXQn
cyBSR01JSSwgSSB0aGluayB5b3Ugc2hvdWxkIGxvb2sgaW50byBSR01JSSBpbnRlcm5hbCBkZWxh
eQ0KcmVxdWlyZW1lbnRzIGZvciB0aGlzIGJvYXJkLg0KDQo+ID4gICBJIHN1Z2dlc3QNCj4gPiB0
aGF0IHlvdSBjb25uZWN0IHRoZSBEUEFBIGludGVyZmFjZSB0byBhIHRyYWZmaWMgYW5hbHl6ZXIg
b3IgZGlyZWN0bHkNCj4gPiB0byBhbm90aGVyIGRldmljZSBvbiB3aGljaCB5b3UgY2FuIGNhcHR1
cmUgdGhlIGluY29taW5nIHRyYWZmaWMgYW5kDQo+ID4gY2hlY2sgdGhhdCB0aGUgcmVjZWl2ZWQg
ZnJhbWVzIGFyZSBjb3JyZWN0Lg0KPiBJIGhhdmUgc3RhcnRlZCB0ZXN0aW5nIGFsb25nIHRoYXQg
bGluZSwgdXNpbmcgV2lyZXNoYXJrIHRvIHZpZXcgdGhlDQo+IHRyYWZmaWMgb24gdGhlIFg1MDAw
LzIwIGl0c2VsZiwgYW5kIGZyb20gYW5vdGhlciBtYWNoaW5lIGNvbm5lY3RlZA0KPiBvbiB0aGUg
c2FtZSBzdWJuZXQuIFNvIGZhciAoYXMgaW5kaWNhdGVkIGJ5IHNvbWUgZGV0YWlscyBvZiBpbiBt
eQ0KPiBpbml0aWFsIGVtYWlsKSwgSSBjYW4gc2VlIG91dGdvaW5nIGJyb2FkY2FzdCByZXF1ZXN0
cyAoZm9yIERIQ1ApDQo+IGJlaW5nIHNlbnQgb3V0IGZyb20gdGhlIFg1MDAwLzIwLCBhbmQgdGhl
c2UgcmVxdWVzdHMgYXJlIGNvcnJlY3RseQ0KPiBjb25zdHJ1Y3RlZCBhbmQgdmlzaWJsZSBvdXRz
aWRlIHRoZSBYNTAwMC8yMC4NCj4gDQo+IEhvd2V2ZXIsIG5vIHJlc3BvbnNlcyB0byB0aGUgREhD
UCBicm9hZGNhc3RzIGFwcGVhciB0byByZWFjaA0KPiB0byBYNTAwMC8yMCdzIERQQUEgRXRoZXJu
ZXQuIEkgd2lsbCBuZWVkIHRvIHNldHVwIHNvbWUgZnVydGhlcg0KPiB0ZXN0cyB0byBkZXRlcm1p
bmUgaWYgdGhlIERIQ1Agc2VydmVyIHNhdyB0aGUgcmVxdWVzdHMgYW5kIHJlc3BvbmRlZA0KPiB0
byB0aGVtLiAoSSBhc3N1bWUgdGhlIERIQ1Agc2VydmVyIGlzIGdldHRpbmcgdGhlbSwgYW5kIHJl
c3BvbmRpbmcsDQo+IGFzIEkgY2FuIGFsd2F5cyBnZXQgYSBzdWNjZXNzZnVsIERIQ1AgcmVzcG9u
c2UgdG8gdGhlIFg1MDAwLzIwDQo+IHdoZW4gdXNpbmcgYW4gYWRkLW9uIEV0aGVybmV0IFBJQ2Ug
Y2FyZCBvbiB0aGUgc2FtZSBzdWJuZXQpLg0KPiANCj4gSSB3aWxsIHNldHVwIHNvbWUgbW9yZSBk
aXJlY3QgbWFjaGluZS10by1tYWNoaW5lIHRlc3RpbmcgdG8NCj4gc2VlIHdoYXQgZWxzZSBJIGNh
biBnbGVhbiBmcm9tIHRoZSBuZXR3b3JrIHRyYWZmaWMuDQoNClRoYXQgd2lsbCBwcm92aWRlIG1v
cmUgY2xhcml0eSB0byB0aGUgYWN0dWFsIGlzc3VlLg0KDQo+IFBsZWFzZSBoYXZlIGEgbG9vayBh
dCB0aGUgYXR0YWNoZWQgZHRzIGZpbGVzLCBtYXliZSB0aGVyZSBpcyBzb21ldGhpbmcNCj4gb2J2
aW91cyB0aGVyZSB3ZSBhcmUgbm90IHNlZWluZy4NCj4gDQo+IEFsc28sIGdpdmVuIHRoYXQgdGhl
IFg1MDAwLzIwIHVzZXMgTWljcmVsIEtTWjkwMjFSTiBQSFlzIGluIFJHTUlJDQo+IG1vZGUsIHdo
YXQgY2hhbmdlcyB0byB0aGUgRFBBQSBoYXJkd2FyZSBjb25maWd1cmF0aW9uIHNob3VsZCB3ZQ0K
PiBleHBlY3QgdG8gc2VlIHNvIHRoYXQgdGhlIERQQUEgaXMgY29uZmlndXJlZCB0byB0YWxrIHRv
IHRoZW0/DQoNClRoZSBwaHktY29ubmVjdGlvbi10eXBlID0gInJnbWlpIjsgc2hvdWxkIHRha2Ug
Y2FyZSBvZiB0aGF0Lg0KVHJ5IHRvIGNoZWNrIHRoZSBsaW5rIGluZm9ybWF0aW9uIHJlcG9ydGVk
IGJ5IHRoZSBQSFkuDQoNCj4gPiBNYWRhbGluDQo+ID4NCj4gLS0NCj4gDQo+IEJlc3QgUmVnYXJk
cywNCj4gDQo+IEphbWllIEtydWVnZXINCj4gQklUYnlCSVQgU29mdHdhcmUgR3JvdXAgTExDDQo+
IA0KPiA+PiBIZXJlIGlzIHRoZSByZXN1bHRzIGZyb20gbXkgbGF0ZXN0IHRlc3RzLiBUaGV5IHdl
cmUgcGVyZm9ybWVkIHVzaW5nDQo+ID4+IHRoZSBsaW51eC00LjEwLjE3IHBwYzY0LCBzaW5jZSB0
aGF0IHJlcHJlc2VudHMgd2hlbiB0aGUgRFBBQSBFdGhlcm5ldA0KPiA+PiBjb2RlIHdhcyBpbnRy
b2R1Y2VkLg0KPiA+Pg0KPiA+PiBTaW1pbGFyIHRlc3RzLCB3aXRoIHNpbWlsYXIgcmVzdWx0cywg
d2VyZSBhbHNvIHBlcmZvcm1lZA0KPiA+PiB1c2luZyB0aGUgbGF0ZXN0IExpbnV4IGtlcm5lbHM6
DQo+ID4+DQo+ID4+IGxpbnV4LTQuMTUtcmM1DQo+ID4+IGxpbnV4LTQuMTUtcmM2DQo+ID4+IGxp
bnV4LTQuMTUtcmM3DQo+ID4+DQo+ID4+IChIZW5jZSB0aGUgcmVhc29uIGZvciBmYWxsaW5nIGJh
Y2sgdG8gdGVzdCB0aGUga2VybmVsIHJpZ2h0DQo+ID4+ICAgwqBhZnRlciB0aGUgaW50cm9kdWN0
aW9uIG9mIHRoZSBEUEFBIEV0aGVybmV0IGRyaXZlciBzb3VyY2VzKQ0KPiA+Pg0KPiA+PiAtLS0N
Cj4gPj4NCj4gPj4gQWxsIEtlcm5lbCBidWlsZHMgaGFkIHRoZSBEUEFBIEV0aGVybmV0IGVuYWJs
ZWQgaW4gdGhlIGtlcm5lbCwNCj4gPj4gYW5kIGFyZSB1c2luZyB0aGUgY29ycmVjdCBjeXJ1c19w
NTAyMC5ldGguZHRiIGRldmljZSB0cmVlIGZpbGUNCj4gPj4gKGZvciB1c2Ugb24gdGhlIFg1MDAw
LzIwKS4NCj4gPj4NCj4gPj4gVGhlIHJlc3VsdHMgYXJlIHF1aXRlIHNpbWlsYXIgZm9yIGFsbCBr
ZXJuZWxzIGluIHJlZ2FyZHMgdG8gdGhlIERQQUENCj4gPj4gRXRoZXJuZXQuDQo+ID4+DQo+ID4+
IEFsbCB0ZXN0ZWQga2VybmVscyBzZXR1cCB0aGUgdHdvIEV0aGVybmV0IGludGVyZmFjZXMgY29y
cmVjdGx5DQo+ID4+IGFzIGV0aDAgYW5kIGV0aDEsIGFuZCBwdWxsIHRoZSBjb3JyZWN0IE1BQyBh
ZGRyZXNzZXMgZnJvbSBVLUJvb3QNCj4gPj4gZW52aXJvbm1lbnQgdmFyaWFibGVzIGV0aGFkZHIg
YW5kIGV0aDFhZGRyIHJlc3BlY3RpdmVseS4NCj4gPj4NCj4gPj4gU28gYXQgdGhpcyBwb2ludCBM
aW51eCBoYXMgd2hhdCBpdCBiZWxpZXZlcyBpcyBmdWxseSBjb25maWd1cmVkDQo+ID4+IGhhcmR3
YXJlLCB3YWl0aW5nIHRvIGhhdmUgYW4gSVAgQWRkcmVzcy9OZXRtYXNrL0dhdGV3YXkNCj4gPj4g
dG8gYmUgc2V0IGFuZCB0byBicmluZyB0aGUgaW50ZXJmYWNlIG9ubGluZS4NCj4gPj4NCj4gPj4g
SG93ZXZlciwgYWxsIGF0dGVtcHRzIHRvIGNvbW11bmljYXRlIHdpdGggdGhlIG91dHNpZGUgd29y
bGQNCj4gPj4gZG8gbm90IG1ha2UgaXQgb3V0IHRoZSBwaHlzaWNhbCAoUEhZKSBoYXJkd2FyZSAt
IG9yIGRvIHRoZXk/DQo+ID4+DQo+ID4+ICoqIFRoZSBmb2xsb3dpbmcgcmVzdWx0cyB3ZXJlIGNh
cHR1cmVkIHVuZGVyIGxpbnV4LTQuMTAuMTcgKioNCj4gPj4NCj4gPj4gV2hlbiBJIGJyaW5nIHRo
ZSBpbnRlcmZhY2UgdXAgdXNpbmcgYSBzdGF0aWMgYWRkcmVzcywgaW4gdGhpcyBjYXNlDQo+ID4+
IDE5Mi4xNjguMS4yMSwgSSBzZWUgdGhlIGZvbGxvd2luZyAoTk9URSBUWCBieXRlcyBzYXlzIDE1
NC4wIEtCLA0KPiA+PiB3aGlsZSBSWCBieXRlcyBzYXlzIDAuMCBCKToNCj4gPj4NCj4gPj4gamFt
aWVAWDUwMDAtTGludXg6JCBpZmNvbmZpZw0KPiA+PiBldGgwwqDCoMKgwqDCoCBMaW5rIGVuY2Fw
OkV0aGVybmV0wqAgSFdhZGRyIDAwOjgwOjEwOjExOjExOjExDQo+ID4+ICAgwqDCoMKgwqDCoMKg
wqDCoMKgIGluZXQgYWRkcjoxOTIuMTY4LjEuMjHCoCBCY2FzdDoxOTIuMTY4LjEuMjU1DQo+IE1h
c2s6MjU1LjI1NS4yNTUuMA0KPiA+PiAgIMKgwqDCoMKgwqDCoMKgwqDCoCBpbmV0NiBhZGRyOiBm
ZTgwOjoyODA6MTBmZjpmZTExOjExMTEvNjQgU2NvcGU6TGluaw0KPiA+PiAgIMKgwqDCoMKgwqDC
oMKgwqDCoCBVUCBCUk9BRENBU1QgUlVOTklORyBNVUxUSUNBU1TCoCBNVFU6MTUwMMKgIE1ldHJp
YzoxDQo+ID4+ICAgwqDCoMKgwqDCoMKgwqDCoMKgIFJYIHBhY2tldHM6MCBlcnJvcnM6MCBkcm9w
cGVkOjAgb3ZlcnJ1bnM6MCBmcmFtZTowDQo+ID4+ICAgwqDCoMKgwqDCoMKgwqDCoMKgIFRYIHBh
Y2tldHM6MTQyOCBlcnJvcnM6MCBkcm9wcGVkOjAgb3ZlcnJ1bnM6MCBjYXJyaWVyOjANCj4gPj4g
ICDCoMKgwqDCoMKgwqDCoMKgwqAgY29sbGlzaW9uczowIHR4cXVldWVsZW46MTAwMA0KPiA+PiAg
IMKgwqDCoMKgwqDCoMKgwqDCoCBSWCBieXRlczowICgwLjAgQinCoCBUWCBieXRlczoxNTQwNjYg
KDE1NC4wIEtCKQ0KPiA+PiAgIMKgwqDCoMKgwqDCoMKgwqDCoCBNZW1vcnk6ZmU0ZTYwMDAtZmU0
ZTZmZmYNCj4gPj4NCj4gPj4gZXRoMcKgwqDCoMKgwqAgTGluayBlbmNhcDpFdGhlcm5ldMKgIEhX
YWRkciAwMDo4MDoxMDoyMjoyMjoyMg0KPiA+PiAgIMKgwqDCoMKgwqDCoMKgwqDCoCBVUCBCUk9B
RENBU1QgTVVMVElDQVNUwqAgTVRVOjE1MDDCoCBNZXRyaWM6MQ0KPiA+PiAgIMKgwqDCoMKgwqDC
oMKgwqDCoCBSWCBwYWNrZXRzOjAgZXJyb3JzOjAgZHJvcHBlZDowIG92ZXJydW5zOjAgZnJhbWU6
MA0KPiA+PiAgIMKgwqDCoMKgwqDCoMKgwqDCoCBUWCBwYWNrZXRzOjAgZXJyb3JzOjAgZHJvcHBl
ZDowIG92ZXJydW5zOjAgY2FycmllcjowDQo+ID4+ICAgwqDCoMKgwqDCoMKgwqDCoMKgIGNvbGxp
c2lvbnM6MCB0eHF1ZXVlbGVuOjEwMDANCj4gPj4gICDCoMKgwqDCoMKgwqDCoMKgwqAgUlggYnl0
ZXM6MCAoMC4wIEIpwqAgVFggYnl0ZXM6MCAoMC4wIEIpDQo+ID4+ICAgwqDCoMKgwqDCoMKgwqDC
oMKgIE1lbW9yeTpmZTRlODAwMC1mZTRlOGZmZg0KPiA+Pg0KPiA+PiBsb8KgwqDCoMKgwqDCoMKg
IExpbmsgZW5jYXA6TG9jYWwgTG9vcGJhY2sNCj4gPj4gICDCoMKgwqDCoMKgwqDCoMKgwqAgaW5l
dCBhZGRyOjEyNy4wLjAuMcKgIE1hc2s6MjU1LjAuMC4wDQo+ID4+ICAgwqDCoMKgwqDCoMKgwqDC
oMKgIGluZXQ2IGFkZHI6IDo6MS8xMjggU2NvcGU6SG9zdA0KPiA+PiAgIMKgwqDCoMKgwqDCoMKg
wqDCoCBVUCBMT09QQkFDSyBSVU5OSU5HwqAgTVRVOjY1NTM2wqAgTWV0cmljOjENCj4gPj4gICDC
oMKgwqDCoMKgwqDCoMKgwqAgUlggcGFja2V0czoxODY5IGVycm9yczowIGRyb3BwZWQ6MCBvdmVy
cnVuczowIGZyYW1lOjANCj4gPj4gICDCoMKgwqDCoMKgwqDCoMKgwqAgVFggcGFja2V0czoxODY5
IGVycm9yczowIGRyb3BwZWQ6MCBvdmVycnVuczowIGNhcnJpZXI6MA0KPiA+PiAgIMKgwqDCoMKg
wqDCoMKgwqDCoCBjb2xsaXNpb25zOjAgdHhxdWV1ZWxlbjoxMDAwDQo+ID4+ICAgwqDCoMKgwqDC
oMKgwqDCoMKgIFJYIGJ5dGVzOjE1NjkzMiAoMTU2LjkgS0IpwqAgVFggYnl0ZXM6MTU2OTMyICgx
NTYuOSBLQikNCj4gPj4NCj4gPj4gQ2hlY2tpbmcgdGhlIHJvdXRpbmcgdGFibGUsIGV2ZXJ5dGhp
bmcgbG9va3MgZmluZSB0aGVyZToNCj4gPj4NCj4gPj4gamFtaWVAWDUwMDAtTGludXg6JCBuZXRz
dGF0IC1yDQo+ID4+IEtlcm5lbCBJUCByb3V0aW5nIHRhYmxlDQo+ID4+IERlc3RpbmF0aW9uwqDC
oMKgwqAgR2F0ZXdhecKgwqDCoMKgwqDCoMKgwqAgR2VubWFza8KgwqDCoMKgwqDCoMKgwqAgRmxh
Z3PCoMKgIE1TUw0KPiBXaW5kb3fCoCBpcnR0DQo+ID4+IElmYWNlDQo+ID4+IGRlZmF1bHTCoMKg
wqDCoMKgwqDCoMKgIDE5Mi4xNjguMS4xwqDCoMKgwqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKgwqAg
VUfCoMKgwqDCoMKgwqDCoCAwDQo+IDDCoMKgwqDCoMKgwqDCoMKgwqAgMA0KPiA+PiBldGgwDQo+
ID4+IGxpbmstbG9jYWzCoMKgwqDCoMKgICrCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDI1
NS4yNTUuMC4wwqDCoMKgwqAgVcKgwqDCoMKgwqDCoMKgwqAgMA0KPiAwwqDCoMKgwqDCoMKgwqDC
oMKgIDANCj4gPj4gZXRoMA0KPiA+PiAxOTIuMTY4LjEuMMKgwqDCoMKgICrCoMKgwqDCoMKgwqDC
oMKgwqDCoMKgwqDCoMKgIDI1NS4yNTUuMjU1LjDCoMKgIFXCoMKgwqDCoMKgwqDCoMKgIDANCj4g
MMKgwqDCoMKgwqDCoMKgwqDCoCAwDQo+ID4+IGV0aDANCj4gPj4NCj4gPj4gQXR0ZW1wdGluZyB0
byBQSU5HIHRoZSBpbnRlcmZhY2UgaXRzZWxmIHdvcmtzOg0KPiA+Pg0KPiA+PiBqYW1pZUBYNTAw
MC1MaW51eDokIHBpbmcgMTkyLjE2OC4xLjIxDQo+ID4+IFBJTkcgMTkyLjE2OC4xLjIxICgxOTIu
MTY4LjEuMjEpIDU2KDg0KSBieXRlcyBvZiBkYXRhLg0KPiA+PiA2NCBieXRlcyBmcm9tIDE5Mi4x
NjguMS4yMTogaWNtcF9zZXE9MSB0dGw9NjQgdGltZT0wLjAzNyBtcw0KPiA+PiA2NCBieXRlcyBm
cm9tIDE5Mi4xNjguMS4yMTogaWNtcF9zZXE9MiB0dGw9NjQgdGltZT0wLjA0NSBtcw0KPiA+PiA2
NCBieXRlcyBmcm9tIDE5Mi4xNjguMS4yMTogaWNtcF9zZXE9MyB0dGw9NjQgdGltZT0wLjAzMyBt
cw0KPiA+PiBeQw0KPiA+PiAtLS0gMTkyLjE2OC4xLjIxIHBpbmcgc3RhdGlzdGljcyAtLS0NCj4g
Pj4gMyBwYWNrZXRzIHRyYW5zbWl0dGVkLCAzIHJlY2VpdmVkLCAwJSBwYWNrZXQgbG9zcywgdGlt
ZSAyMDQzbXMNCj4gPj4NCj4gPj4gSG93ZXZlciwgYXR0ZW1wdHMgdG8gUElORyB0aGUgZ2F0ZXdh
eSAoMTkyLjE2OC4xLjEpIGZhaWwgYXMNCj4gdW5yZWFjaGFibGU6DQo+ID4+DQo+ID4+IGphbWll
QFg1MDAwLUxpbnV4OiQgcGluZyAxOTIuMTY4LjEuMQ0KPiA+PiBQSU5HIDE5Mi4xNjguMS4xICgx
OTIuMTY4LjEuMSkgNTYoODQpIGJ5dGVzIG9mIGRhdGEuDQo+ID4+ICAgRnJvbSAxOTIuMTY4LjEu
MjEgaWNtcF9zZXE9MSBEZXN0aW5hdGlvbiBIb3N0IFVucmVhY2hhYmxlDQo+ID4+ICAgRnJvbSAx
OTIuMTY4LjEuMjEgaWNtcF9zZXE9MiBEZXN0aW5hdGlvbiBIb3N0IFVucmVhY2hhYmxlDQo+ID4+
ICAgRnJvbSAxOTIuMTY4LjEuMjEgaWNtcF9zZXE9MyBEZXN0aW5hdGlvbiBIb3N0IFVucmVhY2hh
YmxlDQo+ID4+IF5DDQo+ID4+IC0tLSAxOTIuMTY4LjEuMSBwaW5nIHN0YXRpc3RpY3MgLS0tDQo+
ID4+IDcgcGFja2V0cyB0cmFuc21pdHRlZCwgMCByZWNlaXZlZCwgKzMgZXJyb3JzLCAxMDAlIHBh
Y2tldCBsb3NzLCB0aW1lDQo+ID4+IDYwNzdtcw0KPiA+Pg0KPiA+PiBJbiBvcmRlciB0byB0YWtl
IGEgY2xvc2VyIGxvb2sgYXQgd2hhdCBpcyBnb2luZyBvbiBJIGluc3RhbGxlZA0KPiBXaXJlc2hh
cmsNCj4gPj4gYm90aCBvbiBteSB0ZXN0IFg1MDAwLzIwIExpbnV4IGluc3RhbGwgKFVidW50dSAx
Ni4wNC4zIExUUyksIGFuZCBvbg0KPiA+PiBhbm90aGVyIExpbnV4IGJveCBjb25uZWN0ZWQgdG8g
dGhlIHNhbWUgbmV0d29yayBzd2l0Y2ggKGluIHRoaXMgY2FzZQ0KPiA+PiBhdCBJUCBhZGRyZXNz
IDE5Mi4xNjguMS4yMTApDQo+ID4+DQo+ID4+IEluIHRoaXMgdGVzdCBJIHN0YXJ0IHRoZSBjYXB0
dXJlIG9uIGV0aDAgKFg1MDAwLzIwKSBiZWZvcmUgaXQgaXMgcHV0DQo+ID4+IG9ubGluZSwNCj4g
Pj4gYW5kIGF0dGVtcHQgdG8gYnJpbmcgaXQgdXAgdXNpbmcgREhDUCB0byBvYnRhaW4gaXQncyBh
ZGRyZXNzLg0KPiA+Pg0KPiA+PiBXaGF0IEkgZm91bmQgd2FzIHRoYXQgbmV0d29yayB0cmFmZmlj
ICp3YXMqIGJlaW5nIGF0dGVtcHRlZCBvdmVyIGV0aDAuDQo+ID4+IEhlcmUgaXMgYSBwbGFpbiB0
ZXh0IGV4cG9ydCBvZiB0aGUgdHJhbnNtaXQgc2lkZSAodGhlIFg1MDAwLzIwKSB0aGF0DQo+ID4+
IHdhcyBjYXB0dXJlZCB1c2luZyBXaXJlc2hhcmsuDQo+ID4+DQo+ID4+IChUaGVyZSB3ZXJlIG1v
cmUgbmV0d29yayBwYWNrZXRzIGJlaW5nIHNlbnQgZnJvbSB0aGUgWDUwMDAvMjAsDQo+ID4+ICAg
wqBob3dldmVyLCBJIGFtIG9ubHkgc2hvd2luZyBESENQIHRyYWZmaWMgdG8gc2F2ZSBzcGFjZSBp
biB0aGlzIHBvc3QpOg0KPiA+Pg0KPiA+PiAtLS0NCj4gPj4gTm8uwqDCoMKgwqAgVGltZcKgwqDC
oMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBEZXN0
aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5mbw0KPiA+PiAgIMKgwqDCoMKgwqAg
MiAwLjA0MjI1OTg0M8KgwqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAy
NTUuMjU1LjI1NS4yNTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5z
YWN0aW9uIElEIDB4NjU1ZDkxZTgNCj4gPj4NCj4gPj4gRnJhbWUgMjogMzQyIGJ5dGVzIG9uIHdp
cmUgKDI3MzYgYml0cyksIDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNiBiaXRzKQ0KPiA+PiBvbiBp
bnRlcmZhY2UgMA0KPiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6
ODA6MTA6MTE6MTE6MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYp
DQo+ID4+IEludGVybmV0IFByb3RvY29sIFZlcnNpb24gNCwgU3JjOiAwLjAuMC4wLCBEc3Q6IDI1
NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERhdGFncmFtIFByb3RvY29sLCBTcmMgUG9ydDogNjgs
IERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3RyYXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0KPiA+Pg0K
PiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAgU291cmNlwqDCoMKgwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9uIFByb3RvY29sDQo+IExlbmd0aA0KPiA+
PiBJbmZvDQo+ID4+ICAgwqDCoMKgwqAgMTYgMy44MzAwMDExNTLCoMKgwqAgMC4wLjAuMMKgwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDC
oMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDY1NWQ5MWU4DQo+ID4+DQo+ID4+
IEZyYW1lIDE2OiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNhcHR1
cmVkICgyNzM2IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0IElJLCBT
cmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERzdDogQnJvYWRjYXN0
DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gSW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lv
biA0LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdy
YW0gUHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQ
cm90b2NvbCAoRGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKg
wqDCoMKgwqDCoCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgRGVzdGluYXRp
b24gUHJvdG9jb2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDCoMKgwqDCoCAyMSA5LjMw
ODkxNDUzM8KgwqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1
LjI1NS4yNTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9u
IElEIDB4NjU1ZDkxZTgNCj4gPj4NCj4gPj4gRnJhbWUgMjE6IDM0MiBieXRlcyBvbiB3aXJlICgy
NzM2IGJpdHMpLCAzNDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYgYml0cykNCj4gPj4gb24gaW50ZXJm
YWNlIDANCj4gPj4gRXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEw
OjExOjExOjExKSwgRHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+
PiBJbnRlcm5ldCBQcm90b2NvbCBWZXJzaW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0OiAyNTUuMjU1
LjI1NS4yNTUNCj4gPj4gVXNlciBEYXRhZ3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6IDY4LCBEc3Qg
UG9ydDogNjcNCj4gPj4gQm9vdHN0cmFwIFByb3RvY29sIChEaXNjb3ZlcikNCj4gPj4NCj4gPj4g
Tm8uwqDCoMKgwqAgVGltZcKgwqDCoMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqDCoCBEZXN0aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5m
bw0KPiA+PiAgIMKgwqDCoMKgIDIzIDE4LjkwNjQwNTM0M8KgwqAgMC4wLjAuMMKgwqDCoMKgwqDC
oMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERI
Q1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDY1NWQ5MWU4DQo+ID4+DQo+ID4+IEZyYW1l
IDIzOiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNhcHR1cmVkICgy
NzM2IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0IElJLCBTcmM6IENv
bW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERzdDogQnJvYWRjYXN0DQo+ID4+
IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gSW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lvbiA0LCBT
cmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdyYW0gUHJv
dG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQcm90b2Nv
bCAoRGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKgwqDCoMKg
wqDCoCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgRGVzdGluYXRpb24gUHJv
dG9jb2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDCoMKgwqDCoCAyNSAzNi4zOTA5MjY0
NTDCoMKgIDAuMC4wLjDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDI1NS4yNTUuMjU1LjI1
NSBESENQDQo+ID4+IDM0MsKgwqDCoCBESENQIERpc2NvdmVyIC0gVHJhbnNhY3Rpb24gSUQgMHg2
NTVkOTFlOA0KPiA+Pg0KPiA+PiBGcmFtZSAyNTogMzQyIGJ5dGVzIG9uIHdpcmUgKDI3MzYgYml0
cyksIDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNiBiaXRzKQ0KPiA+PiBvbiBpbnRlcmZhY2UgMA0K
PiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6
MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+IEludGVy
bmV0IFByb3RvY29sIFZlcnNpb24gNCwgU3JjOiAwLjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1
NQ0KPiA+PiBVc2VyIERhdGFncmFtIFByb3RvY29sLCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2
Nw0KPiA+PiBCb290c3RyYXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0KPiA+Pg0KPiA+PiBOby7CoMKg
wqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAgU291cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDC
oMKgwqDCoMKgIERlc3RpbmF0aW9uIFByb3RvY29sDQo+IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+
ICAgwqDCoMKgwqAgMjYgNDQuMDQ4MzI4NDEywqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoCAyNTUuMjU1LjI1NS4yNTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhDUCBEaXNj
b3ZlciAtIFRyYW5zYWN0aW9uIElEIDB4NjU1ZDkxZTgNCj4gPj4NCj4gPj4gRnJhbWUgMjY6IDM0
MiBieXRlcyBvbiB3aXJlICgyNzM2IGJpdHMpLCAzNDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYgYml0
cykNCj4gPj4gb24gaW50ZXJmYWNlIDANCj4gPj4gRXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3Jf
MTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKSwgRHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZm
OmZmOmZmOmZmOmZmKQ0KPiA+PiBJbnRlcm5ldCBQcm90b2NvbCBWZXJzaW9uIDQsIFNyYzogMC4w
LjAuMCwgRHN0OiAyNTUuMjU1LjI1NS4yNTUNCj4gPj4gVXNlciBEYXRhZ3JhbSBQcm90b2NvbCwg
U3JjIFBvcnQ6IDY4LCBEc3QgUG9ydDogNjcNCj4gPj4gQm9vdHN0cmFwIFByb3RvY29sIChEaXNj
b3ZlcikNCj4gPj4NCj4gPj4gTm8uwqDCoMKgwqAgVGltZcKgwqDCoMKgwqDCoMKgwqDCoMKgIFNv
dXJjZcKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBEZXN0aW5hdGlvbiBQcm90b2NvbA0K
PiBMZW5ndGgNCj4gPj4gSW5mbw0KPiA+PiAgIMKgwqDCoMKgIDMwIDQ0Ljg4OTA0OTIwM8KgwqAg
MC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1AN
Cj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDQyMWJhZGUz
DQo+ID4+DQo+ID4+IEZyYW1lIDMwOiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQy
IGJ5dGVzIGNhcHR1cmVkICgyNzM2IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0
aGVybmV0IElJLCBTcmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERz
dDogQnJvYWRjYXN0DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gSW50ZXJuZXQgUHJv
dG9jb2wgVmVyc2lvbiA0LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+
IFVzZXIgRGF0YWdyYW0gUHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+
IEJvb3RzdHJhcCBQcm90b2NvbCAoRGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKgIFRp
bWXCoMKgwqDCoMKgwqDCoMKgwqDCoCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg
wqAgRGVzdGluYXRpb24gUHJvdG9jb2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDCoMKg
wqDCoCA0NCA0OC4yNTQ0OTUzMDTCoMKgIDAuMC4wLjDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC
oMKgIDI1NS4yNTUuMjU1LjI1NSBESENQDQo+ID4+IDM0MsKgwqDCoCBESENQIERpc2NvdmVyIC0g
VHJhbnNhY3Rpb24gSUQgMHg0MjFiYWRlMw0KPiA+Pg0KPiA+PiBGcmFtZSA0NDogMzQyIGJ5dGVz
IG9uIHdpcmUgKDI3MzYgYml0cyksIDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNiBiaXRzKQ0KPiA+
PiBvbiBpbnRlcmZhY2UgMA0KPiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8xMToxMTox
MSAoMDA6ODA6MTA6MTE6MTE6MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6ZmY6ZmY6
ZmY6ZmYpDQo+ID4+IEludGVybmV0IFByb3RvY29sIFZlcnNpb24gNCwgU3JjOiAwLjAuMC4wLCBE
c3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERhdGFncmFtIFByb3RvY29sLCBTcmMgUG9y
dDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3RyYXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0K
PiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAgU291cmNlwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9uIFByb3RvY29sDQo+IExlbmd0
aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoMKgwqAgNDkgNTQuMjk5MDUyNzMywqDCoCAwLjAuMC4w
wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1LjI1NS4yNTUgREhDUA0KPiA+PiAz
NDLCoMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9uIElEIDB4NDIxYmFkZTMNCj4gPj4N
Cj4gPj4gRnJhbWUgNDk6IDM0MiBieXRlcyBvbiB3aXJlICgyNzM2IGJpdHMpLCAzNDIgYnl0ZXMg
Y2FwdHVyZWQgKDI3MzYgYml0cykNCj4gPj4gb24gaW50ZXJmYWNlIDANCj4gPj4gRXRoZXJuZXQg
SUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKSwgRHN0OiBCcm9h
ZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiBJbnRlcm5ldCBQcm90b2NvbCBW
ZXJzaW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0OiAyNTUuMjU1LjI1NS4yNTUNCj4gPj4gVXNlciBE
YXRhZ3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6IDY4LCBEc3QgUG9ydDogNjcNCj4gPj4gQm9vdHN0
cmFwIFByb3RvY29sIChEaXNjb3ZlcikNCj4gPj4NCj4gPj4gTm8uwqDCoMKgwqAgVGltZcKgwqDC
oMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBEZXN0
aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5mbw0KPiA+PiAgIMKgwqDCoMKgIDUx
IDYyLjY3MjAwNzQ4MsKgwqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1
LjI1NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2Fj
dGlvbiBJRCAweDQyMWJhZGUzDQo+ID4+DQo+ID4+IEZyYW1lIDUxOiAzNDIgYnl0ZXMgb24gd2ly
ZSAoMjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNhcHR1cmVkICgyNzM2IGJpdHMpDQo+ID4+IG9uIGlu
dGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0IElJLCBTcmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4
MDoxMDoxMToxMToxMSksIERzdDogQnJvYWRjYXN0DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikN
Cj4gPj4gSW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lvbiA0LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1
LjI1NS4yNTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdyYW0gUHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwg
RHN0IFBvcnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQcm90b2NvbCAoRGlzY292ZXIpDQo+ID4+DQo+
ID4+IE5vLsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKgwqDCoMKgwqDCoCBTb3VyY2XCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqDCoMKgwqAgRGVzdGluYXRpb24gUHJvdG9jb2wNCj4gTGVuZ3RoDQo+ID4+
IEluZm8NCj4gPj4gICDCoMKgwqDCoCA1MiA3Ny40ODU4OTYyMDLCoMKgIDAuMC4wLjDCoMKgwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgIDI1NS4yNTUuMjU1LjI1NSBESENQDQo+ID4+IDM0MsKgwqDC
oCBESENQIERpc2NvdmVyIC0gVHJhbnNhY3Rpb24gSUQgMHg0MjFiYWRlMw0KPiA+Pg0KPiA+PiBG
cmFtZSA1MjogMzQyIGJ5dGVzIG9uIHdpcmUgKDI3MzYgYml0cyksIDM0MiBieXRlcyBjYXB0dXJl
ZCAoMjczNiBiaXRzKQ0KPiA+PiBvbiBpbnRlcmZhY2UgMA0KPiA+PiBFdGhlcm5ldCBJSSwgU3Jj
OiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6MTEpLCBEc3Q6IEJyb2FkY2FzdA0K
PiA+PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+IEludGVybmV0IFByb3RvY29sIFZlcnNpb24g
NCwgU3JjOiAwLjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERhdGFncmFt
IFByb3RvY29sLCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3RyYXAgUHJv
dG9jb2wgKERpc2NvdmVyKQ0KPiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKg
wqDCoMKgwqAgU291cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9u
IFByb3RvY29sDQo+IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoMKgwqAgNTYgODkuODk1
MzA0MTUywqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1LjI1
NS4yNTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9uIElE
IDB4NWRmNDdjODQNCj4gPj4NCj4gPj4gRnJhbWUgNTY6IDM0MiBieXRlcyBvbiB3aXJlICgyNzM2
IGJpdHMpLCAzNDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYgYml0cykNCj4gPj4gb24gaW50ZXJmYWNl
IDANCj4gPj4gRXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjEx
OjExOjExKSwgRHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiBJ
bnRlcm5ldCBQcm90b2NvbCBWZXJzaW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0OiAyNTUuMjU1LjI1
NS4yNTUNCj4gPj4gVXNlciBEYXRhZ3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6IDY4LCBEc3QgUG9y
dDogNjcNCj4gPj4gQm9vdHN0cmFwIFByb3RvY29sIChEaXNjb3ZlcikNCj4gPj4NCj4gPj4gTm8u
wqDCoMKgwqAgVGltZcKgwqDCoMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKgwqDC
oMKgwqDCoMKgwqDCoCBEZXN0aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5mbw0K
PiA+PiAgIMKgwqDCoMKgIDcxIDkzLjgyODgzNzAwOMKgwqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERIQ1Ag
RGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDVkZjQ3Yzg0DQo+ID4+DQo+ID4+IEZyYW1lIDcx
OiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNhcHR1cmVkICgyNzM2
IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0IElJLCBTcmM6IENvbW1v
ZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERzdDogQnJvYWRjYXN0DQo+ID4+IChm
ZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gSW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lvbiA0LCBTcmM6
IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdyYW0gUHJvdG9j
b2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQcm90b2NvbCAo
RGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKgwqDCoMKgwqDC
oCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgRGVzdGluYXRpb24gUHJvdG9j
b2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDCoMKgwqDCoCA3NCA5Ny45NDg0NTMxNTjC
oMKgIDAuMC4wLjDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDI1NS4yNTUuMjU1LjI1NSBE
SENQDQo+ID4+IDM0MsKgwqDCoCBESENQIERpc2NvdmVyIC0gVHJhbnNhY3Rpb24gSUQgMHg1ZGY0
N2M4NA0KPiA+Pg0KPiA+PiBGcmFtZSA3NDogMzQyIGJ5dGVzIG9uIHdpcmUgKDI3MzYgYml0cyks
IDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNiBiaXRzKQ0KPiA+PiBvbiBpbnRlcmZhY2UgMA0KPiA+
PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6MTEp
LCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+IEludGVybmV0
IFByb3RvY29sIFZlcnNpb24gNCwgU3JjOiAwLjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1NQ0K
PiA+PiBVc2VyIERhdGFncmFtIFByb3RvY29sLCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2Nw0K
PiA+PiBCb290c3RyYXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0KPiA+PiAtLS0NCj4gPj4NCj4gPj4g
Tm93LCBvdmVyIG9uIHRoZSBleHRlcm5hbCBMaW51eCBtYWNoaW5lICgxOTIuMTY4LjEuMjEwKSwg
SSBzZXR1cCBhDQo+ID4+IFdpcmVzaGFyayBjYXB0dXJlDQo+ID4+IHdoaWNoIGZpbHRlcmVkIGZv
ciBhbnkgdHJhZmZpYyB0by9mcm9tIHRoZSBNQUMgYWRkcmVzcyBvZiB0aGUNCj4gWDUwMDAvMjAn
cw0KPiA+PiBldGgwLCBpbiB0aGlzIGNhc2UNCj4gPj4gc2hvd24gYXMgQ29tbW9kb3JfMTE6MTE6
MTEgKDAwOjgwOjEwOjExOjExOjExKSBiZWxvdzoNCj4gPj4NCj4gPj4gVGhpcyBleHBvcnQgc2hv
d3Mgb25seSB0aGUgREhDUCB0cmFmZmljIHNlZW4gZnJvbSBvdXRzaWRlIHRoZSBYNTAwMC8yMCwN
Cj4gPj4gYW5kIGFzIHlvdSBjYW4gc2VlLCBhIG1hdGNoaW5nIHNldCBvZiBESENQIHJlcXVlc3Rz
ICpkbyBpbiBmYWN0KiBtYWtlDQo+ID4+IGl0IHRvIHRoZSBvdXRzaWRlIG5ldHdvcmsuDQo+ID4+
DQo+ID4+IC0tLQ0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAgU291
cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9uIFByb3RvY29sDQo+
IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoMKgwqAgMzkgNS42NzE3NjI1MDnCoMKgwqAg
MC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1AN
Cj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDY1NWQ5MWU4
DQo+ID4+DQo+ID4+IEZyYW1lIDM5OiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQy
IGJ5dGVzIGNhcHR1cmVkICgyNzM2IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0
aGVybmV0IElJLCBTcmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERz
dDogQnJvYWRjYXN0DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gICDCoMKgwqAgRGVz
dGluYXRpb246IEJyb2FkY2FzdCAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAgwqDCoMKgIFNv
dXJjZTogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKQ0KPiA+PiAgIMKgwqDC
oCBUeXBlOiBJUHY0ICgweDA4MDApDQo+ID4+IEludGVybmV0IFByb3RvY29sIFZlcnNpb24gNCwg
U3JjOiAwLjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERhdGFncmFtIFBy
b3RvY29sLCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3RyYXAgUHJvdG9j
b2wgKERpc2NvdmVyKQ0KPiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDC
oMKgwqAgU291cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9uIFBy
b3RvY29sDQo+IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoMKgwqAgNzMgOS40NTE4OTU0
MDTCoMKgwqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUu
MjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAw
eDY1NWQ5MWU4DQo+ID4+DQo+ID4+IEZyYW1lIDczOiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBi
aXRzKSwgMzQyIGJ5dGVzIGNhcHR1cmVkICgyNzM2IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAw
DQo+ID4+IEV0aGVybmV0IElJLCBTcmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMTox
MToxMSksIERzdDogQnJvYWRjYXN0DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gICDC
oMKgwqAgRGVzdGluYXRpb246IEJyb2FkY2FzdCAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAg
wqDCoMKgIFNvdXJjZTogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKQ0KPiA+
PiAgIMKgwqDCoCBUeXBlOiBJUHY0ICgweDA4MDApDQo+ID4+IEludGVybmV0IFByb3RvY29sIFZl
cnNpb24gNCwgU3JjOiAwLjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERh
dGFncmFtIFByb3RvY29sLCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3Ry
YXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0KPiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKg
wqDCoMKgwqDCoMKgwqAgU291cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3Rp
bmF0aW9uIFByb3RvY29sDQo+IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoMKgIDE1NCAx
NC45MTk5NDQ0ODDCoMKgIDAuMC4wLjDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDI1NS4y
NTUuMjU1LjI1NSBESENQDQo+ID4+IDM0MsKgwqDCoCBESENQIERpc2NvdmVyIC0gVHJhbnNhY3Rp
b24gSUQgMHg2NTVkOTFlOA0KPiA+Pg0KPiA+PiBGcmFtZSAxNTQ6IDM0MiBieXRlcyBvbiB3aXJl
ICgyNzM2IGJpdHMpLCAzNDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYNCj4gYml0cykNCj4gPj4gb24g
aW50ZXJmYWNlIDANCj4gPj4gRXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAw
OjgwOjEwOjExOjExOjExKSwgRHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZm
KQ0KPiA+PiAgIMKgwqDCoCBEZXN0aW5hdGlvbjogQnJvYWRjYXN0IChmZjpmZjpmZjpmZjpmZjpm
ZikNCj4gPj4gICDCoMKgwqAgU291cmNlOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6
MTE6MTEpDQo+ID4+ICAgwqDCoMKgIFR5cGU6IElQdjQgKDB4MDgwMCkNCj4gPj4gSW50ZXJuZXQg
UHJvdG9jb2wgVmVyc2lvbiA0LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+
ID4+IFVzZXIgRGF0YWdyYW0gUHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+
ID4+IEJvb3RzdHJhcCBQcm90b2NvbCAoRGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKg
IFRpbWXCoMKgwqDCoMKgwqDCoMKgwqDCoCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC
oMKgwqAgRGVzdGluYXRpb24gUHJvdG9jb2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDC
oMKgwqAgMjY5IDI0LjQ5ODMzNTk5NsKgwqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC
oMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIg
LSBUcmFuc2FjdGlvbiBJRCAweDY1NWQ5MWU4DQo+ID4+DQo+ID4+IEZyYW1lIDI2OTogMzQyIGJ5
dGVzIG9uIHdpcmUgKDI3MzYgYml0cyksIDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNg0KPiBiaXRz
KQ0KPiA+PiBvbiBpbnRlcmZhY2UgMA0KPiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8x
MToxMToxMSAoMDA6ODA6MTA6MTE6MTE6MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6
ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAgwqDCoMKgIERlc3RpbmF0aW9uOiBCcm9hZGNhc3QgKGZmOmZm
OmZmOmZmOmZmOmZmKQ0KPiA+PiAgIMKgwqDCoCBTb3VyY2U6IENvbW1vZG9yXzExOjExOjExICgw
MDo4MDoxMDoxMToxMToxMSkNCj4gPj4gICDCoMKgwqAgVHlwZTogSVB2NCAoMHgwODAwKQ0KPiA+
PiBJbnRlcm5ldCBQcm90b2NvbCBWZXJzaW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0OiAyNTUuMjU1
LjI1NS4yNTUNCj4gPj4gVXNlciBEYXRhZ3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6IDY4LCBEc3Qg
UG9ydDogNjcNCj4gPj4gQm9vdHN0cmFwIFByb3RvY29sIChEaXNjb3ZlcikNCj4gPj4NCj4gPj4g
Tm8uwqDCoMKgwqAgVGltZcKgwqDCoMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqDCoCBEZXN0aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5m
bw0KPiA+PiAgIMKgwqDCoCA2MzAgNDEuOTQ4MDE4NjQ4wqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1LjI1NS4yNTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhD
UCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9uIElEIDB4NjU1ZDkxZTgNCj4gPj4NCj4gPj4gRnJhbWUg
NjMwOiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNhcHR1cmVkICgy
NzM2DQo+IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0IElJLCBTcmM6
IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERzdDogQnJvYWRjYXN0DQo+
ID4+IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gICDCoMKgwqAgRGVzdGluYXRpb246IEJyb2Fk
Y2FzdCAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAgwqDCoMKgIFNvdXJjZTogQ29tbW9kb3Jf
MTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKQ0KPiA+PiAgIMKgwqDCoCBUeXBlOiBJUHY0ICgw
eDA4MDApDQo+ID4+IEludGVybmV0IFByb3RvY29sIFZlcnNpb24gNCwgU3JjOiAwLjAuMC4wLCBE
c3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERhdGFncmFtIFByb3RvY29sLCBTcmMgUG9y
dDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3RyYXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0K
PiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAgU291cmNlwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9uIFByb3RvY29sDQo+IExlbmd0
aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoMKgIDcwMSA0OS41OTAyMTEyNjTCoMKgIDAuMC4wLjDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDI1NS4yNTUuMjU1LjI1NSBESENQDQo+ID4+IDM0
MsKgwqDCoCBESENQIERpc2NvdmVyIC0gVHJhbnNhY3Rpb24gSUQgMHg2NTVkOTFlOA0KPiA+Pg0K
PiA+PiBGcmFtZSA3MDE6IDM0MiBieXRlcyBvbiB3aXJlICgyNzM2IGJpdHMpLCAzNDIgYnl0ZXMg
Y2FwdHVyZWQgKDI3MzYNCj4gYml0cykNCj4gPj4gb24gaW50ZXJmYWNlIDANCj4gPj4gRXRoZXJu
ZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKSwgRHN0OiBC
cm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiAgIMKgwqDCoCBEZXN0aW5h
dGlvbjogQnJvYWRjYXN0IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gICDCoMKgwqAgU291cmNl
OiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6MTEpDQo+ID4+ICAgwqDCoMKgIFR5
cGU6IElQdjQgKDB4MDgwMCkNCj4gPj4gSW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lvbiA0LCBTcmM6
IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdyYW0gUHJvdG9j
b2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQcm90b2NvbCAo
RGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKgwqDCoMKgwqDC
oCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgRGVzdGluYXRpb24gUHJvdG9j
b2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDCoMKgwqAgNzA2IDUwLjQyOTI2NTkzOMKg
wqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERI
Q1ANCj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDQyMWJh
ZGUzDQo+ID4+DQo+ID4+IEZyYW1lIDcwNjogMzQyIGJ5dGVzIG9uIHdpcmUgKDI3MzYgYml0cyks
IDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNg0KPiBiaXRzKQ0KPiA+PiBvbiBpbnRlcmZhY2UgMA0K
PiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6
MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAgwqDC
oMKgIERlc3RpbmF0aW9uOiBCcm9hZGNhc3QgKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiAgIMKg
wqDCoCBTb3VyY2U6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSkNCj4gPj4g
ICDCoMKgwqAgVHlwZTogSVB2NCAoMHgwODAwKQ0KPiA+PiBJbnRlcm5ldCBQcm90b2NvbCBWZXJz
aW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0OiAyNTUuMjU1LjI1NS4yNTUNCj4gPj4gVXNlciBEYXRh
Z3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6IDY4LCBEc3QgUG9ydDogNjcNCj4gPj4gQm9vdHN0cmFw
IFByb3RvY29sIChEaXNjb3ZlcikNCj4gPj4NCj4gPj4gTm8uwqDCoMKgwqAgVGltZcKgwqDCoMKg
wqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBEZXN0aW5h
dGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5mbw0KPiA+PiAgIMKgwqDCoCA3NDQgNTMu
Nzg4MDM1MzE3wqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1
LjI1NS4yNTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9u
IElEIDB4NDIxYmFkZTMNCj4gPj4NCj4gPj4gRnJhbWUgNzQ0OiAzNDIgYnl0ZXMgb24gd2lyZSAo
MjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNhcHR1cmVkICgyNzM2DQo+IGJpdHMpDQo+ID4+IG9uIGlu
dGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0IElJLCBTcmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4
MDoxMDoxMToxMToxMSksIERzdDogQnJvYWRjYXN0DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikN
Cj4gPj4gICDCoMKgwqAgRGVzdGluYXRpb246IEJyb2FkY2FzdCAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYp
DQo+ID4+ICAgwqDCoMKgIFNvdXJjZTogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjEx
OjExKQ0KPiA+PiAgIMKgwqDCoCBUeXBlOiBJUHY0ICgweDA4MDApDQo+ID4+IEludGVybmV0IFBy
b3RvY29sIFZlcnNpb24gNCwgU3JjOiAwLjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+
PiBVc2VyIERhdGFncmFtIFByb3RvY29sLCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+
PiBCb290c3RyYXAgUHJvdG9jb2wgKERpc2NvdmVyKQ0KPiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBU
aW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAgU291cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC
oMKgIERlc3RpbmF0aW9uIFByb3RvY29sDQo+IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDC
oMKgIDc5NyA1OS44MjA1Njg2MTTCoMKgIDAuMC4wLjDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC
oMKgIDI1NS4yNTUuMjU1LjI1NSBESENQDQo+ID4+IDM0MsKgwqDCoCBESENQIERpc2NvdmVyIC0g
VHJhbnNhY3Rpb24gSUQgMHg0MjFiYWRlMw0KPiA+Pg0KPiA+PiBGcmFtZSA3OTc6IDM0MiBieXRl
cyBvbiB3aXJlICgyNzM2IGJpdHMpLCAzNDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYNCj4gYml0cykN
Cj4gPj4gb24gaW50ZXJmYWNlIDANCj4gPj4gRXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6
MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKSwgRHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZm
OmZmOmZmOmZmKQ0KPiA+PiAgIMKgwqDCoCBEZXN0aW5hdGlvbjogQnJvYWRjYXN0IChmZjpmZjpm
ZjpmZjpmZjpmZikNCj4gPj4gICDCoMKgwqAgU291cmNlOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6
ODA6MTA6MTE6MTE6MTEpDQo+ID4+ICAgwqDCoMKgIFR5cGU6IElQdjQgKDB4MDgwMCkNCj4gPj4g
SW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lvbiA0LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4y
NTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdyYW0gUHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBv
cnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQcm90b2NvbCAoRGlzY292ZXIpDQo+ID4+DQo+ID4+IE5v
LsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKgwqDCoMKgwqDCoCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqAgRGVzdGluYXRpb24gUHJvdG9jb2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8N
Cj4gPj4gICDCoMKgwqAgODUyIDY4LjE3NjgzMzY4NsKgwqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKg
wqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERIQ1Ag
RGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDQyMWJhZGUzDQo+ID4+DQo+ID4+IEZyYW1lIDg1
MjogMzQyIGJ5dGVzIG9uIHdpcmUgKDI3MzYgYml0cyksIDM0MiBieXRlcyBjYXB0dXJlZCAoMjcz
Ng0KPiBiaXRzKQ0KPiA+PiBvbiBpbnRlcmZhY2UgMA0KPiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBD
b21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+
PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAgwqDCoMKgIERlc3RpbmF0aW9uOiBCcm9hZGNh
c3QgKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiAgIMKgwqDCoCBTb3VyY2U6IENvbW1vZG9yXzEx
OjExOjExICgwMDo4MDoxMDoxMToxMToxMSkNCj4gPj4gICDCoMKgwqAgVHlwZTogSVB2NCAoMHgw
ODAwKQ0KPiA+PiBJbnRlcm5ldCBQcm90b2NvbCBWZXJzaW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0
OiAyNTUuMjU1LjI1NS4yNTUNCj4gPj4gVXNlciBEYXRhZ3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6
IDY4LCBEc3QgUG9ydDogNjcNCj4gPj4gQm9vdHN0cmFwIFByb3RvY29sIChEaXNjb3ZlcikNCj4g
Pj4NCj4gPj4gTm8uwqDCoMKgwqAgVGltZcKgwqDCoMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBEZXN0aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgN
Cj4gPj4gSW5mbw0KPiA+PiAgIMKgwqDCoCA5OTAgODIuOTYxMjI0ODk1wqDCoCAwLjAuMC4wwqDC
oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1LjI1NS4yNTUgREhDUA0KPiA+PiAzNDLC
oMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9uIElEIDB4NDIxYmFkZTMNCj4gPj4NCj4g
Pj4gRnJhbWUgOTkwOiAzNDIgYnl0ZXMgb24gd2lyZSAoMjczNiBiaXRzKSwgMzQyIGJ5dGVzIGNh
cHR1cmVkICgyNzM2DQo+IGJpdHMpDQo+ID4+IG9uIGludGVyZmFjZSAwDQo+ID4+IEV0aGVybmV0
IElJLCBTcmM6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSksIERzdDogQnJv
YWRjYXN0DQo+ID4+IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gICDCoMKgwqAgRGVzdGluYXRp
b246IEJyb2FkY2FzdCAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAgwqDCoMKgIFNvdXJjZTog
Q29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKQ0KPiA+PiAgIMKgwqDCoCBUeXBl
OiBJUHY0ICgweDA4MDApDQo+ID4+IEludGVybmV0IFByb3RvY29sIFZlcnNpb24gNCwgU3JjOiAw
LjAuMC4wLCBEc3Q6IDI1NS4yNTUuMjU1LjI1NQ0KPiA+PiBVc2VyIERhdGFncmFtIFByb3RvY29s
LCBTcmMgUG9ydDogNjgsIERzdCBQb3J0OiA2Nw0KPiA+PiBCb290c3RyYXAgUHJvdG9jb2wgKERp
c2NvdmVyKQ0KPiA+Pg0KPiA+PiBOby7CoMKgwqDCoCBUaW1lwqDCoMKgwqDCoMKgwqDCoMKgwqAg
U291cmNlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIERlc3RpbmF0aW9uIFByb3RvY29s
DQo+IExlbmd0aA0KPiA+PiBJbmZvDQo+ID4+ICAgwqDCoCAzODI3IDk1LjM0NTk2NDQxOMKgwqAg
MC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1NS4yNTUuMjU1IERIQ1AN
Cj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlvbiBJRCAweDVkZjQ3Yzg0
DQo+ID4+DQo+ID4+IEZyYW1lIDM4Mjc6IDM0MiBieXRlcyBvbiB3aXJlICgyNzM2IGJpdHMpLCAz
NDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYNCj4gPj4gYml0cykgb24gaW50ZXJmYWNlIDANCj4gPj4g
RXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgwOjEwOjExOjExOjExKSwg
RHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiAgIMKgwqDCoCBE
ZXN0aW5hdGlvbjogQnJvYWRjYXN0IChmZjpmZjpmZjpmZjpmZjpmZikNCj4gPj4gICDCoMKgwqAg
U291cmNlOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6MTEpDQo+ID4+ICAgwqDC
oMKgIFR5cGU6IElQdjQgKDB4MDgwMCkNCj4gPj4gSW50ZXJuZXQgUHJvdG9jb2wgVmVyc2lvbiA0
LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+IFVzZXIgRGF0YWdyYW0g
UHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+IEJvb3RzdHJhcCBQcm90
b2NvbCAoRGlzY292ZXIpDQo+ID4+DQo+ID4+IE5vLsKgwqDCoMKgIFRpbWXCoMKgwqDCoMKgwqDC
oMKgwqDCoCBTb3VyY2XCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgRGVzdGluYXRpb24g
UHJvdG9jb2wNCj4gTGVuZ3RoDQo+ID4+IEluZm8NCj4gPj4gICDCoMKgIDM4ODcgOTkuMjcxNjY4
NTcywqDCoCAwLjAuMC4wwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAyNTUuMjU1LjI1NS4y
NTUgREhDUA0KPiA+PiAzNDLCoMKgwqAgREhDUCBEaXNjb3ZlciAtIFRyYW5zYWN0aW9uIElEIDB4
NWRmNDdjODQNCj4gPj4NCj4gPj4gRnJhbWUgMzg4NzogMzQyIGJ5dGVzIG9uIHdpcmUgKDI3MzYg
Yml0cyksIDM0MiBieXRlcyBjYXB0dXJlZCAoMjczNg0KPiA+PiBiaXRzKSBvbiBpbnRlcmZhY2Ug
MA0KPiA+PiBFdGhlcm5ldCBJSSwgU3JjOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6
MTE6MTEpLCBEc3Q6IEJyb2FkY2FzdA0KPiA+PiAoZmY6ZmY6ZmY6ZmY6ZmY6ZmYpDQo+ID4+ICAg
wqDCoMKgIERlc3RpbmF0aW9uOiBCcm9hZGNhc3QgKGZmOmZmOmZmOmZmOmZmOmZmKQ0KPiA+PiAg
IMKgwqDCoCBTb3VyY2U6IENvbW1vZG9yXzExOjExOjExICgwMDo4MDoxMDoxMToxMToxMSkNCj4g
Pj4gICDCoMKgwqAgVHlwZTogSVB2NCAoMHgwODAwKQ0KPiA+PiBJbnRlcm5ldCBQcm90b2NvbCBW
ZXJzaW9uIDQsIFNyYzogMC4wLjAuMCwgRHN0OiAyNTUuMjU1LjI1NS4yNTUNCj4gPj4gVXNlciBE
YXRhZ3JhbSBQcm90b2NvbCwgU3JjIFBvcnQ6IDY4LCBEc3QgUG9ydDogNjcNCj4gPj4gQm9vdHN0
cmFwIFByb3RvY29sIChEaXNjb3ZlcikNCj4gPj4NCj4gPj4gTm8uwqDCoMKgwqAgVGltZcKgwqDC
oMKgwqDCoMKgwqDCoMKgIFNvdXJjZcKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBEZXN0
aW5hdGlvbiBQcm90b2NvbA0KPiBMZW5ndGgNCj4gPj4gSW5mbw0KPiA+PiAgIMKgwqAgMzk0MyAx
MDMuMzgzMDcyNDI5wqAgMC4wLjAuMMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgMjU1LjI1
NS4yNTUuMjU1IERIQ1ANCj4gPj4gMzQywqDCoMKgIERIQ1AgRGlzY292ZXIgLSBUcmFuc2FjdGlv
biBJRCAweDVkZjQ3Yzg0DQo+ID4+DQo+ID4+IEZyYW1lIDM5NDM6IDM0MiBieXRlcyBvbiB3aXJl
ICgyNzM2IGJpdHMpLCAzNDIgYnl0ZXMgY2FwdHVyZWQgKDI3MzYNCj4gPj4gYml0cykgb24gaW50
ZXJmYWNlIDANCj4gPj4gRXRoZXJuZXQgSUksIFNyYzogQ29tbW9kb3JfMTE6MTE6MTEgKDAwOjgw
OjEwOjExOjExOjExKSwgRHN0OiBCcm9hZGNhc3QNCj4gPj4gKGZmOmZmOmZmOmZmOmZmOmZmKQ0K
PiA+PiAgIMKgwqDCoCBEZXN0aW5hdGlvbjogQnJvYWRjYXN0IChmZjpmZjpmZjpmZjpmZjpmZikN
Cj4gPj4gICDCoMKgwqAgU291cmNlOiBDb21tb2Rvcl8xMToxMToxMSAoMDA6ODA6MTA6MTE6MTE6
MTEpDQo+ID4+ICAgwqDCoMKgIFR5cGU6IElQdjQgKDB4MDgwMCkNCj4gPj4gSW50ZXJuZXQgUHJv
dG9jb2wgVmVyc2lvbiA0LCBTcmM6IDAuMC4wLjAsIERzdDogMjU1LjI1NS4yNTUuMjU1DQo+ID4+
IFVzZXIgRGF0YWdyYW0gUHJvdG9jb2wsIFNyYyBQb3J0OiA2OCwgRHN0IFBvcnQ6IDY3DQo+ID4+
IEJvb3RzdHJhcCBQcm90b2NvbCAoRGlzY292ZXIpDQo+ID4+IC0tLQ0KPiA+Pg0KPiA+PiBUaGUg
b2RkIHRoaW5nIGhlcmUgaXMgdGhhdCB3aGlsZSB0aGUgREhDUCByZXF1ZXN0cyB3ZXJlIGJyb2Fk
Y2FzdCB0bw0KPiB0aGUNCj4gPj4gb3V0c2lkZSBuZXR3b3JrIChjb25maXJtaW5nIHRoYXQgYXQg
bGVhc3QgdGhlIHRyYW5zbWl0IHRvIHRoZSBQSFkgaXMNCj4gPj4gd29ya2luZyksDQo+ID4+IEkg
Y291bGQgc2VlIG5vIHJlc3BvbnNlcyBmcm9tIG15IG5ldHdvcmsncyBESENQIHNlcnZlciB0byBh
bnN3ZXIgdGhlc2UNCj4gPj4gcmVxdWVzdHMuDQo+ID4+DQo+ID4+IEl0IGlzIG5vdCBhIHBoeXNp
Y2FsIG5ldHdvcmtpbmcgb3Igcm91dGluZyBpc3N1ZSwgYXMgSSBhbHdheXMgZ2V0IGENCj4gPj4g
c3VjY2Vzc2Z1bA0KPiA+PiBESENQIHJlc3BvbnNlIHRvIHRoZSBYNTAwMC8yMCB3aGVuIEkgZW5h
YmxlIHRoZSBSZWFsdGVrIDgxNjkgaW50ZXJmYWNlDQo+ID4+IChhbHNvDQo+ID4+IGluc3RhbGxl
ZCBbUENJZSBjYXJkXSBpbiB0aGUgWDUwMDAvMjApLg0KPiA+Pg0KPiA+PiBTaW5jZSBpbml0aWFs
IG91dGdvaW5nIHRyYWZmaWMgKmFwcGVhcnMqIHRvIGJlIHdvcmtpbmcgZnJvbSB0aGUgRFBBQQ0K
PiA+PiBFdGhlcm5ldA0KPiA+PiBvbiB0aGUgWDUwMDAvMjAsIGlzIGl0IHBvc3NpYmxlIHdlIGFy
ZSBtaXNzaW5nIGFuIGludGVycnVwdCBtYXBwaW5nDQo+IGZyb20NCj4gPj4gdGhlDQo+ID4+IEZy
YW1lIE1hbmFnZXIgdG8gY2F0Y2ggdGhlIHJlY2VpdmVkIGRhdGE/DQo+ID4+DQo+ID4+IEFueSBo
ZWxwIHdvdWxkIGJlIGFwcHJlY2lhdGVkLiBUaGFua3MuDQo+ID4+DQo+ID4+IC0tDQo+ID4+IEJl
c3QgUmVnYXJkcywNCj4gPj4NCj4gPj4gSmFtaWUgS3J1ZWdlcg0KPiA+PiBCSVRieUJJVCBTb2Z0
d2FyZSBHcm91cCBMTEMNCg0K
^ permalink raw reply
* Re: powerpc/xmon: Don't print hashed pointers in paca dump
From: Michael Ellerman @ 2018-01-15 10:16 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev
In-Reply-To: <20180110141946.20127-1-mpe@ellerman.id.au>
On Wed, 2018-01-10 at 14:19:46 UTC, Michael Ellerman wrote:
> Remember when the biggest problem we had to worry about was hashed
> pointers, those were the days.
>
> These were missed in my earlier patch because they don't match "%p",
> but the macro is hiding a "%p", so these all end up being hashed,
> which is not what we want in xmon. Convert them to "%px".
>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Applied to powerpc fixes.
https://git.kernel.org/powerpc/c/2248fade965a5f1ba2a8e6e63f84df
cheers
^ permalink raw reply
* Re: powerpc/xmon: Add RFI flush related fields to paca dump
From: Michael Ellerman @ 2018-01-15 10:16 UTC (permalink / raw)
To: Michael Ellerman, linuxppc-dev
In-Reply-To: <20180110132856.12446-1-mpe@ellerman.id.au>
On Wed, 2018-01-10 at 13:28:56 UTC, Michael Ellerman wrote:
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Applied to powerpc fixes.
https://git.kernel.org/powerpc/c/274920a3ecd5f43af0cc380bc0a9ee
cheers
^ permalink raw reply
* Re: [1/3] powerpc: Don't preempt_disable() in show_cpuinfo()
From: Michael Ellerman @ 2018-01-15 10:16 UTC (permalink / raw)
To: Benjamin Herrenschmidt, linuxppc-dev
In-Reply-To: <20180110061014.29181-1-benh@kernel.crashing.org>
On Wed, 2018-01-10 at 06:10:12 UTC, Benjamin Herrenschmidt wrote:
> This causes warnings from cpufreq mutex code. This is also
> rather unnecessary and ineffective. If we really want to
> prevent concurrent unplug, we could take the unplug read
> lock but I don't see this being critical.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/349524bc0da698ec77f2057cf4a494
cheers
^ permalink raw reply
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