* Re: [1/2] powerpc/mm/keys: Move pte bits to correct headers
From: Michael Ellerman @ 2018-03-31 14:03 UTC (permalink / raw)
To: Aneesh Kumar K.V, benh, paulus, linuxram; +Cc: linuxppc-dev, Aneesh Kumar K.V
In-Reply-To: <20180307133645.29290-1-aneesh.kumar@linux.vnet.ibm.com>
On Wed, 2018-03-07 at 13:36:44 UTC, "Aneesh Kumar K.V" wrote:
> Memory keys are supported only with hash translation mode. Instead of #ifdef in
> generic code move the key related pte bits to respective headers
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/1a2f778970c81273c121be160fb661
cheers
^ permalink raw reply
* Re: [01/14] powerpc/64s: do not allocate lppaca if we are not virtualized
From: Michael Ellerman @ 2018-03-31 14:03 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20180213150824.27689-2-npiggin@gmail.com>
On Tue, 2018-02-13 at 15:08:11 UTC, Nicholas Piggin wrote:
> The "lppaca" is a structure registered with the hypervisor. This
> is unnecessary when running on non-virtualised platforms. One field
> from the lppaca (pmcregs_in_use) is also used by the host, so move
> the host part out into the paca (lppaca field is still updated in
> guest mode).
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/8e0b634b132752ec3eba50afb95250
cheers
^ permalink raw reply
* Re: [v3, 1/4] powerpc: wii: Explicitly configure GPIO owner for poweroff pin
From: Michael Ellerman @ 2018-03-31 14:03 UTC (permalink / raw)
To: Jonathan Neuschäfer, linux-kernel
Cc: devicetree, Jonathan Neuschäfer, linux-gpio, Paul Mackerras,
Joel Stanley, linuxppc-dev
In-Reply-To: <20180209120732.17863-2-j.neuschaefer@gmx.net>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1000 bytes --]
On Fri, 2018-02-09 at 12:07:28 UTC, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= wrote:
> The Hollywood chipset's GPIO controller has two sets of registers: One
> for access by the PowerPC CPU, and one for access by the ARM coprocessor
> (but both are accessible from the PPC because the memory firewall
> (AHBPROT) is usually disabled when booting Linux, today).
>
> The wii_power_off function currently assumes that the poweroff GPIO pin
> is configured for use via the ARM side, but the upcoming GPIO driver
> configures all pins for use via the PPC side, breaking poweroff.
>
> Configure the owner register explicitly in wii_power_off to make
> wii_power_off work with and without the new GPIO driver.
>
> I think the Wii can be switched to the generic gpio-poweroff driver,
> after the GPIO driver is merged.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Patches 1, 3 and 4 applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/9cbaaec1cf0c9f4861c4c1dd65f3ed
cheers
^ permalink raw reply
* Re: powerpc: wii: Probe the whole devicetree
From: Michael Ellerman @ 2018-03-31 14:03 UTC (permalink / raw)
To: Jonathan Neuschäfer, linuxppc-dev
Cc: linux-kernel, Jonathan Neuschäfer, Paul Mackerras,
Joel Stanley
In-Reply-To: <20180206123707.13715-1-j.neuschaefer@gmx.net>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 558 bytes --]
On Tue, 2018-02-06 at 12:37:04 UTC, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= wrote:
> Previously, wii_device_probe would only initialize devices under the
> /hollywood node. After this patch, platform devices placed outside of
> /hollywood will also be initialized.
>
> The intended usecase for this are devices located outside of the
> Hollywood chip, such as GPIO LEDs and GPIO buttons.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/7ab96c0a083f3a298ae595ea142058
cheers
^ permalink raw reply
* Re: powerpc/kprobes: Fix call trace due to incorrect preempt count
From: Michael Ellerman @ 2018-03-31 14:03 UTC (permalink / raw)
To: Naveen N. Rao; +Cc: linuxppc-dev
In-Reply-To: <20180117122224.19860-1-naveen.n.rao@linux.vnet.ibm.com>
On Wed, 2018-01-17 at 12:22:24 UTC, "Naveen N. Rao" wrote:
> Michael Ellerman reported the following call trace when running
> ftracetest:
>
> BUG: using __this_cpu_write() in preemptible [00000000] code: ftracetest/6178
> caller is opt_pre_handler+0xc4/0x110
> CPU: 1 PID: 6178 Comm: ftracetest Not tainted 4.15.0-rc7-gcc6x-gb2cd1df #1
> Call Trace:
> [c0000000f9ec39c0] [c000000000ac4304] dump_stack+0xb4/0x100 (unreliable)
> [c0000000f9ec3a00] [c00000000061159c] check_preemption_disabled+0x15c/0x170
> [c0000000f9ec3a90] [c000000000217e84] opt_pre_handler+0xc4/0x110
> [c0000000f9ec3af0] [c00000000004cf68] optimized_callback+0x148/0x170
> [c0000000f9ec3b40] [c00000000004d954] optinsn_slot+0xec/0x10000
> [c0000000f9ec3e30] [c00000000004bae0] kretprobe_trampoline+0x0/0x10
>
> This is showing up since OPTPROBES is now enabled with CONFIG_PREEMPT.
>
> trampoline_probe_handler() considers itself to be a special kprobe
> handler for kretprobes. In doing so, it expects to be called from
> kprobe_handler() on a trap, and re-enables preemption before returning a
> non-zero return value so as to suppress any subsequent processing of the
> trap by the kprobe_handler().
>
> However, with optprobes, we don't deal with special handlers (we ignore
> the return code) and just try to re-enable preemption causing the above
> trace.
>
> To address this, modify trampoline_probe_handler() to not be special.
> The only additional processing done in kprobe_handler() is to emulate
> the instruction (in this case, a 'nop'). We adjust the value of
> regs->nip for the purpose and delegate the job of re-enabling
> preemption and resetting current kprobe to the probe handlers
> (kprobe_handler() or optimized_callback()).
>
> Reported-by: Michael Ellerman <mpe@ellerman.id.au>
> Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
> Acked-by: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/e6e133c47e6bd4d5dac05b35d06634
cheers
^ permalink raw reply
* [PATCH] powerpc/mpic: Check if cpu_possible() in mpic_physmask()
From: Michael Ellerman @ 2018-03-31 14:00 UTC (permalink / raw)
To: linuxppc-dev; +Cc: npiggin
In mpic_physmask() we loop over all CPUs up to 32, then get the hard
SMP processor id of that CPU.
Currently that's possibly walking off the end of the paca array, but
in a future patch we will change the paca array to be an array of
pointers, and in that case we will get a NULL for missing CPUs and
oops. eg:
Unable to handle kernel paging request for data at address 0x88888888888888b8
Faulting instruction address: 0xc00000000004e380
Oops: Kernel access of bad area, sig: 11 [#1]
...
NIP .mpic_set_affinity+0x60/0x1a0
LR .irq_do_set_affinity+0x48/0x100
Fix it by checking the CPU is possible, this also fixes the code if
there are gaps in the CPU numbering which probably never happens on
mpic systems but who knows.
Debugged-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/sysdev/mpic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 73067805300a..1d4e0ef658d3 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -626,7 +626,7 @@ static inline u32 mpic_physmask(u32 cpumask)
int i;
u32 mask = 0;
- for (i = 0; i < min(32, NR_CPUS); ++i, cpumask >>= 1)
+ for (i = 0; i < min(32, NR_CPUS) && cpu_possible(i); ++i, cpumask >>= 1)
mask |= (cpumask & 1) << get_hard_smp_processor_id(i);
return mask;
}
--
2.14.1
^ permalink raw reply related
* [PATCH] powerpc/64e: Fix oops due to deferral of paca allocation
From: Michael Ellerman @ 2018-03-31 11:51 UTC (permalink / raw)
To: linuxppc-dev; +Cc: npiggin
On 64-bit Book3E systems, in setup_tlb_core_data() we reference other
CPUs pacas. But in commit 59f577743d71 ("powerpc/64: Defer paca
allocation until memory topology is discovered") the allocation of
non-boot-CPU pacas was deferred until later in boot.
This leads to an oops:
CPU maps initialized for 1 thread per core
Unable to handle kernel paging request for data at address 0x8888888888888918
Faulting instruction address: 0xc000000000e2f0d0
Oops: Kernel access of bad area, sig: 11 [#1]
NIP .setup_tlb_core_data+0xdc/0x160
Call Trace:
.setup_tlb_core_data+0x5c/0x160 (unreliable)
.setup_arch+0x80/0x348
.start_kernel+0x7c/0x598
start_here_common+0x1c/0x40
Luckily setup_tlb_core_data() is called immediately prior to
smp_setup_pacas(). So simply switching their order is sufficient to
fix the oops and seems unlikely to have any other unwanted side
effects.
Fixes: 59f577743d71 ("powerpc/64: Defer paca allocation until memory topology is discovered")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/kernel/setup-common.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 56f7a2b793e0..0af5c11b9e78 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -915,9 +915,6 @@ void __init setup_arch(char **cmdline_p)
/* Parse memory topology */
mem_topology_setup();
- /* On BookE, setup per-core TLB data structures. */
- setup_tlb_core_data();
-
/*
* Release secondary cpus out of their spinloops at 0x60 now that
* we can map physical -> logical CPU ids.
@@ -927,6 +924,10 @@ void __init setup_arch(char **cmdline_p)
*/
#ifdef CONFIG_SMP
smp_setup_pacas();
+
+ /* On BookE, setup per-core TLB data structures. */
+ setup_tlb_core_data();
+
smp_release_cpus();
#endif
--
2.14.1
^ permalink raw reply related
* Re: [PATCH 3/3] powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead
From: Michael Ellerman @ 2018-03-31 11:46 UTC (permalink / raw)
To: Nicholas Piggin, linuxppc-dev; +Cc: Gautham R . Shenoy, Nicholas Piggin
In-Reply-To: <20171117140807.22105-4-npiggin@gmail.com>
Nicholas Piggin <npiggin@gmail.com> writes:
> When stop is executed with EC=ESL=0, it appears to execute like a
> normal instruction (resuming from NIP when woken by interrupt). So all
> the save/restore handling can be avoided completely. In particular NV
> GPRs do not have to be saved, and MSR does not have to be switched
> back to kernel MSR.
>
> So move the test for EC=ESL=0 sleep states out to power9_idle_stop,
> and return directly to the caller after stop in that case. The mtspr
> to PSSCR is moved to the top of power9_offline_stop just so it matches
> power9_idle_stop.
>
> This improves performance for ping-pong benchmark with the stop0_lite
> idle state by 2.54% for 2 threads in the same core, and 2.57% for
> different cores.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/kernel/idle_book3s.S | 43 +++++++++++------------------------
> arch/powerpc/platforms/powernv/idle.c | 7 +++++-
> 2 files changed, 19 insertions(+), 31 deletions(-)
>
> diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
> index 07a306173c5a..6243da99b26c 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -324,31 +324,8 @@ enter_winkle:
> /*
> * r3 - PSSCR value corresponding to the requested stop state.
> */
> -power_enter_stop:
> -/*
> - * Check if we are executing the lite variant with ESL=EC=0
> - */
> - andis. r4,r3,PSSCR_EC_ESL_MASK_SHIFTED
> +power_enter_stop_esl:
> clrldi r3,r3,60 /* r3 = Bits[60:63] = Requested Level (RL) */
> - bne .Lhandle_esl_ec_set
> - PPC_STOP
> - li r3,0 /* Since we didn't lose state, return 0 */
Sorry this clashed with Paul's force-SMT4 patches which I needed to
merge to enable TM workarounds.
Can you rebase?
cheers
^ permalink raw reply
* Re: [PATCH] powerpc/boot: Remove duplicate typedefs from libfdt_env.h
From: Mark Greer @ 2018-03-31 2:42 UTC (permalink / raw)
To: Oliver
Cc: Mark Greer, Christophe LEROY, Benjamin Herrenschmidt,
Paul Mackerras, Michael Ellerman, linuxppc-dev, David Gibson
In-Reply-To: <20180330022652.GB20304@animalcreek.com>
On Thu, Mar 29, 2018 at 07:26:52PM -0700, Mark Greer wrote:
> On Thu, Mar 29, 2018 at 07:22:50PM -0700, Mark Greer wrote:
> > On Tue, Mar 20, 2018 at 10:55:07AM +1100, Oliver wrote:
>
> > > Yeah that's pretty odd. It might be a bug in your specific version of
> > > GCC since I can't replicate it with this dumb test case:
> > >
> > > #include <stdio.h>
> > > typedef unsigned int u32;
> > >
> > > typedef u32 uint32_t;
> > > typedef u32 uint32_t;
> > >
> > > int main(void) {
> > > uint32_t test = 0;
> > > printf("%u\n", test);
> > > return 0;
> > > }
> > >
> > > Does that result in an error?
> >
> > Hi Oliver. I'm very sorry for the long delay in responding.
> >
> > This fail to compile too:
> >
> > $ cat test.c
> > #include <stdio.h>
> > typedef unsigned int u32;
> >
> > typedef u32 uint32_t;
> > typedef u32 uint32_t;
> >
> > int main(void) {
> > uint32_t test = 0;
> > printf("%u\n", test);
> > return 0;
> > }
> > $
> > $ powerpc-linux-gnu-gcc -o test test.c
> > test.c:5:13: error: redefinition of typedef 'uint32_t'
> > test.c:4:13: note: previous declaration of 'uint32_t' was here
>
> And I meant to add:
>
> $ powerpc-linux-gnu-gcc --version
> powerpc-linux-gnu-gcc (Sourcery G++ Lite 2010.09-55) 4.5.1
> Copyright (C) 2010 Free Software Foundation, Inc.
> This is free software; see the source for copying conditions. There is NO
> warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
>
> So, yeah, its really old.
>
> I'll get a newer one and test it.
I downloaded this version from denx.de (thank you, Wolfgang):
$ powerpc-linux-gcc --version
powerpc-linux-gcc (GCC) 4.8.2
Copyright (C) 2013 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Its still dated but its the best prebuilt version that I could find easily
available. With this version, the kernel (ppc6xx_defconfig) built without
issue.
Thanks to all who helped me through this.
To Ben or whoever, I think the original patch is still worth applying even
if it isn't critical.
Thanks,
Mark
--
^ permalink raw reply
* Re: [PATCH] PCI/IOV: Add missing prototype for powerpc specific
From: Bjorn Helgaas @ 2018-03-30 22:42 UTC (permalink / raw)
To: Mathieu Malaterre
Cc: Bjorn Helgaas, Wei Yang, linux-pci, linux-kernel, linuxppc-dev
In-Reply-To: <20180322203355.26448-1-malat@debian.org>
On Thu, Mar 22, 2018 at 09:33:55PM +0100, Mathieu Malaterre wrote:
> Some prototypes for weak functions were missing for powerpc specific
> functions. Add the missing prototypes to the CONFIG_PCI_IOV block. This
> fixes the following three warnings treated as error when using W=1:
>
> arch/powerpc/kernel/pci-common.c:236:17: error: no previous prototype for ‘pcibios_default_alignment’ [-Werror=missing-prototypes]
> arch/powerpc/kernel/pci-common.c:253:5: error: no previous prototype for ‘pcibios_sriov_enable’ [-Werror=missing-prototypes]
> arch/powerpc/kernel/pci-common.c:261:5: error: no previous prototype for ‘pcibios_sriov_disable’ [-Werror=missing-prototypes]
>
> Also in commit 978d2d683123 ("PCI: Add pcibios_iov_resource_alignment()
> interface") a new function was added but the prototype was located in the
> main header instead of the CONFIG_PCI_IOV specific section. Move this
> function next to the newly added ones.
>
> Signed-off-by: Mathieu Malaterre <malat@debian.org>
Applied to pci/virtualization for v4.17, thanks!
> ---
> include/linux/pci.h | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 024a1beda008..f43b43b9b643 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -1295,7 +1295,6 @@ unsigned char pci_bus_max_busnr(struct pci_bus *bus);
> void pci_setup_bridge(struct pci_bus *bus);
> resource_size_t pcibios_window_alignment(struct pci_bus *bus,
> unsigned long type);
> -resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
>
> #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
> #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
> @@ -1923,6 +1922,7 @@ void pcibios_release_device(struct pci_dev *dev);
> void pcibios_penalize_isa_irq(int irq, int active);
> int pcibios_alloc_irq(struct pci_dev *dev);
> void pcibios_free_irq(struct pci_dev *dev);
> +resource_size_t pcibios_default_alignment(void);
>
> #ifdef CONFIG_HIBERNATE_CALLBACKS
> extern struct dev_pm_ops pcibios_pm_ops;
> @@ -1955,6 +1955,11 @@ int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
> int pci_sriov_get_totalvfs(struct pci_dev *dev);
> resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno);
> void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool probe);
> +
> +/* Arch may override these (weak) */
> +int pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs);
> +int pcibios_sriov_disable(struct pci_dev *pdev);
> +resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
> #else
> static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
> {
> --
> 2.11.0
>
^ permalink raw reply
* Re: [PATCH v2] crypto: talitos - fix IPsec cipher in length
From: Herbert Xu @ 2018-03-30 17:42 UTC (permalink / raw)
To: Christophe Leroy
Cc: David S. Miller, horia.geanta, linux-crypto, linux-kernel,
linuxppc-dev
In-Reply-To: <20180322095701.4563E6F352@po15720vm.idsi0.si.c-s.fr>
On Thu, Mar 22, 2018 at 10:57:01AM +0100, Christophe Leroy wrote:
> For SEC 2.x+, cipher in length must contain only the ciphertext length.
> In case of using hardware ICV checking, the ICV length is provided via
> the "extent" field of the descriptor pointer.
>
> Cc: <stable@vger.kernel.org> # 4.8+
> Fixes: 549bd8bc5987 ("crypto: talitos - Implement AEAD for SEC1 using HMAC_SNOOP_NO_AFEU")
> Reported-by: Horia Geantă <horia.geanta@nxp.com>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply
* [PATCH 2/2] powerpc/pseries: Restore default security feature flags on setup
From: Mauricio Faria de Oliveira @ 2018-03-30 17:28 UTC (permalink / raw)
To: mpe, linuxppc-dev
In-Reply-To: <1522430905-32131-1-git-send-email-mauricfo@linux.vnet.ibm.com>
After migration the security feature flags might have changed (e.g.,
destination system with unpatched firmware), but some flags are not
set/clear again in init_cpu_char_feature_flags() because it assumes
the security flags to be the defaults.
Additionally, if the H_GET_CPU_CHARACTERISTICS hypercall fails then
init_cpu_char_feature_flags() does not run again, which potentially
might leave the system in an insecure or sub-optimal configuration.
So, just restore the security feature flags to the defaults assumed
by init_cpu_char_feature_flags() so it can set/clear them correctly,
and to ensure safe settings are in place in case the hypercall fail.
Fixes: f636c14790ea ("powerpc/pseries: Set or clear security feature flags")
Signed-off-by: Mauricio Faria de Oliveira <mauricfo@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/setup.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index b11564f..2581fc8 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -462,6 +462,10 @@ static void __init find_and_init_phbs(void)
static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
{
+ /*
+ * The features below are disabled by default, so we instead look to see
+ * if firmware has *enabled* them, and set them if so.
+ */
if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
@@ -501,6 +505,13 @@ void pseries_setup_rfi_flush(void)
bool enable;
long rc;
+ /*
+ * Set features to the defaults assumed by init_cpu_char_feature_flags()
+ * so it can set/clear again any features that might have changed after
+ * migration, and in case the hypercall fails and it is not even called.
+ */
+ powerpc_security_features = SEC_FTR_DEFAULT;
+
rc = plpar_get_cpu_characteristics(&result);
if (rc == H_SUCCESS)
init_cpu_char_feature_flags(&result);
--
1.8.3.1
^ permalink raw reply related
* [PATCH 1/2] powerpc: Move default security feature flags
From: Mauricio Faria de Oliveira @ 2018-03-30 17:28 UTC (permalink / raw)
To: mpe, linuxppc-dev
This moves the definition of the default security feature flags
(i.e., enabled by default) closer to the security feature flags.
This can be used to restore current flags to the default flags.
Signed-off-by: Mauricio Faria de Oliveira <mauricfo@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/security_features.h | 8 ++++++++
arch/powerpc/kernel/security.c | 7 +------
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/security_features.h b/arch/powerpc/include/asm/security_features.h
index 400a905..fa4d2e1 100644
--- a/arch/powerpc/include/asm/security_features.h
+++ b/arch/powerpc/include/asm/security_features.h
@@ -63,4 +63,12 @@ static inline bool security_ftr_enabled(unsigned long feature)
// Firmware configuration indicates user favours security over performance
#define SEC_FTR_FAVOUR_SECURITY 0x0000000000000200ull
+
+// Features enabled by default
+#define SEC_FTR_DEFAULT \
+ (SEC_FTR_L1D_FLUSH_HV | \
+ SEC_FTR_L1D_FLUSH_PR | \
+ SEC_FTR_BNDS_CHK_SPEC_BAR | \
+ SEC_FTR_FAVOUR_SECURITY)
+
#endif /* _ASM_POWERPC_SECURITY_FEATURES_H */
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index 2cee3dc..bab5a27 100644
--- a/arch/powerpc/kernel/security.c
+++ b/arch/powerpc/kernel/security.c
@@ -11,12 +11,7 @@
#include <asm/security_features.h>
-unsigned long powerpc_security_features __read_mostly = \
- SEC_FTR_L1D_FLUSH_HV | \
- SEC_FTR_L1D_FLUSH_PR | \
- SEC_FTR_BNDS_CHK_SPEC_BAR | \
- SEC_FTR_FAVOUR_SECURITY;
-
+unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
{
--
1.8.3.1
^ permalink raw reply related
* Re: [RFC] new SYSCALL_DEFINE/COMPAT_SYSCALL_DEFINE wrappers
From: Adam Borowski @ 2018-03-30 15:54 UTC (permalink / raw)
To: Ingo Molnar
Cc: John Paul Adrian Glaubitz, Linus Torvalds, Al Viro,
Dominik Brodowski, Linux Kernel Mailing List, Arnd Bergmann,
linux-arch, Ralf Baechle, James Hogan, linux-mips,
Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, ppc-dev,
Martin Schwidefsky, Heiko Carstens, linux-s390, David S . Miller,
sparclinux, Ingo Molnar, Jiri Slaby, the arch/x86 maintainers
In-Reply-To: <20180330105802.7df5pacjfqsqwa6l@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 3090 bytes --]
On Fri, Mar 30, 2018 at 12:58:02PM +0200, Ingo Molnar wrote:
> * John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> wrote:
>
> > On 03/27/2018 12:40 PM, Linus Torvalds wrote:
> > > On Mon, Mar 26, 2018 at 4:37 PM, John Paul Adrian Glaubitz
> > > <glaubitz@physik.fu-berlin.de> wrote:
> > >>
> > >> What about a tarball with a minimal Debian x32 chroot? Then you can
> > >> install interesting packages you would like to test yourself.
> Here's the direct download link:
> $ wget https://people.debian.org/~glaubitz/chroots/debian-x32-unstable.tar.gz
> Seems to work fine here (on a distro kernel) even if I extract all the files as a
> non-root user and do:
>
> ~/s/debian-x32-unstable> fakechroot /usr/sbin/chroot . /usr/bin/dpkg -l | tail -2
>
> ERROR: ld.so: object 'libfakechroot.so' from LD_PRELOAD cannot be preloaded (cannot open shared object file): ignored.
> ii util-linux:x32 2.31.1-0.5 x32 miscellaneous system utilities
> ii zlib1g:x32 1:1.2.8.dfsg-5 x32 compression library - runtime
> So that 'dpkg' instance appears to be running inside the chroot environment and is
> listing x32 installed packages.
> Although I did get this warning:
> ERROR: ld.so: object 'libfakechroot.so' from LD_PRELOAD cannot be preloaded (cannot open shared object file): ignored.
> Even with that warning, is still still a sufficiently complex test of x32 syscall
> code paths?
Instead of mucking with fakechroot which would require installing its :x32
part inside the guest, or running the test as root, what about using any
random static binary? For example, a shell like sash or bash-static would
have a decentish syscall coverage even by itself.
I've extracted sash from
http://ftp.ports.debian.org/debian-ports//pool-x32/main/s/sash/sash_3.8-4_x32.deb
and placed at https://angband.pl/tmp/sash.x32
$ sha256sum sash.x32
de24097c859b313fa422af742b648c9d731de6b33b98cb995658d1da16398456 sash.x32
Obviously, you can compile a static binary that uses whatever syscalls you
want. Without a native chroot, you can "gcc -mx32" although you'd need some
kind of libc unless your program is stand-alone.
It might be worth mentioning my "arch-test:
https://github.com/kilobyte/arch-test
Because of many toolchain pieces it needs, you want a prebuilt copy:
https://github.com/kilobyte/arch-test/releases/download/v0.10/arch-test_prebuilt_0.10.tar.xz
https://github.com/kilobyte/arch-test/releases/download/v0.10/arch-test_prebuilt_0.10.tar.xz.asc
-- while it has _extremely_ small coverage of syscalls (just write() and
_exit(), enough to check endianness and pointer width), concentrating on
instruction set inadequacies (broken SWP on arm, POWER7 vs POWER8, powerpc
vs powerpcspe, etc), it provides minimal test binaries for a wide range of
architectures.
Meow!
--
⢀⣴⠾⠻⢶⣦⠀
⣾⠁⢰⠒⠀⣿⡁ I was born a dumb, ugly and work-loving kid, then I got swapped on
⢿⡄⠘⠷⠚⠋⠀ the maternity ward.
⠈⠳⣄⠀⠀⠀⠀
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Linux 4.16: Reported regressions as of Friday, 2018-03-30
From: Thorsten Leemhuis @ 2018-03-30 16:00 UTC (permalink / raw)
To: Linus Torvalds, Linux Kernel Mailing List, linuxppc-dev,
Jonathan Corbet
In-Reply-To: <CA+55aFxpxHnWBeTXN+DKqwCMW_=T2cR8UxSBVk_6c8LL7Et5JQ@mail.gmail.com>
On 26.03.2018 01:37, Linus Torvalds wrote:
> […] Anyway. Go out and test. And let's hope next week is nice and calm and
> I can release the final 4.16 next Sunday without any extra rc's.
>
> Linus
Hi! Find below my seventh regression report for Linux 4.16; it's a "the
final release is getting closer" special release. It lists 7 regressions
I'm currently aware of. 1 was fixed since the report I sent on Tuesday;
1 is new.
Are you aware of any other regressions that got introduced this
development cycle? Then please let me know by mail (a simple bounce or
forward to the sender of this email address is enough!). And please tell
me if there is anything in the report that shouldn't be there.
Ciao, Thorsten
== Current regressions ==
Error updating SMART data during runtime and could not connect to lv
["Possible Regression"]
- Status: Stalled afaics
- Reported: 2018-03-11
https://marc.info/?l=linux-kernel&m=152075643627082
https://bugzilla.kernel.org/show_bug.cgi?id=199077
- Note: Two issues discussed in that thread; only one is a regression
(latency issues in the MU03 version of the firmware, triggered by
polling SMART data, which causes lvmetad to timeout in some cases)
- Last known developer activity: 2018-03-19
https://marc.info/?l=linux-kernel&m=152145306610330
- Other relevant links:
https://marc.info/?l=linux-kernel&m=152146297613525
https://marc.info/?l=linux-scsi&m=152095303312164&w=2
15% longer running times on lvm2 test suite
- Status: Stalled afaics
- Cause: https://git.kernel.org/torvalds/c/44c02a2c3dc5
- Reported: 2018-03-11
https://marc.info/?l=linux-kernel&m=152077333230274
- Note: Seems the real problem is in the way the test scripts interact
with the kernel
- Last known developer activity: 2018-03-13
https://marc.info/?l=linux-kernel&m=152097761921525
AMDGPU Fury X random screen flicker on Linux kernel 4.16rc5
- Status: waiting for bisect
- Reported: 2018-03-13
https://bugzilla.kernel.org/show_bug.cgi?id=199101
ASUS XG-C100C 10G Network Adapter no longer working
- Status: got driver maintainer involved who asked reporter for more details
- Reported: 2018-03-22
https://bugzilla.kernel.org/show_bug.cgi?id=199177
multi_v7_defconfig fails to boot on many OMAP systems
- Status: patch available: "clk: ti: fix flag space conflict with
clkctrl clocks" https://marc.info/?l=linux-arm-kernel&m=152217288709609&w=2
- Cause: https://git.kernel.org/torvalds/c/49159a9dc3da
- Reported: 2018-03-23
https://marc.info/?l=linux-clk&m=152198452423677&w=2
- Last known developer activity: 2018-03-27
https://marc.info/?l=linux-clk&m=152199237525182&w=2
hugetlbfs overflow checking regression on 32bit
- Status: patch was proposed, but has issues, too
- Cause: https://git.kernel.org/torvalds/c/63489f8e8211
- Reported: 2018-03-29
https://marc.info/?l=linux-kernel&m=152229704211382&w=2
- Last known developer activity: 2018-03-29
https://marc.info/?l=linux-mm&m=152235614429445&w=2
- Other relevant links:
https://marc.info/?l=linux-kernel&m=152229710411390&w=2
== Waiting for clarification from reporter ==
Interrupt storm after suspend causes one busy kworker
- Status: Still waiting for data from reporter
- Reported: 2018-02-25
https://bugzilla.kernel.org/show_bug.cgi?id=198929
== Fixed since last report ==
Dell R640 does not boot due to SCSI/SATA failure
- Status: Fixed by 2f31115e940c 8b834bff1b73 adbe552349f2 c3506df85091
b5b6e8c8d3b4
- Cause: https://git.kernel.org/torvalds/c/84676c1f21e8
- Reported: 2018-02-22
https://marc.info/?l=linux-kernel&m=151931128006031
- Note: Thx Artem and Dsterba for pointers
^ permalink raw reply
* [PATCH] powerpc: fix spelling mistake: "Usupported" -> "Unsupported"
From: Colin King @ 2018-03-30 15:55 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
linuxppc-dev
Cc: kernel-janitors, linux-kernel
From: Colin Ian King <colin.king@canonical.com>
Trivial fix to spelling mistake in bootx_printf message text
Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
arch/powerpc/platforms/powermac/bootx_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index c3c9bbb3573a..ca60f3ef7ef6 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -519,7 +519,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
;
}
if (bi->architecture != BOOT_ARCH_PCI) {
- bootx_printf(" !!! WARNING - Usupported machine"
+ bootx_printf(" !!! WARNING - Unsupported machine"
" architecture !\n");
for (;;)
;
--
2.15.1
^ permalink raw reply related
* Re: [PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES
From: LEROY Christophe @ 2018-03-30 15:07 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, paulus, benh, Aneesh Kumar K.V
In-Reply-To: <87a7upzqpo.fsf@concordia.ellerman.id.au>
Michael Ellerman <mpe@ellerman.id.au> a =C3=A9crit=C2=A0:
> "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> writes:
>
>> Should not have any impact, because we always select PP_MM_SLICES=20=20
>>=20these days.
>> Nevertheless it is good to indicate that slb_addr_limit is available onl=
y
>> with slice code.
>
> That file can only be built if PPC_MM_SLICES=3Dy.
>
> So let's just remove the ifdef entirely.
>
> These days PPC_MM_SLICES =3D=3D PPC_BOOK3S_64, so we should remove
> PPC_MM_SLICES #defines wherever possible and replace them with
> PPC_BOOK3S_64 otherwise IMO.
PPC8xx also selects PPC_MM_SLICES when hugepages is selected.
Christophe
>
> cheers
>
>> diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
>> index c66cb06e73a1..337ef162851d 100644
>> --- a/arch/powerpc/mm/slb_low.S
>> +++ b/arch/powerpc/mm/slb_low.S
>> @@ -166,6 +166,8 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>> */
>> cmpdi r9, 0
>> bne- 8f
>> +
>> +#ifdef CONFIG_PPC_MM_SLICES
>> /*
>> * user space make sure we are within the allowed limit
>> */
>> @@ -183,7 +185,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
>> * really do dynamic patching unfortunately as processes might flip
>> * between 4k and 64k standard page size
>> */
>> -#ifdef CONFIG_PPC_MM_SLICES
>> /* r10 have esid */
>> cmpldi r10,16
>> /* below SLICE_LOW_TOP */
>> --
>> 2.14.3
^ permalink raw reply
* [RFC 3/3] powerpc/mce: Handle memcpy_mcsafe
From: Balbir Singh @ 2018-03-30 13:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: npiggin, mpe, mahesh, oohall, Balbir Singh
In-Reply-To: <20180330135512.23760-1-bsingharora@gmail.com>
Add a blocking notifier callback to be called in real-mode
on machine check exceptions for UE (ld/st) errors only.
The patch registers a callback on boot to be notified
of machine check exceptions and returns a NOTIFY_STOP when
a page of interest is seen as the source of the machine
check exception. This page of interest is a ZONE_DEVICE
page and hence for now, for memcpy_mcsafe to work, the page
needs to belong to ZONE_DEVICE and memcpy_mcsafe should be
used to access the memory.
The patch also modifies the NIP of the exception context
to go back to the fixup handler (in memcpy_mcsafe) and does
not print any error message as the error is treated as
returned via a return value and handled.
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
---
arch/powerpc/include/asm/mce.h | 3 +-
arch/powerpc/kernel/mce.c | 77 ++++++++++++++++++++++++++++++++++++++++--
2 files changed, 77 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mce.h
index 3a1226e9b465..a76638e3e47e 100644
--- a/arch/powerpc/include/asm/mce.h
+++ b/arch/powerpc/include/asm/mce.h
@@ -125,7 +125,8 @@ struct machine_check_event {
enum MCE_UeErrorType ue_error_type:8;
uint8_t effective_address_provided;
uint8_t physical_address_provided;
- uint8_t reserved_1[5];
+ uint8_t error_return;
+ uint8_t reserved_1[4];
uint64_t effective_address;
uint64_t physical_address;
uint8_t reserved_2[8];
diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c
index efdd16a79075..b9e4881fa8c5 100644
--- a/arch/powerpc/kernel/mce.c
+++ b/arch/powerpc/kernel/mce.c
@@ -28,7 +28,9 @@
#include <linux/percpu.h>
#include <linux/export.h>
#include <linux/irq_work.h>
+#include <linux/extable.h>
+#include <asm/extable.h>
#include <asm/machdep.h>
#include <asm/mce.h>
@@ -54,6 +56,52 @@ static struct irq_work mce_event_process_work = {
DECLARE_WORK(mce_ue_event_work, machine_process_ue_event);
+static BLOCKING_NOTIFIER_HEAD(mce_notifier_list);
+
+int register_mce_notifier(struct notifier_block *nb)
+{
+ return blocking_notifier_chain_register(&mce_notifier_list, nb);
+}
+EXPORT_SYMBOL_GPL(register_mce_notifier);
+
+int unregister_mce_notifier(struct notifier_block *nb)
+{
+ return blocking_notifier_chain_unregister(&mce_notifier_list, nb);
+}
+EXPORT_SYMBOL_GPL(unregister_mce_notifier);
+
+
+static int check_memcpy_mcsafe(struct notifier_block *nb,
+ unsigned long val, void *data)
+{
+ /*
+ * val contains the physical_address of the bad address
+ */
+ unsigned long pfn = val >> PAGE_SHIFT;
+ struct page *page = realmode_pfn_to_page(pfn);
+ int rc = NOTIFY_DONE;
+
+ if (!page)
+ goto out;
+
+ if (is_zone_device_page(page)) /* for HMM and PMEM */
+ rc = NOTIFY_STOP;
+out:
+ return rc;
+}
+
+struct notifier_block memcpy_mcsafe_nb = {
+ .priority = 0,
+ .notifier_call = check_memcpy_mcsafe,
+};
+
+int mce_mcsafe_register(void)
+{
+ register_mce_notifier(&memcpy_mcsafe_nb);
+ return 0;
+}
+arch_initcall(mce_mcsafe_register);
+
static void mce_set_error_info(struct machine_check_event *mce,
struct mce_error_info *mce_err)
{
@@ -151,9 +199,31 @@ void save_mce_event(struct pt_regs *regs, long handled,
mce->u.ue_error.effective_address_provided = true;
mce->u.ue_error.effective_address = addr;
if (phys_addr != ULONG_MAX) {
+ int rc;
+ const struct exception_table_entry *entry;
+
+ /*
+ * Once we have the physical address, we check to
+ * see if the current nip has a fixup entry.
+ * Having a fixup entry plus the notifier stating
+ * that it can handle the exception is an indication
+ * that we should return to the fixup entry and
+ * return an error from there
+ */
mce->u.ue_error.physical_address_provided = true;
mce->u.ue_error.physical_address = phys_addr;
- machine_check_ue_event(mce);
+
+ rc = blocking_notifier_call_chain(&mce_notifier_list,
+ phys_addr, NULL);
+ if (rc & NOTIFY_STOP_MASK) {
+ entry = search_exception_tables(regs->nip);
+ if (entry != NULL) {
+ mce->u.ue_error.error_return = 1;
+ regs->nip = extable_fixup(entry);
+ } else
+ machine_check_ue_event(mce);
+ } else
+ machine_check_ue_event(mce);
}
}
return;
@@ -208,7 +278,6 @@ void release_mce_event(void)
get_mce_event(NULL, true);
}
-
/*
* Queue up the MCE event which then can be handled later.
*/
@@ -239,6 +308,10 @@ void machine_check_queue_event(void)
if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
return;
+ if (evt.error_type == MCE_ERROR_TYPE_UE &&
+ evt.u.ue_error.error_return == 1)
+ return;
+
index = __this_cpu_inc_return(mce_queue_count) - 1;
/* If queue is full, just return for now. */
if (index >= MAX_MC_EVT) {
--
2.13.6
^ permalink raw reply related
* [RFC 2/3] powerpc/memcpy: Add memcpy_mcsafe for pmem
From: Balbir Singh @ 2018-03-30 13:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: npiggin, mpe, mahesh, oohall, Balbir Singh
In-Reply-To: <20180330135512.23760-1-bsingharora@gmail.com>
The pmem infrastructure uses memcpy_mcsafe in the pmem
layer so as to convert machine check excpetions into
a return value on failure in case a machine check
exception is encoutered during the memcpy.
This patch largely borrows from the copyuser_power7
logic and does not add the VMX optimizations, largely
to keep the patch simple. If needed those optimizations
can be folded in.
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
---
arch/powerpc/include/asm/string.h | 2 +
arch/powerpc/lib/Makefile | 2 +-
arch/powerpc/lib/memcpy_mcsafe_64.S | 212 ++++++++++++++++++++++++++++++++++++
3 files changed, 215 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/lib/memcpy_mcsafe_64.S
diff --git a/arch/powerpc/include/asm/string.h b/arch/powerpc/include/asm/string.h
index 9b8cedf618f4..b7e872a64726 100644
--- a/arch/powerpc/include/asm/string.h
+++ b/arch/powerpc/include/asm/string.h
@@ -30,7 +30,9 @@ extern void * memcpy_flushcache(void *,const void *,__kernel_size_t);
#ifdef CONFIG_PPC64
#define __HAVE_ARCH_MEMSET32
#define __HAVE_ARCH_MEMSET64
+#define __HAVE_ARCH_MEMCPY_MCSAFE
+extern int memcpy_mcsafe(void *dst, const void *src, __kernel_size_t sz);
extern void *__memset16(uint16_t *, uint16_t v, __kernel_size_t);
extern void *__memset32(uint32_t *, uint32_t v, __kernel_size_t);
extern void *__memset64(uint64_t *, uint64_t v, __kernel_size_t);
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 3c29c9009bbf..048afee9f518 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -24,7 +24,7 @@ endif
obj64-y += copypage_64.o copyuser_64.o mem_64.o hweight_64.o \
copyuser_power7.o string_64.o copypage_power7.o memcpy_power7.o \
- memcpy_64.o memcmp_64.o pmem.o
+ memcpy_64.o memcmp_64.o pmem.o memcpy_mcsafe_64.o
obj64-$(CONFIG_SMP) += locks.o
obj64-$(CONFIG_ALTIVEC) += vmx-helper.o
diff --git a/arch/powerpc/lib/memcpy_mcsafe_64.S b/arch/powerpc/lib/memcpy_mcsafe_64.S
new file mode 100644
index 000000000000..e7eaa9b6cded
--- /dev/null
+++ b/arch/powerpc/lib/memcpy_mcsafe_64.S
@@ -0,0 +1,212 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) IBM Corporation, 2011
+ * Derived from copyuser_power7.s by Anton Blanchard <anton@au.ibm.com>
+ * Author - Balbir Singh <bsingharora@gmail.com>
+ */
+#include <asm/ppc_asm.h>
+#include <asm/errno.h>
+
+ .macro err1
+100:
+ EX_TABLE(100b,.Ldo_err1)
+ .endm
+
+ .macro err2
+200:
+ EX_TABLE(200b,.Ldo_err2)
+ .endm
+
+.Ldo_err2:
+ ld r22,STK_REG(R22)(r1)
+ ld r21,STK_REG(R21)(r1)
+ ld r20,STK_REG(R20)(r1)
+ ld r19,STK_REG(R19)(r1)
+ ld r18,STK_REG(R18)(r1)
+ ld r17,STK_REG(R17)(r1)
+ ld r16,STK_REG(R16)(r1)
+ ld r15,STK_REG(R15)(r1)
+ ld r14,STK_REG(R14)(r1)
+ addi r1,r1,STACKFRAMESIZE
+.Ldo_err1:
+ li r3,-EFAULT
+ blr
+
+
+_GLOBAL(memcpy_mcsafe)
+ cmpldi r5,16
+ blt .Lshort_copy
+
+.Lcopy:
+ /* Get the source 8B aligned */
+ neg r6,r4
+ mtocrf 0x01,r6
+ clrldi r6,r6,(64-3)
+
+ bf cr7*4+3,1f
+err1; lbz r0,0(r4)
+ addi r4,r4,1
+err1; stb r0,0(r3)
+ addi r3,r3,1
+
+1: bf cr7*4+2,2f
+err1; lhz r0,0(r4)
+ addi r4,r4,2
+err1; sth r0,0(r3)
+ addi r3,r3,2
+
+2: bf cr7*4+1,3f
+err1; lwz r0,0(r4)
+ addi r4,r4,4
+err1; stw r0,0(r3)
+ addi r3,r3,4
+
+3: sub r5,r5,r6
+ cmpldi r5,128
+ blt 5f
+
+ mflr r0
+ stdu r1,-STACKFRAMESIZE(r1)
+ std r14,STK_REG(R14)(r1)
+ std r15,STK_REG(R15)(r1)
+ std r16,STK_REG(R16)(r1)
+ std r17,STK_REG(R17)(r1)
+ std r18,STK_REG(R18)(r1)
+ std r19,STK_REG(R19)(r1)
+ std r20,STK_REG(R20)(r1)
+ std r21,STK_REG(R21)(r1)
+ std r22,STK_REG(R22)(r1)
+ std r0,STACKFRAMESIZE+16(r1)
+
+ srdi r6,r5,7
+ mtctr r6
+
+ /* Now do cacheline (128B) sized loads and stores. */
+ .align 5
+4:
+err2; ld r0,0(r4)
+err2; ld r6,8(r4)
+err2; ld r7,16(r4)
+err2; ld r8,24(r4)
+err2; ld r9,32(r4)
+err2; ld r10,40(r4)
+err2; ld r11,48(r4)
+err2; ld r12,56(r4)
+err2; ld r14,64(r4)
+err2; ld r15,72(r4)
+err2; ld r16,80(r4)
+err2; ld r17,88(r4)
+err2; ld r18,96(r4)
+err2; ld r19,104(r4)
+err2; ld r20,112(r4)
+err2; ld r21,120(r4)
+ addi r4,r4,128
+err2; std r0,0(r3)
+err2; std r6,8(r3)
+err2; std r7,16(r3)
+err2; std r8,24(r3)
+err2; std r9,32(r3)
+err2; std r10,40(r3)
+err2; std r11,48(r3)
+err2; std r12,56(r3)
+err2; std r14,64(r3)
+err2; std r15,72(r3)
+err2; std r16,80(r3)
+err2; std r17,88(r3)
+err2; std r18,96(r3)
+err2; std r19,104(r3)
+err2; std r20,112(r3)
+err2; std r21,120(r3)
+ addi r3,r3,128
+ bdnz 4b
+
+ clrldi r5,r5,(64-7)
+
+ ld r14,STK_REG(R14)(r1)
+ ld r15,STK_REG(R15)(r1)
+ ld r16,STK_REG(R16)(r1)
+ ld r17,STK_REG(R17)(r1)
+ ld r18,STK_REG(R18)(r1)
+ ld r19,STK_REG(R19)(r1)
+ ld r20,STK_REG(R20)(r1)
+ ld r21,STK_REG(R21)(r1)
+ ld r22,STK_REG(R22)(r1)
+ addi r1,r1,STACKFRAMESIZE
+
+ /* Up to 127B to go */
+5: srdi r6,r5,4
+ mtocrf 0x01,r6
+
+6: bf cr7*4+1,7f
+err1; ld r0,0(r4)
+err1; ld r6,8(r4)
+err1; ld r7,16(r4)
+err1; ld r8,24(r4)
+err1; ld r9,32(r4)
+err1; ld r10,40(r4)
+err1; ld r11,48(r4)
+err1; ld r12,56(r4)
+ addi r4,r4,64
+err1; std r0,0(r3)
+err1; std r6,8(r3)
+err1; std r7,16(r3)
+err1; std r8,24(r3)
+err1; std r9,32(r3)
+err1; std r10,40(r3)
+err1; std r11,48(r3)
+err1; std r12,56(r3)
+ addi r3,r3,64
+
+ /* Up to 63B to go */
+7: bf cr7*4+2,8f
+err1; ld r0,0(r4)
+err1; ld r6,8(r4)
+err1; ld r7,16(r4)
+err1; ld r8,24(r4)
+ addi r4,r4,32
+err1; std r0,0(r3)
+err1; std r6,8(r3)
+err1; std r7,16(r3)
+err1; std r8,24(r3)
+ addi r3,r3,32
+
+ /* Up to 31B to go */
+8: bf cr7*4+3,9f
+err1; ld r0,0(r4)
+err1; ld r6,8(r4)
+ addi r4,r4,16
+err1; std r0,0(r3)
+err1; std r6,8(r3)
+ addi r3,r3,16
+
+9: clrldi r5,r5,(64-4)
+
+ /* Up to 15B to go */
+.Lshort_copy:
+ mtocrf 0x01,r5
+ bf cr7*4+0,12f
+err1; lwz r0,0(r4) /* Less chance of a reject with word ops */
+err1; lwz r6,4(r4)
+ addi r4,r4,8
+err1; stw r0,0(r3)
+err1; stw r6,4(r3)
+ addi r3,r3,8
+
+12: bf cr7*4+1,13f
+err1; lwz r0,0(r4)
+ addi r4,r4,4
+err1; stw r0,0(r3)
+ addi r3,r3,4
+
+13: bf cr7*4+2,14f
+err1; lhz r0,0(r4)
+ addi r4,r4,2
+err1; sth r0,0(r3)
+ addi r3,r3,2
+
+14: bf cr7*4+3,15f
+err1; lbz r0,0(r4)
+err1; stb r0,0(r3)
+
+15: li r3,0
+ blr
--
2.13.6
^ permalink raw reply related
* [RFC 1/3] powerpc/mce: Bug fixes for MCE handling in kernel space
From: Balbir Singh @ 2018-03-30 13:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: npiggin, mpe, mahesh, oohall, Balbir Singh
In-Reply-To: <20180330135512.23760-1-bsingharora@gmail.com>
The code currently assumes PAGE_SHIFT as the shift value of
the pfn, this works correctly (mostly) for user space pages,
but the correct thing to do is
1. Extrace the shift value returned via the pte-walk API's
2. Use the shift value to access the instruction address.
Note, the final physical address still use PAGE_SHIFT for
computation. handle_ierror() is not modified and handle_derror()
is modified just for extracting the correct instruction
address.
Signed-off-by: Balbir Singh <bsingharora@gmail.com>
---
arch/powerpc/kernel/mce_power.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index fe6fc63251fe..69c8cc1e8e4f 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -36,7 +36,8 @@
* Convert an address related to an mm to a PFN. NOTE: we are in real
* mode, we could potentially race with page table updates.
*/
-static unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr)
+static unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr,
+ unsigned int *shift)
{
pte_t *ptep;
unsigned long flags;
@@ -49,9 +50,9 @@ static unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr)
local_irq_save(flags);
if (mm == current->mm)
- ptep = find_current_mm_pte(mm->pgd, addr, NULL, NULL);
+ ptep = find_current_mm_pte(mm->pgd, addr, NULL, shift);
else
- ptep = find_init_mm_pte(addr, NULL);
+ ptep = find_init_mm_pte(addr, shift);
local_irq_restore(flags);
if (!ptep || pte_special(*ptep))
return ULONG_MAX;
@@ -353,13 +354,14 @@ static int mce_find_instr_ea_and_pfn(struct pt_regs *regs, uint64_t *addr,
unsigned long pfn, instr_addr;
struct instruction_op op;
struct pt_regs tmp = *regs;
+ unsigned int shift;
- pfn = addr_to_pfn(regs, regs->nip);
+ pfn = addr_to_pfn(regs, regs->nip, &shift);
if (pfn != ULONG_MAX) {
- instr_addr = (pfn << PAGE_SHIFT) + (regs->nip & ~PAGE_MASK);
+ instr_addr = (pfn << shift) + (regs->nip & ((1 << shift) - 1));
instr = *(unsigned int *)(instr_addr);
if (!analyse_instr(&op, &tmp, instr)) {
- pfn = addr_to_pfn(regs, op.ea);
+ pfn = addr_to_pfn(regs, op.ea, &shift);
*addr = op.ea;
*phys_addr = (pfn << PAGE_SHIFT);
return 0;
@@ -437,7 +439,8 @@ static int mce_handle_ierror(struct pt_regs *regs,
unsigned long pfn;
if (get_paca()->in_mce < MAX_MCE_DEPTH) {
- pfn = addr_to_pfn(regs, regs->nip);
+ pfn = addr_to_pfn(regs, regs->nip,
+ NULL);
if (pfn != ULONG_MAX) {
*phys_addr =
(pfn << PAGE_SHIFT);
--
2.13.6
^ permalink raw reply related
* [RFC 0/3] Add support for memcpy_mcsafe
From: Balbir Singh @ 2018-03-30 13:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: npiggin, mpe, mahesh, oohall, Balbir Singh
memcpy_mcsafe() is an API currently used by the pmem subsystem to convert
errors while doing a memcpy (machine check exception errors) to a return
value. This patchset consists of three patches
1. The first patch is a bug fix to handle machine check errors correctly
while walking the page tables in kernel mode, due to huge pmd/pud sizes
2. The second patch adds memcpy_mcsafe() support, this is largely derived
from existing code
3. The third patch registers for callbacks on machine check exceptions and
in them uses specialized knowledge of the type of page to decide whether
to handle the MCE as is or to return to a fixup address present in
memcpy_mcsafe(). If a fixup address is used, then we return an error
value of -EFAULT to the caller.
Testing
A large part of the testing was done under a simulator by selectively
inserting machine check exceptions in a test driver doing memcpy_mcsafe
via ioctls.
Balbir Singh (3):
powerpc/mce: Bug fixes for MCE handling in kernel space
powerpc/memcpy: Add memcpy_mcsafe for pmem
powerpc/mce: Handle memcpy_mcsafe
arch/powerpc/include/asm/mce.h | 3 +-
arch/powerpc/include/asm/string.h | 2 +
arch/powerpc/kernel/mce.c | 76 +++++++++++-
arch/powerpc/kernel/mce_power.c | 17 +--
arch/powerpc/lib/Makefile | 2 +-
arch/powerpc/lib/memcpy_mcsafe_64.S | 225 ++++++++++++++++++++++++++++++++++++
6 files changed, 314 insertions(+), 11 deletions(-)
create mode 100644 arch/powerpc/lib/memcpy_mcsafe_64.S
--
2.13.6
^ permalink raw reply
* Re: [RFC PATCH v2 0/2] Randomization of address chosen by mmap.
From: Rich Felker @ 2018-03-30 13:33 UTC (permalink / raw)
To: Pavel Machek
Cc: Ilya Smith, rth, ink, mattst88, vgupta, linux, tony.luck,
fenghua.yu, jhogan, ralf, jejb, deller, benh, paulus, mpe,
schwidefsky, heiko.carstens, ysato, davem, tglx, mingo, hpa, x86,
nyc, viro, arnd, gregkh, deepa.kernel, mhocko, hughd, kstewart,
pombredanne, akpm, steve.capper, punit.agrawal, paul.burton,
aneesh.kumar, npiggin, keescook, bhsharma, riel, nitin.m.gupta,
kirill.shutemov, dan.j.williams, jack, ross.zwisler, jglisse,
willy, aarcange, oleg, linux-alpha, linux-kernel, linux-snps-arc,
linux-arm-kernel, linux-ia64, linux-metag, linux-mips,
linux-parisc, linuxppc-dev, linux-s390, linux-sh, sparclinux,
linux-mm
In-Reply-To: <20180330075508.GA21798@amd>
On Fri, Mar 30, 2018 at 09:55:08AM +0200, Pavel Machek wrote:
> Hi!
>
> > Current implementation doesn't randomize address returned by mmap.
> > All the entropy ends with choosing mmap_base_addr at the process
> > creation. After that mmap build very predictable layout of address
> > space. It allows to bypass ASLR in many cases. This patch make
> > randomization of address on any mmap call.
>
> How will this interact with people debugging their application, and
> getting different behaviours based on memory layout?
>
> strace, strace again, get different results?
Normally gdb disables ASLR for the process when invoking a program to
debug. I don't see why that would be terribly useful with strace but
you can do the same if you want.
Rich
^ permalink raw reply
* Re: [PATCH] powerpc/mm/hash: Move the slb_addr_limit check within PPC_MM_SLICES
From: Michael Ellerman @ 2018-03-30 12:35 UTC (permalink / raw)
To: Aneesh Kumar K.V, benh, paulus; +Cc: linuxppc-dev, Aneesh Kumar K.V
In-Reply-To: <20180307121539.20745-1-aneesh.kumar@linux.vnet.ibm.com>
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> writes:
> Should not have any impact, because we always select PP_MM_SLICES these days.
> Nevertheless it is good to indicate that slb_addr_limit is available only
> with slice code.
That file can only be built if PPC_MM_SLICES=y.
So let's just remove the ifdef entirely.
These days PPC_MM_SLICES == PPC_BOOK3S_64, so we should remove
PPC_MM_SLICES #defines wherever possible and replace them with
PPC_BOOK3S_64 otherwise IMO.
cheers
> diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
> index c66cb06e73a1..337ef162851d 100644
> --- a/arch/powerpc/mm/slb_low.S
> +++ b/arch/powerpc/mm/slb_low.S
> @@ -166,6 +166,8 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
> */
> cmpdi r9, 0
> bne- 8f
> +
> +#ifdef CONFIG_PPC_MM_SLICES
> /*
> * user space make sure we are within the allowed limit
> */
> @@ -183,7 +185,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
> * really do dynamic patching unfortunately as processes might flip
> * between 4k and 64k standard page size
> */
> -#ifdef CONFIG_PPC_MM_SLICES
> /* r10 have esid */
> cmpldi r10,16
> /* below SLICE_LOW_TOP */
> --
> 2.14.3
^ permalink raw reply
* [PATCH 2/2] powerpc/mm/radix: Update command line parsing for disable_radix
From: Aneesh Kumar K.V @ 2018-03-30 12:09 UTC (permalink / raw)
To: benh, paulus, mpe; +Cc: linuxppc-dev, Aneesh Kumar K.V
In-Reply-To: <20180330120902.28798-1-aneesh.kumar@linux.ibm.com>
kernel parameter disable_radix takes different options
disable_radix=yes|no|1|0 or just disable_radix.
prom_init parsing is not supporting these options.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
arch/powerpc/kernel/prom_init.c | 16 +++++++++++++---
arch/powerpc/kernel/prom_init_check.sh | 2 +-
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 0323e073341d..c85333c244e8 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -171,7 +171,7 @@ static unsigned long __initdata prom_tce_alloc_start;
static unsigned long __initdata prom_tce_alloc_end;
#endif
-static bool __initdata prom_radix_disable;
+static bool prom_radix_disable __initdata = !IS_ENABLED(CONFIG_PPC_RADIX_MMU_DEFAULT);
struct platform_support {
bool hash_mmu;
@@ -641,9 +641,19 @@ static void __init early_cmdline_parse(void)
opt = strstr(prom_cmd_line, "disable_radix");
if (opt) {
- prom_debug("Radix disabled from cmdline\n");
- prom_radix_disable = true;
+ opt += 13;
+ if (*opt && *opt == '=') {
+ bool val;
+
+ if (kstrtobool(++opt, &val))
+ prom_radix_disable = false;
+ else
+ prom_radix_disable = val;
+ } else
+ prom_radix_disable = true;
}
+ if (prom_radix_disable)
+ prom_debug("Radix disabled from cmdline\n");
}
#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index 12640f7e726b..acb6b9226352 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -19,7 +19,7 @@
WHITELIST="add_reloc_offset __bss_start __bss_stop copy_and_flush
_end enter_prom memcpy memset reloc_offset __secondary_hold
__secondary_hold_acknowledge __secondary_hold_spinloop __start
-strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
+strcmp strcpy strlcpy strlen strncmp strstr kstrtobool logo_linux_clut224
reloc_got2 kernstart_addr memstart_addr linux_banner _stext
__prom_init_toc_start __prom_init_toc_end btext_setup_display TOC."
--
2.14.3
^ permalink raw reply related
* [PATCH 1/2] powerpc/mm/radix: Parse disable_radix commandline correctly.
From: Aneesh Kumar K.V @ 2018-03-30 12:09 UTC (permalink / raw)
To: benh, paulus, mpe; +Cc: linuxppc-dev, Aneesh Kumar K.V
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
kernel parameter disable_radix takes different options
disable_radix=yes|no|1|0 or just disable_radix. When using the later format
we get below error.
`Malformed early option 'disable_radix'`
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/mm/init_64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index fdb424a29f03..9c9f8dde31c3 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -372,7 +372,7 @@ static int __init parse_disable_radix(char *p)
{
bool val;
- if (strlen(p) == 0)
+ if (!p)
val = true;
else if (kstrtobool(p, &val))
return -EINVAL;
--
2.14.3
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox