* Re: [PATCH] sched/topology: Use Identity node only if required
From: Peter Zijlstra @ 2018-08-31 10:41 UTC (permalink / raw)
To: Srikar Dronamraju
Cc: Ingo Molnar, LKML, Mel Gorman, Rik van Riel, Thomas Gleixner,
Michael Ellerman, Heiko Carstens, Suravee Suthikulpanit,
linuxppc-dev, Andre Wild, Benjamin Herrenschmidt
In-Reply-To: <20180831102248.GA8437@linux.vnet.ibm.com>
On Fri, Aug 31, 2018 at 03:22:48AM -0700, Srikar Dronamraju wrote:
> At boot: Before topology update.
How does that work; you do SMP bringup _before_ you know the topology !?
> After topology update.
>
> For CPU 0
> domain-0: span=0-7 level=SMT
> groups: 0:{ span=0 }, 1:{ span=1 }, 2:{ span=2 }, 3:{ span=3 }, 4:{ span=4 }, 5:{ span=5 }, 6:{ span=6 }, 7:{ span=7 }
> domain-1: span=0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-231,256-263,288-295 level=DIE
> groups: 0:{ span=0-7 cap=8192 }, 32:{ span=32-39 cap=8192 }, 64:{ span=64-71 cap=8192 }, 96:{ span=96-103 cap=8192 }, 128:{ span=128-135 cap=8192 }, 160:{ span=160-167 cap=8192 }, 192:{ span=192-199 cap=8192 }, 224:{ span=224-231 cap=8192 }, 256:{ span=256-263 cap=8192 }, 288:{ span=288-295 cap=8192 }
> domain-2: span=0-303 level=NODE
> groups: 0:{ span=0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-231,256-263,288-295 cap=81920 }, 8:{ span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=81920 }, 16:{ span=16-23,48-55,80-87,112-119,144-151,176-183,208-215,240-247,272-279 cap=73728 }, 24:{ span=24-31,56-63,88-95,120-127,152-159,184-191,216-223,248-255,280-287 cap=73728 }
>
> For CPU 1
> domain-0: span=0-7 level=SMT
> groups: 1:{ span=1 }, 2:{ span=2 }, 3:{ span=3 }, 4:{ span=4 }, 5:{ span=5 }, 6:{ span=6 }, 7:{ span=7 }, 0:{ span=0 }
> domain-1: span=0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-231,256-263,288-295 level=DIE
> groups: 0:{ span=0-7 cap=8192 }, 32:{ span=32-39 cap=8192 }, 64:{ span=64-71 cap=8192 }, 96:{ span=96-103 cap=8192 }, 128:{ span=128-135 cap=8192 }, 160:{ span=160-167 cap=8192 }, 192:{ span=192-199 cap=8192 }, 224:{ span=224-231 cap=8192 }, 256:{ span=256-263 cap=8192 }, 288:{ span=288-295 cap=8192 }
> domain-2: span=0-303 level=NODE
> groups: 0:{ span=0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-231,256-263,288-295 cap=81920 }, 8:{ span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=81920 }, 16:{ span=16-23,48-55,80-87,112-119,144-151,176-183,208-215,240-247,272-279 cap=73728 }, 24:{ span=24-31,56-63,88-95,120-127,152-159,184-191,216-223,248-255,280-287 cap=73728 }
>
>
> For CPU 8
> domain-0: span=8-15 level=SMT
> groups: 8:{ span=8 }, 9:{ span=9 }, 10:{ span=10 }, 11:{ span=11 }, 12:{ span=12 }, 13:{ span=13 }, 14:{ span=14 }, 15:{ span=15 }
> domain-1: span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 level=DIE
> groups: 8:{ span=8-15 cap=8192 }, 40:{ span=40-47 cap=8192 }, 72:{ span=72-79 cap=8192 }, 104:{ span=104-111 cap=8192 }, 136:{ span=136-143 cap=8192 }, 168:{ span=168-175 cap=8192 }, 200:{ span=200-207 cap=8192 }, 232:{ span=232-239 cap=8192 }, 264:{ span=264-271 cap=8192 }, 296:{ span=296-303 cap=8192 }
> domain-2: span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 level=NODE
> groups: 8:{ span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=81920 }
> domain-3: span=0-303 level=NUMA
> groups: 8:{ span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=81920 }, 16:{ span=16-23,48-55,80-87,112-119,144-151,176-183,208-215,240-247,272-279 cap=73728 }, 24:{ span=24-31,56-63,88-95,120-127,152-159,184-191,216-223,248-255,280-287 cap=73728 }
> ERROR: groups don't span domain->span
>
> For CPU 9
> domain-0: span=8-15 level=SMT
> groups: 9:{ span=9 }, 10:{ span=10 }, 11:{ span=11 }, 12:{ span=12 }, 13:{ span=13 }, 14:{ span=14 }, 15:{ span=15 }, 8:{ span=8 }
> domain-1: span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 level=DIE
> groups: 8:{ span=8-15 cap=8192 }, 40:{ span=40-47 cap=8192 }, 72:{ span=72-79 cap=8192 }, 104:{ span=104-111 cap=8192 }, 136:{ span=136-143 cap=8192 }, 168:{ span=168-175 cap=8192 }, 200:{ span=200-207 cap=8192 }, 232:{ span=232-239 cap=8192 }, 264:{ span=264-271 cap=8192 }, 296:{ span=296-303 cap=8192 }
> domain-2: span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 level=NODE
> groups: 8:{ span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=81920 }
> domain-3: span=0-303 level=NUMA
> groups: 8:{ span=8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=81920 }, 16:{ span=16-23,48-55,80-87,112-119,144-151,176-183,208-215,240-247,272-279 cap=73728 }, 24:{ span=24-31,56-63,88-95,120-127,152-159,184-191,216-223,248-255,280-287 cap=73728 }
> ERROR: groups don't span domain->span
This is all very confused... and does not include the error we saw
earlier.
CPU 0 has: SMT, DIE, NODE
CPU 8 has: SMT, DIE, NODE, NUMA
Something is completely buggered in your topology setup.
^ permalink raw reply
* Re: [PATCH 2/2] sched/topology: Expose numa_mask set/clear functions to arch
From: Srikar Dronamraju @ 2018-08-31 10:27 UTC (permalink / raw)
To: Peter Zijlstra
Cc: Ingo Molnar, LKML, Mel Gorman, Rik van Riel, Thomas Gleixner,
Michael Ellerman, Heiko Carstens, Suravee Suthikulpanit,
linuxppc-dev, Benjamin Herrenschmidt
In-Reply-To: <20180829080219.GN24124@hirez.programming.kicks-ass.net>
* Peter Zijlstra <peterz@infradead.org> [2018-08-29 10:02:19]:
> On Fri, Aug 10, 2018 at 10:30:19PM +0530, Srikar Dronamraju wrote:
> > With commit 051f3ca02e46 ("sched/topology: Introduce NUMA identity node
> > sched domain") scheduler introduces an new numa level. However on shared
> > lpars like powerpc, this extra sched domain creation can lead to
> > repeated rcu stalls, sometimes even causing unresponsive systems on
> > boot. On such stalls, it was noticed that init_sched_groups_capacity()
> > (sg != sd->groups is always true).
> >
> > INFO: rcu_sched self-detected stall on CPU
> > 1-....: (240039 ticks this GP) idle=c32/1/4611686018427387906 softirq=782/782 fqs=80012
> > (t=240039 jiffies g=6272 c=6271 q=263040)
> > NMI backtrace for cpu 1
>
> > --- interrupt: 901 at __bitmap_weight+0x70/0x100
> > LR = __bitmap_weight+0x78/0x100
> > [c00000832132f9b0] [c0000000009bb738] __func__.61127+0x0/0x20 (unreliable)
> > [c00000832132fa00] [c00000000016c178] build_sched_domains+0xf98/0x13f0
> > [c00000832132fb30] [c00000000016d73c] partition_sched_domains+0x26c/0x440
> > [c00000832132fc20] [c0000000001ee284] rebuild_sched_domains_locked+0x64/0x80
> > [c00000832132fc50] [c0000000001f11ec] rebuild_sched_domains+0x3c/0x60
> > [c00000832132fc80] [c00000000007e1c4] topology_work_fn+0x24/0x40
> > [c00000832132fca0] [c000000000126704] process_one_work+0x1a4/0x470
> > [c00000832132fd30] [c000000000126a68] worker_thread+0x98/0x540
> > [c00000832132fdc0] [c00000000012f078] kthread+0x168/0x1b0
> > [c00000832132fe30] [c00000000000b65c]
> > ret_from_kernel_thread+0x5c/0x80
> >
> > Similar problem was earlier also reported at
> > https://lwn.net/ml/linux-kernel/20180512100233.GB3738@osiris/
> >
> > Allow arch to set and clear masks corresponding to numa sched domain.
>
> What this Changelog fails to do is explain the problem and motivate why
> this is the right solution.
>
> As-is, this reads like, something's buggered, I changed this random thing
> and it now works.
>
> So what is causing that domain construction error?
>
Powerpc lpars running on Phyp have 2 modes. Dedicated and shared.
Dedicated lpars are similar to kvm guest with vcpupin.
Shared lpars are similar to kvm guest without any pinning. When running
shared lpar mode, Phyp allows overcommitting. Now if more lpars are
created/destroyed, Phyp will internally move / consolidate the cores. The
objective is similar to what autonuma tries achieves on the host but with a
different approach (consolidating to optimal nodes to achieve the best
possible output). This would mean that the actual underlying cpus/node
mapping has changed. Phyp will propogate upwards an event to the lpar. The
lpar / os can choose to ignore or act on the same.
We have found that acting on the event will provide upto 40% improvement
over ignoring the event. Acting on the event would mean moving the cpu from
one node to the other, and topology_work_fn exactly does that.
In the case where we didn't have the NUMA sched domain, we would build the
independent (aka overlap) sched_groups. With NUMA sched domain
introduction, we try to reuse sched_groups (aka non-overlay). This results
in the above, which I thought I tried to explain in
https://lwn.net/ml/linux-kernel/20180810164533.GB42350@linux.vnet.ibm.com
In the typical case above, lets take 2 node, 8 core each having SMT 8
threads. Initially all the 8 cores might come from node 0. Hence
sched_domains_numa_masks[NODE][node1] and
sched_domains_numa_mask[NUMA][node1] is set at sched_init_numa will have
blank cpumasks.
Let say Phyp decides to move some of the load to another node, node 1, which
till now has 0 cpus. Hence we will see
"BUG: arch topology borken \n the DIE domain not a subset of the NODE
domain" which is probably okay. This problem is even present even before
NODE domain was created and systems still booted and ran.
However with the introduction of NODE sched_domain,
init_sched_groups_capacity() gets called for non-overlay sched_domains which
gets us into even worse problems. Here we will end up in a situation where
sgA->sgB->sgC-sgD->sgA gets converted into sgA->sgB->sgC->sgB which ends up
creating cpu stalls.
So the request is to expose the sched_domains_numa_masks_set /
sched_domains_numa_masks_clear to arch, so that on topology update i.e event
from phyp, arch set the mask correctly. The scheduler seems to take care of
everything else.
--
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* Re: [PATCH] sched/topology: Use Identity node only if required
From: Srikar Dronamraju @ 2018-08-31 10:22 UTC (permalink / raw)
To: Peter Zijlstra
Cc: Ingo Molnar, LKML, Mel Gorman, Rik van Riel, Thomas Gleixner,
Michael Ellerman, Heiko Carstens, Suravee Suthikulpanit,
linuxppc-dev, Andre Wild, Benjamin Herrenschmidt
In-Reply-To: <20180829084348.GO24124@hirez.programming.kicks-ass.net>
* Peter Zijlstra <peterz@infradead.org> [2018-08-29 10:43:48]:
> On Fri, Aug 10, 2018 at 09:45:33AM -0700, Srikar Dronamraju wrote:
>=20
> > ....
> > CPU302 attaching NULL sched-domain.
> > CPU303 attaching NULL sched-domain.
> > BUG: arch topology borken
> > the DIE domain not a subset of the NODE domain
>=20
> ^^^^^ CLUE!!
>=20
> but nowhere did you show what it thinks the DIE mask is.
>=20
> > CPU0 attaching sched-domain(s):
> > domain-2: sdA, span=3D0-303 level=3DNODE
> > groups: sg=3DsgL 0:{ span=3D0-7,32-39,64-71,96-103,128-135,160-167,=
192-199,224-231,256-263,288-295 cap=3D81920 }, sgM 8:{ span=3D8-15,40-47,72=
-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303 cap=3D81920 }, =
sdN 16:{ span=3D16-23,48-55,80-87,112-119,144-151,176-183,208-215,240-247,2=
72-279 cap=3D73728 }, sgO 24:{ span=3D24-31,56-63,88-95,120-127,152-159,184=
-191,216-223,248-255,280-287 cap=3D73728 }
> > CPU1 attaching sched-domain(s):
> > domain-2: sdB, span=3D0-303 level=3DNODE
> > [ 367.739387] groups: sg=3DsgL 0:{ span=3D0-7,32-39,64-71,96-103,1=
28-135,160-167,192-199,224-231,256-263,288-295 cap=3D81920 }, sgM 8:{ span=
=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239,264-271,296-303=
cap=3D81920 }, sdN 16:{ span=3D16-23,48-55,80-87,112-119,144-151,176-183,2=
08-215,240-247,272-279 cap=3D73728 }, sgO 24:{ span=3D24-31,56-63,88-95,120=
-127,152-159,184-191,216-223,248-255,280-287 cap=3D73728 }
>=20
> You forgot to provide the rest of it... what's domain-[01] look like?
At boot: Before topology update.
For CPU 0=20
domain-0: span=3D0-7 level=3DSMT
groups: 0:{ span=3D0 }, 1:{ span=3D1 }, 2:{ span=3D2 }, 3:{ span=3D3 }, 4:=
{ span=3D4 }, 5:{ span=3D5 }, 6:{ span=3D6 }, 7:{ span=3D7 }
domain-1: span=3D0-303 level=3DDIE
groups: 0:{ span=3D0-7 cap=3D8192 }, 8:{ span=3D8-15 cap=3D8192 }, 16:{ s=
pan=3D16-23 cap=3D8192 }, 24:{ span=3D24-31 cap=3D8192 }, 32:{ span=3D32-39=
cap=3D8192 }, 40:{ span=3D40-47 cap=3D8192 }, 48:{ span=3D48-55 cap=3D8192=
}, 56:{ span=3D56-63 cap=3D8192 }, 64:{ span=3D64-71 cap=3D8192 }, 72:{ sp=
an=3D72-79 cap=3D8192 }, 80:{ span=3D80-87 cap=3D8192 }, 88:{ span=3D88-95 =
cap=3D8192 }, 96:{ span=3D96-103 cap=3D8192 }, 104:{ span=3D104-111 cap=3D8=
192 }, 112:{ span=3D112-119 cap=3D8192 }, 120:{ span=3D120-127 cap=3D8192 }=
, 128:{ span=3D128-135 cap=3D8192 }, 136:{ span=3D136-143 cap=3D8192 }, 144=
:{ span=3D144-151 cap=3D8192 }, 152:{ span=3D152-159 cap=3D8192 }, 160:{ sp=
an=3D160-167 cap=3D8192 }, 168:{ span=3D168-175 cap=3D8192 }, 176:{ span=3D=
176-183 cap=3D8192 }, 184:{ span=3D184-191 cap=3D8192 }, 192:{ span=3D192-1=
99 cap=3D8192 }, 200:{ span=3D200-207 cap=3D8192 }, 208:{ span=3D208-215 ca=
p=3D8192 }, 216:{ span=3D216-223 cap=3D8192 }, 224:{ span=3D224-231 cap=3D8=
192 }, 232:{ span=3D232-239 cap=3D8192 }, 240:{ span=3D240-247 cap=3D8192 }=
, 248:{ span=3D248-255 cap=3D8192 }, 256:{ span=3D256-263 cap=3D8192 }, 264=
:{ span=3D264-271 cap=3D8192 }, 272:{ span=3D272-279 cap=3D8192 }, 280:{ sp=
an=3D280-287 cap=3D8192 }, 288:{ span=3D288-295 cap=3D8192 }, 296:{ span=3D=
296-303 cap=3D8192 }
For CPU 1=20
domain-0: span=3D0-7 level=3DSMT
groups: 1:{ span=3D1 }, 2:{ span=3D2 }, 3:{ span=3D3 }, 4:{ span=3D4 }, 5:=
{ span=3D5 }, 6:{ span=3D6 }, 7:{ span=3D7 }, 0:{ span=3D0 }
domain-1: span=3D0-303 level=3DDIE
groups: 0:{ span=3D0-7 cap=3D8192 }, 8:{ span=3D8-15 cap=3D8192 }, 16:{ s=
pan=3D16-23 cap=3D8192 }, 24:{ span=3D24-31 cap=3D8192 }, 32:{ span=3D32-39=
cap=3D8192 }, 40:{ span=3D40-47 cap=3D8192 }, 48:{ span=3D48-55 cap=3D8192=
}, 56:{ span=3D56-63 cap=3D8192 }, 64:{ span=3D64-71 cap=3D8192 }, 72:{ sp=
an=3D72-79 cap=3D8192 }, 80:{ span=3D80-87 cap=3D8192 }, 88:{ span=3D88-95 =
cap=3D8192 }, 96:{ span=3D96-103 cap=3D8192 }, 104:{ span=3D104-111 cap=3D8=
192 }, 112:{ span=3D112-119 cap=3D8192 }, 120:{ span=3D120-127 cap=3D8192 }=
, 128:{ span=3D128-135 cap=3D8192 }, 136:{ span=3D136-143 cap=3D8192 }, 144=
:{ span=3D144-151 cap=3D8192 }, 152:{ span=3D152-159 cap=3D8192 }, 160:{ sp=
an=3D160-167 cap=3D8192 }, 168:{ span=3D168-175 cap=3D8192 }, 176:{ span=3D=
176-183 cap=3D8192 }, 184:{ span=3D184-191 cap=3D8192 }, 192:{ span=3D192-1=
99 cap=3D8192 }, 200:{ span=3D200-207 cap=3D8192 }, 208:{ span=3D208-215 ca=
p=3D8192}, 216:{ span=3D216-223 cap=3D8192 }, 224:{ span=3D224-231 cap=3D81=
92 }, 232:{ span=3D232-239 cap=3D8192 }, 240:{ span=3D240-247 cap=3D8192 },=
248:{ span=3D248-255 cap=3D8192 }, 256:{ span=3D256-263 cap=3D8192 }, 264:=
{ span=3D264-271 cap=3D8192 }, 272:{ span=3D272-279 cap=3D8192 }, 280:{ spa=
n=3D280-287 cap=3D8192 }, 288:{ span=3D288-295 cap=3D8192 }, 296:{ span=3D2=
96-303 cap=3D8192 }
For CPU 8
domain-0: span=3D8-15 level=3DSMT
groups: 8:{ span=3D8 }, 9:{ span=3D9 }, 10:{ span=3D10 }, 11:{ span=3D11 }=
, 12:{ span=3D12 }, 13:{ span=3D13 }, 14:{ span=3D14 }, 15:{ span=3D15 }
domain-1: span=3D0-303 level=3DDIE
groups: 8:{ span=3D8-15 cap=3D8192 }, 16:{ span=3D16-23 cap=3D8192 }, 24:=
{ span=3D24-31 cap=3D8192 }, 32:{ span=3D32-39 cap=3D8192 }, 40:{ span=3D40=
-47 cap=3D8192 }, 48:{ span=3D48-55 cap=3D8192 }, 56:{ span=3D56-63 cap=3D8=
192 }, 64:{ span=3D64-71 cap=3D8192 }, 72:{ span=3D72-79 cap=3D8192 }, 80:{=
span=3D80-87 cap=3D8192 }, 88:{ span=3D88-95 cap=3D8192 }, 96:{ span=3D96-=
103 cap=3D8192 }, 104:{ span=3D104-111 cap=3D8192 }, 112:{ span=3D112-119 c=
ap=3D8192 }, 120:{ span=3D120-127 cap=3D8192 }, 128:{ span=3D128-135 cap=3D=
8192 }, 136:{ span=3D136-143 cap=3D8192 }, 144:{ span=3D144-151 cap=3D8192 =
}, 152:{ span=3D152-159 cap=3D8192 }, 160:{ span=3D160-167 cap=3D8192 }, 16=
8:{ span=3D168-175 cap=3D8192 }, 176:{ span=3D176-183 cap=3D8192 }, 184:{ s=
pan=3D184-191 cap=3D8192 }, 192:{ span=3D192-199 cap=3D8192 }, 200:{ span=
=3D200-207 cap=3D8192 }, 208:{ span=3D208-215 cap=3D8192 }, 216:{ span=3D21=
6-223 cap=3D8192 }, 224:{ span=3D224-231 cap=3D8192 }, 232:{ span=3D232-239=
cap=3D8192 }, 240:{ span=3D240-247 cap=3D8192 }, 248:{ span=3D248-255 cap=
=3D8192 }, 256:{ span=3D256-263 cap=3D8192 }, 264:{ span=3D264-271 cap=3D81=
92 }, 272:{ span=3D272-279 cap=3D8192 }, 280:{ span=3D280-287 cap=3D8192 },=
288:{ span=3D288-295 cap=3D8192 }, 296:{ span=3D296-303 cap=3D8192 }, 0:{ =
span=3D0-7 cap=3D8192 }
For CPU 9=20
domain-0: span=3D8-15 level=3DSMT
groups: 9:{ span=3D9 }, 10:{ span=3D10 }, 11:{ span=3D11 }, 12:{ span=3D12=
}, 13:{ span=3D13 }, 14:{ span=3D14 }, 15:{ span=3D15 }, 8:{ span=3D8 }
domain-1: span=3D0-303 level=3DDIE
groups: 8:{ span=3D8-15 cap=3D8192 }, 16:{ span=3D16-23 cap=3D8192 }, 24:=
{ span=3D24-31 cap=3D8192 }, 32:{ span=3D32-39 cap=3D8192 }, 40:{ span=3D40=
-47 cap=3D8192 }, 48:{ span=3D48-55 cap=3D8192 }, 56:{ span=3D56-63 cap=3D8=
192 }, 64:{ span=3D64-71 cap=3D8192 }, 72:{ span=3D72-79 cap=3D8192 }, 80:{=
span=3D80-87 cap=3D8192 }, 88:{ span=3D88-95 cap=3D8192 }, 96:{ span=3D96-=
103 cap=3D8192 }, 104:{ span=3D104-111 cap=3D8192 }, 112:{ span=3D112-119 c=
ap=3D8192 }, 120:{ span=3D120-127 cap=3D8192 }, 128:{ span=3D128-135 cap=3D=
8192 }, 136:{ span=3D136-143 cap=3D8192 }, 144:{ span=3D144-151 cap=3D8192 =
}, 152:{ span=3D152-159 cap=3D8192 }, 160:{ span=3D160-167 cap=3D8192 }, 16=
8:{ span=3D168-175 cap=3D8192 }, 176:{ span=3D176-183 cap=3D8192 }, 184:{ s=
pan=3D184-191 cap=3D8192 }, 192:{ span=3D192-199 cap=3D8192 }, 200:{ span=
=3D200-207 cap=3D8192 }, 208:{ span=3D208-215 cap=3D8192 }, 216:{ span=3D21=
6-223 cap=3D8192 }, 224:{ span=3D224-231 cap=3D8192 }, 232:{ span=3D232-239=
cap=3D8192 }, 240:{ span=3D240-247 cap=3D8192 }, 248:{ span=3D248-255 cap=
=3D8192 }, 256:{ span=3D256-263 cap=3D8192 }, 264:{ span=3D264-271 cap=3D81=
92 }, 272:{ span=3D272-279 cap=3D8192 }, 280:{ span=3D280-287 cap=3D8192 },=
288:{ span=3D288-295 cap=3D8192 }, 296:{ span=3D296-303 cap=3D8192 }, 0:{ =
span=3D0-7 cap=3D8192 }
After topology update.
For CPU 0
domain-0: span=3D0-7 level=3DSMT
groups: 0:{ span=3D0 }, 1:{ span=3D1 }, 2:{ span=3D2 }, 3:{ span=3D3 }, 4:=
{ span=3D4 }, 5:{ span=3D5 }, 6:{ span=3D6 }, 7:{ span=3D7 }
domain-1: span=3D0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-231,25=
6-263,288-295 level=3DDIE
groups: 0:{ span=3D0-7 cap=3D8192 }, 32:{ span=3D32-39 cap=3D8192 }, 64:{=
span=3D64-71 cap=3D8192 }, 96:{ span=3D96-103 cap=3D8192 }, 128:{ span=3D1=
28-135 cap=3D8192 }, 160:{ span=3D160-167 cap=3D8192 }, 192:{ span=3D192-19=
9 cap=3D8192 }, 224:{ span=3D224-231 cap=3D8192 }, 256:{ span=3D256-263 cap=
=3D8192 }, 288:{ span=3D288-295 cap=3D8192 }
domain-2: span=3D0-303 level=3DNODE
groups: 0:{ span=3D0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-23=
1,256-263,288-295 cap=3D81920 }, 8:{ span=3D8-15,40-47,72-79,104-111,136-14=
3,168-175,200-207,232-239,264-271,296-303 cap=3D81920 }, 16:{ span=3D16-23,=
48-55,80-87,112-119,144-151,176-183,208-215,240-247,272-279 cap=3D73728 }, =
24:{ span=3D24-31,56-63,88-95,120-127,152-159,184-191,216-223,248-255,280-2=
87 cap=3D73728 }
For CPU 1
domain-0: span=3D0-7 level=3DSMT
groups: 1:{ span=3D1 }, 2:{ span=3D2 }, 3:{ span=3D3 }, 4:{ span=3D4 }, 5:=
{ span=3D5 }, 6:{ span=3D6 }, 7:{ span=3D7 }, 0:{ span=3D0 }
domain-1: span=3D0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-231,25=
6-263,288-295 level=3DDIE
groups: 0:{ span=3D0-7 cap=3D8192 }, 32:{ span=3D32-39 cap=3D8192 }, 64:{=
span=3D64-71 cap=3D8192 }, 96:{ span=3D96-103 cap=3D8192 }, 128:{ span=3D1=
28-135 cap=3D8192 }, 160:{ span=3D160-167 cap=3D8192 }, 192:{ span=3D192-19=
9 cap=3D8192 }, 224:{ span=3D224-231 cap=3D8192 }, 256:{ span=3D256-263 cap=
=3D8192 }, 288:{ span=3D288-295 cap=3D8192 }
domain-2: span=3D0-303 level=3DNODE
groups: 0:{ span=3D0-7,32-39,64-71,96-103,128-135,160-167,192-199,224-23=
1,256-263,288-295 cap=3D81920 }, 8:{ span=3D8-15,40-47,72-79,104-111,136-14=
3,168-175,200-207,232-239,264-271,296-303 cap=3D81920 }, 16:{ span=3D16-23,=
48-55,80-87,112-119,144-151,176-183,208-215,240-247,272-279 cap=3D73728 }, =
24:{ span=3D24-31,56-63,88-95,120-127,152-159,184-191,216-223,248-255,280-2=
87 cap=3D73728 }
For CPU 8
domain-0: span=3D8-15 level=3DSMT
groups: 8:{ span=3D8 }, 9:{ span=3D9 }, 10:{ span=3D10 }, 11:{ span=3D11 =
}, 12:{ span=3D12 }, 13:{ span=3D13 }, 14:{ span=3D14 }, 15:{ span=3D15 }
domain-1: span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239=
,264-271,296-303 level=3DDIE
groups: 8:{ span=3D8-15 cap=3D8192 }, 40:{ span=3D40-47 cap=3D8192 }, 72=
:{ span=3D72-79 cap=3D8192 }, 104:{ span=3D104-111 cap=3D8192 }, 136:{ span=
=3D136-143 cap=3D8192 }, 168:{ span=3D168-175 cap=3D8192 }, 200:{ span=3D20=
0-207 cap=3D8192 }, 232:{ span=3D232-239 cap=3D8192 }, 264:{ span=3D264-271=
cap=3D8192 }, 296:{ span=3D296-303 cap=3D8192 }
domain-2: span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-23=
9,264-271,296-303 level=3DNODE
groups: 8:{ span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232=
-239,264-271,296-303 cap=3D81920 }
domain-3: span=3D0-303 level=3DNUMA
groups: 8:{ span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,23=
2-239,264-271,296-303 cap=3D81920 }, 16:{ span=3D16-23,48-55,80-87,112-119,=
144-151,176-183,208-215,240-247,272-279 cap=3D73728 }, 24:{ span=3D24-31,56=
-63,88-95,120-127,152-159,184-191,216-223,248-255,280-287 cap=3D73728 }
ERROR: groups don't span domain->span
For CPU 9
domain-0: span=3D8-15 level=3DSMT
groups: 9:{ span=3D9 }, 10:{ span=3D10 }, 11:{ span=3D11 }, 12:{ span=3D1=
2 }, 13:{ span=3D13 }, 14:{ span=3D14 }, 15:{ span=3D15 }, 8:{ span=3D8 }
domain-1: span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-239=
,264-271,296-303 level=3DDIE
groups: 8:{ span=3D8-15 cap=3D8192 }, 40:{ span=3D40-47 cap=3D8192 }, 72=
:{ span=3D72-79 cap=3D8192 }, 104:{ span=3D104-111 cap=3D8192 }, 136:{ span=
=3D136-143 cap=3D8192 }, 168:{ span=3D168-175 cap=3D8192 }, 200:{ span=3D20=
0-207 cap=3D8192 }, 232:{ span=3D232-239 cap=3D8192 }, 264:{ span=3D264-271=
cap=3D8192 }, 296:{ span=3D296-303 cap=3D8192 }
domain-2: span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232-23=
9,264-271,296-303 level=3DNODE
groups: 8:{ span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,232=
-239,264-271,296-303 cap=3D81920 }
domain-3: span=3D0-303 level=3DNUMA
groups: 8:{ span=3D8-15,40-47,72-79,104-111,136-143,168-175,200-207,23=
2-239,264-271,296-303 cap=3D81920 }, 16:{ span=3D16-23,48-55,80-87,112-119,=
144-151,176-183,208-215,240-247,272-279 cap=3D73728 }, 24:{ span=3D24-31,56=
-63,88-95,120-127,152-159,184-191,216-223,248-255,280-287 cap=3D73728 }
ERROR: groups don't span domain->span
--=20
Thanks and Regards
Srikar Dronamraju
^ permalink raw reply
* [PATCH 2/2] powerpc/kexec: avoid hard coding when automatically allocating mem for crashkernel
From: Pingfan Liu @ 2018-08-31 7:30 UTC (permalink / raw)
To: linuxppc-dev
Cc: Pingfan Liu, Benjamin Herrenschmidt, Michael Ellerman,
Hari Bathini, Mahesh Salgaonkar, Anton Blanchard
In-Reply-To: <1535700623-23750-1-git-send-email-kernelfans@gmail.com>
If no start address is specified for crashkernel, the current program hard
code as: crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
This limits the candidate memory region, and may cause failure while there
is enough mem for crashkernel. This patch suggests to find a suitable mem
chunk by memblock_find_in_range()
Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Hari Bathini <hbathini@linux.ibm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: Anton Blanchard <anton@samba.org>
---
arch/powerpc/kernel/machine_kexec.c | 24 +++++++++++++++---------
arch/powerpc/kernel/prom.c | 7 +++++--
2 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index 63f5a93..78005bf 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -22,6 +22,9 @@
#include <asm/pgalloc.h>
#include <asm/prom.h>
#include <asm/sections.h>
+#include <asm/mmu.h>
+
+#include "setup.h"
void machine_kexec_mask_interrupts(void) {
unsigned int i;
@@ -117,6 +120,7 @@ void machine_kexec(struct kimage *image)
void __init reserve_crashkernel(void)
{
unsigned long long crash_size, crash_base;
+ phys_addr_t start, up_boundary;
int ret;
/* use common parsing */
@@ -146,22 +150,24 @@ void __init reserve_crashkernel(void)
#else
if (!crashk_res.start) {
#ifdef CONFIG_PPC64
- /*
- * On 64bit we split the RMO in half but cap it at half of
- * a small SLB (128MB) since the crash kernel needs to place
- * itself and some stacks to be in the first segment.
- */
- crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
+ up_boundary = min(ppc64_bolted_size(), ppc64_rma_size);
+ start = memblock_find_in_range(KDUMP_KERNELBASE, up_boundary,
+ crash_size, PAGE_SIZE);
+ if (start == 0) {
+ pr_err("Failed to reserve memory for crashkernel!\n");
+ crashk_res.start = crashk_res.end = 0;
+ return;
+ } else
+ crashk_res.start = start;
#else
crashk_res.start = KDUMP_KERNELBASE;
#endif
}
- crash_base = PAGE_ALIGN(crashk_res.start);
- if (crash_base != crashk_res.start) {
+ if (crashk_res.start != PAGE_ALIGN(crashk_res.start)) {
printk("Crash kernel base must be aligned to 0x%lx\n",
PAGE_SIZE);
- crashk_res.start = crash_base;
+ crashk_res.start = PAGE_ALIGN(crashk_res.start);
}
#endif
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index cae4a78..8b2ab99 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -688,6 +688,7 @@ static void tm_init(void) { }
void __init early_init_devtree(void *params)
{
phys_addr_t limit;
+ bool fadump_enabled = false;
DBG(" -> early_init_devtree(%p)\n", params);
@@ -737,9 +738,9 @@ void __init early_init_devtree(void *params)
* If we fail to reserve memory for firmware-assisted dump then
* fallback to kexec based kdump.
*/
- if (fadump_reserve_mem() == 0)
+ if (fadump_reserve_mem() == 1)
+ fadump_enabled = true;
#endif
- reserve_crashkernel();
early_reserve_mem();
/* Ensure that total memory size is page-aligned. */
@@ -761,6 +762,8 @@ void __init early_init_devtree(void *params)
dt_cpu_ftrs_scan();
mmu_early_init_devtree();
+ if (!fadump_enabled)
+ reserve_crashkernel();
/* Retrieve CPU related informations from the flat tree
* (altivec support, boot CPU ID, ...)
--
2.7.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/prom: move mmu_early_init_devtree() before early_init_dt_scan_cpus()
From: Pingfan Liu @ 2018-08-31 7:30 UTC (permalink / raw)
To: linuxppc-dev
Cc: Pingfan Liu, Benjamin Herrenschmidt, Michael Ellerman,
Hari Bathini, Mahesh Salgaonkar, Anton Blanchard
In-Reply-To: <1535700623-23750-1-git-send-email-kernelfans@gmail.com>
In early_init_dt_scan_cpus() -> allocate_paca(), using ppc64_bolted_size()
to get the limitation. Although MMU_SEGSIZE_256M is enough for boot cpu's
paca, but in fact the bolted segment size may be MMU_SEGSIZE_1T. Hence
moving mmu_early_init_devtree() a little earlier, and let any callers of
ppc64_bolted_size() get the right value.
Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Hari Bathini <hbathini@linux.ibm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: Anton Blanchard <anton@samba.org>
---
arch/powerpc/kernel/prom.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index c4d7078..cae4a78 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -760,6 +760,7 @@ void __init early_init_devtree(void *params)
DBG("Scanning CPUs ...\n");
dt_cpu_ftrs_scan();
+ mmu_early_init_devtree();
/* Retrieve CPU related informations from the flat tree
* (altivec support, boot CPU ID, ...)
@@ -777,8 +778,6 @@ void __init early_init_devtree(void *params)
spinning_secondaries = boot_cpu_count - 1;
#endif
- mmu_early_init_devtree();
-
#ifdef CONFIG_PPC_POWERNV
/* Scan and build the list of machine check recoverable ranges */
of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL);
--
2.7.4
^ permalink raw reply related
* [PATCH 0/2] powerpc/kexec: automatically allocating mem for crashkernel=Y
From: Pingfan Liu @ 2018-08-31 7:30 UTC (permalink / raw)
To: linuxppc-dev
Cc: Pingfan Liu, Benjamin Herrenschmidt, Michael Ellerman,
Hari Bathini, Mahesh Salgaonkar, Anton Blanchard
If no start address is specified for crashkernel, the current program hard
code as: crashk_res.start = min(0x8000000ULL, (ppc64_rma_size / 2));
This limits the candidate memory region, and may cause failure while there
is enough mem for crashkernel. This patch suggests to find a suitable mem
chunk by memblock_find_in_range()
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Hari Bathini <hbathini@linux.ibm.com>
Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Cc: Anton Blanchard <anton@samba.org>
Pingfan Liu (2):
powerpc/prom: move mmu_early_init_devtree() before
early_init_dt_scan_cpus()
powerpc/kexec: avoid hard coding when automatically allocating mem for
crashkernel
arch/powerpc/kernel/machine_kexec.c | 24 +++++++++++++++---------
arch/powerpc/kernel/prom.c | 10 ++++++----
2 files changed, 21 insertions(+), 13 deletions(-)
--
2.7.4
^ permalink raw reply
* RE: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a
From: Andy Tang @ 2018-08-31 6:12 UTC (permalink / raw)
To: Scott Wood, Vabhav Sharma, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org, mturquette@baylibre.com,
sboyd@kernel.org, rjw@rjwysocki.net, viresh.kumar@linaro.org,
linux-clk@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kernel-owner@vger.kernel.org, catalin.marinas@arm.com,
will.deacon@arm.com, gregkh@linuxfoundation.org, arnd@arndb.de,
kstewart@linuxfoundation.org, yamada.masahiro@socionext.com
Cc: Yogesh Narayan Gaur, linux@armlinux.org.uk, Varun Sethi,
Udit Kumar
In-Reply-To: <b31ae8e788fb93971167faa9b55b497e838532c4.camel@buserror.net>
SGkgU2NvdHQsDQoNClBsZWFzZSBzZWUgbXkgcmVwbGF5IGlubGluZS4NCg0KPiAtLS0tLU9yaWdp
bmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBsaW51eC1hcm0ta2VybmVsIDxsaW51eC1hcm0ta2Vy
bmVsLWJvdW5jZXNAbGlzdHMuaW5mcmFkZWFkLm9yZz4NCj4gT24gQmVoYWxmIE9mIFNjb3R0IFdv
b2QNCj4gU2VudDogMjAxOMTqONTCMzHI1SAxOjQzDQo+IFRvOiBWYWJoYXYgU2hhcm1hIDx2YWJo
YXYuc2hhcm1hQG54cC5jb20+Ow0KPiBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnOyBkZXZp
Y2V0cmVlQHZnZXIua2VybmVsLm9yZzsNCj4gcm9iaCtkdEBrZXJuZWwub3JnOyBtYXJrLnJ1dGxh
bmRAYXJtLmNvbTsNCj4gbGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmc7IGxpbnV4LWFybS1r
ZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZzsNCj4gbXR1cnF1ZXR0ZUBiYXlsaWJyZS5jb207IHNi
b3lkQGtlcm5lbC5vcmc7IHJqd0Byand5c29ja2kubmV0Ow0KPiB2aXJlc2gua3VtYXJAbGluYXJv
Lm9yZzsgbGludXgtY2xrQHZnZXIua2VybmVsLm9yZzsNCj4gbGludXgtcG1Admdlci5rZXJuZWwu
b3JnOyBsaW51eC1rZXJuZWwtb3duZXJAdmdlci5rZXJuZWwub3JnOw0KPiBjYXRhbGluLm1hcmlu
YXNAYXJtLmNvbTsgd2lsbC5kZWFjb25AYXJtLmNvbTsNCj4gZ3JlZ2toQGxpbnV4Zm91bmRhdGlv
bi5vcmc7IGFybmRAYXJuZGIuZGU7DQo+IGtzdGV3YXJ0QGxpbnV4Zm91bmRhdGlvbi5vcmc7IHlh
bWFkYS5tYXNhaGlyb0Bzb2Npb25leHQuY29tDQo+IENjOiBZb2dlc2ggTmFyYXlhbiBHYXVyIDx5
b2dlc2huYXJheWFuLmdhdXJAbnhwLmNvbT47IEFuZHkgVGFuZw0KPiA8YW5keS50YW5nQG54cC5j
b20+OyBsaW51eEBhcm1saW51eC5vcmcudWs7IFZhcnVuIFNldGhpDQo+IDxWLlNldGhpQG54cC5j
b20+OyBVZGl0IEt1bWFyIDx1ZGl0Lmt1bWFyQG54cC5jb20+DQo+IFN1YmplY3Q6IFJlOiBbUEFU
Q0ggMy81XSBkcml2ZXJzOiBjbGstcW9yaXE6IEFkZCBjbG9ja2dlbiBzdXBwb3J0IGZvcg0KPiBs
eDIxNjBhDQo+IA0KPiBPbiBUaHUsIDIwMTgtMDgtMzAgYXQgMTI6MzkgLTA1MDAsIFNjb3R0IFdv
b2Qgd3JvdGU6DQo+ID4gT24gVGh1LCAyMDE4LTA4LTMwIGF0IDA3OjM2ICswMDAwLCBWYWJoYXYg
U2hhcm1hIHdyb3RlOg0KPiA+ID4gPiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiA+ID4g
PiBGcm9tOiBsaW51eC1rZXJuZWwtb3duZXJAdmdlci5rZXJuZWwub3JnIDxsaW51eC1rZXJuZWwt
DQo+ID4gPiA+IG93bmVyQHZnZXIua2VybmVsLm9yZz4gT24gQmVoYWxmIE9mIFNjb3R0IFdvb2QN
Cj4gPiA+ID4gU2VudDogV2VkbmVzZGF5LCBBdWd1c3QgMjksIDIwMTggNTo0OSBBTQ0KPiA+ID4g
PiBUbzogVmFiaGF2IFNoYXJtYSA8dmFiaGF2LnNoYXJtYUBueHAuY29tPjsgbGludXgtDQo+ID4g
PiA+IGtlcm5lbEB2Z2VyLmtlcm5lbC5vcmc7IGRldmljZXRyZWVAdmdlci5rZXJuZWwub3JnOw0K
PiA+ID4gPiByb2JoK2R0QGtlcm5lbC5vcmc7IG1hcmsucnV0bGFuZEBhcm0uY29tOw0KPiA+ID4g
PiBsaW51eHBwYy1kZXZAbGlzdHMub3psYWJzLm9yZzsgbGludXgtYXJtLQ0KPiA+ID4gPiBrZXJu
ZWxAbGlzdHMuaW5mcmFkZWFkLm9yZzsgbXR1cnF1ZXR0ZUBiYXlsaWJyZS5jb207DQo+ID4gPiA+
IHNib3lkQGtlcm5lbC5vcmc7IHJqd0Byand5c29ja2kubmV0OyB2aXJlc2gua3VtYXJAbGluYXJv
Lm9yZzsNCj4gPiA+ID4gbGludXgtY2xrQHZnZXIua2VybmVsLm9yZzsgbGludXgtcG1Admdlci5r
ZXJuZWwub3JnOw0KPiA+ID4gPiBsaW51eC1rZXJuZWwtb3duZXJAdmdlci5rZXJuZWwub3JnOw0K
PiA+ID4gPiBjYXRhbGluLm1hcmluYXNAYXJtLmNvbTsgd2lsbC5kZWFjb25AYXJtLmNvbTsNCj4g
PiA+ID4gZ3JlZ2toQGxpbnV4Zm91bmRhdGlvbi5vcmc7IGFybmRAYXJuZGIuZGU7DQo+ID4gPiA+
IGtzdGV3YXJ0QGxpbnV4Zm91bmRhdGlvbi5vcmc7IHlhbWFkYS5tYXNhaGlyb0Bzb2Npb25leHQu
Y29tDQo+ID4gPiA+IENjOiBZb2dlc2ggTmFyYXlhbiBHYXVyIDx5b2dlc2huYXJheWFuLmdhdXJA
bnhwLmNvbT47IEFuZHkNCj4gVGFuZw0KPiA+ID4gPiA8YW5keS50YW5nQG54cC5jb20+OyBVZGl0
IEt1bWFyIDx1ZGl0Lmt1bWFyQG54cC5jb20+Ow0KPiA+ID4gPiBsaW51eEBhcm1saW51eC5vcmcu
dWs7IFZhcnVuIFNldGhpIDxWLlNldGhpQG54cC5jb20+DQo+ID4gPiA+IFN1YmplY3Q6IFJlOiBb
UEFUQ0ggMy81XSBkcml2ZXJzOiBjbGstcW9yaXE6IEFkZCBjbG9ja2dlbiBzdXBwb3J0DQo+ID4g
PiA+IGZvciBseDIxNjBhDQo+ID4gPiA+DQo+ID4gPiA+IE9uIE1vbiwgMjAxOC0wOC0yMCBhdCAx
MjoxNyArMDUzMCwgVmFiaGF2IFNoYXJtYSB3cm90ZToNCj4gPiA+ID4gPiBGcm9tOiBZb2dlc2gg
R2F1ciA8eW9nZXNobmFyYXlhbi5nYXVyQG54cC5jb20+DQo+ID4gPiA+ID4NCj4gPiA+ID4gPiBB
ZGQgY2xvY2tnZW4gc3VwcG9ydCBmb3IgbHgyMTYwYS4NCj4gPiA+ID4gPiBBZGRlZCBlbnRyeSBm
b3IgY29tcGF0ICdmc2wsbHgyMTYwYS1jbG9ja2dlbicuDQo+ID4gPiA+ID4gQXMgTFgyMTYwQSBp
cyAxNiBjb3JlLCBzbyBtb2RpZmllZCB2YWx1ZSBmb3IgTlVNX0NNVVgNCj4gPiA+ID4gPg0KPiA+
ID4gPiA+IFNpZ25lZC1vZmYtYnk6IFRhbmcgWXVhbnRpYW4gPGFuZHkudGFuZ0BueHAuY29tPg0K
PiA+ID4gPiA+IFNpZ25lZC1vZmYtYnk6IFlvZ2VzaCBHYXVyIDx5b2dlc2huYXJheWFuLmdhdXJA
bnhwLmNvbT4NCj4gPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBWYWJoYXYgU2hhcm1hIDx2YWJoYXYu
c2hhcm1hQG54cC5jb20+DQo+ID4gPiA+ID4gLS0tDQo+ID4gPiA+ID4gIGRyaXZlcnMvY2xrL2Ns
ay1xb3JpcS5jICAgICAgICAgfCAxNCArKysrKysrKysrKysrLQ0KPiA+ID4gPiA+ICBkcml2ZXJz
L2NwdWZyZXEvcW9yaXEtY3B1ZnJlcS5jIHwgIDEgKw0KPiA+ID4gPiA+ICAyIGZpbGVzIGNoYW5n
ZWQsIDE0IGluc2VydGlvbnMoKyksIDEgZGVsZXRpb24oLSkNCj4gPiA+ID4gPg0KPiA+ID4gPiA+
IGRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9jbGstcW9yaXEuYyBiL2RyaXZlcnMvY2xrL2Nsay1x
b3JpcS5jDQo+ID4gPiA+ID4gaW5kZXgNCj4gPiA+ID4gPiAzYTE4MTJmLi5mYzZlMzA4IDEwMDY0
NA0KPiA+ID4gPiA+IC0tLSBhL2RyaXZlcnMvY2xrL2Nsay1xb3JpcS5jDQo+ID4gPiA+ID4gKysr
IGIvZHJpdmVycy9jbGsvY2xrLXFvcmlxLmMNCj4gPiA+ID4gPiBAQCAtNjAsNyArNjAsNyBAQCBz
dHJ1Y3QgY2xvY2tnZW5fbXV4aW5mbyB7ICB9Ow0KPiA+ID4gPiA+DQo+ID4gPiA+ID4gICNkZWZp
bmUgTlVNX0hXQUNDRUwJNQ0KPiA+ID4gPiA+IC0jZGVmaW5lIE5VTV9DTVVYCTgNCj4gPiA+ID4g
PiArI2RlZmluZSBOVU1fQ01VWAkxNg0KPiA+ID4gPiA+DQo+ID4gPiA+ID4gIHN0cnVjdCBjbG9j
a2dlbjsNCj4gPiA+ID4gPg0KPiA+ID4gPiA+IEBAIC01NzAsNiArNTcwLDE3IEBAIHN0YXRpYyBj
b25zdCBzdHJ1Y3QgY2xvY2tnZW5fY2hpcGluZm8NCj4gPiA+ID4gPiBjaGlwaW5mb1tdID0gew0K
PiA+ID4gPiA+ICAJCS5mbGFncyA9IENHX1ZFUjMgfCBDR19MSVRUTEVfRU5ESUFOLA0KPiA+ID4g
PiA+ICAJfSwNCj4gPiA+ID4gPiAgCXsNCj4gPiA+ID4gPiArCQkuY29tcGF0ID0gImZzbCxseDIx
NjBhLWNsb2NrZ2VuIiwNCj4gPiA+ID4gPiArCQkuY211eF9ncm91cHMgPSB7DQo+ID4gPiA+ID4g
KwkJCSZjbG9ja2dlbjJfY211eF9jZ2ExMiwgJmNsb2NrZ2VuMl9jbXV4X2NnYg0KPiA+ID4gPiA+
ICsJCX0sDQo+ID4gPiA+ID4gKwkJLmNtdXhfdG9fZ3JvdXAgPSB7DQo+ID4gPiA+ID4gKwkJCTAs
IDAsIDAsIDAsIDEsIDEsIDEsIDEsIC0xDQo+ID4gPiA+ID4gKwkJfSwNCj4gPiA+ID4gPiArCQku
cGxsX21hc2sgPSAweDM3LA0KPiA+ID4gPiA+ICsJCS5mbGFncyA9IENHX1ZFUjMgfCBDR19MSVRU
TEVfRU5ESUFOLA0KPiA+ID4gPiA+ICsJfSwNCj4gPiA+ID4NCj4gPiA+ID4gV2h5IGFyZSB5b3Ug
aW5jcmVhc2luZyBOVU1fQ01VWCBiZXlvbmQgOCBmb3IgYSBjaGlwIHRoYXQgb25seQ0KPiBoYXMN
Cj4gPiA+ID4gOCBlbnRyaWVzIGluIGNtdXhfdG9fZ3JvdXA/DQo+ID4gPg0KPiA+ID4gQ29uZmln
dXJhdGlvbiBpcyAxNiBjb3Jlcyw4IGNsdXN0ZXIgd2l0aCAyIGNvcmVzIGluIGVhY2ggY2x1c3Rl
cg0KPiA+DQo+ID4gU28/ICBUaGlzIGlzIGFib3V0IGNtdXhlcywgbm90IGNvcmVzLiAgWW91J3Jl
IGluY3JlYXNpbmcgdGhlIGFycmF5DQo+ID4gd2l0aG91dCBldmVyIHVzaW5nIHRoZSBuZXcgc2l6
ZS4NCj4gDQo+IE9oLCBhbmQgeW91IGFsc28gYnJva2UgcDQwODAgd2hpY2ggaGFzIDggY211eGVz
IGJ1dCBubyAtMSB0ZXJtaW5hdG9yLA0KPiBiZWNhdXNlIHRoZSBhcnJheSB3YXMgb2YgbGVuZ3Ro
IDguICBQcm9iYWJseSB0aGUgYXJyYXkgc2hvdWxkIGJlIGNoYW5nZWQNCj4gdG8gTlVNX0NNVVgr
MSBzbyBldmVyeSBhcnJheSBjYW4gYmUgLTEgdGVybWluYXRlZC4NCj4gDQpbQW5keV0gSG93IGFi
b3V0IHdlIGFkZCAtMSB0ZXJtaW5hdG9yIHRvIHA0MDgwIGFuZCBpbmNyZWFzZSBOVU1fQ01VWCB0
byAxNj8NCldlIGRvbid0IHdhbnQgdG8gaW5jcmVhc2UgTlVNX0NNVVggZWFjaCB0aW1lIG5ldyBz
b2Mgd2l0aCBtb3JlIGNtdXhlcyBhZGRlZC4NCg0KQlIsDQpBbmR5IFRhbmcNCg0KPiAtU2NvdHQN
Cj4gDQo+IA0KPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
Xw0KPiBsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdA0KPiBsaW51eC1hcm0ta2VybmVsQGxp
c3RzLmluZnJhZGVhZC5vcmcNCj4gaHR0cHM6Ly9lbWVhMDEuc2FmZWxpbmtzLnByb3RlY3Rpb24u
b3V0bG9vay5jb20vP3VybD1odHRwJTNBJTJGJTJGbGlzdA0KPiBzLmluZnJhZGVhZC5vcmclMkZt
YWlsbWFuJTJGbGlzdGluZm8lMkZsaW51eC1hcm0ta2VybmVsJmFtcDtkYXRhPTAyDQo+ICU3QzAx
JTdDYW5keS50YW5nJTQwbnhwLmNvbSU3Qzk2M2QwY2RmNDk5NjQ1MzllYTQ0MDhkNjBlYTA2DQo+
IDYzYiU3QzY4NmVhMWQzYmMyYjRjNmZhOTJjZDk5YzVjMzAxNjM1JTdDMCU3QzAlN0M2MzY3MTI0
Nw0KPiA5NDE0NTYxMTAxJmFtcDtzZGF0YT1yWlklMkY1SlAwVEJaUkxyJTJCcDZxYUc0b1NRZDhm
c052aXo5MkFZDQo+IDNJb0xUT3clM0QmYW1wO3Jlc2VydmVkPTANCg==
^ permalink raw reply
* [PATCH kernel] KVM: PPC: Avoid mapping compound pages to TCEs in real mode
From: Alexey Kardashevskiy @ 2018-08-31 6:08 UTC (permalink / raw)
To: linuxppc-dev
Cc: Alexey Kardashevskiy, David Gibson, kvm-ppc, Aneesh Kumar K.V,
Michael Ellerman, Nicholas Piggin, Paul Mackerras
At the moment the real mode handler of H_PUT_TCE calls iommu_tce_xchg_rm()
which in turn reads the old TCE and if it was a valid entry - marks
the physical page dirty if it was mapped for writing. Since it is
the real mode, realmode_pfn_to_page() is used instead of pfn_to_page()
to get the page struct. However SetPageDirty() itself reads the compound
page head and returns a virtual address for the head page struct and
setting dirty bit for that kills the system.
This moves dirty bit setting before updating the hardware table to make
sure compound pages are never mapped in the real mode so when H_PUT_TCE
or H_STUFF_TCE try clearing a TCE, they won't get a compound page to mark
dirty.
This changes kvmppc_rm_tce_validate() to check if the preregistered
memory is backed with pages bigger than hardware IOMMU pages; if this is
the case, we forward the request to the virtual mode handlers where it
can be safely processed.
The second check makes the first check rather unnecessary but since
the actual crash happened at the SetPageDirty() call site, this marks
the spot with WARN_ON_ONCE.
In order to keep virtual and real mode handlers in sync, this adjusts
iommu_tce_xchg() as well.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
---
This is made on top of:
[PATCH kernel 0/4] KVM: PPC: Some error handling rework
KVM: PPC: Validate all tces before updating tables
KVM: PPC: Inform the userspace about TCE update failures
KVM: PPC: Validate TCEs against preregistered memory page sizes
KVM: PPC: Propagate errors to the guest when failed instead of
ignoring
---
arch/powerpc/include/asm/mmu_context.h | 3 ++-
arch/powerpc/kernel/iommu.c | 19 ++++++++-----------
arch/powerpc/kvm/book3s_64_vio_hv.c | 15 +++++++++++----
arch/powerpc/mm/mmu_context_iommu.c | 4 +++-
4 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index b2f89b6..073d72f9b 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -31,7 +31,8 @@ extern void mm_iommu_cleanup(struct mm_struct *mm);
extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm,
unsigned long ua, unsigned long size);
extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(
- struct mm_struct *mm, unsigned long ua, unsigned long size);
+ struct mm_struct *mm, unsigned long ua, unsigned long size,
+ unsigned int *pshift);
extern struct mm_iommu_table_group_mem_t *mm_iommu_find(struct mm_struct *mm,
unsigned long ua, unsigned long entries);
extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index af7a20d..62e014d 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -998,12 +998,11 @@ long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
{
long ret;
- ret = tbl->it_ops->exchange(tbl, entry, hpa, direction);
-
- if (!ret && ((*direction == DMA_FROM_DEVICE) ||
- (*direction == DMA_BIDIRECTIONAL)))
+ if (*direction == DMA_FROM_DEVICE || *direction == DMA_BIDIRECTIONAL)
SetPageDirty(pfn_to_page(*hpa >> PAGE_SHIFT));
+ ret = tbl->it_ops->exchange(tbl, entry, hpa, direction);
+
/* if (unlikely(ret))
pr_err("iommu_tce: %s failed on hwaddr=%lx ioba=%lx kva=%lx ret=%d\n",
__func__, hwaddr, entry << tbl->it_page_shift,
@@ -1019,20 +1018,18 @@ long iommu_tce_xchg_rm(struct iommu_table *tbl, unsigned long entry,
{
long ret;
- ret = tbl->it_ops->exchange_rm(tbl, entry, hpa, direction);
-
- if (!ret && ((*direction == DMA_FROM_DEVICE) ||
- (*direction == DMA_BIDIRECTIONAL))) {
+ if (*direction == DMA_FROM_DEVICE || *direction == DMA_BIDIRECTIONAL) {
struct page *pg = realmode_pfn_to_page(*hpa >> PAGE_SHIFT);
if (likely(pg)) {
+ if (WARN_ON_ONCE(PageCompound(pg)))
+ return -EPERM;
SetPageDirty(pg);
- } else {
- tbl->it_ops->exchange_rm(tbl, entry, hpa, direction);
- ret = -EFAULT;
}
}
+ ret = tbl->it_ops->exchange_rm(tbl, entry, hpa, direction);
+
return ret;
}
EXPORT_SYMBOL_GPL(iommu_tce_xchg_rm);
diff --git a/arch/powerpc/kvm/book3s_64_vio_hv.c b/arch/powerpc/kvm/book3s_64_vio_hv.c
index 8d82133..ce4d2f4 100644
--- a/arch/powerpc/kvm/book3s_64_vio_hv.c
+++ b/arch/powerpc/kvm/book3s_64_vio_hv.c
@@ -118,11 +118,17 @@ static long kvmppc_rm_tce_validate(struct kvmppc_spapr_tce_table *stt,
unsigned long hpa = 0;
struct mm_iommu_table_group_mem_t *mem;
long shift = stit->tbl->it_page_shift;
+ unsigned int memshift = 0;
- mem = mm_iommu_lookup_rm(stt->kvm->mm, ua, 1ULL << shift);
+ mem = mm_iommu_lookup_rm(stt->kvm->mm, ua, 1ULL << shift,
+ &memshift);
if (!mem)
return H_TOO_HARD;
+ /* Marking compound pages dirty in real mode is too complex */
+ if (memshift > shift)
+ return H_TOO_HARD;
+
if (mm_iommu_ua_to_hpa_rm(mem, ua, shift, &hpa))
return H_TOO_HARD;
}
@@ -222,7 +228,7 @@ static long kvmppc_rm_tce_iommu_mapped_dec(struct kvm *kvm,
/* it_userspace allocation might be delayed */
return H_TOO_HARD;
- mem = mm_iommu_lookup_rm(kvm->mm, be64_to_cpu(*pua), pgsize);
+ mem = mm_iommu_lookup_rm(kvm->mm, be64_to_cpu(*pua), pgsize, NULL);
if (!mem)
return H_TOO_HARD;
@@ -287,7 +293,7 @@ static long kvmppc_rm_tce_iommu_do_map(struct kvm *kvm, struct iommu_table *tbl,
/* it_userspace allocation might be delayed */
return H_TOO_HARD;
- mem = mm_iommu_lookup_rm(kvm->mm, ua, 1ULL << tbl->it_page_shift);
+ mem = mm_iommu_lookup_rm(kvm->mm, ua, 1ULL << tbl->it_page_shift, NULL);
if (!mem)
return H_TOO_HARD;
@@ -472,7 +478,8 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
if (kvmppc_gpa_to_ua(vcpu->kvm, tce_list, &ua, NULL))
return H_TOO_HARD;
- mem = mm_iommu_lookup_rm(vcpu->kvm->mm, ua, IOMMU_PAGE_SIZE_4K);
+ mem = mm_iommu_lookup_rm(vcpu->kvm->mm, ua, IOMMU_PAGE_SIZE_4K,
+ NULL);
if (mem)
prereg = mm_iommu_ua_to_hpa_rm(mem, ua,
IOMMU_PAGE_SHIFT_4K, &tces) == 0;
diff --git a/arch/powerpc/mm/mmu_context_iommu.c b/arch/powerpc/mm/mmu_context_iommu.c
index c9ee9e2..5c31fa5 100644
--- a/arch/powerpc/mm/mmu_context_iommu.c
+++ b/arch/powerpc/mm/mmu_context_iommu.c
@@ -344,7 +344,7 @@ struct mm_iommu_table_group_mem_t *mm_iommu_lookup(struct mm_struct *mm,
EXPORT_SYMBOL_GPL(mm_iommu_lookup);
struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(struct mm_struct *mm,
- unsigned long ua, unsigned long size)
+ unsigned long ua, unsigned long size, unsigned int *pshift)
{
struct mm_iommu_table_group_mem_t *mem, *ret = NULL;
@@ -354,6 +354,8 @@ struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm(struct mm_struct *mm,
(ua + size <= mem->ua +
(mem->entries << PAGE_SHIFT))) {
ret = mem;
+ if (pshift)
+ *pshift = mem->pageshift;
break;
}
}
--
2.11.0
^ permalink raw reply related
* Re: [PATCH v3] powerpc/64s: reimplement book3s idle code in C
From: Nicholas Piggin @ 2018-08-31 5:16 UTC (permalink / raw)
To: kbuild test robot; +Cc: kbuild-all, linuxppc-dev, Gautham R . Shenoy, kvm-ppc
In-Reply-To: <201808311247.QqpNQQ2W%fengguang.wu@intel.com>
On Fri, 31 Aug 2018 12:38:19 +0800
kbuild test robot <lkp@intel.com> wrote:
> Hi Nicholas,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on v4.19-rc1 next-20180830]
> [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
>
> url: https://github.com/0day-ci/linux/commits/Nicholas-Piggin/powerpc-64s-reimplement-book3s-idle-code-in-C/20180829-014912
> base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
> config: powerpc-skiroot_defconfig (attached as .config)
> compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
> reproduce:
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> GCC_VERSION=7.2.0 make.cross ARCH=powerpc
>
> All errors (new ones prefixed by >>):
>
> >> arch/powerpc/platforms/powernv/idle.c:773:22: error: 'power9_offline_stop' defined but not used [-Werror=unused-function]
> static unsigned long power9_offline_stop(unsigned long psscr)
> ^~~~~~~~~~~~~~~~~~~
> >> arch/powerpc/platforms/powernv/idle.c:486:22: error: 'power7_offline' defined but not used [-Werror=unused-function]
> static unsigned long power7_offline(void)
> ^~~~~~~~~~~~~~
> cc1: all warnings being treated as errors
>
> vim +/power9_offline_stop +773 arch/powerpc/platforms/powernv/idle.c
>
> 772
> > 773 static unsigned long power9_offline_stop(unsigned long psscr)
> 774 {
> 775 unsigned long srr1;
> 776
Ahh, no hotplug. Good bot.
Thanks,
Nick
^ permalink raw reply
* Re: v4.17 regression: PowerMac G3 won't boot, was Re: [PATCH v5 1/3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()
From: Benjamin Herrenschmidt @ 2018-08-31 4:58 UTC (permalink / raw)
To: Frank Rowand, Finn Thain
Cc: Stan Johnson, Rob Herring, Chintan Pandya, devicetree,
linux-kernel, linuxppc-dev
In-Reply-To: <0ad5dbfd-08f3-b97d-34b9-70fc9a729921@gmail.com>
On Thu, 2018-08-30 at 21:36 -0700, Frank Rowand wrote:
> > No idea whether that's relevant; I haven't done any further investigation.
> > Complete dmesg output is attached. Please let me know if there's any more
> > information you need to help find the bug.
> >
> > Thanks.
>
> I don't have any useful answers yet, but I am following the thread and have
> also quickly scanned the two commits for any obvious cause. I will look
> into this some more, but have a few other tasks that I need to complete
> first.
>
> A long shot, but something to consider, is that I failed to cover the
> cases of dynamic devicetree updates (removing nodes that contain a
> phandle) in ways other than overlays. Michael Ellerman has reported
> such a problem for powerpc/mobility with of_detach_node(). A patch to
> fix that is one of the tasks I need to complete.
The only thing I can think of is booting via the BootX bootloader on
those ancient macs results in a DT with no phandles. I didn't see an
obvious reason why that would cause that patch to break though.
Cheers,
Ben.
^ permalink raw reply
* Re: v4.17 regression: PowerMac G3 won't boot, was Re: [PATCH v5 1/3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()
From: Benjamin Herrenschmidt @ 2018-08-31 4:49 UTC (permalink / raw)
To: Mac User, Rob Herring
Cc: fthain, Frank Rowand, Chintan Pandya, devicetree,
linux-kernel@vger.kernel.org, linuxppc-dev
In-Reply-To: <84f13bded54eda0817f9134f355d518d5b3a5f77.camel@kernel.crashing.org>
On Fri, 2018-08-31 at 14:35 +1000, Benjamin Herrenschmidt wrote:
>
> > If I force output with "-f", the resulting file has no occurrences
> > of "phandle".
>
> Are you booting with BootX or Open Firmware ?
Assuming you are using BootX (or miBoot), can you try this patch ?
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -37,6 +37,7 @@ static unsigned long __initdata bootx_dt_strend;
static unsigned long __initdata bootx_node_chosen;
static boot_infos_t * __initdata bootx_info;
static char __initdata bootx_disp_path[256];
+static int __initdata bootx_phandle;
/* Is boot-info compatible ? */
#define BOOT_INFO_IS_COMPATIBLE(bi) \
@@ -258,6 +259,8 @@ static void __init bootx_scan_dt_build_strings(unsigned long base,
namep = pp->name ? (char *)(base + pp->name) : NULL;
if (namep == NULL || strcmp(namep, "name") == 0)
goto next;
+ if (!strcmp(namep, "phandle") || !strcmp(namep, "linux,phandle"))
+ bootx_phandle = -1;
/* get/create string entry */
soff = bootx_dt_find_string(namep);
if (soff == 0)
@@ -310,6 +313,7 @@ static void __init bootx_scan_dt_build_struct(unsigned long base,
*mem_end = _ALIGN_UP((unsigned long)lp + 1, 4);
/* get and store all properties */
+ has_phandle = false;
while (*ppp) {
struct bootx_dt_prop *pp =
(struct bootx_dt_prop *)(base + *ppp);
@@ -330,6 +334,12 @@ static void __init bootx_scan_dt_build_struct(unsigned long base,
ppp = &pp->next;
}
+ /* add a phandle */
+ if (bootx_phandle > 0) {
+ bootx_dt_add_prop("phandle", &bootx_phandle, 4, mem_end);
+ bootx_phandle++;
+ }
+
if (node == bootx_node_chosen) {
bootx_add_chosen_props(base, mem_end);
if (bootx_info->dispDeviceRegEntryOffset == 0)
@@ -385,6 +395,8 @@ static unsigned long __init bootx_flatten_dt(unsigned long start)
bootx_dt_add_string("linux,bootx-height", &mem_end);
bootx_dt_add_string("linux,bootx-linebytes", &mem_end);
bootx_dt_add_string("linux,bootx-addr", &mem_end);
+ if (bootx_phandle > 0)
+ bootx_dt_add_string("phandle", &mem_end);
/* Wrap up strings */
hdr->off_dt_strings = bootx_dt_strbase - mem_start;
hdr->dt_strings_size = bootx_dt_strend - bootx_dt_strbase;
@@ -482,6 +494,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
bootx_dt_strbase = bootx_dt_strend = 0;
bootx_node_chosen = 0;
bootx_disp_path[0] = 0;
+ bootx_phandle = 1;
if (!BOOT_INFO_IS_V2_COMPATIBLE(bi))
bi->logicalDisplayBase = bi->dispDeviceBase;
^ permalink raw reply
* Re: [PATCH v3] powerpc/64s: reimplement book3s idle code in C
From: kbuild test robot @ 2018-08-31 4:38 UTC (permalink / raw)
To: Nicholas Piggin
Cc: kbuild-all, linuxppc-dev, Gautham R . Shenoy, kvm-ppc,
Nicholas Piggin
In-Reply-To: <20180828123520.1034-1-npiggin@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1710 bytes --]
Hi Nicholas,
I love your patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.19-rc1 next-20180830]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Nicholas-Piggin/powerpc-64s-reimplement-book3s-idle-code-in-C/20180829-014912
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-skiroot_defconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=powerpc
All errors (new ones prefixed by >>):
>> arch/powerpc/platforms/powernv/idle.c:773:22: error: 'power9_offline_stop' defined but not used [-Werror=unused-function]
static unsigned long power9_offline_stop(unsigned long psscr)
^~~~~~~~~~~~~~~~~~~
>> arch/powerpc/platforms/powernv/idle.c:486:22: error: 'power7_offline' defined but not used [-Werror=unused-function]
static unsigned long power7_offline(void)
^~~~~~~~~~~~~~
cc1: all warnings being treated as errors
vim +/power9_offline_stop +773 arch/powerpc/platforms/powernv/idle.c
772
> 773 static unsigned long power9_offline_stop(unsigned long psscr)
774 {
775 unsigned long srr1;
776
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 19007 bytes --]
^ permalink raw reply
* Re: v4.17 regression: PowerMac G3 won't boot, was Re: [PATCH v5 1/3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()
From: Frank Rowand @ 2018-08-31 4:36 UTC (permalink / raw)
To: Finn Thain
Cc: Stan Johnson, Rob Herring, Benjamin Herrenschmidt, Chintan Pandya,
devicetree, linux-kernel, linuxppc-dev
In-Reply-To: <alpine.LNX.2.21.1808301025480.73@nippy.intranet>
Hi Finn,
On 08/29/18 17:44, Finn Thain wrote:
> Hi Frank,
>
> Linux v4.17 and later will no longer boot on a G3 PowerMac. The boot hangs
> very early, before any video driver loads.
>
> Stan and I were able to bisect the regression between v4.16 and v4.17 and
> arrived at commit 0b3ce78e90fc ("of: cache phandle nodes to reduce cost of
> of_find_node_by_phandle()").
>
> I don't see any obvious bug in 0b3ce78e90fc or b9952b5218ad. But if you
> revert these from v4.18 (which is also affected) that certainly resolves
> the issue.
>
> I did see this in the kernel messages:
>
> Duplicate name in PowerPC,750, renamed to "l2-cache#1"
> Duplicate name in mac-io, renamed to "ide#1"
> Duplicate name in ide#1, renamed to "atapi-disk#1"
> Duplicate name in multifunc-device, renamed to "pci1799,1#1"
>
> No idea whether that's relevant; I haven't done any further investigation.
> Complete dmesg output is attached. Please let me know if there's any more
> information you need to help find the bug.
>
> Thanks.
I don't have any useful answers yet, but I am following the thread and have
also quickly scanned the two commits for any obvious cause. I will look
into this some more, but have a few other tasks that I need to complete
first.
A long shot, but something to consider, is that I failed to cover the
cases of dynamic devicetree updates (removing nodes that contain a
phandle) in ways other than overlays. Michael Ellerman has reported
such a problem for powerpc/mobility with of_detach_node(). A patch to
fix that is one of the tasks I need to complete.
-Frank
^ permalink raw reply
* Re: v4.17 regression: PowerMac G3 won't boot, was Re: [PATCH v5 1/3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()
From: Benjamin Herrenschmidt @ 2018-08-31 4:35 UTC (permalink / raw)
To: Mac User, Rob Herring
Cc: fthain, Frank Rowand, Chintan Pandya, devicetree,
linux-kernel@vger.kernel.org, linuxppc-dev
In-Reply-To: <569e4bc3-2149-4b2d-562f-e400dd05a8a8@yahoo.com>
On Thu, 2018-08-30 at 20:39 -0600, Mac User wrote:
> On 8/29/18 7:05 PM, Rob Herring wrote:
>
> > On Wed, Aug 29, 2018 at 7:44 PM Finn Thain <fthain@telegraphics.com.au> wrote:
> > > Hi Frank,
> > >
> > > Linux v4.17 and later will no longer boot on a G3 PowerMac. The boot hangs
> > > very early, before any video driver loads.
> > >
> > > Stan and I were able to bisect the regression between v4.16 and v4.17 and
> > > arrived at commit 0b3ce78e90fc ("of: cache phandle nodes to reduce cost of
> > > of_find_node_by_phandle()").
> > >
> > > I don't see any obvious bug in 0b3ce78e90fc or b9952b5218ad. But if you
> > > revert these from v4.18 (which is also affected) that certainly resolves
> > > the issue.
> >
> > Perhaps a bad assumption on phandle values causing a problem. Can you
> > provide a dump of all the phandle or linux,phandle values from
> > /proc/device-tree.
> >
> > Rob
>
> Rob,
>
> As suggested by Finn, I installed device-tree-compiler and
> powerpc-ibm-utils.
>
> Running "dtc -I fs -H both /sys/firmware/devicetree/base"
> resulted in the following errors:
>
> DTC: fs->dts on file "/sys/firmware/devicetree/base"
> ERROR (name_properties): "name" property in
> /pci/multifunc-device/pci1799,1#1 is incorrect ("pci1799,1" instead of
> base node name)
> ERROR (name_properties): "name" property in /pci/mac-io/ide#1 is
> incorrect ("ide" instead of base node name)
> ERROR (name_properties): "name" property in
> /pci/mac-io/ide#1/atapi-disk#1 is incorrect ("atapi-disk" instead of
> base node name)
> ERROR (name_properties): "name" property in /cpus/PowerPC,750/l2-cache#1
> is incorrect ("l2-cache" instead of base node name)
> ERROR: Input tree has errors, aborting (use -f to force output)
>
> If I force output with "-f", the resulting file has no occurrences
> of "phandle".
Are you booting with BootX or Open Firmware ?
> Running "lsprop /proc/device-tree | grep -i phandle" results in no
> output.
>
> Please let me know if there's some other way to get information that
> would be helpful.
>
> thanks
>
> -Stan
^ permalink raw reply
* Re: [PATCH kernel 1/4] KVM: PPC: Validate all tces before updating tables
From: Alexey Kardashevskiy @ 2018-08-31 4:04 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, kvm-ppc, Paul Mackerras
In-Reply-To: <20180830040101.GG2222@umbus.fritz.box>
On 30/08/2018 14:01, David Gibson wrote:
> On Thu, Aug 30, 2018 at 01:16:44PM +1000, Alexey Kardashevskiy wrote:
>> The KVM TCE handlers are written in a way so they fail when either
>> something went horribly wrong or the userspace did some obvious mistake
>> such as passing a misaligned address.
>>
>> We are going to enhance the TCE checker to fail on attempts to map bigger
>> IOMMU page than the underlying pinned memory so let's valitate TCE
>> beforehand.
>>
>> This should cause no behavioral change.
>>
>> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>
> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>
> With one misgiving..
>
>> ---
>> arch/powerpc/kvm/book3s_64_vio.c | 8 ++++++++
>> arch/powerpc/kvm/book3s_64_vio_hv.c | 4 ++++
>> 2 files changed, 12 insertions(+)
>>
>> diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c
>> index 9a3f264..0fef22b 100644
>> --- a/arch/powerpc/kvm/book3s_64_vio.c
>> +++ b/arch/powerpc/kvm/book3s_64_vio.c
>> @@ -599,6 +599,14 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
>> ret = kvmppc_tce_validate(stt, tce);
>> if (ret != H_SUCCESS)
>> goto unlock_exit;
>> + }
>> +
>> + for (i = 0; i < npages; ++i) {
>> + if (get_user(tce, tces + i)) {
>
> This looks unsafe, because we validate, then regrab the TCE from
> userspace which could have been changed by another thread.
>
> But it actually is safe, because the relevant checks will be
> re-executed in the following code. If userspace tries to change this
> dodgily it will result in a messier failure mode but won't threaten
> the host.
I have put this to 3/4 for this get_user() while it should have been here:
+ /*
+ * This get_user() may produce a different result than few
+ * lines in the validation loop above but we translate it
+ * again little later anyway and if that fails, we simply stop
+ * and return error as it is likely the userspace shooting
+ * itself in a foot.
+ */
Might repost, testing that THP+realmode patch....
>
> Long term, I think we would be better off copying everything into
> kernel space then doing the validation just once. But the difference
> should only become apparent with a malicious or badly broken guest,
> and in the meantime this series addresses a real problem.
>
> So, I think we should go ahead with it despite that imperfection.
>
>
>> + ret = H_TOO_HARD;
>> + goto unlock_exit;
>> + }
>> + tce = be64_to_cpu(tce);
>>
>> if (kvmppc_gpa_to_ua(vcpu->kvm,
>> tce & ~(TCE_PCI_READ | TCE_PCI_WRITE),
>> diff --git a/arch/powerpc/kvm/book3s_64_vio_hv.c b/arch/powerpc/kvm/book3s_64_vio_hv.c
>> index 506a4d4..7ab6f3f 100644
>> --- a/arch/powerpc/kvm/book3s_64_vio_hv.c
>> +++ b/arch/powerpc/kvm/book3s_64_vio_hv.c
>> @@ -501,6 +501,10 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
>> ret = kvmppc_tce_validate(stt, tce);
>> if (ret != H_SUCCESS)
>> goto unlock_exit;
>> + }
>> +
>> + for (i = 0; i < npages; ++i) {
>> + unsigned long tce = be64_to_cpu(((u64 *)tces)[i]);
>>
>> ua = 0;
>> if (kvmppc_gpa_to_ua(vcpu->kvm,
>
--
Alexey
^ permalink raw reply
* [PATCH 1/3] soc: fsl: add Platform PM driver QorIQ platforms
From: Ran Wang @ 2018-08-31 3:52 UTC (permalink / raw)
To: Leo Li, Rob Herring, Mark Rutland
Cc: linuxppc-dev, linux-arm-kernel, devicetree, linux-kernel,
Ran Wang
This driver is to provide a independent framework for PM service
provider and consumer to configure system level wake up feature. For
example, RCPM driver could register a callback function on this
platform first, and Flex timer driver who want to enable timer wake
up feature, will call generic API provided by this platform driver,
and then it will trigger RCPM driver to do it. The benefit is to
isolate the user and service, such as flex timer driver will not have
to know the implement details of wakeup function it require. Besides,
it is also easy for service side to upgrade its logic when design is
changed and remain user side unchanged.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
drivers/soc/fsl/Kconfig | 14 +++++
drivers/soc/fsl/Makefile | 1 +
drivers/soc/fsl/plat_pm.c | 144 +++++++++++++++++++++++++++++++++++++++++++++
include/soc/fsl/plat_pm.h | 22 +++++++
4 files changed, 181 insertions(+), 0 deletions(-)
create mode 100644 drivers/soc/fsl/plat_pm.c
create mode 100644 include/soc/fsl/plat_pm.h
diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
index 7a9fb9b..6517412 100644
--- a/drivers/soc/fsl/Kconfig
+++ b/drivers/soc/fsl/Kconfig
@@ -16,3 +16,17 @@ config FSL_GUTS
Initially only reading SVR and registering soc device are supported.
Other guts accesses, such as reading RCW, should eventually be moved
into this driver as well.
+
+config FSL_PLAT_PM
+ bool "Freescale platform PM framework"
+ help
+ This driver is to provide a independent framework for PM service
+ provider and consumer to configure system level wake up feature. For
+ example, RCPM driver could register a callback function on this
+ platform first, and Flex timer driver who want to enable timer wake
+ up feature, will call generic API provided by this platform driver,
+ and then it will trigger RCPM driver to do it. The benefit is to
+ isolate the user and service, such as flex timer driver will not
+ have to know the implement details of wakeup function it require.
+ Besides, it is also easy for service side to upgrade its logic when
+ design changed and remain user side unchanged.
diff --git a/drivers/soc/fsl/Makefile b/drivers/soc/fsl/Makefile
index 44b3beb..8f9db23 100644
--- a/drivers/soc/fsl/Makefile
+++ b/drivers/soc/fsl/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_FSL_DPAA) += qbman/
obj-$(CONFIG_QUICC_ENGINE) += qe/
obj-$(CONFIG_CPM) += qe/
obj-$(CONFIG_FSL_GUTS) += guts.o
+obj-$(CONFIG_FSL_PLAT_PM) += plat_pm.o
diff --git a/drivers/soc/fsl/plat_pm.c b/drivers/soc/fsl/plat_pm.c
new file mode 100644
index 0000000..19ea14e
--- /dev/null
+++ b/drivers/soc/fsl/plat_pm.c
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// plat_pm.c - Freescale platform PM framework
+//
+// Copyright 2018 NXP
+//
+// Author: Ran Wang <ran.wang_1@nxp.com>,
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <soc/fsl/plat_pm.h>
+
+
+struct plat_pm_t {
+ struct list_head node;
+ fsl_plat_pm_handle handle;
+ void *handle_priv;
+ spinlock_t lock;
+};
+
+static struct plat_pm_t plat_pm;
+
+// register_fsl_platform_wakeup_source - Register callback function to plat_pm
+// @handle: Pointer to handle PM feature requirement
+// @handle_priv: Handler specific data struct
+//
+// Return 0 on success other negative errno
+int register_fsl_platform_wakeup_source(fsl_plat_pm_handle handle,
+ void *handle_priv)
+{
+ struct plat_pm_t *p;
+ unsigned long flags;
+
+ if (!handle) {
+ pr_err("FSL plat_pm: Handler invalid, reject\n");
+ return -EINVAL;
+ }
+
+ p = kmalloc(sizeof(*p), GFP_KERNEL);
+ if (!p)
+ return -ENOMEM;
+
+ p->handle = handle;
+ p->handle_priv = handle_priv;
+
+ spin_lock_irqsave(&plat_pm.lock, flags);
+ list_add_tail(&p->node, &plat_pm.node);
+ spin_unlock_irqrestore(&plat_pm.lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(register_fsl_platform_wakeup_source);
+
+// Deregister_fsl_platform_wakeup_source - deregister callback function
+// @handle_priv: Handler specific data struct
+//
+// Return 0 on success other negative errno
+int deregister_fsl_platform_wakeup_source(void *handle_priv)
+{
+ struct plat_pm_t *p, *tmp;
+ unsigned long flags;
+
+ spin_lock_irqsave(&plat_pm.lock, flags);
+ list_for_each_entry_safe(p, tmp, &plat_pm.node, node) {
+ if (p->handle_priv == handle_priv) {
+ list_del(&p->node);
+ kfree(p);
+ }
+ }
+ spin_unlock_irqrestore(&plat_pm.lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(deregister_fsl_platform_wakeup_source);
+
+// fsl_platform_wakeup_config - Configure wakeup source by calling handlers
+// @dev: pointer to user's device struct
+// @flag: to tell enable or disable wakeup source
+//
+// Return 0 on success other negative errno
+int fsl_platform_wakeup_config(struct device *dev, bool flag)
+{
+ struct plat_pm_t *p;
+ int ret;
+ bool success_handled;
+ unsigned long flags;
+
+ success_handled = false;
+
+ // Will consider success if at least one callback return 0.
+ // Also, rest handles still get oppertunity to be executed
+ spin_lock_irqsave(&plat_pm.lock, flags);
+ list_for_each_entry(p, &plat_pm.node, node) {
+ if (p->handle) {
+ ret = p->handle(dev, flag, p->handle_priv);
+ if (!ret)
+ success_handled = true;
+ else if (ret != -ENODEV) {
+ pr_err("FSL plat_pm: Failed to config wakeup source:%d\n", ret);
+ return ret;
+ }
+ } else
+ pr_warn("FSL plat_pm: Invalid handler detected, skip\n");
+ }
+ spin_unlock_irqrestore(&plat_pm.lock, flags);
+
+ if (success_handled == false) {
+ pr_err("FSL plat_pm: Cannot find the matchhed handler for wakeup source config\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+// fsl_platform_wakeup_enable - Enable wakeup source
+// @dev: pointer to user's device struct
+//
+// Return 0 on success other negative errno
+int fsl_platform_wakeup_enable(struct device *dev)
+{
+ return fsl_platform_wakeup_config(dev, true);
+}
+EXPORT_SYMBOL_GPL(fsl_platform_wakeup_enable);
+
+// fsl_platform_wakeup_disable - Disable wakeup source
+// @dev: pointer to user's device struct
+//
+// Return 0 on success other negative errno
+int fsl_platform_wakeup_disable(struct device *dev)
+{
+ return fsl_platform_wakeup_config(dev, false);
+}
+EXPORT_SYMBOL_GPL(fsl_platform_wakeup_disable);
+
+static int __init fsl_plat_pm_init(void)
+{
+ spin_lock_init(&plat_pm.lock);
+ INIT_LIST_HEAD(&plat_pm.node);
+ return 0;
+}
+
+core_initcall(fsl_plat_pm_init);
diff --git a/include/soc/fsl/plat_pm.h b/include/soc/fsl/plat_pm.h
new file mode 100644
index 0000000..bbe151e
--- /dev/null
+++ b/include/soc/fsl/plat_pm.h
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// plat_pm.h - Freescale platform PM Header
+//
+// Copyright 2018 NXP
+//
+// Author: Ran Wang <ran.wang_1@nxp.com>,
+
+#ifndef __FSL_PLAT_PM_H
+#define __FSL_PLAT_PM_H
+
+typedef int (*fsl_plat_pm_handle)(struct device *dev, bool flag,
+ void *handle_priv);
+
+int register_fsl_platform_wakeup_source(fsl_plat_pm_handle handle,
+ void *handle_priv);
+int deregister_fsl_platform_wakeup_source(void *handle_priv);
+int fsl_platform_wakeup_config(struct device *dev, bool flag);
+int fsl_platform_wakeup_enable(struct device *dev);
+int fsl_platform_wakeup_disable(struct device *dev);
+
+#endif // __FSL_PLAT_PM_H
--
1.7.1
^ permalink raw reply related
* [PATCH 3/3] soc: fsl: add RCPM driver
From: Ran Wang @ 2018-08-31 3:52 UTC (permalink / raw)
To: Leo Li, Rob Herring, Mark Rutland
Cc: linuxppc-dev, linux-arm-kernel, devicetree, linux-kernel,
Ran Wang
In-Reply-To: <20180831035219.31619-1-ran.wang_1@nxp.com>
The NXP's QorIQ Processors based on ARM Core have RCPM module (Run
Control and Power Management), which performs all device-level
tasks associated with power management such as wakeup source control.
This driver depends on FSL platform PM driver framework which help to
isolate user and PM service provider (such as RCPM driver).
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Ying Zhang <ying.zhang22455@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
drivers/soc/fsl/Kconfig | 6 ++
drivers/soc/fsl/Makefile | 1 +
drivers/soc/fsl/ls-rcpm.c | 153 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 160 insertions(+), 0 deletions(-)
create mode 100644 drivers/soc/fsl/ls-rcpm.c
diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
index 6517412..882330d 100644
--- a/drivers/soc/fsl/Kconfig
+++ b/drivers/soc/fsl/Kconfig
@@ -30,3 +30,9 @@ config FSL_PLAT_PM
have to know the implement details of wakeup function it require.
Besides, it is also easy for service side to upgrade its logic when
design changed and remain user side unchanged.
+
+config LS_RCPM
+ bool "Freescale RCPM support"
+ depends on (FSL_PLAT_PM)
+ help
+ This feature is to enable specified wakeup source for system sleep.
diff --git a/drivers/soc/fsl/Makefile b/drivers/soc/fsl/Makefile
index 8f9db23..43ff71a 100644
--- a/drivers/soc/fsl/Makefile
+++ b/drivers/soc/fsl/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_QUICC_ENGINE) += qe/
obj-$(CONFIG_CPM) += qe/
obj-$(CONFIG_FSL_GUTS) += guts.o
obj-$(CONFIG_FSL_PLAT_PM) += plat_pm.o
+obj-$(CONFIG_LS_RCPM) += ls-rcpm.o
diff --git a/drivers/soc/fsl/ls-rcpm.c b/drivers/soc/fsl/ls-rcpm.c
new file mode 100644
index 0000000..b0feb88
--- /dev/null
+++ b/drivers/soc/fsl/ls-rcpm.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// plat_pm.c - Freescale Layerscape RCPM driver
+//
+// Copyright 2018 NXP
+//
+// Author: Ran Wang <ran.wang_1@nxp.com>,
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <soc/fsl/plat_pm.h>
+
+#define MAX_COMPATIBLE_NUM 10
+
+struct rcpm_t {
+ struct device *dev;
+ void __iomem *ippdexpcr_addr;
+ bool big_endian; /* Big/Little endian of RCPM module */
+};
+
+// rcpm_handle - Configure RCPM reg according to wake up source request
+// @user_dev: pointer to user's device struct
+// @flag: to enable(true) or disable(false) wakeup source
+// @handle_priv: pointer to struct rcpm_t instance
+//
+// Return 0 on success other negative errno
+static int rcpm_handle(struct device *user_dev, bool flag, void *handle_priv)
+{
+ struct rcpm_t *rcpm;
+ bool big_endian;
+ const char *dev_compatible_array[MAX_COMPATIBLE_NUM];
+ void __iomem *ippdexpcr_addr;
+ u32 ippdexpcr;
+ u32 set_bit;
+ int ret, num, i;
+
+ rcpm = handle_priv;
+ big_endian = rcpm->big_endian;
+ ippdexpcr_addr = rcpm->ippdexpcr_addr;
+
+ num = device_property_read_string_array(user_dev, "compatible",
+ dev_compatible_array, MAX_COMPATIBLE_NUM);
+ if (num < 0)
+ return num;
+
+ for (i = 0; i < num; i++) {
+ if (!device_property_present(rcpm->dev,
+ dev_compatible_array[i]))
+ continue;
+ else {
+ ret = device_property_read_u32(rcpm->dev,
+ dev_compatible_array[i], &set_bit);
+ if (ret)
+ return ret;
+
+ if (!device_property_present(rcpm->dev,
+ dev_compatible_array[i]))
+ return -ENODEV;
+ else {
+ ret = device_property_read_u32(rcpm->dev,
+ dev_compatible_array[i], &set_bit);
+ if (ret)
+ return ret;
+
+ if (big_endian)
+ ippdexpcr = ioread32be(ippdexpcr_addr);
+ else
+ ippdexpcr = ioread32(ippdexpcr_addr);
+
+ if (flag)
+ ippdexpcr |= set_bit;
+ else
+ ippdexpcr &= ~set_bit;
+
+ if (big_endian) {
+ iowrite32be(ippdexpcr, ippdexpcr_addr);
+ ippdexpcr = ioread32be(ippdexpcr_addr);
+ } else
+ iowrite32(ippdexpcr, ippdexpcr_addr);
+
+ return 0;
+ }
+ }
+ }
+
+ return -ENODEV;
+}
+
+static int ls_rcpm_probe(struct platform_device *pdev)
+{
+ struct resource *r;
+ struct rcpm_t *rcpm;
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r)
+ return -ENODEV;
+
+ rcpm = kmalloc(sizeof(*rcpm), GFP_KERNEL);
+ if (!rcpm)
+ return -ENOMEM;
+
+ rcpm->big_endian = device_property_read_bool(&pdev->dev, "big-endian");
+
+ rcpm->ippdexpcr_addr = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(rcpm->ippdexpcr_addr))
+ return PTR_ERR(rcpm->ippdexpcr_addr);
+
+ rcpm->dev = &pdev->dev;
+ platform_set_drvdata(pdev, rcpm);
+
+ return register_fsl_platform_wakeup_source(rcpm_handle, rcpm);
+}
+
+static int ls_rcpm_remove(struct platform_device *pdev)
+{
+ struct rcpm_t *rcpm;
+
+ rcpm = platform_get_drvdata(pdev);
+ deregister_fsl_platform_wakeup_source(rcpm);
+ kfree(rcpm);
+
+ return 0;
+}
+
+static const struct of_device_id ls_rcpm_of_match[] = {
+ { .compatible = "fsl,qoriq-rcpm-2.1", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ls_rcpm_of_match);
+
+static struct platform_driver ls_rcpm_driver = {
+ .driver = {
+ .name = "ls-rcpm",
+ .of_match_table = ls_rcpm_of_match,
+ },
+ .probe = ls_rcpm_probe,
+ .remove = ls_rcpm_remove,
+};
+
+static int __init ls_rcpm_init(void)
+{
+ return platform_driver_register(&ls_rcpm_driver);
+}
+subsys_initcall(ls_rcpm_init);
+
+static void __exit ls_rcpm_exit(void)
+{
+ platform_driver_unregister(&ls_rcpm_driver);
+}
+module_exit(ls_rcpm_exit);
--
1.7.1
^ permalink raw reply related
* [PATCH 2/3] Documentation: dt: binding: fsl: update property description for RCPM
From: Ran Wang @ 2018-08-31 3:52 UTC (permalink / raw)
To: Leo Li, Rob Herring, Mark Rutland
Cc: linuxppc-dev, linux-arm-kernel, devicetree, linux-kernel,
Ran Wang
In-Reply-To: <20180831035219.31619-1-ran.wang_1@nxp.com>
Add property 'big-endian' and supportted IP's configuration info.
Remove property 'fsl,#rcpm-wakeup-cell'.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
---
Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 42 ++++++-------------
1 files changed, 13 insertions(+), 29 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index e284e4e..7fc630a 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -5,8 +5,6 @@ and power management.
Required properites:
- reg : Offset and length of the register set of the RCPM block.
- - fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
- fsl,rcpm-wakeup property.
- compatible : Must contain a chip-specific RCPM block compatible string
and (if applicable) may contain a chassis-version RCPM compatible
string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
@@ -27,37 +25,23 @@ Chassis Version Example Chips
--------------- -------------------------------
1.0 p4080, p5020, p5040, p2041, p3041
2.0 t4240, b4860, b4420
-2.1 t1040, ls1021
+2.1 t1040, ls1021, ls1012
+
+Optional properties:
+ - big-endian : Indicate RCPM registers is big-endian. A RCPM node
+ that doesn't have this property will be regarded as little-endian.
+ - <property 'compatible' string of consumer device> : This string
+ is referred by RCPM driver to judge if the consumer (such as flex timer)
+ is able to be regards as wakeup source or not, such as 'fsl,ls1012a-ftm'.
+ Further, this property will carry the bit mask info to control
+ coresponding wake up source.
Example:
The RCPM node for T4240:
rcpm: global-utilities@e2000 {
compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
reg = <0xe2000 0x1000>;
- fsl,#rcpm-wakeup-cells = <2>;
- };
-
-* Freescale RCPM Wakeup Source Device Tree Bindings
--------------------------------------------
-Required fsl,rcpm-wakeup property should be added to a device node if the device
-can be used as a wakeup source.
-
- - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
- register cells. The number of IPPDEXPCR register cells is defined in
- "fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is
- the bit mask that should be set in IPPDEXPCR0, and the second register
- cell is for IPPDEXPCR1, and so on.
-
- Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a
- mechanism for keeping certain blocks awake during STANDBY and MEM, in
- order to use them as wake-up sources.
-
-Example:
- lpuart0: serial@2950000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2950000 0x0 0x1000>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- fsl,rcpm-wakeup = <&rcpm 0x0 0x40000000>;
+ big-endian;
+ fsl,ls1012a-ftm = <0x20000>;
+ fsl,pfe = <0xf0000020>;
};
--
1.7.1
^ permalink raw reply related
* Re: v4.17 regression: PowerMac G3 won't boot, was Re: [PATCH v5 1/3] of: cache phandle nodes to reduce cost of of_find_node_by_phandle()
From: Mac User @ 2018-08-31 2:39 UTC (permalink / raw)
To: Rob Herring
Cc: fthain, Frank Rowand, Benjamin Herrenschmidt, Chintan Pandya,
devicetree, linux-kernel@vger.kernel.org, linuxppc-dev
In-Reply-To: <CAL_JsqLJ9QMHCMqGKpCouP1rTEO+cMGA1es94qAH+ukLsR31jg@mail.gmail.com>
On 8/29/18 7:05 PM, Rob Herring wrote:
> On Wed, Aug 29, 2018 at 7:44 PM Finn Thain <fthain@telegraphics.com.au> wrote:
>> Hi Frank,
>>
>> Linux v4.17 and later will no longer boot on a G3 PowerMac. The boot hangs
>> very early, before any video driver loads.
>>
>> Stan and I were able to bisect the regression between v4.16 and v4.17 and
>> arrived at commit 0b3ce78e90fc ("of: cache phandle nodes to reduce cost of
>> of_find_node_by_phandle()").
>>
>> I don't see any obvious bug in 0b3ce78e90fc or b9952b5218ad. But if you
>> revert these from v4.18 (which is also affected) that certainly resolves
>> the issue.
> Perhaps a bad assumption on phandle values causing a problem. Can you
> provide a dump of all the phandle or linux,phandle values from
> /proc/device-tree.
>
> Rob
Rob,
As suggested by Finn, I installed device-tree-compiler and
powerpc-ibm-utils.
Running "dtc -I fs -H both /sys/firmware/devicetree/base"
resulted in the following errors:
DTC: fs->dts on file "/sys/firmware/devicetree/base"
ERROR (name_properties): "name" property in
/pci/multifunc-device/pci1799,1#1 is incorrect ("pci1799,1" instead of
base node name)
ERROR (name_properties): "name" property in /pci/mac-io/ide#1 is
incorrect ("ide" instead of base node name)
ERROR (name_properties): "name" property in
/pci/mac-io/ide#1/atapi-disk#1 is incorrect ("atapi-disk" instead of
base node name)
ERROR (name_properties): "name" property in /cpus/PowerPC,750/l2-cache#1
is incorrect ("l2-cache" instead of base node name)
ERROR: Input tree has errors, aborting (use -f to force output)
If I force output with "-f", the resulting file has no occurrences
of "phandle".
Running "lsprop /proc/device-tree | grep -i phandle" results in no
output.
Please let me know if there's some other way to get information that
would be helpful.
thanks
-Stan
^ permalink raw reply
* [PATCH v4 2/2] powerpc/pseries:Remove unneeded uses of dlpar work queue
From: Nathan Fontenot @ 2018-08-31 2:15 UTC (permalink / raw)
To: mpe, linuxppc-dev; +Cc: johnallen3991, desnesn, haren
In-Reply-To: <153568164555.2146.11463040249853453135.stgit@ltcalpine2-lp14.aus.stglabs.ibm.com>
There are three instances in which dlpar hotplug events are invoked;
handling a hotplug interrupt (in a kvm guest), handling a dlpar
request through sysfs, and updating LMB affinity when handling a
PRRN event. Only in the case of handling a hotplug interrupt do we
have to put the work on a workqueue, the other cases can handle the
dlpar request directly.
This patch exports the handle_dlpar_errorlog() function so that
dlpar hotplug events can be handled directly and updates the two
instances mentioned above to use the direct invocation.
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/dlpar.c | 37 +++++++----------------------
arch/powerpc/platforms/pseries/mobility.c | 18 +++++---------
arch/powerpc/platforms/pseries/pseries.h | 5 ++--
arch/powerpc/platforms/pseries/ras.c | 2 +-
4 files changed, 19 insertions(+), 43 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index a0b20c03f078..052c4f2ba0a0 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -32,8 +32,6 @@ static struct workqueue_struct *pseries_hp_wq;
struct pseries_hp_work {
struct work_struct work;
struct pseries_hp_errorlog *errlog;
- struct completion *hp_completion;
- int *rc;
};
struct cc_workarea {
@@ -329,7 +327,7 @@ int dlpar_release_drc(u32 drc_index)
return 0;
}
-static int handle_dlpar_errorlog(struct pseries_hp_errorlog *hp_elog)
+int handle_dlpar_errorlog(struct pseries_hp_errorlog *hp_elog)
{
int rc;
@@ -371,20 +369,13 @@ static void pseries_hp_work_fn(struct work_struct *work)
struct pseries_hp_work *hp_work =
container_of(work, struct pseries_hp_work, work);
- if (hp_work->rc)
- *(hp_work->rc) = handle_dlpar_errorlog(hp_work->errlog);
- else
- handle_dlpar_errorlog(hp_work->errlog);
-
- if (hp_work->hp_completion)
- complete(hp_work->hp_completion);
+ handle_dlpar_errorlog(hp_work->errlog);
kfree(hp_work->errlog);
kfree((void *)work);
}
-void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog,
- struct completion *hotplug_done, int *rc)
+void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog)
{
struct pseries_hp_work *work;
struct pseries_hp_errorlog *hp_errlog_copy;
@@ -397,13 +388,9 @@ void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog,
if (work) {
INIT_WORK((struct work_struct *)work, pseries_hp_work_fn);
work->errlog = hp_errlog_copy;
- work->hp_completion = hotplug_done;
- work->rc = rc;
queue_work(pseries_hp_wq, (struct work_struct *)work);
} else {
- *rc = -ENOMEM;
kfree(hp_errlog_copy);
- complete(hotplug_done);
}
}
@@ -521,18 +508,15 @@ static int dlpar_parse_id_type(char **cmd, struct pseries_hp_errorlog *hp_elog)
static ssize_t dlpar_store(struct class *class, struct class_attribute *attr,
const char *buf, size_t count)
{
- struct pseries_hp_errorlog *hp_elog;
- struct completion hotplug_done;
+ struct pseries_hp_errorlog hp_elog;
char *argbuf;
char *args;
int rc;
args = argbuf = kstrdup(buf, GFP_KERNEL);
- hp_elog = kzalloc(sizeof(*hp_elog), GFP_KERNEL);
- if (!hp_elog || !argbuf) {
+ if (!argbuf) {
pr_info("Could not allocate resources for DLPAR operation\n");
kfree(argbuf);
- kfree(hp_elog);
return -ENOMEM;
}
@@ -540,25 +524,22 @@ static ssize_t dlpar_store(struct class *class, struct class_attribute *attr,
* Parse out the request from the user, this will be in the form:
* <resource> <action> <id_type> <id>
*/
- rc = dlpar_parse_resource(&args, hp_elog);
+ rc = dlpar_parse_resource(&args, &hp_elog);
if (rc)
goto dlpar_store_out;
- rc = dlpar_parse_action(&args, hp_elog);
+ rc = dlpar_parse_action(&args, &hp_elog);
if (rc)
goto dlpar_store_out;
- rc = dlpar_parse_id_type(&args, hp_elog);
+ rc = dlpar_parse_id_type(&args, &hp_elog);
if (rc)
goto dlpar_store_out;
- init_completion(&hotplug_done);
- queue_hotplug_event(hp_elog, &hotplug_done, &rc);
- wait_for_completion(&hotplug_done);
+ rc = handle_dlpar_errorlog(&hp_elog);
dlpar_store_out:
kfree(argbuf);
- kfree(hp_elog);
if (rc)
pr_err("Could not handle DLPAR request \"%s\"\n", buf);
diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c
index f0e30dc94988..6f27d00505cf 100644
--- a/arch/powerpc/platforms/pseries/mobility.c
+++ b/arch/powerpc/platforms/pseries/mobility.c
@@ -242,7 +242,7 @@ static int add_dt_node(__be32 parent_phandle, __be32 drc_index)
static void prrn_update_node(__be32 phandle)
{
- struct pseries_hp_errorlog *hp_elog;
+ struct pseries_hp_errorlog hp_elog;
struct device_node *dn;
/*
@@ -255,18 +255,12 @@ static void prrn_update_node(__be32 phandle)
return;
}
- hp_elog = kzalloc(sizeof(*hp_elog), GFP_KERNEL);
- if(!hp_elog)
- return;
-
- hp_elog->resource = PSERIES_HP_ELOG_RESOURCE_MEM;
- hp_elog->action = PSERIES_HP_ELOG_ACTION_READD;
- hp_elog->id_type = PSERIES_HP_ELOG_ID_DRC_INDEX;
- hp_elog->_drc_u.drc_index = phandle;
-
- queue_hotplug_event(hp_elog, NULL, NULL);
+ hp_elog.resource = PSERIES_HP_ELOG_RESOURCE_MEM;
+ hp_elog.action = PSERIES_HP_ELOG_ACTION_READD;
+ hp_elog.id_type = PSERIES_HP_ELOG_ID_DRC_INDEX;
+ hp_elog._drc_u.drc_index = phandle;
- kfree(hp_elog);
+ handle_dlpar_errorlog(&hp_elog);
}
int pseries_devicetree_update(s32 scope)
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 60db2ee511fb..9310a20aef44 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -59,8 +59,9 @@ extern int dlpar_detach_node(struct device_node *);
extern int dlpar_acquire_drc(u32 drc_index);
extern int dlpar_release_drc(u32 drc_index);
-void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog,
- struct completion *hotplug_done, int *rc);
+void queue_hotplug_event(struct pseries_hp_errorlog *hp_errlog);
+int handle_dlpar_errorlog(struct pseries_hp_errorlog *hp_errlog);
+
#ifdef CONFIG_MEMORY_HOTPLUG
int dlpar_memory(struct pseries_hp_errorlog *hp_elog);
#else
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 851ce326874a..85a607d52014 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -238,7 +238,7 @@ static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id)
*/
if (hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_MEM ||
hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU)
- queue_hotplug_event(hp_elog, NULL, NULL);
+ queue_hotplug_event(hp_elog);
else
log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
^ permalink raw reply related
* [PATCH v4 1/2] powerpc/pseries: Remove prrn_work workqueue
From: Nathan Fontenot @ 2018-08-31 2:15 UTC (permalink / raw)
To: mpe, linuxppc-dev; +Cc: johnallen3991, desnesn, haren
In-Reply-To: <153568164555.2146.11463040249853453135.stgit@ltcalpine2-lp14.aus.stglabs.ibm.com>
When a PRRN event is received we are already running in a worker
thread. Instead of spawning off another worker thread on the prrn_work
workqueue to handle the PRRN event we can just call the PRRN handler
routine directly.
With this update we can also pass the scope variable for the PRRN
event directly to the handler instead of it being a global variable.
Signed-off-by: John Allen <jallen@linux.ibm.com>
Signed-off-by: Haren Myneni <haren@us.ibm.com>
---
v4:
- Remove prrn_work workqueue as suggested by Michael Ellerman
- Make the PRRN event scope passed in as opposed to a global, suggested
by Michael Ellerman
v3:
-Scrap the mutex as it only replicates existing workqueue behavior.
v2:
-Unlock prrn_lock when PRRN operations are complete, not after handler is
scheduled.
-Remove call to flush_work, the previous broken method of serializing
PRRN events.
---
arch/powerpc/kernel/rtasd.c | 17 +++--------------
1 file changed, 3 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 44d66c33d59d..23b88b923f06 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -274,27 +274,16 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
}
#ifdef CONFIG_PPC_PSERIES
-static s32 prrn_update_scope;
-
-static void prrn_work_fn(struct work_struct *work)
+static void handle_prrn_event(s32 scope)
{
/*
* For PRRN, we must pass the negative of the scope value in
* the RTAS event.
*/
- pseries_devicetree_update(-prrn_update_scope);
+ pseries_devicetree_update(-scope);
numa_update_cpu_topology(false);
}
-static DECLARE_WORK(prrn_work, prrn_work_fn);
-
-static void prrn_schedule_update(u32 scope)
-{
- flush_work(&prrn_work);
- prrn_update_scope = scope;
- schedule_work(&prrn_work);
-}
-
static void handle_rtas_event(const struct rtas_error_log *log)
{
if (rtas_error_type(log) != RTAS_TYPE_PRRN || !prrn_is_enabled())
@@ -303,7 +292,7 @@ static void handle_rtas_event(const struct rtas_error_log *log)
/* For PRRN Events the extended log length is used to denote
* the scope for calling rtas update-nodes.
*/
- prrn_schedule_update(rtas_error_extended_log_length(log));
+ handle_prrn_event(rtas_error_extended_log_length(log));
}
#else
^ permalink raw reply related
* [PATCH v4 0/2] powerpc/pseries: Improve serialization of PRRN events
From: Nathan Fontenot @ 2018-08-31 2:15 UTC (permalink / raw)
To: mpe, linuxppc-dev; +Cc: johnallen3991, desnesn, haren
Stress testing has uncovered issues with handling continuously queued PRRN
events. Running PRRN events in this way can seriously load the system given
the sheer volume of dlpar being handled. This patchset ensures that PRRN
events are handled more synchronously. It also updates dlpar invocation
so that it can be done directly instead of waiting on a workqueue.
-Nathan
---
v4:
-Update patch 1/2 to remove prrn workqueue
-Replace patch 2/2 to allow for direct dlpar invocation
v3:
-Scrap the PRRN mutex as it only replicates existing workqueue behavior.
v2:
-Unlock prrn_lock when PRRN operations are complete, not after handler is
scheduled.
-Remove call to flush_work, the previous broken method of serializing
PRRN events.
Nathan Fontenot (2):
powerpc/pseries: Remove prrn_work workqueue
powerpc/pseries:Remove unneeded uses of dlpar work queue
arch/powerpc/kernel/rtasd.c | 17 ++-----------
arch/powerpc/platforms/pseries/dlpar.c | 37 +++++++----------------------
arch/powerpc/platforms/pseries/mobility.c | 18 +++++---------
arch/powerpc/platforms/pseries/pseries.h | 5 ++--
arch/powerpc/platforms/pseries/ras.c | 2 +-
5 files changed, 22 insertions(+), 57 deletions(-)
^ permalink raw reply
* Re: [PATCH RFCv2 6/6] memory-hotplug.txt: Add some details about locking internals
From: Pasha Tatashin @ 2018-08-30 19:38 UTC (permalink / raw)
To: David Hildenbrand, linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-acpi@vger.kernel.org,
xen-devel@lists.xenproject.org, devel@linuxdriverproject.org,
Jonathan Corbet, Michal Hocko, Andrew Morton
In-Reply-To: <20180821104418.12710-7-david@redhat.com>
DQpSZXZpZXdlZC1ieTogUGF2ZWwgVGF0YXNoaW4gPHBhdmVsLnRhdGFzaGluQG1pY3Jvc29mdC5j
b20+DQoNCk9uIDgvMjEvMTggNjo0NCBBTSwgRGF2aWQgSGlsZGVuYnJhbmQgd3JvdGU6DQo+IExl
dCdzIGRvY3VtZW50IHRoZSBtYWdpYyBhIGJpdCwgZXNwZWNpYWxseSB3aHkgZGV2aWNlX2hvdHBs
dWdfbG9jayBpcw0KPiByZXF1aXJlZCB3aGVuIGFkZGluZy9yZW1vdmluZyBtZW1vcnkgYW5kIGhv
dyBpdCBhbGwgcGxheSB0b2dldGhlciB3aXRoDQo+IHJlcXVlc3RzIHRvIG9ubGluZS9vZmZsaW5l
IG1lbW9yeSBmcm9tIHVzZXIgc3BhY2UuDQo+IA==
^ permalink raw reply
* Re: [PATCH RFCv2 5/6] powerpc/powernv: hold device_hotplug_lock in memtrace_offline_pages()
From: Pasha Tatashin @ 2018-08-30 19:38 UTC (permalink / raw)
To: David Hildenbrand, linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-acpi@vger.kernel.org,
xen-devel@lists.xenproject.org, devel@linuxdriverproject.org,
Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
Rashmica Gupta, Balbir Singh, Michael Neuling
In-Reply-To: <20180821104418.12710-6-david@redhat.com>
UmV2aWV3ZWQtYnk6IFBhdmVsIFRhdGFzaGluIDxwYXZlbC50YXRhc2hpbkBtaWNyb3NvZnQuY29t
Pg0KDQpPbiA4LzIxLzE4IDY6NDQgQU0sIERhdmlkIEhpbGRlbmJyYW5kIHdyb3RlOg0KPiBMZXQn
cyBwZXJmb3JtIGFsbCBjaGVja2luZyArIG9mZmxpbmluZyArIHJlbW92aW5nIHVuZGVyDQo+IGRl
dmljZV9ob3RwbHVnX2xvY2ssIHNvIG5vYm9keSBjYW4gbWVzcyB3aXRoIHRoZXNlIGRldmljZXMg
dmlhDQo+IHN5c2ZzIGNvbmN1cnJlbnRseS4NCj4gDQo+IENjOiBCZW5qYW1pbiBIZXJyZW5zY2ht
aWR0IDxiZW5oQGtlcm5lbC5jcmFzaGluZy5vcmc+DQo+IENjOiBQYXVsIE1hY2tlcnJhcyA8cGF1
bHVzQHNhbWJhLm9yZz4NCj4gQ2M6IE1pY2hhZWwgRWxsZXJtYW4gPG1wZUBlbGxlcm1hbi5pZC5h
dT4NCj4gQ2M6IFJhc2htaWNhIEd1cHRhIDxyYXNobWljYS5nQGdtYWlsLmNvbT4NCj4gQ2M6IEJh
bGJpciBTaW5naCA8YnNpbmdoYXJvcmFAZ21haWwuY29tPg0KPiBDYzogTWljaGFlbCBOZXVsaW5n
IDxtaWtleUBuZXVsaW5nLm9yZz4NCj4gU2lnbmVkLW9mZi1ieTogRGF2aWQgSGlsZGVuYnJhbmQg
PGRhdmlkQHJlZGhhdC5jb20+DQo+IC0tLQ0KPiAgYXJjaC9wb3dlcnBjL3BsYXRmb3Jtcy9wb3dl
cm52L21lbXRyYWNlLmMgfCAxMCArKysrKysrKy0tDQo+ICAxIGZpbGUgY2hhbmdlZCwgOCBpbnNl
cnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQ0KPiANCj4gZGlmZiAtLWdpdCBhL2FyY2gvcG93ZXJw
Yy9wbGF0Zm9ybXMvcG93ZXJudi9tZW10cmFjZS5jIGIvYXJjaC9wb3dlcnBjL3BsYXRmb3Jtcy9w
b3dlcm52L21lbXRyYWNlLmMNCj4gaW5kZXggZWY3MTgxZDRmZTY4Li40NzNlNTk4NDJlYzUgMTAw
NjQ0DQo+IC0tLSBhL2FyY2gvcG93ZXJwYy9wbGF0Zm9ybXMvcG93ZXJudi9tZW10cmFjZS5jDQo+
ICsrKyBiL2FyY2gvcG93ZXJwYy9wbGF0Zm9ybXMvcG93ZXJudi9tZW10cmFjZS5jDQo+IEBAIC03
NCw5ICs3NCwxMyBAQCBzdGF0aWMgYm9vbCBtZW10cmFjZV9vZmZsaW5lX3BhZ2VzKHUzMiBuaWQs
IHU2NCBzdGFydF9wZm4sIHU2NCBucl9wYWdlcykNCj4gIHsNCj4gIAl1NjQgZW5kX3BmbiA9IHN0
YXJ0X3BmbiArIG5yX3BhZ2VzIC0gMTsNCj4gIA0KPiArCWxvY2tfZGV2aWNlX2hvdHBsdWcoKTsN
Cj4gKw0KPiAgCWlmICh3YWxrX21lbW9yeV9yYW5nZShzdGFydF9wZm4sIGVuZF9wZm4sIE5VTEws
DQo+IC0JICAgIGNoZWNrX21lbWJsb2NrX29ubGluZSkpDQo+ICsJICAgIGNoZWNrX21lbWJsb2Nr
X29ubGluZSkpIHsNCj4gKwkJdW5sb2NrX2RldmljZV9ob3RwbHVnKCk7DQo+ICAJCXJldHVybiBm
YWxzZTsNCj4gKwl9DQo+ICANCj4gIAl3YWxrX21lbW9yeV9yYW5nZShzdGFydF9wZm4sIGVuZF9w
Zm4sICh2b2lkICopTUVNX0dPSU5HX09GRkxJTkUsDQo+ICAJCQkgIGNoYW5nZV9tZW1ibG9ja19z
dGF0ZSk7DQo+IEBAIC04NCwxNCArODgsMTYgQEAgc3RhdGljIGJvb2wgbWVtdHJhY2Vfb2ZmbGlu
ZV9wYWdlcyh1MzIgbmlkLCB1NjQgc3RhcnRfcGZuLCB1NjQgbnJfcGFnZXMpDQo+ICAJaWYgKG9m
ZmxpbmVfcGFnZXMoc3RhcnRfcGZuLCBucl9wYWdlcykpIHsNCj4gIAkJd2Fsa19tZW1vcnlfcmFu
Z2Uoc3RhcnRfcGZuLCBlbmRfcGZuLCAodm9pZCAqKU1FTV9PTkxJTkUsDQo+ICAJCQkJICBjaGFu
Z2VfbWVtYmxvY2tfc3RhdGUpOw0KPiArCQl1bmxvY2tfZGV2aWNlX2hvdHBsdWcoKTsNCj4gIAkJ
cmV0dXJuIGZhbHNlOw0KPiAgCX0NCj4gIA0KPiAgCXdhbGtfbWVtb3J5X3JhbmdlKHN0YXJ0X3Bm
biwgZW5kX3BmbiwgKHZvaWQgKilNRU1fT0ZGTElORSwNCj4gIAkJCSAgY2hhbmdlX21lbWJsb2Nr
X3N0YXRlKTsNCj4gIA0KPiAtCXJlbW92ZV9tZW1vcnkobmlkLCBzdGFydF9wZm4gPDwgUEFHRV9T
SElGVCwgbnJfcGFnZXMgPDwgUEFHRV9TSElGVCk7DQo+ICsJX19yZW1vdmVfbWVtb3J5KG5pZCwg
c3RhcnRfcGZuIDw8IFBBR0VfU0hJRlQsIG5yX3BhZ2VzIDw8IFBBR0VfU0hJRlQpOw0KPiAgDQo+
ICsJdW5sb2NrX2RldmljZV9ob3RwbHVnKCk7DQo+ICAJcmV0dXJuIHRydWU7DQo+ICB9DQo+ICAN
Cj4g
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* Re: [PATCH RFCv2 4/6] powerpc/powernv: hold device_hotplug_lock when calling device_online()
From: Pasha Tatashin @ 2018-08-30 19:38 UTC (permalink / raw)
To: David Hildenbrand, linux-mm@kvack.org
Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-acpi@vger.kernel.org,
xen-devel@lists.xenproject.org, devel@linuxdriverproject.org,
Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
Rashmica Gupta, Balbir Singh, Michael Neuling
In-Reply-To: <20180821104418.12710-5-david@redhat.com>
UmV2aWV3ZWQtYnk6IFBhdmVsIFRhdGFzaGluIDxwYXZlbC50YXRhc2hpbkBtaWNyb3NvZnQuY29t
Pg0KDQpPbiA4LzIxLzE4IDY6NDQgQU0sIERhdmlkIEhpbGRlbmJyYW5kIHdyb3RlOg0KPiBkZXZp
Y2Vfb25saW5lKCkgc2hvdWxkIGJlIGNhbGxlZCB3aXRoIGRldmljZV9ob3RwbHVnX2xvY2soKSBo
ZWxkLg0KPiANCj4gQ2M6IEJlbmphbWluIEhlcnJlbnNjaG1pZHQgPGJlbmhAa2VybmVsLmNyYXNo
aW5nLm9yZz4NCj4gQ2M6IFBhdWwgTWFja2VycmFzIDxwYXVsdXNAc2FtYmEub3JnPg0KPiBDYzog
TWljaGFlbCBFbGxlcm1hbiA8bXBlQGVsbGVybWFuLmlkLmF1Pg0KPiBDYzogUmFzaG1pY2EgR3Vw
dGEgPHJhc2htaWNhLmdAZ21haWwuY29tPg0KPiBDYzogQmFsYmlyIFNpbmdoIDxic2luZ2hhcm9y
YUBnbWFpbC5jb20+DQo+IENjOiBNaWNoYWVsIE5ldWxpbmcgPG1pa2V5QG5ldWxpbmcub3JnPg0K
PiBTaWduZWQtb2ZmLWJ5OiBEYXZpZCBIaWxkZW5icmFuZCA8ZGF2aWRAcmVkaGF0LmNvbT4NCj4g
LS0tDQo+ICBhcmNoL3Bvd2VycGMvcGxhdGZvcm1zL3Bvd2VybnYvbWVtdHJhY2UuYyB8IDIgKysN
Cj4gIDEgZmlsZSBjaGFuZ2VkLCAyIGluc2VydGlvbnMoKykNCj4gDQo+IGRpZmYgLS1naXQgYS9h
cmNoL3Bvd2VycGMvcGxhdGZvcm1zL3Bvd2VybnYvbWVtdHJhY2UuYyBiL2FyY2gvcG93ZXJwYy9w
bGF0Zm9ybXMvcG93ZXJudi9tZW10cmFjZS5jDQo+IGluZGV4IDhmMWNkNGYzYmZkNS4uZWY3MTgx
ZDRmZTY4IDEwMDY0NA0KPiAtLS0gYS9hcmNoL3Bvd2VycGMvcGxhdGZvcm1zL3Bvd2VybnYvbWVt
dHJhY2UuYw0KPiArKysgYi9hcmNoL3Bvd2VycGMvcGxhdGZvcm1zL3Bvd2VybnYvbWVtdHJhY2Uu
Yw0KPiBAQCAtMjI5LDkgKzIyOSwxMSBAQCBzdGF0aWMgaW50IG1lbXRyYWNlX29ubGluZSh2b2lk
KQ0KPiAgCQkgKiB3ZSBuZWVkIHRvIG9ubGluZSB0aGUgbWVtb3J5IG91cnNlbHZlcy4NCj4gIAkJ
ICovDQo+ICAJCWlmICghbWVtaHBfYXV0b19vbmxpbmUpIHsNCj4gKwkJCWxvY2tfZGV2aWNlX2hv
dHBsdWcoKTsNCj4gIAkJCXdhbGtfbWVtb3J5X3JhbmdlKFBGTl9ET1dOKGVudC0+c3RhcnQpLA0K
PiAgCQkJCQkgIFBGTl9VUChlbnQtPnN0YXJ0ICsgZW50LT5zaXplIC0gMSksDQo+ICAJCQkJCSAg
TlVMTCwgb25saW5lX21lbV9ibG9jayk7DQo+ICsJCQl1bmxvY2tfZGV2aWNlX2hvdHBsdWcoKTsN
Cj4gIAkJfQ0KPiAgDQo+ICAJCS8qDQo+IA==
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