* Re: [PATCH 8/8] kconfig: remove CONFIG_MCA leftovers
From: Christoph Hellwig @ 2018-10-17 8:17 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, Linux Kbuild mailing list, linux-pci,
Linux Kernel Mailing List, Dominik Brodowski, Alex Bounine,
linuxppc-dev, Christoph Hellwig
In-Reply-To: <CAK7LNAQwyWUq_ohVMe9QLLbyHHQdjkrkM9DPd3pgYLz8UhG6rA@mail.gmail.com>
On Tue, Oct 16, 2018 at 02:20:23PM +0900, Masahiro Yamada wrote:
> On Sun, Oct 14, 2018 at 12:11 AM Christoph Hellwig <hch@lst.de> wrote:
> >
> > Signed-off-by: Christoph Hellwig <hch@lst.de>
> > ---
>
>
> Can you use "powerpc:" or something
> for the subject line?
>
> I'd like to see "kconfig:" only for patches
> that touch the scripts/kconfig/ directory.
Sorry, I missed this for v2. Will fix it up for the next version
or let you fix it up if there isn't one.
^ permalink raw reply
* move bus (PCI, PCMCIA, EISA, rapdio) config to drivers/ v2
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
Hi all,
currently every architecture that wants to provide on of the common
periphal busses needs to add some boilerplate code and include the
right Kconfig files. This series instead just selects the presence
(when needed) and then handles everything in the bus-specific
Kconfig file under drivers/.
Changes since v1:
- rename all HAS_* Kconfig symbols to HAVE_*
- drop the CONFIG_PCI_QSPAN option entirely
- drop duplicate select from powerpc
- restore missing selection of PCI_MSI for riscv
- update x86 and riscv defconfigs to include PCI
- actually inclue drivers/eisa/Kconfig
- adjust some captilizations
^ permalink raw reply
* [PATCH 8/8] kconfig: remove CONFIG_MCA leftovers
From: Christoph Hellwig @ 2018-10-17 8:02 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/powerpc/Kconfig | 4 ----
drivers/scsi/Kconfig | 6 +++---
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index f2001fff14d1..f3ec13765639 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -944,10 +944,6 @@ config FSL_GTM
help
Freescale General-purpose Timers support
-# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
-config MCA
- bool
-
config PCI_DOMAINS
def_bool PCI
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 7c097006c54d..d3734c54aec9 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -535,7 +535,7 @@ config SCSI_HPTIOP
config SCSI_BUSLOGIC
tristate "BusLogic SCSI support"
- depends on (PCI || ISA || MCA) && SCSI && ISA_DMA_API && VIRT_TO_BUS
+ depends on (PCI || ISA) && SCSI && ISA_DMA_API && VIRT_TO_BUS
---help---
This is support for BusLogic MultiMaster and FlashPoint SCSI Host
Adapters. Consult the SCSI-HOWTO, available from
@@ -1142,12 +1142,12 @@ config SCSI_LPFC_DEBUG_FS
config SCSI_SIM710
tristate "Simple 53c710 SCSI support (Compaq, NCR machines)"
- depends on (EISA || MCA) && SCSI
+ depends on EISA && SCSI
select SCSI_SPI_ATTRS
---help---
This driver is for NCR53c710 based SCSI host adapters.
- It currently supports Compaq EISA cards and NCR MCA cards
+ It currently supports Compaq EISA cards.
config SCSI_DC395x
tristate "Tekram DC395(U/UW/F) and DC315(U) SCSI support"
--
2.19.1
^ permalink raw reply related
* [PATCH 3/8] powerpc: PCI_MSI needs PCI
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
Various powerpc boards select the PCI_MSI config option without selecting
PCI, resulting in potentially not compilable configurations if the by
default enabled PCI option is disabled. Explicitly select PCI to ensure
we always have valid configs.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/powerpc/platforms/40x/Kconfig | 1 +
arch/powerpc/platforms/44x/Kconfig | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index 60254a321a91..d5361e63e0bb 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -33,6 +33,7 @@ config KILAUEA
select 405EX
select PPC40x_SIMPLE
select PPC4xx_PCI_EXPRESS
+ select PCI
select PCI_MSI
select PPC4xx_MSI
help
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index a6011422b861..70856a213663 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -24,6 +24,7 @@ config BLUESTONE
default n
select PPC44x_SIMPLE
select APM821xx
+ select PCI
select PCI_MSI
select PPC4xx_MSI
select PPC4xx_PCI_EXPRESS
@@ -78,6 +79,7 @@ config KATMAI
select 440SPe
select PCI
select PPC4xx_PCI_EXPRESS
+ select PCI
select PCI_MSI
select PPC4xx_MSI
help
@@ -219,6 +221,7 @@ config AKEBONO
select SWIOTLB
select 476FPE
select PPC4xx_PCI_EXPRESS
+ select PCI
select PCI_MSI
select PPC4xx_HSTA_MSI
select I2C
--
2.19.1
^ permalink raw reply related
* [PATCH 1/8] aha152x: rename the PCMCIA define
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
We plan to enable building the PCMCIA core and drivers, and the
non-prefixed PCMCIA name clashes with some arch headers.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
---
drivers/scsi/aha152x.c | 14 +++++++-------
drivers/scsi/pcmcia/aha152x_core.c | 2 +-
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/scsi/aha152x.c b/drivers/scsi/aha152x.c
index 4d7b0e0adbf7..301b3cad15f8 100644
--- a/drivers/scsi/aha152x.c
+++ b/drivers/scsi/aha152x.c
@@ -269,7 +269,7 @@ static LIST_HEAD(aha152x_host_list);
/* DEFINES */
/* For PCMCIA cards, always use AUTOCONF */
-#if defined(PCMCIA) || defined(MODULE)
+#if defined(AHA152X_PCMCIA) || defined(MODULE)
#if !defined(AUTOCONF)
#define AUTOCONF
#endif
@@ -297,7 +297,7 @@ CMD_INC_RESID(struct scsi_cmnd *cmd, int inc)
#define DELAY_DEFAULT 1000
-#if defined(PCMCIA)
+#if defined(AHA152X_PCMCIA)
#define IRQ_MIN 0
#define IRQ_MAX 16
#else
@@ -328,7 +328,7 @@ MODULE_AUTHOR("Jürgen Fischer");
MODULE_DESCRIPTION(AHA152X_REVID);
MODULE_LICENSE("GPL");
-#if !defined(PCMCIA)
+#if !defined(AHA152X_PCMCIA)
#if defined(MODULE)
static int io[] = {0, 0};
module_param_hw_array(io, int, ioport, NULL, 0);
@@ -391,7 +391,7 @@ static struct isapnp_device_id id_table[] = {
MODULE_DEVICE_TABLE(isapnp, id_table);
#endif /* ISAPNP */
-#endif /* !PCMCIA */
+#endif /* !AHA152X_PCMCIA */
static struct scsi_host_template aha152x_driver_template;
@@ -863,7 +863,7 @@ void aha152x_release(struct Scsi_Host *shpnt)
if (shpnt->irq)
free_irq(shpnt->irq, shpnt);
-#if !defined(PCMCIA)
+#if !defined(AHA152X_PCMCIA)
if (shpnt->io_port)
release_region(shpnt->io_port, IO_RANGE);
#endif
@@ -2924,7 +2924,7 @@ static struct scsi_host_template aha152x_driver_template = {
.slave_alloc = aha152x_adjust_queue,
};
-#if !defined(PCMCIA)
+#if !defined(AHA152X_PCMCIA)
static int setup_count;
static struct aha152x_setup setup[2];
@@ -3392,4 +3392,4 @@ static int __init aha152x_setup(char *str)
__setup("aha152x=", aha152x_setup);
#endif
-#endif /* !PCMCIA */
+#endif /* !AHA152X_PCMCIA */
diff --git a/drivers/scsi/pcmcia/aha152x_core.c b/drivers/scsi/pcmcia/aha152x_core.c
index dba3716511c5..24b89228b241 100644
--- a/drivers/scsi/pcmcia/aha152x_core.c
+++ b/drivers/scsi/pcmcia/aha152x_core.c
@@ -1,3 +1,3 @@
-#define PCMCIA 1
+#define AHA152X_PCMCIA 1
#define AHA152X_STAT 1
#include "aha152x.c"
--
2.19.1
^ permalink raw reply related
* [PATCH 4/8] PCI: consolidate PCI config entry in drivers/pci
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
There is no good reason to duplicate the PCI menu in every architecture.
Instead provide a selectable HAS_PCI symbol that indicates availability
of PCI support and the handle the rest in drivers/pci.
Note that for powerpc we now select HAVE_PCI globally instead of the
convoluted mess of conditional or or non-conditional support per board,
similar to what we do e.g. on x86. For alpha PCI is selected for the
non-jensen configs as it was the default before, and a lot of code does
not compile without PCI enabled. On other architectures with limited
PCI support that wasn't as complicated I've left the selection as-is.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
arch/alpha/Kconfig | 15 ++-------
arch/arc/Kconfig | 20 ------------
arch/arc/plat-axs10x/Kconfig | 2 +-
arch/arc/plat-hsdk/Kconfig | 2 +-
arch/arm/Kconfig | 19 ++----------
arch/arm/mach-ks8695/Kconfig | 10 +++---
arch/arm/mach-pxa/Kconfig | 2 +-
arch/arm64/Kconfig | 10 +-----
arch/hexagon/Kconfig | 3 --
arch/ia64/Kconfig | 9 +-----
arch/m68k/Kconfig.bus | 11 -------
arch/m68k/Kconfig.cpu | 1 +
arch/microblaze/Kconfig | 6 +---
arch/mips/Kconfig | 43 +++++++++-----------------
arch/mips/alchemy/Kconfig | 6 ++--
arch/mips/ath25/Kconfig | 2 +-
arch/mips/ath79/Kconfig | 8 ++---
arch/mips/bcm63xx/Kconfig | 14 ++++-----
arch/mips/lantiq/Kconfig | 2 +-
arch/mips/loongson64/Kconfig | 6 ++--
arch/mips/pmcs-msp71xx/Kconfig | 10 +++---
arch/mips/ralink/Kconfig | 8 ++---
arch/mips/sibyte/Kconfig | 10 +++---
arch/mips/txx9/Kconfig | 8 ++---
arch/mips/vr41xx/Kconfig | 8 ++---
arch/parisc/Kconfig | 1 +
arch/powerpc/Kconfig | 25 ++++-----------
arch/powerpc/platforms/44x/Kconfig | 1 -
arch/powerpc/platforms/512x/Kconfig | 1 -
arch/powerpc/platforms/52xx/Kconfig | 1 -
arch/powerpc/platforms/83xx/Kconfig | 1 -
arch/powerpc/platforms/85xx/Kconfig | 1 -
arch/powerpc/platforms/86xx/Kconfig | 2 --
arch/powerpc/platforms/Kconfig | 1 -
arch/powerpc/platforms/Kconfig.cputype | 2 --
arch/powerpc/platforms/ps3/Kconfig | 1 -
arch/riscv/Kconfig | 18 ++---------
arch/s390/Kconfig | 23 +++++---------
arch/sh/Kconfig | 19 ++----------
arch/sh/boards/Kconfig | 30 +++++++++---------
arch/sparc/Kconfig | 15 +--------
arch/um/Kconfig | 3 --
arch/unicore32/Kconfig | 11 +------
arch/x86/Kconfig | 12 +------
arch/x86/configs/i386_defconfig | 1 +
arch/x86/configs/x86_64_defconfig | 1 +
arch/xtensa/Kconfig | 16 +---------
arch/xtensa/configs/common_defconfig | 1 +
arch/xtensa/configs/iss_defconfig | 2 +-
drivers/Kconfig | 4 +++
drivers/parisc/Kconfig | 11 -------
drivers/pci/Kconfig | 12 +++++++
52 files changed, 133 insertions(+), 318 deletions(-)
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 5b4f88363453..bb89924c0361 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -6,6 +6,8 @@ config ALPHA
select ARCH_MIGHT_HAVE_PC_SERIO
select ARCH_NO_PREEMPT
select ARCH_USE_CMPXCHG_LOCKREF
+ select HAVE_PCI if !ALPHA_JENSEN
+ select PCI if !ALPHA_JENSEN
select HAVE_AOUT
select HAVE_IDE
select HAVE_OPROFILE
@@ -15,6 +17,7 @@ config ALPHA
select NEED_SG_DMA_LENGTH
select VIRT_TO_BUS
select GENERIC_IRQ_PROBE
+ select GENERIC_PCI_IOMAP if PCI
select AUTO_IRQ_AFFINITY if SMP
select GENERIC_IRQ_SHOW
select ARCH_WANT_IPC_PARSE_VERSION
@@ -319,17 +322,6 @@ config ISA_DMA_API
bool
default y
-config PCI
- bool
- depends on !ALPHA_JENSEN
- select GENERIC_PCI_IOMAP
- default y
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
- VESA. If you have PCI, say Y, otherwise N.
-
config PCI_DOMAINS
bool
default y
@@ -681,7 +673,6 @@ config HZ
default 1200 if HZ_1200
default 1024
-source "drivers/pci/Kconfig"
source "drivers/eisa/Kconfig"
source "drivers/pcmcia/Kconfig"
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index a045f3086047..55a6953e9239 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -53,9 +53,6 @@ config ARC
config ARCH_HAS_CACHE_LINE_SIZE
def_bool y
-config MIGHT_HAVE_PCI
- bool
-
config TRACE_IRQFLAGS_SUPPORT
def_bool y
@@ -555,24 +552,7 @@ config FORCE_MAX_ZONEORDER
default "12" if ARC_HUGEPAGE_16M
default "11"
-menu "Bus Support"
-
-config PCI
- bool "PCI support" if MIGHT_HAVE_PCI
- help
- PCI is the name of a bus system, i.e., the way the CPU talks to
- the other stuff inside your box. Find out if your board/platform
- has PCI.
-
- Note: PCIe support for Synopsys Device will be available only
- when HAPS DX is configured with PCIe RC bitmap. If you have PCI,
- say Y, otherwise N.
-
config PCI_SYSCALL
def_bool PCI
-source "drivers/pci/Kconfig"
-
-endmenu
-
source "kernel/power/Kconfig"
diff --git a/arch/arc/plat-axs10x/Kconfig b/arch/arc/plat-axs10x/Kconfig
index 4e0df7b7a248..27b9eb97a6bf 100644
--- a/arch/arc/plat-axs10x/Kconfig
+++ b/arch/arc/plat-axs10x/Kconfig
@@ -11,7 +11,7 @@ menuconfig ARC_PLAT_AXS10X
select DW_APB_ICTL
select GPIO_DWAPB
select OF_GPIO
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
select GENERIC_IRQ_CHIP
select GPIOLIB
select AXS101 if ISA_ARCOMPACT
diff --git a/arch/arc/plat-hsdk/Kconfig b/arch/arc/plat-hsdk/Kconfig
index 9356753c2ed8..f25c085b9874 100644
--- a/arch/arc/plat-hsdk/Kconfig
+++ b/arch/arc/plat-hsdk/Kconfig
@@ -11,4 +11,4 @@ menuconfig ARC_SOC_HSDK
select ARC_HAS_ACCL_REGS
select CLK_HSDK
select RESET_HSDK
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e8cd55a5b04c..516105df6c71 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -149,9 +149,6 @@ config ARM_DMA_IOMMU_ALIGNMENT
endif
-config MIGHT_HAVE_PCI
- bool
-
config SYS_SUPPORTS_APM_EMULATION
bool
@@ -335,7 +332,7 @@ config ARCH_MULTIPLATFORM
select COMMON_CLK
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_MULTI_HANDLER
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
select PCI_DOMAINS if PCI
select SPARSE_IRQ
select USE_OF
@@ -451,7 +448,7 @@ config ARCH_IXP4XX
select DMABOUNCE if PCI
select GENERIC_CLOCKEVENTS
select GPIOLIB
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
select NEED_MACH_IO_H
select USB_EHCI_BIG_ENDIAN_DESC
select USB_EHCI_BIG_ENDIAN_MMIO
@@ -464,7 +461,7 @@ config ARCH_DOVE
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_MULTI_HANDLER
select GPIOLIB
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
select MVEBU_MBUS
select PINCTRL
select PINCTRL_DOVE
@@ -1231,14 +1228,6 @@ config ISA_DMA
config ISA_DMA_API
bool
-config PCI
- bool "PCI support" if MIGHT_HAVE_PCI
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
- VESA. If you have PCI, say Y, otherwise N.
-
config PCI_DOMAINS
bool "Support for multiple PCI domains"
depends on PCI
@@ -1267,8 +1256,6 @@ config PCI_HOST_ITE8152
default y
select DMABOUNCE
-source "drivers/pci/Kconfig"
-
source "drivers/pcmcia/Kconfig"
endmenu
diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig
index a545976bdbd6..b3185c05fffa 100644
--- a/arch/arm/mach-ks8695/Kconfig
+++ b/arch/arm/mach-ks8695/Kconfig
@@ -4,7 +4,7 @@ menu "Kendin/Micrel KS8695 Implementations"
config MACH_KS8695
bool "KS8695 development board"
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
help
Say 'Y' here if you want your kernel to run on the original
Kendin-Micrel KS8695 development board.
@@ -52,7 +52,7 @@ config MACH_CM4002
config MACH_CM4008
bool "OpenGear CM4008"
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
CM4008 Console Server. See http://www.opengear.com for more
@@ -60,7 +60,7 @@ config MACH_CM4008
config MACH_CM41xx
bool "OpenGear CM41xx"
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
CM4016 or CM4048 Console Servers. See http://www.opengear.com for
@@ -68,7 +68,7 @@ config MACH_CM41xx
config MACH_IM4004
bool "OpenGear IM4004"
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
IM4004 Secure Access Server. See http://www.opengear.com for
@@ -76,7 +76,7 @@ config MACH_IM4004
config MACH_IM42xx
bool "OpenGear IM42xx"
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
IM4216 or IM4248 Console Servers. See http://www.opengear.com for
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index a68b34183107..b185794549be 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -125,7 +125,7 @@ config MACH_ARMCORE
bool "CompuLab CM-X255/CM-X270 modules"
select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
select IWMMXT
- select MIGHT_HAVE_PCI
+ select HAVE_PCI
select NEED_MACH_IO_H if PCI
select PXA25x
select PXA27x
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1b1a0e95c751..ae0f1ef0a748 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -98,6 +98,7 @@ config ARM64
select GENERIC_TIME_VSYSCALL
select HANDLE_DOMAIN_IRQ
select HARDIRQS_SW_RESEND
+ select HAVE_PCI
select HAVE_ACPI_APEI if (ACPI && EFI)
select HAVE_ALIGNED_STRUCT_PAGE if SLUB
select HAVE_ARCH_AUDITSYSCALL
@@ -284,13 +285,6 @@ source "arch/arm64/Kconfig.platforms"
menu "Bus support"
-config PCI
- bool "PCI support"
- help
- This feature enables support for PCI bus system. If you say Y
- here, the kernel will include drivers and infrastructure code
- to support PCI bus devices.
-
config PCI_DOMAINS
def_bool PCI
@@ -300,8 +294,6 @@ config PCI_DOMAINS_GENERIC
config PCI_SYSCALL
def_bool PCI
-source "drivers/pci/Kconfig"
-
endmenu
menu "Kernel Features"
diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig
index 89a4b22f34d9..1bc856c61ed8 100644
--- a/arch/hexagon/Kconfig
+++ b/arch/hexagon/Kconfig
@@ -44,9 +44,6 @@ config FRAME_POINTER
config LOCKDEP_SUPPORT
def_bool y
-config PCI
- def_bool n
-
config EARLY_PRINTK
def_bool y
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 8b4a0c1748c0..89da763d7c17 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -51,6 +51,7 @@ config IA64
select MODULES_USE_ELF_RELA
select ARCH_USE_CMPXCHG_LOCKREF
select HAVE_ARCH_AUDITSYSCALL
+ select HAVE_PCI if !IA64_HP_SIM
select NEED_DMA_MAP_STATE
select NEED_SG_DMA_LENGTH
default y
@@ -546,20 +547,12 @@ if !IA64_HP_SIM
menu "Bus options (PCI, PCMCIA)"
-config PCI
- bool "PCI support"
- help
- Real IA-64 machines all have PCI/PCI-X/PCI Express busses. Say Y
- here unless you are using a simulator without PCI support.
-
config PCI_DOMAINS
def_bool PCI
config PCI_SYSCALL
def_bool PCI
-source "drivers/pci/Kconfig"
-
source "drivers/pcmcia/Kconfig"
endmenu
diff --git a/arch/m68k/Kconfig.bus b/arch/m68k/Kconfig.bus
index aef698fa50e5..8cb0604b195b 100644
--- a/arch/m68k/Kconfig.bus
+++ b/arch/m68k/Kconfig.bus
@@ -63,17 +63,6 @@ source "drivers/zorro/Kconfig"
endif
-config PCI
- bool "PCI support"
- depends on M54xx
- help
- Enable the PCI bus. Support for the PCI bus hardware built into the
- ColdFire 547x and 548x processors.
-
-if PCI
-source "drivers/pci/Kconfig"
-endif
-
if !MMU
config ISA_DMA_API
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index 21f00349af52..60ac1cd8b96f 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -299,6 +299,7 @@ config M53xx
bool
config M54xx
+ select HAVE_PCI
bool
endif # COLDFIRE
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index ace5c5bf1836..3d352862db30 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -32,6 +32,7 @@ config MICROBLAZE
select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP
select HAVE_OPROFILE
+ select HAVE_PCI
select IRQ_DOMAIN
select XILINX_INTC
select MODULES_USE_ELF_RELA
@@ -268,9 +269,6 @@ endmenu
menu "Bus Options"
-config PCI
- bool "PCI support"
-
config PCI_DOMAINS
def_bool PCI
@@ -284,6 +282,4 @@ config PCI_XILINX
bool "Xilinx PCI host bridge support"
depends on PCI
-source "drivers/pci/Kconfig"
-
endmenu
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 35511999156a..09b93d5a55cb 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -74,6 +74,7 @@ config MIPS
select IRQ_FORCED_THREADING
select MODULES_USE_ELF_RELA if MODULES && 64BIT
select MODULES_USE_ELF_REL if MODULES
+ select PCI_DOMAINS if PCI
select PERF_USE_VMALLOC
select RTC_LIB if !MACH_LOONGSON64
select SYSCTL_EXCEPTION_TRACE
@@ -96,7 +97,7 @@ config MIPS_GENERIC
select CPU_MIPSR2_IRQ_EI
select CSRC_R4K
select DMA_PERDEV_COHERENT
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select LIBFDT
select MIPS_AUTO_PFN_OFFSET
@@ -256,7 +257,7 @@ config BCM47XX
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SYS_HAS_CPU_MIPS32_R1
select NO_EXCEPT_FILL
@@ -299,7 +300,7 @@ config MIPS_COBALT
select CSRC_R4K
select CEVT_GT641XX
select DMA_NONCOHERENT
- select HW_HAS_PCI
+ select HAVE_PCI
select I8253
select I8259
select IRQ_MIPS_CPU
@@ -422,7 +423,7 @@ config LASAT
select CSRC_R4K
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select PCI_GT64XXX_PCI0
select MIPS_NILE4
@@ -502,7 +503,7 @@ config MIPS_MALTA
select HAVE_PCSPKR_PLATFORM
select IRQ_MIPS_CPU
select MIPS_GIC
- select HW_HAS_PCI
+ select HAVE_PCI
select I8253
select I8259
select MIPS_BONITO64
@@ -556,7 +557,7 @@ config MACH_PIC32
config NEC_MARKEINS
bool "NEC EMMA2RH Mark-eins board"
select SOC_EMMA2RH
- select HW_HAS_PCI
+ select HAVE_PCI
help
This enables support for the NEC Electronics Mark-eins boards.
@@ -673,7 +674,7 @@ config SGI_IP27
select BOOT_ELF64
select DEFAULT_SGI_PARTITION
select SYS_HAS_EARLY_PRINTK
- select HW_HAS_PCI
+ select HAVE_PCI
select NR_CPUS_DEFAULT_64
select SYS_HAS_CPU_R10000
select SYS_SUPPORTS_64BIT_KERNEL
@@ -733,7 +734,7 @@ config SGI_IP32
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select R5000_CPU_SCACHE
select RM7000_CPU_SCACHE
@@ -843,7 +844,7 @@ config SNI_RM
select GENERIC_ISA_DMA
select HAVE_PCSPKR_PLATFORM
select HW_HAS_EISA
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select I8253
select I8259
@@ -876,7 +877,7 @@ config MIKROTIK_RB532
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_32BIT_KERNEL
@@ -903,7 +904,7 @@ config CAVIUM_OCTEON_SOC
select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_CAVIUM_OCTEON
- select HW_HAS_PCI
+ select HAVE_PCI
select ZONE_DMA32
select HOLES_IN_ZONE
select GPIOLIB
@@ -936,7 +937,7 @@ config NLM_XLR_BOARD
select NLM_COMMON
select SYS_HAS_CPU_XLR
select SYS_SUPPORTS_SMP
- select HW_HAS_PCI
+ select HAVE_PCI
select SWAP_IO_SPACE
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
@@ -962,7 +963,7 @@ config NLM_XLP_BOARD
select NLM_COMMON
select SYS_HAS_CPU_XLP
select SYS_SUPPORTS_SMP
- select HW_HAS_PCI
+ select HAVE_PCI
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select PHYS_ADDR_T_64BIT
@@ -997,7 +998,7 @@ config MIPS_PARAVIRT
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_CPU_MIPS64_R2
select SYS_HAS_CPU_CAVIUM_OCTEON
- select HW_HAS_PCI
+ select HAVE_PCI
select SWAP_IO_SPACE
help
This option supports guest running under ????
@@ -2992,18 +2993,6 @@ menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
config HW_HAS_EISA
bool
-config HW_HAS_PCI
- bool
-
-config PCI
- bool "Support for PCI controller"
- depends on HW_HAS_PCI
- select PCI_DOMAINS
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
- say Y, otherwise N.
config HT_PCI
bool "Support for HT-linked PCI"
@@ -3030,8 +3019,6 @@ config PCI_DRIVERS_LEGACY
def_bool !PCI_DRIVERS_GENERIC
select NO_GENERIC_PCI_IOPORT_MAP
-source "drivers/pci/Kconfig"
-
#
# ISA support is now enabled via select. Too many systems still have the one
# or other ISA chip on the board that users don't know about so don't expect
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 7d73f7f4202b..83b288b95b16 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -14,7 +14,7 @@ choice
config MIPS_MTX1
bool "4G Systems MTX-1 board"
- select HW_HAS_PCI
+ select HAVE_PCI
select ALCHEMY_GPIOINT_AU1000
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_EARLY_PRINTK
@@ -22,7 +22,7 @@ config MIPS_MTX1
config MIPS_DB1XXX
bool "Alchemy DB1XXX / PB1XXX boards"
select GPIOLIB
- select HW_HAS_PCI
+ select HAVE_PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_EARLY_PRINTK
help
@@ -40,7 +40,7 @@ config MIPS_XXS1500
config MIPS_GPR
bool "Trapeze ITS GPR board"
select ALCHEMY_GPIOINT_AU1000
- select HW_HAS_PCI
+ select HAVE_PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/ath25/Kconfig b/arch/mips/ath25/Kconfig
index 2c1dfd06c366..4c1b4579c814 100644
--- a/arch/mips/ath25/Kconfig
+++ b/arch/mips/ath25/Kconfig
@@ -13,6 +13,6 @@ config PCI_AR2315
bool "Atheros AR2315 PCI controller support"
depends on SOC_AR2315
select ARCH_HAS_PHYS_TO_DMA
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI
default y
diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index 9547cf1ea38d..191c3910eac5 100644
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -75,11 +75,11 @@ config ATH79_MACH_UBNT_XM
endmenu
config SOC_AR71XX
- select HW_HAS_PCI
+ select HAVE_PCI
def_bool n
config SOC_AR724X
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI_AR724X if PCI
def_bool n
@@ -90,12 +90,12 @@ config SOC_AR933X
def_bool n
config SOC_AR934X
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI_AR724X if PCI
def_bool n
config SOC_QCA955X
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI_AR724X if PCI
def_bool n
diff --git a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig
index 96ed735a4f4a..837f6e5a2f37 100644
--- a/arch/mips/bcm63xx/Kconfig
+++ b/arch/mips/bcm63xx/Kconfig
@@ -5,17 +5,17 @@ menu "CPU support"
config BCM63XX_CPU_3368
bool "support 3368 CPU"
select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
+ select HAVE_PCI
config BCM63XX_CPU_6328
bool "support 6328 CPU"
select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
+ select HAVE_PCI
config BCM63XX_CPU_6338
bool "support 6338 CPU"
select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
+ select HAVE_PCI
config BCM63XX_CPU_6345
bool "support 6345 CPU"
@@ -24,22 +24,22 @@ config BCM63XX_CPU_6345
config BCM63XX_CPU_6348
bool "support 6348 CPU"
select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
+ select HAVE_PCI
config BCM63XX_CPU_6358
bool "support 6358 CPU"
select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
+ select HAVE_PCI
config BCM63XX_CPU_6362
bool "support 6362 CPU"
select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
+ select HAVE_PCI
config BCM63XX_CPU_6368
bool "support 6368 CPU"
select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
+ select HAVE_PCI
endmenu
source "arch/mips/bcm63xx/boards/Kconfig"
diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig
index 8e3a1fc2bc39..188de95d6dbd 100644
--- a/arch/mips/lantiq/Kconfig
+++ b/arch/mips/lantiq/Kconfig
@@ -19,7 +19,7 @@ config SOC_AMAZON_SE
config SOC_XWAY
bool "XWAY"
select SOC_TYPE_XWAY
- select HW_HAS_PCI
+ select HAVE_PCI
select MFD_SYSCON
select MFD_CORE
diff --git a/arch/mips/loongson64/Kconfig b/arch/mips/loongson64/Kconfig
index c865b4b9b775..edd23dc4589d 100644
--- a/arch/mips/loongson64/Kconfig
+++ b/arch/mips/loongson64/Kconfig
@@ -15,7 +15,7 @@ config LEMOTE_FULOONG2E
select DMA_NONCOHERENT
select BOOT_ELF32
select BOARD_SCACHE
- select HW_HAS_PCI
+ select HAVE_PCI
select I8259
select ISA
select IRQ_MIPS_CPU
@@ -46,7 +46,7 @@ config LEMOTE_MACH2F
select DMA_NONCOHERENT
select GENERIC_ISA_DMA_SUPPORT_BROKEN
select HAVE_CLK
- select HW_HAS_PCI
+ select HAVE_PCI
select I8259
select IRQ_MIPS_CPU
select ISA
@@ -74,7 +74,7 @@ config LOONGSON_MACH3X
select CSRC_R4K
select CEVT_R4K
select CPU_HAS_WB
- select HW_HAS_PCI
+ select HAVE_PCI
select ISA
select HT_PCI
select I8259
diff --git a/arch/mips/pmcs-msp71xx/Kconfig b/arch/mips/pmcs-msp71xx/Kconfig
index d319bc0c3df6..b185b7620c97 100644
--- a/arch/mips/pmcs-msp71xx/Kconfig
+++ b/arch/mips/pmcs-msp71xx/Kconfig
@@ -6,25 +6,25 @@ choice
config PMC_MSP4200_EVAL
bool "PMC-Sierra MSP4200 Eval Board"
select IRQ_MSP_SLP
- select HW_HAS_PCI
+ select HAVE_PCI
select MIPS_L1_CACHE_SHIFT_4
config PMC_MSP4200_GW
bool "PMC-Sierra MSP4200 VoIP Gateway"
select IRQ_MSP_SLP
- select HW_HAS_PCI
+ select HAVE_PCI
config PMC_MSP7120_EVAL
bool "PMC-Sierra MSP7120 Eval Board"
select SYS_SUPPORTS_MULTITHREADING
select IRQ_MSP_CIC
- select HW_HAS_PCI
+ select HAVE_PCI
config PMC_MSP7120_GW
bool "PMC-Sierra MSP7120 Residential Gateway"
select SYS_SUPPORTS_MULTITHREADING
select IRQ_MSP_CIC
- select HW_HAS_PCI
+ select HAVE_PCI
select MSP_HAS_USB
select MSP_ETH
@@ -32,7 +32,7 @@ config PMC_MSP7120_FPGA
bool "PMC-Sierra MSP7120 FPGA"
select SYS_SUPPORTS_MULTITHREADING
select IRQ_MSP_CIC
- select HW_HAS_PCI
+ select HAVE_PCI
endchoice
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 1f9cb0e3c79a..4c8006b4a5f7 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -27,18 +27,18 @@ choice
config SOC_RT288X
bool "RT288x"
select MIPS_L1_CACHE_SHIFT_4
- select HW_HAS_PCI
+ select HAVE_PCI
config SOC_RT305X
bool "RT305x"
config SOC_RT3883
bool "RT3883"
- select HW_HAS_PCI
+ select HAVE_PCI
config SOC_MT7620
bool "MT7620/8"
- select HW_HAS_PCI
+ select HAVE_PCI
config SOC_MT7621
bool "MT7621"
@@ -50,7 +50,7 @@ choice
select MIPS_GIC
select COMMON_CLK
select CLKSRC_MIPS_GIC
- select HW_HAS_PCI
+ select HAVE_PCI
endchoice
choice
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index 7ec278d72096..470d46183677 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -3,7 +3,7 @@ config SIBYTE_SB1250
bool
select CEVT_SB1250
select CSRC_SB1250
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SIBYTE_ENABLE_LDT_IF_PCI
select SIBYTE_HAS_ZBUS_PROFILING
@@ -23,7 +23,7 @@ config SIBYTE_BCM1125
bool
select CEVT_SB1250
select CSRC_SB1250
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SIBYTE_BCM112X
select SIBYTE_HAS_ZBUS_PROFILING
@@ -33,7 +33,7 @@ config SIBYTE_BCM1125H
bool
select CEVT_SB1250
select CSRC_SB1250
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SIBYTE_BCM112X
select SIBYTE_ENABLE_LDT_IF_PCI
@@ -52,7 +52,7 @@ config SIBYTE_BCM1x80
bool
select CEVT_BCM1480
select CSRC_BCM1480
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SIBYTE_HAS_ZBUS_PROFILING
select SIBYTE_SB1xxx_SOC
@@ -62,7 +62,7 @@ config SIBYTE_BCM1x55
bool
select CEVT_BCM1480
select CSRC_BCM1480
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_MIPS_CPU
select SIBYTE_SB1xxx_SOC
select SIBYTE_HAS_ZBUS_PROFILING
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
index d2509c93f0ee..9a22a182b7a4 100644
--- a/arch/mips/txx9/Kconfig
+++ b/arch/mips/txx9/Kconfig
@@ -59,7 +59,7 @@ config SOC_TX3927
bool
select CEVT_TXX9
select HAS_TXX9_SERIAL
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_TXX9
select GPIO_TXX9
@@ -67,7 +67,7 @@ config SOC_TX4927
bool
select CEVT_TXX9
select HAS_TXX9_SERIAL
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_TXX9
select PCI_TX4927
select GPIO_TXX9
@@ -77,7 +77,7 @@ config SOC_TX4938
bool
select CEVT_TXX9
select HAS_TXX9_SERIAL
- select HW_HAS_PCI
+ select HAVE_PCI
select IRQ_TXX9
select PCI_TX4927
select GPIO_TXX9
@@ -87,7 +87,7 @@ config SOC_TX4939
bool
select CEVT_TXX9
select HAS_TXX9_SERIAL
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI_TX4927
select HAS_TXX9_ACLC
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 992c988b83b0..e0b651db371d 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -30,7 +30,7 @@ config TANBAC_TB022X
select CSRC_R4K
select DMA_NONCOHERENT
select IRQ_MIPS_CPU
- select HW_HAS_PCI
+ select HAVE_PCI
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
help
@@ -46,7 +46,7 @@ config VICTOR_MPC30X
select CSRC_R4K
select DMA_NONCOHERENT
select IRQ_MIPS_CPU
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -57,7 +57,7 @@ config ZAO_CAPCELLA
select CSRC_R4K
select DMA_NONCOHERENT
select IRQ_MIPS_CPU
- select HW_HAS_PCI
+ select HAVE_PCI
select PCI_VR41XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -99,6 +99,6 @@ endchoice
config PCI_VR41XX
bool "Add PCI control unit support of NEC VR4100 series"
- depends on MACH_VR41XX && HW_HAS_PCI
+ depends on MACH_VR41XX && HAVE_PCI
default y
select PCI
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 8e6d83f79e72..b2b08ad9f411 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -19,6 +19,7 @@ config PARISC
select NO_BOOTMEM
select BUG
select BUILDTIME_EXTABLE_SORT
+ select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_KERNEL_BZIP2
select HAVE_KERNEL_GZIP
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e8c8970248bc..8f5a49d11385 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -168,6 +168,7 @@ config PPC
select GENERIC_CPU_VULNERABILITIES if PPC_BARRIER_NOSPEC
select GENERIC_IRQ_SHOW
select GENERIC_IRQ_SHOW_LEVEL
+ select GENERIC_PCI_IOMAP if PCI
select GENERIC_SMP_IDLE_THREAD
select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
@@ -190,6 +191,11 @@ config PPC
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER
+ # Platforms that what PCI turned unconditionally just do select PCI
+ # in their config node, otherwise allow the user to enable it.
+ # This means we can enable PCI even on platforms that don't support
+ # it, which is harmless except for wasted memory.
+ select HAVE_PCI
select HAVE_GCC_PLUGINS if GCC_VERSION >= 50200 # plugin support on gcc <= 5.1 is buggy on PPC
select HAVE_GENERIC_GUP
select HAVE_HW_BREAKPOINT if PERF_EVENTS && (PPC_BOOK3S || PPC_8xx)
@@ -945,23 +951,6 @@ config FSL_GTM
config MCA
bool
-# Platforms that what PCI turned unconditionally just do select PCI
-# in their config node. Platforms that want to choose at config
-# time should select PPC_PCI_CHOICE
-config PPC_PCI_CHOICE
- bool
-
-config PCI
- bool "PCI support" if PPC_PCI_CHOICE
- default y if !40x && !CPM2 && !PPC_8xx && !PPC_83xx \
- && !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
- select GENERIC_PCI_IOMAP
- help
- Find out whether your system includes a PCI bus. PCI is the name of
- a bus system, i.e. the way the CPU talks to the other stuff inside
- your box. If you say Y here, the kernel will include drivers and
- infrastructure code to support PCI bus devices.
-
config PCI_DOMAINS
def_bool PCI
@@ -974,8 +963,6 @@ config PCI_8260
select PPC_INDIRECT_PCI
default y
-source "drivers/pci/Kconfig"
-
source "drivers/pcmcia/Kconfig"
config HAS_RAPIDIO
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 70856a213663..9c6c77984ac3 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -272,7 +272,6 @@ config XILINX_VIRTEX440_GENERIC_BOARD
config XILINX_ML510
bool "Xilinx ML510 extra support"
depends on XILINX_VIRTEX440_GENERIC_BOARD
- select PPC_PCI_CHOICE
select XILINX_PCI if PCI
select PPC_INDIRECT_PCI if PCI
select PPC_I8259 if PCI
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index b59eab6cbb1b..3639a2a89eb4 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -5,7 +5,6 @@ config PPC_MPC512x
select COMMON_CLK
select FSL_SOC
select IPIC
- select PPC_PCI_CHOICE
select FSL_PCI if PCI
select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 55a587070342..121235b25305 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -3,7 +3,6 @@ config PPC_MPC52xx
bool "52xx-based boards"
depends on 6xx
select COMMON_CLK
- select PPC_PCI_CHOICE
config PPC_MPC5200_SIMPLE
bool "Generic support for simple MPC5200 based boards"
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 071f53b0c0a0..8f65ec7feb06 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -3,7 +3,6 @@ menuconfig PPC_83xx
bool "83xx-based boards"
depends on 6xx
select PPC_UDBG_16550
- select PPC_PCI_CHOICE
select FSL_PCI if PCI
select FSL_SOC
select IPIC
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 68920d42b4bc..20867a23f3f2 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -5,7 +5,6 @@ menuconfig FSL_SOC_BOOKE
select FSL_SOC
select PPC_UDBG_16550
select MPIC
- select PPC_PCI_CHOICE
select FSL_PCI if PCI
select SERIAL_8250_EXTENDED if SERIAL_8250
select SERIAL_8250_SHARE_IRQ if SERIAL_8250
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index bcd179d3ed92..87220554dd6f 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -70,7 +70,6 @@ endif
config MPC8641
bool
- select PPC_PCI_CHOICE
select FSL_PCI if PCI
select PPC_UDBG_16550
select MPIC
@@ -79,7 +78,6 @@ config MPC8641
config MPC8610
bool
- select PPC_PCI_CHOICE
select FSL_PCI if PCI
select PPC_UDBG_16550
select MPIC
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 14ef17e10ec9..2d28af3681e8 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -285,7 +285,6 @@ config CPM2
bool "Enable support for the CPM2 (Communications Processor Module)"
depends on (FSL_SOC_BOOKE && PPC32) || 8260
select CPM
- select PPC_PCI_CHOICE
select GPIOLIB
help
The CPM2 (Communications Processor Module) is a coprocessor on
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 6c6a7c72cae4..c89500c0747a 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -40,14 +40,12 @@ config 40x
select PPC_DCR_NATIVE
select PPC_UDBG_16550
select 4xx_SOC
- select PPC_PCI_CHOICE
config 44x
bool "AMCC 44x, 46x or 47x"
select PPC_DCR_NATIVE
select PPC_UDBG_16550
select 4xx_SOC
- select PPC_PCI_CHOICE
select PHYS_64BIT
config E200
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 6f7525555b19..a68c14221523 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -6,7 +6,6 @@ config PPC_PS3
select USB_OHCI_LITTLE_ENDIAN
select USB_OHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_MMIO
- select PPC_PCI_CHOICE
help
This option enables support for the Sony PS3 game console
and other platforms using the PS3 hypervisor. Enabling this
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a344980287a5..071952cd4cae 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -39,8 +39,10 @@ config RISCV
select SPARSE_IRQ
select SYSCTL_EXCEPTION_TRACE
select HAVE_ARCH_TRACEHOOK
+ select HAVE_PCI
select MODULES_USE_ELF_RELA if MODULES
select THREAD_INFO_IN_TASK
+ select PCI_MSI if PCI
select RISCV_TIMER
select GENERIC_IRQ_MULTI_HANDLER
select ARCH_HAS_PTE_SPECIAL
@@ -216,28 +218,12 @@ source "kernel/Kconfig.hz"
endmenu
-menu "Bus support"
-
-config PCI
- bool "PCI support"
- select PCI_MSI
- help
- This feature enables support for PCI bus system. If you say Y
- here, the kernel will include drivers and infrastructure code
- to support PCI bus devices.
-
- If you don't know what to do here, say Y.
-
config PCI_DOMAINS
def_bool PCI
config PCI_DOMAINS_GENERIC
def_bool PCI
-source "drivers/pci/Kconfig"
-
-endmenu
-
menu "Power management options"
source kernel/power/Kconfig
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 9a9c7a6fe925..1f56c96bb1c9 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -160,15 +160,21 @@ config S390
select HAVE_MOD_ARCH_SPECIFIC
select HAVE_NOP_MCOUNT
select HAVE_OPROFILE
+ select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RSEQ
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_VIRT_CPU_ACCOUNTING
+ select IOMMU_HELPER if PCI
+ select IOMMU_SUPPORT if PCI
select MODULES_USE_ELF_RELA
+ select NEED_DMA_MAP_STATE if PCI
+ select NEED_SG_DMA_LENGTH if PCI
select NO_BOOTMEM
select OLD_SIGACTION
select OLD_SIGSUSPEND3
+ select PCI_MSI if PCI
select SPARSE_IRQ
select SYSCTL_EXCEPTION_TRACE
select THREAD_INFO_IN_TASK
@@ -698,17 +704,6 @@ config QDIO
If unsure, say Y.
-menuconfig PCI
- bool "PCI support"
- select PCI_MSI
- select IOMMU_HELPER
- select IOMMU_SUPPORT
- select NEED_DMA_MAP_STATE
- select NEED_SG_DMA_LENGTH
-
- help
- Enable PCI support.
-
if PCI
config PCI_NR_FUNCTIONS
@@ -719,13 +714,11 @@ config PCI_NR_FUNCTIONS
This allows you to specify the maximum number of PCI functions which
this kernel will support.
-source "drivers/pci/Kconfig"
-
-endif # PCI
-
config PCI_DOMAINS
def_bool PCI
+endif # PCI
+
config HAS_IOMEM
def_bool PCI
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 1fb7b6d72baf..2ff6855811a5 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -41,13 +41,16 @@ config SUPERH
select GENERIC_IDLE_POLL_SETUP
select GENERIC_CLOCKEVENTS
select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
+ select GENERIC_PCI_IOMAP if PCI
select GENERIC_SCHED_CLOCK
select GENERIC_STRNCPY_FROM_USER
select GENERIC_STRNLEN_USER
select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
select MODULES_USE_ELF_RELA
+ select NO_GENERIC_PCI_IOPORT_MAP if PCI
select OLD_SIGSUSPEND
select OLD_SIGACTION
+ select PCI_DOMAINS if PCI
select HAVE_ARCH_AUDITSYSCALL
select HAVE_FUTEX_CMPXCHG if FUTEX
select HAVE_NMI
@@ -131,9 +134,6 @@ config SYS_SUPPORTS_SMP
config SYS_SUPPORTS_NUMA
bool
-config SYS_SUPPORTS_PCI
- bool
-
config STACKTRACE_SUPPORT
def_bool y
@@ -858,22 +858,9 @@ config MAPLE
Dreamcast with a serial line terminal or a remote network
connection.
-config PCI
- bool "PCI support"
- depends on SYS_SUPPORTS_PCI
- select PCI_DOMAINS
- select GENERIC_PCI_IOMAP
- select NO_GENERIC_PCI_IOPORT_MAP
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. If you have PCI, say Y, otherwise N.
-
config PCI_DOMAINS
bool
-source "drivers/pci/Kconfig"
-
source "drivers/pcmcia/Kconfig"
endmenu
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 6394b4f0a69b..b9a37057b77a 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -101,7 +101,7 @@ config SH_7751_SOLUTION_ENGINE
config SH_7780_SOLUTION_ENGINE
bool "SolutionEngine7780"
select SOLUTION_ENGINE
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
depends on CPU_SUBTYPE_SH7780
help
Select 7780 SolutionEngine if configuring for a Renesas SH7780
@@ -129,7 +129,7 @@ config SH_HP6XX
config SH_DREAMCAST
bool "Dreamcast"
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
depends on CPU_SUBTYPE_SH7091
help
Select Dreamcast if configuring for a SEGA Dreamcast.
@@ -139,7 +139,7 @@ config SH_SH03
bool "Interface CTP/PCI-SH03"
depends on CPU_SUBTYPE_SH7751
select CPU_HAS_IPR_IRQ
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
help
CTP/PCI-SH03 is a CPU module computer that is produced
by Interface Corporation.
@@ -149,7 +149,7 @@ config SH_SECUREEDGE5410
bool "SecureEdge5410"
depends on CPU_SUBTYPE_SH7751R
select CPU_HAS_IPR_IRQ
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
help
Select SecureEdge5410 if configuring for a SnapGear SH board.
This includes both the OEM SecureEdge products as well as the
@@ -158,7 +158,7 @@ config SH_SECUREEDGE5410
config SH_RTS7751R2D
bool "RTS7751R2D"
depends on CPU_SUBTYPE_SH7751R
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
select IO_TRAPPED if MMU
help
Select RTS7751R2D if configuring for a Renesas Technology
@@ -176,7 +176,7 @@ config SH_RSK
config SH_SDK7780
bool "SDK7780R3"
depends on CPU_SUBTYPE_SH7780
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
help
Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
evaluation board.
@@ -184,7 +184,7 @@ config SH_SDK7780
config SH_SDK7786
bool "SDK7786"
depends on CPU_SUBTYPE_SH7786
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
select NO_IOPORT_MAP if !PCI
select HAVE_SRAM_POOL
select REGULATOR_FIXED_VOLTAGE if REGULATOR
@@ -195,7 +195,7 @@ config SH_SDK7786
config SH_HIGHLANDER
bool "Highlander"
depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
select IO_TRAPPED if MMU
config SH_SH7757LCR
@@ -207,7 +207,7 @@ config SH_SH7757LCR
config SH_SH7785LCR
bool "SH7785LCR"
depends on CPU_SUBTYPE_SH7785
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
config SH_SH7785LCR_29BIT_PHYSMAPS
bool "SH7785LCR 29bit physmaps"
@@ -229,7 +229,7 @@ config SH_URQUELL
bool "Urquell"
depends on CPU_SUBTYPE_SH7786
select GPIOLIB
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
select NO_IOPORT_MAP if !PCI
config SH_MIGOR
@@ -302,7 +302,7 @@ config SH_SH4202_MICRODEV
config SH_LANDISK
bool "LANDISK"
depends on CPU_SUBTYPE_SH7751R
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
help
I-O DATA DEVICE, INC. "LANDISK Series" support.
@@ -310,7 +310,7 @@ config SH_TITAN
bool "TITAN"
depends on CPU_SUBTYPE_SH7751R
select CPU_HAS_IPR_IRQ
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
help
Select Titan if you are configuring for a Nimble Microsystems
NetEngine NP51R.
@@ -325,7 +325,7 @@ config SH_SHMIN
config SH_LBOX_RE2
bool "L-BOX RE2"
depends on CPU_SUBTYPE_SH7751R
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
help
Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
@@ -346,7 +346,7 @@ config SH_MAGIC_PANEL_R2
config SH_CAYMAN
bool "Hitachi Cayman"
depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
select ARCH_MIGHT_HAVE_PC_SERIO
config SH_POLARIS
@@ -380,7 +380,7 @@ config SH_APSH4A3A
config SH_APSH4AD0A
bool "AP-SH4AD-0A"
select SH_ALPHA_BOARD
- select SYS_SUPPORTS_PCI
+ select HAVE_PCI
select REGULATOR_FIXED_VOLTAGE if REGULATOR
depends on CPU_SUBTYPE_SH7786
help
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index e6f2a38d2e61..fc311b8dc46b 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -21,6 +21,7 @@ config SPARC
select HAVE_ARCH_KGDB if !SMP || SPARC64
select HAVE_ARCH_TRACEHOOK
select HAVE_EXIT_THREAD
+ select HAVE_PCI
select SYSCTL_EXCEPTION_TRACE
select RTC_CLASS
select RTC_DRV_M48T59
@@ -474,18 +475,6 @@ config SUN_LDOMS
Say Y here is you want to support virtual devices via
Logical Domains.
-config PCI
- bool "Support for PCI and PS/2 keyboard/mouse"
- help
- Find out whether your system includes a PCI bus. PCI is the name of
- a bus system, i.e. the way the CPU talks to the other stuff inside
- your box. If you say Y here, the kernel will include drivers and
- infrastructure code to support PCI bus devices.
-
- CONFIG_PCI is needed for all JavaStation's (including MrCoffee),
- CP-1200, JavaEngine-1, Corona, Red October, and Serengeti SGSC.
- All of these platforms are extremely obscure, so say N if unsure.
-
config PCI_DOMAINS
def_bool PCI if SPARC64
@@ -520,8 +509,6 @@ config SPARC_GRPCI2
help
Say Y here to include the GRPCI2 Host Bridge Driver.
-source "drivers/pci/Kconfig"
-
source "drivers/pcmcia/Kconfig"
config SUN_OPENPROMFS
diff --git a/arch/um/Kconfig b/arch/um/Kconfig
index 6b9938919f0b..de982541a059 100644
--- a/arch/um/Kconfig
+++ b/arch/um/Kconfig
@@ -31,9 +31,6 @@ config ISA
config SBUS
bool
-config PCI
- bool
-
config PCMCIA
bool
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index 60eae744d8fd..601dcad2560e 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -11,6 +11,7 @@ config UNICORE32
select GENERIC_ATOMIC64
select HAVE_KERNEL_LZO
select HAVE_KERNEL_LZMA
+ select HAVE_PCI
select VIRT_TO_BUS
select ARCH_HAVE_CUSTOM_GPIO_H
select GENERIC_FIND_FIRST_BIT
@@ -119,16 +120,6 @@ endmenu
menu "Bus support"
-config PCI
- bool "PCI Support"
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
- VESA. If you have PCI, say Y, otherwise N.
-
-source "drivers/pci/Kconfig"
-
source "drivers/pcmcia/Kconfig"
endmenu
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1a0be022f91d..5816e20a3ff9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -178,6 +178,7 @@ config X86
select HAVE_PERF_EVENTS
select HAVE_PERF_EVENTS_NMI
select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
+ select HAVE_PCI
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
select HAVE_RCU_TABLE_FREE if PARAVIRT
@@ -2567,15 +2568,6 @@ endmenu
menu "Bus options (PCI etc.)"
-config PCI
- bool "PCI support"
- default y
- ---help---
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
- VESA. If you have PCI, say Y, otherwise N.
-
choice
prompt "PCI access mode"
depends on X86_32 && PCI
@@ -2658,8 +2650,6 @@ config PCI_CNB20LE_QUIRK
You should say N unless you know you need this.
-source "drivers/pci/Kconfig"
-
config ISA_BUS
bool "ISA bus support on modern systems" if EXPERT
help
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 0eb9f92f3717..f08a74eeb1fe 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -69,6 +69,7 @@ CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_X86_ACPI_CPUFREQ=y
+CONFIG_PCI=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_MSI=y
CONFIG_PCCARD=y
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index e32fc1f274d8..d053ae4a8098 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -67,6 +67,7 @@ CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_X86_ACPI_CPUFREQ=y
+CONFIG_PCI=y
CONFIG_PCI_MMCONFIG=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCCARD=y
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index b9ad83a0ee5d..f057c16a48a5 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -30,6 +30,7 @@ config XTENSA
select HAVE_IRQ_TIME_ACCOUNTING
select HAVE_MEMBLOCK
select HAVE_OPROFILE
+ select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_STACKPROTECTOR
select IRQ_DOMAIN
@@ -384,21 +385,6 @@ config XTENSA_CALIBRATE_CCOUNT
config SERIAL_CONSOLE
def_bool n
-menu "Bus options"
-
-config PCI
- bool "PCI support"
- default y
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
- VESA. If you have PCI, say Y, otherwise N.
-
-source "drivers/pci/Kconfig"
-
-endmenu
-
menu "Platform options"
choice
diff --git a/arch/xtensa/configs/common_defconfig b/arch/xtensa/configs/common_defconfig
index 4bcc76b02109..fa9389869154 100644
--- a/arch/xtensa/configs/common_defconfig
+++ b/arch/xtensa/configs/common_defconfig
@@ -1,3 +1,4 @@
+CONFIG_PCI=y
CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_LOG_BUF_SHIFT=14
diff --git a/arch/xtensa/configs/iss_defconfig b/arch/xtensa/configs/iss_defconfig
index 4bb5b76d9524..818849bb7736 100644
--- a/arch/xtensa/configs/iss_defconfig
+++ b/arch/xtensa/configs/iss_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERT=y
CONFIG_SYSCTL_SYSCALL=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
-# CONFIG_PCI is not set
+CONFIG_PCI=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,38400 eth0=tuntap,,tap0 ip=192.168.168.5:192.168.168.1 root=nfs nfsroot=192.168.168.1:/opt/montavista/pro/devkit/xtensa/linux_be/target memmap=128M@0"
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
diff --git a/drivers/Kconfig b/drivers/Kconfig
index ab4d43923c4d..059573823387 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -1,7 +1,11 @@
# SPDX-License-Identifier: GPL-2.0
menu "Device Drivers"
+# Keep I/O buses first
+
source "drivers/amba/Kconfig"
+source "drivers/pci/Kconfig"
+
source "drivers/base/Kconfig"
diff --git a/drivers/parisc/Kconfig b/drivers/parisc/Kconfig
index 5a48b5606110..5bbfea1a019c 100644
--- a/drivers/parisc/Kconfig
+++ b/drivers/parisc/Kconfig
@@ -63,17 +63,6 @@ config ISA
If you want to plug an ISA card into your EISA bus, say Y here.
Most people should say N.
-config PCI
- bool "PCI support"
- help
- All recent HP machines have PCI slots, and you should say Y here
- if you have a recent machine. If you are convinced you do not have
- PCI slots in your machine (eg a 712), then you may say "N" here.
- Beware that some GSC cards have a Dino onboard and PCI inside them,
- so it may be safest to say "Y" anyway.
-
-source "drivers/pci/Kconfig"
-
config GSC_DINO
bool "GSCtoPCI/Dino PCI support"
depends on PCI && GSC
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 56ff8f6d31fc..6ec796c5931f 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -3,6 +3,18 @@
# PCI configuration
#
+config HAVE_PCI
+ bool
+
+menuconfig PCI
+ bool "PCI support"
+ depends on HAVE_PCI
+
+ help
+ This option enables support for the PCI local bus, including
+ support for PCI-X and the fundations for PCI Express support.
+ Say 'Y' here unless you know what you are doing.
+
source "drivers/pci/pcie/Kconfig"
config PCI_MSI
--
2.19.1
^ permalink raw reply related
* [PATCH 5/8] pcmcia: allow PCMCIA support independent of the architecture
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
There is nothing architecture specific in the PCMCIA core, so allow
building it everywhere. The actual host controllers will depend on ISA,
PCI or a specific SOC.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/alpha/Kconfig | 2 --
arch/arm/Kconfig | 2 --
arch/ia64/Kconfig | 2 --
arch/m68k/Kconfig.bus | 2 --
arch/mips/Kconfig | 2 --
arch/powerpc/Kconfig | 2 --
arch/sh/Kconfig | 2 --
arch/sparc/Kconfig | 2 --
arch/unicore32/Kconfig | 6 ------
arch/x86/Kconfig | 2 --
arch/xtensa/Kconfig | 2 --
drivers/Kconfig | 1 +
drivers/parisc/Kconfig | 2 --
drivers/pcmcia/Kconfig | 1 +
14 files changed, 2 insertions(+), 28 deletions(-)
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index bb89924c0361..96f02268ea16 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -675,8 +675,6 @@ config HZ
source "drivers/eisa/Kconfig"
-source "drivers/pcmcia/Kconfig"
-
config SRM_ENV
tristate "SRM environment through procfs"
depends on PROC_FS
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 516105df6c71..60e37b9a715d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1256,8 +1256,6 @@ config PCI_HOST_ITE8152
default y
select DMABOUNCE
-source "drivers/pcmcia/Kconfig"
-
endmenu
menu "Kernel Features"
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 89da763d7c17..704ff5922ce0 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -553,8 +553,6 @@ config PCI_DOMAINS
config PCI_SYSCALL
def_bool PCI
-source "drivers/pcmcia/Kconfig"
-
endmenu
endif
diff --git a/arch/m68k/Kconfig.bus b/arch/m68k/Kconfig.bus
index 8cb0604b195b..9d0a3a23d50e 100644
--- a/arch/m68k/Kconfig.bus
+++ b/arch/m68k/Kconfig.bus
@@ -68,6 +68,4 @@ if !MMU
config ISA_DMA_API
def_bool !M5272
-source "drivers/pcmcia/Kconfig"
-
endif
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 09b93d5a55cb..18eeb66c6d99 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -3090,8 +3090,6 @@ config ZONE_DMA
config ZONE_DMA32
bool
-source "drivers/pcmcia/Kconfig"
-
config HAS_RAPIDIO
bool
default n
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8f5a49d11385..6430aafe712f 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -963,8 +963,6 @@ config PCI_8260
select PPC_INDIRECT_PCI
default y
-source "drivers/pcmcia/Kconfig"
-
config HAS_RAPIDIO
bool
default n
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2ff6855811a5..ce9487139155 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -861,8 +861,6 @@ config MAPLE
config PCI_DOMAINS
bool
-source "drivers/pcmcia/Kconfig"
-
endmenu
menu "Power management options (EXPERIMENTAL)"
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index fc311b8dc46b..0198f96528fc 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -509,8 +509,6 @@ config SPARC_GRPCI2
help
Say Y here to include the GRPCI2 Host Bridge Driver.
-source "drivers/pcmcia/Kconfig"
-
config SUN_OPENPROMFS
tristate "Openprom tree appears in /proc/openprom"
help
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index 601dcad2560e..d7750e7c7ccb 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -118,12 +118,6 @@ config UNICORE_FPU_F64
endmenu
-menu "Bus support"
-
-source "drivers/pcmcia/Kconfig"
-
-endmenu
-
menu "Kernel Features"
source "kernel/Kconfig.hz"
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5816e20a3ff9..fda01408b596 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2810,8 +2810,6 @@ config AMD_NB
def_bool y
depends on CPU_SUP_AMD && PCI
-source "drivers/pcmcia/Kconfig"
-
config RAPIDIO
tristate "RapidIO support"
depends on PCI
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index f057c16a48a5..c18ceaab7860 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -517,8 +517,6 @@ config FORCE_MAX_ZONEORDER
This config option is actually maximum order plus one. For example,
a value of 11 means that the largest free memory block is 2^10 pages.
-source "drivers/pcmcia/Kconfig"
-
config PLATFORM_WANT_DEFAULT_MEM
def_bool n
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 059573823387..58ee88c36cf5 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -5,6 +5,7 @@ menu "Device Drivers"
source "drivers/amba/Kconfig"
source "drivers/pci/Kconfig"
+source "drivers/pcmcia/Kconfig"
source "drivers/base/Kconfig"
diff --git a/drivers/parisc/Kconfig b/drivers/parisc/Kconfig
index 5bbfea1a019c..1a55763d1245 100644
--- a/drivers/parisc/Kconfig
+++ b/drivers/parisc/Kconfig
@@ -92,8 +92,6 @@ config IOMMU_SBA
depends on PCI_LBA
default PCI_LBA
-source "drivers/pcmcia/Kconfig"
-
endmenu
menu "PA-RISC specific drivers"
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index cbbe4a285b48..c9bdbb463a7e 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -4,6 +4,7 @@
menuconfig PCCARD
tristate "PCCard (PCMCIA/CardBus) support"
+ depends on !UML
---help---
Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
computer. These are credit-card size devices such as network cards,
--
2.19.1
^ permalink raw reply related
* [PATCH 6/8] rapidio: consolidate RAPIDIO config entry in drivers/rapidio
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
There is no good reason to duplicate the RAPIDIO menu in various
architectures. Instead provide a selectable HAS_RAPIDIO symbol
that indicates native availability of RAPIDIO support and the handle
the rest in drivers/pci. This also means we now provide support
for PCI(e) to Rapidio bridges for every architecture instead of a
limited subset.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/mips/Kconfig | 15 +--------------
arch/powerpc/Kconfig | 15 +--------------
arch/powerpc/platforms/85xx/Kconfig | 8 ++++----
arch/powerpc/platforms/86xx/Kconfig | 4 ++--
arch/x86/Kconfig | 10 ----------
drivers/Kconfig | 1 +
drivers/rapidio/Kconfig | 11 +++++++++++
7 files changed, 20 insertions(+), 44 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 18eeb66c6d99..96198f8375e1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -894,7 +894,7 @@ config CAVIUM_OCTEON_SOC
bool "Cavium Networks Octeon SoC based boards"
select CEVT_R4K
select ARCH_HAS_PHYS_TO_DMA
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
select PHYS_ADDR_T_64BIT
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
@@ -3090,19 +3090,6 @@ config ZONE_DMA
config ZONE_DMA32
bool
-config HAS_RAPIDIO
- bool
- default n
-
-config RAPIDIO
- tristate "RapidIO support"
- depends on HAS_RAPIDIO || PCI
- help
- If you say Y here, the kernel will include drivers and
- infrastructure code to support RapidIO interconnect devices.
-
-source "drivers/rapidio/Kconfig"
-
endmenu
config TRAD_SIGNALS
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 6430aafe712f..ee28bb22732b 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -963,27 +963,14 @@ config PCI_8260
select PPC_INDIRECT_PCI
default y
-config HAS_RAPIDIO
- bool
- default n
-
-config RAPIDIO
- tristate "RapidIO support"
- depends on HAS_RAPIDIO || PCI
- help
- If you say Y here, the kernel will include drivers and
- infrastructure code to support RapidIO interconnect devices.
-
config FSL_RIO
bool "Freescale Embedded SRIO Controller support"
- depends on RAPIDIO = y && HAS_RAPIDIO
+ depends on RAPIDIO = y && HAVE_RAPIDIO
default "n"
---help---
Include support for RapidIO controller on Freescale embedded
processors (MPC8548, MPC8641, etc).
-source "drivers/rapidio/Kconfig"
-
endmenu
config NONSTATIC_KERNEL
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 20867a23f3f2..1c6bb9180d70 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -65,7 +65,7 @@ config MPC85xx_CDS
bool "Freescale MPC85xx CDS"
select DEFAULT_UIMAGE
select PPC_I8259
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
help
This option enables support for the MPC85xx CDS board
@@ -73,7 +73,7 @@ config MPC85xx_MDS
bool "Freescale MPC85xx MDS"
select DEFAULT_UIMAGE
select PHYLIB if NETDEVICES
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
select SWIOTLB
help
This option enables support for the MPC85xx MDS board
@@ -218,7 +218,7 @@ config PPA8548
help
This option enables support for the Prodrive PPA8548 board.
select DEFAULT_UIMAGE
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
config GE_IMP3A
bool "GE Intelligent Platforms IMP3A"
@@ -276,7 +276,7 @@ config CORENET_GENERIC
select SWIOTLB
select GPIOLIB
select GPIO_MPC8XXX
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
select PPC_EPAPR_HV_PIC
help
This option enables support for the FSL CoreNet based boards.
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 87220554dd6f..badd9d6ba1ef 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -15,7 +15,7 @@ config MPC8641_HPCN
select PPC_I8259
select DEFAULT_UIMAGE
select FSL_ULI1575 if PCI
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
select SWIOTLB
help
This option enables support for the MPC8641 HPCN board.
@@ -57,7 +57,7 @@ config GEF_SBC610
select MMIO_NVRAM
select GPIOLIB
select GE_FPGA
- select HAS_RAPIDIO
+ select HAVE_RAPIDIO
help
This option enables support for the GE SBC610.
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fda01408b596..6fe3740018f6 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2810,16 +2810,6 @@ config AMD_NB
def_bool y
depends on CPU_SUP_AMD && PCI
-config RAPIDIO
- tristate "RapidIO support"
- depends on PCI
- default n
- help
- If enabled this option will include drivers and the core
- infrastructure code to support RapidIO interconnect devices.
-
-source "drivers/rapidio/Kconfig"
-
config X86_SYSFB
bool "Mark VGA/VBE/EFI FB as generic system framebuffer"
help
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 58ee88c36cf5..065d308fcb00 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -6,6 +6,7 @@ menu "Device Drivers"
source "drivers/amba/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
+source "drivers/rapidio/Kconfig"
source "drivers/base/Kconfig"
diff --git a/drivers/rapidio/Kconfig b/drivers/rapidio/Kconfig
index d6d2f20c4597..e3d8fe41b50c 100644
--- a/drivers/rapidio/Kconfig
+++ b/drivers/rapidio/Kconfig
@@ -1,6 +1,17 @@
#
# RapidIO configuration
#
+
+config HAVE_RAPIDIO
+ bool
+
+menuconfig RAPIDIO
+ tristate "RapidIO support"
+ depends on HAVE_RAPIDIO || PCI
+ help
+ If you say Y here, the kernel will include drivers and
+ infrastructure code to support RapidIO interconnect devices.
+
source "drivers/rapidio/devices/Kconfig"
config RAPIDIO_DISC_TIMEOUT
--
2.19.1
^ permalink raw reply related
* [PATCH 2/8] powerpc: remove CONFIG_PCI_QSPAN
From: Christoph Hellwig @ 2018-10-17 8:01 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
This option isn't actually used anywhere.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/powerpc/Kconfig | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a80669209155..e8c8970248bc 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -955,7 +955,6 @@ config PCI
bool "PCI support" if PPC_PCI_CHOICE
default y if !40x && !CPM2 && !PPC_8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
- default PCI_QSPAN if PPC_8xx
select GENERIC_PCI_IOMAP
help
Find out whether your system includes a PCI bus. PCI is the name of
@@ -969,14 +968,6 @@ config PCI_DOMAINS
config PCI_SYSCALL
def_bool PCI
-config PCI_QSPAN
- bool "QSpan PCI"
- depends on PPC_8xx
- select PPC_I8259
- help
- Say Y here if you have a system based on a Motorola 8xx-series
- embedded processor with a QSPAN PCI interface, otherwise say N.
-
config PCI_8260
bool
depends on PCI && 8260
--
2.19.1
^ permalink raw reply related
* [PATCH 7/8] eisa: consolidate EISA Kconfig entry in drivers/eisa
From: Christoph Hellwig @ 2018-10-17 8:02 UTC (permalink / raw)
To: Masahiro Yamada
Cc: linux-arch, linux-scsi, linux-kbuild, linux-pci, linux-kernel,
Dominik Brodowski, Alexandre Bounine, linuxppc-dev
In-Reply-To: <20181017080201.10866-1-hch@lst.de>
Let architectures opt into EISA support by selecting HAS_EISA and
handle everything else in drivers/eisa.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/alpha/Kconfig | 10 +++-------
arch/arm/Kconfig | 16 +---------------
arch/mips/Kconfig | 31 +++++--------------------------
arch/powerpc/Kconfig | 3 ---
arch/x86/Kconfig | 19 +------------------
drivers/Kconfig | 1 +
drivers/eisa/Kconfig | 21 ++++++++++++++++++++-
drivers/parisc/Kconfig | 11 +----------
8 files changed, 32 insertions(+), 80 deletions(-)
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 96f02268ea16..779e25255d78 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -6,6 +6,9 @@ config ALPHA
select ARCH_MIGHT_HAVE_PC_SERIO
select ARCH_NO_PREEMPT
select ARCH_USE_CMPXCHG_LOCKREF
+ select HAVE_EISA if ALPHA_GENERIC || ALPHA_JENSEN || ALPHA_ALCOR || \
+ ALPHA_MIKASA || ALPHA_SABLE || ALPHA_LYNX || \
+ ALPHA_NORITAKE || ALPHA_RAWHIDE
select HAVE_PCI if !ALPHA_JENSEN
select PCI if !ALPHA_JENSEN
select HAVE_AOUT
@@ -518,11 +521,6 @@ config ALPHA_SRM
If unsure, say N.
-config EISA
- bool
- depends on ALPHA_GENERIC || ALPHA_JENSEN || ALPHA_ALCOR || ALPHA_MIKASA || ALPHA_SABLE || ALPHA_LYNX || ALPHA_NORITAKE || ALPHA_RAWHIDE
- default y
-
config ARCH_MAY_HAVE_PC_FDC
def_bool y
@@ -673,8 +671,6 @@ config HZ
default 1200 if HZ_1200
default 1024
-source "drivers/eisa/Kconfig"
-
config SRM_ENV
tristate "SRM environment through procfs"
depends on PROC_FS
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 60e37b9a715d..c90a1a4d6079 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -59,6 +59,7 @@ config ARM
select HAVE_ARCH_TRACEHOOK
select HAVE_ARM_SMCCC if CPU_V7
select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32
+ select HAVE_EISA
select HAVE_CONTEXT_TRACKING
select HAVE_C_RECORDMCOUNT
select HAVE_DEBUG_KMEMLEAK
@@ -162,21 +163,6 @@ config HAVE_PROC_CPU
config NO_IOPORT_MAP
bool
-config EISA
- bool
- ---help---
- The Extended Industry Standard Architecture (EISA) bus was
- developed as an open alternative to the IBM MicroChannel bus.
-
- The EISA bus provided some of the features of the IBM MicroChannel
- bus while maintaining backward compatibility with cards made for
- the older ISA bus. The EISA bus saw limited use between 1988 and
- 1995 when it was made obsolete by the PCI bus.
-
- Say Y here if you are building a kernel for an EISA-based machine.
-
- Otherwise, say N.
-
config SBUS
bool
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 96198f8375e1..7cf58031a43e 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -23,6 +23,7 @@ config MIPS
select GENERIC_CPU_AUTOPROBE
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
+ select GENERIC_ISA_DMA if EISA
select GENERIC_LIB_ASHLDI3
select GENERIC_LIB_ASHRDI3
select GENERIC_LIB_CMPDI2
@@ -72,6 +73,7 @@ config MIPS
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
select IRQ_FORCED_THREADING
+ select ISA if EISA
select MODULES_USE_ELF_RELA if MODULES && 64BIT
select MODULES_USE_ELF_REL if MODULES
select PCI_DOMAINS if PCI
@@ -634,7 +636,7 @@ config SGI_IP22
select CSRC_R4K
select DEFAULT_SGI_PARTITION
select DMA_NONCOHERENT
- select HW_HAS_EISA
+ select HAVE_EISA
select I8253
select I8259
select IP22_CPU_SCACHE
@@ -699,7 +701,7 @@ config SGI_IP28
select DMA_NONCOHERENT
select GENERIC_ISA_DMA_SUPPORT_BROKEN
select IRQ_MIPS_CPU
- select HW_HAS_EISA
+ select HAVE_EISA
select I8253
select I8259
select SGI_HAS_I8042
@@ -842,8 +844,8 @@ config SNI_RM
select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
+ select HAVE_EISA
select HAVE_PCSPKR_PLATFORM
- select HW_HAS_EISA
select HAVE_PCI
select IRQ_MIPS_CPU
select I8253
@@ -2991,9 +2993,6 @@ config MIPS_AUTO_PFN_OFFSET
menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
-config HW_HAS_EISA
- bool
-
config HT_PCI
bool "Support for HT-linked PCI"
default y
@@ -3027,26 +3026,6 @@ config PCI_DRIVERS_LEGACY
config ISA
bool
-config EISA
- bool "EISA support"
- depends on HW_HAS_EISA
- select ISA
- select GENERIC_ISA_DMA
- ---help---
- The Extended Industry Standard Architecture (EISA) bus was
- developed as an open alternative to the IBM MicroChannel bus.
-
- The EISA bus provided some of the features of the IBM MicroChannel
- bus while maintaining backward compatibility with cards made for
- the older ISA bus. The EISA bus saw limited use between 1988 and
- 1995 when it was made obsolete by the PCI bus.
-
- Say Y here if you are building a kernel for an EISA-based machine.
-
- Otherwise, say N.
-
-source "drivers/eisa/Kconfig"
-
config TC
bool "TURBOchannel support"
depends on MACH_DECSTATION
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index ee28bb22732b..f2001fff14d1 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -900,9 +900,6 @@ config PPC_INDIRECT_PCI
default y if 40x || 44x
default n
-config EISA
- bool
-
config SBUS
bool
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 6fe3740018f6..c9f9f62700d8 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -144,6 +144,7 @@ config X86
select HAVE_DYNAMIC_FTRACE_WITH_REGS
select HAVE_EBPF_JIT
select HAVE_EFFICIENT_UNALIGNED_ACCESS
+ select HAVE_EISA
select HAVE_EXIT_THREAD
select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE
select HAVE_FTRACE_MCOUNT_RECORD
@@ -2680,24 +2681,6 @@ config ISA
(MCA) or VESA. ISA is an older system, now being displaced by PCI;
newer boards don't support it. If you have ISA, say Y, otherwise N.
-config EISA
- bool "EISA support"
- depends on ISA
- ---help---
- The Extended Industry Standard Architecture (EISA) bus was
- developed as an open alternative to the IBM MicroChannel bus.
-
- The EISA bus provided some of the features of the IBM MicroChannel
- bus while maintaining backward compatibility with cards made for
- the older ISA bus. The EISA bus saw limited use between 1988 and
- 1995 when it was made obsolete by the PCI bus.
-
- Say Y here if you are building a kernel for an EISA-based machine.
-
- Otherwise, say N.
-
-source "drivers/eisa/Kconfig"
-
config SCx200
tristate "NatSemi SCx200 support"
---help---
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 065d308fcb00..ea58a6b99288 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -4,6 +4,7 @@ menu "Device Drivers"
# Keep I/O buses first
source "drivers/amba/Kconfig"
+source "drivers/eisa/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/rapidio/Kconfig"
diff --git a/drivers/eisa/Kconfig b/drivers/eisa/Kconfig
index 2705284f6223..4570e3bca42c 100644
--- a/drivers/eisa/Kconfig
+++ b/drivers/eisa/Kconfig
@@ -1,6 +1,26 @@
#
# EISA configuration
#
+
+config HAVE_EISA
+ bool
+
+menuconfig EISA
+ bool "EISA support"
+ depends on HAVE_EISA
+ ---help---
+ The Extended Industry Standard Architecture (EISA) bus was
+ developed as an open alternative to the IBM MicroChannel bus.
+
+ The EISA bus provided some of the features of the IBM MicroChannel
+ bus while maintaining backward compatibility with cards made for
+ the older ISA bus. The EISA bus saw limited use between 1988 and
+ 1995 when it was made obsolete by the PCI bus.
+
+ Say Y here if you are building a kernel for an EISA-based machine.
+
+ Otherwise, say N.
+
config EISA_VLB_PRIMING
bool "Vesa Local Bus priming"
depends on X86 && EISA
@@ -53,4 +73,3 @@ config EISA_NAMES
names.
When in doubt, say Y.
-
diff --git a/drivers/parisc/Kconfig b/drivers/parisc/Kconfig
index 1a55763d1245..74e119adca01 100644
--- a/drivers/parisc/Kconfig
+++ b/drivers/parisc/Kconfig
@@ -2,6 +2,7 @@ menu "Bus options (PCI, PCMCIA, EISA, GSC, ISA)"
config GSC
bool "VSC/GSC/HSC bus support"
+ select HAVE_EISA
default y
help
The VSC, GSC and HSC busses were used from the earliest 700-series
@@ -46,16 +47,6 @@ config GSC_WAX
used), a HIL interface chip and is also known to be used as the
GSC bridge for an X.25 GSC card.
-config EISA
- bool "EISA support"
- depends on GSC
- help
- Say Y here if you have an EISA bus in your machine. This code
- supports both the Mongoose & Wax EISA adapters. It is sadly
- incomplete and lacks support for card-to-host DMA.
-
-source "drivers/eisa/Kconfig"
-
config ISA
bool "ISA support"
depends on EISA
--
2.19.1
^ permalink raw reply related
* Re: [PATCH 4.18 086/135] KVM: PPC: Book3S HV: Dont use compound_order to determine host mapping size
From: Greg Kroah-Hartman @ 2018-10-17 7:48 UTC (permalink / raw)
To: Paul Mackerras
Cc: Aneesh Kumar K.V, Nicholas Piggin, linux-kernel, kvm-ppc,
Sasha Levin, stable, linuxppc-dev, David Gibson
In-Reply-To: <20181016223224.GA27627@blackberry>
On Wed, Oct 17, 2018 at 09:32:25AM +1100, Paul Mackerras wrote:
> On Tue, Oct 16, 2018 at 07:05:16PM +0200, Greg Kroah-Hartman wrote:
> > 4.18-stable review patch. If anyone has any objections, please let me know.
> >
> > ------------------
> >
> > From: Nicholas Piggin <npiggin@gmail.com>
> >
> > [ Upstream commit 71d29f43b6332badc5598c656616a62575e83342 ]
>
> If you take 71d29f43b633 then you also need 6579804c4317 ("KVM: PPC:
> Book3S HV: Avoid crash from THP collapse during radix page fault",
> 2018-10-04).
Thanks, now queued up.
greg k-h
^ permalink raw reply
* [PATCH 3/5] powerpc/lib: checksum KHRAP support
From: Russell Currey @ 2018-10-17 6:44 UTC (permalink / raw)
To: linuxppc-dev; +Cc: mikey, Russell Currey
In-Reply-To: <20181017064422.26119-1-ruscur@russell.cc>
Wrap the checksumming code in KHRAP locks and unlocks.
Signed-off-by: Russell Currey <ruscur@russell.cc>
---
arch/powerpc/lib/checksum_wrappers.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/lib/checksum_wrappers.c b/arch/powerpc/lib/checksum_wrappers.c
index a0cb63fb76a1..695460a29c9f 100644
--- a/arch/powerpc/lib/checksum_wrappers.c
+++ b/arch/powerpc/lib/checksum_wrappers.c
@@ -26,7 +26,7 @@
__wsum csum_and_copy_from_user(const void __user *src, void *dst,
int len, __wsum sum, int *err_ptr)
{
- unsigned int csum;
+ unsigned int csum, amr = unlock_user_access();
might_sleep();
@@ -60,6 +60,7 @@ __wsum csum_and_copy_from_user(const void __user *src, void *dst,
}
out:
+ lock_user_access(amr);
return (__force __wsum)csum;
}
EXPORT_SYMBOL(csum_and_copy_from_user);
@@ -67,7 +68,7 @@ EXPORT_SYMBOL(csum_and_copy_from_user);
__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
__wsum sum, int *err_ptr)
{
- unsigned int csum;
+ unsigned int csum, amr = unlock_user_access();
might_sleep();
@@ -97,6 +98,7 @@ __wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
}
out:
+ lock_user_access(amr);
return (__force __wsum)csum;
}
EXPORT_SYMBOL(csum_and_copy_to_user);
--
2.19.1
^ permalink raw reply related
* [PATCH 5/5] powerpc/64s: Document that PPC supports nosmap
From: Russell Currey @ 2018-10-17 6:44 UTC (permalink / raw)
To: linuxppc-dev; +Cc: mikey, Russell Currey
In-Reply-To: <20181017064422.26119-1-ruscur@russell.cc>
Signed-off-by: Russell Currey <ruscur@russell.cc>
---
Documentation/admin-guide/kernel-parameters.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index a5ad67d5cb16..8f78e75965f0 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2764,7 +2764,7 @@
noexec=on: enable non-executable mappings (default)
noexec=off: disable non-executable mappings
- nosmap [X86]
+ nosmap [X86,PPC]
Disable SMAP (Supervisor Mode Access Prevention)
even if it is supported by processor.
--
2.19.1
^ permalink raw reply related
* [PATCH 2/5] powerpc/futex: KHRAP support for futex ops
From: Russell Currey @ 2018-10-17 6:44 UTC (permalink / raw)
To: linuxppc-dev; +Cc: mikey, Russell Currey
In-Reply-To: <20181017064422.26119-1-ruscur@russell.cc>
Wrap the futex operations in KHRAP locks and unlocks.
Signed-off-by: Russell Currey <ruscur@russell.cc>
---
arch/powerpc/include/asm/futex.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index 94542776a62d..e0f4227cfd32 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -34,7 +34,9 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
u32 __user *uaddr)
{
int oldval = 0, ret;
+ unsigned long amr;
+ amr = unlock_user_access();
pagefault_disable();
switch (op) {
@@ -62,6 +64,7 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
if (!ret)
*oval = oldval;
+ lock_user_access(amr);
return ret;
}
@@ -71,10 +74,12 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
{
int ret = 0;
u32 prev;
+ unsigned long amr;
if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
return -EFAULT;
+ amr = unlock_user_access();
__asm__ __volatile__ (
PPC_ATOMIC_ENTRY_BARRIER
"1: lwarx %1,0,%3 # futex_atomic_cmpxchg_inatomic\n\
@@ -95,6 +100,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
: "cc", "memory");
*uval = prev;
+ lock_user_access(amr);
return ret;
}
--
2.19.1
^ permalink raw reply related
* [PATCH 4/5] powerpc/64s: Disable KHRAP with nosmap option
From: Russell Currey @ 2018-10-17 6:44 UTC (permalink / raw)
To: linuxppc-dev; +Cc: mikey, Russell Currey
In-Reply-To: <20181017064422.26119-1-ruscur@russell.cc>
KHRAP is similar to SMAP on x86 platforms, so implement support for
the same kernel parameter.
Signed-off-by: Russell Currey <ruscur@russell.cc>
---
arch/powerpc/mm/init_64.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 7a9886f98b0c..10182ce3b94f 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -312,6 +312,7 @@ void register_page_bootmem_memmap(unsigned long section_nr,
#ifdef CONFIG_PPC_BOOK3S_64
static bool disable_radix = !IS_ENABLED(CONFIG_PPC_RADIX_MMU_DEFAULT);
+static bool disable_khrap = !IS_ENABLED(CONFIG_PPC_RADIX_KHRAP);
static int __init parse_disable_radix(char *p)
{
@@ -328,6 +329,18 @@ static int __init parse_disable_radix(char *p)
}
early_param("disable_radix", parse_disable_radix);
+static int __init parse_nosmap(char *p)
+{
+ /*
+ * nosmap is an existing option on x86 where it doesn't return -EINVAL
+ * if the parameter is set to something, so even though it's different
+ * to disable_radix, don't return an error for compatibility.
+ */
+ disable_khrap = true;
+ return 0;
+}
+early_param("nosmap", parse_nosmap);
+
/*
* If we're running under a hypervisor, we need to check the contents of
* /chosen/ibm,architecture-vec-5 to see if the hypervisor is willing to do
@@ -381,6 +394,8 @@ void __init mmu_early_init_devtree(void)
/* Disable radix mode based on kernel command line. */
if (disable_radix)
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
+ if (disable_radix || disable_khrap)
+ cur_cpu_spec->mmu_features &= ~MMU_FTR_RADIX_KHRAP;
/*
* Check /chosen/ibm,architecture-vec-5 if running as a guest.
--
2.19.1
^ permalink raw reply related
* [PATCH 1/5] powerpc/64s: Kernel Hypervisor Restricted Access Prevention
From: Russell Currey @ 2018-10-17 6:44 UTC (permalink / raw)
To: linuxppc-dev; +Cc: mikey, Russell Currey
Kernel Hypervisor Restricted Access Prevention (KHRAP) utilises a feature
of the Radix MMU which disallows read and write access to userspace
addresses. By utilising this, the kernel is prevented from accessing
user data from outside of trusted paths that perform proper safety checks,
such as copy_{to/from}_user() and friends.
Userspace access is disabled from early boot and is only enabled when:
- exiting the kernel and entering userspace
- performing an operation like copy_{to/from}_user()
- context switching to a process that has access enabled
and similarly, access is disabled again when exiting userspace and entering
the kernel.
This feature has a slight performance impact which I roughly measured to be
4% slower (performing 1GB of 1 byte read()/write() syscalls), and is gated
behind the CONFIG_PPC_RADIX_KHRAP option for performance-critical builds.
This feature can be tested by using the lkdtm driver (CONFIG_LKDTM=y) and
performing the following:
echo ACCESS_USERSPACE > [debugfs]/provoke-crash/DIRECT
if enabled, this should send SIGSEGV to the thread.
Signed-off-by: Russell Currey <ruscur@russell.cc>
---
More detailed benchmarks soon, there's more optimisations here as well.
arch/powerpc/include/asm/exception-64s.h | 17 +++++++
arch/powerpc/include/asm/mmu.h | 7 +++
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/include/asm/uaccess.h | 63 +++++++++++++++++++++---
arch/powerpc/kernel/dt_cpu_ftrs.c | 4 ++
arch/powerpc/kernel/entry_64.S | 7 +++
arch/powerpc/mm/fault.c | 9 ++++
arch/powerpc/mm/pgtable-radix.c | 2 +
arch/powerpc/mm/pkeys.c | 7 ++-
arch/powerpc/platforms/Kconfig.cputype | 15 ++++++
10 files changed, 122 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 3b4767ed3ec5..3b84a8050bae 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -240,6 +240,22 @@ BEGIN_FTR_SECTION_NESTED(941) \
mtspr SPRN_PPR,ra; \
END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
+#define LOCK_AMR(reg) \
+BEGIN_MMU_FTR_SECTION_NESTED(69) \
+ LOAD_REG_IMMEDIATE(reg,AMR_LOCKED); \
+ isync; \
+ mtspr SPRN_AMR,reg; \
+ isync; \
+END_MMU_FTR_SECTION_NESTED(MMU_FTR_RADIX_KHRAP,MMU_FTR_RADIX_KHRAP,69)
+
+#define UNLOCK_AMR(reg) \
+BEGIN_MMU_FTR_SECTION_NESTED(420) \
+ li reg,0; \
+ isync; \
+ mtspr SPRN_AMR,reg; \
+ isync; \
+END_MMU_FTR_SECTION_NESTED(MMU_FTR_RADIX_KHRAP,MMU_FTR_RADIX_KHRAP,420)
+
/*
* Get an SPR into a register if the CPU has the given feature
*/
@@ -500,6 +516,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
beq 4f; /* if from kernel mode */ \
ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \
SAVE_PPR(area, r9); \
+ LOCK_AMR(r9); \
4: EXCEPTION_PROLOG_COMMON_2(area) \
EXCEPTION_PROLOG_COMMON_3(n) \
ACCOUNT_STOLEN_TIME
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index eb20eb3b8fb0..504c8bfa2f9d 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -107,6 +107,10 @@
*/
#define MMU_FTR_1T_SEGMENT ASM_CONST(0x40000000)
+/* Supports KHRAP (key 0 controlling userspace addresses) on radix
+ */
+#define MMU_FTR_RADIX_KHRAP ASM_CONST(0x80000000)
+
/* MMU feature bit sets for various CPUs */
#define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \
MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
@@ -143,6 +147,9 @@ enum {
MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |
#ifdef CONFIG_PPC_RADIX_MMU
MMU_FTR_TYPE_RADIX |
+#endif
+#ifdef CONFIG_PPC_RADIX_KHRAP
+ MMU_FTR_RADIX_KHRAP |
#endif
0,
};
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 640a4d818772..8aa3540fbedc 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -246,6 +246,7 @@
#define SPRN_DSCR 0x11
#define SPRN_CFAR 0x1c /* Come From Address Register */
#define SPRN_AMR 0x1d /* Authority Mask Register */
+#define AMR_LOCKED 0xc000000000000000 /* Read & Write disabled */
#define SPRN_UAMOR 0x9d /* User Authority Mask Override Register */
#define SPRN_AMOR 0x15d /* Authority Mask Override Register */
#define SPRN_ACOP 0x1F /* Available Coprocessor Register */
diff --git a/arch/powerpc/include/asm/uaccess.h b/arch/powerpc/include/asm/uaccess.h
index 15bea9a0f260..4a39ab000d05 100644
--- a/arch/powerpc/include/asm/uaccess.h
+++ b/arch/powerpc/include/asm/uaccess.h
@@ -62,6 +62,31 @@ static inline int __access_ok(unsigned long addr, unsigned long size,
#endif
+static inline unsigned long unlock_user_access(void)
+{
+ unsigned long amr;
+
+ if (mmu_has_feature(MMU_FTR_RADIX_KHRAP)) {
+ amr = mfspr(SPRN_AMR);
+
+ isync();
+ mtspr(SPRN_AMR, 0);
+ isync();
+ return amr;
+ }
+
+ return 0;
+}
+
+static inline void lock_user_access(unsigned long amr)
+{
+ if (mmu_has_feature(MMU_FTR_RADIX_KHRAP)) {
+ isync();
+ mtspr(SPRN_AMR, AMR_LOCKED);
+ isync();
+ }
+}
+
#define access_ok(type, addr, size) \
(__chk_user_ptr(addr), \
__access_ok((__force unsigned long)(addr), (size), get_fs()))
@@ -140,7 +165,9 @@ extern long __put_user_bad(void);
#define __put_user_size(x, ptr, size, retval) \
do { \
+ unsigned long __amr; \
retval = 0; \
+ __amr = unlock_user_access(); \
switch (size) { \
case 1: __put_user_asm(x, ptr, retval, "stb"); break; \
case 2: __put_user_asm(x, ptr, retval, "sth"); break; \
@@ -148,6 +175,7 @@ do { \
case 8: __put_user_asm2(x, ptr, retval); break; \
default: __put_user_bad(); \
} \
+ lock_user_access(__amr); \
} while (0)
#define __put_user_nocheck(x, ptr, size) \
@@ -236,10 +264,12 @@ extern long __get_user_bad(void);
#define __get_user_size(x, ptr, size, retval) \
do { \
+ unsigned long __amr; \
retval = 0; \
__chk_user_ptr(ptr); \
if (size > sizeof(x)) \
(x) = __get_user_bad(); \
+ __amr = unlock_user_access(); \
switch (size) { \
case 1: __get_user_asm(x, ptr, retval, "lbz"); break; \
case 2: __get_user_asm(x, ptr, retval, "lhz"); break; \
@@ -247,6 +277,7 @@ do { \
case 8: __get_user_asm2(x, ptr, retval); break; \
default: (x) = __get_user_bad(); \
} \
+ lock_user_access(__amr); \
} while (0)
/*
@@ -306,15 +337,20 @@ extern unsigned long __copy_tofrom_user(void __user *to,
static inline unsigned long
raw_copy_in_user(void __user *to, const void __user *from, unsigned long n)
{
- return __copy_tofrom_user(to, from, n);
+ unsigned long ret, amr;
+ amr = unlock_user_access(); \
+ ret = __copy_tofrom_user(to, from, n); \
+ lock_user_access(amr); \
+ return ret; \
}
#endif /* __powerpc64__ */
static inline unsigned long raw_copy_from_user(void *to,
const void __user *from, unsigned long n)
{
+ unsigned long ret, amr;
if (__builtin_constant_p(n) && (n <= 8)) {
- unsigned long ret = 1;
+ ret = 1;
switch (n) {
case 1:
@@ -339,14 +375,18 @@ static inline unsigned long raw_copy_from_user(void *to,
}
barrier_nospec();
- return __copy_tofrom_user((__force void __user *)to, from, n);
+ amr = unlock_user_access();
+ ret = __copy_tofrom_user((__force void __user *)to, from, n);
+ lock_user_access(amr);
+ return ret;
}
static inline unsigned long raw_copy_to_user(void __user *to,
const void *from, unsigned long n)
{
+ unsigned long ret, amr;
if (__builtin_constant_p(n) && (n <= 8)) {
- unsigned long ret = 1;
+ ret = 1;
switch (n) {
case 1:
@@ -366,17 +406,24 @@ static inline unsigned long raw_copy_to_user(void __user *to,
return 0;
}
- return __copy_tofrom_user(to, (__force const void __user *)from, n);
+ amr = unlock_user_access();
+ ret = __copy_tofrom_user(to, (__force const void __user *)from, n);
+ lock_user_access(amr);
+ return ret;
}
extern unsigned long __clear_user(void __user *addr, unsigned long size);
static inline unsigned long clear_user(void __user *addr, unsigned long size)
{
+ unsigned long amr, ret = size;
might_fault();
- if (likely(access_ok(VERIFY_WRITE, addr, size)))
- return __clear_user(addr, size);
- return size;
+ if (likely(access_ok(VERIFY_WRITE, addr, size))) {
+ amr = unlock_user_access();
+ ret = __clear_user(addr, size);
+ lock_user_access(amr);
+ }
+ return ret;
}
extern long strncpy_from_user(char *dst, const char __user *src, long count);
diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
index f432054234a4..890fcb690ce7 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -337,6 +337,10 @@ static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
+#ifdef CONFIG_PPC_RADIX_KHRAP
+ cur_cpu_spec->mmu_features |= MMU_FTR_RADIX_KHRAP;
+#endif
+
return 1;
#endif
return 0;
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 7b1693adff2a..090f72cbb02d 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -286,6 +286,9 @@ BEGIN_FTR_SECTION
HMT_MEDIUM_LOW
END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
+ /* headed back to userspace, so unlock the AMR */
+ UNLOCK_AMR(r2)
+
ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
ld r2,GPR2(r1)
ld r1,GPR1(r1)
@@ -965,6 +968,10 @@ BEGIN_FTR_SECTION
ld r2,_PPR(r1)
mtspr SPRN_PPR,r2
END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
+
+ /* headed back to userspace, so unlock the AMR */
+ UNLOCK_AMR(r2)
+
ACCOUNT_CPU_USER_EXIT(r13, r2, r4)
REST_GPR(13, r1)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index d51cf5f4e45e..697dee2f665b 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -462,6 +462,15 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
return bad_key_fault_exception(regs, address,
get_mm_addr_key(mm, address));
+ if (mmu_has_feature(MMU_FTR_RADIX_KHRAP)) {
+ if (unlikely(!is_user &&
+ (error_code & DSISR_PROTFAULT) &&
+ (mfspr(SPRN_AMR) & AMR_LOCKED))) {
+ printk(KERN_CRIT "Kernel attempted to access user data"
+ " unsafely, possible security vulnerability\n");
+ return bad_area_nosemaphore(regs, address);
+ }
+ }
/*
* We want to do this outside mmap_sem, because reading code around nip
* can result in fault, which will cause a deadlock when called with
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index c879979faa73..2e88851916e0 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -29,6 +29,7 @@
#include <asm/powernv.h>
#include <asm/sections.h>
#include <asm/trace.h>
+#include <asm/uaccess.h>
#include <trace/events/thp.h>
@@ -608,6 +609,7 @@ void __init radix__early_init_mmu(void)
mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
radix_init_partition_table();
radix_init_amor();
+ lock_user_access(0);
} else {
radix_init_pseries();
}
diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c
index b271b283c785..4d58426af3e3 100644
--- a/arch/powerpc/mm/pkeys.c
+++ b/arch/powerpc/mm/pkeys.c
@@ -7,6 +7,7 @@
#include <asm/mman.h>
#include <asm/setup.h>
+#include <asm/uaccess.h>
#include <linux/pkeys.h>
#include <linux/of_device.h>
@@ -266,7 +267,8 @@ int __arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
void thread_pkey_regs_save(struct thread_struct *thread)
{
- if (static_branch_likely(&pkey_disabled))
+ if (static_branch_likely(&pkey_disabled) &&
+ !mmu_has_feature(MMU_FTR_RADIX_KHRAP))
return;
/*
@@ -280,7 +282,8 @@ void thread_pkey_regs_save(struct thread_struct *thread)
void thread_pkey_regs_restore(struct thread_struct *new_thread,
struct thread_struct *old_thread)
{
- if (static_branch_likely(&pkey_disabled))
+ if (static_branch_likely(&pkey_disabled) &&
+ !mmu_has_feature(MMU_FTR_RADIX_KHRAP))
return;
if (old_thread->amr != new_thread->amr)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f4e2c5729374..6cd32ce6760c 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -351,6 +351,21 @@ config PPC_RADIX_MMU_DEFAULT
If you're unsure, say Y.
+config PPC_RADIX_KHRAP
+ bool "Kernel Hypervisor Restricted Access Prevention on Radix"
+ depends on PPC_RADIX_MMU
+ default y
+ help
+ Enable support for Kernel Hypervisor Restricted Access Prevention
+ (KHRAP) when using the Radix MMU. KHRAP is a security feature
+ preventing the kernel from directly accessing userspace data
+ without going through the proper checks.
+
+ KHRAP has a minor performance impact on context switching and can be
+ disabled at boot time using the "nosmap" kernel command line option.
+
+ If you're unsure, say Y.
+
config ARCH_ENABLE_HUGEPAGE_MIGRATION
def_bool y
depends on PPC_BOOK3S_64 && HUGETLB_PAGE && MIGRATION
--
2.19.1
^ permalink raw reply related
* [v9 7/7] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, linux-arm-kernel
In-Reply-To: <20181017055957.542-1-peng.ma@nxp.com>
Document the devicetree bindings for NXP Layerscape qDMA controller
which could be found on NXP QorIQ Layerscape SoCs.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
change in v9:
- add required properties such as interrupts,block-number,block-offset
etc.
Documentation/devicetree/bindings/dma/fsl-qdma.txt | 57 ++++++++++++++++++++
1 files changed, 57 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txt
diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
new file mode 100644
index 0000000..283372a
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
@@ -0,0 +1,57 @@
+NXP Layerscape SoC qDMA Controller
+==================================
+
+This device follows the generic DMA bindings defined in dma/dma.txt.
+
+Required properties:
+
+- compatible: Must be one of
+ "fsl,ls1021a-qdma": for LS1021A Board
+ "fsl,ls1043a-qdma": for ls1043A Board
+ "fsl,ls1046a-qdma": for ls1046A Board
+- reg: Should contain the register's base address and length.
+- interrupts: Should contain a reference to the interrupt used by this
+ device.
+- interrupt-names: Should contain interrupt names:
+ "qdma-queue0": the block0 interrupt
+ "qdma-queue1": the block1 interrupt
+ "qdma-queue2": the block2 interrupt
+ "qdma-queue3": the block3 interrupt
+ "qdma-error": the error interrupt
+- fsl,dma-queues: Should contain number of queues supported.
+- dma-channels: Number of DMA channels supported
+- block-number: the virtual block number
+- block-offset: the offset of different virtual block
+- status-sizes: status queue size of per virtual block
+- queue-sizes: command queue size of per virtual block, the size number
+ based on queues
+
+Optional properties:
+
+- dma-channels: Number of DMA channels supported by the controller.
+- big-endian: If present registers and hardware scatter/gather descriptors
+ of the qDMA are implemented in big endian mode, otherwise in little
+ mode.
+
+Examples:
+
+ qdma: dma-controller@8390000 {
+ compatible = "fsl,ls1021a-qdma";
+ reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8389000 0x0 0x1000>, /* Status regs */
+ <0x0 0x838a000 0x0 0x2000>; /* Block regs */
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error",
+ "qdma-queue0", "qdma-queue1";
+ dma-channels = <8>;
+ block-number = <2>;
+ block-offset = <0x1000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
+DMA clients must use the format described in dma/dma.txt file.
--
1.7.1
^ permalink raw reply related
* [v9 6/7] arm64: dts: ls1046a: add qdma device tree nodes
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, linux-arm-kernel
In-Reply-To: <20181017055957.542-1-peng.ma@nxp.com>
add the qDMA device tree nodes for LS1046A devices.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
change in v9:
- add interrupts for each virtual block
- add block-number
- add block-offset
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 21 +++++++++++++++++++++
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index ef83786..2a48d9b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -704,6 +704,27 @@
<0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
};
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <0 153 0x4>,
+ <0 39 0x4>,
+ <0 40 0x4>,
+ <0 41 0x4>,
+ <0 42 0x4>;
+ interrupt-names = "qdma-error", "qdma-queue0",
+ "qdma-queue1", "qdma-queue2", "qdma-queue3";
+ dma-channels = <8>;
+ block-number = <1>;
+ block-offset = <0x10000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
};
reserved-memory {
--
1.7.1
^ permalink raw reply related
* [v9 5/7] arm64: dts: ls1043a: add qdma device tree nodes
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, linux-arm-kernel
In-Reply-To: <20181017055957.542-1-peng.ma@nxp.com>
add the qDMA device tree nodes for LS1043A devices.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
change in v9:
- add interrupts for each virtual block
- add block-number
- add block-offset
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 22 ++++++++++++++++++++++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 7881e3d..e798c4c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -734,6 +734,28 @@
<0000 0 0 3 &gic 0 156 0x4>,
<0000 0 0 4 &gic 0 157 0x4>;
};
+
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <0 153 0x4>,
+ <0 39 0x4>,
+ <0 40 0x4>,
+ <0 41 0x4>,
+ <0 42 0x4>;
+ interrupt-names = "qdma-error", "qdma-queue0",
+ "qdma-queue1", "qdma-queue2", "qdma-queue3";
+ dma-channels = <8>;
+ block-number = <1>;
+ block-offset = <0x10000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
};
firmware {
--
1.7.1
^ permalink raw reply related
* [v9 3/7] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, Jiaheng Fan, linux-arm-kernel
In-Reply-To: <20181017055957.542-1-peng.ma@nxp.com>
NXP Queue DMA controller(qDMA) on Layerscape SoCs supports channel
virtuallization by allowing DMA jobs to be enqueued into different
command queues.
Note that this module depends on NXP DPAA.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Jiaheng Fan <jiaheng.fan@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
change in v9:
- add multi block for each core qDMA engine driver support
- remove remaining code for SG mode to clean up the qdma driver
- set Scatter/Gather table with 64B aligned to fixed an errata
- Added new internal functions to improve the structure of the driver
and do some other cleanups
- remove useless headers
- format some bad code
- use dma_cookie_status as status fn
drivers/dma/Kconfig | 13 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-qdma.c | 1257 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 1271 insertions(+), 0 deletions(-)
create mode 100644 drivers/dma/fsl-qdma.c
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index dacf3f4..50e19d7 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -218,6 +218,19 @@ config FSL_EDMA
multiplexing capability for DMA request sources(slot).
This module can be found on Freescale Vybrid and LS-1 SoCs.
+config FSL_QDMA
+ tristate "NXP Layerscape qDMA engine support"
+ depends on ARM || ARM64
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+ select DMA_ENGINE_RAID
+ select ASYNC_TX_ENABLE_CHANNEL_SWITCH
+ help
+ Support the NXP Layerscape qDMA engine with command queue and legacy mode.
+ Channel virtualization is supported through enqueuing of DMA jobs to,
+ or dequeuing DMA jobs from, different work queues.
+ This module can be found on NXP Layerscape SoCs.
+
config FSL_RAID
tristate "Freescale RAID engine Support"
depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index c91702d..2d1b586 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_DW_DMAC_CORE) += dw/
obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
obj-$(CONFIG_FSL_DMA) += fsldma.o
obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
+obj-$(CONFIG_FSL_QDMA) += fsl-qdma.o
obj-$(CONFIG_FSL_RAID) += fsl_raid.o
obj-$(CONFIG_HSU_DMA) += hsu/
obj-$(CONFIG_IMG_MDC_DMA) += img-mdc-dma.o
diff --git a/drivers/dma/fsl-qdma.c b/drivers/dma/fsl-qdma.c
new file mode 100644
index 0000000..404869e
--- /dev/null
+++ b/drivers/dma/fsl-qdma.c
@@ -0,0 +1,1257 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright 2018 NXP
+
+/*
+ * Driver for NXP Layerscape Queue Direct Memory Access Controller
+ *
+ * Author:
+ * Wen He <wen.he_1@nxp.com>
+ * Jiaheng Fan <jiaheng.fan@nxp.com>
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/of_dma.h>
+#include <linux/dma-mapping.h>
+
+#include "virt-dma.h"
+#include "fsldma.h"
+
+/* Register related definition */
+#define FSL_QDMA_DMR 0x0
+#define FSL_QDMA_DSR 0x4
+#define FSL_QDMA_DEIER 0xe00
+#define FSL_QDMA_DEDR 0xe04
+#define FSL_QDMA_DECFDW0R 0xe10
+#define FSL_QDMA_DECFDW1R 0xe14
+#define FSL_QDMA_DECFDW2R 0xe18
+#define FSL_QDMA_DECFDW3R 0xe1c
+#define FSL_QDMA_DECFQIDR 0xe30
+#define FSL_QDMA_DECBR 0xe34
+
+#define FSL_QDMA_BCQMR(x) (0xc0 + 0x100 * (x))
+#define FSL_QDMA_BCQSR(x) (0xc4 + 0x100 * (x))
+#define FSL_QDMA_BCQEDPA_SADDR(x) (0xc8 + 0x100 * (x))
+#define FSL_QDMA_BCQDPA_SADDR(x) (0xcc + 0x100 * (x))
+#define FSL_QDMA_BCQEEPA_SADDR(x) (0xd0 + 0x100 * (x))
+#define FSL_QDMA_BCQEPA_SADDR(x) (0xd4 + 0x100 * (x))
+#define FSL_QDMA_BCQIER(x) (0xe0 + 0x100 * (x))
+#define FSL_QDMA_BCQIDR(x) (0xe4 + 0x100 * (x))
+
+#define FSL_QDMA_SQDPAR 0x80c
+#define FSL_QDMA_SQEPAR 0x814
+#define FSL_QDMA_BSQMR 0x800
+#define FSL_QDMA_BSQSR 0x804
+#define FSL_QDMA_BSQICR 0x828
+#define FSL_QDMA_CQMR 0xa00
+#define FSL_QDMA_CQDSCR1 0xa08
+#define FSL_QDMA_CQDSCR2 0xa0c
+#define FSL_QDMA_CQIER 0xa10
+#define FSL_QDMA_CQEDR 0xa14
+#define FSL_QDMA_SQCCMR 0xa20
+
+/* Registers for bit and genmask */
+#define FSL_QDMA_CQIDR_SQT BIT(15)
+#define QDMA_CCDF_FOTMAT BIT(29)
+#define QDMA_CCDF_SER BIT(30)
+#define QDMA_SG_FIN BIT(30)
+#define QDMA_SG_LEN_MASK GENMASK(29, 0)
+#define QDMA_CCDF_MASK GENMASK(28, 20)
+
+#define FSL_QDMA_DEDR_CLEAR GENMASK(31, 0)
+#define FSL_QDMA_BCQIDR_CLEAR GENMASK(31, 0)
+#define FSL_QDMA_DEIER_CLEAR GENMASK(31, 0)
+
+#define FSL_QDMA_BCQIER_CQTIE BIT(15)
+#define FSL_QDMA_BCQIER_CQPEIE BIT(23)
+#define FSL_QDMA_BSQICR_ICEN BIT(31)
+
+#define FSL_QDMA_BSQICR_ICST(x) ((x) << 16)
+#define FSL_QDMA_CQIER_MEIE BIT(31)
+#define FSL_QDMA_CQIER_TEIE BIT(0)
+#define FSL_QDMA_SQCCMR_ENTER_WM BIT(21)
+
+#define FSL_QDMA_BCQMR_EN BIT(31)
+#define FSL_QDMA_BCQMR_EI BIT(30)
+#define FSL_QDMA_BCQMR_CD_THLD(x) ((x) << 20)
+#define FSL_QDMA_BCQMR_CQ_SIZE(x) ((x) << 16)
+
+#define FSL_QDMA_BCQSR_QF BIT(16)
+#define FSL_QDMA_BCQSR_XOFF BIT(0)
+
+#define FSL_QDMA_BSQMR_EN BIT(31)
+#define FSL_QDMA_BSQMR_DI BIT(30)
+#define FSL_QDMA_BSQMR_CQ_SIZE(x) ((x) << 16)
+
+#define FSL_QDMA_BSQSR_QE BIT(17)
+
+#define FSL_QDMA_DMR_DQD BIT(30)
+#define FSL_QDMA_DSR_DB BIT(31)
+
+/* Size related definition */
+#define FSL_QDMA_QUEUE_MAX 8
+#define FSL_QDMA_COMMAND_BUFFER_SIZE 64
+#define FSL_QDMA_DESCRIPTOR_BUFFER_SIZE 32
+#define FSL_QDMA_CIRCULAR_DESC_SIZE_MIN 64
+#define FSL_QDMA_CIRCULAR_DESC_SIZE_MAX 16384
+#define FSL_QDMA_QUEUE_NUM_MAX 8
+
+/* Field definition for CMD */
+#define FSL_QDMA_CMD_RWTTYPE 0x4
+#define FSL_QDMA_CMD_LWC 0x2
+#define FSL_QDMA_CMD_RWTTYPE_OFFSET 28
+#define FSL_QDMA_CMD_NS_OFFSET 27
+#define FSL_QDMA_CMD_DQOS_OFFSET 24
+#define FSL_QDMA_CMD_WTHROTL_OFFSET 20
+#define FSL_QDMA_CMD_DSEN_OFFSET 19
+#define FSL_QDMA_CMD_LWC_OFFSET 16
+
+/* Field definition for Descriptor offset */
+#define QDMA_CCDF_STATUS 20
+#define QDMA_CCDF_OFFSET 20
+
+/* Field definition for safe loop count*/
+#define FSL_QDMA_HALT_COUNT 1500
+#define FSL_QDMA_MAX_SIZE 16385
+#define FSL_QDMA_COMP_TIMEOUT 1000
+#define FSL_COMMAND_QUEUE_OVERFLLOW 10
+
+#define FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma_engine, x) \
+ (((fsl_qdma_engine)->block_offset) * (x))
+
+/**
+ * struct fsl_qdma_format - This is the struct holding describing compound
+ * descriptor format with qDMA.
+ * @status: Command status and enqueue status notification.
+ * @cfg: Frame offset and frame format.
+ * @addr_lo: Holding the compound descriptor of the lower
+ * 32-bits address in memory 40-bit address.
+ * @addr_hi: Same as above member, but point high 8-bits in
+ * memory 40-bit address.
+ * @__reserved1: Reserved field.
+ * @cfg8b_w1: Compound descriptor command queue origin produced
+ * by qDMA and dynamic debug field.
+ * @data Pointer to the memory 40-bit address, describes DMA
+ * source information and DMA destination information.
+ */
+struct fsl_qdma_format {
+ __le32 status;
+ __le32 cfg;
+ union {
+ struct {
+ __le32 addr_lo;
+ u8 addr_hi;
+ u8 __reserved1[2];
+ u8 cfg8b_w1;
+ } __packed;
+ __le64 data;
+ };
+} __packed;
+
+/* qDMA status notification pre information */
+struct fsl_pre_status {
+ u64 addr;
+ u8 queue;
+};
+
+static DEFINE_PER_CPU(struct fsl_pre_status, pre);
+
+struct fsl_qdma_chan {
+ struct virt_dma_chan vchan;
+ struct virt_dma_desc vdesc;
+ enum dma_status status;
+ struct fsl_qdma_engine *qdma;
+ struct fsl_qdma_queue *queue;
+};
+
+struct fsl_qdma_queue {
+ struct fsl_qdma_format *virt_head;
+ struct fsl_qdma_format *virt_tail;
+ struct list_head comp_used;
+ struct list_head comp_free;
+ struct dma_pool *comp_pool;
+ struct dma_pool *desc_pool;
+ spinlock_t queue_lock;
+ dma_addr_t bus_addr;
+ u32 n_cq;
+ u32 id;
+ struct fsl_qdma_format *cq;
+ void __iomem *block_base;
+};
+
+struct fsl_qdma_comp {
+ dma_addr_t bus_addr;
+ dma_addr_t desc_bus_addr;
+ struct fsl_qdma_format *virt_addr;
+ struct fsl_qdma_format *desc_virt_addr;
+ struct fsl_qdma_chan *qchan;
+ struct virt_dma_desc vdesc;
+ struct list_head list;
+};
+
+struct fsl_qdma_engine {
+ struct dma_device dma_dev;
+ void __iomem *ctrl_base;
+ void __iomem *status_base;
+ void __iomem *block_base;
+ u32 n_chans;
+ u32 n_queues;
+ struct mutex fsl_qdma_mutex;
+ int error_irq;
+ int *queue_irq;
+ u32 feature;
+ struct fsl_qdma_queue *queue;
+ struct fsl_qdma_queue **status;
+ struct fsl_qdma_chan *chans;
+ int block_number;
+ int block_offset;
+ int irq_base;
+ int desc_allocated;
+
+};
+
+static inline u64
+qdma_ccdf_addr_get64(const struct fsl_qdma_format *ccdf)
+{
+ return le64_to_cpu(ccdf->data) & (U64_MAX >> 24);
+}
+
+static inline void
+qdma_desc_addr_set64(struct fsl_qdma_format *ccdf, u64 addr)
+{
+ ccdf->addr_hi = upper_32_bits(addr);
+ ccdf->addr_lo = cpu_to_le32(lower_32_bits(addr));
+}
+
+static inline u8
+qdma_ccdf_get_queue(const struct fsl_qdma_format *ccdf)
+{
+ return ccdf->cfg8b_w1 & U8_MAX;
+}
+
+static inline int
+qdma_ccdf_get_offset(const struct fsl_qdma_format *ccdf)
+{
+ return (le32_to_cpu(ccdf->cfg) & QDMA_CCDF_MASK) >> QDMA_CCDF_OFFSET;
+}
+
+static inline void
+qdma_ccdf_set_format(struct fsl_qdma_format *ccdf, int offset)
+{
+ ccdf->cfg = cpu_to_le32(QDMA_CCDF_FOTMAT | offset);
+}
+
+static inline int
+qdma_ccdf_get_status(const struct fsl_qdma_format *ccdf)
+{
+ return (le32_to_cpu(ccdf->status) & QDMA_CCDF_MASK) >> QDMA_CCDF_STATUS;
+}
+
+static inline void
+qdma_ccdf_set_ser(struct fsl_qdma_format *ccdf, int status)
+{
+ ccdf->status = cpu_to_le32(QDMA_CCDF_SER | status);
+}
+
+static inline void qdma_csgf_set_len(struct fsl_qdma_format *csgf, int len)
+{
+ csgf->cfg = cpu_to_le32(len & QDMA_SG_LEN_MASK);
+}
+
+static inline void qdma_csgf_set_f(struct fsl_qdma_format *csgf, int len)
+{
+ csgf->cfg = cpu_to_le32(QDMA_SG_FIN | (len & QDMA_SG_LEN_MASK));
+}
+
+static u32 qdma_readl(struct fsl_qdma_engine *qdma, void __iomem *addr)
+{
+ return FSL_DMA_IN(qdma, addr, 32);
+}
+
+static void qdma_writel(struct fsl_qdma_engine *qdma, u32 val,
+ void __iomem *addr)
+{
+ FSL_DMA_OUT(qdma, addr, val, 32);
+}
+
+static struct fsl_qdma_chan *to_fsl_qdma_chan(struct dma_chan *chan)
+{
+ return container_of(chan, struct fsl_qdma_chan, vchan.chan);
+}
+
+static struct fsl_qdma_comp *to_fsl_qdma_comp(struct virt_dma_desc *vd)
+{
+ return container_of(vd, struct fsl_qdma_comp, vdesc);
+}
+
+static void fsl_qdma_free_chan_resources(struct dma_chan *chan)
+{
+ struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
+ struct fsl_qdma_queue *fsl_queue = fsl_chan->queue;
+ struct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma;
+ struct fsl_qdma_comp *comp_temp, *_comp_temp;
+ unsigned long flags;
+ LIST_HEAD(head);
+
+ spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
+ vchan_get_all_descriptors(&fsl_chan->vchan, &head);
+ spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
+
+ vchan_dma_desc_free_list(&fsl_chan->vchan, &head);
+
+ if (!fsl_queue->comp_pool && !fsl_queue->comp_pool)
+ return;
+
+ list_for_each_entry_safe(comp_temp, _comp_temp,
+ &fsl_queue->comp_used, list) {
+ dma_pool_free(fsl_queue->comp_pool,
+ comp_temp->virt_addr,
+ comp_temp->bus_addr);
+ dma_pool_free(fsl_queue->desc_pool,
+ comp_temp->desc_virt_addr,
+ comp_temp->desc_bus_addr);
+ list_del(&comp_temp->list);
+ kfree(comp_temp);
+ }
+
+ list_for_each_entry_safe(comp_temp, _comp_temp,
+ &fsl_queue->comp_free, list) {
+ dma_pool_free(fsl_queue->comp_pool,
+ comp_temp->virt_addr,
+ comp_temp->bus_addr);
+ dma_pool_free(fsl_queue->desc_pool,
+ comp_temp->desc_virt_addr,
+ comp_temp->desc_bus_addr);
+ list_del(&comp_temp->list);
+ kfree(comp_temp);
+ }
+
+ dma_pool_destroy(fsl_queue->comp_pool);
+ dma_pool_destroy(fsl_queue->desc_pool);
+
+ fsl_qdma->desc_allocated--;
+ fsl_queue->comp_pool = NULL;
+ fsl_queue->desc_pool = NULL;
+}
+
+static void fsl_qdma_comp_fill_memcpy(struct fsl_qdma_comp *fsl_comp,
+ dma_addr_t dst, dma_addr_t src, u32 len)
+{
+ struct fsl_qdma_format *sdf, *ddf;
+ struct fsl_qdma_format *ccdf, *csgf_desc, *csgf_src, *csgf_dest;
+
+ ccdf = fsl_comp->virt_addr;
+ csgf_desc = fsl_comp->virt_addr + 1;
+ csgf_src = fsl_comp->virt_addr + 2;
+ csgf_dest = fsl_comp->virt_addr + 3;
+ sdf = fsl_comp->desc_virt_addr;
+ ddf = fsl_comp->desc_virt_addr + 1;
+
+ memset(fsl_comp->virt_addr, 0, FSL_QDMA_COMMAND_BUFFER_SIZE);
+ memset(fsl_comp->desc_virt_addr, 0, FSL_QDMA_DESCRIPTOR_BUFFER_SIZE);
+ /* Head Command Descriptor(Frame Descriptor) */
+ qdma_desc_addr_set64(ccdf, fsl_comp->bus_addr + 16);
+ qdma_ccdf_set_format(ccdf, qdma_ccdf_get_offset(ccdf));
+ qdma_ccdf_set_ser(ccdf, qdma_ccdf_get_status(ccdf));
+ /* Status notification is enqueued to status queue. */
+ /* Compound Command Descriptor(Frame List Table) */
+ qdma_desc_addr_set64(csgf_desc, fsl_comp->desc_bus_addr);
+ /* It must be 32 as Compound S/G Descriptor */
+ qdma_csgf_set_len(csgf_desc, 32);
+ qdma_desc_addr_set64(csgf_src, src);
+ qdma_csgf_set_len(csgf_src, len);
+ qdma_desc_addr_set64(csgf_dest, dst);
+ qdma_csgf_set_len(csgf_dest, len);
+ /* This entry is the last entry. */
+ qdma_csgf_set_f(csgf_dest, len);
+ /* Descriptor Buffer */
+ sdf->data =
+ cpu_to_le64(FSL_QDMA_CMD_RWTTYPE <<
+ FSL_QDMA_CMD_RWTTYPE_OFFSET);
+ ddf->data =
+ cpu_to_le64(FSL_QDMA_CMD_RWTTYPE <<
+ FSL_QDMA_CMD_RWTTYPE_OFFSET);
+ ddf->data |=
+ cpu_to_le64(FSL_QDMA_CMD_LWC << FSL_QDMA_CMD_LWC_OFFSET);
+}
+
+/*
+ * Pre-request full command descriptor for enqueue.
+ */
+static int fsl_qdma_pre_request_enqueue_desc(struct fsl_qdma_queue *queue)
+{
+ int i;
+ struct fsl_qdma_comp *comp_temp, *_comp_temp;
+
+ for (i = 0; i < queue->n_cq + FSL_COMMAND_QUEUE_OVERFLLOW; i++) {
+ comp_temp = kzalloc(sizeof(*comp_temp), GFP_KERNEL);
+ if (!comp_temp)
+ goto err_alloc;
+ comp_temp->virt_addr =
+ dma_pool_alloc(queue->comp_pool, GFP_KERNEL,
+ &comp_temp->bus_addr);
+ if (!comp_temp->virt_addr)
+ goto err_dma_alloc;
+
+ comp_temp->desc_virt_addr =
+ dma_pool_alloc(queue->desc_pool, GFP_KERNEL,
+ &comp_temp->desc_bus_addr);
+ if (!comp_temp->desc_virt_addr)
+ goto err_desc_dma_alloc;
+
+ list_add_tail(&comp_temp->list, &queue->comp_free);
+ }
+
+ return 0;
+
+err_desc_dma_alloc:
+ dma_pool_free(queue->comp_pool, comp_temp->virt_addr,
+ comp_temp->bus_addr);
+
+err_dma_alloc:
+ kfree(comp_temp);
+
+err_alloc:
+ list_for_each_entry_safe(comp_temp, _comp_temp,
+ &queue->comp_free, list) {
+ if (comp_temp->virt_addr)
+ dma_pool_free(queue->comp_pool,
+ comp_temp->virt_addr,
+ comp_temp->bus_addr);
+ if (comp_temp->desc_virt_addr)
+ dma_pool_free(queue->desc_pool,
+ comp_temp->desc_virt_addr,
+ comp_temp->desc_bus_addr);
+
+ list_del(&comp_temp->list);
+ kfree(comp_temp);
+ }
+
+ return -ENOMEM;
+}
+
+/*
+ * Request a command descriptor for enqueue.
+ */
+static struct fsl_qdma_comp
+*fsl_qdma_request_enqueue_desc(struct fsl_qdma_chan *fsl_chan)
+{
+ unsigned long flags;
+ struct fsl_qdma_comp *comp_temp;
+ int timeout = FSL_QDMA_COMP_TIMEOUT;
+ struct fsl_qdma_queue *queue = fsl_chan->queue;
+
+ while (timeout--) {
+ spin_lock_irqsave(&queue->queue_lock, flags);
+ if (!list_empty(&queue->comp_free)) {
+ comp_temp = list_first_entry(&queue->comp_free,
+ struct fsl_qdma_comp,
+ list);
+ list_del(&comp_temp->list);
+
+ spin_unlock_irqrestore(&queue->queue_lock, flags);
+ comp_temp->qchan = fsl_chan;
+ return comp_temp;
+ }
+ spin_unlock_irqrestore(&queue->queue_lock, flags);
+ udelay(1);
+ }
+
+ return NULL;
+}
+
+static struct fsl_qdma_queue
+*fsl_qdma_alloc_queue_resources(struct platform_device *pdev,
+ struct fsl_qdma_engine *fsl_qdma)
+{
+ int ret, len, i, j;
+ int queue_num, block_number;
+ unsigned int queue_size[FSL_QDMA_QUEUE_MAX];
+ struct fsl_qdma_queue *queue_head, *queue_temp;
+
+ queue_num = fsl_qdma->n_queues;
+ block_number = fsl_qdma->block_number;
+
+ if (queue_num > FSL_QDMA_QUEUE_MAX)
+ queue_num = FSL_QDMA_QUEUE_MAX;
+ len = sizeof(*queue_head) * queue_num * block_number;
+ queue_head = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
+ if (!queue_head)
+ return NULL;
+
+ ret = device_property_read_u32_array(&pdev->dev, "queue-sizes",
+ queue_size, queue_num);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get queue-sizes.\n");
+ return NULL;
+ }
+ for (j = 0; j < block_number; j++) {
+ for (i = 0; i < queue_num; i++) {
+ if (queue_size[i] > FSL_QDMA_CIRCULAR_DESC_SIZE_MAX ||
+ queue_size[i] < FSL_QDMA_CIRCULAR_DESC_SIZE_MIN) {
+ dev_err(&pdev->dev,
+ "Get wrong queue-sizes.\n");
+ return NULL;
+ }
+ queue_temp = queue_head + i + (j * queue_num);
+
+ queue_temp->cq =
+ dma_alloc_coherent(&pdev->dev,
+ sizeof(struct fsl_qdma_format) *
+ queue_size[i],
+ &queue_temp->bus_addr,
+ GFP_KERNEL);
+ if (!queue_temp->cq)
+ return NULL;
+ queue_temp->block_base = fsl_qdma->block_base +
+ FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma, j);
+ queue_temp->n_cq = queue_size[i];
+ queue_temp->id = i;
+ queue_temp->virt_head = queue_temp->cq;
+ queue_temp->virt_tail = queue_temp->cq;
+ /*
+ * List for queue command buffer
+ */
+ INIT_LIST_HEAD(&queue_temp->comp_used);
+ spin_lock_init(&queue_temp->queue_lock);
+ }
+ }
+ return queue_head;
+}
+
+static struct fsl_qdma_queue
+*fsl_qdma_prep_status_queue(struct platform_device *pdev)
+{
+ int ret;
+ unsigned int status_size;
+ struct fsl_qdma_queue *status_head;
+ struct device_node *np = pdev->dev.of_node;
+
+ ret = of_property_read_u32(np, "status-sizes", &status_size);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get status-sizes.\n");
+ return NULL;
+ }
+ if (status_size > FSL_QDMA_CIRCULAR_DESC_SIZE_MAX ||
+ status_size < FSL_QDMA_CIRCULAR_DESC_SIZE_MIN) {
+ dev_err(&pdev->dev, "Get wrong status_size.\n");
+ return NULL;
+ }
+ status_head = devm_kzalloc(&pdev->dev,
+ sizeof(*status_head), GFP_KERNEL);
+ if (!status_head)
+ return NULL;
+
+ /*
+ * Buffer for queue command
+ */
+ status_head->cq = dma_alloc_coherent(&pdev->dev,
+ sizeof(struct fsl_qdma_format) *
+ status_size,
+ &status_head->bus_addr,
+ GFP_KERNEL);
+ if (!status_head->cq) {
+ devm_kfree(&pdev->dev, status_head);
+ return NULL;
+ }
+ status_head->n_cq = status_size;
+ status_head->virt_head = status_head->cq;
+ status_head->virt_tail = status_head->cq;
+ status_head->comp_pool = NULL;
+
+ return status_head;
+}
+
+static int fsl_qdma_halt(struct fsl_qdma_engine *fsl_qdma)
+{
+ u32 reg;
+ int i, j, count = FSL_QDMA_HALT_COUNT;
+ void __iomem *block, *ctrl = fsl_qdma->ctrl_base;
+
+ /* Disable the command queue and wait for idle state. */
+ reg = qdma_readl(fsl_qdma, ctrl + FSL_QDMA_DMR);
+ reg |= FSL_QDMA_DMR_DQD;
+ qdma_writel(fsl_qdma, reg, ctrl + FSL_QDMA_DMR);
+ for (j = 0; j < fsl_qdma->block_number; j++) {
+ block = fsl_qdma->block_base +
+ FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma, j);
+ for (i = 0; i < FSL_QDMA_QUEUE_NUM_MAX; i++)
+ qdma_writel(fsl_qdma, 0, block + FSL_QDMA_BCQMR(i));
+ }
+ while (1) {
+ reg = qdma_readl(fsl_qdma, ctrl + FSL_QDMA_DSR);
+ if (!(reg & FSL_QDMA_DSR_DB))
+ break;
+ if (count-- < 0)
+ return -EBUSY;
+ udelay(100);
+ }
+
+ for (j = 0; j < fsl_qdma->block_number; j++) {
+ block = fsl_qdma->block_base +
+ FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma, j);
+
+ /* Disable status queue. */
+ qdma_writel(fsl_qdma, 0, block + FSL_QDMA_BSQMR);
+
+ /*
+ * clear the command queue interrupt detect register for
+ * all queues.
+ */
+ qdma_writel(fsl_qdma, FSL_QDMA_BCQIDR_CLEAR,
+ block + FSL_QDMA_BCQIDR(0));
+ }
+
+ return 0;
+}
+
+static int
+fsl_qdma_queue_transfer_complete(struct fsl_qdma_engine *fsl_qdma,
+ void *block,
+ int id)
+{
+ bool duplicate;
+ u32 reg, i, count;
+ struct fsl_qdma_queue *temp_queue;
+ struct fsl_qdma_format *status_addr;
+ struct fsl_qdma_comp *fsl_comp = NULL;
+ struct fsl_qdma_queue *fsl_queue = fsl_qdma->queue;
+ struct fsl_qdma_queue *fsl_status = fsl_qdma->status[id];
+
+ count = FSL_QDMA_MAX_SIZE;
+
+ while (count--) {
+ duplicate = 0;
+ reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQSR);
+ if (reg & FSL_QDMA_BSQSR_QE)
+ return 0;
+
+ status_addr = fsl_status->virt_head;
+
+ if (qdma_ccdf_get_queue(status_addr) ==
+ __this_cpu_read(pre.queue) &&
+ qdma_ccdf_addr_get64(status_addr) ==
+ __this_cpu_read(pre.addr))
+ duplicate = 1;
+ i = qdma_ccdf_get_queue(status_addr) +
+ id * fsl_qdma->n_queues;
+ __this_cpu_write(pre.addr, qdma_ccdf_addr_get64(status_addr));
+ __this_cpu_write(pre.queue, qdma_ccdf_get_queue(status_addr));
+ temp_queue = fsl_queue + i;
+
+ spin_lock(&temp_queue->queue_lock);
+ if (list_empty(&temp_queue->comp_used)) {
+ if (!duplicate) {
+ spin_unlock(&temp_queue->queue_lock);
+ return -EAGAIN;
+ }
+ } else {
+ fsl_comp = list_first_entry(&temp_queue->comp_used,
+ struct fsl_qdma_comp, list);
+ if (fsl_comp->bus_addr + 16 !=
+ __this_cpu_read(pre.addr)) {
+ if (!duplicate) {
+ spin_unlock(&temp_queue->queue_lock);
+ return -EAGAIN;
+ }
+ }
+ }
+
+ if (duplicate) {
+ reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR);
+ reg |= FSL_QDMA_BSQMR_DI;
+ qdma_desc_addr_set64(status_addr, 0x0);
+ fsl_status->virt_head++;
+ if (fsl_status->virt_head == fsl_status->cq
+ + fsl_status->n_cq)
+ fsl_status->virt_head = fsl_status->cq;
+ qdma_writel(fsl_qdma, reg, block + FSL_QDMA_BSQMR);
+ spin_unlock(&temp_queue->queue_lock);
+ continue;
+ }
+ list_del(&fsl_comp->list);
+
+ reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR);
+ reg |= FSL_QDMA_BSQMR_DI;
+ qdma_desc_addr_set64(status_addr, 0x0);
+ fsl_status->virt_head++;
+ if (fsl_status->virt_head == fsl_status->cq + fsl_status->n_cq)
+ fsl_status->virt_head = fsl_status->cq;
+ qdma_writel(fsl_qdma, reg, block + FSL_QDMA_BSQMR);
+ spin_unlock(&temp_queue->queue_lock);
+
+ spin_lock(&fsl_comp->qchan->vchan.lock);
+ vchan_cookie_complete(&fsl_comp->vdesc);
+ fsl_comp->qchan->status = DMA_COMPLETE;
+ spin_unlock(&fsl_comp->qchan->vchan.lock);
+ }
+
+ return 0;
+}
+
+static irqreturn_t fsl_qdma_error_handler(int irq, void *dev_id)
+{
+ unsigned int intr;
+ struct fsl_qdma_engine *fsl_qdma = dev_id;
+ void __iomem *status = fsl_qdma->status_base;
+
+ intr = qdma_readl(fsl_qdma, status + FSL_QDMA_DEDR);
+
+ if (intr) {
+ dev_err(fsl_qdma->dma_dev.dev, "DMA transaction error!\n");
+ return IRQ_NONE;
+ }
+
+ qdma_writel(fsl_qdma, FSL_QDMA_DEDR_CLEAR, status + FSL_QDMA_DEDR);
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t fsl_qdma_queue_handler(int irq, void *dev_id)
+{
+ int id;
+ unsigned int intr, reg;
+ struct fsl_qdma_engine *fsl_qdma = dev_id;
+ void __iomem *block, *ctrl = fsl_qdma->ctrl_base;
+
+ id = irq - fsl_qdma->irq_base;
+ if (id < 0 && id > fsl_qdma->block_number) {
+ dev_err(fsl_qdma->dma_dev.dev,
+ "irq %d is wrong irq_base is %d\n",
+ irq, fsl_qdma->irq_base);
+ }
+
+ block = fsl_qdma->block_base +
+ FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma, id);
+
+ intr = qdma_readl(fsl_qdma, block + FSL_QDMA_BCQIDR(0));
+
+ if ((intr & FSL_QDMA_CQIDR_SQT) != 0)
+ intr = fsl_qdma_queue_transfer_complete(fsl_qdma, block, id);
+
+ if (intr != 0) {
+ reg = qdma_readl(fsl_qdma, ctrl + FSL_QDMA_DMR);
+ reg |= FSL_QDMA_DMR_DQD;
+ qdma_writel(fsl_qdma, reg, ctrl + FSL_QDMA_DMR);
+ qdma_writel(fsl_qdma, 0, block + FSL_QDMA_BCQIER(0));
+ dev_err(fsl_qdma->dma_dev.dev, "QDMA: status err!\n");
+ }
+
+ /* Clear all detected events and interrupts. */
+ qdma_writel(fsl_qdma, FSL_QDMA_BCQIDR_CLEAR,
+ block + FSL_QDMA_BCQIDR(0));
+
+ return IRQ_HANDLED;
+}
+
+static int
+fsl_qdma_irq_init(struct platform_device *pdev,
+ struct fsl_qdma_engine *fsl_qdma)
+{
+ int i;
+ int cpu;
+ int ret;
+ char irq_name[20];
+
+ fsl_qdma->error_irq =
+ platform_get_irq_byname(pdev, "qdma-error");
+ if (fsl_qdma->error_irq < 0) {
+ dev_err(&pdev->dev, "Can't get qdma controller irq.\n");
+ return fsl_qdma->error_irq;
+ }
+
+ ret = devm_request_irq(&pdev->dev, fsl_qdma->error_irq,
+ fsl_qdma_error_handler, 0,
+ "qDMA error", fsl_qdma);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't register qDMA controller IRQ.\n");
+ return ret;
+ }
+
+ for (i = 0; i < fsl_qdma->block_number; i++) {
+ sprintf(irq_name, "qdma-queue%d", i);
+ fsl_qdma->queue_irq[i] =
+ platform_get_irq_byname(pdev, irq_name);
+
+ if (fsl_qdma->queue_irq[i] < 0) {
+ dev_err(&pdev->dev,
+ "Can't get qdma queue %d irq.\n", i);
+ return fsl_qdma->queue_irq[i];
+ }
+
+ ret = devm_request_irq(&pdev->dev,
+ fsl_qdma->queue_irq[i],
+ fsl_qdma_queue_handler,
+ 0,
+ "qDMA queue",
+ fsl_qdma);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Can't register qDMA queue IRQ.\n");
+ return ret;
+ }
+
+ cpu = i % num_online_cpus();
+ ret = irq_set_affinity_hint(fsl_qdma->queue_irq[i],
+ get_cpu_mask(cpu));
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Can't set cpu %d affinity to IRQ %d.\n",
+ cpu,
+ fsl_qdma->queue_irq[i]);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static void fsl_qdma_irq_exit(struct platform_device *pdev,
+ struct fsl_qdma_engine *fsl_qdma)
+{
+ int i;
+
+ devm_free_irq(&pdev->dev, fsl_qdma->error_irq, fsl_qdma);
+ for (i = 0; i < fsl_qdma->block_number; i++)
+ devm_free_irq(&pdev->dev, fsl_qdma->queue_irq[i], fsl_qdma);
+}
+
+static int fsl_qdma_reg_init(struct fsl_qdma_engine *fsl_qdma)
+{
+ u32 reg;
+ int i, j, ret;
+ struct fsl_qdma_queue *temp;
+ void __iomem *status = fsl_qdma->status_base;
+ void __iomem *block, *ctrl = fsl_qdma->ctrl_base;
+ struct fsl_qdma_queue *fsl_queue = fsl_qdma->queue;
+
+ /* Try to halt the qDMA engine first. */
+ ret = fsl_qdma_halt(fsl_qdma);
+ if (ret) {
+ dev_err(fsl_qdma->dma_dev.dev, "DMA halt failed!");
+ return ret;
+ }
+
+ for (i = 0; i < fsl_qdma->block_number; i++) {
+ /*
+ * Clear the command queue interrupt detect register for
+ * all queues.
+ */
+
+ block = fsl_qdma->block_base +
+ FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma, i);
+ qdma_writel(fsl_qdma, FSL_QDMA_BCQIDR_CLEAR,
+ block + FSL_QDMA_BCQIDR(0));
+ }
+
+ for (j = 0; j < fsl_qdma->block_number; j++) {
+ block = fsl_qdma->block_base +
+ FSL_QDMA_BLOCK_BASE_OFFSET(fsl_qdma, j);
+ for (i = 0; i < fsl_qdma->n_queues; i++) {
+ temp = fsl_queue + i + (j * fsl_qdma->n_queues);
+ /*
+ * Initialize Command Queue registers to
+ * point to the first
+ * command descriptor in memory.
+ * Dequeue Pointer Address Registers
+ * Enqueue Pointer Address Registers
+ */
+
+ qdma_writel(fsl_qdma, temp->bus_addr,
+ block + FSL_QDMA_BCQDPA_SADDR(i));
+ qdma_writel(fsl_qdma, temp->bus_addr,
+ block + FSL_QDMA_BCQEPA_SADDR(i));
+
+ /* Initialize the queue mode. */
+ reg = FSL_QDMA_BCQMR_EN;
+ reg |= FSL_QDMA_BCQMR_CD_THLD(ilog2(temp->n_cq) - 4);
+ reg |= FSL_QDMA_BCQMR_CQ_SIZE(ilog2(temp->n_cq) - 6);
+ qdma_writel(fsl_qdma, reg, block + FSL_QDMA_BCQMR(i));
+ }
+
+ /*
+ * Workaround for erratum: ERR010812.
+ * We must enable XOFF to avoid the enqueue rejection occurs.
+ * Setting SQCCMR ENTER_WM to 0x20.
+ */
+
+ qdma_writel(fsl_qdma, FSL_QDMA_SQCCMR_ENTER_WM,
+ block + FSL_QDMA_SQCCMR);
+
+ /*
+ * Initialize status queue registers to point to the first
+ * command descriptor in memory.
+ * Dequeue Pointer Address Registers
+ * Enqueue Pointer Address Registers
+ */
+
+ qdma_writel(fsl_qdma, fsl_qdma->status[j]->bus_addr,
+ block + FSL_QDMA_SQEPAR);
+ qdma_writel(fsl_qdma, fsl_qdma->status[j]->bus_addr,
+ block + FSL_QDMA_SQDPAR);
+ /* Initialize status queue interrupt. */
+ qdma_writel(fsl_qdma, FSL_QDMA_BCQIER_CQTIE,
+ block + FSL_QDMA_BCQIER(0));
+ qdma_writel(fsl_qdma, FSL_QDMA_BSQICR_ICEN |
+ FSL_QDMA_BSQICR_ICST(5) | 0x8000,
+ block + FSL_QDMA_BSQICR);
+ qdma_writel(fsl_qdma, FSL_QDMA_CQIER_MEIE |
+ FSL_QDMA_CQIER_TEIE,
+ block + FSL_QDMA_CQIER);
+
+ /* Initialize the status queue mode. */
+ reg = FSL_QDMA_BSQMR_EN;
+ reg |= FSL_QDMA_BSQMR_CQ_SIZE(ilog2
+ (fsl_qdma->status[j]->n_cq) - 6);
+
+ qdma_writel(fsl_qdma, reg, block + FSL_QDMA_BSQMR);
+ reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR);
+ }
+
+ /* Initialize controller interrupt register. */
+ qdma_writel(fsl_qdma, FSL_QDMA_DEDR_CLEAR, status + FSL_QDMA_DEDR);
+ qdma_writel(fsl_qdma, FSL_QDMA_DEIER_CLEAR, status + FSL_QDMA_DEIER);
+
+ reg = qdma_readl(fsl_qdma, ctrl + FSL_QDMA_DMR);
+ reg &= ~FSL_QDMA_DMR_DQD;
+ qdma_writel(fsl_qdma, reg, ctrl + FSL_QDMA_DMR);
+
+ return 0;
+}
+
+static struct dma_async_tx_descriptor *
+fsl_qdma_prep_memcpy(struct dma_chan *chan, dma_addr_t dst,
+ dma_addr_t src, size_t len, unsigned long flags)
+{
+ struct fsl_qdma_comp *fsl_comp;
+ struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
+
+ fsl_comp = fsl_qdma_request_enqueue_desc(fsl_chan);
+
+ if (!fsl_comp)
+ return NULL;
+
+ fsl_qdma_comp_fill_memcpy(fsl_comp, dst, src, len);
+
+ return vchan_tx_prep(&fsl_chan->vchan, &fsl_comp->vdesc, flags);
+}
+
+static void fsl_qdma_enqueue_desc(struct fsl_qdma_chan *fsl_chan)
+{
+ u32 reg;
+ struct virt_dma_desc *vdesc;
+ struct fsl_qdma_comp *fsl_comp;
+ struct fsl_qdma_queue *fsl_queue = fsl_chan->queue;
+ void __iomem *block = fsl_queue->block_base;
+
+ reg = qdma_readl(fsl_chan->qdma, block + FSL_QDMA_BCQSR(fsl_queue->id));
+ if (reg & (FSL_QDMA_BCQSR_QF | FSL_QDMA_BCQSR_XOFF))
+ return;
+ vdesc = vchan_next_desc(&fsl_chan->vchan);
+ if (!vdesc)
+ return;
+ list_del(&vdesc->node);
+ fsl_comp = to_fsl_qdma_comp(vdesc);
+
+ memcpy(fsl_queue->virt_head++,
+ fsl_comp->virt_addr, sizeof(struct fsl_qdma_format));
+ if (fsl_queue->virt_head == fsl_queue->cq + fsl_queue->n_cq)
+ fsl_queue->virt_head = fsl_queue->cq;
+
+ list_add_tail(&fsl_comp->list, &fsl_queue->comp_used);
+ barrier();
+ reg = qdma_readl(fsl_chan->qdma, block + FSL_QDMA_BCQMR(fsl_queue->id));
+ reg |= FSL_QDMA_BCQMR_EI;
+ qdma_writel(fsl_chan->qdma, reg, block + FSL_QDMA_BCQMR(fsl_queue->id));
+ fsl_chan->status = DMA_IN_PROGRESS;
+}
+
+static void fsl_qdma_free_desc(struct virt_dma_desc *vdesc)
+{
+ unsigned long flags;
+ struct fsl_qdma_comp *fsl_comp;
+ struct fsl_qdma_queue *fsl_queue;
+
+ fsl_comp = to_fsl_qdma_comp(vdesc);
+ fsl_queue = fsl_comp->qchan->queue;
+
+ spin_lock_irqsave(&fsl_queue->queue_lock, flags);
+ list_add_tail(&fsl_comp->list, &fsl_queue->comp_free);
+ spin_unlock_irqrestore(&fsl_queue->queue_lock, flags);
+}
+
+static void fsl_qdma_issue_pending(struct dma_chan *chan)
+{
+ unsigned long flags;
+ struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
+ struct fsl_qdma_queue *fsl_queue = fsl_chan->queue;
+
+ spin_lock_irqsave(&fsl_queue->queue_lock, flags);
+ spin_lock(&fsl_chan->vchan.lock);
+ if (vchan_issue_pending(&fsl_chan->vchan))
+ fsl_qdma_enqueue_desc(fsl_chan);
+ spin_unlock(&fsl_chan->vchan.lock);
+ spin_unlock_irqrestore(&fsl_queue->queue_lock, flags);
+}
+
+static void fsl_qdma_synchronize(struct dma_chan *chan)
+{
+ struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
+
+ vchan_synchronize(&fsl_chan->vchan);
+}
+
+static int fsl_qdma_terminate_all(struct dma_chan *chan)
+{
+ LIST_HEAD(head);
+ unsigned long flags;
+ struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
+
+ spin_lock_irqsave(&fsl_chan->vchan.lock, flags);
+ vchan_get_all_descriptors(&fsl_chan->vchan, &head);
+ spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);
+ vchan_dma_desc_free_list(&fsl_chan->vchan, &head);
+ return 0;
+}
+
+static int fsl_qdma_alloc_chan_resources(struct dma_chan *chan)
+{
+ int ret;
+ struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
+ struct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma;
+ struct fsl_qdma_queue *fsl_queue = fsl_chan->queue;
+
+ if (fsl_queue->comp_pool && fsl_queue->desc_pool)
+ return fsl_qdma->desc_allocated;
+
+ INIT_LIST_HEAD(&fsl_queue->comp_free);
+
+ /*
+ * The dma pool for queue command buffer
+ */
+ fsl_queue->comp_pool =
+ dma_pool_create("comp_pool",
+ chan->device->dev,
+ FSL_QDMA_COMMAND_BUFFER_SIZE,
+ 64, 0);
+ if (!fsl_queue->comp_pool)
+ return -ENOMEM;
+
+ /*
+ * The dma pool for Descriptor(SD/DD) buffer
+ */
+ fsl_queue->desc_pool =
+ dma_pool_create("desc_pool",
+ chan->device->dev,
+ FSL_QDMA_DESCRIPTOR_BUFFER_SIZE,
+ 32, 0);
+ if (!fsl_queue->desc_pool)
+ goto err_desc_pool;
+
+ ret = fsl_qdma_pre_request_enqueue_desc(fsl_queue);
+ if (ret) {
+ dev_err(chan->device->dev,
+ "failed to alloc dma buffer for S/G descriptor\n");
+ goto err_mem;
+ }
+
+ fsl_qdma->desc_allocated++;
+ return fsl_qdma->desc_allocated;
+
+err_mem:
+ dma_pool_destroy(fsl_queue->desc_pool);
+err_desc_pool:
+ dma_pool_destroy(fsl_queue->comp_pool);
+ return -ENOMEM;
+}
+
+static int fsl_qdma_probe(struct platform_device *pdev)
+{
+ int ret, i;
+ int blk_num, blk_off;
+ u32 len, chans, queues;
+ struct resource *res;
+ struct fsl_qdma_chan *fsl_chan;
+ struct fsl_qdma_engine *fsl_qdma;
+ struct device_node *np = pdev->dev.of_node;
+
+ ret = of_property_read_u32(np, "dma-channels", &chans);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get dma-channels.\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(np, "block-offset", &blk_off);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get block-offset.\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(np, "block-number", &blk_num);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get block-number.\n");
+ return ret;
+ }
+
+ blk_num = min_t(int, blk_num, num_online_cpus());
+
+ len = sizeof(*fsl_qdma);
+ fsl_qdma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
+ if (!fsl_qdma)
+ return -ENOMEM;
+
+ len = sizeof(*fsl_chan) * chans;
+ fsl_qdma->chans = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
+ if (!fsl_qdma->chans)
+ return -ENOMEM;
+
+ len = sizeof(struct fsl_qdma_queue *) * blk_num;
+ fsl_qdma->status = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
+ if (!fsl_qdma->status)
+ return -ENOMEM;
+
+ len = sizeof(int) * blk_num;
+ fsl_qdma->queue_irq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
+ if (!fsl_qdma->queue_irq)
+ return -ENOMEM;
+
+ ret = of_property_read_u32(np, "fsl,dma-queues", &queues);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't get queues.\n");
+ return ret;
+ }
+
+ fsl_qdma->desc_allocated = 0;
+ fsl_qdma->n_chans = chans;
+ fsl_qdma->n_queues = queues;
+ fsl_qdma->block_number = blk_num;
+ fsl_qdma->block_offset = blk_off;
+
+ mutex_init(&fsl_qdma->fsl_qdma_mutex);
+
+ for (i = 0; i < fsl_qdma->block_number; i++) {
+ fsl_qdma->status[i] = fsl_qdma_prep_status_queue(pdev);
+ if (!fsl_qdma->status[i])
+ return -ENOMEM;
+ }
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ fsl_qdma->ctrl_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(fsl_qdma->ctrl_base))
+ return PTR_ERR(fsl_qdma->ctrl_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ fsl_qdma->status_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(fsl_qdma->status_base))
+ return PTR_ERR(fsl_qdma->status_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ fsl_qdma->block_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(fsl_qdma->block_base))
+ return PTR_ERR(fsl_qdma->block_base);
+ fsl_qdma->queue = fsl_qdma_alloc_queue_resources(pdev, fsl_qdma);
+ if (!fsl_qdma->queue)
+ return -ENOMEM;
+
+ ret = fsl_qdma_irq_init(pdev, fsl_qdma);
+ if (ret)
+ return ret;
+
+ fsl_qdma->irq_base = platform_get_irq_byname(pdev, "qdma-queue0");
+ fsl_qdma->feature = of_property_read_bool(np, "big-endian");
+ INIT_LIST_HEAD(&fsl_qdma->dma_dev.channels);
+
+ for (i = 0; i < fsl_qdma->n_chans; i++) {
+ struct fsl_qdma_chan *fsl_chan = &fsl_qdma->chans[i];
+
+ fsl_chan->qdma = fsl_qdma;
+ fsl_chan->queue = fsl_qdma->queue + i % (fsl_qdma->n_queues *
+ fsl_qdma->block_number);
+ fsl_chan->vchan.desc_free = fsl_qdma_free_desc;
+ vchan_init(&fsl_chan->vchan, &fsl_qdma->dma_dev);
+ }
+
+ dma_cap_set(DMA_MEMCPY, fsl_qdma->dma_dev.cap_mask);
+
+ fsl_qdma->dma_dev.dev = &pdev->dev;
+ fsl_qdma->dma_dev.device_free_chan_resources =
+ fsl_qdma_free_chan_resources;
+ fsl_qdma->dma_dev.device_alloc_chan_resources =
+ fsl_qdma_alloc_chan_resources;
+ fsl_qdma->dma_dev.device_tx_status = dma_cookie_status;
+ fsl_qdma->dma_dev.device_prep_dma_memcpy = fsl_qdma_prep_memcpy;
+ fsl_qdma->dma_dev.device_issue_pending = fsl_qdma_issue_pending;
+ fsl_qdma->dma_dev.device_synchronize = fsl_qdma_synchronize;
+ fsl_qdma->dma_dev.device_terminate_all = fsl_qdma_terminate_all;
+
+ dma_set_mask(&pdev->dev, DMA_BIT_MASK(40));
+
+ platform_set_drvdata(pdev, fsl_qdma);
+
+ ret = dma_async_device_register(&fsl_qdma->dma_dev);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "Can't register NXP Layerscape qDMA engine.\n");
+ return ret;
+ }
+
+ ret = fsl_qdma_reg_init(fsl_qdma);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't Initialize the qDMA engine.\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void fsl_qdma_cleanup_vchan(struct dma_device *dmadev)
+{
+ struct fsl_qdma_chan *chan, *_chan;
+
+ list_for_each_entry_safe(chan, _chan,
+ &dmadev->channels, vchan.chan.device_node) {
+ list_del(&chan->vchan.chan.device_node);
+ tasklet_kill(&chan->vchan.task);
+ }
+}
+
+static int fsl_qdma_remove(struct platform_device *pdev)
+{
+ int i;
+ struct fsl_qdma_queue *status;
+ struct device_node *np = pdev->dev.of_node;
+ struct fsl_qdma_engine *fsl_qdma = platform_get_drvdata(pdev);
+
+ fsl_qdma_irq_exit(pdev, fsl_qdma);
+ fsl_qdma_cleanup_vchan(&fsl_qdma->dma_dev);
+ of_dma_controller_free(np);
+ dma_async_device_unregister(&fsl_qdma->dma_dev);
+
+ for (i = 0; i < fsl_qdma->block_number; i++) {
+ status = fsl_qdma->status[i];
+ dma_free_coherent(&pdev->dev, sizeof(struct fsl_qdma_format) *
+ status->n_cq, status->cq, status->bus_addr);
+ }
+ return 0;
+}
+
+static const struct of_device_id fsl_qdma_dt_ids[] = {
+ { .compatible = "fsl,ls1021a-qdma", },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, fsl_qdma_dt_ids);
+
+static struct platform_driver fsl_qdma_driver = {
+ .driver = {
+ .name = "fsl-qdma",
+ .of_match_table = fsl_qdma_dt_ids,
+ },
+ .probe = fsl_qdma_probe,
+ .remove = fsl_qdma_remove,
+};
+
+module_platform_driver(fsl_qdma_driver);
+
+MODULE_ALIAS("platform:fsl-qdma");
+MODULE_DESCRIPTION("NXP Layerscape qDMA engine driver");
--
1.7.1
^ permalink raw reply related
* [v9 4/7] arm: dts: ls1021a: add qdma device tree nodes
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, linux-arm-kernel
In-Reply-To: <20181017055957.542-1-peng.ma@nxp.com>
add the qDMA device tree nodes for LS1021A devices.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
change in v9:
- add interrupts for each virtual block
- add block-number
- add block-offset
arch/arm/boot/dts/ls1021a.dtsi | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index f184905..0b910e7 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -806,5 +806,25 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x10010000 0x10000>;
};
+
+ qdma: dma-controller@8390000 {
+ compatible = "fsl,ls1021a-qdma";
+ reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8389000 0x0 0x1000>, /* Status regs */
+ <0x0 0x838a000 0x0 0x2000>; /* Block regs */
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error",
+ "qdma-queue0", "qdma-queue1";
+ dma-channels = <8>;
+ block-number = <1>;
+ block-offset = <0x1000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
};
};
--
1.7.1
^ permalink raw reply related
* [v9 2/7] dmaengine: fsldma: Adding macro FSL_DMA_IN/OUT implement for ARM platform
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, linux-arm-kernel
In-Reply-To: <20181017055957.542-1-peng.ma@nxp.com>
This patch add the macro FSL_DMA_IN/OUT implement for ARM platform.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
change in v9:
- rewrite function fsl_ioread64 and fsl_ioread64be to make a better read
drivers/dma/fsldma.h | 59 +++++++++++++++++++++++++++++++++----------------
1 files changed, 40 insertions(+), 19 deletions(-)
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index 982845b..f635bc1 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -196,39 +196,60 @@ struct fsldma_chan {
#define to_fsl_desc(lh) container_of(lh, struct fsl_desc_sw, node)
#define tx_to_fsl_desc(tx) container_of(tx, struct fsl_desc_sw, async_tx)
+#ifdef CONFIG_PPC
+#define fsl_ioread32(p) in_le32(p)
+#define fsl_ioread32be(p) in_be32(p)
+#define fsl_iowrite32(v, p) out_le32(p, v)
+#define fsl_iowrite32be(v, p) out_be32(p, v)
+
#ifndef __powerpc64__
-static u64 in_be64(const u64 __iomem *addr)
+static u64 fsl_ioread64(const u64 __iomem *addr)
{
- return ((u64)in_be32((u32 __iomem *)addr) << 32) |
- (in_be32((u32 __iomem *)addr + 1));
+ u32 fsl_addr = lower_32_bits(addr);
+
+ return in_le32(fsl_addr) | in_le32(fsl_addr + 1) << 32;
}
-static void out_be64(u64 __iomem *addr, u64 val)
+static void fsl_iowrite64(u64 val, u64 __iomem *addr)
{
- out_be32((u32 __iomem *)addr, val >> 32);
- out_be32((u32 __iomem *)addr + 1, (u32)val);
+ out_le32((u32 __iomem *)addr + 1, val >> 32);
+ out_le32((u32 __iomem *)addr, (u32)val);
}
-/* There is no asm instructions for 64 bits reverse loads and stores */
-static u64 in_le64(const u64 __iomem *addr)
+static u64 fsl_ioread64be(const u64 __iomem *addr)
{
- return ((u64)in_le32((u32 __iomem *)addr + 1) << 32) |
- (in_le32((u32 __iomem *)addr));
+ u32 fsl_addr = lower_32_bits(addr);
+
+ return in_be32(fsl_addr + 1) | in_be32(fsl_addr) << 32;
}
-static void out_le64(u64 __iomem *addr, u64 val)
+static void fsl_iowrite64be(u64 val, u64 __iomem *addr)
{
- out_le32((u32 __iomem *)addr + 1, val >> 32);
- out_le32((u32 __iomem *)addr, (u32)val);
+ out_be32((u32 __iomem *)addr, val >> 32);
+ out_be32((u32 __iomem *)addr + 1, (u32)val);
}
#endif
+#endif
-#define FSL_DMA_IN(fsl_chan, addr, width) \
- (((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \
- in_be##width(addr) : in_le##width(addr))
-#define FSL_DMA_OUT(fsl_chan, addr, val, width) \
- (((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \
- out_be##width(addr, val) : out_le##width(addr, val))
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM)
+#define fsl_ioread32(p) ioread32(p)
+#define fsl_ioread32be(p) ioread32be(p)
+#define fsl_iowrite32(v, p) iowrite32(v, p)
+#define fsl_iowrite32be(v, p) iowrite32be(v, p)
+#define fsl_ioread64(p) ioread64(p)
+#define fsl_ioread64be(p) ioread64be(p)
+#define fsl_iowrite64(v, p) iowrite64(v, p)
+#define fsl_iowrite64be(v, p) iowrite64be(v, p)
+#endif
+
+#define FSL_DMA_IN(fsl_dma, addr, width) \
+ (((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ? \
+ fsl_ioread##width##be(addr) : fsl_ioread##width(addr))
+
+#define FSL_DMA_OUT(fsl_dma, addr, val, width) \
+ (((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ? \
+ fsl_iowrite##width##be(val, addr) : fsl_iowrite \
+ ##width(val, addr))
#define DMA_TO_CPU(fsl_chan, d, width) \
(((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \
--
1.7.1
^ permalink raw reply related
* [v9 1/7] dmaengine: fsldma: Replace DMA_IN/OUT by FSL_DMA_IN/OUT
From: Peng Ma @ 2018-10-17 5:59 UTC (permalink / raw)
To: vkoul
Cc: mark.rutland, devicetree, Wen He, linuxppc-dev, Peng Ma,
linux-kernel, leoyang.li, zw, robh+dt, dmaengine, dan.j.williams,
shawnguo, linux-arm-kernel
From: Wen He <wen.he_1@nxp.com>
This patch implement a standard macro call functions is
used to NXP dma drivers.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
change in v9:
- no
drivers/dma/fsldma.c | 16 ++++++++--------
drivers/dma/fsldma.h | 4 ++--
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 1117b51..39871e0 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -53,42 +53,42 @@
static void set_sr(struct fsldma_chan *chan, u32 val)
{
- DMA_OUT(chan, &chan->regs->sr, val, 32);
+ FSL_DMA_OUT(chan, &chan->regs->sr, val, 32);
}
static u32 get_sr(struct fsldma_chan *chan)
{
- return DMA_IN(chan, &chan->regs->sr, 32);
+ return FSL_DMA_IN(chan, &chan->regs->sr, 32);
}
static void set_mr(struct fsldma_chan *chan, u32 val)
{
- DMA_OUT(chan, &chan->regs->mr, val, 32);
+ FSL_DMA_OUT(chan, &chan->regs->mr, val, 32);
}
static u32 get_mr(struct fsldma_chan *chan)
{
- return DMA_IN(chan, &chan->regs->mr, 32);
+ return FSL_DMA_IN(chan, &chan->regs->mr, 32);
}
static void set_cdar(struct fsldma_chan *chan, dma_addr_t addr)
{
- DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64);
+ FSL_DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64);
}
static dma_addr_t get_cdar(struct fsldma_chan *chan)
{
- return DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN;
+ return FSL_DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN;
}
static void set_bcr(struct fsldma_chan *chan, u32 val)
{
- DMA_OUT(chan, &chan->regs->bcr, val, 32);
+ FSL_DMA_OUT(chan, &chan->regs->bcr, val, 32);
}
static u32 get_bcr(struct fsldma_chan *chan)
{
- return DMA_IN(chan, &chan->regs->bcr, 32);
+ return FSL_DMA_IN(chan, &chan->regs->bcr, 32);
}
/*
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index 4787d48..982845b 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -223,10 +223,10 @@ static void out_le64(u64 __iomem *addr, u64 val)
}
#endif
-#define DMA_IN(fsl_chan, addr, width) \
+#define FSL_DMA_IN(fsl_chan, addr, width) \
(((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \
in_be##width(addr) : in_le##width(addr))
-#define DMA_OUT(fsl_chan, addr, val, width) \
+#define FSL_DMA_OUT(fsl_chan, addr, val, width) \
(((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \
out_be##width(addr, val) : out_le##width(addr, val))
--
1.7.1
^ permalink raw reply related
* Re: Crash on FSL Book3E due to pte_pgprot()? (was Re: [PATCH v3 12/24] powerpc/mm: use pte helpers in generic code)
From: Christophe Leroy @ 2018-10-17 6:00 UTC (permalink / raw)
To: Michael Ellerman, Bartlomiej Zolnierkiewicz,
Benjamin Herrenschmidt, Dominik Brodowski, Geoff Levand,
Jens Axboe, Kumar Gala, Li Yang, Nicholas Piggin, Paul Mackerras,
Scott Wood, aneesh.kumar
Cc: linux-fbdev, linux-kernel, dri-devel, linux-block, linuxppc-dev,
linux-arm-kernel
In-Reply-To: <87va61jsma.fsf@concordia.ellerman.id.au>
On 10/17/2018 12:59 AM, Michael Ellerman wrote:
> Christophe Leroy <christophe.leroy@c-s.fr> writes:
>
>> Get rid of platform specific _PAGE_XXXX in powerpc common code and
>> use helpers instead.
>>
>> mm/dump_linuxpagetables.c will be handled separately
>>
>> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>> ---
>> arch/powerpc/include/asm/book3s/32/pgtable.h | 9 +++------
>> arch/powerpc/include/asm/nohash/32/pgtable.h | 12 ++++++++----
>> arch/powerpc/include/asm/nohash/pgtable.h | 3 +--
>> arch/powerpc/mm/pgtable.c | 21 +++++++--------------
>> arch/powerpc/mm/pgtable_32.c | 15 ++++++++-------
>> arch/powerpc/mm/pgtable_64.c | 14 +++++++-------
>> arch/powerpc/xmon/xmon.c | 12 +++++++-----
>> 7 files changed, 41 insertions(+), 45 deletions(-)
>
> So turns out this patch *also* breaks my p5020ds :)
>
> Even with patch 4 merged, see next.
>
> It's the same crash:
>
> pcieport 2000:00:00.0: AER enabled with IRQ 480
> Unable to handle kernel paging request for data at address 0x8000080080080000
> Faulting instruction address: 0xc0000000000192cc
> Oops: Kernel access of bad area, sig: 11 [#1]
> BE SMP NR_CPUS=24 CoreNet Generic
> Modules linked in:
> CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.0-rc3-gcc7x-g98c847323b3a #1
> NIP: c0000000000192cc LR: c0000000005d0f9c CTR: 0000000000100000
> REGS: c0000000f31bb400 TRAP: 0300 Not tainted (4.19.0-rc3-gcc7x-g98c847323b3a)
> MSR: 0000000080029000 <CE,EE,ME> CR: 24000224 XER: 00000000
> DEAR: 8000080080080000 ESR: 0000000000800000 IRQMASK: 0
> GPR00: c0000000005d0f84 c0000000f31bb688 c00000000117dc00 8000080080080000
> GPR04: 0000000000000000 0000000000400000 00000ffbff241010 c0000000f31b8000
> GPR08: 0000000000000000 0000000000100000 0000000000000000 c0000000012d4710
> GPR12: 0000000084000422 c0000000012ff000 c000000000002774 0000000000000000
> GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> GPR24: 0000000000000000 0000000000000000 8000080080080000 c0000000ffff89a8
> GPR28: c0000000f3576400 c0000000f3576410 0000000000400000 c0000000012ecc98
> NIP [c0000000000192cc] ._memset_io+0x6c/0x9c
> LR [c0000000005d0f9c] .fsl_qman_probe+0x198/0x928
> Call Trace:
> [c0000000f31bb688] [c0000000005d0f84] .fsl_qman_probe+0x180/0x928 (unreliable)
> [c0000000f31bb728] [c0000000006432ec] .platform_drv_probe+0x60/0xb4
> [c0000000f31bb7a8] [c00000000064083c] .really_probe+0x294/0x35c
> [c0000000f31bb848] [c000000000640d2c] .__driver_attach+0x148/0x14c
> [c0000000f31bb8d8] [c00000000063d7dc] .bus_for_each_dev+0xb0/0x118
> [c0000000f31bb988] [c00000000063ff28] .driver_attach+0x34/0x4c
> [c0000000f31bba08] [c00000000063f648] .bus_add_driver+0x174/0x2bc
> [c0000000f31bbaa8] [c0000000006418bc] .driver_register+0x90/0x180
> [c0000000f31bbb28] [c000000000643270] .__platform_driver_register+0x60/0x7c
> [c0000000f31bbba8] [c000000000ee2a70] .fsl_qman_driver_init+0x24/0x38
> [c0000000f31bbc18] [c0000000000023fc] .do_one_initcall+0x64/0x2b8
> [c0000000f31bbcf8] [c000000000e9f480] .kernel_init_freeable+0x3a8/0x494
> [c0000000f31bbda8] [c000000000002798] .kernel_init+0x24/0x148
> [c0000000f31bbe28] [c0000000000009e8] .ret_from_kernel_thread+0x58/0x70
> Instruction dump:
> 4e800020 2ba50003 40dd003c 3925fffc 5488402e 7929f082 7d082378 39290001
> 550a801e 7d2903a6 7d4a4378 794a0020 <91430000> 38630004 4200fff8 70a50003
>
>
> Comparing a working vs broken kernel, it seems to boil down to the fact
> that we're filtering out more PTE bits now that we use pte_pgprot() in
> ioremap_prot().
>
> With the old code we get:
> ioremap_prot: addr 0xff800000 flags 0x241215
> ioremap_prot: addr 0xff800000 flags 0x241215
> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241215
>
>
> And now we get:
> ioremap_prot: addr 0xff800000 flags 0x241215 pte 0x241215
> ioremap_prot: addr 0xff800000 pte 0x241215
> ioremap_prot: addr 0xff800000 prot 0x241014
> map_kernel_page: ea 0x8000080080080000 pa 0xff800000 pte 0xff800241014
>
> So we're losing 0x201, which for nohash book3e is:
>
> #define _PAGE_PRESENT 0x000001 /* software: pte contains a translation */
> #define _PAGE_PSIZE_4K 0x000200
>
>
> I haven't worked out if it's one or both of those that matter.
At least missing _PAGE_PRESENT is an issue I believe.
>
> The question is what's the right way to fix it? Should pte_pgprot() not
> be filtering those bits out on book3e?
I think we should not use pte_pggrot() for that then. What about the
below fix ?
Christophe
From: Christophe Leroy <christophe.leroy@c-s.fr>
Date: Wed, 17 Oct 2018 05:56:25 +0000
Subject: [PATCH] powerpc/mm: don't use pte_pgprot() in ioremap_prot()
pte_pgprot() filters out some required flags like _PAGE_PRESENT.
This patch replaces pte_pgprot() by __pgprot(pte_val())
in ioremap_prot()
Fixes: 26973fa5ac0e ("powerpc/mm: use pte helpers in generic code")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/mm/pgtable_32.c | 3 ++-
arch/powerpc/mm/pgtable_64.c | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 5877f5aa8f5d..a606e2f4937b 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -122,7 +122,8 @@ ioremap_prot(phys_addr_t addr, unsigned long size,
unsigned long flags)
pte = pte_exprotect(pte);
pte = pte_mkprivileged(pte);
- return __ioremap_caller(addr, size, pte_pgprot(pte),
__builtin_return_address(0));
+ return __ioremap_caller(addr, size, __pgprot(pte_val(pte)),
+ __builtin_return_address(0));
}
EXPORT_SYMBOL(ioremap_prot);
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index fb1375c07e8c..836bf436cabb 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -245,8 +245,8 @@ void __iomem * ioremap_prot(phys_addr_t addr,
unsigned long size,
pte = pte_mkprivileged(pte);
if (ppc_md.ioremap)
- return ppc_md.ioremap(addr, size, pte_pgprot(pte), caller);
- return __ioremap_caller(addr, size, pte_pgprot(pte), caller);
+ return ppc_md.ioremap(addr, size, __pgprot(pte_val(pte)), caller);
+ return __ioremap_caller(addr, size, __pgprot(pte_val(pte)), caller);
}
--
2.13.3
^ permalink raw reply related
* Re: [PATCH kernel 3/4] powerpc/mm/iommu: Make mm_iommu_new() fail on existing regions
From: David Gibson @ 2018-10-17 4:45 UTC (permalink / raw)
To: Alexey Kardashevskiy; +Cc: Alex Williamson, linuxppc-dev, kvm-ppc
In-Reply-To: <39886bd3-5122-de68-f167-e010a1d12c33@ozlabs.ru>
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On Wed, Oct 17, 2018 at 02:34:32PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 17/10/2018 12:00, David Gibson wrote:
> > On Mon, Oct 15, 2018 at 08:24:15PM +1100, Alexey Kardashevskiy wrote:
> >> Since we are going to have 2 different preregistering helpers, let's
> >> make it clear that mm_iommu_new() is only for the normal (i.e. not device)
> >> memory and for existing areas mm_iommu_get() should be used instead.
> >>
> >> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> >
> > I think the idea is sensible. However (and, yes, this is really an
> > existing bug) - shouldn't we check for a request to add anything
> > overlapping with an existing region, not just one that exactly
> > matches?
>
> The overlap check is below the changed hunk:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/mm/mmu_context_iommu.c#n150
Ah, right.
In that case can't you just drop this whole if. I don't see that
there's any use in giving different error codes for "tried to register
exactly a region you registered before" and "tried to register a
region overlapping one you registered before.
>
>
> >
> >> ---
> >> arch/powerpc/mm/mmu_context_iommu.c | 3 +--
> >> 1 file changed, 1 insertion(+), 2 deletions(-)
> >>
> >> diff --git a/arch/powerpc/mm/mmu_context_iommu.c b/arch/powerpc/mm/mmu_context_iommu.c
> >> index a8c4a3c..839dbce 100644
> >> --- a/arch/powerpc/mm/mmu_context_iommu.c
> >> +++ b/arch/powerpc/mm/mmu_context_iommu.c
> >> @@ -141,8 +141,7 @@ long mm_iommu_new(struct mm_struct *mm, unsigned long ua, unsigned long entries,
> >> list_for_each_entry_rcu(mem, &mm->context.iommu_group_mem_list,
> >> next) {
> >> if ((mem->ua == ua) && (mem->entries == entries)) {
> >> - ++mem->used;
> >> - *pmem = mem;
> >> + ret = -EBUSY;
> >> goto unlock_exit;
> >> }
> >>
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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