* [PATCH RFT V2 6/8] powerpc/512x: mark clocks as big endian
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190415101046.5872-1-jonas.gorski@gmail.com>
These clocks' registers are accessed as big endian, so mark them as
such.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V1 -> V2:
* switch from global to local flags
arch/powerpc/platforms/512x/clock-commonclk.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index b3097fe6441b..0072330350fa 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -240,7 +240,8 @@ static inline struct clk *mpc512x_clk_divider(
u32 __iomem *reg, u8 pos, u8 len, int divflags)
{
return clk_register_divider(NULL, name, parent_name, clkflags,
- reg, pos, len, divflags, &clklock);
+ reg, pos, len,
+ divflags | CLK_DIVIDER_BIG_ENDIAN, &clklock);
}
static inline struct clk *mpc512x_clk_divtable(
@@ -250,7 +251,7 @@ static inline struct clk *mpc512x_clk_divtable(
{
u8 divflags;
- divflags = 0;
+ divflags = CLK_DIVIDER_BIG_ENDIAN;
return clk_register_divider_table(NULL, name, parent_name, 0,
reg, pos, len, divflags,
divtab, &clklock);
@@ -261,10 +262,12 @@ static inline struct clk *mpc512x_clk_gated(
u32 __iomem *reg, u8 pos)
{
int clkflags;
+ u8 gateflags;
clkflags = CLK_SET_RATE_PARENT;
+ gateflags = CLK_GATE_BIG_ENDIAN;
return clk_register_gate(NULL, name, parent_name, clkflags,
- reg, pos, 0, &clklock);
+ reg, pos, gateflags, &clklock);
}
static inline struct clk *mpc512x_clk_muxed(const char *name,
@@ -275,7 +278,7 @@ static inline struct clk *mpc512x_clk_muxed(const char *name,
u8 muxflags;
clkflags = CLK_SET_RATE_PARENT;
- muxflags = 0;
+ muxflags = CLK_MUX_BIG_ENDIAN;
return clk_register_mux(NULL, name,
parent_names, parent_count, clkflags,
reg, pos, len, muxflags, &clklock);
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V2 5/8] clk: mux: add explicit big endian support
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190415101046.5872-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian mux clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-mux.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 2ad2df2e8909..47f6f4f55f08 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -23,6 +23,22 @@
* parent - parent is adjustable through clk_set_parent
*/
+static inline u32 clk_mux_readl(struct clk_mux *mux)
+{
+ if (mux->flags & CLK_MUX_BIG_ENDIAN)
+ return ioread32be(mux->reg);
+ else
+ return clk_readl(mux->reg);
+}
+
+static inline void clk_mux_writel(struct clk_mux *mux, u32 val)
+{
+ if (mux->flags & CLK_MUX_BIG_ENDIAN)
+ iowrite32be(val, mux->reg);
+ else
+ clk_writel(val, mux->reg);
+}
+
int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
unsigned int val)
{
@@ -73,7 +89,7 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
struct clk_mux *mux = to_clk_mux(hw);
u32 val;
- val = clk_readl(mux->reg) >> mux->shift;
+ val = clk_mux_readl(mux) >> mux->shift;
val &= mux->mask;
return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
@@ -94,12 +110,12 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
if (mux->flags & CLK_MUX_HIWORD_MASK) {
reg = mux->mask << (mux->shift + 16);
} else {
- reg = clk_readl(mux->reg);
+ reg = clk_mux_readl(mux);
reg &= ~(mux->mask << mux->shift);
}
val = val << mux->shift;
reg |= val;
- clk_writel(reg, mux->reg);
+ clk_mux_writel(mux, reg);
if (mux->lock)
spin_unlock_irqrestore(mux->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 9df78e3fb62b..f82cda41e1a8 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -510,6 +510,9 @@ void clk_hw_unregister_divider(struct clk_hw *hw);
* .get_parent clk_op.
* CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired
* frequency.
+ * CLK_MUX_BIG_ENDIAN - By default little endian register accesses are used for
+ * the mux register. Setting this flag makes the register accesses big
+ * endian.
*/
struct clk_mux {
struct clk_hw hw;
@@ -528,6 +531,7 @@ struct clk_mux {
#define CLK_MUX_HIWORD_MASK BIT(2)
#define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */
#define CLK_MUX_ROUND_CLOSEST BIT(4)
+#define CLK_MUX_BIG_ENDIAN BIT(5)
extern const struct clk_ops clk_mux_ops;
extern const struct clk_ops clk_mux_ro_ops;
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V2 4/8] clk: multiplier: add explicit big endian support
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190415101046.5872-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian multiplier clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V1 -> V2:
* newly added patch
drivers/clk/clk-multiplier.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-multiplier.c b/drivers/clk/clk-multiplier.c
index 3c86f859c199..fb032f7dd407 100644
--- a/drivers/clk/clk-multiplier.c
+++ b/drivers/clk/clk-multiplier.c
@@ -11,6 +11,22 @@
#include <linux/of.h>
#include <linux/slab.h>
+static inline u32 clk_mult_readl(struct clk_multiplier *mult)
+{
+ if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN)
+ return ioread32be(mult->reg);
+ else
+ return clk_readl(mult->reg);
+}
+
+static inline void clk_mult_writel(struct clk_multiplier *mult, u32 val)
+{
+ if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN)
+ iowrite32be(val, mult->reg);
+ else
+ clk_writel(val, mult->reg);
+}
+
static unsigned long __get_mult(struct clk_multiplier *mult,
unsigned long rate,
unsigned long parent_rate)
@@ -27,7 +43,7 @@ static unsigned long clk_multiplier_recalc_rate(struct clk_hw *hw,
struct clk_multiplier *mult = to_clk_multiplier(hw);
unsigned long val;
- val = clk_readl(mult->reg) >> mult->shift;
+ val = clk_mult_readl(mult) >> mult->shift;
val &= GENMASK(mult->width - 1, 0);
if (!val && mult->flags & CLK_MULTIPLIER_ZERO_BYPASS)
@@ -118,10 +134,10 @@ static int clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate,
else
__acquire(mult->lock);
- val = clk_readl(mult->reg);
+ val = clk_mult_readl(mult);
val &= ~GENMASK(mult->width + mult->shift - 1, mult->shift);
val |= factor << mult->shift;
- clk_writel(val, mult->reg);
+ clk_mult_writel(mult, val);
if (mult->lock)
spin_unlock_irqrestore(mult->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8576c2dbc639..9df78e3fb62b 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -667,6 +667,9 @@ void clk_hw_unregister_fractional_divider(struct clk_hw *hw);
* leaving the parent rate unmodified.
* CLK_MULTIPLIER_ROUND_CLOSEST - Makes the best calculated divider to be
* rounded to the closest integer instead of the down one.
+ * CLK_MULTIPLIER_BIG_ENDIAN - By default little endian register accesses are
+ * used for the multiplier register. Setting this flag makes the register
+ * accesses big endian.
*/
struct clk_multiplier {
struct clk_hw hw;
@@ -681,6 +684,7 @@ struct clk_multiplier {
#define CLK_MULTIPLIER_ZERO_BYPASS BIT(0)
#define CLK_MULTIPLIER_ROUND_CLOSEST BIT(1)
+#define CLK_MULTIPLIER_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_multiplier_ops;
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V2 3/8] clk: gate: add explicit big endian support
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190415101046.5872-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian gated clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-gate.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index f05823cd9b21..521e112ef5b5 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -23,6 +23,22 @@
* parent - fixed parent. No clk_set_parent support
*/
+static inline u32 clk_gate_readl(struct clk_gate *gate)
+{
+ if (gate->flags & CLK_GATE_BIG_ENDIAN)
+ return ioread32be(gate->reg);
+ else
+ return clk_readl(gate->reg);
+}
+
+static inline void clk_gate_writel(struct clk_gate *gate, u32 val)
+{
+ if (gate->flags & CLK_GATE_BIG_ENDIAN)
+ iowrite32be(val, gate->reg);
+ else
+ clk_writel(val, gate->reg);
+}
+
/*
* It works on following logic:
*
@@ -55,7 +71,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
if (set)
reg |= BIT(gate->bit_idx);
} else {
- reg = clk_readl(gate->reg);
+ reg = clk_gate_readl(gate);
if (set)
reg |= BIT(gate->bit_idx);
@@ -63,7 +79,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
reg &= ~BIT(gate->bit_idx);
}
- clk_writel(reg, gate->reg);
+ clk_gate_writel(gate, reg);
if (gate->lock)
spin_unlock_irqrestore(gate->lock, flags);
@@ -88,7 +104,7 @@ int clk_gate_is_enabled(struct clk_hw *hw)
u32 reg;
struct clk_gate *gate = to_clk_gate(hw);
- reg = clk_readl(gate->reg);
+ reg = clk_gate_readl(gate);
/* if a set bit disables this clk, flip it before masking */
if (gate->flags & CLK_GATE_SET_TO_DISABLE)
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8c07d810acf5..8576c2dbc639 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -348,6 +348,9 @@ void of_fixed_clk_setup(struct device_node *np);
* of this register, and mask of gate bits are in higher 16-bit of this
* register. While setting the gate bits, higher 16-bit should also be
* updated to indicate changing gate bits.
+ * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are used for
+ * the gate register. Setting this flag makes the register accesses big
+ * endian.
*/
struct clk_gate {
struct clk_hw hw;
@@ -361,6 +364,7 @@ struct clk_gate {
#define CLK_GATE_SET_TO_DISABLE BIT(0)
#define CLK_GATE_HIWORD_MASK BIT(1)
+#define CLK_GATE_BIG_ENDIAN BIT(2)
extern const struct clk_ops clk_gate_ops;
struct clk *clk_register_gate(struct device *dev, const char *name,
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V2 2/8] clk: fractional-divider: add explicit big endian support
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190415101046.5872-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian fractional divider clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V1 -> V2:
* newly added patch
drivers/clk/clk-fractional-divider.c | 22 +++++++++++++++++++---
include/linux/clk-provider.h | 4 ++++
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index fdfe2e423d15..b9988d3b3828 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -13,6 +13,22 @@
#include <linux/slab.h>
#include <linux/rational.h>
+static inline u32 clk_fd_readl(struct clk_fractional_divider *fd)
+{
+ if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
+ return ioread32be(fd->reg);
+ else
+ return clk_readl(fd->reg);
+}
+
+static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val)
+{
+ if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
+ iowrite32be(val, fd->reg);
+ else
+ clk_writel(val, fd->reg);
+}
+
static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -27,7 +43,7 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw,
else
__acquire(fd->lock);
- val = clk_readl(fd->reg);
+ val = clk_fd_readl(fd);
if (fd->lock)
spin_unlock_irqrestore(fd->lock, flags);
@@ -115,10 +131,10 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
else
__acquire(fd->lock);
- val = clk_readl(fd->reg);
+ val = clk_fd_readl(fd);
val &= ~(fd->mmask | fd->nmask);
val |= (m << fd->mshift) | (n << fd->nshift);
- clk_writel(val, fd->reg);
+ clk_fd_writel(fd, val);
if (fd->lock)
spin_unlock_irqrestore(fd->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 7117b8cc0c0c..8c07d810acf5 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -607,6 +607,9 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw);
* is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED
* is set then the numerator and denominator are both the value read
* plus one.
+ * CLK_FRAC_DIVIDER_BIG_ENDIAN - By default little endian register accesses are
+ * used for the divider register. Setting this flag makes the register
+ * accesses big endian.
*/
struct clk_fractional_divider {
struct clk_hw hw;
@@ -627,6 +630,7 @@ struct clk_fractional_divider {
#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)
#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0)
+#define CLK_FRAC_DIVIDER_BIG_ENDIAN BIT(1)
extern const struct clk_ops clk_fractional_divider_ops;
struct clk *clk_register_fractional_divider(struct device *dev,
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V2 1/8] clk: divider: add explicit big endian support
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
In-Reply-To: <20190415101046.5872-1-jonas.gorski@gmail.com>
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian divider clocks.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
V1 -> V2:
* switch from global to local flag
drivers/clk/clk-divider.c | 26 ++++++++++++++++++++++----
include/linux/clk-provider.h | 4 ++++
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index e5a17265cfaf..ff791a7a5e9e 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -25,6 +25,24 @@
* parent - fixed parent. No clk_set_parent support
*/
+static inline u32 clk_div_readl(struct clk_divider *divider)
+{
+ if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
+ return ioread32be(divider->reg);
+ else
+ return clk_readl(divider->reg);
+}
+
+static inline void clk_div_writel(struct clk_divider *divider, u32 val)
+{
+ if (divider->flags & CLK_DIVIDER_BIG_ENDIAN)
+ iowrite32be(val, divider->reg);
+ else
+ clk_writel(val, divider->reg);
+}
+
+#define div_mask(width) ((1 << (width)) - 1)
+
static unsigned int _get_table_maxdiv(const struct clk_div_table *table,
u8 width)
{
@@ -135,7 +153,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
struct clk_divider *divider = to_clk_divider(hw);
unsigned int val;
- val = clk_readl(divider->reg) >> divider->shift;
+ val = clk_div_readl(divider) >> divider->shift;
val &= clk_div_mask(divider->width);
return divider_recalc_rate(hw, parent_rate, val, divider->table,
@@ -370,7 +388,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
if (divider->flags & CLK_DIVIDER_READ_ONLY) {
u32 val;
- val = clk_readl(divider->reg) >> divider->shift;
+ val = clk_div_readl(divider->reg) >> divider->shift;
val &= clk_div_mask(divider->width);
return divider_ro_round_rate(hw, rate, prate, divider->table,
@@ -420,11 +438,11 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
val = clk_div_mask(divider->width) << (divider->shift + 16);
} else {
- val = clk_readl(divider->reg);
+ val = clk_div_readl(divider->reg);
val &= ~(clk_div_mask(divider->width) << divider->shift);
}
val |= (u32)value << divider->shift;
- clk_writel(val, divider->reg);
+ clk_div_writel(divider, val);
if (divider->lock)
spin_unlock_irqrestore(divider->lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index db21437c77e2..7117b8cc0c0c 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -416,6 +416,9 @@ struct clk_div_table {
* CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED
* except when the value read from the register is zero, the divisor is
* 2^width of the field.
+ * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used
+ * for the divider register. Setting this flag makes the register accesses
+ * big endian.
*/
struct clk_divider {
struct clk_hw hw;
@@ -437,6 +440,7 @@ struct clk_divider {
#define CLK_DIVIDER_ROUND_CLOSEST BIT(4)
#define CLK_DIVIDER_READ_ONLY BIT(5)
#define CLK_DIVIDER_MAX_AT_ZERO BIT(6)
+#define CLK_DIVIDER_BIG_ENDIAN BIT(7)
extern const struct clk_ops clk_divider_ops;
extern const struct clk_ops clk_divider_ro_ops;
--
2.13.2
^ permalink raw reply related
* [PATCH RFT V2 0/8] clk: make register endianness a run-time property
From: Jonas Gorski @ 2019-04-15 10:10 UTC (permalink / raw)
To: linux-clk, linuxppc-dev, linux-arm-kernel, linux-rockchip,
linux-tegra
Cc: Peter De Schrijver, Fabio Estevam, Heiko Stuebner, Stephen Boyd,
Michael Turquette, Michal Simek, Jonathan Hunter,
Prashant Gaikwad, Paul Mackerras, NXP Linux Team,
Pengutronix Kernel Team, Thierry Reding, Anatolij Gustschin,
Shawn Guo, Sascha Hauer
Currently the endianness for register accesses of basic clocks if fixed
based on the architecture (BE for PowerPC, LE for everyone else). This
is inconvenient for architectures that support both.
To avoid adding more rules to the #ifdef, this patchset adds new flags
to the basic clocks to tag the registers as BE then converts the only
big endian machine PowerPC to use it.
While not used by PowerPC, also add big endian support to clk-fractional-
divider and clk-multiplier, to cover all basic clocks.
Technically clk-multiplier isn't one as it doesn't provide any
registration functions and none of its users set the basic clock flag,
but nevertheless it and its flags are defined clk-provider.h. So I think
it's close enough to a basic clock to still count.
That way we can drop the special casing for PowerPC, and allow other big
endian platforms/drivers to make use of the basic clocks.
In addition, we can now drop clk_readl and clk_writel, and replace them
with normal readl and writel accessors everywhere.
Still RFT because I don't have a PowerPC device to test, and especially
not a 512x one. I did compile test it though!
I looked really hard, and this is the only place I could find where a
PowerPC platform (indirectly) used the clk accessors.
None of the regular drivers in clk/ were selected in any of the powerpc
defconfigs, and this was the only platform code that registered basic
clocks.
Changelog:
V1 -> V2:
* switch from global flag to per-clock flag
* also added fractional divider and multiplier clocks, to make all
basic or quasi basic clocks support big endian
* reordered the basic clock patches in alphabetical order
* drop clk_{readl,writel} instead of adding BE variants and use
common accessors directly
* dropped the RFC, as I got comments (yay). More always welcome of
course :-)
Jonas Gorski (8):
clk: divider: add explicit big endian support
clk: fractional-divider: add explicit big endian support
clk: gate: add explicit big endian support
clk: multiplier: add explicit big endian support
clk: mux: add explicit big endian support
powerpc/512x: mark clocks as big endian
clk: core: remove powerpc special handling
clk: core: replace clk_{readl,writel} with {readl,writel}
arch/powerpc/platforms/512x/clock-commonclk.c | 11 +++---
drivers/clk/clk-divider.c | 26 +++++++++++---
drivers/clk/clk-fractional-divider.c | 22 ++++++++++--
drivers/clk/clk-gate.c | 22 ++++++++++--
drivers/clk/clk-multiplier.c | 22 ++++++++++--
drivers/clk/clk-mux.c | 22 ++++++++++--
drivers/clk/clk-xgene.c | 6 ++--
drivers/clk/hisilicon/clk-hisi-phase.c | 4 +--
drivers/clk/imx/clk-divider-gate.c | 20 +++++------
drivers/clk/imx/clk-sccg-pll.c | 12 +++----
drivers/clk/nxp/clk-lpc18xx-ccu.c | 6 ++--
drivers/clk/nxp/clk-lpc18xx-cgu.c | 24 ++++++-------
drivers/clk/rockchip/clk-ddr.c | 2 +-
drivers/clk/rockchip/clk-half-divider.c | 6 ++--
drivers/clk/tegra/clk-tegra124.c | 4 +--
drivers/clk/tegra/clk-tegra210.c | 6 ++--
drivers/clk/zynq/clkc.c | 6 ++--
drivers/clk/zynq/pll.c | 18 +++++-----
include/linux/clk-provider.h | 51 +++++++++++----------------
19 files changed, 182 insertions(+), 108 deletions(-)
--
2.13.2
^ permalink raw reply
* Re: [RFC PATCH] powerpc/64/ftrace: mprofile-kernel patch out mflr
From: Naveen N. Rao @ 2019-04-15 9:42 UTC (permalink / raw)
To: linuxppc-dev, Nicholas Piggin
In-Reply-To: <20190413015940.31170-1-npiggin@gmail.com>
Hi Nick,
Nicholas Piggin wrote:
> The new mprofile-kernel mcount sequence is
>
> mflr r0
> bl _mcount
>
> Dynamic ftrace patches the branch instruction with a noop, but leaves
> the mflr. mflr is executed by the branch unit that can only execute one
> per cycle on POWER9 and shared with branches, so it would be nice to
> avoid it where possible.
>
> This patch is a hacky proof of concept to nop out the mflr. Can we do
> this or are there races or other issues with it?
Thanks for implementing this. I don't see a problem with this.
- Naveen
^ permalink raw reply
* Applied "ASoC: fsl_audmix: cache pdev->dev pointer" to the asoc tree
From: Mark Brown @ 2019-04-15 8:53 UTC (permalink / raw)
To: Viorel Suman
Cc: Mark Rutland, devicetree, alsa-devel, Timur Tabi, Xiubo Li,
linux-kernel, Sascha Hauer, linuxppc-dev, Liam Girdwood,
Rob Herring, Jaroslav Kysela, Nicolin Chen, Julia Lawall,
Mark Brown, dl-linux-imx, Pengutronix Kernel Team, Viorel Suman,
Shawn Guo, Takashi Iwai, Fabio Estevam, linux-arm-kernel
In-Reply-To: <1554894380-25153-5-git-send-email-viorel.suman@nxp.com>
The patch
ASoC: fsl_audmix: cache pdev->dev pointer
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From ecf6715042cf0f738763fe34d1636b707961a58a Mon Sep 17 00:00:00 2001
From: Viorel Suman <viorel.suman@nxp.com>
Date: Wed, 10 Apr 2019 11:06:39 +0000
Subject: [PATCH] ASoC: fsl_audmix: cache pdev->dev pointer
There should be no trouble to understand dev = pdev->dev.
This can save some space to have more print info or save
some wrapped lines.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Suggested-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/fsl/fsl_audmix.c | 27 +++++++++++++--------------
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/sound/soc/fsl/fsl_audmix.c b/sound/soc/fsl/fsl_audmix.c
index dc802d5c4ccd..3897a54a11fe 100644
--- a/sound/soc/fsl/fsl_audmix.c
+++ b/sound/soc/fsl/fsl_audmix.c
@@ -456,6 +456,7 @@ MODULE_DEVICE_TABLE(of, fsl_audmix_ids);
static int fsl_audmix_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
struct fsl_audmix *priv;
struct resource *res;
const char *mdrv;
@@ -463,52 +464,50 @@ static int fsl_audmix_probe(struct platform_device *pdev)
void __iomem *regs;
int ret;
- of_id = of_match_device(fsl_audmix_ids, &pdev->dev);
+ of_id = of_match_device(fsl_audmix_ids, dev);
if (!of_id || !of_id->data)
return -EINVAL;
mdrv = of_id->data;
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
/* Get the addresses */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- regs = devm_ioremap_resource(&pdev->dev, res);
+ regs = devm_ioremap_resource(dev, res);
if (IS_ERR(regs))
return PTR_ERR(regs);
- priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "ipg", regs,
+ priv->regmap = devm_regmap_init_mmio_clk(dev, "ipg", regs,
&fsl_audmix_regmap_config);
if (IS_ERR(priv->regmap)) {
- dev_err(&pdev->dev, "failed to init regmap\n");
+ dev_err(dev, "failed to init regmap\n");
return PTR_ERR(priv->regmap);
}
- priv->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
+ priv->ipg_clk = devm_clk_get(dev, "ipg");
if (IS_ERR(priv->ipg_clk)) {
- dev_err(&pdev->dev, "failed to get ipg clock\n");
+ dev_err(dev, "failed to get ipg clock\n");
return PTR_ERR(priv->ipg_clk);
}
platform_set_drvdata(pdev, priv);
- pm_runtime_enable(&pdev->dev);
+ pm_runtime_enable(dev);
- ret = devm_snd_soc_register_component(&pdev->dev, &fsl_audmix_component,
+ ret = devm_snd_soc_register_component(dev, &fsl_audmix_component,
fsl_audmix_dai,
ARRAY_SIZE(fsl_audmix_dai));
if (ret) {
- dev_err(&pdev->dev, "failed to register ASoC DAI\n");
+ dev_err(dev, "failed to register ASoC DAI\n");
return ret;
}
- priv->pdev = platform_device_register_data(&pdev->dev, mdrv, 0, NULL,
- 0);
+ priv->pdev = platform_device_register_data(dev, mdrv, 0, NULL, 0);
if (IS_ERR(priv->pdev)) {
ret = PTR_ERR(priv->pdev);
- dev_err(&pdev->dev, "failed to register platform %s: %d\n",
- mdrv, ret);
+ dev_err(dev, "failed to register platform %s: %d\n", mdrv, ret);
}
return ret;
--
2.20.1
^ permalink raw reply related
* Applied "ASoC: mpc5200_psc_i2s: Fix invalid license ID" to the asoc tree
From: Mark Brown @ 2019-04-15 8:53 UTC (permalink / raw)
To: Andra Danciu
Cc: alsa-devel, linux-kernel, timur, Xiubo.Lee, Daniel Baluta,
s.hauer, linuxppc-dev, daniel.baluta, lgirdwood, nicoleotsuka,
Mark Brown, linux-imx, kernel, tiwai, shawnguo, Thomas Gleixner,
perex, festevam, linux-arm-kernel
In-Reply-To: <20190414191450.18377-3-andradanciu1997@gmail.com>
The patch
ASoC: mpc5200_psc_i2s: Fix invalid license ID
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From 93741a77a901d1a4b1861c6dbf5607fdf5d36cbc Mon Sep 17 00:00:00 2001
From: Andra Danciu <andradanciu1997@gmail.com>
Date: Sun, 14 Apr 2019 22:14:50 +0300
Subject: [PATCH] ASoC: mpc5200_psc_i2s: Fix invalid license ID
As the file had no other license notice/reference, it falls under the
project license and therefore the proper SPDX id is: GPL-2.0-only
Cc: Daniel Baluta <daniel.baluta@nxp.com>
Fixes: 864a8472c4412 ("ASoC: mpc5200_psc_i2s: Switch to SPDX identifier")
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/fsl/mpc5200_psc_i2s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/fsl/mpc5200_psc_i2s.c b/sound/soc/fsl/mpc5200_psc_i2s.c
index 6de97461ba25..9bc01f374b39 100644
--- a/sound/soc/fsl/mpc5200_psc_i2s.c
+++ b/sound/soc/fsl/mpc5200_psc_i2s.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL
+// SPDX-License-Identifier: GPL-2.0-only
//
// Freescale MPC5200 PSC in I2S mode
// ALSA SoC Digital Audio Interface (DAI) driver
--
2.20.1
^ permalink raw reply related
* Applied "ASoC: mpc5200_dma: Fix invalid license ID" to the asoc tree
From: Mark Brown @ 2019-04-15 8:53 UTC (permalink / raw)
To: Andra Danciu
Cc: alsa-devel, linux-kernel, timur, Xiubo.Lee, Daniel Baluta,
s.hauer, linuxppc-dev, daniel.baluta, lgirdwood, nicoleotsuka,
Mark Brown, linux-imx, kernel, tiwai, shawnguo, Thomas Gleixner,
perex, festevam, linux-arm-kernel
In-Reply-To: <20190414191450.18377-2-andradanciu1997@gmail.com>
The patch
ASoC: mpc5200_dma: Fix invalid license ID
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From 8981d195355ecf898c8bacabba8ce9c178534b43 Mon Sep 17 00:00:00 2001
From: Andra Danciu <andradanciu1997@gmail.com>
Date: Sun, 14 Apr 2019 22:14:49 +0300
Subject: [PATCH] ASoC: mpc5200_dma: Fix invalid license ID
As the file had no other license notice/reference, it falls under the
project license and therefore the proper SPDX id is: GPL-2.0-only
Cc: Daniel Baluta <daniel.baluta@nxp.com>
Fixes: 1edfc2485d8dc ("ASoC: mpc5200_dma: Switch to SPDX identifier")
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/fsl/mpc5200_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
index 4396442c2fdd..ccf9301889fe 100644
--- a/sound/soc/fsl/mpc5200_dma.c
+++ b/sound/soc/fsl/mpc5200_dma.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL
+// SPDX-License-Identifier: GPL-2.0-only
//
// Freescale MPC5200 PSC DMA
// ALSA SoC Platform driver
--
2.20.1
^ permalink raw reply related
* Re: [PATCH 1/2] ASoC: mpc5200_dma: Fix invalid license ID
From: Thomas Gleixner @ 2019-04-15 7:33 UTC (permalink / raw)
To: Daniel Baluta
Cc: Andra Danciu, linuxppc-dev, linux-kernel, Timur Tabi, Xiubo Li,
Shawn Guo, Sascha Hauer, Takashi Iwai, Liam Girdwood,
Jaroslav Kysela, Nicolin Chen, Mark Brown, NXP Linux Team,
Sascha Hauer, Linux-ALSA, Fabio Estevam,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAEnQRZAP6EWXkwfuR+83trtYrpDaRjA6zp-k5sp33bo5jUEjPg@mail.gmail.com>
On Mon, 15 Apr 2019, Daniel Baluta wrote:
> On Mon, Apr 15, 2019 at 10:26 AM Daniel Baluta <daniel.baluta@gmail.com> wrote:
> > On Mon, Apr 15, 2019 at 12:53 AM Fabio Estevam <festevam@gmail.com> wrote:
> > > On Sun, Apr 14, 2019 at 4:15 PM Andra Danciu <andradanciu1997@gmail.com> wrote:
> > > > -// SPDX-License-Identifier: GPL
> > > > +// SPDX-License-Identifier: GPL-2.0-only
> > >
> > > According to Documentation/process/license-rules.rst this should be:
> > >
> > > // SPDX-License-Identifier: GPL-2.0
> >
>
> Actually, according to
>
> https://spdx.org/licenses/GPL-2.0-only.html
>
> GPL-2.0 is another name for GPL-2.0-only
See also: LICENSES/preferred/GPL-2.0
Valid-License-Identifier: GPL-2.0
Valid-License-Identifier: GPL-2.0-only
If the identifier would be invalid, scripts/spdxcheck.py would complain ...
Thanks,
tglx
^ permalink raw reply
* Re: [PATCH 1/2] ASoC: mpc5200_dma: Fix invalid license ID
From: Daniel Baluta @ 2019-04-15 7:29 UTC (permalink / raw)
To: Fabio Estevam
Cc: Andra Danciu, linux-kernel, Timur Tabi, Xiubo Li, linuxppc-dev,
Sascha Hauer, Takashi Iwai, Liam Girdwood, Jaroslav Kysela,
Nicolin Chen, Mark Brown, NXP Linux Team, Sascha Hauer,
Thomas Gleixner, Linux-ALSA, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAEnQRZBD_M8Pp4RWXY4TS5MHAEBnkwUOyR16ttAitX-L+Z88Ew@mail.gmail.com>
On Mon, Apr 15, 2019 at 10:26 AM Daniel Baluta <daniel.baluta@gmail.com> wrote:
>
> On Mon, Apr 15, 2019 at 12:53 AM Fabio Estevam <festevam@gmail.com> wrote:
> >
> > On Sun, Apr 14, 2019 at 4:15 PM Andra Danciu <andradanciu1997@gmail.com> wrote:
> > >
> > > As the file had no other license notice/reference, it falls under the
> > > project license and therefore the proper SPDX id is: GPL-2.0-only
> > >
> > > Cc: Daniel Baluta <daniel.baluta@nxp.com>
> > > Fixes: 1edfc2485d8dc ("ASoC: mpc5200_dma: Switch to SPDX identifier")
> > > Reported-by: Thomas Gleixner <tglx@linutronix.de>
> > > Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
> > > ---
> > > sound/soc/fsl/mpc5200_dma.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
> > > index 4396442c2fdd..ccf9301889fe 100644
> > > --- a/sound/soc/fsl/mpc5200_dma.c
> > > +++ b/sound/soc/fsl/mpc5200_dma.c
> > > @@ -1,4 +1,4 @@
> > > -// SPDX-License-Identifier: GPL
> > > +// SPDX-License-Identifier: GPL-2.0-only
> >
> > According to Documentation/process/license-rules.rst this should be:
> >
> > // SPDX-License-Identifier: GPL-2.0
>
Actually, according to
https://spdx.org/licenses/GPL-2.0-only.html
GPL-2.0 is another name for GPL-2.0-only
^ permalink raw reply
* Re: [PATCH 1/2] ASoC: mpc5200_dma: Fix invalid license ID
From: Daniel Baluta @ 2019-04-15 7:26 UTC (permalink / raw)
To: Fabio Estevam
Cc: Andra Danciu, linux-kernel, Timur Tabi, Xiubo Li, linuxppc-dev,
Sascha Hauer, Takashi Iwai, Liam Girdwood, Jaroslav Kysela,
Nicolin Chen, Mark Brown, NXP Linux Team, Sascha Hauer,
Thomas Gleixner, Linux-ALSA, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAOMZO5C_esXni-N-U+hDXNG6Z5rJLC6ZrgKEseCW7mcK=aiyQw@mail.gmail.com>
On Mon, Apr 15, 2019 at 12:53 AM Fabio Estevam <festevam@gmail.com> wrote:
>
> On Sun, Apr 14, 2019 at 4:15 PM Andra Danciu <andradanciu1997@gmail.com> wrote:
> >
> > As the file had no other license notice/reference, it falls under the
> > project license and therefore the proper SPDX id is: GPL-2.0-only
> >
> > Cc: Daniel Baluta <daniel.baluta@nxp.com>
> > Fixes: 1edfc2485d8dc ("ASoC: mpc5200_dma: Switch to SPDX identifier")
> > Reported-by: Thomas Gleixner <tglx@linutronix.de>
> > Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
> > ---
> > sound/soc/fsl/mpc5200_dma.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
> > index 4396442c2fdd..ccf9301889fe 100644
> > --- a/sound/soc/fsl/mpc5200_dma.c
> > +++ b/sound/soc/fsl/mpc5200_dma.c
> > @@ -1,4 +1,4 @@
> > -// SPDX-License-Identifier: GPL
> > +// SPDX-License-Identifier: GPL-2.0-only
>
> According to Documentation/process/license-rules.rst this should be:
>
> // SPDX-License-Identifier: GPL-2.0
Actually
^ permalink raw reply
* Re: [PATCH 1/2] ASoC: mpc5200_dma: Fix invalid license ID
From: Thomas Gleixner @ 2019-04-15 7:23 UTC (permalink / raw)
To: Fabio Estevam
Cc: Daniel Baluta, Andra Danciu, linux-kernel, Timur Tabi, Xiubo Li,
linuxppc-dev, Sascha Hauer, Takashi Iwai, Liam Girdwood,
Jaroslav Kysela, Nicolin Chen, Mark Brown, NXP Linux Team,
Sascha Hauer, Linux-ALSA, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAOMZO5C_esXni-N-U+hDXNG6Z5rJLC6ZrgKEseCW7mcK=aiyQw@mail.gmail.com>
On Sun, 14 Apr 2019, Fabio Estevam wrote:
> On Sun, Apr 14, 2019 at 4:15 PM Andra Danciu <andradanciu1997@gmail.com> wrote:
> >
> > As the file had no other license notice/reference, it falls under the
> > project license and therefore the proper SPDX id is: GPL-2.0-only
> >
> > Cc: Daniel Baluta <daniel.baluta@nxp.com>
> > Fixes: 1edfc2485d8dc ("ASoC: mpc5200_dma: Switch to SPDX identifier")
> > Reported-by: Thomas Gleixner <tglx@linutronix.de>
> > Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
> > ---
> > sound/soc/fsl/mpc5200_dma.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
> > index 4396442c2fdd..ccf9301889fe 100644
> > --- a/sound/soc/fsl/mpc5200_dma.c
> > +++ b/sound/soc/fsl/mpc5200_dma.c
> > @@ -1,4 +1,4 @@
> > -// SPDX-License-Identifier: GPL
> > +// SPDX-License-Identifier: GPL-2.0-only
>
> According to Documentation/process/license-rules.rst this should be:
>
> // SPDX-License-Identifier: GPL-2.0
Both are valid.
^ permalink raw reply
* Re: [RFC PATCH 2/3] crypto: nx - don't abuse shash MAY_SLEEP flag
From: Michael Ellerman @ 2019-04-15 5:12 UTC (permalink / raw)
To: Eric Biggers, linux-crypto; +Cc: linuxppc-dev
In-Reply-To: <20190415003709.1531-3-ebiggers@kernel.org>
Eric Biggers <ebiggers@kernel.org> writes:
> From: Eric Biggers <ebiggers@google.com>
>
> The nx driver uses the MAY_SLEEP flag in shash_desc::flags as an
> indicator to not retry sending the operation to the hardware as many
> times before returning -EBUSY. This is bogus because (1) that's not
> what the MAY_SLEEP flag is for, and (2) the shash API doesn't allow
> failing if the hardware is busy anyway.
Can you elaborate a bit on that 2nd point? What is the driver meant to
do if the hardware is busy or out to lunch? Retry forever?
> For now, just make it always retry the larger number of times. This
> doesn't actually fix this driver, but it at least makes it not use the
> shash_desc::flags field anymore. Then this field can be removed, as no
> other drivers use it.
This looks fine to me, thanks for fixing it up.
cheers
^ permalink raw reply
* [PATCH] powerpc/powernv: Remove ifdef
From: Oliver O'Halloran @ 2019-04-15 5:11 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Oliver O'Halloran
The PowerNV platform depends on CONFIG_PPC64 so this #ifdef in the middle
of platforms/powernv/pci.c really doesn't need to be there.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
---
arch/powerpc/platforms/powernv/pci.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index d235c2c..a5b2c7b 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -1039,7 +1039,6 @@ int pnv_pci_set_tunnel_bar(struct pci_dev *dev, u64 addr, int enable)
}
EXPORT_SYMBOL_GPL(pnv_pci_set_tunnel_bar);
-#ifdef CONFIG_PPC64 /* for thread.tidr */
int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
u32 *tid)
{
@@ -1060,7 +1059,6 @@ int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, u32 *pid,
return 0;
}
EXPORT_SYMBOL_GPL(pnv_pci_get_as_notify_info);
-#endif
void pnv_pci_shutdown(void)
{
--
2.9.4
^ permalink raw reply related
* Re: [PATCH 0/8]
From: Sam Bobroff @ 2019-04-15 3:41 UTC (permalink / raw)
To: Tyrel Datwyler; +Cc: linuxppc-dev
In-Reply-To: <b0406238-9480-3423-20ef-27c29c31b313@linux.vnet.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 6202 bytes --]
On Thu, Apr 11, 2019 at 05:55:33PM -0700, Tyrel Datwyler wrote:
> On 03/19/2019 07:58 PM, Sam Bobroff wrote:
> > Hi all,
> >
> > This patch set adds support for EEH recovery of hot plugged devices on pSeries
> > machines. Specifically, devices discovered by PCI rescanning using
> > /sys/bus/pci/rescan, which includes devices hotplugged by QEMU's device_add
> > command. (pSeries doesn't currently use slot power control for hotplugging.)
>
> Slight nit that its not that pSeries doesn't support slot power control
> hotplugging, its that QEMU pSeries guests don't support it. We most definitely
> use the slot power control for hotplugging in PowerVM pSeries Linux guests. More
Ah, I think I see what you mean: pSeries can (and does!) use slot power
control for hotplugging, it's just that Linux doesn't. Right :-) I'll
change it to "Linux on pSeries doesn't...." for the next version.
> specifically we had to work around short comings in the rpaphp driver when
> dealing with QEMU. This being that while at initial glance the design implies
> that it had multiple devices per PHB in mind, it didn't, and only actually
> supported a single slot per PHB. Further, when we developed the QEMU pci hotplug
> feature we had to deal with only having a single PHB per QEMU guest and as a
> result needed a way to plug multiple pci devices into a single PHB. Hence, came
> the pci rescan work around in drmgr.
>
> Mike Roth and I have had discussions over the years to get the slot power
> control hotplugging working properly with QEMU, and while I did get the RPA
> hotplug driver fixed to register all available slots associated with a PHB, EEH
> remained an issue. So, I'm very happy to see this patchset get that working with
> the rescan work around.
>
> >
> > As a side effect this also provides EEH support for devices removed by
> > /sys/bus/pci/devices/*/remove and re-discovered by writing to /sys/bus/pci/rescan,
> > on all platforms.
>
> +1, this seems like icing on the cake. ;)
Yes :-)
Although maybe I should mention that we can't really benefit from this
on PowerNV *yet* because there seem to be some other problems with
removing and re-scanning devices: in my tests devices are often unusable
after being rediscovered.
(I'm hoping to take a look at that soon.)
> >
> > The approach I've taken is to use the fact that the existing
> > pcibios_bus_add_device() platform hooks (which are used to set up EEH on
> > Virtual Function devices (VFs)) are actually called for all devices, so I've
> > widened their scope and made other adjustments necessary to allow them to work
> > for hotplugged and boot-time devices as well.
> >
> > Because some of the changes are in generic PowerPC code, it's
> > possible that I've disturbed something for another PowerPC platform. I've tried
> > to minimize this by leaving that code alone as much as possible and so there
> > are a few cases where eeh_add_device_{early,late}() or eeh_add_sysfs_files() is
> > called more than once. I think these can be looked at later, as duplicate calls
> > are not harmful.
> >
> > The patch "Convert PNV_PHB_FLAG_EEH" isn't strictly necessary and I'm not sure
> > if it's better to keep it, because it simplifies the code or drop it, because
> > we may need a separate flag per PHB later on. Thoughts anyone?
> >
> > The first patch is a rework of the pcibios_init reordering patch I posted
> > earlier, which I've included here because it's necessary for this set.
> >
> > I have done some testing for PowerNV on Power9 using a modified pnv_php module
> > and some testing on pSeries with slot power control using a modified rpaphp
> > module, and the EEH-related parts seem to work.
>
> I'm interested in what modifications with rpaphp. Its unclear if you are saying
> rpaphp modified so that slot power hotplug works with a QEMU pSeries guest? If
> thats the case it would be optimal to get that upstream and remove the work
> rescan workaround for guests that don't need it.
Unfortunately no, I didn't do enough work to really get it working. I
just wanted to get an idea of how that code path interacted with the EEH
code I was changing, so that hopefully when we get to fixing it, the EEH
part will be easier to do.
The hack I tested with was:
- rtas_errd changed so that it doesn't pass -V to drmgr (-V seems to
trigger drmgr to use the PCI rescan system rather that slot power
control).
- of_pci_parse_addrs() changed so that if the assigned-addresses node
is missing (which it is when the guest is running under QEMU/KVM) we
call pci_setup_device() to configure the BARs.
It did look pretty good -- the EEH part may actually work fine once we get
the rest sorted out.
>
> -Tyrel
>
> >
> > Cheers,
> > Sam.
> >
> > Sam Bobroff (8):
> > powerpc/64: Adjust order in pcibios_init()
> > powerpc/eeh: Clear stale EEH_DEV_NO_HANDLER flag
> > powerpc/eeh: Convert PNV_PHB_FLAG_EEH to global flag
> > powerpc/eeh: Improve debug messages around device addition
> > powerpc/eeh: Add eeh_show_enabled()
> > powerpc/eeh: Initialize EEH address cache earlier
> > powerpc/eeh: EEH for pSeries hot plug
> > powerpc/eeh: Remove eeh_probe_devices() and eeh_addr_cache_build()
> >
> > arch/powerpc/include/asm/eeh.h | 19 +++--
> > arch/powerpc/kernel/eeh.c | 33 ++++-----
> > arch/powerpc/kernel/eeh_cache.c | 29 +-------
> > arch/powerpc/kernel/eeh_driver.c | 4 ++
> > arch/powerpc/kernel/of_platform.c | 3 +-
> > arch/powerpc/kernel/pci-common.c | 4 --
> > arch/powerpc/kernel/pci_32.c | 4 ++
> > arch/powerpc/kernel/pci_64.c | 12 +++-
> > arch/powerpc/platforms/powernv/eeh-powernv.c | 41 +++++------
> > arch/powerpc/platforms/powernv/pci.c | 7 +-
> > arch/powerpc/platforms/powernv/pci.h | 2 -
> > arch/powerpc/platforms/pseries/eeh_pseries.c | 75 +++++++++++---------
> > arch/powerpc/platforms/pseries/pci.c | 7 +-
> > 13 files changed, 122 insertions(+), 118 deletions(-)
> >
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PATCH v3] powerpc/xmon: add read-only mode
From: Oliver @ 2019-04-15 1:21 UTC (permalink / raw)
To: Christopher M. Riedl; +Cc: linuxppc-dev, Andrew Donnellan
In-Reply-To: <20190415001923.21108-1-cmr@informatik.wtf>
On Mon, Apr 15, 2019 at 10:17 AM Christopher M. Riedl
<cmr@informatik.wtf> wrote:
>
> Operations which write to memory and special purpose registers should be
> restricted on systems with integrity guarantees (such as Secure Boot)
> and, optionally, to avoid self-destructive behaviors.
>
> Add a config option, XMON_DEFAULT_RO_MODE, to set default xmon behavior.
> The kernel cmdline options xmon=ro and xmon=rw override this default.
>
> The following xmon operations are affected:
> memops:
> disable memmove
> disable memset
> disable memzcan
> memex:
> no-op'd mwrite
> super_regs:
> no-op'd write_spr
> bpt_cmds:
> disable
> proc_call:
> disable
>
> Signed-off-by: Christopher M. Riedl <cmr@informatik.wtf>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
> ---
>
> v2->v3:
> Use XMON_DEFAULT_RO_MODE to set xmon read-only mode
> Untangle read-only mode from STRICT_KERNEL_RWX and PAGE_KERNEL_ROX
> Update printed msg string for write ops in read-only mode
Making PAGE_KERNEL_ROX the default in more cases is still a good idea.
Feel free to send a follow up patch if you want to keep pulling on
that thread.
> arch/powerpc/Kconfig.debug | 8 ++++++++
> arch/powerpc/xmon/xmon.c | 42 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 50 insertions(+)
>
> diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
> index 4e00cb0a5464..8de4823dfb86 100644
> --- a/arch/powerpc/Kconfig.debug
> +++ b/arch/powerpc/Kconfig.debug
> @@ -117,6 +117,14 @@ config XMON_DISASSEMBLY
> to say Y here, unless you're building for a memory-constrained
> system.
>
> +config XMON_DEFAULT_RO_MODE
> + bool "Restrict xmon to read-only operations"
> + depends on XMON
> + default y
> + help
> + Operate xmon in read-only mode. The cmdline options 'xmon=rw' and
> + 'xmon=ro' override this default.
> +
> config DEBUGGER
> bool
> depends on KGDB || XMON
> diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
> index a0f44f992360..ce98c8049eb6 100644
> --- a/arch/powerpc/xmon/xmon.c
> +++ b/arch/powerpc/xmon/xmon.c
> @@ -80,6 +80,7 @@ static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
> #endif
> static unsigned long in_xmon __read_mostly = 0;
> static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
> +static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE);
>
> static unsigned long adrs;
> static int size = 1;
> @@ -202,6 +203,8 @@ static void dump_tlb_book3e(void);
> #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
> #endif
>
> +static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n";
> +
> static char *help_string = "\
> Commands:\n\
> b show breakpoints\n\
> @@ -989,6 +992,10 @@ cmds(struct pt_regs *excp)
> memlocate();
> break;
> case 'z':
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + break;
> + }
> memzcan();
> break;
> case 'i':
> @@ -1042,6 +1049,10 @@ cmds(struct pt_regs *excp)
> set_lpp_cmd();
> break;
> case 'b':
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + break;
> + }
> bpt_cmds();
> break;
> case 'C':
> @@ -1055,6 +1066,10 @@ cmds(struct pt_regs *excp)
> bootcmds();
> break;
> case 'p':
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + break;
> + }
> proccall();
> break;
> case 'P':
> @@ -1777,6 +1792,11 @@ read_spr(int n, unsigned long *vp)
> static void
> write_spr(int n, unsigned long val)
> {
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + return;
> + }
> +
> if (setjmp(bus_error_jmp) == 0) {
> catch_spr_faults = 1;
> sync();
> @@ -2016,6 +2036,12 @@ mwrite(unsigned long adrs, void *buf, int size)
> char *p, *q;
>
> n = 0;
> +
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + return n;
> + }
> +
> if (setjmp(bus_error_jmp) == 0) {
> catch_memory_errors = 1;
> sync();
> @@ -2884,9 +2910,17 @@ memops(int cmd)
> scanhex((void *)&mcount);
> switch( cmd ){
> case 'm':
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + break;
> + }
> memmove((void *)mdest, (void *)msrc, mcount);
> break;
> case 's':
> + if (xmon_is_ro) {
> + printf(xmon_ro_msg);
> + break;
> + }
> memset((void *)mdest, mval, mcount);
> break;
> case 'd':
> @@ -3796,6 +3830,14 @@ static int __init early_parse_xmon(char *p)
> } else if (strncmp(p, "on", 2) == 0) {
> xmon_init(1);
> xmon_on = 1;
> + } else if (strncmp(p, "rw", 2) == 0) {
> + xmon_init(1);
> + xmon_on = 1;
> + xmon_is_ro = false;
> + } else if (strncmp(p, "ro", 2) == 0) {
> + xmon_init(1);
> + xmon_on = 1;
> + xmon_is_ro = true;
> } else if (strncmp(p, "off", 3) == 0)
> xmon_on = 0;
> else
> --
> 2.21.0
>
^ permalink raw reply
* Re: [PATCH 3/3] mm: introduce ARCH_HAS_PTE_DEVMAP
From: Oliver @ 2019-04-15 0:58 UTC (permalink / raw)
To: Robin Murphy
Cc: anshuman.khandual, linuxppc-dev, ohall, x86,
Linux Kernel Mailing List, Linux MM, Jérôme Glisse,
Dan Williams, ira.weiny
In-Reply-To: <25525e4dab6ebc49e233f21f7c29821223431647.1555093412.git.robin.murphy@arm.com>
On Sat, Apr 13, 2019 at 4:57 AM Robin Murphy <robin.murphy@arm.com> wrote:
>
> ARCH_HAS_ZONE_DEVICE is somewhat meaningless in itself, and combined
> with the long-out-of-date comment can lead to the impression than an
> architecture may just enable it (since __add_pages() now "comprehends
> device memory" for itself) and expect things to work.
Good cleanup. ARCH_HAS_ZONE_DEVICE made sense at the time, but it
probably should have been renamed after the memory hotplug rework.
+cc mpe since he does the merging, and
Acked-by: Oliver O'Halloran <oohall@gmail.com>
> In practice, however, ZONE_DEVICE users have little chance of
> functioning correctly without __HAVE_ARCH_PTE_DEVMAP, so let's clean
> that up the same way as ARCH_HAS_PTE_SPECIAL and make it the proper
> dependency so the real situation is clearer.
>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> arch/powerpc/Kconfig | 2 +-
> arch/powerpc/include/asm/book3s/64/pgtable.h | 1 -
> arch/x86/Kconfig | 2 +-
> arch/x86/include/asm/pgtable.h | 4 ++--
> arch/x86/include/asm/pgtable_types.h | 1 -
> include/linux/mm.h | 4 ++--
> include/linux/pfn_t.h | 4 ++--
> mm/Kconfig | 5 ++---
> mm/gup.c | 2 +-
> 9 files changed, 11 insertions(+), 14 deletions(-)
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 5e3d0853c31d..77e1993bba80 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -135,6 +135,7 @@ config PPC
> select ARCH_HAS_MMIOWB if PPC64
> select ARCH_HAS_PHYS_TO_DMA
> select ARCH_HAS_PMEM_API if PPC64
> + select ARCH_HAS_PTE_DEVMAP if PPC_BOOK3S_64
> select ARCH_HAS_PTE_SPECIAL
> select ARCH_HAS_MEMBARRIER_CALLBACKS
> select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE && PPC64
> @@ -142,7 +143,6 @@ config PPC
> select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
> select ARCH_HAS_UACCESS_FLUSHCACHE if PPC64
> select ARCH_HAS_UBSAN_SANITIZE_ALL
> - select ARCH_HAS_ZONE_DEVICE if PPC_BOOK3S_64
> select ARCH_HAVE_NMI_SAFE_CMPXCHG
> select ARCH_MIGHT_HAVE_PC_PARPORT
> select ARCH_MIGHT_HAVE_PC_SERIO
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index 581f91be9dd4..02c22ac8f387 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -90,7 +90,6 @@
> #define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
> #define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
> #define _PAGE_DEVMAP _RPAGE_SW1 /* software: ZONE_DEVICE page */
> -#define __HAVE_ARCH_PTE_DEVMAP
>
> /*
> * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 5ad92419be19..ffd50f27f395 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -60,6 +60,7 @@ config X86
> select ARCH_HAS_KCOV if X86_64
> select ARCH_HAS_MEMBARRIER_SYNC_CORE
> select ARCH_HAS_PMEM_API if X86_64
> + select ARCH_HAS_PTE_DEVMAP if X86_64
> select ARCH_HAS_PTE_SPECIAL
> select ARCH_HAS_REFCOUNT
> select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64
> @@ -69,7 +70,6 @@ config X86
> select ARCH_HAS_STRICT_MODULE_RWX
> select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE
> select ARCH_HAS_UBSAN_SANITIZE_ALL
> - select ARCH_HAS_ZONE_DEVICE if X86_64
> select ARCH_HAVE_NMI_SAFE_CMPXCHG
> select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI
> select ARCH_MIGHT_HAVE_PC_PARPORT
> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
> index 2779ace16d23..89a1f6fd48bf 100644
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -254,7 +254,7 @@ static inline int has_transparent_hugepage(void)
> return boot_cpu_has(X86_FEATURE_PSE);
> }
>
> -#ifdef __HAVE_ARCH_PTE_DEVMAP
> +#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
> static inline int pmd_devmap(pmd_t pmd)
> {
> return !!(pmd_val(pmd) & _PAGE_DEVMAP);
> @@ -715,7 +715,7 @@ static inline int pte_present(pte_t a)
> return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
> }
>
> -#ifdef __HAVE_ARCH_PTE_DEVMAP
> +#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
> static inline int pte_devmap(pte_t a)
> {
> return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
> diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
> index d6ff0bbdb394..b5e49e6bac63 100644
> --- a/arch/x86/include/asm/pgtable_types.h
> +++ b/arch/x86/include/asm/pgtable_types.h
> @@ -103,7 +103,6 @@
> #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
> #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
> #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP)
> -#define __HAVE_ARCH_PTE_DEVMAP
> #else
> #define _PAGE_NX (_AT(pteval_t, 0))
> #define _PAGE_DEVMAP (_AT(pteval_t, 0))
> diff --git a/include/linux/mm.h b/include/linux/mm.h
> index d76dfb7ac617..fe05c94f23e9 100644
> --- a/include/linux/mm.h
> +++ b/include/linux/mm.h
> @@ -504,7 +504,7 @@ struct inode;
> #define page_private(page) ((page)->private)
> #define set_page_private(page, v) ((page)->private = (v))
>
> -#if !defined(__HAVE_ARCH_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
> +#if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
> static inline int pmd_devmap(pmd_t pmd)
> {
> return 0;
> @@ -1698,7 +1698,7 @@ static inline void sync_mm_rss(struct mm_struct *mm)
> }
> #endif
>
> -#ifndef __HAVE_ARCH_PTE_DEVMAP
> +#ifndef CONFIG_ARCH_HAS_PTE_DEVMAP
> static inline int pte_devmap(pte_t pte)
> {
> return 0;
> diff --git a/include/linux/pfn_t.h b/include/linux/pfn_t.h
> index 7bb77850c65a..de8bc66b10a4 100644
> --- a/include/linux/pfn_t.h
> +++ b/include/linux/pfn_t.h
> @@ -104,7 +104,7 @@ static inline pud_t pfn_t_pud(pfn_t pfn, pgprot_t pgprot)
> #endif
> #endif
>
> -#ifdef __HAVE_ARCH_PTE_DEVMAP
> +#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
> static inline bool pfn_t_devmap(pfn_t pfn)
> {
> const u64 flags = PFN_DEV|PFN_MAP;
> @@ -122,7 +122,7 @@ pmd_t pmd_mkdevmap(pmd_t pmd);
> defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
> pud_t pud_mkdevmap(pud_t pud);
> #endif
> -#endif /* __HAVE_ARCH_PTE_DEVMAP */
> +#endif /* CONFIG_ARCH_HAS_PTE_DEVMAP */
>
> #ifdef CONFIG_ARCH_HAS_PTE_SPECIAL
> static inline bool pfn_t_special(pfn_t pfn)
> diff --git a/mm/Kconfig b/mm/Kconfig
> index 25c71eb8a7db..fcb7ab08e294 100644
> --- a/mm/Kconfig
> +++ b/mm/Kconfig
> @@ -655,8 +655,7 @@ config IDLE_PAGE_TRACKING
> See Documentation/admin-guide/mm/idle_page_tracking.rst for
> more details.
>
> -# arch_add_memory() comprehends device memory
> -config ARCH_HAS_ZONE_DEVICE
> +config ARCH_HAS_PTE_DEVMAP
> bool
>
> config ZONE_DEVICE
> @@ -664,7 +663,7 @@ config ZONE_DEVICE
> depends on MEMORY_HOTPLUG
> depends on MEMORY_HOTREMOVE
> depends on SPARSEMEM_VMEMMAP
> - depends on ARCH_HAS_ZONE_DEVICE
> + depends on ARCH_HAS_PTE_DEVMAP
> select XARRAY_MULTI
>
> help
> diff --git a/mm/gup.c b/mm/gup.c
> index f84e22685aaa..72a5c7d1e1a7 100644
> --- a/mm/gup.c
> +++ b/mm/gup.c
> @@ -1623,7 +1623,7 @@ static int gup_pte_range(pmd_t pmd, unsigned long addr, unsigned long end,
> }
> #endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
>
> -#if defined(__HAVE_ARCH_PTE_DEVMAP) && defined(CONFIG_TRANSPARENT_HUGEPAGE)
> +#if defined(CONFIG_ARCH_HAS_PTE_DEVMAP) && defined(CONFIG_TRANSPARENT_HUGEPAGE)
> static int __gup_device_huge(unsigned long pfn, unsigned long addr,
> unsigned long end, struct page **pages, int *nr)
> {
> --
> 2.21.0.dirty
>
^ permalink raw reply
* [RFC PATCH 2/3] crypto: nx - don't abuse shash MAY_SLEEP flag
From: Eric Biggers @ 2019-04-15 0:37 UTC (permalink / raw)
To: linux-crypto; +Cc: linuxppc-dev
In-Reply-To: <20190415003709.1531-1-ebiggers@kernel.org>
From: Eric Biggers <ebiggers@google.com>
The nx driver uses the MAY_SLEEP flag in shash_desc::flags as an
indicator to not retry sending the operation to the hardware as many
times before returning -EBUSY. This is bogus because (1) that's not
what the MAY_SLEEP flag is for, and (2) the shash API doesn't allow
failing if the hardware is busy anyway.
For now, just make it always retry the larger number of times. This
doesn't actually fix this driver, but it at least makes it not use the
shash_desc::flags field anymore. Then this field can be removed, as no
other drivers use it.
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Eric Biggers <ebiggers@google.com>
---
drivers/crypto/nx/nx-aes-xcbc.c | 12 ++++--------
drivers/crypto/nx/nx-sha256.c | 6 ++----
drivers/crypto/nx/nx-sha512.c | 6 ++----
3 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/crypto/nx/nx-aes-xcbc.c b/drivers/crypto/nx/nx-aes-xcbc.c
index ad3358e74f5c4..8f5820b78a83b 100644
--- a/drivers/crypto/nx/nx-aes-xcbc.c
+++ b/drivers/crypto/nx/nx-aes-xcbc.c
@@ -105,8 +105,7 @@ static int nx_xcbc_empty(struct shash_desc *desc, u8 *out)
nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
atomic_inc(&(nx_ctx->stats->aes_ops));
@@ -134,8 +133,7 @@ static int nx_xcbc_empty(struct shash_desc *desc, u8 *out)
nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
atomic_inc(&(nx_ctx->stats->aes_ops));
@@ -279,8 +277,7 @@ static int nx_xcbc_update(struct shash_desc *desc,
goto out;
}
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
@@ -361,8 +358,7 @@ static int nx_xcbc_final(struct shash_desc *desc, u8 *out)
goto out;
}
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
diff --git a/drivers/crypto/nx/nx-sha256.c b/drivers/crypto/nx/nx-sha256.c
index a6764af83c6dc..e06f0431dee5f 100644
--- a/drivers/crypto/nx/nx-sha256.c
+++ b/drivers/crypto/nx/nx-sha256.c
@@ -162,8 +162,7 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data,
goto out;
}
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
@@ -243,8 +242,7 @@ static int nx_sha256_final(struct shash_desc *desc, u8 *out)
goto out;
}
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
diff --git a/drivers/crypto/nx/nx-sha512.c b/drivers/crypto/nx/nx-sha512.c
index 92956bc6e45ee..0293b17903d0c 100644
--- a/drivers/crypto/nx/nx-sha512.c
+++ b/drivers/crypto/nx/nx-sha512.c
@@ -166,8 +166,7 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data,
goto out;
}
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
@@ -249,8 +248,7 @@ static int nx_sha512_final(struct shash_desc *desc, u8 *out)
goto out;
}
- rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
- desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
+ rc = nx_hcall_sync(nx_ctx, &nx_ctx->op, 0);
if (rc)
goto out;
--
2.21.0
^ permalink raw reply related
* [PATCH v3] powerpc/xmon: add read-only mode
From: Christopher M. Riedl @ 2019-04-15 0:19 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Christopher M. Riedl, andrew.donnellan
Operations which write to memory and special purpose registers should be
restricted on systems with integrity guarantees (such as Secure Boot)
and, optionally, to avoid self-destructive behaviors.
Add a config option, XMON_DEFAULT_RO_MODE, to set default xmon behavior.
The kernel cmdline options xmon=ro and xmon=rw override this default.
The following xmon operations are affected:
memops:
disable memmove
disable memset
disable memzcan
memex:
no-op'd mwrite
super_regs:
no-op'd write_spr
bpt_cmds:
disable
proc_call:
disable
Signed-off-by: Christopher M. Riedl <cmr@informatik.wtf>
---
v2->v3:
Use XMON_DEFAULT_RO_MODE to set xmon read-only mode
Untangle read-only mode from STRICT_KERNEL_RWX and PAGE_KERNEL_ROX
Update printed msg string for write ops in read-only mode
arch/powerpc/Kconfig.debug | 8 ++++++++
arch/powerpc/xmon/xmon.c | 42 ++++++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 4e00cb0a5464..8de4823dfb86 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -117,6 +117,14 @@ config XMON_DISASSEMBLY
to say Y here, unless you're building for a memory-constrained
system.
+config XMON_DEFAULT_RO_MODE
+ bool "Restrict xmon to read-only operations"
+ depends on XMON
+ default y
+ help
+ Operate xmon in read-only mode. The cmdline options 'xmon=rw' and
+ 'xmon=ro' override this default.
+
config DEBUGGER
bool
depends on KGDB || XMON
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index a0f44f992360..ce98c8049eb6 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -80,6 +80,7 @@ static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
#endif
static unsigned long in_xmon __read_mostly = 0;
static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
+static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE);
static unsigned long adrs;
static int size = 1;
@@ -202,6 +203,8 @@ static void dump_tlb_book3e(void);
#define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
#endif
+static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n";
+
static char *help_string = "\
Commands:\n\
b show breakpoints\n\
@@ -989,6 +992,10 @@ cmds(struct pt_regs *excp)
memlocate();
break;
case 'z':
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ break;
+ }
memzcan();
break;
case 'i':
@@ -1042,6 +1049,10 @@ cmds(struct pt_regs *excp)
set_lpp_cmd();
break;
case 'b':
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ break;
+ }
bpt_cmds();
break;
case 'C':
@@ -1055,6 +1066,10 @@ cmds(struct pt_regs *excp)
bootcmds();
break;
case 'p':
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ break;
+ }
proccall();
break;
case 'P':
@@ -1777,6 +1792,11 @@ read_spr(int n, unsigned long *vp)
static void
write_spr(int n, unsigned long val)
{
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ return;
+ }
+
if (setjmp(bus_error_jmp) == 0) {
catch_spr_faults = 1;
sync();
@@ -2016,6 +2036,12 @@ mwrite(unsigned long adrs, void *buf, int size)
char *p, *q;
n = 0;
+
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ return n;
+ }
+
if (setjmp(bus_error_jmp) == 0) {
catch_memory_errors = 1;
sync();
@@ -2884,9 +2910,17 @@ memops(int cmd)
scanhex((void *)&mcount);
switch( cmd ){
case 'm':
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ break;
+ }
memmove((void *)mdest, (void *)msrc, mcount);
break;
case 's':
+ if (xmon_is_ro) {
+ printf(xmon_ro_msg);
+ break;
+ }
memset((void *)mdest, mval, mcount);
break;
case 'd':
@@ -3796,6 +3830,14 @@ static int __init early_parse_xmon(char *p)
} else if (strncmp(p, "on", 2) == 0) {
xmon_init(1);
xmon_on = 1;
+ } else if (strncmp(p, "rw", 2) == 0) {
+ xmon_init(1);
+ xmon_on = 1;
+ xmon_is_ro = false;
+ } else if (strncmp(p, "ro", 2) == 0) {
+ xmon_init(1);
+ xmon_on = 1;
+ xmon_is_ro = true;
} else if (strncmp(p, "off", 3) == 0)
xmon_on = 0;
else
--
2.21.0
^ permalink raw reply related
* Re: [PATCH 1/2] ASoC: mpc5200_dma: Fix invalid license ID
From: Fabio Estevam @ 2019-04-14 21:53 UTC (permalink / raw)
To: Andra Danciu
Cc: Daniel Baluta, Linux-ALSA, linux-kernel, Timur Tabi, Xiubo Li,
linuxppc-dev, Sascha Hauer, Takashi Iwai, Liam Girdwood,
Jaroslav Kysela, Nicolin Chen, Mark Brown, NXP Linux Team,
Sascha Hauer, Thomas Gleixner, Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190414191450.18377-2-andradanciu1997@gmail.com>
On Sun, Apr 14, 2019 at 4:15 PM Andra Danciu <andradanciu1997@gmail.com> wrote:
>
> As the file had no other license notice/reference, it falls under the
> project license and therefore the proper SPDX id is: GPL-2.0-only
>
> Cc: Daniel Baluta <daniel.baluta@nxp.com>
> Fixes: 1edfc2485d8dc ("ASoC: mpc5200_dma: Switch to SPDX identifier")
> Reported-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
> ---
> sound/soc/fsl/mpc5200_dma.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
> index 4396442c2fdd..ccf9301889fe 100644
> --- a/sound/soc/fsl/mpc5200_dma.c
> +++ b/sound/soc/fsl/mpc5200_dma.c
> @@ -1,4 +1,4 @@
> -// SPDX-License-Identifier: GPL
> +// SPDX-License-Identifier: GPL-2.0-only
According to Documentation/process/license-rules.rst this should be:
// SPDX-License-Identifier: GPL-2.0
^ permalink raw reply
* Re: [PATCH v2 1/2] cpuidle : auto-promotion for cpuidle states
From: Abhishek @ 2019-04-14 20:04 UTC (permalink / raw)
To: Rafael J. Wysocki
Cc: Gautham R. Shenoy, Linux PM, Daniel Lezcano, Rafael J. Wysocki,
Linux Kernel Mailing List, linuxppc-dev
In-Reply-To: <CAJZ5v0h+jyPQ=NofwV4ha6zBqk7E1gF1xE9CoBfKYfb3jBTbig@mail.gmail.com>
Hi Rafael,
Thanks for the Review. Few inline replies below.
On 04/09/2019 03:31 PM, Rafael J. Wysocki wrote:
> On Fri, Apr 5, 2019 at 11:17 AM Abhishek Goel
> <huntbag@linux.vnet.ibm.com> wrote:
>> Currently, the cpuidle governors (menu /ladder) determine what idle state
> There are three governors in 5.1-rc.
>
>> an idling CPU should enter into based on heuristics that depend on the
>> idle history on that CPU. Given that no predictive heuristic is perfect,
>> there are cases where the governor predicts a shallow idle state, hoping
>> that the CPU will be busy soon. However, if no new workload is scheduled
>> on that CPU in the near future, the CPU will end up in the shallow state.
>>
>> In case of POWER, this is problematic, when the predicted state in the
>> aforementioned scenario is a lite stop state, as such lite states will
>> inhibit SMT folding, thereby depriving the other threads in the core from
>> using the core resources.
>>
>> To address this, such lite states need to be autopromoted.
> I don't quite agree with this statement and it doesn't even match what
> the patch does AFAICS. "Autopromotion" would be going from the given
> state to a deeper one without running state selection in between, but
> that's not what's going on here.
Thinking to call it "timed-exit". Is that good?
>> The cpuidle-core can queue timer to correspond with the residency value of the next
>> available state. Thus leading to auto-promotion to a deeper idle state as
>> soon as possible.
> No, it doesn't automatically cause a deeper state to be used next
> time. It simply kicks the CPU out of the idle state and one more
> iteration of the idle loop runs on it. Whether or not a deeper state
> will be selected in that iteration depends on the governor
> computations carried out in it.
I did not mean that next state is chosen automatically. I should have been
more descriptive here instead of just using "as soon as possible"
> Now, this appears to be almost analogous to the "polling" state used
> on x86 which uses the next idle state's target residency as a timeout.
>
> While generally I'm not a big fan of setting up timers in the idle
> loop (it sort of feels like pulling your own hair in order to get
> yourself out of a swamp), if idle states like these are there in your
> platform, setting up a timer to get out of them in the driver's
> ->enter() routine might not be particularly objectionable. Doing that
> in the core is a whole different story, though.
>
> Generally, this adds quite a bit of complexity (on the "ugly" side of
> things IMO) to the core to cover a corner case present in one
> platform, while IMO it can be covered in the driver for that platform
> directly.
As of now, since this code doesn't add any benefit to the other platform,
I will post a patch with this implementation covered in platform-specific
driver code.
You are right that all the information needed for this implementation
are also
available there in platform driver code, so we should be good to go.
^ permalink raw reply
* [PATCH 2/2] ASoC: mpc5200_psc_i2s: Fix invalid license ID
From: Andra Danciu @ 2019-04-14 19:14 UTC (permalink / raw)
To: timur, nicoleotsuka, Xiubo.Lee, festevam, lgirdwood, broonie,
perex, tiwai, shawnguo, s.hauer, kernel, linux-imx, alsa-devel,
linuxppc-dev, linux-arm-kernel, linux-kernel
Cc: tglx, daniel.baluta
In-Reply-To: <20190414191450.18377-1-andradanciu1997@gmail.com>
As the file had no other license notice/reference, it falls under the
project license and therefore the proper SPDX id is: GPL-2.0-only
Cc: Daniel Baluta <daniel.baluta@nxp.com>
Fixes: 864a8472c4412 ("ASoC: mpc5200_psc_i2s: Switch to SPDX identifier")
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andra Danciu <andradanciu1997@gmail.com>
---
sound/soc/fsl/mpc5200_psc_i2s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/fsl/mpc5200_psc_i2s.c b/sound/soc/fsl/mpc5200_psc_i2s.c
index 6de97461ba25..9bc01f374b39 100644
--- a/sound/soc/fsl/mpc5200_psc_i2s.c
+++ b/sound/soc/fsl/mpc5200_psc_i2s.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL
+// SPDX-License-Identifier: GPL-2.0-only
//
// Freescale MPC5200 PSC in I2S mode
// ALSA SoC Digital Audio Interface (DAI) driver
--
2.11.0
^ permalink raw reply related
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