* [PATCH V2 06/11] arch/kmap_atomic: Consolidate duplicate code
From: ira.weiny @ 2020-05-04 1:09 UTC (permalink / raw)
To: linux-kernel, Andrew Morton, Christian Koenig, Huang Rui
Cc: Peter Zijlstra, Dave Hansen, dri-devel, James E.J. Bottomley,
Max Filippov, Paul Mackerras, H. Peter Anvin, sparclinux,
Ira Weiny, Thomas Gleixner, Helge Deller, x86, linux-csky,
Ingo Molnar, linux-snps-arc, linux-xtensa, Borislav Petkov,
Andy Lutomirski, Dan Williams, linux-arm-kernel, Chris Zankel,
Thomas Bogendoerfer, linux-parisc, linux-mips, linuxppc-dev,
David S. Miller
In-Reply-To: <20200504010912.982044-1-ira.weiny@intel.com>
From: Ira Weiny <ira.weiny@intel.com>
Every arch has the same code to ensure atomic operations and a check for
!HIGHMEM page.
Remove the duplicate code by defining a core kmap_atomic() which only
calls the arch specific kmap_atomic_high() when the page is high memory.
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes from V1:
Adjust to preserve bisect-ability
Remove unneeded kmap_atomic_high declarations
---
arch/arc/include/asm/highmem.h | 1 -
arch/arc/mm/highmem.c | 9 ++-------
arch/arm/include/asm/highmem.h | 1 -
arch/arm/mm/highmem.c | 9 ++-------
arch/csky/include/asm/highmem.h | 1 -
arch/csky/mm/highmem.c | 9 ++-------
arch/microblaze/include/asm/highmem.h | 4 ++--
arch/mips/include/asm/highmem.h | 1 -
arch/mips/mm/cache.c | 2 +-
arch/mips/mm/highmem.c | 18 ++----------------
arch/nds32/include/asm/highmem.h | 1 -
arch/nds32/mm/highmem.c | 9 ++-------
arch/powerpc/include/asm/highmem.h | 4 ++--
arch/powerpc/mm/highmem.c | 6 ------
arch/sparc/include/asm/highmem.h | 1 -
arch/sparc/mm/highmem.c | 9 ++-------
arch/x86/include/asm/highmem.h | 5 ++++-
arch/x86/mm/highmem_32.c | 14 --------------
arch/xtensa/include/asm/highmem.h | 1 -
arch/xtensa/mm/highmem.c | 9 ++-------
include/linux/highmem.h | 23 +++++++++++++++++++++++
21 files changed, 46 insertions(+), 91 deletions(-)
diff --git a/arch/arc/include/asm/highmem.h b/arch/arc/include/asm/highmem.h
index 8387a5596a91..db425cd38545 100644
--- a/arch/arc/include/asm/highmem.h
+++ b/arch/arc/include/asm/highmem.h
@@ -30,7 +30,6 @@
#include <asm/cacheflush.h>
-extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void kmap_init(void);
diff --git a/arch/arc/mm/highmem.c b/arch/arc/mm/highmem.c
index 4db13a6b9f3b..0964b011c29f 100644
--- a/arch/arc/mm/highmem.c
+++ b/arch/arc/mm/highmem.c
@@ -49,16 +49,11 @@
extern pte_t * pkmap_page_table;
static pte_t * fixmap_page_table;
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
int idx, cpu_idx;
unsigned long vaddr;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
cpu_idx = kmap_atomic_idx_push();
idx = cpu_idx + KM_TYPE_NR * smp_processor_id();
vaddr = FIXMAP_ADDR(idx);
@@ -68,7 +63,7 @@ void *kmap_atomic(struct page *page)
return (void *)vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kv)
{
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index 736f65283e7b..8c80bfe18a34 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -60,7 +60,6 @@ static inline void *kmap_high_get(struct page *page)
* when CONFIG_HIGHMEM is not set.
*/
#ifdef CONFIG_HIGHMEM
-extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
#endif
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index c700b32350ee..075fdc235091 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -31,18 +31,13 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr)
return *ptep;
}
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
unsigned int idx;
unsigned long vaddr;
void *kmap;
int type;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
#ifdef CONFIG_DEBUG_HIGHMEM
/*
* There is no cache coherency issue when non VIVT, so force the
@@ -76,7 +71,7 @@ void *kmap_atomic(struct page *page)
return (void *)vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kvaddr)
{
diff --git a/arch/csky/include/asm/highmem.h b/arch/csky/include/asm/highmem.h
index be11c5b67122..8ceee12f9bc1 100644
--- a/arch/csky/include/asm/highmem.h
+++ b/arch/csky/include/asm/highmem.h
@@ -32,7 +32,6 @@ extern pte_t *pkmap_page_table;
#define ARCH_HAS_KMAP_FLUSH_TLB
extern void kmap_flush_tlb(unsigned long addr);
-extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
extern struct page *kmap_atomic_to_page(void *ptr);
diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
index e9952211264b..63d74b47eee6 100644
--- a/arch/csky/mm/highmem.c
+++ b/arch/csky/mm/highmem.c
@@ -21,16 +21,11 @@ EXPORT_SYMBOL(kmap_flush_tlb);
EXPORT_SYMBOL(kmap);
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
unsigned long vaddr;
int idx, type;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
type = kmap_atomic_idx_push();
idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
@@ -42,7 +37,7 @@ void *kmap_atomic(struct page *page)
return (void *)vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kvaddr)
{
diff --git a/arch/microblaze/include/asm/highmem.h b/arch/microblaze/include/asm/highmem.h
index ec9954b091e1..00c75a423ac4 100644
--- a/arch/microblaze/include/asm/highmem.h
+++ b/arch/microblaze/include/asm/highmem.h
@@ -63,9 +63,9 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
}
extern void __kunmap_atomic(void *kvaddr);
-static inline void *kmap_atomic(struct page *page)
+static inline void *kmap_atomic_high(struct page *page)
{
- return kmap_atomic_prot(page, kmap_prot);
+ return kmap_atomic_high_prot(page, kmap_prot);
}
#define flush_cache_kmaps() { flush_icache(); flush_dcache(); }
diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h
index 24e7e7e5cc7b..8bdbbfc322ad 100644
--- a/arch/mips/include/asm/highmem.h
+++ b/arch/mips/include/asm/highmem.h
@@ -48,7 +48,6 @@ extern pte_t *pkmap_page_table;
#define ARCH_HAS_KMAP_FLUSH_TLB
extern void kmap_flush_tlb(unsigned long addr);
-extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 33b409391ddb..f015bb51fab0 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -14,9 +14,9 @@
#include <linux/sched.h>
#include <linux/syscalls.h>
#include <linux/mm.h>
+#include <linux/highmem.h>
#include <asm/cacheflush.h>
-#include <asm/highmem.h>
#include <asm/processor.h>
#include <asm/cpu.h>
#include <asm/cpu-features.h>
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index eb8ec8493f2f..2bda56372995 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -18,25 +18,11 @@ void kmap_flush_tlb(unsigned long addr)
}
EXPORT_SYMBOL(kmap_flush_tlb);
-/*
- * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
- * no global lock is needed and because the kmap code must perform a global TLB
- * invalidation when the kmap pool wraps.
- *
- * However when holding an atomic kmap is is not legal to sleep, so atomic
- * kmaps are appropriate for short, tight code paths only.
- */
-
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
unsigned long vaddr;
int idx, type;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
type = kmap_atomic_idx_push();
idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
@@ -48,7 +34,7 @@ void *kmap_atomic(struct page *page)
return (void*) vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kvaddr)
{
diff --git a/arch/nds32/include/asm/highmem.h b/arch/nds32/include/asm/highmem.h
index c93c7368bb3f..a3970e566ede 100644
--- a/arch/nds32/include/asm/highmem.h
+++ b/arch/nds32/include/asm/highmem.h
@@ -51,7 +51,6 @@ extern void kmap_init(void);
* when CONFIG_HIGHMEM is not set.
*/
#ifdef CONFIG_HIGHMEM
-extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
extern struct page *kmap_atomic_to_page(void *ptr);
diff --git a/arch/nds32/mm/highmem.c b/arch/nds32/mm/highmem.c
index f9348bec0ecb..f5f3a21460c4 100644
--- a/arch/nds32/mm/highmem.c
+++ b/arch/nds32/mm/highmem.c
@@ -10,18 +10,13 @@
#include <asm/fixmap.h>
#include <asm/tlbflush.h>
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
unsigned int idx;
unsigned long vaddr, pte;
int type;
pte_t *ptep;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
type = kmap_atomic_idx_push();
idx = type + KM_TYPE_NR * smp_processor_id();
@@ -37,7 +32,7 @@ void *kmap_atomic(struct page *page)
return (void *)vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kvaddr)
{
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index d049806a8354..74fa2c726fde 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -71,9 +71,9 @@ static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot)
}
extern void __kunmap_atomic(void *kvaddr);
-static inline void *kmap_atomic(struct page *page)
+static inline void *kmap_atomic_high(struct page *page)
{
- return kmap_atomic_prot(page, kmap_prot);
+ return kmap_atomic_high_prot(page, kmap_prot);
}
diff --git a/arch/powerpc/mm/highmem.c b/arch/powerpc/mm/highmem.c
index f075cef6d663..67aaa5217f7f 100644
--- a/arch/powerpc/mm/highmem.c
+++ b/arch/powerpc/mm/highmem.c
@@ -24,12 +24,6 @@
#include <linux/highmem.h>
#include <linux/module.h>
-/*
- * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
- * gives a more generic (and caching) interface. But kmap_atomic can
- * be used in IRQ contexts, so in some (very limited) cases we need
- * it.
- */
void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
{
unsigned long vaddr;
diff --git a/arch/sparc/include/asm/highmem.h b/arch/sparc/include/asm/highmem.h
index 4bdb79fed02c..458210c5bc38 100644
--- a/arch/sparc/include/asm/highmem.h
+++ b/arch/sparc/include/asm/highmem.h
@@ -50,7 +50,6 @@ void kmap_init(void) __init;
#define PKMAP_END (PKMAP_ADDR(LAST_PKMAP))
-void *kmap_atomic(struct page *page);
void __kunmap_atomic(void *kvaddr);
#define flush_cache_kmaps() flush_cache_all()
diff --git a/arch/sparc/mm/highmem.c b/arch/sparc/mm/highmem.c
index d4a80adea7e5..b53070ab6a31 100644
--- a/arch/sparc/mm/highmem.c
+++ b/arch/sparc/mm/highmem.c
@@ -53,16 +53,11 @@ void __init kmap_init(void)
kmap_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV | SRMMU_CACHE);
}
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
unsigned long vaddr;
long idx, type;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
type = kmap_atomic_idx_push();
idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
@@ -87,7 +82,7 @@ void *kmap_atomic(struct page *page)
return (void*) vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kvaddr)
{
diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h
index 61f47fef40e5..9393d55a2adb 100644
--- a/arch/x86/include/asm/highmem.h
+++ b/arch/x86/include/asm/highmem.h
@@ -68,7 +68,10 @@ static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot)
return kmap_atomic_high_prot(page, prot);
}
-void *kmap_atomic(struct page *page);
+static inline void *kmap_atomic_high(struct page *page)
+{
+ return kmap_atomic_high_prot(page, kmap_prot);
+}
void __kunmap_atomic(void *kvaddr);
void *kmap_atomic_pfn(unsigned long pfn);
void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot);
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 48b56b1af902..c3e272a759e0 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -4,14 +4,6 @@
#include <linux/swap.h> /* for totalram_pages */
#include <linux/memblock.h>
-/*
- * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
- * no global lock is needed and because the kmap code must perform a global TLB
- * invalidation when the kmap pool wraps.
- *
- * However when holding an atomic kmap it is not legal to sleep, so atomic
- * kmaps are appropriate for short, tight code paths only.
- */
void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
{
unsigned long vaddr;
@@ -28,12 +20,6 @@ void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
}
EXPORT_SYMBOL(kmap_atomic_high_prot);
-void *kmap_atomic(struct page *page)
-{
- return kmap_atomic_prot(page, kmap_prot);
-}
-EXPORT_SYMBOL(kmap_atomic);
-
/*
* This is the same as kmap_atomic() but can map memory that doesn't
* have a struct page associated with it.
diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h
index 5a481f7def0b..1e6aa15c4bdf 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -68,7 +68,6 @@ static inline void flush_cache_kmaps(void)
flush_cache_all();
}
-void *kmap_atomic(struct page *page);
void __kunmap_atomic(void *kvaddr);
void kmap_init(void);
diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c
index da734a2ed641..90b85a897cb0 100644
--- a/arch/xtensa/mm/highmem.c
+++ b/arch/xtensa/mm/highmem.c
@@ -37,16 +37,11 @@ static inline enum fixed_addresses kmap_idx(int type, unsigned long color)
color;
}
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
{
enum fixed_addresses idx;
unsigned long vaddr;
- preempt_disable();
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
idx = kmap_idx(kmap_atomic_idx_push(),
DCACHE_ALIAS(page_to_phys(page)));
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
@@ -57,7 +52,7 @@ void *kmap_atomic(struct page *page)
return (void *)vaddr;
}
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
void __kunmap_atomic(void *kvaddr)
{
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index ae6e8cb81043..86b93dee758a 100644
--- a/include/linux/highmem.h
+++ b/include/linux/highmem.h
@@ -32,6 +32,7 @@ static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
#include <asm/kmap_types.h>
#ifdef CONFIG_HIGHMEM
+extern void *kmap_atomic_high(struct page *page);
#include <asm/highmem.h>
#ifndef ARCH_HAS_KMAP_FLUSH_TLB
@@ -61,6 +62,28 @@ static inline void kunmap(struct page *page)
kunmap_high(page);
}
+/*
+ * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
+ * no global lock is needed and because the kmap code must perform a global TLB
+ * invalidation when the kmap pool wraps.
+ *
+ * However when holding an atomic kmap is is not legal to sleep, so atomic
+ * kmaps are appropriate for short, tight code paths only.
+ *
+ * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
+ * gives a more generic (and caching) interface. But kmap_atomic can
+ * be used in IRQ contexts, so in some (very limited) cases we need
+ * it.
+ */
+static inline void *kmap_atomic(struct page *page)
+{
+ preempt_disable();
+ pagefault_disable();
+ if (!PageHighMem(page))
+ return page_address(page);
+ return kmap_atomic_high(page);
+}
+
/* declarations for linux/mm/highmem.c */
unsigned int nr_free_highpages(void);
extern atomic_long_t _totalhigh_pages;
--
2.25.1
^ permalink raw reply related
* [PATCH V2 04/11] arch/kunmap: Remove duplicate kunmap implementations
From: ira.weiny @ 2020-05-04 1:09 UTC (permalink / raw)
To: linux-kernel, Andrew Morton, Christian Koenig, Huang Rui
Cc: Peter Zijlstra, Dave Hansen, dri-devel, James E.J. Bottomley,
Max Filippov, Paul Mackerras, H. Peter Anvin, sparclinux,
Ira Weiny, Thomas Gleixner, Helge Deller, x86, linux-csky,
Christoph Hellwig, Ingo Molnar, linux-snps-arc, linux-xtensa,
Borislav Petkov, Andy Lutomirski, Dan Williams, linux-arm-kernel,
Chris Zankel, Thomas Bogendoerfer, linux-parisc, linux-mips,
linuxppc-dev, David S. Miller
In-Reply-To: <20200504010912.982044-1-ira.weiny@intel.com>
From: Ira Weiny <ira.weiny@intel.com>
All architectures do exactly the same thing for kunmap(); remove all the
duplicate definitions and lift the call to the core.
This also has the benefit of changing kmap_unmap() on a number of
architectures to be an inline call rather than an actual function.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
arch/arc/include/asm/highmem.h | 10 ----------
arch/arm/include/asm/highmem.h | 3 ---
arch/arm/mm/highmem.c | 9 ---------
arch/csky/include/asm/highmem.h | 3 ---
arch/csky/mm/highmem.c | 9 ---------
arch/microblaze/include/asm/highmem.h | 9 ---------
arch/mips/include/asm/highmem.h | 3 ---
arch/mips/mm/highmem.c | 9 ---------
arch/nds32/include/asm/highmem.h | 3 ---
arch/nds32/mm/highmem.c | 10 ----------
arch/powerpc/include/asm/highmem.h | 9 ---------
arch/sparc/include/asm/highmem.h | 10 ----------
arch/x86/include/asm/highmem.h | 4 ----
arch/x86/mm/highmem_32.c | 9 ---------
arch/xtensa/include/asm/highmem.h | 10 ----------
include/linux/highmem.h | 9 +++++++++
16 files changed, 9 insertions(+), 110 deletions(-)
diff --git a/arch/arc/include/asm/highmem.h b/arch/arc/include/asm/highmem.h
index 96eb67c86961..8387a5596a91 100644
--- a/arch/arc/include/asm/highmem.h
+++ b/arch/arc/include/asm/highmem.h
@@ -32,7 +32,6 @@
extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
-extern void kunmap_high(struct page *page);
extern void kmap_init(void);
@@ -41,15 +40,6 @@ static inline void flush_cache_kmaps(void)
flush_cache_all();
}
-static inline void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
-
#endif
#endif
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index c917522541de..736f65283e7b 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -20,8 +20,6 @@
extern pte_t *pkmap_page_table;
-extern void kunmap_high(struct page *page);
-
/*
* The reason for kmap_high_get() is to ensure that the currently kmap'd
* page usage count does not decrease to zero while we're using its
@@ -62,7 +60,6 @@ static inline void *kmap_high_get(struct page *page)
* when CONFIG_HIGHMEM is not set.
*/
#ifdef CONFIG_HIGHMEM
-extern void kunmap(struct page *page);
extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index e8ba37c36590..c700b32350ee 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -31,15 +31,6 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr)
return *ptep;
}
-void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-EXPORT_SYMBOL(kunmap);
-
void *kmap_atomic(struct page *page)
{
unsigned int idx;
diff --git a/arch/csky/include/asm/highmem.h b/arch/csky/include/asm/highmem.h
index 9d0516e38110..be11c5b67122 100644
--- a/arch/csky/include/asm/highmem.h
+++ b/arch/csky/include/asm/highmem.h
@@ -30,11 +30,8 @@ extern pte_t *pkmap_page_table;
#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
-extern void kunmap_high(struct page *page);
-
#define ARCH_HAS_KMAP_FLUSH_TLB
extern void kmap_flush_tlb(unsigned long addr);
-extern void kunmap(struct page *page);
extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
index 4a3c273bc8b9..e9952211264b 100644
--- a/arch/csky/mm/highmem.c
+++ b/arch/csky/mm/highmem.c
@@ -21,15 +21,6 @@ EXPORT_SYMBOL(kmap_flush_tlb);
EXPORT_SYMBOL(kmap);
-void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-EXPORT_SYMBOL(kunmap);
-
void *kmap_atomic(struct page *page)
{
unsigned long vaddr;
diff --git a/arch/microblaze/include/asm/highmem.h b/arch/microblaze/include/asm/highmem.h
index 8c5bfd228bd8..0c94046f2d58 100644
--- a/arch/microblaze/include/asm/highmem.h
+++ b/arch/microblaze/include/asm/highmem.h
@@ -51,18 +51,9 @@ extern pte_t *pkmap_page_table;
#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
-extern void kunmap_high(struct page *page);
extern void *kmap_atomic_prot(struct page *page, pgprot_t prot);
extern void __kunmap_atomic(void *kvaddr);
-static inline void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
static inline void *kmap_atomic(struct page *page)
{
return kmap_atomic_prot(page, kmap_prot);
diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h
index 1f741e3ecabf..24e7e7e5cc7b 100644
--- a/arch/mips/include/asm/highmem.h
+++ b/arch/mips/include/asm/highmem.h
@@ -46,11 +46,8 @@ extern pte_t *pkmap_page_table;
#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
-extern void kunmap_high(struct page *page);
-
#define ARCH_HAS_KMAP_FLUSH_TLB
extern void kmap_flush_tlb(unsigned long addr);
-extern void kunmap(struct page *page);
extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index c72058bfead6..eb8ec8493f2f 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -18,15 +18,6 @@ void kmap_flush_tlb(unsigned long addr)
}
EXPORT_SYMBOL(kmap_flush_tlb);
-void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-EXPORT_SYMBOL(kunmap);
-
/*
* kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
* no global lock is needed and because the kmap code must perform a global TLB
diff --git a/arch/nds32/include/asm/highmem.h b/arch/nds32/include/asm/highmem.h
index b13654a79069..c93c7368bb3f 100644
--- a/arch/nds32/include/asm/highmem.h
+++ b/arch/nds32/include/asm/highmem.h
@@ -44,8 +44,6 @@ extern unsigned long highstart_pfn, highend_pfn;
extern pte_t *pkmap_page_table;
-extern void kunmap_high(struct page *page);
-
extern void kmap_init(void);
/*
@@ -53,7 +51,6 @@ extern void kmap_init(void);
* when CONFIG_HIGHMEM is not set.
*/
#ifdef CONFIG_HIGHMEM
-extern void kunmap(struct page *page);
extern void *kmap_atomic(struct page *page);
extern void __kunmap_atomic(void *kvaddr);
extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/nds32/mm/highmem.c b/arch/nds32/mm/highmem.c
index d0cde53b84ae..f9348bec0ecb 100644
--- a/arch/nds32/mm/highmem.c
+++ b/arch/nds32/mm/highmem.c
@@ -10,16 +10,6 @@
#include <asm/fixmap.h>
#include <asm/tlbflush.h>
-void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
-EXPORT_SYMBOL(kunmap);
-
void *kmap_atomic(struct page *page)
{
unsigned int idx;
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index f14e4feef6d5..ba3371977d49 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -59,18 +59,9 @@ extern pte_t *pkmap_page_table;
#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
-extern void kunmap_high(struct page *page);
extern void *kmap_atomic_prot(struct page *page, pgprot_t prot);
extern void __kunmap_atomic(void *kvaddr);
-static inline void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
static inline void *kmap_atomic(struct page *page)
{
return kmap_atomic_prot(page, kmap_prot);
diff --git a/arch/sparc/include/asm/highmem.h b/arch/sparc/include/asm/highmem.h
index 2ff1192047f7..4bdb79fed02c 100644
--- a/arch/sparc/include/asm/highmem.h
+++ b/arch/sparc/include/asm/highmem.h
@@ -50,16 +50,6 @@ void kmap_init(void) __init;
#define PKMAP_END (PKMAP_ADDR(LAST_PKMAP))
-void kunmap_high(struct page *page);
-
-static inline void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
void *kmap_atomic(struct page *page);
void __kunmap_atomic(void *kvaddr);
diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h
index c916a28a9738..90b96594d6c5 100644
--- a/arch/x86/include/asm/highmem.h
+++ b/arch/x86/include/asm/highmem.h
@@ -58,10 +58,6 @@ extern unsigned long highstart_pfn, highend_pfn;
#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
-extern void kunmap_high(struct page *page);
-
-void kunmap(struct page *page);
-
void *kmap_atomic_prot(struct page *page, pgprot_t prot);
void *kmap_atomic(struct page *page);
void __kunmap_atomic(void *kvaddr);
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 12591a81b85c..c4ebfd0ae401 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -4,15 +4,6 @@
#include <linux/swap.h> /* for totalram_pages */
#include <linux/memblock.h>
-void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-EXPORT_SYMBOL(kunmap);
-
/*
* kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
* no global lock is needed and because the kmap code must perform a global TLB
diff --git a/arch/xtensa/include/asm/highmem.h b/arch/xtensa/include/asm/highmem.h
index 2546b88ddecf..5a481f7def0b 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -63,16 +63,6 @@ static inline wait_queue_head_t *get_pkmap_wait_queue_head(unsigned int color)
extern pte_t *pkmap_page_table;
-void kunmap_high(struct page *page);
-
-static inline void kunmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
static inline void flush_cache_kmaps(void)
{
flush_cache_all();
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index fc3adc51254a..ae6e8cb81043 100644
--- a/include/linux/highmem.h
+++ b/include/linux/highmem.h
@@ -52,6 +52,15 @@ static inline void *kmap(struct page *page)
return addr;
}
+void kunmap_high(struct page *page);
+static inline void kunmap(struct page *page)
+{
+ might_sleep();
+ if (!PageHighMem(page))
+ return;
+ kunmap_high(page);
+}
+
/* declarations for linux/mm/highmem.c */
unsigned int nr_free_highpages(void);
extern atomic_long_t _totalhigh_pages;
--
2.25.1
^ permalink raw reply related
* [PATCH V2 08/11] arch/kmap: Ensure kmap_prot visibility
From: ira.weiny @ 2020-05-04 1:09 UTC (permalink / raw)
To: linux-kernel, Andrew Morton, Christian Koenig, Huang Rui
Cc: Peter Zijlstra, Dave Hansen, dri-devel, James E.J. Bottomley,
Max Filippov, Paul Mackerras, H. Peter Anvin, sparclinux,
Ira Weiny, Thomas Gleixner, Helge Deller, x86, linux-csky,
Ingo Molnar, linux-snps-arc, linux-xtensa, Borislav Petkov,
Andy Lutomirski, Dan Williams, linux-arm-kernel, Chris Zankel,
Thomas Bogendoerfer, linux-parisc, linux-mips, linuxppc-dev,
David S. Miller
In-Reply-To: <20200504010912.982044-1-ira.weiny@intel.com>
From: Ira Weiny <ira.weiny@intel.com>
We want to support kmap_atomic_prot() on all architectures and it makes
sense to define kmap_atomic() to use the default kmap_prot.
So we ensure all arch's have a globally available kmap_prot either as a
define or exported symbol.
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
arch/microblaze/include/asm/highmem.h | 2 +-
arch/microblaze/mm/init.c | 3 ---
arch/powerpc/include/asm/highmem.h | 2 +-
arch/powerpc/mm/mem.c | 3 ---
arch/sparc/mm/highmem.c | 1 +
5 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/arch/microblaze/include/asm/highmem.h b/arch/microblaze/include/asm/highmem.h
index 1b8a3c5102bd..033ac5b5c2da 100644
--- a/arch/microblaze/include/asm/highmem.h
+++ b/arch/microblaze/include/asm/highmem.h
@@ -25,8 +25,8 @@
#include <linux/uaccess.h>
#include <asm/fixmap.h>
+#define kmap_prot PAGE_KERNEL
extern pte_t *kmap_pte;
-extern pgprot_t kmap_prot;
extern pte_t *pkmap_page_table;
/*
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index 1ffbfa96b9b8..a467686c13af 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -49,8 +49,6 @@ unsigned long lowmem_size;
#ifdef CONFIG_HIGHMEM
pte_t *kmap_pte;
EXPORT_SYMBOL(kmap_pte);
-pgprot_t kmap_prot;
-EXPORT_SYMBOL(kmap_prot);
static inline pte_t *virt_to_kpte(unsigned long vaddr)
{
@@ -68,7 +66,6 @@ static void __init highmem_init(void)
pkmap_page_table = virt_to_kpte(PKMAP_BASE);
kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
- kmap_prot = PAGE_KERNEL;
}
static void highmem_setup(void)
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 373a470df205..ee5de974c5ef 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -29,8 +29,8 @@
#include <asm/page.h>
#include <asm/fixmap.h>
+#define kmap_prot PAGE_KERNEL
extern pte_t *kmap_pte;
-extern pgprot_t kmap_prot;
extern pte_t *pkmap_page_table;
/*
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 041ed7cfd341..3f642b058731 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -64,8 +64,6 @@ bool init_mem_is_free;
#ifdef CONFIG_HIGHMEM
pte_t *kmap_pte;
EXPORT_SYMBOL(kmap_pte);
-pgprot_t kmap_prot;
-EXPORT_SYMBOL(kmap_prot);
#endif
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
@@ -245,7 +243,6 @@ void __init paging_init(void)
pkmap_page_table = virt_to_kpte(PKMAP_BASE);
kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
- kmap_prot = PAGE_KERNEL;
#endif /* CONFIG_HIGHMEM */
printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%llx\n",
diff --git a/arch/sparc/mm/highmem.c b/arch/sparc/mm/highmem.c
index 469786bc430f..9f06d75e88e1 100644
--- a/arch/sparc/mm/highmem.c
+++ b/arch/sparc/mm/highmem.c
@@ -33,6 +33,7 @@
#include <asm/vaddrs.h>
pgprot_t kmap_prot;
+EXPORT_SYMBOL(kmap_prot);
static pte_t *kmap_pte;
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v2 17/20] mm: free_area_init: allow defining max_zone_pfn in descending order
From: Guenter Roeck @ 2020-05-03 18:43 UTC (permalink / raw)
To: Mike Rapoport
Cc: Rich Felker, linux-ia64, linux-doc, Catalin Marinas,
Heiko Carstens, x86, Michal Hocko, James E.J. Bottomley,
Max Filippov, Guo Ren, Ley Foon Tan, sparclinux, linux-riscv,
Greg Ungerer, linux-arch, linux-s390, linux-c6x-dev, Baoquan He,
Jonathan Corbet, linux-hexagon, Helge Deller, linux-sh,
Russell King, linux-csky, Mike Rapoport, Geert Uytterhoeven,
Hoan Tran, Mark Salter, Matt Turner, linux-snps-arc,
uclinux-h8-devel, linux-xtensa, Nick Hu, linux-alpha, linux-um,
linux-mips, Richard Weinberger, linux-m68k, Thomas Bogendoerfer,
Qian Cai, Greentime Hu, Paul Walmsley, Stafford Horne,
Guan Xuetao, linux-arm-kernel, Michal Simek, Tony Luck,
Yoshinori Sato, linux-parisc, linux-mm, Vineet Gupta, Brian Cain,
linux-kernel, openrisc, Andrew Morton, linuxppc-dev,
David S. Miller
In-Reply-To: <20200503174138.GA114085@roeck-us.net>
On Sun, May 03, 2020 at 10:41:38AM -0700, Guenter Roeck wrote:
> Hi,
>
> On Wed, Apr 29, 2020 at 03:11:23PM +0300, Mike Rapoport wrote:
> > From: Mike Rapoport <rppt@linux.ibm.com>
> >
> > Some architectures (e.g. ARC) have the ZONE_HIGHMEM zone below the
> > ZONE_NORMAL. Allowing free_area_init() parse max_zone_pfn array even it is
> > sorted in descending order allows using free_area_init() on such
> > architectures.
> >
> > Add top -> down traversal of max_zone_pfn array in free_area_init() and use
> > the latter in ARC node/zone initialization.
> >
> > Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
>
> This patch causes my microblazeel qemu boot test in linux-next to fail.
> Reverting it fixes the problem.
>
The same problem is seen with s390 emulations.
Guenter
> qemu command line:
>
> qemu-system-microblazeel -M petalogix-ml605 -m 256 \
> -kernel arch/microblaze/boot/linux.bin -no-reboot \
> -initrd rootfs.cpio \
> -append 'panic=-1 slub_debug=FZPUA rdinit=/sbin/init console=ttyS0,115200' \
> -monitor none -serial stdio -nographic
>
> initrd:
> https://github.com/groeck/linux-build-test/blob/master/rootfs/microblazeel/rootfs.cpio.gz
> configuration:
> https://github.com/groeck/linux-build-test/blob/master/rootfs/microblazeel/qemu_microblazeel_ml605_defconfig
>
> Bisect log is below.
>
> Guenter
>
> ---
> # bad: [fb9d670f57e3f6478602328bbbf71138be06ca4f] Add linux-next specific files for 20200501
> # good: [6a8b55ed4056ea5559ebe4f6a4b247f627870d4c] Linux 5.7-rc3
> git bisect start 'HEAD' 'v5.7-rc3'
> # good: [068b80b68a670f0b17288c8a3d1ee751f35162ab] Merge remote-tracking branch 'drm/drm-next'
> git bisect good 068b80b68a670f0b17288c8a3d1ee751f35162ab
> # good: [46c70fc6a3ac35cd72ddad248dcbe4eee716d2a5] Merge remote-tracking branch 'drivers-x86/for-next'
> git bisect good 46c70fc6a3ac35cd72ddad248dcbe4eee716d2a5
> # good: [f39c4ad479a2f005f972a2b941b40efa6b9c9349] Merge remote-tracking branch 'rpmsg/for-next'
> git bisect good f39c4ad479a2f005f972a2b941b40efa6b9c9349
> # bad: [165d3ee0162fe28efc2c8180176633e33515df15] ipc-convert-ipcs_idr-to-xarray-update
> git bisect bad 165d3ee0162fe28efc2c8180176633e33515df15
> # good: [001f1d211ed2ed0f005838dc4390993930bbbd69] mm: remove early_pfn_in_nid() and CONFIG_NODES_SPAN_OTHER_NODES
> git bisect good 001f1d211ed2ed0f005838dc4390993930bbbd69
> # bad: [aaad7401bd32f10c1d591dd886b3a9b9595c6d77] mm/vmsan: fix some typos in comment
> git bisect bad aaad7401bd32f10c1d591dd886b3a9b9595c6d77
> # bad: [09f9d0ab1fbed85623b283995aa7a7d78daa1611] khugepaged: allow to collapse PTE-mapped compound pages
> git bisect bad 09f9d0ab1fbed85623b283995aa7a7d78daa1611
> # bad: [c942fc8a3e5088407bc32d94f554bab205175f8a] mm/vmstat.c: do not show lowmem reserve protection information of empty zone
> git bisect bad c942fc8a3e5088407bc32d94f554bab205175f8a
> # bad: [b29358d269ace3826d8521bea842fc2984cfc11b] mm/page_alloc.c: rename free_pages_check() to check_free_page()
> git bisect bad b29358d269ace3826d8521bea842fc2984cfc11b
> # bad: [be0fb591a1f1df20a00c8f023f9ca4891f177b0d] mm: simplify find_min_pfn_with_active_regions()
> git bisect bad be0fb591a1f1df20a00c8f023f9ca4891f177b0d
> # bad: [c17422a008d36dcf3e9f51469758c5762716cb0a] mm: rename free_area_init_node() to free_area_init_memoryless_node()
> git bisect bad c17422a008d36dcf3e9f51469758c5762716cb0a
> # bad: [51a2f644fd020d5f090044825c388444d11029d5] mm: free_area_init: allow defining max_zone_pfn in descending order
> git bisect bad 51a2f644fd020d5f090044825c388444d11029d5
> # first bad commit: [51a2f644fd020d5f090044825c388444d11029d5] mm: free_area_init: allow defining max_zone_pfn in descending order
^ permalink raw reply
* Re: [PATCH v2 17/20] mm: free_area_init: allow defining max_zone_pfn in descending order
From: Guenter Roeck @ 2020-05-03 17:41 UTC (permalink / raw)
To: Mike Rapoport
Cc: Rich Felker, linux-ia64, linux-doc, Catalin Marinas,
Heiko Carstens, x86, Michal Hocko, James E.J. Bottomley,
Max Filippov, Guo Ren, Ley Foon Tan, sparclinux, linux-riscv,
Greg Ungerer, linux-arch, linux-s390, linux-c6x-dev, Baoquan He,
Jonathan Corbet, linux-hexagon, Helge Deller, linux-sh,
Russell King, linux-csky, Mike Rapoport, Geert Uytterhoeven,
Hoan Tran, Mark Salter, Matt Turner, linux-snps-arc,
uclinux-h8-devel, linux-xtensa, Nick Hu, linux-alpha, linux-um,
linux-mips, Richard Weinberger, linux-m68k, Thomas Bogendoerfer,
Qian Cai, Greentime Hu, Paul Walmsley, Stafford Horne,
Guan Xuetao, linux-arm-kernel, Michal Simek, Tony Luck,
Yoshinori Sato, linux-parisc, linux-mm, Vineet Gupta, Brian Cain,
linux-kernel, openrisc, Andrew Morton, linuxppc-dev,
David S. Miller
In-Reply-To: <20200429121126.17989-18-rppt@kernel.org>
Hi,
On Wed, Apr 29, 2020 at 03:11:23PM +0300, Mike Rapoport wrote:
> From: Mike Rapoport <rppt@linux.ibm.com>
>
> Some architectures (e.g. ARC) have the ZONE_HIGHMEM zone below the
> ZONE_NORMAL. Allowing free_area_init() parse max_zone_pfn array even it is
> sorted in descending order allows using free_area_init() on such
> architectures.
>
> Add top -> down traversal of max_zone_pfn array in free_area_init() and use
> the latter in ARC node/zone initialization.
>
> Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
This patch causes my microblazeel qemu boot test in linux-next to fail.
Reverting it fixes the problem.
qemu command line:
qemu-system-microblazeel -M petalogix-ml605 -m 256 \
-kernel arch/microblaze/boot/linux.bin -no-reboot \
-initrd rootfs.cpio \
-append 'panic=-1 slub_debug=FZPUA rdinit=/sbin/init console=ttyS0,115200' \
-monitor none -serial stdio -nographic
initrd:
https://github.com/groeck/linux-build-test/blob/master/rootfs/microblazeel/rootfs.cpio.gz
configuration:
https://github.com/groeck/linux-build-test/blob/master/rootfs/microblazeel/qemu_microblazeel_ml605_defconfig
Bisect log is below.
Guenter
---
# bad: [fb9d670f57e3f6478602328bbbf71138be06ca4f] Add linux-next specific files for 20200501
# good: [6a8b55ed4056ea5559ebe4f6a4b247f627870d4c] Linux 5.7-rc3
git bisect start 'HEAD' 'v5.7-rc3'
# good: [068b80b68a670f0b17288c8a3d1ee751f35162ab] Merge remote-tracking branch 'drm/drm-next'
git bisect good 068b80b68a670f0b17288c8a3d1ee751f35162ab
# good: [46c70fc6a3ac35cd72ddad248dcbe4eee716d2a5] Merge remote-tracking branch 'drivers-x86/for-next'
git bisect good 46c70fc6a3ac35cd72ddad248dcbe4eee716d2a5
# good: [f39c4ad479a2f005f972a2b941b40efa6b9c9349] Merge remote-tracking branch 'rpmsg/for-next'
git bisect good f39c4ad479a2f005f972a2b941b40efa6b9c9349
# bad: [165d3ee0162fe28efc2c8180176633e33515df15] ipc-convert-ipcs_idr-to-xarray-update
git bisect bad 165d3ee0162fe28efc2c8180176633e33515df15
# good: [001f1d211ed2ed0f005838dc4390993930bbbd69] mm: remove early_pfn_in_nid() and CONFIG_NODES_SPAN_OTHER_NODES
git bisect good 001f1d211ed2ed0f005838dc4390993930bbbd69
# bad: [aaad7401bd32f10c1d591dd886b3a9b9595c6d77] mm/vmsan: fix some typos in comment
git bisect bad aaad7401bd32f10c1d591dd886b3a9b9595c6d77
# bad: [09f9d0ab1fbed85623b283995aa7a7d78daa1611] khugepaged: allow to collapse PTE-mapped compound pages
git bisect bad 09f9d0ab1fbed85623b283995aa7a7d78daa1611
# bad: [c942fc8a3e5088407bc32d94f554bab205175f8a] mm/vmstat.c: do not show lowmem reserve protection information of empty zone
git bisect bad c942fc8a3e5088407bc32d94f554bab205175f8a
# bad: [b29358d269ace3826d8521bea842fc2984cfc11b] mm/page_alloc.c: rename free_pages_check() to check_free_page()
git bisect bad b29358d269ace3826d8521bea842fc2984cfc11b
# bad: [be0fb591a1f1df20a00c8f023f9ca4891f177b0d] mm: simplify find_min_pfn_with_active_regions()
git bisect bad be0fb591a1f1df20a00c8f023f9ca4891f177b0d
# bad: [c17422a008d36dcf3e9f51469758c5762716cb0a] mm: rename free_area_init_node() to free_area_init_memoryless_node()
git bisect bad c17422a008d36dcf3e9f51469758c5762716cb0a
# bad: [51a2f644fd020d5f090044825c388444d11029d5] mm: free_area_init: allow defining max_zone_pfn in descending order
git bisect bad 51a2f644fd020d5f090044825c388444d11029d5
# first bad commit: [51a2f644fd020d5f090044825c388444d11029d5] mm: free_area_init: allow defining max_zone_pfn in descending order
^ permalink raw reply
* Re: [PATCH 0/7] sha1 library cleanup
From: Eric Biggers @ 2020-05-03 16:45 UTC (permalink / raw)
To: Jason A. Donenfeld
Cc: linux-s390, Theodore Ts'o, linuxppc-dev, LKML, Paul Mackerras,
Linux Crypto Mailing List, Paolo Abeni, mptcp
In-Reply-To: <CAHmME9oPqWfTwTtawM-29Lqck-N-kYo4nGr1-4hCW975DhB0Uw@mail.gmail.com>
On Sat, May 02, 2020 at 03:05:46PM -0600, Jason A. Donenfeld wrote:
> Thanks for this series. I like the general idea. I think it might make
> sense, though, to separate things out into sha1.h and sha256.h. That
> will be nice preparation work for when we eventually move obsolete
> primitives into some <crypto/dangerous/> subdirectory.
That's basically what I suggested in the cover letter:
"As future work, we should split sha.h into sha1.h and sha2.h and try to
remove the remaining uses of SHA-1. For example, the remaining use in
drivers/char/random.c is probably one that can be gotten rid of."
("sha2.h" rather than "sha256.h", since it would include SHA-512 too.
Also, we already have sha3.h, so having sha{1,2,3}.h would be logical.)
But there are 108 files that include <crypto/sha.h>, all of which would need to
be updated, which risks merge conflicts. So this series seemed like a good
stopping point to get these initial changes in for 5.8. Then in the next
release we can split up sha.h (and debate whether sha1.h should really be
"<crypto/dangerous/sha1.h>" or whatever).
There are 3 files where I added an include of sha.h, where we could go directly
to sha1.h if we did it now. But that's not much compared to the 108 files.
- Eric
^ permalink raw reply
* Re: [PATCH 0/7] sha1 library cleanup
From: Ard Biesheuvel @ 2020-05-03 16:14 UTC (permalink / raw)
To: Eric Biggers
Cc: linux-s390, Jason A . Donenfeld, Theodore Ts'o, linuxppc-dev,
Linux Kernel Mailing List, Paul Mackerras,
Linux Crypto Mailing List, Paolo Abeni, mptcp
In-Reply-To: <20200502182427.104383-1-ebiggers@kernel.org>
On Sat, 2 May 2020 at 20:28, Eric Biggers <ebiggers@kernel.org> wrote:
>
> <linux/cryptohash.h> sounds very generic and important, like it's the
> header to include if you're doing cryptographic hashing in the kernel.
> But actually it only includes the library implementation of the SHA-1
> compression function (not even the full SHA-1). This should basically
> never be used anymore; SHA-1 is no longer considered secure, and there
> are much better ways to do cryptographic hashing in the kernel.
>
> Also the function is named just "sha_transform()", which makes it
> unclear which version of SHA is meant.
>
> Therefore, this series cleans things up by moving these SHA-1
> declarations into <crypto/sha.h> where they better belong, and changing
> the names to say SHA-1 rather than just SHA.
>
> As future work, we should split sha.h into sha1.h and sha2.h and try to
> remove the remaining uses of SHA-1. For example, the remaining use in
> drivers/char/random.c is probably one that can be gotten rid of.
>
> This patch series applies to cryptodev/master.
>
> Eric Biggers (7):
> mptcp: use SHA256_BLOCK_SIZE, not SHA_MESSAGE_BYTES
> crypto: powerpc/sha1 - remove unused temporary workspace
> crypto: powerpc/sha1 - prefix the "sha1_" functions
> crypto: s390/sha1 - prefix the "sha1_" functions
> crypto: lib/sha1 - rename "sha" to "sha1"
> crypto: lib/sha1 - remove unnecessary includes of linux/cryptohash.h
> crypto: lib/sha1 - fold linux/cryptohash.h into crypto/sha.h
>
For the series,
Acked-by: Ard Biesheuvel <ardb@kernel.org>
> Documentation/security/siphash.rst | 2 +-
> arch/arm/crypto/sha1_glue.c | 1 -
> arch/arm/crypto/sha1_neon_glue.c | 1 -
> arch/arm/crypto/sha256_glue.c | 1 -
> arch/arm/crypto/sha256_neon_glue.c | 1 -
> arch/arm/kernel/armksyms.c | 1 -
> arch/arm64/crypto/sha256-glue.c | 1 -
> arch/arm64/crypto/sha512-glue.c | 1 -
> arch/microblaze/kernel/microblaze_ksyms.c | 1 -
> arch/mips/cavium-octeon/crypto/octeon-md5.c | 1 -
> arch/powerpc/crypto/md5-glue.c | 1 -
> arch/powerpc/crypto/sha1-spe-glue.c | 1 -
> arch/powerpc/crypto/sha1.c | 33 ++++++++++-----------
> arch/powerpc/crypto/sha256-spe-glue.c | 1 -
> arch/s390/crypto/sha1_s390.c | 12 ++++----
> arch/sparc/crypto/md5_glue.c | 1 -
> arch/sparc/crypto/sha1_glue.c | 1 -
> arch/sparc/crypto/sha256_glue.c | 1 -
> arch/sparc/crypto/sha512_glue.c | 1 -
> arch/unicore32/kernel/ksyms.c | 1 -
> arch/x86/crypto/sha1_ssse3_glue.c | 1 -
> arch/x86/crypto/sha256_ssse3_glue.c | 1 -
> arch/x86/crypto/sha512_ssse3_glue.c | 1 -
> crypto/sha1_generic.c | 5 ++--
> drivers/char/random.c | 8 ++---
> drivers/crypto/atmel-sha.c | 1 -
> drivers/crypto/chelsio/chcr_algo.c | 1 -
> drivers/crypto/chelsio/chcr_ipsec.c | 1 -
> drivers/crypto/omap-sham.c | 1 -
> fs/f2fs/hash.c | 1 -
> include/crypto/sha.h | 10 +++++++
> include/linux/cryptohash.h | 14 ---------
> include/linux/filter.h | 4 +--
> include/net/tcp.h | 1 -
> kernel/bpf/core.c | 18 +++++------
> lib/crypto/chacha.c | 1 -
> lib/sha1.c | 24 ++++++++-------
> net/core/secure_seq.c | 1 -
> net/ipv6/addrconf.c | 10 +++----
> net/ipv6/seg6_hmac.c | 1 -
> net/mptcp/crypto.c | 4 +--
> 41 files changed, 69 insertions(+), 104 deletions(-)
> delete mode 100644 include/linux/cryptohash.h
>
>
> base-commit: 12b3cf9093542d9f752a4968815ece836159013f
> --
> 2.26.2
>
^ permalink raw reply
* [PATCH 2/2] powerpc/64s/hash: add torture_hpt kernel boot option to increase hash faults
From: Nicholas Piggin @ 2020-05-03 8:22 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
In-Reply-To: <20200503082236.17991-1-npiggin@gmail.com>
This option increases the number of hash misses by limiting the number of
kernel HPT entries. This helps stress test difficult to hit paths in the
kernel.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
.../admin-guide/kernel-parameters.txt | 9 +++
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 10 +++
arch/powerpc/mm/book3s64/hash_4k.c | 3 +
arch/powerpc/mm/book3s64/hash_64k.c | 8 +++
arch/powerpc/mm/book3s64/hash_utils.c | 66 ++++++++++++++++++-
5 files changed, 95 insertions(+), 1 deletion(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 5a34b7dd9ebe..1ec6a32a717a 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -876,6 +876,15 @@
them frequently to increase the rate of SLB faults
on kernel addresses.
+ torture_hpt [PPC]
+ Limits the number of kernel HPT entries in the hash
+ page table to increase the rate of hash page table
+ faults on kernel addresses.
+
+ This may hang when run on processors / emulators which
+ do not have a TLB, or flush it more often than
+ required, QEMU seems to have problems.
+
disable= [IPV6]
See Documentation/networking/ipv6.txt.
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index 758de1e0f676..539e3d91eac4 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -324,6 +324,16 @@ static inline bool torture_slb(void)
return static_branch_unlikely(&torture_slb_key);
}
+extern bool torture_hpt_enabled;
+DECLARE_STATIC_KEY_FALSE(torture_hpt_key);
+static inline bool torture_hpt(void)
+{
+ return static_branch_unlikely(&torture_hpt_key);
+}
+
+void hpt_do_torture(unsigned long ea, unsigned long access,
+ unsigned long rflags, unsigned long hpte_group);
+
/*
* This computes the AVPN and B fields of the first dword of a HPTE,
* for use when we want to match an existing PTE. The bottom 7 bits
diff --git a/arch/powerpc/mm/book3s64/hash_4k.c b/arch/powerpc/mm/book3s64/hash_4k.c
index 22e787123cdf..54e4ff8c558d 100644
--- a/arch/powerpc/mm/book3s64/hash_4k.c
+++ b/arch/powerpc/mm/book3s64/hash_4k.c
@@ -118,6 +118,9 @@ int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
}
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE);
+
+ if (torture_hpt())
+ hpt_do_torture(ea, access, rflags, hpte_group);
}
*ptep = __pte(new_pte & ~H_PAGE_BUSY);
return 0;
diff --git a/arch/powerpc/mm/book3s64/hash_64k.c b/arch/powerpc/mm/book3s64/hash_64k.c
index 7084ce2951e6..19ea0fc145a9 100644
--- a/arch/powerpc/mm/book3s64/hash_64k.c
+++ b/arch/powerpc/mm/book3s64/hash_64k.c
@@ -216,6 +216,9 @@ int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
new_pte |= pte_set_hidx(ptep, rpte, subpg_index, slot, PTRS_PER_PTE);
new_pte |= H_PAGE_HASHPTE;
+ if (torture_hpt())
+ hpt_do_torture(ea, access, rflags, hpte_group);
+
*ptep = __pte(new_pte & ~H_PAGE_BUSY);
return 0;
}
@@ -327,7 +330,12 @@ int __hash_page_64K(unsigned long ea, unsigned long access,
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE);
+
+ if (torture_hpt())
+ hpt_do_torture(ea, access, rflags, hpte_group);
}
+
*ptep = __pte(new_pte & ~H_PAGE_BUSY);
+
return 0;
}
diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
index 9c487b5782ef..e9bdf825f897 100644
--- a/arch/powerpc/mm/book3s64/hash_utils.c
+++ b/arch/powerpc/mm/book3s64/hash_utils.c
@@ -353,8 +353,12 @@ int htab_remove_mapping(unsigned long vstart, unsigned long vend,
return ret;
}
-static bool disable_1tb_segments = false;
+static bool disable_1tb_segments __read_mostly = false;
bool torture_slb_enabled __read_mostly = false;
+bool torture_hpt_enabled __read_mostly = false;
+
+/* per-CPU array allocated if we enable torture_hpt. */
+static unsigned long *torture_hpt_last_group;
static int __init parse_disable_1tb_segments(char *p)
{
@@ -370,6 +374,13 @@ static int __init parse_torture_slb(char *p)
}
early_param("torture_slb", parse_torture_slb);
+static int __init parse_torture_hpt(char *p)
+{
+ torture_hpt_enabled = true;
+ return 0;
+}
+early_param("torture_hpt", parse_torture_hpt);
+
static int __init htab_dt_scan_seg_sizes(unsigned long node,
const char *uname, int depth,
void *data)
@@ -863,6 +874,7 @@ static void __init hash_init_partition_table(phys_addr_t hash_table,
}
DEFINE_STATIC_KEY_FALSE(torture_slb_key);
+DEFINE_STATIC_KEY_FALSE(torture_hpt_key);
static void __init htab_initialize(void)
{
@@ -882,6 +894,15 @@ static void __init htab_initialize(void)
if (torture_slb_enabled)
static_branch_enable(&torture_slb_key);
+ if (torture_hpt_enabled) {
+ unsigned long tmp;
+ static_branch_enable(&torture_hpt_key);
+ tmp = memblock_phys_alloc_range(sizeof(unsigned long) * NR_CPUS,
+ 0,
+ 0, MEMBLOCK_ALLOC_ANYWHERE);
+ memset((void *)tmp, 0xff, sizeof(unsigned long) * NR_CPUS);
+ torture_hpt_last_group = __va(tmp);
+ }
/*
* Calculate the required size of the htab. We want the number of
@@ -1901,6 +1922,49 @@ long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
return slot;
}
+void hpt_do_torture(unsigned long ea, unsigned long access,
+ unsigned long rflags, unsigned long hpte_group)
+{
+ unsigned long last_group;
+ int cpu = raw_smp_processor_id();
+
+ last_group = torture_hpt_last_group[cpu];
+ if (last_group != -1UL) {
+ while (mmu_hash_ops.hpte_remove(last_group) != -1)
+ ;
+ torture_hpt_last_group[cpu] = -1UL;
+ }
+
+#define QEMU_WORKAROUND 0
+
+ if (ea >= PAGE_OFFSET) {
+ if (!QEMU_WORKAROUND && (access & (_PAGE_READ|_PAGE_WRITE)) &&
+ !(rflags & (HPTE_R_I|HPTE_R_G))) {
+ /* prefetch / prefetchw does not seem to set up a TLB
+ * entry with the powerpc systemsim (mambo) emulator,
+ * though it works with real hardware. An alternative
+ * approach that would work more reliably on quirky
+ * emulators like QEMU may be to remember the last
+ * insertion and remove that, rather than removing the
+ * current insertion. Then no prefetch is required.
+ */
+ if ((access & _PAGE_WRITE) && (access & _PAGE_READ))
+ atomic_add(0, (atomic_t *)(ea & ~0x3));
+ else if (access & _PAGE_READ)
+ *(volatile char *)ea;
+
+ mb();
+
+ while (mmu_hash_ops.hpte_remove(hpte_group) != -1)
+ ;
+ } else {
+ /* Can't prefetch cache-inhibited so clear next time. */
+ torture_hpt_last_group[cpu] = hpte_group;
+ }
+ }
+}
+
+
#ifdef CONFIG_DEBUG_PAGEALLOC
static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)
{
--
2.23.0
^ permalink raw reply related
* [PATCH 1/2] powerpc/64s/hash: add torture_slb kernel boot option to increase SLB faults
From: Nicholas Piggin @ 2020-05-03 8:22 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nicholas Piggin
This option increases the number of SLB misses by limiting the number of
kernel SLB entries, and increased flushing of cached lookaside information.
This helps stress test difficult to hit paths in the kernel.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
.../admin-guide/kernel-parameters.txt | 5 +
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 7 +
arch/powerpc/mm/book3s64/hash_utils.c | 13 ++
arch/powerpc/mm/book3s64/slb.c | 145 ++++++++++++------
4 files changed, 125 insertions(+), 45 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index f2a93c8679e8..5a34b7dd9ebe 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -871,6 +871,11 @@
can be useful when debugging issues that require an SLB
miss to occur.
+ torture_slb [PPC]
+ Limits the number of kernel SLB entries, and flushes
+ them frequently to increase the rate of SLB faults
+ on kernel addresses.
+
disable= [IPV6]
See Documentation/networking/ipv6.txt.
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index 3fa1b962dc27..758de1e0f676 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -317,6 +317,13 @@ extern unsigned long tce_alloc_start, tce_alloc_end;
*/
extern int mmu_ci_restrictions;
+extern bool torture_slb_enabled;
+DECLARE_STATIC_KEY_FALSE(torture_slb_key);
+static inline bool torture_slb(void)
+{
+ return static_branch_unlikely(&torture_slb_key);
+}
+
/*
* This computes the AVPN and B fields of the first dword of a HPTE,
* for use when we want to match an existing PTE. The bottom 7 bits
diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c
index 8ed2411c3f39..9c487b5782ef 100644
--- a/arch/powerpc/mm/book3s64/hash_utils.c
+++ b/arch/powerpc/mm/book3s64/hash_utils.c
@@ -354,6 +354,7 @@ int htab_remove_mapping(unsigned long vstart, unsigned long vend,
}
static bool disable_1tb_segments = false;
+bool torture_slb_enabled __read_mostly = false;
static int __init parse_disable_1tb_segments(char *p)
{
@@ -362,6 +363,13 @@ static int __init parse_disable_1tb_segments(char *p)
}
early_param("disable_1tb_segments", parse_disable_1tb_segments);
+static int __init parse_torture_slb(char *p)
+{
+ torture_slb_enabled = true;
+ return 0;
+}
+early_param("torture_slb", parse_torture_slb);
+
static int __init htab_dt_scan_seg_sizes(unsigned long node,
const char *uname, int depth,
void *data)
@@ -854,6 +862,8 @@ static void __init hash_init_partition_table(phys_addr_t hash_table,
pr_info("Partition table %p\n", partition_tb);
}
+DEFINE_STATIC_KEY_FALSE(torture_slb_key);
+
static void __init htab_initialize(void)
{
unsigned long table;
@@ -870,6 +880,9 @@ static void __init htab_initialize(void)
printk(KERN_INFO "Using 1TB segments\n");
}
+ if (torture_slb_enabled)
+ static_branch_enable(&torture_slb_key);
+
/*
* Calculate the required size of the htab. We want the number of
* PTEGs to equal one half the number of real pages.
diff --git a/arch/powerpc/mm/book3s64/slb.c b/arch/powerpc/mm/book3s64/slb.c
index 716204aee3da..37e9f6c096e3 100644
--- a/arch/powerpc/mm/book3s64/slb.c
+++ b/arch/powerpc/mm/book3s64/slb.c
@@ -68,7 +68,7 @@ static void assert_slb_presence(bool present, unsigned long ea)
* slbfee. requires bit 24 (PPC bit 39) be clear in RB. Hardware
* ignores all other bits from 0-27, so just clear them all.
*/
- ea &= ~((1UL << 28) - 1);
+ ea &= ~((1UL << SID_SHIFT) - 1);
asm volatile(__PPC_SLBFEE_DOT(%0, %1) : "=r"(tmp) : "r"(ea) : "cr0");
WARN_ON(present == (tmp == 0));
@@ -153,14 +153,28 @@ void slb_flush_all_realmode(void)
asm volatile("slbmte %0,%0; slbia" : : "r" (0));
}
+static __always_inline void __slb_flush_and_restore_bolted(u32 ih)
+{
+ struct slb_shadow *p = get_slb_shadow();
+ unsigned long ksp_esid_data, ksp_vsid_data;
+
+ ksp_esid_data = be64_to_cpu(p->save_area[KSTACK_INDEX].esid);
+ ksp_vsid_data = be64_to_cpu(p->save_area[KSTACK_INDEX].vsid);
+
+ asm volatile(PPC_SLBIA(%0)" \n"
+ "slbmte %1, %2 \n"
+ :: "i" (ih),
+ "r" (ksp_vsid_data),
+ "r" (ksp_esid_data)
+ : "memory");
+}
+
/*
* This flushes non-bolted entries, it can be run in virtual mode. Must
* be called with interrupts disabled.
*/
void slb_flush_and_restore_bolted(void)
{
- struct slb_shadow *p = get_slb_shadow();
-
BUILD_BUG_ON(SLB_NUM_BOLTED != 2);
WARN_ON(!irqs_disabled());
@@ -171,13 +185,10 @@ void slb_flush_and_restore_bolted(void)
*/
hard_irq_disable();
- asm volatile("isync\n"
- "slbia\n"
- "slbmte %0, %1\n"
- "isync\n"
- :: "r" (be64_to_cpu(p->save_area[KSTACK_INDEX].vsid)),
- "r" (be64_to_cpu(p->save_area[KSTACK_INDEX].esid))
- : "memory");
+ isync();
+ __slb_flush_and_restore_bolted(0);
+ isync();
+
assert_slb_presence(true, get_paca()->kstack);
get_paca()->slb_cache_ptr = 0;
@@ -400,6 +411,30 @@ void preload_new_slb_context(unsigned long start, unsigned long sp)
local_irq_enable();
}
+static void slb_cache_slbie_kernel(unsigned int index)
+{
+ unsigned long slbie_data = get_paca()->slb_cache[index];
+ unsigned long ksp = get_paca()->kstack;
+
+ slbie_data <<= SID_SHIFT;
+ slbie_data |= 0xc000000000000000ULL;
+ if ((ksp & slb_esid_mask(mmu_kernel_ssize)) == slbie_data)
+ return;
+ slbie_data |= mmu_kernel_ssize << SLBIE_SSIZE_SHIFT;
+
+ asm volatile("slbie %0" : : "r" (slbie_data));
+}
+
+static void slb_cache_slbie(unsigned int index)
+{
+ unsigned long slbie_data = get_paca()->slb_cache[index];
+
+ slbie_data <<= SID_SHIFT;
+ slbie_data |= user_segment_size(slbie_data) << SLBIE_SSIZE_SHIFT;
+ slbie_data |= SLBIE_C; /* user slbs have C=1 */
+
+ asm volatile("slbie %0" : : "r" (slbie_data));
+}
/* Flush all user entries from the segment table of the current processor. */
void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
@@ -414,8 +449,14 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
* which would update the slb_cache/slb_cache_ptr fields in the PACA.
*/
hard_irq_disable();
- asm volatile("isync" : : : "memory");
- if (cpu_has_feature(CPU_FTR_ARCH_300)) {
+ isync();
+ if (torture_slb()) {
+ __slb_flush_and_restore_bolted(0);
+ isync();
+ get_paca()->slb_cache_ptr = 0;
+ get_paca()->slb_kern_bitmap = (1U << SLB_NUM_BOLTED) - 1;
+
+ } else if (cpu_has_feature(CPU_FTR_ARCH_300)) {
/*
* SLBIA IH=3 invalidates all Class=1 SLBEs and their
* associated lookaside structures, which matches what
@@ -423,47 +464,36 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
* cache.
*/
asm volatile(PPC_SLBIA(3));
+
} else {
unsigned long offset = get_paca()->slb_cache_ptr;
if (!mmu_has_feature(MMU_FTR_NO_SLBIE_B) &&
offset <= SLB_CACHE_ENTRIES) {
- unsigned long slbie_data = 0;
-
- for (i = 0; i < offset; i++) {
- unsigned long ea;
-
- ea = (unsigned long)
- get_paca()->slb_cache[i] << SID_SHIFT;
- /*
- * Could assert_slb_presence(true) here, but
- * hypervisor or machine check could have come
- * in and removed the entry at this point.
- */
-
- slbie_data = ea;
- slbie_data |= user_segment_size(slbie_data)
- << SLBIE_SSIZE_SHIFT;
- slbie_data |= SLBIE_C; /* user slbs have C=1 */
- asm volatile("slbie %0" : : "r" (slbie_data));
- }
+ /*
+ * Could assert_slb_presence(true) here, but
+ * hypervisor or machine check could have come
+ * in and removed the entry at this point.
+ */
+
+ for (i = 0; i < offset; i++)
+ slb_cache_slbie(i);
/* Workaround POWER5 < DD2.1 issue */
if (!cpu_has_feature(CPU_FTR_ARCH_207S) && offset == 1)
- asm volatile("slbie %0" : : "r" (slbie_data));
+ slb_cache_slbie(0);
} else {
- struct slb_shadow *p = get_slb_shadow();
- unsigned long ksp_esid_data =
- be64_to_cpu(p->save_area[KSTACK_INDEX].esid);
- unsigned long ksp_vsid_data =
- be64_to_cpu(p->save_area[KSTACK_INDEX].vsid);
-
- asm volatile(PPC_SLBIA(1) "\n"
- "slbmte %0,%1\n"
- "isync"
- :: "r"(ksp_vsid_data),
- "r"(ksp_esid_data));
+ /*
+ * SLBIA IH=1 on ISA v2.05 and newer will preserve
+ * lookaside information created with Class=0 (kernel)
+ * entries, though the SLB entries themselves are
+ * still invalidated.
+ *
+ * Older processors will ignore this optimisation.
+ */
+ __slb_flush_and_restore_bolted(1);
+ isync();
get_paca()->slb_kern_bitmap = (1U << SLB_NUM_BOLTED) - 1;
}
@@ -503,7 +533,7 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
* address accesses by the kernel (user mode won't happen until
* rfid, which is safe).
*/
- asm volatile("isync" : : : "memory");
+ isync();
}
void slb_set_size(u16 size)
@@ -571,6 +601,9 @@ static void slb_cache_update(unsigned long esid_data)
if (cpu_has_feature(CPU_FTR_ARCH_300))
return; /* ISAv3.0B and later does not use slb_cache */
+ if (torture_slb())
+ return;
+
/*
* Now update slb cache entries
*/
@@ -580,7 +613,7 @@ static void slb_cache_update(unsigned long esid_data)
* We have space in slb cache for optimized switch_slb().
* Top 36 bits from esid_data as per ISA
*/
- local_paca->slb_cache[slb_cache_index++] = esid_data >> 28;
+ local_paca->slb_cache[slb_cache_index++] = esid_data >> SID_SHIFT;
local_paca->slb_cache_ptr++;
} else {
/*
@@ -671,6 +704,28 @@ static long slb_insert_entry(unsigned long ea, unsigned long context,
* accesses user memory before it returns to userspace with rfid.
*/
assert_slb_presence(false, ea);
+ if (torture_slb()) {
+ int slb_cache_index = local_paca->slb_cache_ptr;
+
+ /*
+ * torture_slb() does not use slb cache, repurpose as a
+ * cache of inserted (non-bolted) kernel SLB entries. All
+ * non-bolted kernel entries are flushed on any user fault,
+ * or if there are already 3 non-boled kernel entries.
+ */
+ BUILD_BUG_ON(SLB_CACHE_ENTRIES < 3);
+ if (!kernel || slb_cache_index == 3) {
+ int i;
+
+ for (i = 0; i < slb_cache_index; i++)
+ slb_cache_slbie_kernel(i);
+ slb_cache_index = 0;
+ }
+
+ if (kernel)
+ local_paca->slb_cache[slb_cache_index++] = esid_data >> SID_SHIFT;
+ local_paca->slb_cache_ptr = slb_cache_index;
+ }
asm volatile("slbmte %0, %1" : : "r" (vsid_data), "r" (esid_data));
barrier();
--
2.23.0
^ permalink raw reply related
* Re: [PATCH] powerpc/64s: Fix unrecoverable SLB crashes due to preemption check
From: Hugh Dickins @ 2020-05-03 7:10 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, hughd, npiggin
In-Reply-To: <20200502143316.929341-1-mpe@ellerman.id.au>
On Sun, 3 May 2020, Michael Ellerman wrote:
> Hugh reported that his trusty G5 crashed after a few hours under load
> with an "Unrecoverable exception 380".
>
> The crash is in interrupt_return() where we check lazy_irq_pending(),
> which calls get_paca() and with CONFIG_DEBUG_PREEMPT=y that goes to
> check_preemption_disabled() via debug_smp_processor_id().
>
> As Nick explained on the list:
>
> Problem is MSR[RI] is cleared here, ready to do the last few things
> for interrupt return where we're not allowed to take any other
> interrupts.
>
> SLB interrupts can happen just about anywhere aside from kernel
> text, global variables, and stack. When that hits, it appears to be
> unrecoverable due to RI=0.
>
> The problematic access is in preempt_count() which is:
>
> return READ_ONCE(current_thread_info()->preempt_count);
>
> Because of THREAD_INFO_IN_TASK, current_thread_info() just points to
> current, so the access is to somewhere in kernel memory, but not on
> the stack or in .data, which means it can cause an SLB miss. If we
> take an SLB miss with RI=0 it is fatal.
>
> The easiest solution is to add a version of lazy_irq_pending() that
> doesn't do the preemption check and call it from the interrupt return
> path.
>
> Fixes: 68b34588e202 ("powerpc/64/sycall: Implement syscall entry/exit logic in C")
> Reported-by: Hugh Dickins <hughd@google.com>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Thank you, Michael and Nick: this has been running fine all day for me.
Hugh
> ---
> arch/powerpc/include/asm/hw_irq.h | 20 +++++++++++++++++++-
> arch/powerpc/kernel/syscall_64.c | 6 +++---
> 2 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
> index e0e71777961f..3a0db7b0b46e 100644
> --- a/arch/powerpc/include/asm/hw_irq.h
> +++ b/arch/powerpc/include/asm/hw_irq.h
> @@ -250,9 +250,27 @@ static inline bool arch_irqs_disabled(void)
> } \
> } while(0)
>
> +static inline bool __lazy_irq_pending(u8 irq_happened)
> +{
> + return !!(irq_happened & ~PACA_IRQ_HARD_DIS);
> +}
> +
> +/*
> + * Check if a lazy IRQ is pending. Should be called with IRQs hard disabled.
> + */
> static inline bool lazy_irq_pending(void)
> {
> - return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
> + return __lazy_irq_pending(get_paca()->irq_happened);
> +}
> +
> +/*
> + * Check if a lazy IRQ is pending, with no debugging checks.
> + * Should be called with IRQs hard disabled.
> + * For use in RI disabled code or other constrained situations.
> + */
> +static inline bool lazy_irq_pending_nocheck(void)
> +{
> + return __lazy_irq_pending(local_paca->irq_happened);
> }
>
> /*
> diff --git a/arch/powerpc/kernel/syscall_64.c b/arch/powerpc/kernel/syscall_64.c
> index c74295a7765b..1fe94dd9de32 100644
> --- a/arch/powerpc/kernel/syscall_64.c
> +++ b/arch/powerpc/kernel/syscall_64.c
> @@ -189,7 +189,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
>
> /* This pattern matches prep_irq_for_idle */
> __hard_EE_RI_disable();
> - if (unlikely(lazy_irq_pending())) {
> + if (unlikely(lazy_irq_pending_nocheck())) {
> __hard_RI_enable();
> trace_hardirqs_off();
> local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
> @@ -264,7 +264,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned
>
> trace_hardirqs_on();
> __hard_EE_RI_disable();
> - if (unlikely(lazy_irq_pending())) {
> + if (unlikely(lazy_irq_pending_nocheck())) {
> __hard_RI_enable();
> trace_hardirqs_off();
> local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
> @@ -334,7 +334,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign
>
> trace_hardirqs_on();
> __hard_EE_RI_disable();
> - if (unlikely(lazy_irq_pending())) {
> + if (unlikely(lazy_irq_pending_nocheck())) {
> __hard_RI_enable();
> irq_soft_mask_set(IRQS_ALL_DISABLED);
> trace_hardirqs_off();
> --
> 2.25.1
>
>
^ permalink raw reply
* Re: [PATCH V1 09/10] arch/kmap: Define kmap_atomic_prot() for all arch's
From: Ira Weiny @ 2020-05-03 3:11 UTC (permalink / raw)
To: Al Viro
Cc: Peter Zijlstra, Dave Hansen, dri-devel, linux-mips,
James E.J. Bottomley, Max Filippov, Huang Rui, Paul Mackerras,
H. Peter Anvin, sparclinux, Dan Williams, Helge Deller, x86,
linux-csky, Ingo Molnar, linux-snps-arc, linux-xtensa,
Borislav Petkov, Andy Lutomirski, Thomas Gleixner,
linux-arm-kernel, Chris Zankel, Thomas Bogendoerfer, linux-parisc,
linux-kernel, Christian Koenig, Andrew Morton, linuxppc-dev,
David S. Miller
In-Reply-To: <20200501032020.GG23230@ZenIV.linux.org.uk>
On Fri, May 01, 2020 at 04:20:20AM +0100, Al Viro wrote:
> On Fri, May 01, 2020 at 03:37:34AM +0100, Al Viro wrote:
> > On Thu, Apr 30, 2020 at 01:38:44PM -0700, ira.weiny@intel.com wrote:
> >
> > > -static inline void *kmap_atomic(struct page *page)
> > > +static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot)
> > > {
> > > preempt_disable();
> > > pagefault_disable();
> > > if (!PageHighMem(page))
> > > return page_address(page);
> > > - return kmap_atomic_high(page);
> > > + return kmap_atomic_high_prot(page, prot);
> > > }
> > > +#define kmap_atomic(page) kmap_atomic_prot(page, kmap_prot)
> >
> > OK, so it *was* just a bisect hazard - you return to original semantics
> > wrt preempt_disable()...
>
> FWIW, how about doing the following: just before #5/10 have a patch
> that would touch only microblaze, ppc and x86 splitting their
> kmap_atomic_prot() into an inline helper + kmap_atomic_high_prot().
> Then your #5 would leave their kmap_atomic_prot() as-is (it would
> use kmap_atomic_prot_high() instead). The rest of the series plays
> out pretty much the same way it does now, and wrappers on those
> 3 architectures would go away when an identical generic one is
> introduced in this commit (#9/10).
>
> AFAICS, that would avoid the bisect hazard and might even end
> up with less noise in the patches...
This works. V2 coming out shortly.
Thanks for catching this,
Ira
^ permalink raw reply
* Re: [PATCH v3 3/3] mm/page_alloc: Keep memoryless cpuless node 0 offline
From: Christopher Lameter @ 2020-05-02 23:05 UTC (permalink / raw)
To: Srikar Dronamraju
Cc: Gautham R Shenoy, Michal Hocko, Linus Torvalds, linux-kernel,
linux-mm, Mel Gorman, Kirill A. Shutemov, Andrew Morton,
linuxppc-dev, Vlastimil Babka
In-Reply-To: <20200501031128.19584-4-srikar@linux.vnet.ibm.com>
On Fri, 1 May 2020, Srikar Dronamraju wrote:
> --- a/mm/page_alloc.c
> +++ b/mm/page_alloc.c
> @@ -116,8 +116,10 @@ EXPORT_SYMBOL(latent_entropy);
> */
> nodemask_t node_states[NR_NODE_STATES] __read_mostly = {
> [N_POSSIBLE] = NODE_MASK_ALL,
> +#ifdef CONFIG_NUMA
> + [N_ONLINE] = NODE_MASK_NONE,
Hmmm.... I would have expected that you would have added something early
in boot that would mark the current node (whatever is is) online instead?
^ permalink raw reply
* Re: [PATCH v3 1/3] powerpc/numa: Set numa_node for all possible cpus
From: Christopher Lameter @ 2020-05-02 22:55 UTC (permalink / raw)
To: Srikar Dronamraju
Cc: Gautham R Shenoy, Michal Hocko, Linus Torvalds, linux-kernel,
linux-mm, Mel Gorman, Kirill A. Shutemov, Andrew Morton,
linuxppc-dev, Vlastimil Babka
In-Reply-To: <20200501031128.19584-2-srikar@linux.vnet.ibm.com>
On Fri, 1 May 2020, Srikar Dronamraju wrote:
> - for_each_present_cpu(cpu)
> - numa_setup_cpu(cpu);
> + for_each_possible_cpu(cpu) {
> + /*
> + * Powerpc with CONFIG_NUMA always used to have a node 0,
> + * even if it was memoryless or cpuless. For all cpus that
> + * are possible but not present, cpu_to_node() would point
> + * to node 0. To remove a cpuless, memoryless dummy node,
> + * powerpc need to make sure all possible but not present
> + * cpu_to_node are set to a proper node.
> + */
> + if (cpu_present(cpu))
> + numa_setup_cpu(cpu);
> + else
> + set_cpu_numa_node(cpu, first_online_node);
> + }
> }
Can this be folded into numa_setup_cpu?
This looks more like numa_setup_cpu needs to change?
^ permalink raw reply
* [PATCH] powerpc/5200: update contact email
From: Wolfram Sang @ 2020-05-02 14:26 UTC (permalink / raw)
To: linux-kernel
Cc: devicetree, Wolfram Sang, Rob Herring, Paul Mackerras, kernel,
linuxppc-dev
My 'pengutronix' address is defunct for years. Merge the entries and use
the proper contact address.
Signed-off-by: Wolfram Sang <wsa@kernel.org>
---
arch/powerpc/boot/dts/pcm032.dts | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts
index c259c6b3ac5a..780e13d99e7b 100644
--- a/arch/powerpc/boot/dts/pcm032.dts
+++ b/arch/powerpc/boot/dts/pcm032.dts
@@ -3,9 +3,7 @@
* phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
*
* Copyright (C) 2006-2009 Pengutronix
- * Sascha Hauer <s.hauer@pengutronix.de>
- * Juergen Beisert <j.beisert@pengutronix.de>
- * Wolfram Sang <w.sang@pengutronix.de>
+ * Sascha Hauer, Juergen Beisert, Wolfram Sang <kernel@pengutronix.de>
*/
/include/ "mpc5200b.dtsi"
--
2.20.1
^ permalink raw reply related
* Re: [PATCH 0/7] sha1 library cleanup
From: Jason A. Donenfeld @ 2020-05-02 21:05 UTC (permalink / raw)
To: Eric Biggers
Cc: linux-s390, Theodore Ts'o, linuxppc-dev, LKML, Paul Mackerras,
Linux Crypto Mailing List, Paolo Abeni, mptcp
In-Reply-To: <20200502182427.104383-1-ebiggers@kernel.org>
Thanks for this series. I like the general idea. I think it might make
sense, though, to separate things out into sha1.h and sha256.h. That
will be nice preparation work for when we eventually move obsolete
primitives into some <crypto/dangerous/> subdirectory.
^ permalink raw reply
* [PATCH 0/7] sha1 library cleanup
From: Eric Biggers @ 2020-05-02 18:24 UTC (permalink / raw)
To: linux-crypto
Cc: linux-s390, Jason A . Donenfeld, Theodore Ts'o, linuxppc-dev,
linux-kernel, Paul Mackerras, Paolo Abeni, mptcp
<linux/cryptohash.h> sounds very generic and important, like it's the
header to include if you're doing cryptographic hashing in the kernel.
But actually it only includes the library implementation of the SHA-1
compression function (not even the full SHA-1). This should basically
never be used anymore; SHA-1 is no longer considered secure, and there
are much better ways to do cryptographic hashing in the kernel.
Also the function is named just "sha_transform()", which makes it
unclear which version of SHA is meant.
Therefore, this series cleans things up by moving these SHA-1
declarations into <crypto/sha.h> where they better belong, and changing
the names to say SHA-1 rather than just SHA.
As future work, we should split sha.h into sha1.h and sha2.h and try to
remove the remaining uses of SHA-1. For example, the remaining use in
drivers/char/random.c is probably one that can be gotten rid of.
This patch series applies to cryptodev/master.
Eric Biggers (7):
mptcp: use SHA256_BLOCK_SIZE, not SHA_MESSAGE_BYTES
crypto: powerpc/sha1 - remove unused temporary workspace
crypto: powerpc/sha1 - prefix the "sha1_" functions
crypto: s390/sha1 - prefix the "sha1_" functions
crypto: lib/sha1 - rename "sha" to "sha1"
crypto: lib/sha1 - remove unnecessary includes of linux/cryptohash.h
crypto: lib/sha1 - fold linux/cryptohash.h into crypto/sha.h
Documentation/security/siphash.rst | 2 +-
arch/arm/crypto/sha1_glue.c | 1 -
arch/arm/crypto/sha1_neon_glue.c | 1 -
arch/arm/crypto/sha256_glue.c | 1 -
arch/arm/crypto/sha256_neon_glue.c | 1 -
arch/arm/kernel/armksyms.c | 1 -
arch/arm64/crypto/sha256-glue.c | 1 -
arch/arm64/crypto/sha512-glue.c | 1 -
arch/microblaze/kernel/microblaze_ksyms.c | 1 -
arch/mips/cavium-octeon/crypto/octeon-md5.c | 1 -
arch/powerpc/crypto/md5-glue.c | 1 -
arch/powerpc/crypto/sha1-spe-glue.c | 1 -
arch/powerpc/crypto/sha1.c | 33 ++++++++++-----------
arch/powerpc/crypto/sha256-spe-glue.c | 1 -
arch/s390/crypto/sha1_s390.c | 12 ++++----
arch/sparc/crypto/md5_glue.c | 1 -
arch/sparc/crypto/sha1_glue.c | 1 -
arch/sparc/crypto/sha256_glue.c | 1 -
arch/sparc/crypto/sha512_glue.c | 1 -
arch/unicore32/kernel/ksyms.c | 1 -
arch/x86/crypto/sha1_ssse3_glue.c | 1 -
arch/x86/crypto/sha256_ssse3_glue.c | 1 -
arch/x86/crypto/sha512_ssse3_glue.c | 1 -
crypto/sha1_generic.c | 5 ++--
drivers/char/random.c | 8 ++---
drivers/crypto/atmel-sha.c | 1 -
drivers/crypto/chelsio/chcr_algo.c | 1 -
drivers/crypto/chelsio/chcr_ipsec.c | 1 -
drivers/crypto/omap-sham.c | 1 -
fs/f2fs/hash.c | 1 -
include/crypto/sha.h | 10 +++++++
include/linux/cryptohash.h | 14 ---------
include/linux/filter.h | 4 +--
include/net/tcp.h | 1 -
kernel/bpf/core.c | 18 +++++------
lib/crypto/chacha.c | 1 -
lib/sha1.c | 24 ++++++++-------
net/core/secure_seq.c | 1 -
net/ipv6/addrconf.c | 10 +++----
net/ipv6/seg6_hmac.c | 1 -
net/mptcp/crypto.c | 4 +--
41 files changed, 69 insertions(+), 104 deletions(-)
delete mode 100644 include/linux/cryptohash.h
base-commit: 12b3cf9093542d9f752a4968815ece836159013f
--
2.26.2
^ permalink raw reply
* [PATCH 2/7] crypto: powerpc/sha1 - remove unused temporary workspace
From: Eric Biggers @ 2020-05-02 18:24 UTC (permalink / raw)
To: linux-crypto
Cc: Jason A . Donenfeld, Theodore Ts'o, linux-kernel,
Paul Mackerras, linuxppc-dev
In-Reply-To: <20200502182427.104383-1-ebiggers@kernel.org>
From: Eric Biggers <ebiggers@google.com>
The PowerPC implementation of SHA-1 doesn't actually use the 16-word
temporary array that's passed to the assembly code. This was probably
meant to correspond to the 'W' array that lib/sha1.c uses. However, in
sha1-powerpc-asm.S these values are actually stored in GPRs 16-31.
Referencing SHA_WORKSPACE_WORDS from this code also isn't appropriate,
since it's an implementation detail of lib/sha1.c.
Therefore, just remove this unneeded array.
Tested with:
export ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnu-
make mpc85xx_defconfig
cat >> .config << EOF
# CONFIG_MODULES is not set
# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
CONFIG_DEBUG_KERNEL=y
CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y
CONFIG_CRYPTO_SHA1_PPC=y
EOF
make olddefconfig
make -j32
qemu-system-ppc -M mpc8544ds -cpu e500 -nographic \
-kernel arch/powerpc/boot/zImage \
-append "cryptomgr.fuzz_iterations=1000 cryptomgr.panic_on_fail=1"
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Eric Biggers <ebiggers@google.com>
---
arch/powerpc/crypto/sha1.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/crypto/sha1.c b/arch/powerpc/crypto/sha1.c
index 7b43fc352089b1..db46b6130a9642 100644
--- a/arch/powerpc/crypto/sha1.c
+++ b/arch/powerpc/crypto/sha1.c
@@ -16,12 +16,11 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mm.h>
-#include <linux/cryptohash.h>
#include <linux/types.h>
#include <crypto/sha.h>
#include <asm/byteorder.h>
-extern void powerpc_sha_transform(u32 *state, const u8 *src, u32 *temp);
+void powerpc_sha_transform(u32 *state, const u8 *src);
static int sha1_init(struct shash_desc *desc)
{
@@ -47,7 +46,6 @@ static int sha1_update(struct shash_desc *desc, const u8 *data,
src = data;
if ((partial + len) > 63) {
- u32 temp[SHA_WORKSPACE_WORDS];
if (partial) {
done = -partial;
@@ -56,12 +54,11 @@ static int sha1_update(struct shash_desc *desc, const u8 *data,
}
do {
- powerpc_sha_transform(sctx->state, src, temp);
+ powerpc_sha_transform(sctx->state, src);
done += 64;
src = data + done;
} while (done + 63 < len);
- memzero_explicit(temp, sizeof(temp));
partial = 0;
}
memcpy(sctx->buffer + partial, src, len - done);
--
2.26.2
^ permalink raw reply related
* [PATCH 3/7] crypto: powerpc/sha1 - prefix the "sha1_" functions
From: Eric Biggers @ 2020-05-02 18:24 UTC (permalink / raw)
To: linux-crypto
Cc: Jason A . Donenfeld, Theodore Ts'o, linux-kernel,
Paul Mackerras, linuxppc-dev
In-Reply-To: <20200502182427.104383-1-ebiggers@kernel.org>
From: Eric Biggers <ebiggers@google.com>
Prefix the PowerPC SHA-1 functions with "powerpc_sha1_" rather than
"sha1_". This allows us to rename the library function sha_init() to
sha1_init() without causing a naming collision.
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Eric Biggers <ebiggers@google.com>
---
arch/powerpc/crypto/sha1.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/crypto/sha1.c b/arch/powerpc/crypto/sha1.c
index db46b6130a9642..b40dc50a6908ae 100644
--- a/arch/powerpc/crypto/sha1.c
+++ b/arch/powerpc/crypto/sha1.c
@@ -22,7 +22,7 @@
void powerpc_sha_transform(u32 *state, const u8 *src);
-static int sha1_init(struct shash_desc *desc)
+static int powerpc_sha1_init(struct shash_desc *desc)
{
struct sha1_state *sctx = shash_desc_ctx(desc);
@@ -33,8 +33,8 @@ static int sha1_init(struct shash_desc *desc)
return 0;
}
-static int sha1_update(struct shash_desc *desc, const u8 *data,
- unsigned int len)
+static int powerpc_sha1_update(struct shash_desc *desc, const u8 *data,
+ unsigned int len)
{
struct sha1_state *sctx = shash_desc_ctx(desc);
unsigned int partial, done;
@@ -68,7 +68,7 @@ static int sha1_update(struct shash_desc *desc, const u8 *data,
/* Add padding and return the message digest. */
-static int sha1_final(struct shash_desc *desc, u8 *out)
+static int powerpc_sha1_final(struct shash_desc *desc, u8 *out)
{
struct sha1_state *sctx = shash_desc_ctx(desc);
__be32 *dst = (__be32 *)out;
@@ -81,10 +81,10 @@ static int sha1_final(struct shash_desc *desc, u8 *out)
/* Pad out to 56 mod 64 */
index = sctx->count & 0x3f;
padlen = (index < 56) ? (56 - index) : ((64+56) - index);
- sha1_update(desc, padding, padlen);
+ powerpc_sha1_update(desc, padding, padlen);
/* Append length */
- sha1_update(desc, (const u8 *)&bits, sizeof(bits));
+ powerpc_sha1_update(desc, (const u8 *)&bits, sizeof(bits));
/* Store state in digest */
for (i = 0; i < 5; i++)
@@ -96,7 +96,7 @@ static int sha1_final(struct shash_desc *desc, u8 *out)
return 0;
}
-static int sha1_export(struct shash_desc *desc, void *out)
+static int powerpc_sha1_export(struct shash_desc *desc, void *out)
{
struct sha1_state *sctx = shash_desc_ctx(desc);
@@ -104,7 +104,7 @@ static int sha1_export(struct shash_desc *desc, void *out)
return 0;
}
-static int sha1_import(struct shash_desc *desc, const void *in)
+static int powerpc_sha1_import(struct shash_desc *desc, const void *in)
{
struct sha1_state *sctx = shash_desc_ctx(desc);
@@ -114,11 +114,11 @@ static int sha1_import(struct shash_desc *desc, const void *in)
static struct shash_alg alg = {
.digestsize = SHA1_DIGEST_SIZE,
- .init = sha1_init,
- .update = sha1_update,
- .final = sha1_final,
- .export = sha1_export,
- .import = sha1_import,
+ .init = powerpc_sha1_init,
+ .update = powerpc_sha1_update,
+ .final = powerpc_sha1_final,
+ .export = powerpc_sha1_export,
+ .import = powerpc_sha1_import,
.descsize = sizeof(struct sha1_state),
.statesize = sizeof(struct sha1_state),
.base = {
--
2.26.2
^ permalink raw reply related
* Re: [PATCH v2 2/3] mm/memory_hotplug: Introduce MHP_NO_FIRMWARE_MEMMAP
From: Dan Williams @ 2020-05-02 18:03 UTC (permalink / raw)
To: David Hildenbrand
Cc: virtio-dev, linux-hyperv, Michal Hocko, Baoquan He, Linux ACPI,
Wei Yang, linux-s390, linux-nvdimm, Linux Kernel Mailing List,
Dave Hansen, virtualization, Linux MM, Michael S . Tsirkin,
Eric W. Biederman, Pankaj Gupta, xen-devel, Andrew Morton,
Michal Hocko, linuxppc-dev
In-Reply-To: <467ccba3-80ac-085c-3127-d5618d77d3e0@redhat.com>
On Sat, May 2, 2020 at 2:27 AM David Hildenbrand <david@redhat.com> wrote:
>
> >> Now, let's clarify what I want regarding virtio-mem:
> >>
> >> 1. kexec should not add virtio-mem memory to the initial firmware
> >> memmap. The driver has to be in charge as discussed.
> >> 2. kexec should not place kexec images onto virtio-mem memory. That
> >> would end badly.
> >> 3. kexec should still dump virtio-mem memory via kdump.
> >
> > Ok, but then seems to say to me that dax/kmem is a different type of
> > (driver managed) than virtio-mem and it's confusing to try to apply
> > the same meaning. Why not just call your type for the distinct type it
> > is "System RAM (virtio-mem)" and let any other driver managed memory
> > follow the same "System RAM ($driver)" format if it wants?
>
> I had the same idea but discarded it because it seemed to uglify the
> add_memory() interface (passing yet another parameter only relevant for
> driver managed memory). Maybe we really want a new one, because I like
> that idea:
>
> /*
> * Add special, driver-managed memory to the system as system ram.
> * The resource_name is expected to have the name format "System RAM
> * ($DRIVER)", so user space (esp. kexec-tools)" can special-case it.
> *
> * For this memory, no entries in /sys/firmware/memmap are created,
> * as this memory won't be part of the raw firmware-provided memory map
> * e.g., after a reboot. Also, the created memory resource is flagged
> * with IORESOURCE_MEM_DRIVER_MANAGED, so in-kernel users can special-
> * case this memory (e.g., not place kexec images onto it).
> */
> int add_memory_driver_managed(int nid, u64 start, u64 size,
> const char *resource_name);
>
>
> If we'd ever have to special case it even more in the kernel, we could
> allow to specify further resource flags. While passing the driver name
> instead of the resource_name would be an option, this way we don't have
> to hand craft new resource strings for added memory resources.
>
> Thoughts?
Looks useful to me and simplifies walking /proc/iomem. I personally
like the safety of the string just being the $driver component of the
name, but I won't lose sleep if the interface stays freeform like you
propose.
^ permalink raw reply
* [PATCH] powerpc/64s: Fix unrecoverable SLB crashes due to preemption check
From: Michael Ellerman @ 2020-05-02 14:33 UTC (permalink / raw)
To: linuxppc-dev; +Cc: hughd, npiggin
Hugh reported that his trusty G5 crashed after a few hours under load
with an "Unrecoverable exception 380".
The crash is in interrupt_return() where we check lazy_irq_pending(),
which calls get_paca() and with CONFIG_DEBUG_PREEMPT=y that goes to
check_preemption_disabled() via debug_smp_processor_id().
As Nick explained on the list:
Problem is MSR[RI] is cleared here, ready to do the last few things
for interrupt return where we're not allowed to take any other
interrupts.
SLB interrupts can happen just about anywhere aside from kernel
text, global variables, and stack. When that hits, it appears to be
unrecoverable due to RI=0.
The problematic access is in preempt_count() which is:
return READ_ONCE(current_thread_info()->preempt_count);
Because of THREAD_INFO_IN_TASK, current_thread_info() just points to
current, so the access is to somewhere in kernel memory, but not on
the stack or in .data, which means it can cause an SLB miss. If we
take an SLB miss with RI=0 it is fatal.
The easiest solution is to add a version of lazy_irq_pending() that
doesn't do the preemption check and call it from the interrupt return
path.
Fixes: 68b34588e202 ("powerpc/64/sycall: Implement syscall entry/exit logic in C")
Reported-by: Hugh Dickins <hughd@google.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
arch/powerpc/include/asm/hw_irq.h | 20 +++++++++++++++++++-
arch/powerpc/kernel/syscall_64.c | 6 +++---
2 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index e0e71777961f..3a0db7b0b46e 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -250,9 +250,27 @@ static inline bool arch_irqs_disabled(void)
} \
} while(0)
+static inline bool __lazy_irq_pending(u8 irq_happened)
+{
+ return !!(irq_happened & ~PACA_IRQ_HARD_DIS);
+}
+
+/*
+ * Check if a lazy IRQ is pending. Should be called with IRQs hard disabled.
+ */
static inline bool lazy_irq_pending(void)
{
- return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
+ return __lazy_irq_pending(get_paca()->irq_happened);
+}
+
+/*
+ * Check if a lazy IRQ is pending, with no debugging checks.
+ * Should be called with IRQs hard disabled.
+ * For use in RI disabled code or other constrained situations.
+ */
+static inline bool lazy_irq_pending_nocheck(void)
+{
+ return __lazy_irq_pending(local_paca->irq_happened);
}
/*
diff --git a/arch/powerpc/kernel/syscall_64.c b/arch/powerpc/kernel/syscall_64.c
index c74295a7765b..1fe94dd9de32 100644
--- a/arch/powerpc/kernel/syscall_64.c
+++ b/arch/powerpc/kernel/syscall_64.c
@@ -189,7 +189,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long r3,
/* This pattern matches prep_irq_for_idle */
__hard_EE_RI_disable();
- if (unlikely(lazy_irq_pending())) {
+ if (unlikely(lazy_irq_pending_nocheck())) {
__hard_RI_enable();
trace_hardirqs_off();
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
@@ -264,7 +264,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned
trace_hardirqs_on();
__hard_EE_RI_disable();
- if (unlikely(lazy_irq_pending())) {
+ if (unlikely(lazy_irq_pending_nocheck())) {
__hard_RI_enable();
trace_hardirqs_off();
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
@@ -334,7 +334,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign
trace_hardirqs_on();
__hard_EE_RI_disable();
- if (unlikely(lazy_irq_pending())) {
+ if (unlikely(lazy_irq_pending_nocheck())) {
__hard_RI_enable();
irq_soft_mask_set(IRQS_ALL_DISABLED);
trace_hardirqs_off();
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v7 11/28] powerpc: Use a datatype for instructions
From: kbuild test robot @ 2020-05-02 14:29 UTC (permalink / raw)
To: Jordan Niethe, linuxppc-dev
Cc: kbuild-all, alistair, npiggin, bala24, Jordan Niethe,
naveen.n.rao, dja
In-Reply-To: <20200501034220.8982-12-jniethe5@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 14614 bytes --]
Hi Jordan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v5.7-rc3 next-20200501]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Jordan-Niethe/Initial-Prefixed-Instruction-support/20200501-124644
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-a001-20200501 (attached as .config)
compiler: powerpc-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
arch/powerpc/mm/nohash/8xx.c: In function 'mmu_patch_addis':
>> arch/powerpc/mm/nohash/8xx.c:104:31: error: incompatible type for argument 2 of 'patch_instruction_site'
104 | patch_instruction_site(site, instr);
| ^~~~~
| |
| unsigned int
In file included from arch/powerpc/mm/nohash/8xx.c:13:
arch/powerpc/include/asm/code-patching.h:39:69: note: expected 'struct ppc_inst' but argument is of type 'unsigned int'
39 | static inline int patch_instruction_site(s32 *site, struct ppc_inst instr)
| ~~~~~~~~~~~~~~~~^~~~~
In file included from arch/powerpc/include/asm/asm-compat.h:6,
from arch/powerpc/include/asm/bug.h:6,
from include/linux/bug.h:5,
from include/linux/mmdebug.h:5,
from include/linux/mm.h:9,
from include/linux/memblock.h:13,
from arch/powerpc/mm/nohash/8xx.c:10:
arch/powerpc/mm/nohash/8xx.c: In function 'mmu_mapin_ram':
>> arch/powerpc/include/asm/ppc-opcode.h:234:24: error: incompatible type for argument 2 of 'patch_instruction_site'
234 | #define PPC_INST_NOP 0x60000000
| ^~~~~~~~~~
| |
| int
>> arch/powerpc/mm/nohash/8xx.c:128:54: note: in expansion of macro 'PPC_INST_NOP'
128 | patch_instruction_site(&patch__dtlbmiss_immr_jmp, PPC_INST_NOP);
| ^~~~~~~~~~~~
In file included from arch/powerpc/mm/nohash/8xx.c:13:
arch/powerpc/include/asm/code-patching.h:39:69: note: expected 'struct ppc_inst' but argument is of type 'int'
39 | static inline int patch_instruction_site(s32 *site, struct ppc_inst instr)
| ~~~~~~~~~~~~~~~~^~~~~
--
In file included from include/linux/printk.h:7,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/preempt.h:11,
from include/linux/spinlock.h:51,
from arch/powerpc/kernel/trace/ftrace.c:16:
arch/powerpc/kernel/trace/ftrace.c: In function '__ftrace_make_nop':
>> include/linux/kern_levels.h:5:18: error: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'struct ppc_inst' [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
include/linux/kern_levels.h:11:18: note: in expansion of macro 'KERN_SOH'
11 | #define KERN_ERR KERN_SOH "3" /* error conditions */
| ^~~~~~~~
include/linux/printk.h:299:9: note: in expansion of macro 'KERN_ERR'
299 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~
>> arch/powerpc/kernel/trace/ftrace.c:233:3: note: in expansion of macro 'pr_err'
233 | pr_err("Not expected bl: opcode is %x\n", op);
| ^~~~~~
arch/powerpc/kernel/trace/ftrace.c:233:39: note: format string is defined here
233 | pr_err("Not expected bl: opcode is %x\n", op);
| ~^
| |
| unsigned int
In file included from include/linux/printk.h:7,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/preempt.h:11,
from include/linux/spinlock.h:51,
from arch/powerpc/kernel/trace/ftrace.c:16:
arch/powerpc/kernel/trace/ftrace.c: In function '__ftrace_make_call':
>> include/linux/kern_levels.h:5:18: error: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'struct ppc_inst' [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
include/linux/kern_levels.h:11:18: note: in expansion of macro 'KERN_SOH'
11 | #define KERN_ERR KERN_SOH "3" /* error conditions */
| ^~~~~~~~
include/linux/printk.h:299:9: note: in expansion of macro 'KERN_ERR'
299 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~
arch/powerpc/kernel/trace/ftrace.c:595:3: note: in expansion of macro 'pr_err'
595 | pr_err("Expected NOP but have %x\n", op);
| ^~~~~~
arch/powerpc/kernel/trace/ftrace.c:595:34: note: format string is defined here
595 | pr_err("Expected NOP but have %x\n", op);
| ~^
| |
| unsigned int
>> arch/powerpc/kernel/trace/ftrace.c:615:24: error: passing argument 1 of 'patch_instruction' from incompatible pointer type [-Werror=incompatible-pointer-types]
615 | if (patch_instruction((unsigned int *)ip, op))
| ^~~~~~~~~~~~~~~~~~
| |
| unsigned int *
In file included from arch/powerpc/kernel/trace/ftrace.c:27:
arch/powerpc/include/asm/code-patching.h:31:40: note: expected 'struct ppc_inst *' but argument is of type 'unsigned int *'
31 | int patch_instruction(struct ppc_inst *addr, struct ppc_inst instr);
| ~~~~~~~~~~~~~~~~~^~~~
cc1: all warnings being treated as errors
vim +/patch_instruction_site +104 arch/powerpc/mm/nohash/8xx.c
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 97
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 98 static void mmu_patch_addis(s32 *site, long simm)
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 99 {
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 100 unsigned int instr = *(unsigned int *)patch_site_addr(site);
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 101
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 102 instr &= 0xffff0000;
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 103 instr |= ((unsigned long)simm) >> 16;
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 @104 patch_instruction_site(site, instr);
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 105 }
d5f17ee9644773 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 106
0601546f23fb70 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-12-14 107 static void mmu_mapin_ram_chunk(unsigned long offset, unsigned long top, pgprot_t prot)
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 108 {
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 109 unsigned long s = offset;
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 110 unsigned long v = PAGE_OFFSET + s;
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 111 phys_addr_t p = memstart_addr + s;
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 112
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 113 for (; s < top; s += PAGE_SIZE) {
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 114 map_kernel_page(v, p, prot);
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 115 v += PAGE_SIZE;
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 116 p += PAGE_SIZE;
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 117 }
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 118 }
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 119
14e609d693ef67 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-21 120 unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 121 {
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 122 unsigned long mapped;
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 123
4badd43ae44109 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 124 if (__map_without_ltlbs) {
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 125 mapped = 0;
4badd43ae44109 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 126 mmu_mapin_immr();
665bed2386e5dc arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-13 127 if (!IS_ENABLED(CONFIG_PIN_TLB_IMMR))
1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 @128 patch_instruction_site(&patch__dtlbmiss_immr_jmp, PPC_INST_NOP);
665bed2386e5dc arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-13 129 if (!IS_ENABLED(CONFIG_PIN_TLB_TEXT))
1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 130 mmu_patch_cmp_limit(&patch__itlbmiss_linmem_top, 0);
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 131 } else {
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 132 unsigned long einittext8 = ALIGN(__pa(_einittext), SZ_8M);
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 133
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 134 mapped = top & ~(LARGE_PAGE_SIZE_8M - 1);
e4470bd6a41477 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2019-02-13 135 if (!IS_ENABLED(CONFIG_PIN_TLB_TEXT))
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 136 mmu_patch_cmp_limit(&patch__itlbmiss_linmem_top, einittext8);
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 137
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 138 /*
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 139 * Populate page tables to:
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 140 * - have them appear in /sys/kernel/debug/kernel_page_tables
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 141 * - allow the BDI to find the pages when they are not PINNED
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 142 */
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 143 mmu_mapin_ram_chunk(0, einittext8, PAGE_KERNEL_X);
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 144 mmu_mapin_ram_chunk(einittext8, mapped, PAGE_KERNEL);
a2227a27774328 arch/powerpc/mm/nohash/8xx.c Christophe Leroy 2019-08-23 145 mmu_mapin_immr();
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 146 }
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 147
1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 148 mmu_patch_cmp_limit(&patch__dtlbmiss_linmem_top, mapped);
1a210878bf21de arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2018-10-19 149 mmu_patch_cmp_limit(&patch__fixupdar_linmem_top, mapped);
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 150
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 151 /* If the size of RAM is not an exact power of two, we may not
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 152 * have covered RAM in its entirety with 8 MiB
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 153 * pages. Consequently, restrict the top end of RAM currently
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 154 * allocable so that calls to the MEMBLOCK to allocate PTEs for "tail"
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 155 * coverage with normal-sized pages (or other reasons) do not
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 156 * attempt to allocate outside the allowed range.
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 157 */
bb7f380849f8c8 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-05-17 158 if (mapped)
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 159 memblock_set_current_limit(mapped);
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 160
eef784bbe775e6 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2017-07-12 161 block_mapped_ram = mapped;
eef784bbe775e6 arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2017-07-12 162
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 163 return mapped;
a372acfac51e0d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 164 }
516d91893b548d arch/powerpc/mm/8xx_mmu.c Christophe Leroy 2016-02-09 165
:::::: The code at line 104 was first introduced by commit
:::::: d5f17ee96447736a84bc44ffc4b0dddb1b519222 powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX
:::::: TO: Christophe Leroy <christophe.leroy@c-s.fr>
:::::: CC: Michael Ellerman <mpe@ellerman.id.au>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 31894 bytes --]
^ permalink raw reply
* [powerpc:next-test] BUILD SUCCESS 64c245a2974a376bb02dd94d1d03719d3a167e86
From: kbuild test robot @ 2020-05-02 12:24 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next-test
branch HEAD: 64c245a2974a376bb02dd94d1d03719d3a167e86 Merge branch 'topic/uaccess-ppc' into next-test
elapsed time: 766m
configs tested: 209
configs skipped: 0
The following configs have been built successfully.
More configs may be tested in the coming days.
arm64 allyesconfig
arm allyesconfig
arm64 allmodconfig
arm allmodconfig
arm64 allnoconfig
arm allnoconfig
arm efm32_defconfig
arm at91_dt_defconfig
arm shmobile_defconfig
arm64 defconfig
arm exynos_defconfig
arm multi_v5_defconfig
arm sunxi_defconfig
arm multi_v7_defconfig
sparc allyesconfig
powerpc defconfig
ia64 defconfig
arc defconfig
mips ar7_defconfig
mips ath79_defconfig
mips allmodconfig
nios2 3c120_defconfig
sparc64 defconfig
csky defconfig
sh rsk7269_defconfig
ia64 allnoconfig
nds32 allnoconfig
m68k sun3_defconfig
i386 allnoconfig
i386 allyesconfig
i386 alldefconfig
i386 defconfig
i386 debian-10.3
ia64 allmodconfig
ia64 generic_defconfig
ia64 tiger_defconfig
ia64 bigsur_defconfig
ia64 allyesconfig
ia64 alldefconfig
m68k m5475evb_defconfig
m68k allmodconfig
m68k bvme6000_defconfig
m68k multi_defconfig
nios2 10m50_defconfig
c6x evmc6678_defconfig
c6x allyesconfig
openrisc simple_smp_defconfig
openrisc or1ksim_defconfig
nds32 defconfig
alpha defconfig
h8300 h8s-sim_defconfig
h8300 edosk2674_defconfig
xtensa iss_defconfig
h8300 h8300h-sim_defconfig
xtensa common_defconfig
arc allyesconfig
microblaze mmu_defconfig
microblaze nommu_defconfig
mips fuloong2e_defconfig
mips malta_kvm_defconfig
mips allyesconfig
mips 64r6el_defconfig
mips allnoconfig
mips 32r2_defconfig
mips malta_kvm_guest_defconfig
mips tb0287_defconfig
mips capcella_defconfig
mips ip32_defconfig
mips decstation_64_defconfig
mips loongson3_defconfig
mips bcm63xx_defconfig
parisc allnoconfig
parisc generic-64bit_defconfig
parisc generic-32bit_defconfig
parisc allyesconfig
parisc allmodconfig
powerpc chrp32_defconfig
powerpc holly_defconfig
powerpc ppc64_defconfig
powerpc rhel-kconfig
powerpc allnoconfig
powerpc mpc866_ads_defconfig
powerpc amigaone_defconfig
powerpc adder875_defconfig
powerpc ep8248e_defconfig
powerpc g5_defconfig
powerpc mpc512x_defconfig
m68k randconfig-a001-20200502
mips randconfig-a001-20200502
nds32 randconfig-a001-20200502
alpha randconfig-a001-20200502
parisc randconfig-a001-20200502
riscv randconfig-a001-20200502
h8300 randconfig-a001-20200502
nios2 randconfig-a001-20200502
microblaze randconfig-a001-20200502
c6x randconfig-a001-20200502
sparc64 randconfig-a001-20200502
s390 randconfig-a001-20200502
xtensa randconfig-a001-20200502
sh randconfig-a001-20200502
openrisc randconfig-a001-20200502
csky randconfig-a001-20200502
x86_64 randconfig-a003-20200502
x86_64 randconfig-a001-20200502
x86_64 randconfig-a002-20200502
i386 randconfig-a002-20200502
i386 randconfig-a003-20200502
i386 randconfig-a001-20200502
i386 randconfig-b003-20200502
i386 randconfig-b001-20200502
x86_64 randconfig-b003-20200502
x86_64 randconfig-b001-20200502
i386 randconfig-b002-20200502
i386 randconfig-b003-20200501
x86_64 randconfig-b002-20200501
i386 randconfig-b001-20200501
x86_64 randconfig-b003-20200501
x86_64 randconfig-b001-20200501
i386 randconfig-b002-20200501
x86_64 randconfig-c002-20200502
i386 randconfig-c002-20200502
i386 randconfig-c001-20200502
i386 randconfig-c003-20200502
i386 randconfig-d003-20200502
i386 randconfig-d001-20200502
x86_64 randconfig-d002-20200502
i386 randconfig-d002-20200502
x86_64 randconfig-e003-20200502
i386 randconfig-e003-20200502
x86_64 randconfig-e001-20200502
i386 randconfig-e002-20200502
i386 randconfig-e001-20200502
x86_64 randconfig-e002-20200430
i386 randconfig-e003-20200430
x86_64 randconfig-e003-20200430
i386 randconfig-e002-20200430
x86_64 randconfig-e001-20200430
i386 randconfig-e001-20200430
i386 randconfig-f003-20200502
x86_64 randconfig-f001-20200502
x86_64 randconfig-f003-20200502
x86_64 randconfig-f002-20200502
i386 randconfig-f001-20200502
i386 randconfig-f002-20200502
x86_64 randconfig-g003-20200502
i386 randconfig-g003-20200502
i386 randconfig-g002-20200502
x86_64 randconfig-g001-20200502
x86_64 randconfig-g002-20200502
i386 randconfig-g001-20200502
i386 randconfig-h001-20200502
i386 randconfig-h002-20200502
i386 randconfig-h003-20200502
x86_64 randconfig-h002-20200502
x86_64 randconfig-h001-20200502
x86_64 randconfig-h003-20200502
i386 randconfig-h001-20200501
i386 randconfig-h002-20200501
i386 randconfig-h003-20200501
x86_64 randconfig-h001-20200501
x86_64 randconfig-h003-20200501
sparc randconfig-a001-20200430
arc randconfig-a001-20200430
ia64 randconfig-a001-20200430
powerpc randconfig-a001-20200430
arm randconfig-a001-20200430
ia64 randconfig-a001-20200502
arm64 randconfig-a001-20200502
arc randconfig-a001-20200502
powerpc randconfig-a001-20200502
arm randconfig-a001-20200502
sparc randconfig-a001-20200502
ia64 randconfig-a001-20200501
arc randconfig-a001-20200501
powerpc randconfig-a001-20200501
arm randconfig-a001-20200501
sparc randconfig-a001-20200501
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
s390 zfcpdump_defconfig
s390 debug_defconfig
s390 allyesconfig
s390 allnoconfig
s390 allmodconfig
s390 alldefconfig
s390 defconfig
sh allmodconfig
sh titan_defconfig
sh sh7785lcr_32bit_defconfig
sh allnoconfig
sparc defconfig
sparc64 allnoconfig
sparc64 allyesconfig
sparc64 allmodconfig
um x86_64_defconfig
um i386_defconfig
um defconfig
x86_64 rhel
x86_64 rhel-7.6
x86_64 rhel-7.6-kselftests
x86_64 rhel-7.2-clear
x86_64 lkp
x86_64 fedora-25
x86_64 kexec
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
* [PATCH] powerpc/powernv: Fix a warning message
From: Christophe JAILLET @ 2020-05-02 11:59 UTC (permalink / raw)
To: mpe, benh, paulus, npiggin, tglx, maddy, cclaudio, zhangshaokun,
atrajeev, akshay.adiga, ego
Cc: kernel-janitors, Christophe JAILLET, linuxppc-dev, linux-kernel
Fix a cut'n'paste error in a warning message. This should be
'cpu-idle-state-residency-ns' to match the property searched in the
previous 'of_property_read_u32_array()'
Fixes: 9c7b185ab2fe ("powernv/cpuidle: Parse dt idle properties into global structure")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
---
arch/powerpc/platforms/powernv/idle.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 78599bca66c2..2dd467383a88 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -1270,7 +1270,7 @@ static int pnv_parse_cpuidle_dt(void)
/* Read residencies */
if (of_property_read_u32_array(np, "ibm,cpu-idle-state-residency-ns",
temp_u32, nr_idle_states)) {
- pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n");
+ pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-residency-ns in DT\n");
rc = -EINVAL;
goto out;
}
--
2.25.1
^ permalink raw reply related
* Re: [RFC 1/3] powernv/cpuidle : Support for pre-entry and post exit of stop state in firmware
From: Nicholas Piggin @ 2020-05-02 11:40 UTC (permalink / raw)
To: Abhishek, linux-kernel, linuxppc-dev; +Cc: ego, mikey, psampat, oohall, skiboot
In-Reply-To: <66ce544a-c1bf-4e84-2a7c-7480bbc0e12c@linux.vnet.ibm.com>
Excerpts from Abhishek's message of April 30, 2020 3:52 pm:
> Hi Nick,
>
> Have you posted out the kernel side of "opal v4" patchset?
> I could only find the opal patchset.
I just posted some new ones. I have some change sfor the cpuidle side
but I haven't really looked to see what needs reconciling with your
version, but I'll try to do that when I get time.
Thanks,
Nick
^ permalink raw reply
* [powerpc:topic/uaccess] BUILD SUCCESS b44f687386875b714dae2afa768e73401e45c21c
From: kbuild test robot @ 2020-05-02 11:38 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git topic/uaccess
branch HEAD: b44f687386875b714dae2afa768e73401e45c21c drm/i915/gem: Replace user_access_begin by user_write_access_begin
elapsed time: 695m
configs tested: 193
configs skipped: 0
The following configs have been built successfully.
More configs may be tested in the coming days.
arm64 allyesconfig
arm allyesconfig
arm64 allmodconfig
arm allmodconfig
arm64 allnoconfig
arm allnoconfig
arm efm32_defconfig
arm at91_dt_defconfig
arm shmobile_defconfig
arm64 defconfig
arm exynos_defconfig
arm multi_v5_defconfig
arm sunxi_defconfig
arm multi_v7_defconfig
sparc allyesconfig
arc allyesconfig
powerpc defconfig
ia64 defconfig
i386 alldefconfig
openrisc simple_smp_defconfig
arc defconfig
mips ar7_defconfig
s390 allnoconfig
mips allnoconfig
mips allmodconfig
sparc64 defconfig
csky defconfig
sh rsk7269_defconfig
ia64 allnoconfig
powerpc mpc512x_defconfig
sh sh7785lcr_32bit_defconfig
xtensa iss_defconfig
um defconfig
nds32 allnoconfig
m68k sun3_defconfig
i386 allnoconfig
i386 allyesconfig
i386 defconfig
i386 debian-10.3
ia64 allmodconfig
ia64 generic_defconfig
ia64 tiger_defconfig
ia64 bigsur_defconfig
ia64 allyesconfig
ia64 alldefconfig
m68k m5475evb_defconfig
m68k allmodconfig
m68k bvme6000_defconfig
m68k multi_defconfig
nios2 3c120_defconfig
nios2 10m50_defconfig
c6x evmc6678_defconfig
c6x allyesconfig
openrisc or1ksim_defconfig
nds32 defconfig
alpha defconfig
h8300 h8s-sim_defconfig
h8300 edosk2674_defconfig
h8300 h8300h-sim_defconfig
xtensa common_defconfig
microblaze mmu_defconfig
microblaze nommu_defconfig
mips fuloong2e_defconfig
mips malta_kvm_defconfig
mips allyesconfig
mips 64r6el_defconfig
mips 32r2_defconfig
mips malta_kvm_guest_defconfig
mips tb0287_defconfig
mips capcella_defconfig
mips ip32_defconfig
mips decstation_64_defconfig
mips loongson3_defconfig
mips ath79_defconfig
mips bcm63xx_defconfig
parisc allnoconfig
parisc generic-64bit_defconfig
parisc generic-32bit_defconfig
parisc allyesconfig
parisc allmodconfig
powerpc chrp32_defconfig
powerpc holly_defconfig
powerpc ppc64_defconfig
powerpc rhel-kconfig
powerpc allnoconfig
powerpc mpc866_ads_defconfig
powerpc amigaone_defconfig
powerpc adder875_defconfig
powerpc ep8248e_defconfig
powerpc g5_defconfig
m68k randconfig-a001-20200502
mips randconfig-a001-20200502
nds32 randconfig-a001-20200502
alpha randconfig-a001-20200502
parisc randconfig-a001-20200502
riscv randconfig-a001-20200502
h8300 randconfig-a001-20200502
nios2 randconfig-a001-20200502
microblaze randconfig-a001-20200502
c6x randconfig-a001-20200502
sparc64 randconfig-a001-20200502
s390 randconfig-a001-20200502
xtensa randconfig-a001-20200502
sh randconfig-a001-20200502
openrisc randconfig-a001-20200502
csky randconfig-a001-20200502
x86_64 randconfig-a003-20200502
x86_64 randconfig-a001-20200502
x86_64 randconfig-a002-20200502
i386 randconfig-a002-20200502
i386 randconfig-a003-20200502
i386 randconfig-a001-20200502
i386 randconfig-b003-20200502
i386 randconfig-b001-20200502
x86_64 randconfig-b003-20200502
x86_64 randconfig-b001-20200502
i386 randconfig-b002-20200502
i386 randconfig-b003-20200501
x86_64 randconfig-b002-20200501
i386 randconfig-b001-20200501
x86_64 randconfig-b003-20200501
x86_64 randconfig-b001-20200501
i386 randconfig-b002-20200501
x86_64 randconfig-c002-20200502
i386 randconfig-c002-20200502
i386 randconfig-c001-20200502
i386 randconfig-c003-20200502
i386 randconfig-d003-20200502
i386 randconfig-d001-20200502
x86_64 randconfig-d002-20200502
i386 randconfig-d002-20200502
x86_64 randconfig-e003-20200502
i386 randconfig-e003-20200502
x86_64 randconfig-e001-20200502
i386 randconfig-e002-20200502
i386 randconfig-e001-20200502
i386 randconfig-f003-20200502
x86_64 randconfig-f001-20200502
x86_64 randconfig-f003-20200502
x86_64 randconfig-f002-20200502
i386 randconfig-f001-20200502
i386 randconfig-f002-20200502
x86_64 randconfig-g003-20200502
i386 randconfig-g003-20200502
i386 randconfig-g002-20200502
x86_64 randconfig-g001-20200502
x86_64 randconfig-g002-20200502
i386 randconfig-g001-20200502
i386 randconfig-h001-20200502
i386 randconfig-h002-20200502
i386 randconfig-h003-20200502
x86_64 randconfig-h002-20200502
x86_64 randconfig-h001-20200502
x86_64 randconfig-h003-20200502
ia64 randconfig-a001-20200502
arm64 randconfig-a001-20200502
arc randconfig-a001-20200502
powerpc randconfig-a001-20200502
arm randconfig-a001-20200502
sparc randconfig-a001-20200502
ia64 randconfig-a001-20200501
arc randconfig-a001-20200501
powerpc randconfig-a001-20200501
arm randconfig-a001-20200501
sparc randconfig-a001-20200501
riscv allyesconfig
riscv nommu_virt_defconfig
riscv allnoconfig
riscv defconfig
riscv rv32_defconfig
riscv allmodconfig
s390 zfcpdump_defconfig
s390 debug_defconfig
s390 allyesconfig
s390 allmodconfig
s390 alldefconfig
s390 defconfig
sh allmodconfig
sh titan_defconfig
sh allnoconfig
sparc defconfig
sparc64 allnoconfig
sparc64 allyesconfig
sparc64 allmodconfig
um x86_64_defconfig
um i386_defconfig
x86_64 rhel
x86_64 rhel-7.6
x86_64 rhel-7.6-kselftests
x86_64 rhel-7.2-clear
x86_64 lkp
x86_64 fedora-25
x86_64 kexec
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
^ permalink raw reply
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